Flemmard | 6c7e733 | 2013-05-07 16:23:17 -0700 | [diff] [blame] | 1 | /* Copyright (c) 2012 Code Aurora Forum. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful; |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | * |
| 12 | */ |
| 13 | #ifndef __SMB349_H__ |
| 14 | #define __SMB349_H__ |
| 15 | |
| 16 | #ifdef CONFIG_HTC_BATT_8960 |
| 17 | #include <mach/htc_charger.h> |
| 18 | #endif |
| 19 | |
| 20 | #define SMB_CHG_CURR_REG 0x00 |
| 21 | #define CHG_OTHER_CURRENT_REG 0x01 |
| 22 | #define VAR_FUNC_REG 0x02 |
| 23 | #define FLOAT_VOLTAGE_REG 0x03 |
| 24 | #define CHG_CTRL_REG 0x04 |
| 25 | #define STAT_TIMER_REG 0x05 |
| 26 | #define PIN_ENABLE_CTRL_REG 0x06 |
| 27 | #define THERM_CTRL_A_REG 0x07 |
| 28 | #define SYSOK_USB3_SEL_REG 0x08 |
| 29 | #define CTRL_FUNC_REG 0x09 |
| 30 | #define OTG_TLIM_THERM_CNTRL_REG 0x0A |
| 31 | #define LIMIT_CELL_TEMP_MONI_REG 0x0B |
| 32 | #define FAULT_IRQ_REG 0x0C |
| 33 | #define STATUS_IRQ_REG 0x0D |
| 34 | #define SYSOK_REG 0x0E |
| 35 | #define AUTO_INPUT_VOL_DET_REG 0x10 |
| 36 | #define I2C_BUS_REG 0x12 |
| 37 | #define CMD_A_REG 0x30 |
| 38 | #define CMD_B_REG 0x31 |
| 39 | #define CMD_C_REG 0x33 |
| 40 | #define IRQ_A_REG 0x35 |
| 41 | #define IRQ_B_REG 0x36 |
| 42 | #define IRQ_C_REG 0x37 |
| 43 | #define IRQ_D_REG 0x38 |
| 44 | #define IRQ_E_REG 0x39 |
| 45 | #define IRQ_F_REG 0x3A |
| 46 | #define STATUS_A_REG 0x3B |
| 47 | #define STATUS_B_REG 0x3C |
| 48 | #define STATUS_C_REG 0x3D |
| 49 | #define STATUS_D_REG 0x3E |
| 50 | #define STATUS_E_REG 0x3F |
| 51 | |
| 52 | #define CHG_STATUS_MASK SMB349_MASK(2, 1) |
| 53 | #define CHG_ENABLE_STATUS_BIT BIT(0) |
| 54 | |
| 55 | #define FAST_CHG_CURRENT_MASK SMB349_MASK(4, 4) |
| 56 | |
| 57 | |
| 58 | #define SUSPEND_MODE_MASK SMB349_MASK(1, 2) |
| 59 | |
| 60 | #define CHARGING_ENABLE_MASK SMB349_MASK(1, 1) |
| 61 | #define VOLIATILE_WRITE_PERMISSIOIN_MASK SMB349_MASK(1, 7) |
| 62 | #define CURRENT_TERMINATION_MASK SMB349_MASK(1, 6) |
| 63 | |
| 64 | #define OTG_ENABLE_MASK SMB349_MASK(1, 4) |
| 65 | #define AICL_MASK SMB349_MASK(1, 4) |
| 66 | #define USBCS_MASK SMB349_MASK(1, 4) |
| 67 | |
| 68 | #define AC_INPUT_CURRENT_LIMIT_MASK SMB349_MASK(4, 0) |
| 69 | #define DC_INPUT_CURRENT_LIMIT_MASK SMB349_MASK(4, 0) |
| 70 | |
| 71 | #define PRE_CHG_CURRENT_MASK SMB349_MASK(3, 5) |
| 72 | |
| 73 | #define USB_HC_MODE_MASK SMB349_MASK(1, 0) |
| 74 | #define TERMINATION_CURRENT_MASK SMB349_MASK(3, 2) |
| 75 | |
| 76 | #define USB_1_5_MODE_MASK SMB349_MASK(1, 1) |
| 77 | |
| 78 | #define IS_SUSPEND_MODE_MASK SMB349_MASK(1, 7) |
| 79 | |
| 80 | #define OTG_CURRENT_MASK SMB349_MASK(2, 2) |
| 81 | |
| 82 | |
| 83 | #define PIN_CONTROL_ACTIVE_MASK SMB349_MASK(2, 5) |
| 84 | |
| 85 | #define PRE_CHG_TO_FAST_CHG_THRESH_MASK SMB349_MASK(2, 6) |
| 86 | #define SWITCH_FREQ_MASK SMB349_MASK(2, 6) |
| 87 | #define OTG_I2C_PIN_MASK SMB349_MASK(2, 6) |
| 88 | |
| 89 | #define PRE_CHG_TO_FAST_CHG_ENABLE_MASK SMB349_MASK(1, 1) |
| 90 | #define FLOAT_VOLTAGE_MASK SMB349_MASK(6, 0) |
| 91 | |
| 92 | |
| 93 | #define SUSPEND_MODE_BIT BIT(2) |
| 94 | #define CHG_ENABLE_BIT BIT(1) |
| 95 | #define VOLATILE_W_PERM_BIT BIT(7) |
| 96 | #define USB_SELECTION_BIT BIT(1) |
| 97 | #define SYSTEM_FET_ENABLE_BIT BIT(7) |
| 98 | #define AICL_COMPLETE_STATUS_BIT BIT(4) |
| 99 | #define AUTOMATIC_INPUT_CURR_LIMIT_BIT BIT(4) |
| 100 | #define I2C_CONTROL_CHARGER_BIT BIT(5) |
| 101 | #define AUTOMATIC_POWER_SOURCE_DETECTION_BIT BIT(2) |
| 102 | #define BATT_OV_END_CHG_BIT BIT(1) |
| 103 | #define VCHG_FUNCTION BIT(0) |
| 104 | #define USB_1_5_MODE BIT(1) |
| 105 | #define USB_HC_MODE BIT(0) |
| 106 | #define POWER_OK_STATUS BIT(0) |
| 107 | #define USBCS_PIN_MODE BIT(4) |
| 108 | #define USBCS_REGISTER_MODE 0 |
| 109 | #define CURR_TERM_END_CHG_BIT BIT(6) |
| 110 | |
| 111 | #define SMB349_HOT_TEMPERATURE_HARD_LIMIT_IRQ 7 |
| 112 | #define SMB349_HOT_TEMPERATURE_HARD_LIMIT_STATUS 6 |
| 113 | #define SMB349_COLD_TEMPERATURE_HARD_LIMIT_IRQ 5 |
| 114 | #define SMB349_COLD_TEMPERATURE_HARD_LIMIT_STATUS 4 |
| 115 | #define SMB349_HOT_TEMPERATURE_SOFT_LIMIT_IRQ 3 |
| 116 | #define SMB349_HOT_TEMPERATURE_SOFT_LIMIT_STATUS 2 |
| 117 | #define SMB349_COLD_TEMPERATURE_SOFT_LIMIT_IRQ 1 |
| 118 | #define SMB349_COLD_TEMPERATURE_SOFT_LIMIT_STATUS 0 |
| 119 | |
| 120 | #define SMB349_BATTERY_OVER_VOLTAGE_CONDITION_IRQ 7 |
| 121 | #define SMB349_BATTERY_OVER_VOLTAGE_STATUS 6 |
| 122 | #define SMB349_MISSING_BATTER_IRQ 5 |
| 123 | #define SMB349_MISSING_BATTERY_STATUS 4 |
| 124 | #define SMB349_LOW_BATTERY_VOLTAGE_IRQ 3 |
| 125 | #define SMB349_LOW_BATTERY_VOLTAGE_STATUS 2 |
| 126 | #define SMB349_PRE_TO_FAST_CHARGE_BATTERY_VOLTAGE_IRQ 1 |
| 127 | #define SMB349_PRE_TO_FAST_CHARGE_BATTERY_VOLTAGE_STATUS 0 |
| 128 | |
| 129 | #define SMB349_INTERNAL_TEMPERATURE_LIMIT_IRQ 7 |
| 130 | #define SMB349_INTERNAL_TEMPERATURE_LIMIT_STATUS 6 |
| 131 | #define SMB349_RE_CHARGE_BATTERY_THRESHOLD_IRQ 5 |
| 132 | #define SMB349_RE_CHARGE_BATTERY_THRESHOLD_STATUS 4 |
| 133 | #define SMB349_TAPER_CHARGING_MODE_IRQ 3 |
| 134 | #define SMB349_TAPER_CHARGING_MODE_STATUS 2 |
| 135 | #define SMB349_TERMINATION_CHARGING_CURRENT_HIT_IRQ 1 |
| 136 | #define SMB349_TERMINATION_CHARGING_CURRENT_HIT_STATUS 0 |
| 137 | |
| 138 | #define SMB349_APSD_COMPLETED_IRQ 7 |
| 139 | #define SMB349_APSD_COMPLETED_STATUS 6 |
| 140 | #define SMB349_AICL_COMPLETE_IRQ 5 |
| 141 | #define SMB349_AICL_COMPLETE_STATUS 4 |
| 142 | #define SMB349_RESERVED_3 3 |
| 143 | #define SMB349_RESERVED_2 2 |
| 144 | #define SMB349_CHARGE_TIMEOUT_IRQ 1 |
| 145 | #define SMB349_CHARGE_TIMEOUT_STATUS 0 |
| 146 | |
| 147 | |
| 148 | #define SMB349_CIN_OVER_VOLTAGE_IRQ 7 |
| 149 | #define SMB349_DCIN_OVER_VOLTAGE_STATUS 6 |
| 150 | #define SMB349_DCIN_UNDER_VOLTAGE_IRQ 5 |
| 151 | #define SMB349_DCIN_UNDER_VOLTAGE_STATUS 4 |
| 152 | #define SMB349_AFVC_ACTIVE_IRQ 3 |
| 153 | #define SMB349_AFVC_ACTIVE_STATUS 2 |
| 154 | |
| 155 | #define SMB349_OTG_OVER_CURRENT_LIMIT_IRQ 7 |
| 156 | #define SMB349_OTG_OVER_CURRENT_LIMIT_STATUS 6 |
| 157 | #define SMB349_OTG_BATTERY_UNDER_VOLTAGE_IRQ 5 |
| 158 | #define SMB349_OTG_BATTERY_UNDER_VOLTAGE_STATUS 4 |
| 159 | #define SMB349_OTG_DETECTION_IRQ 3 |
| 160 | #define SMB349_OTG_DETECTION_STATUS 2 |
| 161 | #define SMB349_POWER_OK_IRQ 1 |
| 162 | #define SMB349_POWER_OK_STATUS 0 |
| 163 | |
| 164 | |
| 165 | #define SMB349_FAST_CHG_MIN_MA 1000 |
| 166 | #define SMB349_FAST_CHG_STEP_MA 200 |
| 167 | #define SMB349_FAST_CHG_MAX_MA 4000 |
| 168 | #define SMB349_FAST_CHG_SHIFT 4 |
| 169 | #define SMB349_PRE_CHG_SHIFT 5 |
| 170 | |
| 171 | #define SMB349_OTG_I2C_PIN_SHIFT 6 |
| 172 | |
| 173 | #define SMB349_OTG_I2C_CONTROL 0x0 |
| 174 | #define SMB349_OTG_PIN_CONTROL 0x1 |
| 175 | |
| 176 | #define SMB34X_OTG_CURR_LIMIT_SHIFT 2 |
| 177 | #define SMB349_SWITCH_FREQ_SHIFT 6 |
| 178 | |
| 179 | #define SMB349_PIN_CONTROL_SHIFT 5 |
| 180 | #define SMB349_USBCS_REGISTER_CTRL 0 |
| 181 | #define SMB349_USBCS_PIN_CTRL 1 |
| 182 | |
| 183 | #define SMB349_NO_CHARGING 0 |
| 184 | #define SMB349_PRE_CHARGING 1 |
| 185 | #define SMB349_FAST_CHARGING 2 |
| 186 | #define SMB349_TAPER_CHARGING 3 |
| 187 | |
| 188 | |
| 189 | |
| 190 | #define SMB349_FLOAT_VOL_4000_MV 0x1B |
| 191 | #define SMB349_FLOAT_VOL_4200_MV 0x25 |
| 192 | #define SMB349_FLOAT_VOL_4220_MV 0x26 |
| 193 | #define SMB349_FLOAT_VOL_4240_MV 0x27 |
| 194 | #define SMB349_FLOAT_VOL_4260_MV 0x28 |
| 195 | #define SMB349_FLOAT_VOL_4280_MV 0x29 |
| 196 | #define SMB349_FLOAT_VOL_4300_MV 0x2A |
| 197 | #define SMB349_FLOAT_VOL_4320_MV 0x2B |
| 198 | #define SMB349_FLOAT_VOL_4340_MV 0x2C |
| 199 | #define SMB349_FLOAT_VOL_4350_MV 0x2D |
| 200 | |
| 201 | |
| 202 | #define SMB_OTG_CURR_LIMIT_250MA 0x0 |
| 203 | #define SMB_OTG_CURR_LIMIT_500MA 0x1 |
| 204 | #define SMB_OTG_CURR_LIMIT_750MA 0x2 |
| 205 | #define SMB_OTG_CURR_LIMIT_1000MA 0x3 |
| 206 | |
| 207 | |
| 208 | #define SMB349_I2C_CONTROL_ACTIVE_HIGH 0x0 |
| 209 | #define SMB349_I2C_CONTROL_ACTIVE_LOW 0x1 |
| 210 | #define SMB349_PIN_CONTROL_ACTIVE_HIGH 0x2 |
| 211 | #define SMB349_PIN_CONTROL_ACTIVE_LOW 0x3 |
| 212 | |
| 213 | #define AICL_RESULT_500MA 0x0 |
| 214 | #define AICL_RESULT_900MA 0x1 |
| 215 | #define AICL_RESULT_1000MA 0x2 |
| 216 | #define AICL_RESULT_1100MA 0x3 |
| 217 | #define AICL_RESULT_1200MA 0x4 |
| 218 | #define AICL_RESULT_1300MA 0x5 |
| 219 | #define AICL_RESULT_1500MA 0x6 |
| 220 | #define AICL_RESULT_1600MA 0x7 |
| 221 | #define AICL_RESULT_1700MA 0x8 |
| 222 | #define AICL_RESULT_1800MA 0x9 |
| 223 | #define AICL_RESULT_2000MA 0xa |
| 224 | #define AICL_RESULT_2200MA 0xb |
| 225 | #define AICL_RESULT_2400MA 0xc |
| 226 | #define AICL_RESULT_2500MA 0xd |
| 227 | #define AICL_RESULT_3000MA 0xe |
| 228 | #define AICL_RESULT_3500MA 0xf |
| 229 | |
| 230 | #define SWITCH_FREQ_750KHZ 0x0 |
| 231 | #define SWITCH_FREQ_1MHZ 0x1 |
| 232 | #define SWITCH_FREQ_1D5MHZ 0x2 |
| 233 | #define SWITCH_FREQ_3MHZ 0x3 |
| 234 | |
| 235 | #define SMB349_USB_MODE 0 |
| 236 | #define SMB349_HC_MODE 1 |
| 237 | |
| 238 | #define FAST_CHARGE_500MA 0x0 |
| 239 | #define FAST_CHARGE_600MA 0x1 |
| 240 | #define FAST_CHARGE_700MA 0x2 |
| 241 | #define FAST_CHARGE_800MA 0x3 |
| 242 | #define FAST_CHARGE_900MA 0x4 |
| 243 | #define FAST_CHARGE_1000MA 0x5 |
| 244 | #define FAST_CHARGE_1100MA 0x6 |
| 245 | #define FAST_CHARGE_1200MA 0x7 |
| 246 | #define FAST_CHARGE_1300MA 0x8 |
| 247 | #define FAST_CHARGE_1400MA 0x9 |
| 248 | #define FAST_CHARGE_1500MA 0xa |
| 249 | #define FAST_CHARGE_1600MA 0xb |
| 250 | #define FAST_CHARGE_1700MA 0xc |
| 251 | #define FAST_CHARGE_1800MA 0xd |
| 252 | #define FAST_CHARGE_1900MA 0xe |
| 253 | #define FAST_CHARGE_2000MA 0xf |
| 254 | |
| 255 | |
| 256 | #define SMB340_FASTCHG_1000MA 0x0 |
| 257 | #define SMB340_FASTCHG_1200MA 0x1 |
| 258 | #define SMB340_FASTCHG_1400MA 0x2 |
| 259 | #define SMB340_FASTCHG_1600MA 0x3 |
| 260 | #define SMB340_FASTCHG_1800MA 0x4 |
| 261 | #define SMB340_FASTCHG_2000MA 0x5 |
| 262 | #define SMB340_FASTCHG_2200MA 0x6 |
| 263 | #define SMB340_FASTCHG_2400MA 0x7 |
| 264 | #define SMB340_FASTCHG_2600MA 0x8 |
| 265 | #define SMB340_FASTCHG_2800MA 0x9 |
| 266 | #define SMB340_FASTCHG_3000MA 0xa |
| 267 | #define SMB340_FASTCHG_3200MA 0xb |
| 268 | #define SMB340_FASTCHG_3400MA 0xc |
| 269 | #define SMB340_FASTCHG_3600MA 0xd |
| 270 | #define SMB340_FASTCHG_3800MA 0xe |
| 271 | #define SMB340_FASTCHG_4000MA 0xf |
| 272 | |
| 273 | |
| 274 | |
| 275 | #define DC_INPUT_500MA 0x0 |
| 276 | #define DC_INPUT_900MA 0x1 |
| 277 | #define DC_INPUT_1000MA 0x2 |
| 278 | #define DC_INPUT_1100MA 0x3 |
| 279 | #define DC_INPUT_1200MA 0x4 |
| 280 | #define DC_INPUT_1300MA 0x5 |
| 281 | #define DC_INPUT_1500MA 0x6 |
| 282 | #define DC_INPUT_1600MA 0x7 |
| 283 | #define DC_INPUT_1700MA 0x8 |
| 284 | #define DC_INPUT_1800MA 0x9 |
| 285 | #define DC_INPUT_2000MA 0xa |
| 286 | #define DC_INPUT_2200MA 0xb |
| 287 | #define DC_INPUT_2400MA 0xc |
| 288 | #define DC_INPUT_2500MA 0xd |
| 289 | #define DC_INPUT_3000MA 0xe |
| 290 | #define DC_INPUT_3500MA 0xf |
| 291 | |
| 292 | #define PRECHG_CURR_100MA 0x0 |
| 293 | #define PRECHG_CURR_150MA 0x1 |
| 294 | #define PRECHG_CURR_200MA 0x2 |
| 295 | #define PRECHG_CURR_250MA 0x3 |
| 296 | #define PRECHG_CURR_300MA 0x4 |
| 297 | #define PRECHG_CURR_350MA 0x5 |
| 298 | #define PRECHG_CURR_50MA 0x6 |
| 299 | |
| 300 | #define SMB340_PRECHG_CURR_200MA 0x0 |
| 301 | #define SMB340_PRECHG_CURR_300MA 0x1 |
| 302 | #define SMB340_PRECHG_CURR_400MA 0x2 |
| 303 | #define SMB340_PRECHG_CURR_500MA 0x3 |
| 304 | #define SMB340_PRECHG_CURR_600MA 0x4 |
| 305 | #define SMB340_PRECHG_CURR_700MA 0x5 |
| 306 | #define SMB340_PRECHG_CURR_100MA 0x6 |
| 307 | |
| 308 | |
| 309 | #define SMB_349 1 |
| 310 | #define SMB_340 2 |
| 311 | |
| 312 | enum smb349_thermal_state { |
| 313 | STATE_HI_V_SCRN_ON = 1, |
| 314 | STATE_LO_V_SCRN_ON, |
| 315 | STATE_HI_V_SCRN_OFF, |
| 316 | STATE_LO_V_SCRN_OFF, |
| 317 | }; |
| 318 | |
| 319 | struct smb349_chg_int_notifier { |
| 320 | struct list_head notifier_link; |
| 321 | const char *name; |
| 322 | void (*func)(int int_reg, int value); |
| 323 | }; |
| 324 | |
| 325 | struct smb349_platform_data { |
| 326 | int chg_susp_gpio; |
| 327 | int chg_current_ma; |
| 328 | int chip_rev; |
| 329 | #ifdef CONFIG_SUPPORT_DQ_BATTERY |
| 330 | int dq_result; |
| 331 | #endif |
| 332 | int aicl_result_threshold; |
| 333 | int dc_input_max; |
| 334 | }; |
| 335 | |
| 336 | struct smb349_charger_batt_param { |
| 337 | int max_voltage; |
| 338 | int cool_bat_voltage; |
| 339 | }; |
| 340 | int smb349_set_AICL_mode(unsigned int enable); |
| 341 | int smb349_allow_fast_charging_setting(void); |
| 342 | int smb349_allow_volatile_wrtting(void); |
| 343 | int smb349_enable_charging(bool enable); |
| 344 | int smb349_eoc_notify(enum htc_extchg_event_type main_event); |
| 345 | int smb349_event_notify(enum htc_extchg_event_type extchg_event); |
| 346 | int smb349_temp_notify(enum htc_extchg_event_type main_event); |
| 347 | int smb349_enable_5v_output(bool mhl_in); |
| 348 | int smb349_config(void); |
| 349 | void smb349_dbg(void); |
| 350 | int smb349_dump_reg(u8 reg); |
| 351 | void smb349_partial_reg_dump(void); |
| 352 | int smb349_dump_all(void); |
| 353 | int smb349_is_AICL_complete(void); |
| 354 | int smb349_is_AICL_enabled(void); |
| 355 | int smb349_is_charger_bit_low_active(void); |
| 356 | int smb349_is_charger_error(void); |
| 357 | int smb349_reset_max_chg_vol(enum htc_extchg_event_type main_event); |
| 358 | int smb349_is_charging_enabled(void); |
| 359 | int smb349_is_batt_temp_fault_disable_chg(int *result); |
| 360 | int smb349_get_i2c_slave_id(void); |
| 361 | int smb349_is_hc_mode(void); |
| 362 | int smb349_is_usbcs_register_mode(void); |
| 363 | int smb349_masked_write(int reg, u8 mask, u8 val); |
| 364 | int smb349_not_allow_charging_cycle_end(void); |
| 365 | int smb349_enable_pwrsrc(bool enable); |
| 366 | int smb349_set_pwrsrc_and_charger_enable(enum htc_power_source_type src, bool chg_enable, bool pwrsrc_enable); |
| 367 | int smb349_set_hc_mode(unsigned int enable); |
| 368 | int smb349_switch_usbcs_mode(int mode); |
| 369 | int smb349_limit_charge_enable(bool enable); |
| 370 | int smb349_get_charging_src(int *result); |
| 371 | int smb349_get_charging_enabled(int *result); |
| 372 | int smb349_is_charger_overvoltage(int* result); |
| 373 | int smb349_charger_get_attr_text(char *buf, int size); |
| 374 | int smb349_start_charging(void *ctx); |
| 375 | int smb349_stop_charging(void *ctx); |
| 376 | bool smb349_is_trickle_charging(void *ctx); |
| 377 | #endif |