| Paul Mundt | d8d6b90 | 2010-10-15 02:13:04 +0900 | [diff] [blame] | 1 | /* | 
 | 2 |  * SDK7786 FPGA SRAM Support. | 
 | 3 |  * | 
 | 4 |  * Copyright (C) 2010  Paul Mundt | 
 | 5 |  * | 
 | 6 |  * This file is subject to the terms and conditions of the GNU General Public | 
 | 7 |  * License.  See the file "COPYING" in the main directory of this archive | 
 | 8 |  * for more details. | 
 | 9 |  */ | 
 | 10 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | 
 | 11 |  | 
 | 12 | #include <linux/init.h> | 
 | 13 | #include <linux/kernel.h> | 
 | 14 | #include <linux/types.h> | 
 | 15 | #include <linux/io.h> | 
 | 16 | #include <linux/string.h> | 
 | 17 | #include <mach/fpga.h> | 
 | 18 | #include <asm/sram.h> | 
 | 19 | #include <asm/sizes.h> | 
 | 20 |  | 
 | 21 | static int __init fpga_sram_init(void) | 
 | 22 | { | 
 | 23 | 	unsigned long phys; | 
 | 24 | 	unsigned int area; | 
 | 25 | 	void __iomem *vaddr; | 
 | 26 | 	int ret; | 
 | 27 | 	u16 data; | 
 | 28 |  | 
 | 29 | 	/* Enable FPGA SRAM */ | 
 | 30 | 	data = fpga_read_reg(LCLASR); | 
 | 31 | 	data |= LCLASR_FRAMEN; | 
 | 32 | 	fpga_write_reg(data, LCLASR); | 
 | 33 |  | 
 | 34 | 	/* | 
 | 35 | 	 * FPGA_SEL determines the area mapping | 
 | 36 | 	 */ | 
 | 37 | 	area = (data & LCLASR_FPGA_SEL_MASK) >> LCLASR_FPGA_SEL_SHIFT; | 
 | 38 | 	if (unlikely(area == LCLASR_AREA_MASK)) { | 
 | 39 | 		pr_err("FPGA memory unmapped.\n"); | 
 | 40 | 		return -ENXIO; | 
 | 41 | 	} | 
 | 42 |  | 
 | 43 | 	/* | 
 | 44 | 	 * The memory itself occupies a 2KiB range at the top of the area | 
 | 45 | 	 * immediately below the system registers. | 
 | 46 | 	 */ | 
 | 47 | 	phys = (area << 26) + SZ_64M - SZ_4K; | 
 | 48 |  | 
 | 49 | 	/* | 
 | 50 | 	 * The FPGA SRAM resides in translatable physical space, so set | 
 | 51 | 	 * up a mapping prior to inserting it in to the pool. | 
 | 52 | 	 */ | 
 | 53 | 	vaddr = ioremap(phys, SZ_2K); | 
 | 54 | 	if (unlikely(!vaddr)) { | 
 | 55 | 		pr_err("Failed remapping FPGA memory.\n"); | 
 | 56 | 		return -ENXIO; | 
 | 57 | 	} | 
 | 58 |  | 
 | 59 | 	pr_info("Adding %dKiB of FPGA memory at 0x%08lx-0x%08lx " | 
 | 60 | 		"(area %d) to pool.\n", | 
 | 61 | 		SZ_2K >> 10, phys, phys + SZ_2K - 1, area); | 
 | 62 |  | 
 | 63 | 	ret = gen_pool_add(sram_pool, (unsigned long)vaddr, SZ_2K, -1); | 
 | 64 | 	if (unlikely(ret < 0)) { | 
 | 65 | 		pr_err("Failed adding memory\n"); | 
 | 66 | 		iounmap(vaddr); | 
 | 67 | 		return ret; | 
 | 68 | 	} | 
 | 69 |  | 
 | 70 | 	return 0; | 
 | 71 | } | 
 | 72 | postcore_initcall(fpga_sram_init); |