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Mark Brown17a52fd2009-07-05 17:24:50 +01001/*
2 * soc-cache.c -- ASoC register cache helpers
3 *
4 * Copyright 2009 Wolfson Microelectronics PLC.
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
Mark Brown7084a422009-07-10 22:24:27 +010014#include <linux/i2c.h>
Mark Brown17a52fd2009-07-05 17:24:50 +010015#include <sound/soc.h>
16
17static unsigned int snd_soc_7_9_read(struct snd_soc_codec *codec,
18 unsigned int reg)
19{
20 u16 *cache = codec->reg_cache;
21 if (reg >= codec->reg_cache_size)
22 return -1;
23 return cache[reg];
24}
25
26static int snd_soc_7_9_write(struct snd_soc_codec *codec, unsigned int reg,
27 unsigned int value)
28{
29 u16 *cache = codec->reg_cache;
30 u8 data[2];
31 int ret;
32
33 BUG_ON(codec->volatile_register);
34
35 data[0] = (reg << 1) | ((value >> 8) & 0x0001);
36 data[1] = value & 0x00ff;
37
38 if (reg < codec->reg_cache_size)
39 cache[reg] = value;
40 ret = codec->hw_write(codec->control_data, data, 2);
41 if (ret == 2)
42 return 0;
43 if (ret < 0)
44 return ret;
45 else
46 return -EIO;
47}
48
49
50static struct {
51 int addr_bits;
52 int data_bits;
53 int (*write)(struct snd_soc_codec *, unsigned int, unsigned int);
54 unsigned int (*read)(struct snd_soc_codec *, unsigned int);
55} io_types[] = {
56 { 7, 9, snd_soc_7_9_write, snd_soc_7_9_read },
57};
58
59/**
60 * snd_soc_codec_set_cache_io: Set up standard I/O functions.
61 *
62 * @codec: CODEC to configure.
63 * @type: Type of cache.
64 * @addr_bits: Number of bits of register address data.
65 * @data_bits: Number of bits of data per register.
Mark Brown7084a422009-07-10 22:24:27 +010066 * @control: Control bus used.
Mark Brown17a52fd2009-07-05 17:24:50 +010067 *
68 * Register formats are frequently shared between many I2C and SPI
69 * devices. In order to promote code reuse the ASoC core provides
70 * some standard implementations of CODEC read and write operations
71 * which can be set up using this function.
72 *
73 * The caller is responsible for allocating and initialising the
74 * actual cache.
75 *
76 * Note that at present this code cannot be used by CODECs with
77 * volatile registers.
78 */
79int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
Mark Brown7084a422009-07-10 22:24:27 +010080 int addr_bits, int data_bits,
81 enum snd_soc_control_type control)
Mark Brown17a52fd2009-07-05 17:24:50 +010082{
83 int i;
84
85 /* We don't support volatile registers yet - refactoring of
86 * the hw_read operation will be required to do so. */
87 if (codec->volatile_register) {
88 printk(KERN_ERR "Volatile registers not yet supported\n");
89 return -EINVAL;
90 }
91
92 for (i = 0; i < ARRAY_SIZE(io_types); i++)
93 if (io_types[i].addr_bits == addr_bits &&
94 io_types[i].data_bits == data_bits)
95 break;
96 if (i == ARRAY_SIZE(io_types)) {
97 printk(KERN_ERR
98 "No I/O functions for %d bit address %d bit data\n",
99 addr_bits, data_bits);
100 return -EINVAL;
101 }
102
103 codec->write = io_types[i].write;
104 codec->read = io_types[i].read;
105
Mark Brown7084a422009-07-10 22:24:27 +0100106 switch (control) {
107 case SND_SOC_CUSTOM:
108 break;
109
110 case SND_SOC_I2C:
111#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
112 codec->hw_write = (hw_write_t)i2c_master_send;
113#endif
114 break;
115
116 case SND_SOC_SPI:
117 break;
118 }
119
Mark Brown17a52fd2009-07-05 17:24:50 +0100120 return 0;
121}
122EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io);