blob: 9e3efe2fda9b48e962fe0de3a666628e027f8768 [file] [log] [blame]
Michael Bohan0425f6f2012-01-17 14:36:39 -08001/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
Sathish Ambleyc58afc22011-10-09 21:55:39 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include <linux/kernel.h>
14#include <linux/platform_device.h>
15#include <linux/io.h>
16#include <linux/irq.h>
17#include <linux/irqdomain.h>
18#include <linux/of.h>
19#include <linux/of_address.h>
20#include <linux/of_platform.h>
Michael Bohanc7224532012-01-06 16:02:52 -080021#include <linux/of_irq.h>
Olav Hauganb800c8c2012-01-30 08:50:45 -080022#ifdef CONFIG_ION_MSM
23#include <linux/ion.h>
24#endif
25#include <linux/memory.h>
26#ifdef CONFIG_ANDROID_PMEM
27#include <linux/android_pmem.h>
28#endif
Sathish Ambleyc58afc22011-10-09 21:55:39 -070029#include <asm/mach/map.h>
30#include <asm/hardware/gic.h>
31#include <mach/board.h>
32#include <mach/gpio.h>
33#include <mach/gpiomux.h>
34#include <mach/msm_iomap.h>
Olav Hauganb800c8c2012-01-30 08:50:45 -080035#ifdef CONFIG_ION_MSM
36#include <mach/ion.h>
37#endif
38#include <mach/msm_memtypes.h>
Jeff Hugo70946092012-02-10 11:30:43 -070039#include <mach/msm_smd.h>
Sathish Ambleyc58afc22011-10-09 21:55:39 -070040#include "clock.h"
41
Olav Hauganb800c8c2012-01-30 08:50:45 -080042#define MSM_KERNEL_EBI1_MEM_SIZE 0x280000
43#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
44#define MSM_ION_SF_SIZE 0x4000000 /* 64 Mbytes */
45#else
46#define MSM_ION_SF_SIZE 0x2800000 /* 40 Mbytes */
47#endif
48#define MSM_ION_MM_FW_SIZE 0x200000 /* (2MB) */
49#define MSM_ION_MM_SIZE 0x7800000 /* (120MB) */
50#define MSM_ION_QSECOM_SIZE 0x100000 /* (1MB) */
51#define MSM_ION_MFC_SIZE SZ_8K
52#define MSM_ION_AUDIO_SIZE 0x2B4000
53#define MSM_ION_HEAP_NUM 8
54
55#ifdef CONFIG_KERNEL_PMEM_EBI_REGION
56static unsigned kernel_ebi1_mem_size = MSM_KERNEL_EBI1_MEM_SIZE;
57static int __init kernel_ebi1_mem_size_setup(char *p)
58{
59 kernel_ebi1_mem_size = memparse(p, NULL);
60 return 0;
61}
62early_param("kernel_ebi1_mem_size", kernel_ebi1_mem_size_setup);
63#endif
64
65static struct memtype_reserve msm_copper_reserve_table[] __initdata = {
66 [MEMTYPE_SMI] = {
67 },
68 [MEMTYPE_EBI0] = {
69 .flags = MEMTYPE_FLAGS_1M_ALIGN,
70 },
71 [MEMTYPE_EBI1] = {
72 .flags = MEMTYPE_FLAGS_1M_ALIGN,
73 },
74};
75
76static int msm_copper_paddr_to_memtype(unsigned int paddr)
77{
78 return MEMTYPE_EBI1;
79}
80
81#ifdef CONFIG_ION_MSM
82static struct ion_cp_heap_pdata cp_mm_ion_pdata = {
83 .permission_type = IPT_TYPE_MM_CARVEOUT,
84 .align = PAGE_SIZE,
85};
86
87static struct ion_cp_heap_pdata cp_mfc_ion_pdata = {
88 .permission_type = IPT_TYPE_MFC_SHAREDMEM,
89 .align = PAGE_SIZE,
90};
91
92static struct ion_co_heap_pdata co_ion_pdata = {
93 .adjacent_mem_id = INVALID_HEAP_ID,
94 .align = PAGE_SIZE,
95};
96
97static struct ion_co_heap_pdata fw_co_ion_pdata = {
98 .adjacent_mem_id = ION_CP_MM_HEAP_ID,
99 .align = SZ_128K,
100};
101
102static struct ion_platform_data ion_pdata = {
103 .nr = MSM_ION_HEAP_NUM,
104 .heaps = {
105 {
106 .id = ION_SYSTEM_HEAP_ID,
107 .type = ION_HEAP_TYPE_SYSTEM,
108 .name = ION_VMALLOC_HEAP_NAME,
109 },
110 {
111 .id = ION_SF_HEAP_ID,
112 .type = ION_HEAP_TYPE_CARVEOUT,
113 .name = ION_SF_HEAP_NAME,
114 .size = MSM_ION_SF_SIZE,
115 .memory_type = ION_EBI_TYPE,
116 .extra_data = (void *) &co_ion_pdata,
117 },
118 {
119 .id = ION_CP_MM_HEAP_ID,
120 .type = ION_HEAP_TYPE_CP,
121 .name = ION_MM_HEAP_NAME,
122 .size = MSM_ION_MM_SIZE,
123 .memory_type = ION_EBI_TYPE,
124 .extra_data = (void *) &cp_mm_ion_pdata,
125 },
126 {
127 .id = ION_MM_FIRMWARE_HEAP_ID,
128 .type = ION_HEAP_TYPE_CARVEOUT,
129 .name = ION_MM_FIRMWARE_HEAP_NAME,
130 .size = MSM_ION_MM_FW_SIZE,
131 .memory_type = ION_EBI_TYPE,
132 .extra_data = (void *) &fw_co_ion_pdata,
133 },
134 {
135 .id = ION_CP_MFC_HEAP_ID,
136 .type = ION_HEAP_TYPE_CP,
137 .name = ION_MFC_HEAP_NAME,
138 .size = MSM_ION_MFC_SIZE,
139 .memory_type = ION_EBI_TYPE,
140 .extra_data = (void *) &cp_mfc_ion_pdata,
141 },
142 {
143 .id = ION_IOMMU_HEAP_ID,
144 .type = ION_HEAP_TYPE_IOMMU,
145 .name = ION_IOMMU_HEAP_NAME,
146 },
147 {
148 .id = ION_QSECOM_HEAP_ID,
149 .type = ION_HEAP_TYPE_CARVEOUT,
150 .name = ION_QSECOM_HEAP_NAME,
151 .size = MSM_ION_QSECOM_SIZE,
152 .memory_type = ION_EBI_TYPE,
153 .extra_data = (void *) &co_ion_pdata,
154 },
155 {
156 .id = ION_AUDIO_HEAP_ID,
157 .type = ION_HEAP_TYPE_CARVEOUT,
158 .name = ION_AUDIO_HEAP_NAME,
159 .size = MSM_ION_AUDIO_SIZE,
160 .memory_type = ION_EBI_TYPE,
161 .extra_data = (void *) &co_ion_pdata,
162 },
163 }
164};
165
166static struct platform_device ion_dev = {
167 .name = "ion-msm",
168 .id = 1,
169 .dev = { .platform_data = &ion_pdata },
170};
171
172static void reserve_ion_memory(void)
173{
174 msm_copper_reserve_table[MEMTYPE_EBI1].size += MSM_ION_MM_SIZE;
175 msm_copper_reserve_table[MEMTYPE_EBI1].size += MSM_ION_MM_FW_SIZE;
176 msm_copper_reserve_table[MEMTYPE_EBI1].size += MSM_ION_SF_SIZE;
177 msm_copper_reserve_table[MEMTYPE_EBI1].size += MSM_ION_MFC_SIZE;
178 msm_copper_reserve_table[MEMTYPE_EBI1].size += MSM_ION_QSECOM_SIZE;
179 msm_copper_reserve_table[MEMTYPE_EBI1].size += MSM_ION_AUDIO_SIZE;
180#ifdef CONFIG_KERNEL_PMEM_EBI_REGION
181 msm_copper_reserve_table[MEMTYPE_EBI1].size += kernel_ebi1_mem_size;
182#endif
183}
184#endif
185
Jeff Hugo70946092012-02-10 11:30:43 -0700186static struct resource smd_resource[] = {
187 {
188 .name = "modem_smd_in",
189 .start = 32 + 17, /* mss_sw_to_kpss_ipc_irq0 */
190 .flags = IORESOURCE_IRQ,
191 },
192 {
193 .name = "modem_smsm_in",
194 .start = 32 + 18, /* mss_sw_to_kpss_ipc_irq1 */
195 .flags = IORESOURCE_IRQ,
196 },
197 {
198 .name = "adsp_smd_in",
199 .start = 32 + 156, /* lpass_to_kpss_ipc_irq0 */
200 .flags = IORESOURCE_IRQ,
201 },
202 {
203 .name = "adsp_smsm_in",
204 .start = 32 + 157, /* lpass_to_kpss_ipc_irq1 */
205 .flags = IORESOURCE_IRQ,
206 },
207 {
208 .name = "wcnss_smd_in",
209 .start = 32 + 142, /* WcnssAppsSmdMedIrq */
210 .flags = IORESOURCE_IRQ,
211 },
212 {
213 .name = "wcnss_smsm_in",
214 .start = 32 + 144, /* RicaAppsWlanSmsmIrq */
215 .flags = IORESOURCE_IRQ,
216 },
217};
218
219static struct smd_subsystem_config smd_config_list[] = {
220 {
221 .irq_config_id = SMD_MODEM,
222 .subsys_name = "modem",
223 .edge = SMD_APPS_MODEM,
224
225 .smd_int.irq_name = "modem_smd_in",
226 .smd_int.flags = IRQF_TRIGGER_RISING,
227 .smd_int.irq_id = -1,
228 .smd_int.device_name = "smd_dev",
229 .smd_int.dev_id = 0,
230 .smd_int.out_bit_pos = 1 << 12,
231 .smd_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE,
232 .smd_int.out_offset = 0x8,
233
234 .smsm_int.irq_name = "modem_smsm_in",
235 .smsm_int.flags = IRQF_TRIGGER_RISING,
236 .smsm_int.irq_id = -1,
237 .smsm_int.device_name = "smsm_dev",
238 .smsm_int.dev_id = 0,
239 .smsm_int.out_bit_pos = 1 << 13,
240 .smsm_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE,
241 .smsm_int.out_offset = 0x8,
242 },
243 {
244 .irq_config_id = SMD_Q6,
245 .subsys_name = "q6",
246 .edge = SMD_APPS_QDSP,
247
248 .smd_int.irq_name = "adsp_smd_in",
249 .smd_int.flags = IRQF_TRIGGER_RISING,
250 .smd_int.irq_id = -1,
251 .smd_int.device_name = "smd_dev",
252 .smd_int.dev_id = 0,
253 .smd_int.out_bit_pos = 1 << 8,
254 .smd_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE,
255 .smd_int.out_offset = 0x8,
256
257 .smsm_int.irq_name = "adsp_smsm_in",
258 .smsm_int.flags = IRQF_TRIGGER_RISING,
259 .smsm_int.irq_id = -1,
260 .smsm_int.device_name = "smsm_dev",
261 .smsm_int.dev_id = 0,
262 .smsm_int.out_bit_pos = 1 << 9,
263 .smsm_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE,
264 .smsm_int.out_offset = 0x8,
265 },
266 {
267 .irq_config_id = SMD_WCNSS,
268 .subsys_name = "wcnss",
269 .edge = SMD_APPS_WCNSS,
270
271 .smd_int.irq_name = "wcnss_smd_in",
272 .smd_int.flags = IRQF_TRIGGER_RISING,
273 .smd_int.irq_id = -1,
274 .smd_int.device_name = "smd_dev",
275 .smd_int.dev_id = 0,
276 .smd_int.out_bit_pos = 1 << 17,
277 .smd_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE,
278 .smd_int.out_offset = 0x8,
279
280 .smsm_int.irq_name = "wcnss_smsm_in",
281 .smsm_int.flags = IRQF_TRIGGER_RISING,
282 .smsm_int.irq_id = -1,
283 .smsm_int.device_name = "smsm_dev",
284 .smsm_int.dev_id = 0,
285 .smsm_int.out_bit_pos = 1 << 19,
286 .smsm_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE,
287 .smsm_int.out_offset = 0x8,
288 },
289};
290
291static struct smd_platform smd_platform_data = {
292 .num_ss_configs = ARRAY_SIZE(smd_config_list),
293 .smd_ss_configs = smd_config_list,
294};
295
296struct platform_device msm_device_smd_copper = {
297 .name = "msm_smd",
298 .id = -1,
299 .resource = smd_resource,
300 .num_resources = ARRAY_SIZE(smd_resource),
301 .dev = {
302 .platform_data = &smd_platform_data,
303 }
304};
305
Olav Hauganb800c8c2012-01-30 08:50:45 -0800306static void __init msm_copper_calculate_reserve_sizes(void)
307{
308#ifdef CONFIG_ION_MSM
309 reserve_ion_memory();
310#endif
311}
312
313static struct reserve_info msm_copper_reserve_info __initdata = {
314 .memtype_reserve_table = msm_copper_reserve_table,
315 .calculate_reserve_sizes = msm_copper_calculate_reserve_sizes,
316 .paddr_to_memtype = msm_copper_paddr_to_memtype,
317};
318
319static void __init msm_copper_early_memory(void)
320{
321 reserve_info = &msm_copper_reserve_info;
322}
323
324void __init msm_copper_reserve(void)
325{
326 msm_reserve();
327}
328
Sathish Ambleyc58afc22011-10-09 21:55:39 -0700329static int __init gpiomux_init(void)
330{
331 int rc;
332
333 rc = msm_gpiomux_init(NR_GPIO_IRQS);
334 if (rc) {
335 pr_err("%s: msm_gpiomux_init failed %d\n", __func__, rc);
336 return rc;
337 }
338
339 return 0;
340}
341
342void __init msm_copper_add_devices(void)
343{
Olav Hauganb800c8c2012-01-30 08:50:45 -0800344#ifdef CONFIG_ION_MSM
345 platform_device_register(&ion_dev);
346#endif
Jeff Hugo70946092012-02-10 11:30:43 -0700347 platform_device_register(&msm_device_smd_copper);
Sathish Ambleyc58afc22011-10-09 21:55:39 -0700348}
349
Michael Bohanc7224532012-01-06 16:02:52 -0800350static struct of_device_id irq_match[] __initdata = {
351 { .compatible = "qcom,msm-qgic2", .data = gic_of_init, },
Michael Bohan0425f6f2012-01-17 14:36:39 -0800352 { .compatible = "qcom,msm-gpio", .data = msm_gpio_of_init, },
Sathish Ambleyc58afc22011-10-09 21:55:39 -0700353 {}
354};
355
356void __init msm_copper_init_irq(void)
357{
Michael Bohanc7224532012-01-06 16:02:52 -0800358 of_irq_init(irq_match);
Sathish Ambleyc58afc22011-10-09 21:55:39 -0700359}
360
361static struct clk_lookup msm_clocks_dummy[] = {
Sathish Ambley3d50c762011-10-25 15:26:00 -0700362 CLK_DUMMY("core_clk", BLSP2_UART_CLK, "msm_serial_hsl.0", OFF),
363 CLK_DUMMY("iface_clk", BLSP2_UART_CLK, "msm_serial_hsl.0", OFF),
Sujit Reddy Thumma1a4a79e2011-11-04 09:44:32 +0530364 CLK_DUMMY("core_clk", SDC1_CLK, NULL, OFF),
365 CLK_DUMMY("iface_clk", SDC1_P_CLK, NULL, OFF),
366 CLK_DUMMY("core_clk", SDC3_CLK, NULL, OFF),
367 CLK_DUMMY("iface_clk", SDC3_P_CLK, NULL, OFF),
Pavankumar Kondeti0063b842012-01-16 12:19:58 +0530368 CLK_DUMMY("phy_clk", NULL, "msm_otg", OFF),
369 CLK_DUMMY("core_clk", NULL, "msm_otg", OFF),
370 CLK_DUMMY("alt_core_clk", NULL, "msm_otg", OFF),
371 CLK_DUMMY("iface_clk", NULL, "msm_otg", OFF),
Yan He1466daa2011-11-30 17:25:38 -0800372 CLK_DUMMY("dfab_clk", DFAB_CLK, NULL, 0),
373 CLK_DUMMY("dma_bam_pclk", DMA_BAM_P_CLK, NULL, 0),
374 CLK_DUMMY("mem_clk", NULL, NULL, 0),
Harini Jayaraman5f98dbb2011-12-20 13:38:19 -0700375 CLK_DUMMY("core_clk", SPI_CLK, "spi_qsd.1", OFF),
376 CLK_DUMMY("iface_clk", SPI_P_CLK, "spi_qsd.1", OFF),
Sathish Ambleyc58afc22011-10-09 21:55:39 -0700377};
378
379struct clock_init_data msm_dummy_clock_init_data __initdata = {
380 .table = msm_clocks_dummy,
381 .size = ARRAY_SIZE(msm_clocks_dummy),
382};
383
384static struct of_dev_auxdata msm_copper_auxdata_lookup[] __initdata = {
Sathish Ambleyab783ab2011-11-27 22:21:48 -0800385 OF_DEV_AUXDATA("qcom,msm-lsuart-v14", 0xF991F000, \
Sathish Ambley3d50c762011-10-25 15:26:00 -0700386 "msm_serial_hsl.0", NULL),
Pavankumar Kondeti0063b842012-01-16 12:19:58 +0530387 OF_DEV_AUXDATA("qcom,hsusb-otg", 0xF9A55000, \
388 "msm_otg", NULL),
Harini Jayaraman5f98dbb2011-12-20 13:38:19 -0700389 OF_DEV_AUXDATA("qcom,spi-qup-v2", 0xF9924000, \
390 "spi_qsd.1", NULL),
Kenneth Heitkef3c829c2012-01-13 17:02:43 -0700391 OF_DEV_AUXDATA("qcom,spmi-pmic-arb", 0xFC4C0000, \
392 "spmi-pmic-arb.0", NULL),
Sathish Ambleyc58afc22011-10-09 21:55:39 -0700393 {}
394};
395
396void __init msm_copper_init(struct of_dev_auxdata **adata)
397{
398 if (gpiomux_init())
399 pr_err("%s: gpiomux_init() failed\n", __func__);
400 msm_clock_init(&msm_dummy_clock_init_data);
401
402 *adata = msm_copper_auxdata_lookup;
403}
Olav Hauganb800c8c2012-01-30 08:50:45 -0800404
405void __init msm_copper_very_early(void)
406{
407 msm_copper_early_memory();
408}