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Sathish Ambley4df614c2011-10-07 16:30:46 -07001/dts-v1/;
2
3/include/ "skeleton.dtsi"
4
5/ {
6 model = "Qualcomm MSM Copper";
7 compatible = "qcom,msmcopper-sim", "qcom,msmcopper";
8 interrupt-parent = <&intc>;
9
10 intc: interrupt-controller@F9000000 {
11 compatible = "qcom,msm-qgic2";
12 interrupt-controller;
13 #interrupt-cells = <1>;
14 reg = <0xF9000000 0x1000>,
15 <0xF9002000 0x1000>;
16 };
Sathish Ambley3d50c762011-10-25 15:26:00 -070017
18 serial@F9684000 {
19 compatible = "qcom,msm-lsuart-v14";
20 reg = <0xF9684000 0x1000>;
21 interrupts = <109>;
22 };
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +053023
24 usb@F9690000 {
25 compatible = "qcom,hsusb-otg";
26 reg = <0xF9690000 0x400>;
27 interrupts = <134>;
28
29 qcom,hsusb-otg-phy-type = <2>;
30 qcom,hsusb-otg-mode = <1>;
31 qcom,hsusb-otg-otg-control = <1>;
32 };
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +053033
34 qcom,sdcc@F9600000 {
35 cell-index = <1>;
36 compatible = "qcom,msm-sdcc";
37 reg = <0xF9600000 0x1000>;
38 interrupts = <123>;
39
40 qcom,sdcc-clk-rates = <400000 24000000 48000000>;
41 qcom,sdcc-sup-voltages = <3300 3300>;
42 qcom,sdcc-bus-width = <8>;
43 qcom,sdcc-nonremovable;
44 qcom,sdcc-disable_cmd23;
45 };
46
47 qcom,sdcc@F9620000 {
48 cell-index = <3>;
49 compatible = "qcom,msm-sdcc";
50 reg = <0xF9620000 0x1000>;
51 interrupts = <127>;
52
53 qcom,sdcc-clk-rates = <400000 24000000 48000000>;
54 qcom,sdcc-sup-voltages = <3300 3300>;
55 qcom,sdcc-bus-width = <4>;
56 qcom,sdcc-disable_cmd23;
57 };
Sathish Ambley4df614c2011-10-07 16:30:46 -070058};