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review.evervolv.com / android_kernel_htc_msm8960 / 73844ecbaa58885c5e89af7d1b08faaffffa6833 / . / arch / powerpc / boot / dts / mpc8272ads.dts
blob: 286638e8af6e1799839a43446241263312f60459 [file] [log] [blame]
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]1/*
2 * MPC8272 ADS Device Tree Source
3 *
4 * Copyright 2005 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/ {
13 model = "MPC8272ADS";
14 compatible = "MPC8260ADS";
15 #address-cells = <1>;
16 #size-cells = <1>;
17 linux,phandle = <100>;
18
19 cpus {
20 #cpus = <1>;
21 #address-cells = <1>;
22 #size-cells = <0>;
23 linux,phandle = <200>;
24
25 PowerPC,8272@0 {
26 device_type = "cpu";
27 reg = <0>;
28 d-cache-line-size = <20>; // 32 bytes
29 i-cache-line-size = <20>; // 32 bytes
30 d-cache-size = <4000>; // L1, 16K
31 i-cache-size = <4000>; // L1, 16K
32 timebase-frequency = <0>;
33 bus-frequency = <0>;
34 clock-frequency = <0>;
35 32-bit;
36 linux,phandle = <201>;
37 linux,boot-cpu;
38 };
39 };
40
41 interrupt-controller@f8200000 {
42 linux,phandle = <f8200000>;
43 #address-cells = <0>;
44 #interrupt-cells = <2>;
45 interrupt-controller;
46 reg = <f8200000 f8200004>;
47 built-in;
48 device_type = "pci-pic";
49 };
50 memory {
51 device_type = "memory";
52 linux,phandle = <300>;
53 reg = <00000000 4000000 f4500000 00000020>;
54 };
55
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame^]56 chosen {
57 name = "chosen";
58 linux,platform = <0>;
59 interrupt-controller = <10c00>;
60 linux,phandle = <400>;
61 };
62
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]63 soc8272@f0000000 {
64 #address-cells = <1>;
65 #size-cells = <1>;
66 #interrupt-cells = <2>;
67 device_type = "soc";
68 ranges = < 0 0 2 00000000 f0000000 00053000>;
69 reg = <f0000000 0>;
70
71 mdio@0 {
72 device_type = "mdio";
73 compatible = "fs_enet";
74 reg = <0 0>;
75 linux,phandle = <24520>;
76 #address-cells = <1>;
77 #size-cells = <0>;
78 ethernet-phy@0 {
79 linux,phandle = <2452000>;
80 interrupt-parent = <10c00>;
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame^]81 interrupts = <17 4>;
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]82 reg = <0>;
83 bitbang = [ 12 12 13 02 02 01 ];
84 device_type = "ethernet-phy";
85 };
86 ethernet-phy@1 {
87 linux,phandle = <2452001>;
88 interrupt-parent = <10c00>;
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame^]89 interrupts = <17 4>;
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]90 bitbang = [ 12 12 13 02 02 01 ];
91 reg = <3>;
92 device_type = "ethernet-phy";
93 };
94 };
95
96 ethernet@24000 {
97 #address-cells = <1>;
98 #size-cells = <0>;
99 device_type = "network";
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame^]100 device-id = <1>;
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]101 compatible = "fs_enet";
102 model = "FCC";
103 reg = <11300 20 8400 100 11380 30>;
104 mac-address = [ 00 11 2F 99 43 54 ];
105 interrupts = <20 2>;
106 interrupt-parent = <10c00>;
107 phy-handle = <2452000>;
108 rx-clock = <13>;
109 tx-clock = <12>;
110 };
111
112 ethernet@25000 {
113 device_type = "network";
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame^]114 device-id = <2>;
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]115 compatible = "fs_enet";
116 model = "FCC";
117 reg = <11320 20 8500 100 113b0 30>;
118 mac-address = [ 00 11 2F 99 44 54 ];
119 interrupts = <21 2>;
120 interrupt-parent = <10c00>;
121 phy-handle = <2452001>;
122 rx-clock = <17>;
123 tx-clock = <18>;
124 };
125
126 cpm@f0000000 {
127 linux,phandle = <f0000000>;
128 #address-cells = <1>;
129 #size-cells = <1>;
130 #interrupt-cells = <2>;
131 device_type = "cpm";
132 model = "CPM2";
133 ranges = <00000000 00000000 3ffff>;
134 reg = <10d80 3280>;
135 command-proc = <119c0>;
136 brg-frequency = <17D7840>;
137 cpm_clk = <BEBC200>;
138
139 scc@11a00 {
140 device_type = "serial";
141 compatible = "cpm_uart";
142 model = "SCC";
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame^]143 device-id = <1>;
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]144 reg = <11a00 20 8000 100>;
145 current-speed = <1c200>;
146 interrupts = <28 2>;
147 interrupt-parent = <10c00>;
148 clock-setup = <0 00ffffff>;
149 rx-clock = <1>;
150 tx-clock = <1>;
151 };
152
153 scc@11a60 {
154 device_type = "serial";
155 compatible = "cpm_uart";
156 model = "SCC";
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame^]157 device-id = <4>;
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]158 reg = <11a60 20 8300 100>;
159 current-speed = <1c200>;
160 interrupts = <2b 2>;
161 interrupt-parent = <10c00>;
162 clock-setup = <1b ffffff00>;
163 rx-clock = <4>;
164 tx-clock = <4>;
165 };
166
167 };
168 interrupt-controller@10c00 {
169 linux,phandle = <10c00>;
170 #address-cells = <0>;
171 #interrupt-cells = <2>;
172 interrupt-controller;
173 reg = <10c00 80>;
174 built-in;
175 device_type = "cpm-pic";
176 compatible = "CPM2";
177 };
178 pci@0500 {
179 linux,phandle = <0500>;
180 #interrupt-cells = <1>;
181 #size-cells = <2>;
182 #address-cells = <3>;
183 compatible = "8272";
184 device_type = "pci";
185 reg = <10430 4dc>;
186 clock-frequency = <3f940aa>;
187 interrupt-map-mask = <f800 0 0 7>;
188 interrupt-map = <
189
190 /* IDSEL 0x16 */
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame^]191 b000 0 0 1 f8200000 40 8
192 b000 0 0 2 f8200000 41 8
193 b000 0 0 3 f8200000 42 8
194 b000 0 0 4 f8200000 43 8
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]195
196 /* IDSEL 0x17 */
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame^]197 b800 0 0 1 f8200000 43 8
198 b800 0 0 2 f8200000 40 8
199 b800 0 0 3 f8200000 41 8
200 b800 0 0 4 f8200000 42 8
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]201
202 /* IDSEL 0x18 */
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame^]203 c000 0 0 1 f8200000 42 8
204 c000 0 0 2 f8200000 43 8
205 c000 0 0 3 f8200000 40 8
206 c000 0 0 4 f8200000 41 8>;
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]207 interrupt-parent = <10c00>;
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame^]208 interrupts = <14 8>;
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]209 bus-range = <0 0>;
210 ranges = <02000000 0 80000000 80000000 0 40000000
211 01000000 0 00000000 f6000000 0 02000000>;
212 };
213
214/* May need to remove if on a part without crypto engine */
215 crypto@30000 {
216 device_type = "crypto";
217 model = "SEC2";
218 compatible = "talitos";
219 reg = <30000 10000>;
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame^]220 interrupts = <b 2>;
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]221 interrupt-parent = <10c00>;
222 num-channels = <4>;
223 channel-fifo-len = <18>;
224 exec-units-mask = <0000007e>;
225/* desc mask is for rev1.x, we need runtime fixup for >=2.x */
226 descriptor-types-mask = <01010ebf>;
227 };
228
229 };
230};