blob: da450fc4c27459b26cdefaaf1630f333186436eb [file] [log] [blame]
Kiran Kumar H Ndd128472011-12-01 09:35:34 -08001/* Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070013#ifndef __LINUX_MSM_CAMERA_H
14#define __LINUX_MSM_CAMERA_H
15
16#ifdef MSM_CAMERA_BIONIC
17#include <sys/types.h>
18#endif
19#include <linux/types.h>
20#include <linux/ioctl.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070021#ifdef __KERNEL__
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070022#include <linux/cdev.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070023#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070024#ifdef MSM_CAMERA_GCC
25#include <time.h>
26#else
27#include <linux/time.h>
28#endif
29
Ankit Premrajka3e90b9f2011-11-01 18:48:45 -070030#include <linux/ion.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070031
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070032#define MSM_CAM_IOCTL_MAGIC 'm'
33
34#define MSM_CAM_IOCTL_GET_SENSOR_INFO \
35 _IOR(MSM_CAM_IOCTL_MAGIC, 1, struct msm_camsensor_info *)
36
37#define MSM_CAM_IOCTL_REGISTER_PMEM \
38 _IOW(MSM_CAM_IOCTL_MAGIC, 2, struct msm_pmem_info *)
39
40#define MSM_CAM_IOCTL_UNREGISTER_PMEM \
41 _IOW(MSM_CAM_IOCTL_MAGIC, 3, unsigned)
42
43#define MSM_CAM_IOCTL_CTRL_COMMAND \
44 _IOW(MSM_CAM_IOCTL_MAGIC, 4, struct msm_ctrl_cmd *)
45
46#define MSM_CAM_IOCTL_CONFIG_VFE \
47 _IOW(MSM_CAM_IOCTL_MAGIC, 5, struct msm_camera_vfe_cfg_cmd *)
48
49#define MSM_CAM_IOCTL_GET_STATS \
50 _IOR(MSM_CAM_IOCTL_MAGIC, 6, struct msm_camera_stats_event_ctrl *)
51
52#define MSM_CAM_IOCTL_GETFRAME \
53 _IOR(MSM_CAM_IOCTL_MAGIC, 7, struct msm_camera_get_frame *)
54
55#define MSM_CAM_IOCTL_ENABLE_VFE \
56 _IOW(MSM_CAM_IOCTL_MAGIC, 8, struct camera_enable_cmd *)
57
58#define MSM_CAM_IOCTL_CTRL_CMD_DONE \
59 _IOW(MSM_CAM_IOCTL_MAGIC, 9, struct camera_cmd *)
60
61#define MSM_CAM_IOCTL_CONFIG_CMD \
62 _IOW(MSM_CAM_IOCTL_MAGIC, 10, struct camera_cmd *)
63
64#define MSM_CAM_IOCTL_DISABLE_VFE \
65 _IOW(MSM_CAM_IOCTL_MAGIC, 11, struct camera_enable_cmd *)
66
67#define MSM_CAM_IOCTL_PAD_REG_RESET2 \
68 _IOW(MSM_CAM_IOCTL_MAGIC, 12, struct camera_enable_cmd *)
69
70#define MSM_CAM_IOCTL_VFE_APPS_RESET \
71 _IOW(MSM_CAM_IOCTL_MAGIC, 13, struct camera_enable_cmd *)
72
73#define MSM_CAM_IOCTL_RELEASE_FRAME_BUFFER \
74 _IOW(MSM_CAM_IOCTL_MAGIC, 14, struct camera_enable_cmd *)
75
76#define MSM_CAM_IOCTL_RELEASE_STATS_BUFFER \
77 _IOW(MSM_CAM_IOCTL_MAGIC, 15, struct msm_stats_buf *)
78
79#define MSM_CAM_IOCTL_AXI_CONFIG \
80 _IOW(MSM_CAM_IOCTL_MAGIC, 16, struct msm_camera_vfe_cfg_cmd *)
81
82#define MSM_CAM_IOCTL_GET_PICTURE \
83 _IOW(MSM_CAM_IOCTL_MAGIC, 17, struct msm_frame *)
84
85#define MSM_CAM_IOCTL_SET_CROP \
86 _IOW(MSM_CAM_IOCTL_MAGIC, 18, struct crop_info *)
87
88#define MSM_CAM_IOCTL_PICT_PP \
89 _IOW(MSM_CAM_IOCTL_MAGIC, 19, uint8_t *)
90
91#define MSM_CAM_IOCTL_PICT_PP_DONE \
92 _IOW(MSM_CAM_IOCTL_MAGIC, 20, struct msm_snapshot_pp_status *)
93
94#define MSM_CAM_IOCTL_SENSOR_IO_CFG \
95 _IOW(MSM_CAM_IOCTL_MAGIC, 21, struct sensor_cfg_data *)
96
97#define MSM_CAM_IOCTL_FLASH_LED_CFG \
98 _IOW(MSM_CAM_IOCTL_MAGIC, 22, unsigned *)
99
100#define MSM_CAM_IOCTL_UNBLOCK_POLL_FRAME \
101 _IO(MSM_CAM_IOCTL_MAGIC, 23)
102
103#define MSM_CAM_IOCTL_CTRL_COMMAND_2 \
104 _IOW(MSM_CAM_IOCTL_MAGIC, 24, struct msm_ctrl_cmd *)
105
106#define MSM_CAM_IOCTL_AF_CTRL \
107 _IOR(MSM_CAM_IOCTL_MAGIC, 25, struct msm_ctrl_cmt_t *)
108
109#define MSM_CAM_IOCTL_AF_CTRL_DONE \
110 _IOW(MSM_CAM_IOCTL_MAGIC, 26, struct msm_ctrl_cmt_t *)
111
112#define MSM_CAM_IOCTL_CONFIG_VPE \
113 _IOW(MSM_CAM_IOCTL_MAGIC, 27, struct msm_camera_vpe_cfg_cmd *)
114
115#define MSM_CAM_IOCTL_AXI_VPE_CONFIG \
116 _IOW(MSM_CAM_IOCTL_MAGIC, 28, struct msm_camera_vpe_cfg_cmd *)
117
118#define MSM_CAM_IOCTL_STROBE_FLASH_CFG \
119 _IOW(MSM_CAM_IOCTL_MAGIC, 29, uint32_t *)
120
121#define MSM_CAM_IOCTL_STROBE_FLASH_CHARGE \
122 _IOW(MSM_CAM_IOCTL_MAGIC, 30, uint32_t *)
123
124#define MSM_CAM_IOCTL_STROBE_FLASH_RELEASE \
125 _IO(MSM_CAM_IOCTL_MAGIC, 31)
126
127#define MSM_CAM_IOCTL_FLASH_CTRL \
128 _IOW(MSM_CAM_IOCTL_MAGIC, 32, struct flash_ctrl_data *)
129
130#define MSM_CAM_IOCTL_ERROR_CONFIG \
131 _IOW(MSM_CAM_IOCTL_MAGIC, 33, uint32_t *)
132
133#define MSM_CAM_IOCTL_ABORT_CAPTURE \
134 _IO(MSM_CAM_IOCTL_MAGIC, 34)
135
136#define MSM_CAM_IOCTL_SET_FD_ROI \
137 _IOW(MSM_CAM_IOCTL_MAGIC, 35, struct fd_roi_info *)
138
139#define MSM_CAM_IOCTL_GET_CAMERA_INFO \
140 _IOR(MSM_CAM_IOCTL_MAGIC, 36, struct msm_camera_info *)
141
142#define MSM_CAM_IOCTL_UNBLOCK_POLL_PIC_FRAME \
143 _IO(MSM_CAM_IOCTL_MAGIC, 37)
144
145#define MSM_CAM_IOCTL_RELEASE_PIC_BUFFER \
146 _IOW(MSM_CAM_IOCTL_MAGIC, 38, struct camera_enable_cmd *)
147
148#define MSM_CAM_IOCTL_PUT_ST_FRAME \
149 _IOW(MSM_CAM_IOCTL_MAGIC, 39, struct msm_camera_st_frame *)
150
Mansoor Aftab5d418372011-07-26 17:01:26 -0700151#define MSM_CAM_IOCTL_V4L2_EVT_NOTIFY \
Kevin Chan94b4c832012-03-02 21:27:16 -0800152 _IOR(MSM_CAM_IOCTL_MAGIC, 40, struct v4l2_event *)
Mansoor Aftab5d418372011-07-26 17:01:26 -0700153
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700154#define MSM_CAM_IOCTL_SET_MEM_MAP_INFO \
Kevin Chan94b4c832012-03-02 21:27:16 -0800155 _IOR(MSM_CAM_IOCTL_MAGIC, 41, struct msm_mem_map_info *)
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700156
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -0700157#define MSM_CAM_IOCTL_ACTUATOR_IO_CFG \
Kevin Chan94b4c832012-03-02 21:27:16 -0800158 _IOW(MSM_CAM_IOCTL_MAGIC, 42, struct msm_actuator_cfg_data *)
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -0700159
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700160#define MSM_CAM_IOCTL_MCTL_POST_PROC \
Kevin Chan94b4c832012-03-02 21:27:16 -0800161 _IOW(MSM_CAM_IOCTL_MAGIC, 43, struct msm_mctl_post_proc_cmd *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700162
163#define MSM_CAM_IOCTL_RESERVE_FREE_FRAME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800164 _IOW(MSM_CAM_IOCTL_MAGIC, 44, struct msm_cam_evt_divert_frame *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700165
166#define MSM_CAM_IOCTL_RELEASE_FREE_FRAME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800167 _IOR(MSM_CAM_IOCTL_MAGIC, 45, struct msm_cam_evt_divert_frame *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700168
Mingcheng Zhu8feaa3f2011-11-23 11:33:52 -0800169#define MSM_CAM_IOCTL_PICT_PP_DIVERT_DONE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800170 _IOR(MSM_CAM_IOCTL_MAGIC, 46, struct msm_pp_frame *)
Mingcheng Zhu8feaa3f2011-11-23 11:33:52 -0800171
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800172#define MSM_CAM_IOCTL_SENSOR_V4l2_S_CTRL \
Kevin Chan94b4c832012-03-02 21:27:16 -0800173 _IOR(MSM_CAM_IOCTL_MAGIC, 47, struct v4l2_control)
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800174
175#define MSM_CAM_IOCTL_SENSOR_V4l2_QUERY_CTRL \
Kevin Chan94b4c832012-03-02 21:27:16 -0800176 _IOR(MSM_CAM_IOCTL_MAGIC, 48, struct v4l2_queryctrl)
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800177
Guruprasad Gaonkar4c7758f2011-12-16 17:30:00 -0800178#define MSM_CAM_IOCTL_GET_KERNEL_SYSTEM_TIME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800179 _IOW(MSM_CAM_IOCTL_MAGIC, 49, struct timeval *)
Guruprasad Gaonkar4c7758f2011-12-16 17:30:00 -0800180
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800181#define MSM_CAM_IOCTL_SET_VFE_OUTPUT_TYPE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800182 _IOW(MSM_CAM_IOCTL_MAGIC, 50, uint32_t *)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800183
184#define MSM_CAM_IOCTL_MCTL_DIVERT_DONE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800185 _IOR(MSM_CAM_IOCTL_MAGIC, 51, struct msm_cam_evt_divert_frame *)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800186
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800187#define MSM_CAM_IOCTL_GET_ACTUATOR_INFO \
Kevin Chan94b4c832012-03-02 21:27:16 -0800188 _IOW(MSM_CAM_IOCTL_MAGIC, 52, struct msm_actuator_cfg_data *)
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800189
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700190#define MSM_CAM_IOCTL_EEPROM_IO_CFG \
191 _IOW(MSM_CAM_IOCTL_MAGIC, 53, struct msm_eeprom_cfg_data *)
192
Nishant Panditb2157c92012-04-25 01:09:28 +0530193#define MSM_CAM_IOCTL_ISPIF_IO_CFG \
194 _IOR(MSM_CAM_IOCTL_MAGIC, 54, struct ispif_cfg_data *)
195
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700196struct msm_mctl_pp_cmd {
197 int32_t id;
198 uint16_t length;
199 void *value;
200};
201
202struct msm_mctl_post_proc_cmd {
203 int32_t type;
204 struct msm_mctl_pp_cmd cmd;
205};
206
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700207#define MSM_CAMERA_LED_OFF 0
208#define MSM_CAMERA_LED_LOW 1
209#define MSM_CAMERA_LED_HIGH 2
Nishant Pandit474f2252011-07-23 23:17:56 +0530210#define MSM_CAMERA_LED_INIT 3
211#define MSM_CAMERA_LED_RELEASE 4
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700212
213#define MSM_CAMERA_STROBE_FLASH_NONE 0
214#define MSM_CAMERA_STROBE_FLASH_XENON 1
215
216#define MSM_MAX_CAMERA_SENSORS 5
217#define MAX_SENSOR_NAME 32
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800218#define MAX_CAM_NAME_SIZE 32
219#define MAX_ACT_MOD_NAME_SIZE 32
220#define MAX_ACT_NAME_SIZE 32
221#define NUM_ACTUATOR_DIR 2
222#define MAX_ACTUATOR_SCENARIO 8
223#define MAX_ACTUATOR_REGION 5
224#define MAX_ACTUATOR_INIT_SET 12
225#define MAX_ACTUATOR_TYPE_SIZE 32
226#define MAX_ACTUATOR_REG_TBL_SIZE 8
227
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700228
229#define MSM_MAX_CAMERA_CONFIGS 2
230
231#define PP_SNAP 0x01
232#define PP_RAW_SNAP ((0x01)<<1)
233#define PP_PREV ((0x01)<<2)
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800234#define PP_THUMB ((0x01)<<3)
235#define PP_MASK (PP_SNAP|PP_RAW_SNAP|PP_PREV|PP_THUMB)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700236
237#define MSM_CAM_CTRL_CMD_DONE 0
238#define MSM_CAM_SENSOR_VFE_CMD 1
239
Kiran Kumar H Nceea7622011-08-23 14:01:03 -0700240/* Should be same as VIDEO_MAX_PLANES in videodev2.h */
241#define MAX_PLANES 8
242
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700243/*****************************************************
244 * structure
245 *****************************************************/
246
247/* define five type of structures for userspace <==> kernel
248 * space communication:
249 * command 1 - 2 are from userspace ==> kernel
250 * command 3 - 4 are from kernel ==> userspace
251 *
252 * 1. control command: control command(from control thread),
253 * control status (from config thread);
254 */
255struct msm_ctrl_cmd {
256 uint16_t type;
257 uint16_t length;
258 void *value;
259 uint16_t status;
260 uint32_t timeout_ms;
261 int resp_fd; /* FIXME: to be used by the kernel, pass-through for now */
262 int vnode_id; /* video dev id. Can we overload resp_fd? */
Kevin Chan94b4c832012-03-02 21:27:16 -0800263 int queue_idx;
264 uint32_t evt_id;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700265 uint32_t stream_type; /* used to pass value to qcamera server */
Ankit Premrajkaf94bcc62011-08-22 15:23:53 -0700266 int config_ident; /*used as identifier for config node*/
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700267};
268
269struct msm_cam_evt_msg {
270 unsigned short type; /* 1 == event (RPC), 0 == message (adsp) */
271 unsigned short msg_id;
272 unsigned int len; /* size in, number of bytes out */
273 uint32_t frame_id;
274 void *data;
Ninad Mahimkaree55c192012-04-25 14:36:17 -0700275 struct timespec timestamp;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700276};
277
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700278struct msm_pp_frame_sp {
279 /* phy addr of the buffer */
280 unsigned long phy_addr;
281 uint32_t y_off;
282 uint32_t cbcr_off;
283 /* buffer length */
284 uint32_t length;
285 int32_t fd;
286 uint32_t addr_offset;
287 /* mapped addr */
288 unsigned long vaddr;
289};
290
291struct msm_pp_frame_mp {
292 /* phy addr of the plane */
293 unsigned long phy_addr;
294 /* offset of plane data */
295 uint32_t data_offset;
296 /* plane length */
297 uint32_t length;
298 int32_t fd;
299 uint32_t addr_offset;
300 /* mapped addr */
301 unsigned long vaddr;
302};
303
304struct msm_pp_frame {
305 uint32_t handle; /* stores vb cookie */
306 uint32_t frame_id;
Kevin Chan318d7cb2011-11-29 14:24:26 -0800307 unsigned short buf_idx;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700308 int path;
309 unsigned short image_type;
310 unsigned short num_planes; /* 1 for sp */
311 struct timeval timestamp;
312 union {
313 struct msm_pp_frame_sp sp;
314 struct msm_pp_frame_mp mp[MAX_PLANES];
315 };
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800316 int node_type;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700317};
318
Mingcheng Zhu49505502011-07-19 20:44:36 -0700319struct msm_cam_evt_divert_frame {
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700320 unsigned short image_mode;
321 unsigned short op_mode;
Mingcheng Zhu49505502011-07-19 20:44:36 -0700322 unsigned short inst_idx;
323 unsigned short node_idx;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700324 struct msm_pp_frame frame;
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700325 int do_pp;
Mingcheng Zhu49505502011-07-19 20:44:36 -0700326};
327
Kiran Kumar H N0b517802011-10-05 09:49:51 -0700328struct msm_mctl_pp_cmd_ack_event {
329 uint32_t cmd; /* VPE_CMD_ZOOM? */
330 int status; /* 0 done, < 0 err */
331 uint32_t cookie; /* daemon's cookie */
332};
333
334struct msm_mctl_pp_event_info {
335 int32_t event;
336 union {
337 struct msm_mctl_pp_cmd_ack_event ack;
338 };
339};
340
341struct msm_isp_event_ctrl {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700342 unsigned short resptype;
343 union {
344 struct msm_cam_evt_msg isp_msg;
345 struct msm_ctrl_cmd ctrl;
Kiran Kumar H N0b517802011-10-05 09:49:51 -0700346 struct msm_cam_evt_divert_frame div_frame;
347 struct msm_mctl_pp_event_info pp_event_info;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700348 } isp_data;
349};
350
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700351#define MSM_CAM_RESP_CTRL 0
352#define MSM_CAM_RESP_STAT_EVT_MSG 1
353#define MSM_CAM_RESP_STEREO_OP_1 2
354#define MSM_CAM_RESP_STEREO_OP_2 3
355#define MSM_CAM_RESP_V4L2 4
Mingcheng Zhu49505502011-07-19 20:44:36 -0700356#define MSM_CAM_RESP_DIV_FRAME_EVT_MSG 5
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700357#define MSM_CAM_RESP_DONE_EVENT 6
358#define MSM_CAM_RESP_MCTL_PP_EVENT 7
359#define MSM_CAM_RESP_MAX 8
Mingcheng Zhu49505502011-07-19 20:44:36 -0700360
Mingcheng Zhu270813a2011-08-10 17:23:18 -0700361#define MSM_CAM_APP_NOTIFY_EVENT 0
Kevin Chan4bb6ead2012-02-29 01:01:41 -0800362#define MSM_CAM_APP_NOTIFY_ERROR_EVENT 1
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700363
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700364/* this one is used to send ctrl/status up to config thread */
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700365
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700366struct msm_stats_event_ctrl {
367 /* 0 - ctrl_cmd from control thread,
368 * 1 - stats/event kernel,
369 * 2 - V4L control or read request */
370 int resptype;
371 int timeout_ms;
372 struct msm_ctrl_cmd ctrl_cmd;
373 /* struct vfe_event_t stats_event; */
374 struct msm_cam_evt_msg stats_event;
375};
376
377/* 2. config command: config command(from config thread); */
378struct msm_camera_cfg_cmd {
379 /* what to config:
380 * 1 - sensor config, 2 - vfe config */
381 uint16_t cfg_type;
382
383 /* sensor config type */
384 uint16_t cmd_type;
385 uint16_t queue;
386 uint16_t length;
387 void *value;
388};
389
390#define CMD_GENERAL 0
391#define CMD_AXI_CFG_OUT1 1
392#define CMD_AXI_CFG_SNAP_O1_AND_O2 2
393#define CMD_AXI_CFG_OUT2 3
394#define CMD_PICT_T_AXI_CFG 4
395#define CMD_PICT_M_AXI_CFG 5
396#define CMD_RAW_PICT_AXI_CFG 6
397
398#define CMD_FRAME_BUF_RELEASE 7
399#define CMD_PREV_BUF_CFG 8
400#define CMD_SNAP_BUF_RELEASE 9
401#define CMD_SNAP_BUF_CFG 10
402#define CMD_STATS_DISABLE 11
403#define CMD_STATS_AEC_AWB_ENABLE 12
404#define CMD_STATS_AF_ENABLE 13
405#define CMD_STATS_AEC_ENABLE 14
406#define CMD_STATS_AWB_ENABLE 15
407#define CMD_STATS_ENABLE 16
408
409#define CMD_STATS_AXI_CFG 17
410#define CMD_STATS_AEC_AXI_CFG 18
411#define CMD_STATS_AF_AXI_CFG 19
412#define CMD_STATS_AWB_AXI_CFG 20
413#define CMD_STATS_RS_AXI_CFG 21
414#define CMD_STATS_CS_AXI_CFG 22
415#define CMD_STATS_IHIST_AXI_CFG 23
416#define CMD_STATS_SKIN_AXI_CFG 24
417
418#define CMD_STATS_BUF_RELEASE 25
419#define CMD_STATS_AEC_BUF_RELEASE 26
420#define CMD_STATS_AF_BUF_RELEASE 27
421#define CMD_STATS_AWB_BUF_RELEASE 28
422#define CMD_STATS_RS_BUF_RELEASE 29
423#define CMD_STATS_CS_BUF_RELEASE 30
424#define CMD_STATS_IHIST_BUF_RELEASE 31
425#define CMD_STATS_SKIN_BUF_RELEASE 32
426
427#define UPDATE_STATS_INVALID 33
428#define CMD_AXI_CFG_SNAP_GEMINI 34
429#define CMD_AXI_CFG_SNAP 35
430#define CMD_AXI_CFG_PREVIEW 36
431#define CMD_AXI_CFG_VIDEO 37
432
433#define CMD_STATS_IHIST_ENABLE 38
434#define CMD_STATS_RS_ENABLE 39
435#define CMD_STATS_CS_ENABLE 40
436#define CMD_VPE 41
437#define CMD_AXI_CFG_VPE 42
438#define CMD_AXI_CFG_ZSL 43
439#define CMD_AXI_CFG_SNAP_VPE 44
440#define CMD_AXI_CFG_SNAP_THUMB_VPE 45
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530441#define CMD_CONFIG_PING_ADDR 46
442#define CMD_CONFIG_PONG_ADDR 47
443#define CMD_CONFIG_FREE_BUF_ADDR 48
444#define CMD_AXI_CFG_ZSL_ALL_CHNLS 49
445#define CMD_AXI_CFG_VIDEO_ALL_CHNLS 50
Suresh Vankadara055cb8e2012-01-18 00:50:04 +0530446#define CMD_VFE_BUFFER_RELEASE 51
Kevin Chancf264862012-04-19 19:10:38 -0700447#define CMD_VFE_PROCESS_IRQ 52
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700448
Nishant Pandit28feb3d2012-04-26 23:56:22 +0530449#define CMD_AXI_CFG_PRIM 0xc1
450#define CMD_AXI_CFG_PRIM_ALL_CHNLS 0xc2
451#define CMD_AXI_CFG_SEC 0xc4
452#define CMD_AXI_CFG_SEC_ALL_CHNLS 0xc8
453#define CMD_AXI_CFG_TERT1 0xd0
454
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800455
Azam Sadiq Pasha Kapatrala Syed7c815182012-05-31 19:28:09 -0700456#define CMD_AXI_START 0xE1
457#define CMD_AXI_STOP 0xE2
458
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700459/* vfe config command: config command(from config thread)*/
460struct msm_vfe_cfg_cmd {
461 int cmd_type;
462 uint16_t length;
463 void *value;
464};
465
466struct msm_vpe_cfg_cmd {
467 int cmd_type;
468 uint16_t length;
469 void *value;
470};
471
472#define MAX_CAMERA_ENABLE_NAME_LEN 32
473struct camera_enable_cmd {
474 char name[MAX_CAMERA_ENABLE_NAME_LEN];
475};
476
477#define MSM_PMEM_OUTPUT1 0
478#define MSM_PMEM_OUTPUT2 1
479#define MSM_PMEM_OUTPUT1_OUTPUT2 2
480#define MSM_PMEM_THUMBNAIL 3
481#define MSM_PMEM_MAINIMG 4
482#define MSM_PMEM_RAW_MAINIMG 5
483#define MSM_PMEM_AEC_AWB 6
484#define MSM_PMEM_AF 7
485#define MSM_PMEM_AEC 8
486#define MSM_PMEM_AWB 9
487#define MSM_PMEM_RS 10
488#define MSM_PMEM_CS 11
489#define MSM_PMEM_IHIST 12
490#define MSM_PMEM_SKIN 13
491#define MSM_PMEM_VIDEO 14
492#define MSM_PMEM_PREVIEW 15
493#define MSM_PMEM_VIDEO_VPE 16
494#define MSM_PMEM_C2D 17
495#define MSM_PMEM_MAINIMG_VPE 18
496#define MSM_PMEM_THUMBNAIL_VPE 19
497#define MSM_PMEM_MAX 20
498
499#define STAT_AEAW 0
500#define STAT_AEC 1
501#define STAT_AF 2
502#define STAT_AWB 3
503#define STAT_RS 4
504#define STAT_CS 5
505#define STAT_IHIST 6
506#define STAT_SKIN 7
507#define STAT_MAX 8
508
509#define FRAME_PREVIEW_OUTPUT1 0
510#define FRAME_PREVIEW_OUTPUT2 1
511#define FRAME_SNAPSHOT 2
512#define FRAME_THUMBNAIL 3
513#define FRAME_RAW_SNAPSHOT 4
514#define FRAME_MAX 5
515
516struct msm_pmem_info {
517 int type;
518 int fd;
519 void *vaddr;
520 uint32_t offset;
521 uint32_t len;
Kiran Kumar H N5a19c682011-07-23 11:34:34 -0700522 uint32_t y_off;
523 uint32_t cbcr_off;
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530524 uint32_t planar0_off;
525 uint32_t planar1_off;
526 uint32_t planar2_off;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700527 uint8_t active;
528};
529
530struct outputCfg {
531 uint32_t height;
532 uint32_t width;
533
534 uint32_t window_height_firstline;
535 uint32_t window_height_lastline;
536};
537
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800538#define VIDEO_NODE 0
539#define MCTL_NODE 1
540
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700541#define OUTPUT_1 0
542#define OUTPUT_2 1
543#define OUTPUT_1_AND_2 2 /* snapshot only */
544#define OUTPUT_1_AND_3 3 /* video */
545#define CAMIF_TO_AXI_VIA_OUTPUT_2 4
546#define OUTPUT_1_AND_CAMIF_TO_AXI_VIA_OUTPUT_2 5
547#define OUTPUT_2_AND_CAMIF_TO_AXI_VIA_OUTPUT_1 6
548#define OUTPUT_1_2_AND_3 7
Kiran Kumar H N4cff94a2011-10-17 11:37:33 -0700549#define OUTPUT_ALL_CHNLS 8
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530550#define OUTPUT_VIDEO_ALL_CHNLS 9
551#define OUTPUT_ZSL_ALL_CHNLS 10
552#define LAST_AXI_OUTPUT_MODE_ENUM = OUTPUT_ZSL_ALL_CHNLS
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700553
Nishant Pandit28feb3d2012-04-26 23:56:22 +0530554#define OUTPUT_PRIM 0xC1
555#define OUTPUT_PRIM_ALL_CHNLS 0xC2
556#define OUTPUT_SEC 0xC4
557#define OUTPUT_SEC_ALL_CHNLS 0xC8
558#define OUTPUT_TERT1 0xD0
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800559
560
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700561#define MSM_FRAME_PREV_1 0
562#define MSM_FRAME_PREV_2 1
563#define MSM_FRAME_ENC 2
564
565#define OUTPUT_TYPE_P (1<<0)
566#define OUTPUT_TYPE_T (1<<1)
567#define OUTPUT_TYPE_S (1<<2)
568#define OUTPUT_TYPE_V (1<<3)
569#define OUTPUT_TYPE_L (1<<4)
570#define OUTPUT_TYPE_ST_L (1<<5)
571#define OUTPUT_TYPE_ST_R (1<<6)
572#define OUTPUT_TYPE_ST_D (1<<7)
573
574struct fd_roi_info {
575 void *info;
576 int info_len;
577};
578
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700579struct msm_mem_map_info {
580 uint32_t cookie;
581 uint32_t length;
Mingcheng Zhufe7abc02011-08-09 13:27:39 -0700582 uint32_t mem_type;
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700583};
584
Mingcheng Zhu49505502011-07-19 20:44:36 -0700585#define MSM_MEM_MMAP 0
586#define MSM_MEM_USERPTR 1
587#define MSM_PLANE_MAX 8
588#define MSM_PLANE_Y 0
589#define MSM_PLANE_UV 1
590
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700591struct msm_frame {
592 struct timespec ts;
593 int path;
594 int type;
595 unsigned long buffer;
596 uint32_t phy_offset;
Kiran Kumar H N5a19c682011-07-23 11:34:34 -0700597 uint32_t y_off;
598 uint32_t cbcr_off;
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530599 uint32_t planar0_off;
600 uint32_t planar1_off;
601 uint32_t planar2_off;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700602 int fd;
603
604 void *cropinfo;
605 int croplen;
606 uint32_t error_code;
607 struct fd_roi_info roi_info;
608 uint32_t frame_id;
609 int stcam_quality_ind;
610 uint32_t stcam_conv_value;
Ankit Premrajka3e90b9f2011-11-01 18:48:45 -0700611
612 struct ion_allocation_data ion_alloc;
613 struct ion_fd_data fd_data;
Ankit Premrajkae2c9c0b2012-06-07 17:18:25 -0700614 int ion_dev_fd;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700615};
616
617enum msm_st_frame_packing {
618 SIDE_BY_SIDE_HALF,
619 SIDE_BY_SIDE_FULL,
620 TOP_DOWN_HALF,
621 TOP_DOWN_FULL,
622};
623
624struct msm_st_crop {
625 uint32_t in_w;
626 uint32_t in_h;
627 uint32_t out_w;
628 uint32_t out_h;
629};
630
631struct msm_st_half {
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530632 uint32_t buf_p0_off;
633 uint32_t buf_p1_off;
634 uint32_t buf_p0_stride;
635 uint32_t buf_p1_stride;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700636 uint32_t pix_x_off;
637 uint32_t pix_y_off;
638 struct msm_st_crop stCropInfo;
639};
640
641struct msm_st_frame {
642 struct msm_frame buf_info;
643 int type;
644 enum msm_st_frame_packing packing;
645 struct msm_st_half L;
646 struct msm_st_half R;
647 int frame_id;
648};
649
650#define MSM_CAMERA_ERR_MASK (0xFFFFFFFF & 1)
651
652struct stats_buff {
653 unsigned long buff;
654 int fd;
655};
656
657struct msm_stats_buf {
Lakshmi Narayana Kalavala4ab97a92011-07-26 15:30:14 -0700658 uint8_t awb_ymin;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700659 struct stats_buff aec;
660 struct stats_buff awb;
661 struct stats_buff af;
662 struct stats_buff ihist;
663 struct stats_buff rs;
664 struct stats_buff cs;
665 struct stats_buff skin;
666 int type;
667 uint32_t status_bits;
668 unsigned long buffer;
669 int fd;
Ankit Premrajka073e0ca2012-03-06 12:26:08 -0800670 int length;
671 struct ion_handle *handle;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700672 uint32_t frame_id;
673};
674#define MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT 0
675/* video capture mode in VIDIOC_S_PARM */
676#define MSM_V4L2_EXT_CAPTURE_MODE_PREVIEW \
677 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+1)
678/* extendedmode for video recording in VIDIOC_S_PARM */
679#define MSM_V4L2_EXT_CAPTURE_MODE_VIDEO \
680 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+2)
681/* extendedmode for the full size main image in VIDIOC_S_PARM */
682#define MSM_V4L2_EXT_CAPTURE_MODE_MAIN (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+3)
683/* extendedmode for the thumb nail image in VIDIOC_S_PARM */
684#define MSM_V4L2_EXT_CAPTURE_MODE_THUMBNAIL \
685 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+4)
686#define MSM_V4L2_EXT_CAPTURE_MODE_RAW \
687 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+5)
688#define MSM_V4L2_EXT_CAPTURE_MODE_MAX (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+6)
689
690
691#define MSM_V4L2_PID_MOTION_ISO V4L2_CID_PRIVATE_BASE
692#define MSM_V4L2_PID_EFFECT (V4L2_CID_PRIVATE_BASE+1)
693#define MSM_V4L2_PID_HJR (V4L2_CID_PRIVATE_BASE+2)
694#define MSM_V4L2_PID_LED_MODE (V4L2_CID_PRIVATE_BASE+3)
695#define MSM_V4L2_PID_PREP_SNAPSHOT (V4L2_CID_PRIVATE_BASE+4)
696#define MSM_V4L2_PID_EXP_METERING (V4L2_CID_PRIVATE_BASE+5)
697#define MSM_V4L2_PID_ISO (V4L2_CID_PRIVATE_BASE+6)
698#define MSM_V4L2_PID_CAM_MODE (V4L2_CID_PRIVATE_BASE+7)
699#define MSM_V4L2_PID_LUMA_ADAPTATION (V4L2_CID_PRIVATE_BASE+8)
700#define MSM_V4L2_PID_BEST_SHOT (V4L2_CID_PRIVATE_BASE+9)
701#define MSM_V4L2_PID_FOCUS_MODE (V4L2_CID_PRIVATE_BASE+10)
702#define MSM_V4L2_PID_BL_DETECTION (V4L2_CID_PRIVATE_BASE+11)
703#define MSM_V4L2_PID_SNOW_DETECTION (V4L2_CID_PRIVATE_BASE+12)
704#define MSM_V4L2_PID_CTRL_CMD (V4L2_CID_PRIVATE_BASE+13)
705#define MSM_V4L2_PID_EVT_SUB_INFO (V4L2_CID_PRIVATE_BASE+14)
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700706#define MSM_V4L2_PID_STROBE_FLASH (V4L2_CID_PRIVATE_BASE+15)
707#define MSM_V4L2_PID_MMAP_ENTRY (V4L2_CID_PRIVATE_BASE+16)
708#define MSM_V4L2_PID_MMAP_INST (V4L2_CID_PRIVATE_BASE+17)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800709#define MSM_V4L2_PID_PP_PLANE_INFO (V4L2_CID_PRIVATE_BASE+18)
710#define MSM_V4L2_PID_MAX MSM_V4L2_PID_PP_PLANE_INFO
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700711
712/* camera operation mode for video recording - two frame output queues */
713#define MSM_V4L2_CAM_OP_DEFAULT 0
714/* camera operation mode for video recording - two frame output queues */
715#define MSM_V4L2_CAM_OP_PREVIEW (MSM_V4L2_CAM_OP_DEFAULT+1)
716/* camera operation mode for video recording - two frame output queues */
717#define MSM_V4L2_CAM_OP_VIDEO (MSM_V4L2_CAM_OP_DEFAULT+2)
718/* camera operation mode for standard shapshot - two frame output queues */
719#define MSM_V4L2_CAM_OP_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT+3)
720/* camera operation mode for zsl shapshot - three output queues */
721#define MSM_V4L2_CAM_OP_ZSL (MSM_V4L2_CAM_OP_DEFAULT+4)
722/* camera operation mode for raw snapshot - one frame output queue */
723#define MSM_V4L2_CAM_OP_RAW (MSM_V4L2_CAM_OP_DEFAULT+5)
Jignesh Mehta6cf8a742012-02-04 23:40:50 -0800724/* camera operation mode for jpeg snapshot - one frame output queue */
725#define MSM_V4L2_CAM_OP_JPEG_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT+6)
726
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700727
728#define MSM_V4L2_VID_CAP_TYPE 0
729#define MSM_V4L2_STREAM_ON 1
730#define MSM_V4L2_STREAM_OFF 2
731#define MSM_V4L2_SNAPSHOT 3
732#define MSM_V4L2_QUERY_CTRL 4
733#define MSM_V4L2_GET_CTRL 5
734#define MSM_V4L2_SET_CTRL 6
735#define MSM_V4L2_QUERY 7
736#define MSM_V4L2_GET_CROP 8
737#define MSM_V4L2_SET_CROP 9
738#define MSM_V4L2_OPEN 10
739#define MSM_V4L2_CLOSE 11
740#define MSM_V4L2_SET_CTRL_CMD 12
741#define MSM_V4L2_EVT_SUB_MASK 13
742#define MSM_V4L2_MAX 14
743#define V4L2_CAMERA_EXIT 43
744
745struct crop_info {
746 void *info;
747 int len;
748};
749
750struct msm_postproc {
751 int ftnum;
752 struct msm_frame fthumnail;
753 int fmnum;
754 struct msm_frame fmain;
755};
756
757struct msm_snapshot_pp_status {
758 void *status;
759};
760
761#define CFG_SET_MODE 0
762#define CFG_SET_EFFECT 1
763#define CFG_START 2
764#define CFG_PWR_UP 3
765#define CFG_PWR_DOWN 4
766#define CFG_WRITE_EXPOSURE_GAIN 5
767#define CFG_SET_DEFAULT_FOCUS 6
768#define CFG_MOVE_FOCUS 7
769#define CFG_REGISTER_TO_REAL_GAIN 8
770#define CFG_REAL_TO_REGISTER_GAIN 9
771#define CFG_SET_FPS 10
772#define CFG_SET_PICT_FPS 11
773#define CFG_SET_BRIGHTNESS 12
774#define CFG_SET_CONTRAST 13
775#define CFG_SET_ZOOM 14
776#define CFG_SET_EXPOSURE_MODE 15
777#define CFG_SET_WB 16
778#define CFG_SET_ANTIBANDING 17
779#define CFG_SET_EXP_GAIN 18
780#define CFG_SET_PICT_EXP_GAIN 19
781#define CFG_SET_LENS_SHADING 20
782#define CFG_GET_PICT_FPS 21
783#define CFG_GET_PREV_L_PF 22
784#define CFG_GET_PREV_P_PL 23
785#define CFG_GET_PICT_L_PF 24
786#define CFG_GET_PICT_P_PL 25
787#define CFG_GET_AF_MAX_STEPS 26
788#define CFG_GET_PICT_MAX_EXP_LC 27
789#define CFG_SEND_WB_INFO 28
790#define CFG_SENSOR_INIT 29
791#define CFG_GET_3D_CALI_DATA 30
792#define CFG_GET_CALIB_DATA 31
Kevin Chana980f392011-08-01 20:55:00 -0700793#define CFG_GET_OUTPUT_INFO 32
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700794#define CFG_GET_EEPROM_INFO 33
795#define CFG_GET_EEPROM_DATA 34
796#define CFG_SET_ACTUATOR_INFO 35
797#define CFG_GET_ACTUATOR_INFO 36
Su Liu6c3bb322012-02-14 02:15:05 +0530798/* TBD: QRD */
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700799#define CFG_SET_SATURATION 37
800#define CFG_SET_SHARPNESS 38
801#define CFG_SET_TOUCHAEC 39
802#define CFG_SET_AUTO_FOCUS 40
803#define CFG_SET_AUTOFLASH 41
804#define CFG_SET_EXPOSURE_COMPENSATION 42
805#define CFG_SET_ISO 43
Nishant Panditb2157c92012-04-25 01:09:28 +0530806#define CFG_START_STREAM 44
807#define CFG_STOP_STREAM 45
808#define CFG_GET_CSI_PARAMS 46
809#define CFG_MAX 47
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700810
811
812#define MOVE_NEAR 0
813#define MOVE_FAR 1
814
815#define SENSOR_PREVIEW_MODE 0
816#define SENSOR_SNAPSHOT_MODE 1
817#define SENSOR_RAW_SNAPSHOT_MODE 2
818#define SENSOR_HFR_60FPS_MODE 3
819#define SENSOR_HFR_90FPS_MODE 4
820#define SENSOR_HFR_120FPS_MODE 5
821
822#define SENSOR_QTR_SIZE 0
823#define SENSOR_FULL_SIZE 1
824#define SENSOR_QVGA_SIZE 2
825#define SENSOR_INVALID_SIZE 3
826
827#define CAMERA_EFFECT_OFF 0
828#define CAMERA_EFFECT_MONO 1
829#define CAMERA_EFFECT_NEGATIVE 2
830#define CAMERA_EFFECT_SOLARIZE 3
831#define CAMERA_EFFECT_SEPIA 4
832#define CAMERA_EFFECT_POSTERIZE 5
833#define CAMERA_EFFECT_WHITEBOARD 6
834#define CAMERA_EFFECT_BLACKBOARD 7
835#define CAMERA_EFFECT_AQUA 8
Yonggui Maoc0055a12011-09-29 19:31:47 -0700836#define CAMERA_EFFECT_EMBOSS 9
837#define CAMERA_EFFECT_SKETCH 10
838#define CAMERA_EFFECT_NEON 11
839#define CAMERA_EFFECT_MAX 12
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700840
Taniya Dasa9bdb012011-09-08 11:21:33 +0530841/* QRD */
842#define CAMERA_EFFECT_BW 10
843#define CAMERA_EFFECT_BLUISH 12
844#define CAMERA_EFFECT_REDDISH 13
845#define CAMERA_EFFECT_GREENISH 14
846
847/* QRD */
848#define CAMERA_ANTIBANDING_OFF 0
849#define CAMERA_ANTIBANDING_50HZ 2
850#define CAMERA_ANTIBANDING_60HZ 1
851#define CAMERA_ANTIBANDING_AUTO 3
852
853#define CAMERA_CONTRAST_LV0 0
854#define CAMERA_CONTRAST_LV1 1
855#define CAMERA_CONTRAST_LV2 2
856#define CAMERA_CONTRAST_LV3 3
857#define CAMERA_CONTRAST_LV4 4
858#define CAMERA_CONTRAST_LV5 5
859#define CAMERA_CONTRAST_LV6 6
860#define CAMERA_CONTRAST_LV7 7
861#define CAMERA_CONTRAST_LV8 8
862#define CAMERA_CONTRAST_LV9 9
863
864#define CAMERA_BRIGHTNESS_LV0 0
865#define CAMERA_BRIGHTNESS_LV1 1
866#define CAMERA_BRIGHTNESS_LV2 2
867#define CAMERA_BRIGHTNESS_LV3 3
868#define CAMERA_BRIGHTNESS_LV4 4
869#define CAMERA_BRIGHTNESS_LV5 5
870#define CAMERA_BRIGHTNESS_LV6 6
871#define CAMERA_BRIGHTNESS_LV7 7
872#define CAMERA_BRIGHTNESS_LV8 8
873
874
875#define CAMERA_SATURATION_LV0 0
876#define CAMERA_SATURATION_LV1 1
877#define CAMERA_SATURATION_LV2 2
878#define CAMERA_SATURATION_LV3 3
879#define CAMERA_SATURATION_LV4 4
880#define CAMERA_SATURATION_LV5 5
881#define CAMERA_SATURATION_LV6 6
882#define CAMERA_SATURATION_LV7 7
883#define CAMERA_SATURATION_LV8 8
884
885#define CAMERA_SHARPNESS_LV0 0
886#define CAMERA_SHARPNESS_LV1 3
887#define CAMERA_SHARPNESS_LV2 6
888#define CAMERA_SHARPNESS_LV3 9
889#define CAMERA_SHARPNESS_LV4 12
890#define CAMERA_SHARPNESS_LV5 15
891#define CAMERA_SHARPNESS_LV6 18
892#define CAMERA_SHARPNESS_LV7 21
893#define CAMERA_SHARPNESS_LV8 24
894#define CAMERA_SHARPNESS_LV9 27
895#define CAMERA_SHARPNESS_LV10 30
896
897#define CAMERA_SETAE_AVERAGE 0
898#define CAMERA_SETAE_CENWEIGHT 1
899
Taniya Dasa9bdb012011-09-08 11:21:33 +0530900#define CAMERA_WB_AUTO 1 /* This list must match aeecamera.h */
901#define CAMERA_WB_CUSTOM 2
902#define CAMERA_WB_INCANDESCENT 3
903#define CAMERA_WB_FLUORESCENT 4
904#define CAMERA_WB_DAYLIGHT 5
905#define CAMERA_WB_CLOUDY_DAYLIGHT 6
906#define CAMERA_WB_TWILIGHT 7
907#define CAMERA_WB_SHADE 8
908
909#define CAMERA_EXPOSURE_COMPENSATION_LV0 12
910#define CAMERA_EXPOSURE_COMPENSATION_LV1 6
911#define CAMERA_EXPOSURE_COMPENSATION_LV2 0
912#define CAMERA_EXPOSURE_COMPENSATION_LV3 -6
913#define CAMERA_EXPOSURE_COMPENSATION_LV4 -12
914
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800915enum msm_v4l2_saturation_level {
916 MSM_V4L2_SATURATION_L0,
917 MSM_V4L2_SATURATION_L1,
918 MSM_V4L2_SATURATION_L2,
919 MSM_V4L2_SATURATION_L3,
920 MSM_V4L2_SATURATION_L4,
921 MSM_V4L2_SATURATION_L5,
922 MSM_V4L2_SATURATION_L6,
923 MSM_V4L2_SATURATION_L7,
924 MSM_V4L2_SATURATION_L8,
925 MSM_V4L2_SATURATION_L9,
926 MSM_V4L2_SATURATION_L10,
927};
928
Suresh Vankadara212d9722012-05-30 15:51:20 +0530929enum msm_v4l2_contrast_level {
930 MSM_V4L2_CONTRAST_L0,
931 MSM_V4L2_CONTRAST_L1,
932 MSM_V4L2_CONTRAST_L2,
933 MSM_V4L2_CONTRAST_L3,
934 MSM_V4L2_CONTRAST_L4,
935 MSM_V4L2_CONTRAST_L5,
936 MSM_V4L2_CONTRAST_L6,
937 MSM_V4L2_CONTRAST_L7,
938 MSM_V4L2_CONTRAST_L8,
939 MSM_V4L2_CONTRAST_L9,
940 MSM_V4L2_CONTRAST_L10,
941};
942
943
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800944enum msm_v4l2_exposure_level {
945 MSM_V4L2_EXPOSURE_N2,
946 MSM_V4L2_EXPOSURE_N1,
947 MSM_V4L2_EXPOSURE_D,
948 MSM_V4L2_EXPOSURE_P1,
949 MSM_V4L2_EXPOSURE_P2,
950};
951
952enum msm_v4l2_sharpness_level {
953 MSM_V4L2_SHARPNESS_L0,
954 MSM_V4L2_SHARPNESS_L1,
955 MSM_V4L2_SHARPNESS_L2,
956 MSM_V4L2_SHARPNESS_L3,
957 MSM_V4L2_SHARPNESS_L4,
958 MSM_V4L2_SHARPNESS_L5,
959 MSM_V4L2_SHARPNESS_L6,
960};
961
962enum msm_v4l2_expo_metering_mode {
963 MSM_V4L2_EXP_FRAME_AVERAGE,
964 MSM_V4L2_EXP_CENTER_WEIGHTED,
965 MSM_V4L2_EXP_SPOT_METERING,
966};
967
968enum msm_v4l2_iso_mode {
969 MSM_V4L2_ISO_AUTO = 0,
970 MSM_V4L2_ISO_DEBLUR,
971 MSM_V4L2_ISO_100,
972 MSM_V4L2_ISO_200,
973 MSM_V4L2_ISO_400,
974 MSM_V4L2_ISO_800,
975 MSM_V4L2_ISO_1600,
976};
977
978enum msm_v4l2_wb_mode {
Suresh Vankadara212d9722012-05-30 15:51:20 +0530979 MSM_V4L2_WB_OFF,
980 MSM_V4L2_WB_AUTO ,
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800981 MSM_V4L2_WB_CUSTOM,
982 MSM_V4L2_WB_INCANDESCENT,
983 MSM_V4L2_WB_FLUORESCENT,
984 MSM_V4L2_WB_DAYLIGHT,
985 MSM_V4L2_WB_CLOUDY_DAYLIGHT,
Suresh Vankadara212d9722012-05-30 15:51:20 +0530986};
987
988enum msm_v4l2_special_effect {
989 MSM_V4L2_EFFECT_OFF,
990 MSM_V4L2_EFFECT_MONO,
991 MSM_V4L2_EFFECT_NEGATIVE,
992 MSM_V4L2_EFFECT_SOLARIZE,
993 MSM_V4L2_EFFECT_SEPIA,
994 MSM_V4L2_EFFECT_POSTERAIZE,
995 MSM_V4L2_EFFECT_WHITEBOARD,
996 MSM_V4L2_EFFECT_BLACKBOARD,
997 MSM_V4L2_EFFECT_AQUA,
998 MSM_V4L2_EFFECT_EMBOSS,
999 MSM_V4L2_EFFECT_SKETCH,
1000 MSM_V4L2_EFFECT_NEON,
1001 MSM_V4L2_EFFECT_MAX,
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001002};
1003
1004enum msm_v4l2_power_line_frequency {
1005 MSM_V4L2_POWER_LINE_OFF,
1006 MSM_V4L2_POWER_LINE_60HZ,
1007 MSM_V4L2_POWER_LINE_50HZ,
1008 MSM_V4L2_POWER_LINE_AUTO,
1009};
Taniya Dasa9bdb012011-09-08 11:21:33 +05301010
Su Liu6c3bb322012-02-14 02:15:05 +05301011#define CAMERA_ISO_TYPE_AUTO 0
1012#define CAMEAR_ISO_TYPE_HJR 1
1013#define CAMEAR_ISO_TYPE_100 2
1014#define CAMERA_ISO_TYPE_200 3
1015#define CAMERA_ISO_TYPE_400 4
1016#define CAMEAR_ISO_TYPE_800 5
1017#define CAMERA_ISO_TYPE_1600 6
1018
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001019struct sensor_pict_fps {
1020 uint16_t prevfps;
1021 uint16_t pictfps;
1022};
1023
1024struct exp_gain_cfg {
1025 uint16_t gain;
1026 uint32_t line;
1027};
1028
1029struct focus_cfg {
1030 int32_t steps;
1031 int dir;
1032};
1033
1034struct fps_cfg {
1035 uint16_t f_mult;
1036 uint16_t fps_div;
1037 uint32_t pict_fps_div;
1038};
1039struct wb_info_cfg {
1040 uint16_t red_gain;
1041 uint16_t green_gain;
1042 uint16_t blue_gain;
1043};
1044struct sensor_3d_exp_cfg {
1045 uint16_t gain;
1046 uint32_t line;
1047 uint16_t r_gain;
1048 uint16_t b_gain;
1049 uint16_t gr_gain;
1050 uint16_t gb_gain;
1051 uint16_t gain_adjust;
1052};
1053struct sensor_3d_cali_data_t{
1054 unsigned char left_p_matrix[3][4][8];
1055 unsigned char right_p_matrix[3][4][8];
1056 unsigned char square_len[8];
1057 unsigned char focal_len[8];
1058 unsigned char pixel_pitch[8];
1059 uint16_t left_r;
1060 uint16_t left_b;
1061 uint16_t left_gb;
1062 uint16_t left_af_far;
1063 uint16_t left_af_mid;
1064 uint16_t left_af_short;
1065 uint16_t left_af_5um;
1066 uint16_t left_af_50up;
1067 uint16_t left_af_50down;
1068 uint16_t right_r;
1069 uint16_t right_b;
1070 uint16_t right_gb;
1071 uint16_t right_af_far;
1072 uint16_t right_af_mid;
1073 uint16_t right_af_short;
1074 uint16_t right_af_5um;
1075 uint16_t right_af_50up;
1076 uint16_t right_af_50down;
1077};
1078struct sensor_init_cfg {
1079 uint8_t prev_res;
1080 uint8_t pict_res;
1081};
1082
1083struct sensor_calib_data {
1084 /* Color Related Measurements */
1085 uint16_t r_over_g;
1086 uint16_t b_over_g;
1087 uint16_t gr_over_gb;
1088
1089 /* Lens Related Measurements */
1090 uint16_t macro_2_inf;
1091 uint16_t inf_2_macro;
1092 uint16_t stroke_amt;
1093 uint16_t af_pos_1m;
1094 uint16_t af_pos_inf;
1095};
1096
Kevin Chana980f392011-08-01 20:55:00 -07001097enum msm_sensor_resolution_t {
Kevin Chan36e2bdc2011-08-30 17:21:21 -07001098 MSM_SENSOR_RES_FULL,
1099 MSM_SENSOR_RES_QTR,
Kevin Chana980f392011-08-01 20:55:00 -07001100 MSM_SENSOR_RES_2,
1101 MSM_SENSOR_RES_3,
1102 MSM_SENSOR_RES_4,
1103 MSM_SENSOR_RES_5,
1104 MSM_SENSOR_RES_6,
1105 MSM_SENSOR_RES_7,
1106 MSM_SENSOR_INVALID_RES,
1107};
1108
1109struct msm_sensor_output_info_t {
1110 uint16_t x_output;
1111 uint16_t y_output;
1112 uint16_t line_length_pclk;
1113 uint16_t frame_length_lines;
Kevin Chane30d3692011-10-14 16:11:01 -07001114 uint32_t vt_pixel_clk;
1115 uint32_t op_pixel_clk;
Kevin Chan272f6602011-10-18 14:20:03 -07001116 uint16_t binning_factor;
Kevin Chana980f392011-08-01 20:55:00 -07001117};
1118
1119struct sensor_output_info_t {
1120 struct msm_sensor_output_info_t *output_info;
1121 uint16_t num_info;
1122};
1123
Taniya Dasa9bdb012011-09-08 11:21:33 +05301124struct mirror_flip {
1125 int32_t x_mirror;
1126 int32_t y_flip;
1127};
1128
1129struct cord {
1130 uint32_t x;
1131 uint32_t y;
1132};
1133
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001134struct msm_eeprom_data_t {
1135 void *eeprom_data;
1136 uint16_t index;
1137};
1138
Nishant Panditb2157c92012-04-25 01:09:28 +05301139struct msm_camera_csid_vc_cfg {
1140 uint8_t cid;
1141 uint8_t dt;
1142 uint8_t decode_format;
1143};
1144
1145struct csi_lane_params_t {
1146 uint8_t csi_lane_assign;
1147 uint8_t csi_lane_mask;
1148 uint8_t csi_if;
1149 uint8_t csid_core;
1150 uint32_t csid_version;
1151};
1152
1153#define CSI_EMBED_DATA 0x12
1154#define CSI_RESERVED_DATA_0 0x13
1155#define CSI_YUV422_8 0x1E
1156#define CSI_RAW8 0x2A
1157#define CSI_RAW10 0x2B
1158#define CSI_RAW12 0x2C
1159
1160#define CSI_DECODE_6BIT 0
1161#define CSI_DECODE_8BIT 1
1162#define CSI_DECODE_10BIT 2
1163#define CSI_DECODE_DPCM_10_8_10 5
1164
1165#define ISPIF_STREAM(intf, action) (((intf)<<ISPIF_S_STREAM_SHIFT)+(action))
1166#define ISPIF_ON_FRAME_BOUNDARY (0x01 << 0)
1167#define ISPIF_OFF_FRAME_BOUNDARY (0x01 << 1)
1168#define ISPIF_OFF_IMMEDIATELY (0x01 << 2)
1169#define ISPIF_S_STREAM_SHIFT 4
1170
1171
1172#define PIX_0 (0x01 << 0)
1173#define RDI_0 (0x01 << 1)
1174#define PIX_1 (0x01 << 2)
1175#define RDI_1 (0x01 << 3)
1176#define PIX_2 (0x01 << 4)
1177#define RDI_2 (0x01 << 5)
1178
1179
1180enum msm_ispif_intftype {
1181 PIX0,
1182 RDI0,
1183 PIX1,
1184 RDI1,
1185 PIX2,
1186 RDI2,
1187 INTF_MAX,
1188};
1189
1190enum msm_ispif_vc {
1191 VC0,
1192 VC1,
1193 VC2,
1194 VC3,
1195};
1196
1197enum msm_ispif_cid {
1198 CID0,
1199 CID1,
1200 CID2,
1201 CID3,
1202 CID4,
1203 CID5,
1204 CID6,
1205 CID7,
1206 CID8,
1207 CID9,
1208 CID10,
1209 CID11,
1210 CID12,
1211 CID13,
1212 CID14,
1213 CID15,
1214};
1215
1216struct msm_ispif_params {
1217 uint8_t intftype;
1218 uint16_t cid_mask;
1219 uint8_t csid;
1220};
1221
1222struct msm_ispif_params_list {
1223 uint32_t len;
1224 struct msm_ispif_params params[4];
1225};
1226
1227enum ispif_cfg_type_t {
1228 ISPIF_INIT,
1229 ISPIF_SET_CFG,
1230 ISPIF_SET_ON_FRAME_BOUNDARY,
1231 ISPIF_SET_OFF_FRAME_BOUNDARY,
1232 ISPIF_SET_OFF_IMMEDIATELY,
1233 ISPIF_RELEASE,
1234};
1235
1236struct ispif_cfg_data {
1237 enum ispif_cfg_type_t cfgtype;
1238 union {
1239 uint32_t csid_version;
1240 int cmd;
1241 struct msm_ispif_params_list ispif_params;
1242 } cfg;
1243};
1244
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001245struct sensor_cfg_data {
1246 int cfgtype;
1247 int mode;
1248 int rs;
1249 uint8_t max_steps;
1250
1251 union {
1252 int8_t effect;
1253 uint8_t lens_shading;
1254 uint16_t prevl_pf;
1255 uint16_t prevp_pl;
1256 uint16_t pictl_pf;
1257 uint16_t pictp_pl;
1258 uint32_t pict_max_exp_lc;
1259 uint16_t p_fps;
Su Liu6c3bb322012-02-14 02:15:05 +05301260 uint8_t iso_type;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001261 struct sensor_init_cfg init_info;
1262 struct sensor_pict_fps gfps;
1263 struct exp_gain_cfg exp_gain;
1264 struct focus_cfg focus;
1265 struct fps_cfg fps;
1266 struct wb_info_cfg wb_info;
1267 struct sensor_3d_exp_cfg sensor_3d_exp;
1268 struct sensor_calib_data calib_info;
Kevin Chana980f392011-08-01 20:55:00 -07001269 struct sensor_output_info_t output_info;
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001270 struct msm_eeprom_data_t eeprom_data;
Nishant Panditb2157c92012-04-25 01:09:28 +05301271 struct csi_lane_params_t csi_lane_params;
Taniya Dasa9bdb012011-09-08 11:21:33 +05301272 /* QRD */
1273 uint16_t antibanding;
1274 uint8_t contrast;
1275 uint8_t saturation;
1276 uint8_t sharpness;
1277 int8_t brightness;
1278 int ae_mode;
1279 uint8_t wb_val;
1280 int8_t exp_compensation;
1281 struct cord aec_cord;
1282 int is_autoflash;
1283 struct mirror_flip mirror_flip;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001284 } cfg;
1285};
1286
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001287struct damping_params_t {
1288 uint32_t damping_step;
1289 uint32_t damping_delay;
1290 uint32_t hw_params;
1291};
1292
1293enum actuator_type {
1294 ACTUATOR_VCM,
1295 ACTUATOR_PIEZO,
1296};
1297
1298enum msm_actuator_data_type {
1299 MSM_ACTUATOR_BYTE_DATA = 1,
1300 MSM_ACTUATOR_WORD_DATA,
1301};
1302
1303enum msm_actuator_addr_type {
1304 MSM_ACTUATOR_BYTE_ADDR = 1,
1305 MSM_ACTUATOR_WORD_ADDR,
1306};
1307
1308enum msm_actuator_write_type {
1309 MSM_ACTUATOR_WRITE_HW_DAMP,
1310 MSM_ACTUATOR_WRITE_DAC,
1311};
1312
1313struct msm_actuator_reg_params_t {
1314 enum msm_actuator_write_type reg_write_type;
1315 uint32_t hw_mask;
1316 uint16_t reg_addr;
1317 uint16_t hw_shift;
1318 uint16_t data_shift;
1319};
1320
1321struct reg_settings_t {
1322 uint16_t reg_addr;
1323 uint16_t reg_data;
1324};
1325
1326struct region_params_t {
1327 /* [0] = ForwardDirection Macro boundary
1328 [1] = ReverseDirection Inf boundary
1329 */
1330 uint16_t step_bound[2];
1331 uint16_t code_per_step;
1332};
1333
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001334struct msm_actuator_move_params_t {
1335 int8_t dir;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001336 int8_t sign_dir;
1337 int16_t dest_step_pos;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001338 int32_t num_steps;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001339 struct damping_params_t *ringing_params;
1340};
1341
1342struct msm_actuator_tuning_params_t {
1343 int16_t initial_code;
1344 uint16_t pwd_step;
1345 uint16_t region_size;
1346 uint32_t total_steps;
1347 struct region_params_t *region_params;
1348};
1349
1350struct msm_actuator_params_t {
1351 enum actuator_type act_type;
1352 uint8_t reg_tbl_size;
1353 uint16_t data_size;
1354 uint16_t init_setting_size;
1355 uint32_t i2c_addr;
1356 enum msm_actuator_addr_type i2c_addr_type;
1357 enum msm_actuator_data_type i2c_data_type;
1358 struct msm_actuator_reg_params_t *reg_tbl_params;
1359 struct reg_settings_t *init_settings;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001360};
1361
1362struct msm_actuator_set_info_t {
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001363 struct msm_actuator_params_t actuator_params;
1364 struct msm_actuator_tuning_params_t af_tuning_params;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001365};
1366
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001367struct msm_actuator_get_info_t {
1368 uint32_t focal_length_num;
1369 uint32_t focal_length_den;
1370 uint32_t f_number_num;
1371 uint32_t f_number_den;
1372 uint32_t f_pix_num;
1373 uint32_t f_pix_den;
1374 uint32_t total_f_dist_num;
1375 uint32_t total_f_dist_den;
Jeyaprakash Soundrapandian04592002012-02-08 10:29:50 -08001376 uint32_t hor_view_angle_num;
1377 uint32_t hor_view_angle_den;
1378 uint32_t ver_view_angle_num;
1379 uint32_t ver_view_angle_den;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001380};
1381
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001382enum af_camera_name {
1383 ACTUATOR_MAIN_CAM_0,
1384 ACTUATOR_MAIN_CAM_1,
1385 ACTUATOR_MAIN_CAM_2,
1386 ACTUATOR_MAIN_CAM_3,
1387 ACTUATOR_MAIN_CAM_4,
1388 ACTUATOR_MAIN_CAM_5,
1389 ACTUATOR_WEB_CAM_0,
1390 ACTUATOR_WEB_CAM_1,
1391 ACTUATOR_WEB_CAM_2,
1392};
1393
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001394struct msm_actuator_cfg_data {
1395 int cfgtype;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001396 uint8_t is_af_supported;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001397 union {
1398 struct msm_actuator_move_params_t move;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001399 struct msm_actuator_set_info_t set_info;
1400 struct msm_actuator_get_info_t get_info;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001401 enum af_camera_name cam_name;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001402 } cfg;
1403};
1404
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001405struct msm_eeprom_support {
1406 uint16_t is_supported;
1407 uint16_t size;
1408 uint16_t index;
1409 uint16_t qvalue;
1410};
1411
1412struct msm_calib_wb {
1413 uint16_t r_over_g;
1414 uint16_t b_over_g;
1415 uint16_t gr_over_gb;
1416};
1417
1418struct msm_calib_af {
1419 uint16_t macro_dac;
1420 uint16_t inf_dac;
1421 uint16_t start_dac;
1422};
1423
1424struct msm_calib_lsc {
1425 uint16_t r_gain[221];
1426 uint16_t b_gain[221];
1427 uint16_t gr_gain[221];
1428 uint16_t gb_gain[221];
1429};
1430
1431struct pixel_t {
1432 int x;
1433 int y;
1434};
1435
1436struct msm_calib_dpc {
1437 uint16_t validcount;
1438 struct pixel_t snapshot_coord[128];
1439 struct pixel_t preview_coord[128];
1440 struct pixel_t video_coord[128];
1441};
1442
1443struct msm_camera_eeprom_info_t {
1444 struct msm_eeprom_support af;
1445 struct msm_eeprom_support wb;
1446 struct msm_eeprom_support lsc;
1447 struct msm_eeprom_support dpc;
1448};
1449
1450struct msm_eeprom_cfg_data {
1451 int cfgtype;
1452 uint8_t is_eeprom_supported;
1453 union {
1454 struct msm_eeprom_data_t get_data;
1455 struct msm_camera_eeprom_info_t get_info;
1456 } cfg;
1457};
1458
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001459struct sensor_large_data {
1460 int cfgtype;
1461 union {
1462 struct sensor_3d_cali_data_t sensor_3d_cali_data;
1463 } data;
1464};
1465
1466enum sensor_type_t {
1467 BAYER,
1468 YUV,
1469 JPEG_SOC,
1470};
1471
1472enum flash_type {
1473 LED_FLASH,
1474 STROBE_FLASH,
1475};
1476
1477enum strobe_flash_ctrl_type {
1478 STROBE_FLASH_CTRL_INIT,
1479 STROBE_FLASH_CTRL_CHARGE,
1480 STROBE_FLASH_CTRL_RELEASE
1481};
1482
1483struct strobe_flash_ctrl_data {
1484 enum strobe_flash_ctrl_type type;
1485 int charge_en;
1486};
1487
1488struct msm_camera_info {
1489 int num_cameras;
1490 uint8_t has_3d_support[MSM_MAX_CAMERA_SENSORS];
1491 uint8_t is_internal_cam[MSM_MAX_CAMERA_SENSORS];
1492 uint32_t s_mount_angle[MSM_MAX_CAMERA_SENSORS];
1493 const char *video_dev_name[MSM_MAX_CAMERA_SENSORS];
1494 enum sensor_type_t sensor_type[MSM_MAX_CAMERA_SENSORS];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001495};
1496
1497struct msm_cam_config_dev_info {
1498 int num_config_nodes;
1499 const char *config_dev_name[MSM_MAX_CAMERA_CONFIGS];
Ankit Premrajkaf94bcc62011-08-22 15:23:53 -07001500 int config_dev_id[MSM_MAX_CAMERA_CONFIGS];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001501};
1502
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -08001503struct msm_mctl_node_info {
1504 int num_mctl_nodes;
1505 const char *mctl_node_name[MSM_MAX_CAMERA_SENSORS];
1506};
1507
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001508struct flash_ctrl_data {
1509 int flashtype;
1510 union {
1511 int led_state;
1512 struct strobe_flash_ctrl_data strobe_ctrl;
1513 } ctrl_data;
1514};
1515
1516#define GET_NAME 0
1517#define GET_PREVIEW_LINE_PER_FRAME 1
1518#define GET_PREVIEW_PIXELS_PER_LINE 2
1519#define GET_SNAPSHOT_LINE_PER_FRAME 3
1520#define GET_SNAPSHOT_PIXELS_PER_LINE 4
1521#define GET_SNAPSHOT_FPS 5
1522#define GET_SNAPSHOT_MAX_EP_LINE_CNT 6
1523
1524struct msm_camsensor_info {
1525 char name[MAX_SENSOR_NAME];
1526 uint8_t flash_enabled;
Sreesudhan Ramakrish Ramkumara2688822012-04-05 20:22:50 -07001527 uint8_t strobe_flash_enabled;
1528 uint8_t actuator_enabled;
Nishant Panditb2157c92012-04-25 01:09:28 +05301529 uint8_t ispif_supported;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001530 int8_t total_steps;
1531 uint8_t support_3d;
Mingcheng Zhuc85b8ad2012-03-08 17:47:17 -08001532 enum flash_type flashtype;
1533 enum sensor_type_t sensor_type;
1534 uint32_t pxlcode; /* enum v4l2_mbus_pixelcode */
1535 uint32_t camera_type; /* msm_camera_type */
1536 int mount_angle;
1537 uint32_t max_width;
1538 uint32_t max_height;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001539};
Kiran Kumar H Nceea7622011-08-23 14:01:03 -07001540
1541#define V4L2_SINGLE_PLANE 0
1542#define V4L2_MULTI_PLANE_Y 0
1543#define V4L2_MULTI_PLANE_CBCR 1
1544#define V4L2_MULTI_PLANE_CB 1
1545#define V4L2_MULTI_PLANE_CR 2
1546
1547struct plane_data {
1548 int plane_id;
1549 uint32_t offset;
1550 unsigned long size;
1551};
1552
1553struct img_plane_info {
1554 uint32_t width;
1555 uint32_t height;
1556 uint32_t pixelformat;
1557 uint8_t buffer_type; /*Single/Multi planar*/
1558 uint8_t output_port;
1559 uint32_t ext_mode;
1560 uint8_t num_planes;
1561 struct plane_data plane[MAX_PLANES];
Mingcheng Zhu996be182011-10-16 16:04:23 -07001562 uint32_t sp_y_offset;
Kiran Kumar H Nceea7622011-08-23 14:01:03 -07001563 uint8_t vpe_can_use;
1564};
1565
Kevin Chan210061f2012-02-14 20:56:16 -08001566#define QCAMERA_NAME "qcamera"
1567#define QCAMERA_DEVICE_GROUP_ID 1
1568#define QCAMERA_VNODE_GROUP_ID 2
1569
Kevin Chan94b4c832012-03-02 21:27:16 -08001570#define MSM_CAM_V4L2_IOCTL_GET_CAMERA_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07001571 _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001572
1573#define MSM_CAM_V4L2_IOCTL_GET_CONFIG_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07001574 _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001575
1576#define MSM_CAM_V4L2_IOCTL_GET_MCTL_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07001577 _IOWR('V', BASE_VIDIOC_PRIVATE + 3, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001578
1579#define MSM_CAM_V4L2_IOCTL_CTRL_CMD_DONE \
Kevin Chan41a38702012-06-06 22:25:41 -07001580 _IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001581
1582#define MSM_CAM_V4L2_IOCTL_GET_EVENT_PAYLOAD \
Kevin Chan41a38702012-06-06 22:25:41 -07001583 _IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001584
Sunid Wilson4584b5f2012-04-13 12:48:25 -07001585#define MSM_CAM_IOCTL_SEND_EVENT \
1586 _IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct v4l2_event)
1587
Kiran Kumar H N64bd23c2012-05-25 12:06:21 -07001588#define MSM_CAM_V4L2_IOCTL_CFG_VPE \
1589 _IOWR('V', BASE_VIDIOC_PRIVATE + 7, struct msm_vpe_cfg_cmd)
1590
Kevin Chan41a38702012-06-06 22:25:41 -07001591#define MSM_CAM_V4L2_IOCTL_PRIVATE_S_CTRL \
1592 _IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct msm_camera_v4l2_ioctl_t)
1593
Kevin Chan94b4c832012-03-02 21:27:16 -08001594struct msm_camera_v4l2_ioctl_t {
Kevin Chan41a38702012-06-06 22:25:41 -07001595 uint32_t id;
Kevin Chan94b4c832012-03-02 21:27:16 -08001596 void __user *ioctl_ptr;
Kevin Chan41a38702012-06-06 22:25:41 -07001597 uint32_t len;
Kevin Chan94b4c832012-03-02 21:27:16 -08001598};
1599
Kiran Kumar H Nb4a278e2012-06-18 19:25:47 -07001600enum msm_camss_irq_idx {
1601 CAMERA_SS_IRQ_0,
1602 CAMERA_SS_IRQ_1,
1603 CAMERA_SS_IRQ_2,
1604 CAMERA_SS_IRQ_3,
1605 CAMERA_SS_IRQ_4,
1606 CAMERA_SS_IRQ_5,
1607 CAMERA_SS_IRQ_6,
1608 CAMERA_SS_IRQ_7,
1609 CAMERA_SS_IRQ_8,
1610 CAMERA_SS_IRQ_9,
1611 CAMERA_SS_IRQ_10,
1612 CAMERA_SS_IRQ_11,
1613 CAMERA_SS_IRQ_12,
1614 CAMERA_SS_IRQ_MAX
1615};
1616
1617enum msm_cam_hw_idx {
1618 MSM_CAM_HW_MICRO,
1619 MSM_CAM_HW_CCI,
1620 MSM_CAM_HW_CSI0,
1621 MSM_CAM_HW_CSI1,
1622 MSM_CAM_HW_CSI2,
1623 MSM_CAM_HW_CSI3,
1624 MSM_CAM_HW_ISPIF,
1625 MSM_CAM_HW_CPP,
1626 MSM_CAM_HW_VFE0,
1627 MSM_CAM_HW_VFE1,
1628 MSM_CAM_HW_JPEG0,
1629 MSM_CAM_HW_JPEG1,
1630 MSM_CAM_HW_JPEG2,
1631 MSM_CAM_HW_MAX
1632};
1633
1634struct msm_camera_irq_cfg {
1635 /* Bit mask of all the camera hardwares that needs to
1636 * be composited into a single IRQ to the MSM.
1637 * Current usage: (may be updated based on hw changes)
1638 * Bits 31:13 - Reserved.
1639 * Bits 12:0
1640 * 12 - MSM_CAM_HW_JPEG2
1641 * 11 - MSM_CAM_HW_JPEG1
1642 * 10 - MSM_CAM_HW_JPEG0
1643 * 9 - MSM_CAM_HW_VFE1
1644 * 8 - MSM_CAM_HW_VFE0
1645 * 7 - MSM_CAM_HW_CPP
1646 * 6 - MSM_CAM_HW_ISPIF
1647 * 5 - MSM_CAM_HW_CSI3
1648 * 4 - MSM_CAM_HW_CSI2
1649 * 3 - MSM_CAM_HW_CSI1
1650 * 2 - MSM_CAM_HW_CSI0
1651 * 1 - MSM_CAM_HW_CCI
1652 * 0 - MSM_CAM_HW_MICRO
1653 */
1654 uint32_t cam_hw_mask;
1655 uint8_t irq_idx;
1656 uint8_t num_hwcore;
1657};
1658
1659#define MSM_IRQROUTER_CFG_COMPIRQ \
1660 _IOWR('V', BASE_VIDIOC_PRIVATE, void __user *)
1661
Kevin Chan73ec7282012-06-07 01:32:00 -07001662#define MAX_NUM_CPP_STRIPS 8
1663
1664enum msm_cpp_frame_type {
1665 MSM_CPP_OFFLINE_FRAME,
1666 MSM_CPP_REALTIME_FRAME,
1667};
1668
1669struct msm_cpp_frame_strip_info {
1670 int scale_v_en;
1671 int scale_h_en;
1672
1673 int upscale_v_en;
1674 int upscale_h_en;
1675
1676 int src_start_x;
1677 int src_end_x;
1678 int src_start_y;
1679 int src_end_y;
1680
1681 /* Padding is required for upscaler because it does not
1682 * pad internally like other blocks, also needed for rotation
1683 * rotation expects all the blocks in the stripe to be the same size
1684 * Padding is done such that all the extra padded pixels
1685 * are on the right and bottom
1686 */
1687 int pad_bottom;
1688 int pad_top;
1689 int pad_right;
1690 int pad_left;
1691
1692 int v_init_phase;
1693 int h_init_phase;
1694 int h_phase_step;
1695 int v_phase_step;
1696
1697 int prescale_crop_width_first_pixel;
1698 int prescale_crop_width_last_pixel;
1699 int prescale_crop_height_first_line;
1700 int prescale_crop_height_last_line;
1701
1702 int postscale_crop_height_first_line;
1703 int postscale_crop_height_last_line;
1704 int postscale_crop_width_first_pixel;
1705 int postscale_crop_width_last_pixel;
1706
1707 int dst_start_x;
1708 int dst_end_x;
1709 int dst_start_y;
1710 int dst_end_y;
1711
1712 int bytes_per_pixel;
1713 unsigned int source_address;
1714 unsigned int destination_address;
1715 unsigned int src_stride;
1716 unsigned int dst_stride;
1717 int rotate_270;
1718 int horizontal_flip;
1719 int vertical_flip;
1720 int scale_output_width;
1721 int scale_output_height;
1722};
1723
1724struct msm_cpp_frame_info_t {
1725 int32_t frame_id;
1726 uint32_t inst_id;
1727 uint32_t client_id;
1728 enum msm_cpp_frame_type frame_type;
1729 uint32_t num_strips;
1730 struct msm_cpp_frame_strip_info *strip_info;
1731};
1732
1733#define VIDIOC_MSM_CPP_CFG \
1734 _IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_camera_v4l2_ioctl_t)
1735
1736#define VIDIOC_MSM_CPP_GET_EVENTPAYLOAD \
1737 _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t)
1738
1739#define VIDIOC_MSM_CPP_GET_INST_INFO \
1740 _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
1741
1742#define V4L2_EVENT_CPP_FRAME_DONE (V4L2_EVENT_PRIVATE_START + 0)
1743
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001744#endif /* __LINUX_MSM_CAMERA_H */