Sameer Thalappil | 74ce6d0 | 2012-02-22 07:24:51 -0800 | [diff] [blame^] | 1 | /* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved. |
Ankur Nandwani | e258cf0 | 2011-08-19 10:16:38 -0700 | [diff] [blame] | 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/kernel.h> |
| 14 | #include <linux/interrupt.h> |
| 15 | #include <linux/reboot.h> |
| 16 | #include <linux/workqueue.h> |
| 17 | #include <linux/io.h> |
| 18 | #include <linux/delay.h> |
| 19 | #include <linux/module.h> |
Sameer Thalappil | 409ed35 | 2011-12-07 10:53:31 -0800 | [diff] [blame] | 20 | #include <linux/platform_device.h> |
| 21 | #include <linux/wcnss_wlan.h> |
Ankur Nandwani | e258cf0 | 2011-08-19 10:16:38 -0700 | [diff] [blame] | 22 | #include <mach/irqs.h> |
| 23 | #include <mach/scm.h> |
| 24 | #include <mach/subsystem_restart.h> |
| 25 | #include <mach/subsystem_notif.h> |
Sameer Thalappil | 7474338 | 2011-11-10 16:38:58 -0800 | [diff] [blame] | 26 | #include <mach/peripheral-loader.h> |
Ankur Nandwani | e258cf0 | 2011-08-19 10:16:38 -0700 | [diff] [blame] | 27 | #include "smd_private.h" |
| 28 | #include "ramdump.h" |
| 29 | |
| 30 | #define MODULE_NAME "wcnss_8960" |
| 31 | |
| 32 | static void riva_smsm_cb_fn(struct work_struct *); |
| 33 | static DECLARE_WORK(riva_smsm_cb_work, riva_smsm_cb_fn); |
| 34 | |
| 35 | static void riva_fatal_fn(struct work_struct *); |
| 36 | static DECLARE_WORK(riva_fatal_work, riva_fatal_fn); |
| 37 | |
Sameer Thalappil | 74ce6d0 | 2012-02-22 07:24:51 -0800 | [diff] [blame^] | 38 | static struct delayed_work cancel_vote_work; |
Ankur Nandwani | e258cf0 | 2011-08-19 10:16:38 -0700 | [diff] [blame] | 39 | static void *riva_ramdump_dev; |
| 40 | static int riva_crash; |
| 41 | static int ss_restart_inprogress; |
Sameer Thalappil | 7474338 | 2011-11-10 16:38:58 -0800 | [diff] [blame] | 42 | static int enable_riva_ssr; |
Ankur Nandwani | e258cf0 | 2011-08-19 10:16:38 -0700 | [diff] [blame] | 43 | |
| 44 | static void riva_smsm_cb_fn(struct work_struct *work) |
| 45 | { |
Sameer Thalappil | 7474338 | 2011-11-10 16:38:58 -0800 | [diff] [blame] | 46 | if (!enable_riva_ssr) |
| 47 | panic(MODULE_NAME ": SMSM reset request received from Riva"); |
| 48 | else |
| 49 | subsystem_restart("riva"); |
Ankur Nandwani | e258cf0 | 2011-08-19 10:16:38 -0700 | [diff] [blame] | 50 | } |
| 51 | |
| 52 | static void smsm_state_cb_hdlr(void *data, uint32_t old_state, |
| 53 | uint32_t new_state) |
| 54 | { |
| 55 | riva_crash = true; |
| 56 | pr_err("%s: smsm state changed to smsm reset\n", MODULE_NAME); |
| 57 | |
| 58 | if (ss_restart_inprogress) { |
| 59 | pr_err("%s: Ignoring smsm reset req, restart in progress\n", |
| 60 | MODULE_NAME); |
| 61 | return; |
| 62 | } |
Sameer Thalappil | d87cf66 | 2011-12-12 13:37:31 -0800 | [diff] [blame] | 63 | if (new_state & SMSM_RESET) { |
| 64 | ss_restart_inprogress = true; |
Ankur Nandwani | e258cf0 | 2011-08-19 10:16:38 -0700 | [diff] [blame] | 65 | schedule_work(&riva_smsm_cb_work); |
Sameer Thalappil | d87cf66 | 2011-12-12 13:37:31 -0800 | [diff] [blame] | 66 | } |
Ankur Nandwani | e258cf0 | 2011-08-19 10:16:38 -0700 | [diff] [blame] | 67 | } |
| 68 | |
| 69 | static void riva_fatal_fn(struct work_struct *work) |
| 70 | { |
Sameer Thalappil | d87cf66 | 2011-12-12 13:37:31 -0800 | [diff] [blame] | 71 | if (!enable_riva_ssr) |
Sameer Thalappil | 1806ae1 | 2011-10-20 12:45:41 -0700 | [diff] [blame] | 72 | panic(MODULE_NAME ": Watchdog bite received from Riva"); |
Sameer Thalappil | d87cf66 | 2011-12-12 13:37:31 -0800 | [diff] [blame] | 73 | else |
| 74 | subsystem_restart("riva"); |
| 75 | } |
| 76 | |
| 77 | static irqreturn_t riva_wdog_bite_irq_hdlr(int irq, void *dev_id) |
| 78 | { |
| 79 | int ret; |
| 80 | |
| 81 | if (ss_restart_inprogress) { |
| 82 | pr_err("%s: Ignoring riva bite irq, restart in progress\n", |
| 83 | MODULE_NAME); |
| 84 | return IRQ_HANDLED; |
| 85 | } |
| 86 | disable_irq_nosync(RIVA_APSS_WDOG_BITE_RESET_RDY_IRQ); |
| 87 | ss_restart_inprogress = true; |
| 88 | ret = schedule_work(&riva_fatal_work); |
| 89 | return IRQ_HANDLED; |
Ankur Nandwani | e258cf0 | 2011-08-19 10:16:38 -0700 | [diff] [blame] | 90 | } |
| 91 | |
Ankur Nandwani | e258cf0 | 2011-08-19 10:16:38 -0700 | [diff] [blame] | 92 | /* SMSM reset Riva */ |
| 93 | static void smsm_riva_reset(void) |
| 94 | { |
| 95 | /* per SS reset request bit is not available now, |
| 96 | * all SS host modules are setting this bit |
| 97 | * This is still under discussion*/ |
| 98 | smsm_change_state(SMSM_APPS_STATE, SMSM_RESET, SMSM_RESET); |
| 99 | } |
| 100 | |
Sameer Thalappil | 74ce6d0 | 2012-02-22 07:24:51 -0800 | [diff] [blame^] | 101 | static void riva_post_bootup(struct work_struct *work) |
Ankur Nandwani | e258cf0 | 2011-08-19 10:16:38 -0700 | [diff] [blame] | 102 | { |
Sameer Thalappil | 409ed35 | 2011-12-07 10:53:31 -0800 | [diff] [blame] | 103 | struct platform_device *pdev = wcnss_get_platform_device(); |
| 104 | struct wcnss_wlan_config *pwlanconfig = wcnss_get_wlan_config(); |
Sameer Thalappil | 409ed35 | 2011-12-07 10:53:31 -0800 | [diff] [blame] | 105 | |
Sameer Thalappil | 74ce6d0 | 2012-02-22 07:24:51 -0800 | [diff] [blame^] | 106 | pr_debug(MODULE_NAME ": Cancel APPS vote for Iris & Riva\n"); |
| 107 | |
| 108 | wcnss_wlan_power(&pdev->dev, pwlanconfig, |
| 109 | WCNSS_WLAN_SWITCH_OFF); |
| 110 | } |
| 111 | |
| 112 | /* Subsystem handlers */ |
| 113 | static int riva_shutdown(const struct subsys_data *subsys) |
| 114 | { |
Sameer Thalappil | 7474338 | 2011-11-10 16:38:58 -0800 | [diff] [blame] | 115 | pil_force_shutdown("wcnss"); |
Sameer Thalappil | 74ce6d0 | 2012-02-22 07:24:51 -0800 | [diff] [blame^] | 116 | flush_delayed_work(&cancel_vote_work); |
Sameer Thalappil | 409ed35 | 2011-12-07 10:53:31 -0800 | [diff] [blame] | 117 | |
Sameer Thalappil | 74ce6d0 | 2012-02-22 07:24:51 -0800 | [diff] [blame^] | 118 | return 0; |
Ankur Nandwani | e258cf0 | 2011-08-19 10:16:38 -0700 | [diff] [blame] | 119 | } |
| 120 | |
| 121 | static int riva_powerup(const struct subsys_data *subsys) |
| 122 | { |
Sameer Thalappil | 409ed35 | 2011-12-07 10:53:31 -0800 | [diff] [blame] | 123 | struct platform_device *pdev = wcnss_get_platform_device(); |
| 124 | struct wcnss_wlan_config *pwlanconfig = wcnss_get_wlan_config(); |
| 125 | int ret = -1; |
| 126 | |
| 127 | if (pdev && pwlanconfig) |
| 128 | ret = wcnss_wlan_power(&pdev->dev, pwlanconfig, |
| 129 | WCNSS_WLAN_SWITCH_ON); |
Sameer Thalappil | 6e727d2 | 2012-02-14 19:37:54 -0800 | [diff] [blame] | 130 | /* delay PIL operation, this SSR may be happening soon after kernel |
| 131 | * resumes because of a SMSM RESET by Riva when APPS was suspended. |
| 132 | * PIL fails to locate the images without this delay */ |
| 133 | if (!ret) { |
| 134 | msleep(1000); |
Sameer Thalappil | 409ed35 | 2011-12-07 10:53:31 -0800 | [diff] [blame] | 135 | pil_force_boot("wcnss"); |
Sameer Thalappil | 6e727d2 | 2012-02-14 19:37:54 -0800 | [diff] [blame] | 136 | } |
Sameer Thalappil | d87cf66 | 2011-12-12 13:37:31 -0800 | [diff] [blame] | 137 | ss_restart_inprogress = false; |
| 138 | enable_irq(RIVA_APSS_WDOG_BITE_RESET_RDY_IRQ); |
Sameer Thalappil | 74ce6d0 | 2012-02-22 07:24:51 -0800 | [diff] [blame^] | 139 | schedule_delayed_work(&cancel_vote_work, msecs_to_jiffies(5000)); |
Sameer Thalappil | d87cf66 | 2011-12-12 13:37:31 -0800 | [diff] [blame] | 140 | |
Sameer Thalappil | 409ed35 | 2011-12-07 10:53:31 -0800 | [diff] [blame] | 141 | return ret; |
Ankur Nandwani | e258cf0 | 2011-08-19 10:16:38 -0700 | [diff] [blame] | 142 | } |
| 143 | |
| 144 | /* RAM segments for Riva SS; |
| 145 | * We don't specify the full 5MB allocated for Riva. Only 3MB is specified */ |
| 146 | static struct ramdump_segment riva_segments[] = {{0x8f200000, |
| 147 | 0x8f500000 - 0x8f200000} }; |
| 148 | |
| 149 | static int riva_ramdump(int enable, const struct subsys_data *subsys) |
| 150 | { |
| 151 | pr_debug("%s: enable[%d]\n", MODULE_NAME, enable); |
| 152 | if (enable) |
| 153 | return do_ramdump(riva_ramdump_dev, |
| 154 | riva_segments, |
| 155 | ARRAY_SIZE(riva_segments)); |
| 156 | else |
| 157 | return 0; |
| 158 | } |
| 159 | |
| 160 | /* Riva crash handler */ |
| 161 | static void riva_crash_shutdown(const struct subsys_data *subsys) |
| 162 | { |
Ankur Nandwani | e258cf0 | 2011-08-19 10:16:38 -0700 | [diff] [blame] | 163 | pr_err("%s: crash shutdown : %d\n", MODULE_NAME, riva_crash); |
| 164 | if (riva_crash != true) |
| 165 | smsm_riva_reset(); |
| 166 | } |
| 167 | |
| 168 | static struct subsys_data riva_8960 = { |
| 169 | .name = "riva", |
| 170 | .shutdown = riva_shutdown, |
| 171 | .powerup = riva_powerup, |
| 172 | .ramdump = riva_ramdump, |
| 173 | .crash_shutdown = riva_crash_shutdown |
| 174 | }; |
| 175 | |
Sameer Thalappil | 7474338 | 2011-11-10 16:38:58 -0800 | [diff] [blame] | 176 | static int enable_riva_ssr_set(const char *val, struct kernel_param *kp) |
| 177 | { |
| 178 | int ret; |
| 179 | |
| 180 | ret = param_set_int(val, kp); |
| 181 | if (ret) |
| 182 | return ret; |
| 183 | |
| 184 | if (enable_riva_ssr) |
| 185 | pr_info(MODULE_NAME ": Subsystem restart activated for riva.\n"); |
| 186 | |
| 187 | return 0; |
| 188 | } |
| 189 | |
| 190 | module_param_call(enable_riva_ssr, enable_riva_ssr_set, param_get_int, |
| 191 | &enable_riva_ssr, S_IRUGO | S_IWUSR); |
| 192 | |
Ankur Nandwani | e258cf0 | 2011-08-19 10:16:38 -0700 | [diff] [blame] | 193 | static int __init riva_restart_init(void) |
| 194 | { |
| 195 | return ssr_register_subsystem(&riva_8960); |
| 196 | } |
| 197 | |
| 198 | static int __init riva_ssr_module_init(void) |
| 199 | { |
| 200 | int ret; |
| 201 | |
| 202 | ret = smsm_state_cb_register(SMSM_WCNSS_STATE, SMSM_RESET, |
| 203 | smsm_state_cb_hdlr, 0); |
| 204 | if (ret < 0) { |
| 205 | pr_err("%s: Unable to register smsm callback for Riva Reset!" |
| 206 | " (%d)\n", MODULE_NAME, ret); |
| 207 | goto out; |
| 208 | } |
Sameer Thalappil | d87cf66 | 2011-12-12 13:37:31 -0800 | [diff] [blame] | 209 | ret = request_irq(RIVA_APSS_WDOG_BITE_RESET_RDY_IRQ, |
| 210 | riva_wdog_bite_irq_hdlr, IRQF_TRIGGER_HIGH, |
| 211 | "riva_wdog", NULL); |
| 212 | |
| 213 | if (ret < 0) { |
| 214 | pr_err("%s: Unable to register for Riva bite interrupt" |
| 215 | " (%d)\n", MODULE_NAME, ret); |
| 216 | goto out; |
| 217 | } |
Ankur Nandwani | e258cf0 | 2011-08-19 10:16:38 -0700 | [diff] [blame] | 218 | ret = riva_restart_init(); |
| 219 | if (ret < 0) { |
| 220 | pr_err("%s: Unable to register with ssr. (%d)\n", |
| 221 | MODULE_NAME, ret); |
| 222 | goto out; |
| 223 | } |
| 224 | riva_ramdump_dev = create_ramdump_device("riva"); |
| 225 | if (!riva_ramdump_dev) { |
| 226 | pr_err("%s: Unable to create ramdump device.\n", |
| 227 | MODULE_NAME); |
| 228 | ret = -ENOMEM; |
| 229 | goto out; |
| 230 | } |
Sameer Thalappil | 74ce6d0 | 2012-02-22 07:24:51 -0800 | [diff] [blame^] | 231 | INIT_DELAYED_WORK(&cancel_vote_work, riva_post_bootup); |
| 232 | |
Ankur Nandwani | e258cf0 | 2011-08-19 10:16:38 -0700 | [diff] [blame] | 233 | pr_info("%s: module initialized\n", MODULE_NAME); |
| 234 | out: |
| 235 | return ret; |
| 236 | } |
| 237 | |
| 238 | static void __exit riva_ssr_module_exit(void) |
| 239 | { |
| 240 | free_irq(RIVA_APSS_WDOG_BITE_RESET_RDY_IRQ, NULL); |
| 241 | } |
| 242 | |
| 243 | module_init(riva_ssr_module_init); |
| 244 | module_exit(riva_ssr_module_exit); |
| 245 | |
| 246 | MODULE_LICENSE("GPL v2"); |