blob: 3114e42e5a194f0c96264d3772e46977ec7a5eb6 [file] [log] [blame]
Daniel Walker2682fd32010-02-24 15:47:58 -08001/*
2 * Copyright (C) 2007 Google, Inc.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003 * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
Daniel Walker2682fd32010-02-24 15:47:58 -08004 * Author: Brian Swetland <swetland@google.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#include <linux/kernel.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018#include <linux/gpio.h>
Daniel Walker2682fd32010-02-24 15:47:58 -080019#include <linux/init.h>
20#include <linux/platform_device.h>
21#include <linux/input.h>
22#include <linux/io.h>
23#include <linux/delay.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070024#include <linux/bootmem.h>
Daniel Walker2682fd32010-02-24 15:47:58 -080025#include <linux/power_supply.h>
26
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070027#include <mach/msm_memtypes.h>
Daniel Walker2682fd32010-02-24 15:47:58 -080028#include <mach/hardware.h>
29#include <asm/mach-types.h>
30#include <asm/mach/arch.h>
31#include <asm/mach/map.h>
32#include <asm/mach/flash.h>
33#include <asm/setup.h>
34#ifdef CONFIG_CACHE_L2X0
35#include <asm/hardware/cache-l2x0.h>
36#endif
37
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070038#include <asm/mach/mmc.h>
Daniel Walker2682fd32010-02-24 15:47:58 -080039#include <mach/vreg.h>
40#include <mach/mpp.h>
Daniel Walker2682fd32010-02-24 15:47:58 -080041#include <mach/board.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070042#include <mach/pmic.h>
Daniel Walker2682fd32010-02-24 15:47:58 -080043#include <mach/msm_iomap.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070044#include <mach/msm_rpcrouter.h>
45#include <mach/msm_hsusb.h>
46#include <mach/rpc_hsusb.h>
47#include <mach/rpc_pmapp.h>
48#include <mach/msm_serial_hs.h>
49#include <mach/memory.h>
50#include <mach/msm_battery.h>
51#include <mach/rpc_server_handset.h>
52#include <mach/msm_tsif.h>
53#include <mach/socinfo.h>
Daniel Walker2682fd32010-02-24 15:47:58 -080054
55#include <linux/mtd/nand.h>
56#include <linux/mtd/partitions.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070057#include <linux/i2c.h>
58#include <linux/android_pmem.h>
59#include <mach/camera.h>
Daniel Walker2682fd32010-02-24 15:47:58 -080060
Manu Gautam99ed3912011-10-13 18:00:55 +053061#ifdef CONFIG_USB_G_ANDROID
62#include <linux/usb/android.h>
63#include <mach/usbdiag.h>
64#endif
65
Pankaj Kumar75c86fd2011-10-01 18:51:09 +053066#include "board-msm7627-regulator.h"
Daniel Walker2682fd32010-02-24 15:47:58 -080067#include "devices.h"
Daniel Walker2682fd32010-02-24 15:47:58 -080068#include "clock.h"
Matt Wagantall6d9ebee2011-08-26 12:15:24 -070069#include "acpuclock.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070070#include "msm-keypad-devices.h"
71#include "pm.h"
Maheshkumar Sivasubramanian8ccc16e2011-10-25 15:59:57 -060072#include "pm-boot.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070073
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070074#ifdef CONFIG_ARCH_MSM7X25
75#define MSM_PMEM_MDP_SIZE 0xb21000
76#define MSM_PMEM_ADSP_SIZE 0x97b000
77#define MSM_PMEM_AUDIO_SIZE 0x121000
78#define MSM_FB_SIZE 0x200000
79#define PMEM_KERNEL_EBI1_SIZE 0x64000
80#endif
81
82#ifdef CONFIG_ARCH_MSM7X27
83#define MSM_PMEM_MDP_SIZE 0x1B76000
84#define MSM_PMEM_ADSP_SIZE 0xC8A000
85#define MSM_PMEM_AUDIO_SIZE 0x5B000
86
87#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
88#define MSM_FB_SIZE 0x233000
89#else
90#define MSM_FB_SIZE 0x177000
91#endif
92
93#define PMEM_KERNEL_EBI1_SIZE 0x1C000
94#endif
Daniel Walker2682fd32010-02-24 15:47:58 -080095
96static struct resource smc91x_resources[] = {
97 [0] = {
98 .start = 0x9C004300,
99 .end = 0x9C0043ff,
100 .flags = IORESOURCE_MEM,
101 },
102 [1] = {
103 .start = MSM_GPIO_TO_INT(132),
104 .end = MSM_GPIO_TO_INT(132),
105 .flags = IORESOURCE_IRQ,
106 },
107};
108
Manu Gautam99ed3912011-10-13 18:00:55 +0530109static struct platform_device smc91x_device = {
110 .name = "smc91x",
111 .id = 0,
112 .num_resources = ARRAY_SIZE(smc91x_resources),
113 .resource = smc91x_resources,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700114};
115
Manu Gautam99ed3912011-10-13 18:00:55 +0530116#ifdef CONFIG_USB_G_ANDROID
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700117static struct android_usb_platform_data android_usb_pdata = {
Manu Gautam99ed3912011-10-13 18:00:55 +0530118 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700119};
120
121static struct platform_device android_usb_device = {
122 .name = "android_usb",
123 .id = -1,
124 .dev = {
125 .platform_data = &android_usb_pdata,
126 },
127};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700128#endif
129
130#ifdef CONFIG_USB_EHCI_MSM_72K
131static void msm_hsusb_vbus_power(unsigned phy_info, int on)
132{
133 if (on)
134 msm_hsusb_vbus_powerup();
135 else
136 msm_hsusb_vbus_shutdown();
137}
138
139static struct msm_usb_host_platform_data msm_usb_host_pdata = {
140 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_65NM),
141};
142
143static void __init msm7x2x_init_host(void)
144{
145 if (machine_is_msm7x25_ffa() || machine_is_msm7x27_ffa())
146 return;
147
148 msm_add_host(0, &msm_usb_host_pdata);
149}
150#endif
151
152#ifdef CONFIG_USB_MSM_OTG_72K
153static int hsusb_rpc_connect(int connect)
154{
155 if (connect)
156 return msm_hsusb_rpc_connect();
157 else
158 return msm_hsusb_rpc_close();
159}
160#endif
161
162#ifdef CONFIG_USB_MSM_OTG_72K
163struct vreg *vreg_3p3;
164static int msm_hsusb_ldo_init(int init)
165{
166 if (init) {
167 /*
168 * PHY 3.3V analog domain(VDDA33) is powered up by
169 * an always enabled power supply (LP5900TL-3.3).
170 * USB VREG default source is VBUS line. Turning
171 * on USB VREG has a side effect on the USB suspend
172 * current. Hence USB VREG is explicitly turned
173 * off here.
174 */
175 vreg_3p3 = vreg_get(NULL, "usb");
176 if (IS_ERR(vreg_3p3))
177 return PTR_ERR(vreg_3p3);
178 vreg_enable(vreg_3p3);
179 vreg_disable(vreg_3p3);
180 vreg_put(vreg_3p3);
181 }
182
183 return 0;
184}
185
186static int msm_hsusb_pmic_notif_init(void (*callback)(int online), int init)
187{
188 int ret;
189
190 if (init) {
191 ret = msm_pm_app_rpc_init(callback);
192 } else {
193 msm_pm_app_rpc_deinit(callback);
194 ret = 0;
195 }
196 return ret;
197}
198
199static int msm_otg_rpc_phy_reset(void __iomem *regs)
200{
201 return msm_hsusb_phy_reset();
202}
203
204static struct msm_otg_platform_data msm_otg_pdata = {
205 .rpc_connect = hsusb_rpc_connect,
206 .pmic_vbus_notif_init = msm_hsusb_pmic_notif_init,
207 .chg_vbus_draw = hsusb_chg_vbus_draw,
208 .chg_connected = hsusb_chg_connected,
209 .chg_init = hsusb_chg_init,
210#ifdef CONFIG_USB_EHCI_MSM_72K
211 .vbus_power = msm_hsusb_vbus_power,
212#endif
213 .ldo_init = msm_hsusb_ldo_init,
214 .pclk_required_during_lpm = 1,
215 .pclk_src_name = "ebi1_usb_clk",
216};
217
218#ifdef CONFIG_USB_GADGET
219static struct msm_hsusb_gadget_platform_data msm_gadget_pdata;
220#endif
221#endif
222
223#define SND(desc, num) { .name = #desc, .id = num }
224static struct snd_endpoint snd_endpoints_list[] = {
225 SND(HANDSET, 0),
226 SND(MONO_HEADSET, 2),
227 SND(HEADSET, 3),
228 SND(SPEAKER, 6),
229 SND(TTY_HEADSET, 8),
230 SND(TTY_VCO, 9),
231 SND(TTY_HCO, 10),
232 SND(BT, 12),
233 SND(IN_S_SADC_OUT_HANDSET, 16),
234 SND(IN_S_SADC_OUT_SPEAKER_PHONE, 25),
235 SND(CURRENT, 27),
236};
237#undef SND
238
239static struct msm_snd_endpoints msm_device_snd_endpoints = {
240 .endpoints = snd_endpoints_list,
241 .num = sizeof(snd_endpoints_list) / sizeof(struct snd_endpoint)
242};
243
244static struct platform_device msm_device_snd = {
245 .name = "msm_snd",
246 .id = -1,
247 .dev = {
248 .platform_data = &msm_device_snd_endpoints
249 },
250};
251
252#define DEC0_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
253 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
254 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
255 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
256 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
257 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
258#ifdef CONFIG_ARCH_MSM7X25
259#define DEC1_FORMAT ((1<<MSM_ADSP_CODEC_WAV)|(1<<MSM_ADSP_CODEC_ADPCM)| \
260 (1<<MSM_ADSP_CODEC_YADPCM)|(1<<MSM_ADSP_CODEC_QCELP)| \
261 (1<<MSM_ADSP_CODEC_MP3))
262#define DEC2_FORMAT ((1<<MSM_ADSP_CODEC_WAV)|(1<<MSM_ADSP_CODEC_ADPCM)| \
263 (1<<MSM_ADSP_CODEC_YADPCM)|(1<<MSM_ADSP_CODEC_QCELP)| \
264 (1<<MSM_ADSP_CODEC_MP3))
265#define DEC3_FORMAT 0
266#define DEC4_FORMAT 0
267#else
268#define DEC1_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
269 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
270 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
271 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
272 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
273 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
274#define DEC2_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
275 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
276 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
277 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
278 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
279 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
280#define DEC3_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
281 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
282 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
283 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
284 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
285 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
286#define DEC4_FORMAT (1<<MSM_ADSP_CODEC_MIDI)
287#endif
288
289static unsigned int dec_concurrency_table[] = {
290 /* Audio LP */
291 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DMA)), 0,
292 0, 0, 0,
293
294 /* Concurrency 1 */
295 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
296 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
297 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
298 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
299 (DEC4_FORMAT),
300
301 /* Concurrency 2 */
302 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
303 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
304 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
305 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
306 (DEC4_FORMAT),
307
308 /* Concurrency 3 */
309 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
310 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
311 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
312 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
313 (DEC4_FORMAT),
314
315 /* Concurrency 4 */
316 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
317 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
318 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
319 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
320 (DEC4_FORMAT),
321
322 /* Concurrency 5 */
323 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
324 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
325 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
326 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
327 (DEC4_FORMAT),
328
329 /* Concurrency 6 */
330 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
331 0, 0, 0, 0,
332
333 /* Concurrency 7 */
334 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
335 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
336 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
337 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
338 (DEC4_FORMAT),
339};
340
341#define DEC_INFO(name, queueid, decid, nr_codec) { .module_name = name, \
342 .module_queueid = queueid, .module_decid = decid, \
343 .nr_codec_support = nr_codec}
344
345static struct msm_adspdec_info dec_info_list[] = {
346 DEC_INFO("AUDPLAY0TASK", 13, 0, 11), /* AudPlay0BitStreamCtrlQueue */
347#ifdef CONFIG_ARCH_MSM7X25
348 DEC_INFO("AUDPLAY1TASK", 14, 1, 5), /* AudPlay1BitStreamCtrlQueue */
349 DEC_INFO("AUDPLAY2TASK", 15, 2, 5), /* AudPlay2BitStreamCtrlQueue */
350 DEC_INFO("AUDPLAY3TASK", 16, 3, 0), /* AudPlay3BitStreamCtrlQueue */
351 DEC_INFO("AUDPLAY4TASK", 17, 4, 0), /* AudPlay4BitStreamCtrlQueue */
352#else
353 DEC_INFO("AUDPLAY1TASK", 14, 1, 11), /* AudPlay1BitStreamCtrlQueue */
354 DEC_INFO("AUDPLAY2TASK", 15, 2, 11), /* AudPlay2BitStreamCtrlQueue */
355 DEC_INFO("AUDPLAY3TASK", 16, 3, 11), /* AudPlay3BitStreamCtrlQueue */
356 DEC_INFO("AUDPLAY4TASK", 17, 4, 1), /* AudPlay4BitStreamCtrlQueue */
357#endif
358};
359
360static struct msm_adspdec_database msm_device_adspdec_database = {
361 .num_dec = ARRAY_SIZE(dec_info_list),
362 .num_concurrency_support = (ARRAY_SIZE(dec_concurrency_table) / \
363 ARRAY_SIZE(dec_info_list)),
364 .dec_concurrency_table = dec_concurrency_table,
365 .dec_info_list = dec_info_list,
366};
367
368static struct platform_device msm_device_adspdec = {
369 .name = "msm_adspdec",
370 .id = -1,
371 .dev = {
372 .platform_data = &msm_device_adspdec_database
373 },
374};
375
376static struct android_pmem_platform_data android_pmem_pdata = {
377 .name = "pmem",
378 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
379 .cached = 1,
380 .memory_type = MEMTYPE_EBI1,
381};
382
383static struct android_pmem_platform_data android_pmem_adsp_pdata = {
384 .name = "pmem_adsp",
385 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
386 .cached = 0,
387 .memory_type = MEMTYPE_EBI1,
388};
389
390static struct android_pmem_platform_data android_pmem_audio_pdata = {
391 .name = "pmem_audio",
392 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
393 .cached = 0,
394 .memory_type = MEMTYPE_EBI1,
395};
396
397static struct platform_device android_pmem_device = {
398 .name = "android_pmem",
399 .id = 0,
400 .dev = { .platform_data = &android_pmem_pdata },
401};
402
403static struct platform_device android_pmem_adsp_device = {
404 .name = "android_pmem",
405 .id = 1,
406 .dev = { .platform_data = &android_pmem_adsp_pdata },
407};
408
409static struct platform_device android_pmem_audio_device = {
410 .name = "android_pmem",
411 .id = 2,
412 .dev = { .platform_data = &android_pmem_audio_pdata },
413};
414
415static struct msm_handset_platform_data hs_platform_data = {
416 .hs_name = "7k_handset",
417 .pwr_key_delay_ms = 500, /* 0 will disable end key */
418};
419
420static struct platform_device hs_device = {
421 .name = "msm-handset",
422 .id = -1,
423 .dev = {
424 .platform_data = &hs_platform_data,
425 },
426};
427
428/* TSIF begin */
429#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
430
431#define TSIF_B_SYNC GPIO_CFG(87, 5, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
432#define TSIF_B_DATA GPIO_CFG(86, 3, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
433#define TSIF_B_EN GPIO_CFG(85, 3, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
434#define TSIF_B_CLK GPIO_CFG(84, 4, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
435
436static const struct msm_gpio tsif_gpios[] = {
437 { .gpio_cfg = TSIF_B_CLK, .label = "tsif_clk", },
438 { .gpio_cfg = TSIF_B_EN, .label = "tsif_en", },
439 { .gpio_cfg = TSIF_B_DATA, .label = "tsif_data", },
440 { .gpio_cfg = TSIF_B_SYNC, .label = "tsif_sync", },
441};
442
443static struct msm_tsif_platform_data tsif_platform_data = {
444 .num_gpios = ARRAY_SIZE(tsif_gpios),
445 .gpios = tsif_gpios,
Matt Wagantall640e5fd2011-08-17 16:08:53 -0700446 .tsif_clk = "core_clk",
447 .tsif_pclk = "iface_clk",
448 .tsif_ref_clk = "ref_clk",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700449};
450#endif /* defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE) */
451/* TSIF end */
452
453#define LCDC_CONFIG_PROC 21
454#define LCDC_UN_CONFIG_PROC 22
455#define LCDC_API_PROG 0x30000066
456#define LCDC_API_VERS 0x00010001
457
458#define GPIO_OUT_132 132
459#define GPIO_OUT_131 131
460#define GPIO_OUT_103 103
461#define GPIO_OUT_102 102
462#define GPIO_OUT_88 88
463
464static struct msm_rpc_endpoint *lcdc_ep;
465
466static int msm_fb_lcdc_config(int on)
467{
468 int rc = 0;
469 struct rpc_request_hdr hdr;
470
471 if (on)
472 pr_info("lcdc config\n");
473 else
474 pr_info("lcdc un-config\n");
475
476 lcdc_ep = msm_rpc_connect_compatible(LCDC_API_PROG, LCDC_API_VERS, 0);
477 if (IS_ERR(lcdc_ep)) {
478 printk(KERN_ERR "%s: msm_rpc_connect failed! rc = %ld\n",
479 __func__, PTR_ERR(lcdc_ep));
480 return -EINVAL;
481 }
482
483 rc = msm_rpc_call(lcdc_ep,
484 (on) ? LCDC_CONFIG_PROC : LCDC_UN_CONFIG_PROC,
485 &hdr, sizeof(hdr),
486 5 * HZ);
487 if (rc)
488 printk(KERN_ERR
489 "%s: msm_rpc_call failed! rc = %d\n", __func__, rc);
490
491 msm_rpc_close(lcdc_ep);
492 return rc;
493}
494
495static int gpio_array_num[] = {
496 GPIO_OUT_132, /* spi_clk */
497 GPIO_OUT_131, /* spi_cs */
498 GPIO_OUT_103, /* spi_sdi */
499 GPIO_OUT_102, /* spi_sdoi */
500 GPIO_OUT_88
501 };
502
503static void lcdc_gordon_gpio_init(void)
504{
505 if (gpio_request(GPIO_OUT_132, "spi_clk"))
506 pr_err("failed to request gpio spi_clk\n");
507 if (gpio_request(GPIO_OUT_131, "spi_cs"))
508 pr_err("failed to request gpio spi_cs\n");
509 if (gpio_request(GPIO_OUT_103, "spi_sdi"))
510 pr_err("failed to request gpio spi_sdi\n");
511 if (gpio_request(GPIO_OUT_102, "spi_sdoi"))
512 pr_err("failed to request gpio spi_sdoi\n");
513 if (gpio_request(GPIO_OUT_88, "gpio_dac"))
514 pr_err("failed to request gpio_dac\n");
515}
516
517static uint32_t lcdc_gpio_table[] = {
518 GPIO_CFG(GPIO_OUT_132, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
519 GPIO_CFG(GPIO_OUT_131, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
520 GPIO_CFG(GPIO_OUT_103, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
521 GPIO_CFG(GPIO_OUT_102, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
522 GPIO_CFG(GPIO_OUT_88, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
523};
524
525static void config_lcdc_gpio_table(uint32_t *table, int len, unsigned enable)
526{
527 int n, rc;
528 for (n = 0; n < len; n++) {
529 rc = gpio_tlmm_config(table[n],
530 enable ? GPIO_CFG_ENABLE : GPIO_CFG_DISABLE);
531 if (rc) {
532 printk(KERN_ERR "%s: gpio_tlmm_config(%#x)=%d\n",
533 __func__, table[n], rc);
534 break;
535 }
536 }
537}
538
539static void lcdc_gordon_config_gpios(int enable)
540{
541 config_lcdc_gpio_table(lcdc_gpio_table,
542 ARRAY_SIZE(lcdc_gpio_table), enable);
543}
544
545static char *msm_fb_lcdc_vreg[] = {
546 "gp5"
547};
548
549static int msm_fb_lcdc_power_save(int on)
550{
551 struct vreg *vreg[ARRAY_SIZE(msm_fb_lcdc_vreg)];
552 int i, rc = 0;
553
554 for (i = 0; i < ARRAY_SIZE(msm_fb_lcdc_vreg); i++) {
555 if (on) {
556 vreg[i] = vreg_get(0, msm_fb_lcdc_vreg[i]);
557 rc = vreg_enable(vreg[i]);
558 if (rc) {
559 printk(KERN_ERR "vreg_enable: %s vreg"
560 "operation failed \n",
561 msm_fb_lcdc_vreg[i]);
562 goto bail;
563 }
564 } else {
565 int tmp;
566 vreg[i] = vreg_get(0, msm_fb_lcdc_vreg[i]);
567 tmp = vreg_disable(vreg[i]);
568 if (tmp) {
569 printk(KERN_ERR "vreg_disable: %s vreg "
570 "operation failed \n",
571 msm_fb_lcdc_vreg[i]);
572 if (!rc)
573 rc = tmp;
574 }
575 tmp = gpio_tlmm_config(GPIO_CFG(GPIO_OUT_88, 0,
576 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
577 GPIO_CFG_2MA), GPIO_CFG_ENABLE);
578 if (tmp) {
579 printk(KERN_ERR "gpio_tlmm_config failed\n");
580 if (!rc)
581 rc = tmp;
582 }
583 gpio_set_value(88, 0);
584 mdelay(15);
585 gpio_set_value(88, 1);
586 mdelay(15);
587 }
588 }
589
590 return rc;
591
592bail:
593 if (on) {
594 for (; i > 0; i--)
595 vreg_disable(vreg[i - 1]);
596 }
597
598 return rc;
599}
600static struct lcdc_platform_data lcdc_pdata = {
601 .lcdc_gpio_config = msm_fb_lcdc_config,
602 .lcdc_power_save = msm_fb_lcdc_power_save,
603};
604
605static struct msm_panel_common_pdata lcdc_gordon_panel_data = {
606 .panel_config_gpio = lcdc_gordon_config_gpios,
607 .gpio_num = gpio_array_num,
608};
609
610static struct platform_device lcdc_gordon_panel_device = {
611 .name = "lcdc_gordon_vga",
612 .id = 0,
613 .dev = {
614 .platform_data = &lcdc_gordon_panel_data,
615 }
616};
617
618static struct resource msm_fb_resources[] = {
619 {
620 .flags = IORESOURCE_DMA,
621 }
622};
623
624static int msm_fb_detect_panel(const char *name)
625{
626 int ret = -EPERM;
627
628 if (machine_is_msm7x25_ffa() || machine_is_msm7x27_ffa()) {
629 if (!strcmp(name, "lcdc_gordon_vga"))
630 ret = 0;
631 else
632 ret = -ENODEV;
633 }
634
635 return ret;
636}
637
638static struct msm_fb_platform_data msm_fb_pdata = {
639 .detect_client = msm_fb_detect_panel,
640 .mddi_prescan = 1,
641};
642
643static struct platform_device msm_fb_device = {
644 .name = "msm_fb",
645 .id = 0,
646 .num_resources = ARRAY_SIZE(msm_fb_resources),
647 .resource = msm_fb_resources,
648 .dev = {
649 .platform_data = &msm_fb_pdata,
650 }
651};
652
653#ifdef CONFIG_BT
654static struct platform_device msm_bt_power_device = {
655 .name = "bt_power",
656};
657
658enum {
659 BT_WAKE,
660 BT_RFR,
661 BT_CTS,
662 BT_RX,
663 BT_TX,
664 BT_PCM_DOUT,
665 BT_PCM_DIN,
666 BT_PCM_SYNC,
667 BT_PCM_CLK,
668 BT_HOST_WAKE,
669};
670
671static unsigned bt_config_power_on[] = {
672 GPIO_CFG(42, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* WAKE */
673 GPIO_CFG(43, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* RFR */
674 GPIO_CFG(44, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* CTS */
675 GPIO_CFG(45, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* Rx */
676 GPIO_CFG(46, 3, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* Tx */
677 GPIO_CFG(68, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* PCM_DOUT */
678 GPIO_CFG(69, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* PCM_DIN */
679 GPIO_CFG(70, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* PCM_SYNC */
680 GPIO_CFG(71, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* PCM_CLK */
681 GPIO_CFG(83, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* HOST_WAKE */
682};
683static unsigned bt_config_power_off[] = {
684 GPIO_CFG(42, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* WAKE */
685 GPIO_CFG(43, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* RFR */
686 GPIO_CFG(44, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* CTS */
687 GPIO_CFG(45, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* Rx */
688 GPIO_CFG(46, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* Tx */
689 GPIO_CFG(68, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* PCM_DOUT */
690 GPIO_CFG(69, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* PCM_DIN */
691 GPIO_CFG(70, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* PCM_SYNC */
692 GPIO_CFG(71, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* PCM_CLK */
693 GPIO_CFG(83, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* HOST_WAKE */
694};
695
696static int bluetooth_power(int on)
697{
698 struct vreg *vreg_bt;
699 int pin, rc;
700
701 printk(KERN_DEBUG "%s\n", __func__);
702
703 /* do not have vreg bt defined, gp6 is the same */
704 /* vreg_get parameter 1 (struct device *) is ignored */
705 vreg_bt = vreg_get(NULL, "gp6");
706
707 if (IS_ERR(vreg_bt)) {
708 printk(KERN_ERR "%s: vreg get failed (%ld)\n",
709 __func__, PTR_ERR(vreg_bt));
710 return PTR_ERR(vreg_bt);
711 }
712
713 if (on) {
714 for (pin = 0; pin < ARRAY_SIZE(bt_config_power_on); pin++) {
715 rc = gpio_tlmm_config(bt_config_power_on[pin],
716 GPIO_CFG_ENABLE);
717 if (rc) {
718 printk(KERN_ERR
719 "%s: gpio_tlmm_config(%#x)=%d\n",
720 __func__, bt_config_power_on[pin], rc);
721 return -EIO;
722 }
723 }
724
725 /* units of mV, steps of 50 mV */
726 rc = vreg_set_level(vreg_bt, 2600);
727 if (rc) {
728 printk(KERN_ERR "%s: vreg set level failed (%d)\n",
729 __func__, rc);
730 return -EIO;
731 }
732 rc = vreg_enable(vreg_bt);
733 if (rc) {
734 printk(KERN_ERR "%s: vreg enable failed (%d)\n",
735 __func__, rc);
736 return -EIO;
737 }
738 } else {
739 rc = vreg_disable(vreg_bt);
740 if (rc) {
741 printk(KERN_ERR "%s: vreg disable failed (%d)\n",
742 __func__, rc);
743 return -EIO;
744 }
745 for (pin = 0; pin < ARRAY_SIZE(bt_config_power_off); pin++) {
746 rc = gpio_tlmm_config(bt_config_power_off[pin],
747 GPIO_CFG_ENABLE);
748 if (rc) {
749 printk(KERN_ERR
750 "%s: gpio_tlmm_config(%#x)=%d\n",
751 __func__, bt_config_power_off[pin], rc);
752 return -EIO;
753 }
754 }
755 }
756 return 0;
757}
758
759static void __init bt_power_init(void)
760{
761 msm_bt_power_device.dev.platform_data = &bluetooth_power;
762}
763#else
764#define bt_power_init(x) do {} while (0)
765#endif
766
767static struct platform_device msm_device_pmic_leds = {
768 .name = "pmic-leds",
769 .id = -1,
770};
771
772static struct resource bluesleep_resources[] = {
773 {
774 .name = "gpio_host_wake",
775 .start = 83,
776 .end = 83,
777 .flags = IORESOURCE_IO,
778 },
779 {
780 .name = "gpio_ext_wake",
781 .start = 42,
782 .end = 42,
783 .flags = IORESOURCE_IO,
784 },
785 {
786 .name = "host_wake",
787 .start = MSM_GPIO_TO_INT(83),
788 .end = MSM_GPIO_TO_INT(83),
789 .flags = IORESOURCE_IRQ,
790 },
791};
792
793static struct platform_device msm_bluesleep_device = {
794 .name = "bluesleep",
795 .id = -1,
796 .num_resources = ARRAY_SIZE(bluesleep_resources),
797 .resource = bluesleep_resources,
798};
799
800static struct i2c_board_info i2c_devices[] = {
801#ifdef CONFIG_MT9D112
802 {
803 I2C_BOARD_INFO("mt9d112", 0x78 >> 1),
804 },
805#endif
806#ifdef CONFIG_S5K3E2FX
807 {
808 I2C_BOARD_INFO("s5k3e2fx", 0x20 >> 1),
809 },
810#endif
811#ifdef CONFIG_MT9P012
812 {
813 I2C_BOARD_INFO("mt9p012", 0x6C >> 1),
814 },
815#endif
816#ifdef CONFIG_MT9P012_KM
817 {
818 I2C_BOARD_INFO("mt9p012_km", 0x6C >> 2),
819 },
820#endif
821#if defined(CONFIG_MT9T013) || defined(CONFIG_SENSORS_MT9T013)
822 {
823 I2C_BOARD_INFO("mt9t013", 0x6C),
824 },
825#endif
826#ifdef CONFIG_VB6801
827 {
828 I2C_BOARD_INFO("vb6801", 0x20),
829 },
830#endif
831};
832
833#ifdef CONFIG_MSM_CAMERA
834static uint32_t camera_off_gpio_table[] = {
835 /* parallel CAMERA interfaces */
836 GPIO_CFG(0, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT0 */
837 GPIO_CFG(1, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT1 */
838 GPIO_CFG(2, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT2 */
839 GPIO_CFG(3, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT3 */
840 GPIO_CFG(4, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT4 */
841 GPIO_CFG(5, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT5 */
842 GPIO_CFG(6, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT6 */
843 GPIO_CFG(7, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT7 */
844 GPIO_CFG(8, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT8 */
845 GPIO_CFG(9, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT9 */
846 GPIO_CFG(10, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT10 */
847 GPIO_CFG(11, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT11 */
848 GPIO_CFG(12, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* PCLK */
849 GPIO_CFG(13, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* HSYNC_IN */
850 GPIO_CFG(14, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* VSYNC_IN */
851 GPIO_CFG(15, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* MCLK */
852};
853
854static uint32_t camera_on_gpio_table[] = {
855 /* parallel CAMERA interfaces */
856 GPIO_CFG(0, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT0 */
857 GPIO_CFG(1, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT1 */
858 GPIO_CFG(2, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT2 */
859 GPIO_CFG(3, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT3 */
860 GPIO_CFG(4, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT4 */
861 GPIO_CFG(5, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT5 */
862 GPIO_CFG(6, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT6 */
863 GPIO_CFG(7, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT7 */
864 GPIO_CFG(8, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT8 */
865 GPIO_CFG(9, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT9 */
866 GPIO_CFG(10, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT10 */
867 GPIO_CFG(11, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT11 */
868 GPIO_CFG(12, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_16MA), /* PCLK */
869 GPIO_CFG(13, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* HSYNC_IN */
870 GPIO_CFG(14, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* VSYNC_IN */
871 GPIO_CFG(15, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_16MA), /* MCLK */
872 };
873
874static void config_gpio_table(uint32_t *table, int len)
875{
876 int n, rc;
877 for (n = 0; n < len; n++) {
878 rc = gpio_tlmm_config(table[n], GPIO_CFG_ENABLE);
879 if (rc) {
880 printk(KERN_ERR "%s: gpio_tlmm_config(%#x)=%d\n",
881 __func__, table[n], rc);
882 break;
883 }
884 }
885}
886
887static struct vreg *vreg_gp2;
888static struct vreg *vreg_gp3;
889
890static void msm_camera_vreg_config(int vreg_en)
891{
892 int rc;
893
894 if (vreg_gp2 == NULL) {
895 vreg_gp2 = vreg_get(NULL, "gp2");
896 if (IS_ERR(vreg_gp2)) {
897 printk(KERN_ERR "%s: vreg_get(%s) failed (%ld)\n",
898 __func__, "gp2", PTR_ERR(vreg_gp2));
899 return;
900 }
901
902 rc = vreg_set_level(vreg_gp2, 1800);
903 if (rc) {
904 printk(KERN_ERR "%s: GP2 set_level failed (%d)\n",
905 __func__, rc);
906 }
907 }
908
909 if (vreg_gp3 == NULL) {
910 vreg_gp3 = vreg_get(NULL, "gp3");
911 if (IS_ERR(vreg_gp3)) {
912 printk(KERN_ERR "%s: vreg_get(%s) failed (%ld)\n",
913 __func__, "gp3", PTR_ERR(vreg_gp3));
914 return;
915 }
916
917 rc = vreg_set_level(vreg_gp3, 2850);
918 if (rc) {
919 printk(KERN_ERR "%s: GP3 set level failed (%d)\n",
920 __func__, rc);
921 }
922 }
923
924 if (vreg_en) {
925 rc = vreg_enable(vreg_gp2);
926 if (rc) {
927 printk(KERN_ERR "%s: GP2 enable failed (%d)\n",
928 __func__, rc);
929 }
930
931 rc = vreg_enable(vreg_gp3);
932 if (rc) {
933 printk(KERN_ERR "%s: GP3 enable failed (%d)\n",
934 __func__, rc);
935 }
936 } else {
937 rc = vreg_disable(vreg_gp2);
938 if (rc) {
939 printk(KERN_ERR "%s: GP2 disable failed (%d)\n",
940 __func__, rc);
941 }
942
943 rc = vreg_disable(vreg_gp3);
944 if (rc) {
945 printk(KERN_ERR "%s: GP3 disable failed (%d)\n",
946 __func__, rc);
947 }
948 }
949}
950
951static int config_camera_on_gpios(void)
952{
953 int vreg_en = 1;
954
955 if (machine_is_msm7x25_ffa() ||
956 machine_is_msm7x27_ffa())
957 msm_camera_vreg_config(vreg_en);
958
959 config_gpio_table(camera_on_gpio_table,
960 ARRAY_SIZE(camera_on_gpio_table));
961 return 0;
962}
963
964static void config_camera_off_gpios(void)
965{
966 int vreg_en = 0;
967
968 if (machine_is_msm7x25_ffa() ||
969 machine_is_msm7x27_ffa())
970 msm_camera_vreg_config(vreg_en);
971
972 config_gpio_table(camera_off_gpio_table,
973 ARRAY_SIZE(camera_off_gpio_table));
974}
975
976static struct msm_camera_device_platform_data msm_camera_device_data = {
977 .camera_gpio_on = config_camera_on_gpios,
978 .camera_gpio_off = config_camera_off_gpios,
979 .ioext.mdcphy = MSM_MDC_PHYS,
980 .ioext.mdcsz = MSM_MDC_SIZE,
981 .ioext.appphy = MSM_CLK_CTL_PHYS,
982 .ioext.appsz = MSM_CLK_CTL_SIZE,
983};
984
985int pmic_set_flash_led_current(enum pmic8058_leds id, unsigned mA)
986{
987 int rc;
988 rc = pmic_flash_led_set_current(mA);
989 return rc;
990}
991
992static struct msm_camera_sensor_flash_src msm_flash_src = {
993 .flash_sr_type = MSM_CAMERA_FLASH_SRC_PMIC,
994 ._fsrc.pmic_src.num_of_src = 1,
995 ._fsrc.pmic_src.low_current = 30,
996 ._fsrc.pmic_src.high_current = 100,
997 ._fsrc.pmic_src.led_src_1 = 0,
998 ._fsrc.pmic_src.led_src_2 = 0,
999 ._fsrc.pmic_src.pmic_set_current = pmic_set_flash_led_current,
1000};
1001
1002#ifdef CONFIG_MT9D112
1003static struct msm_camera_sensor_flash_data flash_mt9d112 = {
1004 .flash_type = MSM_CAMERA_FLASH_LED,
1005 .flash_src = &msm_flash_src
1006};
1007
1008static struct msm_camera_sensor_info msm_camera_sensor_mt9d112_data = {
1009 .sensor_name = "mt9d112",
1010 .sensor_reset = 89,
1011 .sensor_pwd = 85,
1012 .vcm_pwd = 0,
1013 .vcm_enable = 0,
1014 .pdata = &msm_camera_device_data,
1015 .flash_data = &flash_mt9d112
1016};
1017
1018static struct platform_device msm_camera_sensor_mt9d112 = {
1019 .name = "msm_camera_mt9d112",
1020 .dev = {
1021 .platform_data = &msm_camera_sensor_mt9d112_data,
1022 },
1023};
1024#endif
1025
1026#ifdef CONFIG_S5K3E2FX
1027static struct msm_camera_sensor_flash_data flash_s5k3e2fx = {
1028 .flash_type = MSM_CAMERA_FLASH_LED,
1029 .flash_src = &msm_flash_src
1030};
1031
1032static struct msm_camera_sensor_info msm_camera_sensor_s5k3e2fx_data = {
1033 .sensor_name = "s5k3e2fx",
1034 .sensor_reset = 89,
1035 .sensor_pwd = 85,
1036 .vcm_pwd = 0,
1037 .vcm_enable = 0,
1038 .pdata = &msm_camera_device_data,
1039 .flash_data = &flash_s5k3e2fx
1040};
1041
1042static struct platform_device msm_camera_sensor_s5k3e2fx = {
1043 .name = "msm_camera_s5k3e2fx",
1044 .dev = {
1045 .platform_data = &msm_camera_sensor_s5k3e2fx_data,
1046 },
1047};
1048#endif
1049
1050#ifdef CONFIG_MT9P012
1051static struct msm_camera_sensor_flash_data flash_mt9p012 = {
1052 .flash_type = MSM_CAMERA_FLASH_LED,
1053 .flash_src = &msm_flash_src
1054};
1055
1056static struct msm_camera_sensor_info msm_camera_sensor_mt9p012_data = {
1057 .sensor_name = "mt9p012",
1058 .sensor_reset = 89,
1059 .sensor_pwd = 85,
1060 .vcm_pwd = 88,
1061 .vcm_enable = 0,
1062 .pdata = &msm_camera_device_data,
1063 .flash_data = &flash_mt9p012
1064};
1065
1066static struct platform_device msm_camera_sensor_mt9p012 = {
1067 .name = "msm_camera_mt9p012",
1068 .dev = {
1069 .platform_data = &msm_camera_sensor_mt9p012_data,
1070 },
1071};
1072#endif
1073
1074#ifdef CONFIG_MT9P012_KM
1075static struct msm_camera_sensor_flash_data flash_mt9p012_km = {
1076 .flash_type = MSM_CAMERA_FLASH_LED,
1077 .flash_src = &msm_flash_src
1078};
1079
1080static struct msm_camera_sensor_info msm_camera_sensor_mt9p012_km_data = {
1081 .sensor_name = "mt9p012_km",
1082 .sensor_reset = 89,
1083 .sensor_pwd = 85,
1084 .vcm_pwd = 88,
1085 .vcm_enable = 0,
1086 .pdata = &msm_camera_device_data,
1087 .flash_data = &flash_mt9p012_km
1088};
1089
1090static struct platform_device msm_camera_sensor_mt9p012_km = {
1091 .name = "msm_camera_mt9p012_km",
1092 .dev = {
1093 .platform_data = &msm_camera_sensor_mt9p012_km_data,
1094 },
1095};
1096#endif
1097
1098#ifdef CONFIG_MT9T013
1099static struct msm_camera_sensor_flash_data flash_mt9t013 = {
1100 .flash_type = MSM_CAMERA_FLASH_LED,
1101 .flash_src = &msm_flash_src
1102};
1103
1104static struct msm_camera_sensor_info msm_camera_sensor_mt9t013_data = {
1105 .sensor_name = "mt9t013",
1106 .sensor_reset = 89,
1107 .sensor_pwd = 85,
1108 .vcm_pwd = 0,
1109 .vcm_enable = 0,
1110 .pdata = &msm_camera_device_data,
1111 .flash_data = &flash_mt9t013
1112};
1113
1114static struct platform_device msm_camera_sensor_mt9t013 = {
1115 .name = "msm_camera_mt9t013",
1116 .dev = {
1117 .platform_data = &msm_camera_sensor_mt9t013_data,
1118 },
1119};
1120#endif
1121
1122#ifdef CONFIG_VB6801
1123static struct msm_camera_sensor_flash_data flash_vb6801 = {
1124 .flash_type = MSM_CAMERA_FLASH_LED,
1125 .flash_src = &msm_flash_src
1126};
1127
1128static struct msm_camera_sensor_info msm_camera_sensor_vb6801_data = {
1129 .sensor_name = "vb6801",
1130 .sensor_reset = 89,
1131 .sensor_pwd = 88,
1132 .vcm_pwd = 0,
1133 .vcm_enable = 0,
1134 .pdata = &msm_camera_device_data,
1135 .flash_data = &flash_vb6801
1136};
1137
1138static struct platform_device msm_camera_sensor_vb6801 = {
1139 .name = "msm_camera_vb6801",
1140 .dev = {
1141 .platform_data = &msm_camera_sensor_vb6801_data,
1142 },
1143};
1144#endif
1145#endif
1146
1147static u32 msm_calculate_batt_capacity(u32 current_voltage);
1148
1149static struct msm_psy_batt_pdata msm_psy_batt_data = {
1150 .voltage_min_design = 2800,
1151 .voltage_max_design = 4300,
1152 .avail_chg_sources = AC_CHG | USB_CHG ,
1153 .batt_technology = POWER_SUPPLY_TECHNOLOGY_LION,
1154 .calculate_capacity = &msm_calculate_batt_capacity,
1155};
1156
1157static u32 msm_calculate_batt_capacity(u32 current_voltage)
1158{
1159 u32 low_voltage = msm_psy_batt_data.voltage_min_design;
1160 u32 high_voltage = msm_psy_batt_data.voltage_max_design;
1161
1162 return (current_voltage - low_voltage) * 100
1163 / (high_voltage - low_voltage);
1164}
1165
1166static struct platform_device msm_batt_device = {
1167 .name = "msm-battery",
1168 .id = -1,
1169 .dev.platform_data = &msm_psy_batt_data,
1170};
1171
1172
Daniel Walker2682fd32010-02-24 15:47:58 -08001173static struct platform_device *devices[] __initdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001174 &asoc_msm_pcm,
1175 &asoc_msm_dai0,
1176 &asoc_msm_dai1,
1177
Daniel Walker2682fd32010-02-24 15:47:58 -08001178 &msm_device_smd,
1179 &msm_device_dmov,
1180 &msm_device_nand,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001181
1182#ifdef CONFIG_USB_MSM_OTG_72K
1183 &msm_device_otg,
1184#ifdef CONFIG_USB_GADGET
1185 &msm_device_gadget_peripheral,
1186#endif
1187#endif
1188
Manu Gautam99ed3912011-10-13 18:00:55 +05301189#ifdef CONFIG_USB_G_ANDROID
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001190 &android_usb_device,
1191#endif
Manu Gautam99ed3912011-10-13 18:00:55 +05301192
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001193 &msm_device_i2c,
Daniel Walker2682fd32010-02-24 15:47:58 -08001194 &smc91x_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001195 &msm_device_tssc,
1196 &android_pmem_device,
1197 &android_pmem_adsp_device,
1198 &android_pmem_audio_device,
1199 &msm_fb_device,
1200 &lcdc_gordon_panel_device,
1201 &msm_device_uart_dm1,
1202#ifdef CONFIG_BT
1203 &msm_bt_power_device,
1204#endif
1205 &msm_device_pmic_leds,
1206 &msm_device_snd,
1207 &msm_device_adspdec,
1208#ifdef CONFIG_MT9T013
1209 &msm_camera_sensor_mt9t013,
1210#endif
1211#ifdef CONFIG_MT9D112
1212 &msm_camera_sensor_mt9d112,
1213#endif
1214#ifdef CONFIG_S5K3E2FX
1215 &msm_camera_sensor_s5k3e2fx,
1216#endif
1217#ifdef CONFIG_MT9P012
1218 &msm_camera_sensor_mt9p012,
1219#endif
1220#ifdef CONFIG_MT9P012_KM
1221 &msm_camera_sensor_mt9p012_km,
1222#endif
1223#ifdef CONFIG_VB6801
1224 &msm_camera_sensor_vb6801,
1225#endif
1226 &msm_bluesleep_device,
1227#ifdef CONFIG_ARCH_MSM7X27
1228 &msm_kgsl_3d0,
1229#endif
1230#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
1231 &msm_device_tsif,
1232#endif
1233 &hs_device,
1234 &msm_batt_device,
Daniel Walker2682fd32010-02-24 15:47:58 -08001235};
1236
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001237static struct msm_panel_common_pdata mdp_pdata = {
1238 .gpio = 97,
Ravishangar Kalyanam07ef7882011-08-09 15:50:48 -07001239 .mdp_rev = MDP_REV_30,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001240};
1241
1242static void __init msm_fb_add_devices(void)
1243{
1244 msm_fb_register_device("mdp", &mdp_pdata);
1245 msm_fb_register_device("pmdh", 0);
1246 msm_fb_register_device("lcdc", &lcdc_pdata);
1247}
1248
Daniel Walker2682fd32010-02-24 15:47:58 -08001249extern struct sys_timer msm_timer;
1250
1251static void __init msm7x2x_init_irq(void)
1252{
1253 msm_init_irq();
1254}
1255
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001256void msm_serial_debug_init(unsigned int base, int irq,
1257 struct device *clk_device, int signal_irq);
1258
1259#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
1260 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
1261 || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
1262 || defined(CONFIG_MMC_MSM_SDC4_SUPPORT))
1263
1264static unsigned long vreg_sts, gpio_sts;
1265static struct vreg *vreg_mmc;
1266static unsigned mpp_mmc = 2;
1267
1268struct sdcc_gpio {
1269 struct msm_gpio *cfg_data;
1270 uint32_t size;
1271 struct msm_gpio *sleep_cfg_data;
1272};
1273
1274static struct msm_gpio sdc1_cfg_data[] = {
1275 {GPIO_CFG(51, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc1_dat_3"},
1276 {GPIO_CFG(52, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc1_dat_2"},
1277 {GPIO_CFG(53, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc1_dat_1"},
1278 {GPIO_CFG(54, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc1_dat_0"},
1279 {GPIO_CFG(55, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc1_cmd"},
1280 {GPIO_CFG(56, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), "sdc1_clk"},
1281};
1282
1283static struct msm_gpio sdc2_cfg_data[] = {
1284 {GPIO_CFG(62, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), "sdc2_clk"},
1285 {GPIO_CFG(63, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc2_cmd"},
1286 {GPIO_CFG(64, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc2_dat_3"},
1287 {GPIO_CFG(65, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc2_dat_2"},
1288 {GPIO_CFG(66, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc2_dat_1"},
1289 {GPIO_CFG(67, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc2_dat_0"},
1290};
1291
1292static struct msm_gpio sdc2_sleep_cfg_data[] = {
1293 {GPIO_CFG(62, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), "sdc2_clk"},
1294 {GPIO_CFG(63, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), "sdc2_cmd"},
1295 {GPIO_CFG(64, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), "sdc2_dat_3"},
1296 {GPIO_CFG(65, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), "sdc2_dat_2"},
1297 {GPIO_CFG(66, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), "sdc2_dat_1"},
1298 {GPIO_CFG(67, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), "sdc2_dat_0"},
1299};
1300static struct msm_gpio sdc3_cfg_data[] = {
1301 {GPIO_CFG(88, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), "sdc3_clk"},
1302 {GPIO_CFG(89, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc3_cmd"},
1303 {GPIO_CFG(90, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc3_dat_3"},
1304 {GPIO_CFG(91, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc3_dat_2"},
1305 {GPIO_CFG(92, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc3_dat_1"},
1306 {GPIO_CFG(93, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc3_dat_0"},
1307};
1308
1309static struct msm_gpio sdc4_cfg_data[] = {
1310 {GPIO_CFG(19, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc4_dat_3"},
1311 {GPIO_CFG(20, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc4_dat_2"},
1312 {GPIO_CFG(21, 4, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc4_dat_1"},
1313 {GPIO_CFG(107, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc4_cmd"},
1314 {GPIO_CFG(108, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc4_dat_0"},
1315 {GPIO_CFG(109, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), "sdc4_clk"},
1316};
1317
1318static struct sdcc_gpio sdcc_cfg_data[] = {
1319 {
1320 .cfg_data = sdc1_cfg_data,
1321 .size = ARRAY_SIZE(sdc1_cfg_data),
1322 .sleep_cfg_data = NULL,
1323 },
1324 {
1325 .cfg_data = sdc2_cfg_data,
1326 .size = ARRAY_SIZE(sdc2_cfg_data),
1327 .sleep_cfg_data = sdc2_sleep_cfg_data,
1328 },
1329 {
1330 .cfg_data = sdc3_cfg_data,
1331 .size = ARRAY_SIZE(sdc3_cfg_data),
1332 .sleep_cfg_data = NULL,
1333 },
1334 {
1335 .cfg_data = sdc4_cfg_data,
1336 .size = ARRAY_SIZE(sdc4_cfg_data),
1337 .sleep_cfg_data = NULL,
1338 },
1339};
1340
1341static void msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
1342{
1343 int rc = 0;
1344 struct sdcc_gpio *curr;
1345
1346 curr = &sdcc_cfg_data[dev_id - 1];
1347 if (!(test_bit(dev_id, &gpio_sts)^enable))
1348 return;
1349
1350 if (enable) {
1351 set_bit(dev_id, &gpio_sts);
1352 rc = msm_gpios_request_enable(curr->cfg_data, curr->size);
1353 if (rc)
1354 printk(KERN_ERR "%s: Failed to turn on GPIOs for slot %d\n",
1355 __func__, dev_id);
1356 } else {
1357 clear_bit(dev_id, &gpio_sts);
1358 if (curr->sleep_cfg_data) {
1359 msm_gpios_enable(curr->sleep_cfg_data, curr->size);
1360 msm_gpios_free(curr->sleep_cfg_data, curr->size);
1361 return;
1362 }
1363 msm_gpios_disable_free(curr->cfg_data, curr->size);
1364 }
1365}
1366
1367static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
1368{
1369 int rc = 0;
1370 struct platform_device *pdev;
1371
1372 pdev = container_of(dv, struct platform_device, dev);
1373 msm_sdcc_setup_gpio(pdev->id, !!vdd);
1374
1375 if (vdd == 0) {
1376 if (!vreg_sts)
1377 return 0;
1378
1379 clear_bit(pdev->id, &vreg_sts);
1380
1381 if (!vreg_sts) {
1382 if (machine_is_msm7x25_ffa() ||
1383 machine_is_msm7x27_ffa()) {
1384 rc = mpp_config_digital_out(mpp_mmc,
1385 MPP_CFG(MPP_DLOGIC_LVL_MSMP,
1386 MPP_DLOGIC_OUT_CTRL_LOW));
1387 } else
1388 rc = vreg_disable(vreg_mmc);
1389 if (rc)
1390 printk(KERN_ERR "%s: return val: %d \n",
1391 __func__, rc);
1392 }
1393 return 0;
1394 }
1395
1396 if (!vreg_sts) {
1397 if (machine_is_msm7x25_ffa() || machine_is_msm7x27_ffa()) {
1398 rc = mpp_config_digital_out(mpp_mmc,
1399 MPP_CFG(MPP_DLOGIC_LVL_MSMP,
1400 MPP_DLOGIC_OUT_CTRL_HIGH));
1401 } else {
1402 rc = vreg_set_level(vreg_mmc, 2850);
1403 if (!rc)
1404 rc = vreg_enable(vreg_mmc);
1405 }
1406 if (rc)
1407 printk(KERN_ERR "%s: return val: %d \n",
1408 __func__, rc);
1409 }
1410 set_bit(pdev->id, &vreg_sts);
1411 return 0;
1412}
1413
1414#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
1415static struct mmc_platform_data msm7x2x_sdc1_data = {
1416 .ocr_mask = MMC_VDD_28_29,
1417 .translate_vdd = msm_sdcc_setup_power,
1418 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1419 .msmsdcc_fmin = 144000,
1420 .msmsdcc_fmid = 24576000,
1421 .msmsdcc_fmax = 49152000,
1422 .nonremovable = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001423};
1424#endif
1425
1426#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
1427static struct mmc_platform_data msm7x2x_sdc2_data = {
1428 .ocr_mask = MMC_VDD_28_29,
1429 .translate_vdd = msm_sdcc_setup_power,
1430 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1431#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
1432 .sdiowakeup_irq = MSM_GPIO_TO_INT(66),
1433#endif
1434 .msmsdcc_fmin = 144000,
1435 .msmsdcc_fmid = 24576000,
1436 .msmsdcc_fmax = 49152000,
1437 .nonremovable = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001438};
1439#endif
1440
1441#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
1442static struct mmc_platform_data msm7x2x_sdc3_data = {
1443 .ocr_mask = MMC_VDD_28_29,
1444 .translate_vdd = msm_sdcc_setup_power,
1445 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1446 .msmsdcc_fmin = 144000,
1447 .msmsdcc_fmid = 24576000,
1448 .msmsdcc_fmax = 49152000,
1449 .nonremovable = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001450};
1451#endif
1452
1453#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
1454static struct mmc_platform_data msm7x2x_sdc4_data = {
1455 .ocr_mask = MMC_VDD_28_29,
1456 .translate_vdd = msm_sdcc_setup_power,
1457 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1458 .msmsdcc_fmin = 144000,
1459 .msmsdcc_fmid = 24576000,
1460 .msmsdcc_fmax = 49152000,
1461 .nonremovable = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001462};
1463#endif
1464
1465static void __init msm7x2x_init_mmc(void)
1466{
1467 if (!machine_is_msm7x25_ffa() && !machine_is_msm7x27_ffa()) {
1468 vreg_mmc = vreg_get(NULL, "mmc");
1469 if (IS_ERR(vreg_mmc)) {
1470 printk(KERN_ERR "%s: vreg get failed (%ld)\n",
1471 __func__, PTR_ERR(vreg_mmc));
1472 return;
1473 }
1474 }
1475
1476#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
1477 msm_add_sdcc(1, &msm7x2x_sdc1_data);
1478#endif
1479
1480 if (machine_is_msm7x25_surf() || machine_is_msm7x27_surf() ||
1481 machine_is_msm7x27_ffa()) {
1482#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
1483 msm_sdcc_setup_gpio(2, 1);
1484 msm_add_sdcc(2, &msm7x2x_sdc2_data);
1485#endif
1486 }
1487
1488 if (machine_is_msm7x25_surf() || machine_is_msm7x27_surf()) {
1489#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
1490 msm_add_sdcc(3, &msm7x2x_sdc3_data);
1491#endif
1492#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
1493 msm_add_sdcc(4, &msm7x2x_sdc4_data);
1494#endif
1495 }
1496}
1497#else
1498#define msm7x2x_init_mmc() do {} while (0)
1499#endif
1500
1501
1502static struct msm_pm_platform_data msm7x25_pm_data[MSM_PM_SLEEP_MODE_NR] = {
1503 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].latency = 16000,
1504
1505 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN].latency = 12000,
1506
1507 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency = 2000,
1508};
1509
1510static struct msm_pm_platform_data msm7x27_pm_data[MSM_PM_SLEEP_MODE_NR] = {
1511 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE] = {
1512 .idle_supported = 1,
1513 .suspend_supported = 1,
1514 .idle_enabled = 1,
1515 .suspend_enabled = 1,
1516 .latency = 16000,
1517 .residency = 20000,
1518 },
1519
1520 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN] = {
1521 .idle_supported = 1,
1522 .suspend_supported = 1,
1523 .idle_enabled = 1,
1524 .suspend_enabled = 1,
1525 .latency = 12000,
1526 .residency = 20000,
1527 },
1528
1529 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT] = {
1530 .idle_supported = 1,
1531 .suspend_supported = 1,
1532 .idle_enabled = 1,
1533 .suspend_enabled = 1,
1534 .latency = 2000,
1535 .residency = 0,
1536 },
1537};
1538
1539static void
1540msm_i2c_gpio_config(int iface, int config_type)
1541{
1542 int gpio_scl;
1543 int gpio_sda;
1544 if (iface) {
1545 gpio_scl = 95;
1546 gpio_sda = 96;
1547 } else {
1548 gpio_scl = 60;
1549 gpio_sda = 61;
1550 }
1551 if (config_type) {
1552 gpio_tlmm_config(GPIO_CFG(gpio_scl, 1, GPIO_CFG_INPUT,
1553 GPIO_CFG_NO_PULL, GPIO_CFG_16MA), GPIO_CFG_ENABLE);
1554 gpio_tlmm_config(GPIO_CFG(gpio_sda, 1, GPIO_CFG_INPUT,
1555 GPIO_CFG_NO_PULL, GPIO_CFG_16MA), GPIO_CFG_ENABLE);
1556 } else {
1557 gpio_tlmm_config(GPIO_CFG(gpio_scl, 0, GPIO_CFG_OUTPUT,
1558 GPIO_CFG_NO_PULL, GPIO_CFG_16MA), GPIO_CFG_ENABLE);
1559 gpio_tlmm_config(GPIO_CFG(gpio_sda, 0, GPIO_CFG_OUTPUT,
1560 GPIO_CFG_NO_PULL, GPIO_CFG_16MA), GPIO_CFG_ENABLE);
1561 }
1562}
1563
1564static struct msm_i2c_platform_data msm_i2c_pdata = {
1565 .clk_freq = 100000,
1566 .rmutex = 0,
1567 .pri_clk = 60,
1568 .pri_dat = 61,
1569 .aux_clk = 95,
1570 .aux_dat = 96,
1571 .msm_i2c_config_gpio = msm_i2c_gpio_config,
1572};
Pankaj Kumar75c86fd2011-10-01 18:51:09 +05301573static struct platform_device msm_proccomm_regulator_dev = {
1574 .name = PROCCOMM_REGULATOR_DEV_NAME,
1575 .id = -1,
1576 .dev = {
1577 .platform_data = &msm7627_proccomm_regulator_data
1578 }
1579};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001580
Pankaj Kumar75c86fd2011-10-01 18:51:09 +05301581static void __init msm7627_init_regulators(void)
1582{
1583 int rc = platform_device_register(&msm_proccomm_regulator_dev);
1584 if (rc)
1585 pr_err("%s: could not register regulator device: %d\n",
1586 __func__, rc);
1587}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001588static void __init msm_device_i2c_init(void)
1589{
1590 if (gpio_request(60, "i2c_pri_clk"))
1591 pr_err("failed to request gpio i2c_pri_clk\n");
1592 if (gpio_request(61, "i2c_pri_dat"))
1593 pr_err("failed to request gpio i2c_pri_dat\n");
1594 if (gpio_request(95, "i2c_sec_clk"))
1595 pr_err("failed to request gpio i2c_sec_clk\n");
1596 if (gpio_request(96, "i2c_sec_dat"))
1597 pr_err("failed to request gpio i2c_sec_dat\n");
1598
1599 if (cpu_is_msm7x27())
1600 msm_i2c_pdata.pm_lat =
1601 msm7x27_pm_data[MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN]
1602 .latency;
1603 else
1604 msm_i2c_pdata.pm_lat =
1605 msm7x25_pm_data[MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN]
1606 .latency;
1607
1608 msm_device_i2c.dev.platform_data = &msm_i2c_pdata;
1609}
1610
1611static void usb_mpp_init(void)
1612{
1613 unsigned rc;
1614 unsigned mpp_usb = 7;
1615
1616 if (machine_is_msm7x25_ffa() || machine_is_msm7x27_ffa()) {
1617 rc = mpp_config_digital_out(mpp_usb,
1618 MPP_CFG(MPP_DLOGIC_LVL_VDD,
1619 MPP_DLOGIC_OUT_CTRL_HIGH));
1620 if (rc)
1621 pr_err("%s: configuring mpp pin"
1622 "to enable 3.3V LDO failed\n", __func__);
1623 }
1624}
1625
1626static void msm7x27_wlan_init(void)
1627{
1628 int rc = 0;
1629 /* TBD: if (machine_is_msm7x27_ffa_with_wcn1312()) */
1630 if (machine_is_msm7x27_ffa()) {
1631 rc = mpp_config_digital_out(3, MPP_CFG(MPP_DLOGIC_LVL_MSMP,
1632 MPP_DLOGIC_OUT_CTRL_LOW));
1633 if (rc)
1634 printk(KERN_ERR "%s: return val: %d \n",
1635 __func__, rc);
1636 }
1637}
1638
Daniel Walker2682fd32010-02-24 15:47:58 -08001639static void __init msm7x2x_init(void)
1640{
Daniel Walker2682fd32010-02-24 15:47:58 -08001641
Pankaj Kumar75c86fd2011-10-01 18:51:09 +05301642 msm7627_init_regulators();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001643#ifdef CONFIG_ARCH_MSM7X25
1644 msm_clock_init(msm_clocks_7x25, msm_num_clocks_7x25);
1645#elif defined(CONFIG_ARCH_MSM7X27)
Stephen Boydbb600ae2011-08-02 20:11:40 -07001646 msm_clock_init(&msm7x27_clock_init_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001647#endif
1648
1649#if defined(CONFIG_SMC91X)
Daniel Walker2682fd32010-02-24 15:47:58 -08001650 if (machine_is_msm7x25_ffa() || machine_is_msm7x27_ffa()) {
1651 smc91x_resources[0].start = 0x98000300;
1652 smc91x_resources[0].end = 0x980003ff;
1653 smc91x_resources[1].start = MSM_GPIO_TO_INT(85);
1654 smc91x_resources[1].end = MSM_GPIO_TO_INT(85);
1655 if (gpio_tlmm_config(GPIO_CFG(85, 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001656 GPIO_CFG_INPUT,
1657 GPIO_CFG_PULL_DOWN,
1658 GPIO_CFG_2MA),
1659 GPIO_CFG_ENABLE)) {
Daniel Walker2682fd32010-02-24 15:47:58 -08001660 printk(KERN_ERR
1661 "%s: Err: Config GPIO-85 INT\n",
1662 __func__);
1663 }
1664 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001665#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001666 if (cpu_is_msm7x27())
Matt Wagantallec57f062011-08-16 23:54:46 -07001667 acpuclk_init(&acpuclk_7x27_soc_data);
1668 else
1669 acpuclk_init(&acpuclk_7201_soc_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001670
1671 usb_mpp_init();
1672
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001673
1674#ifdef CONFIG_USB_MSM_OTG_72K
1675 msm_device_otg.dev.platform_data = &msm_otg_pdata;
1676 if (machine_is_msm7x25_surf() || machine_is_msm7x25_ffa()) {
1677 msm_otg_pdata.pemp_level =
1678 PRE_EMPHASIS_WITH_20_PERCENT;
1679 msm_otg_pdata.drv_ampl = HS_DRV_AMPLITUDE_5_PERCENT;
1680 msm_otg_pdata.cdr_autoreset = CDR_AUTO_RESET_ENABLE;
1681 msm_otg_pdata.phy_reset = msm_otg_rpc_phy_reset;
1682 }
1683 if (machine_is_msm7x27_surf() || machine_is_msm7x27_ffa()) {
1684 msm_otg_pdata.pemp_level =
1685 PRE_EMPHASIS_WITH_10_PERCENT;
1686 msm_otg_pdata.drv_ampl = HS_DRV_AMPLITUDE_5_PERCENT;
1687 msm_otg_pdata.cdr_autoreset = CDR_AUTO_RESET_DISABLE;
1688 msm_otg_pdata.phy_reset_sig_inverted = 1;
1689 }
1690
1691#ifdef CONFIG_USB_GADGET
1692 msm_otg_pdata.swfi_latency =
1693 msm7x27_pm_data
1694 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency;
1695 msm_device_gadget_peripheral.dev.platform_data = &msm_gadget_pdata;
1696 msm_gadget_pdata.is_phy_status_timer_on = 1;
1697#endif
1698#endif
1699#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
1700 msm_device_tsif.dev.platform_data = &tsif_platform_data;
1701#endif
1702 platform_add_devices(msm_footswitch_devices,
1703 msm_num_footswitch_devices);
Daniel Walker2682fd32010-02-24 15:47:58 -08001704 platform_add_devices(devices, ARRAY_SIZE(devices));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001705#ifdef CONFIG_MSM_CAMERA
1706 config_camera_off_gpios(); /* might not be necessary */
1707#endif
1708 msm_device_i2c_init();
1709 i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices));
1710
1711#ifdef CONFIG_SURF_FFA_GPIO_KEYPAD
1712 if (machine_is_msm7x25_ffa() || machine_is_msm7x27_ffa())
1713 platform_device_register(&keypad_device_7k_ffa);
1714 else
1715 platform_device_register(&keypad_device_surf);
1716#endif
1717 lcdc_gordon_gpio_init();
1718 msm_fb_add_devices();
1719#ifdef CONFIG_USB_EHCI_MSM_72K
1720 msm7x2x_init_host();
1721#endif
1722 msm7x2x_init_mmc();
1723 bt_power_init();
1724
1725 if (cpu_is_msm7x27())
1726 msm_pm_set_platform_data(msm7x27_pm_data,
1727 ARRAY_SIZE(msm7x27_pm_data));
1728 else
1729 msm_pm_set_platform_data(msm7x25_pm_data,
1730 ARRAY_SIZE(msm7x25_pm_data));
Maheshkumar Sivasubramanian8ccc16e2011-10-25 15:59:57 -06001731
1732 BUG_ON(msm_pm_boot_init(MSM_PM_BOOT_CONFIG_RESET_VECTOR,
1733 ioremap(0, PAGE_SIZE)));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001734 msm7x27_wlan_init();
1735}
1736
1737static unsigned pmem_kernel_ebi1_size = PMEM_KERNEL_EBI1_SIZE;
1738static int __init pmem_kernel_ebi1_size_setup(char *p)
1739{
1740 pmem_kernel_ebi1_size = memparse(p, NULL);
1741 return 0;
1742}
1743early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
1744
1745static unsigned pmem_mdp_size = MSM_PMEM_MDP_SIZE;
1746static int __init pmem_mdp_size_setup(char *p)
1747{
1748 pmem_mdp_size = memparse(p, NULL);
1749 return 0;
1750}
1751early_param("pmem_mdp_size", pmem_mdp_size_setup);
1752
1753static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
1754static int __init pmem_adsp_size_setup(char *p)
1755{
1756 pmem_adsp_size = memparse(p, NULL);
1757 return 0;
1758}
1759early_param("pmem_adsp_size", pmem_adsp_size_setup);
1760
1761static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
1762static int __init pmem_audio_size_setup(char *p)
1763{
1764 pmem_audio_size = memparse(p, NULL);
1765 return 0;
1766}
1767early_param("pmem_audio_size", pmem_audio_size_setup);
1768
1769static unsigned fb_size = MSM_FB_SIZE;
1770static int __init fb_size_setup(char *p)
1771{
1772 fb_size = memparse(p, NULL);
1773 return 0;
1774}
1775early_param("fb_size", fb_size_setup);
1776
1777static void __init msm_msm7x2x_allocate_memory_regions(void)
1778{
1779 void *addr;
1780 unsigned long size;
1781
1782 size = fb_size ? : MSM_FB_SIZE;
1783 addr = alloc_bootmem_align(size, 0x1000);
1784 msm_fb_resources[0].start = __pa(addr);
1785 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
1786 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
1787 size, addr, __pa(addr));
1788}
1789
1790static struct memtype_reserve msm7x27_reserve_table[] __initdata = {
1791 [MEMTYPE_SMI] = {
1792 },
1793 [MEMTYPE_EBI0] = {
1794 .flags = MEMTYPE_FLAGS_1M_ALIGN,
1795 },
1796 [MEMTYPE_EBI1] = {
1797 .flags = MEMTYPE_FLAGS_1M_ALIGN,
1798 },
1799};
1800
1801static void __init size_pmem_devices(void)
1802{
1803#ifdef CONFIG_ANDROID_PMEM
1804 android_pmem_adsp_pdata.size = pmem_adsp_size;
1805 android_pmem_pdata.size = pmem_mdp_size;
1806 android_pmem_audio_pdata.size = pmem_audio_size;
1807#endif
1808}
1809
1810static void __init reserve_memory_for(struct android_pmem_platform_data *p)
1811{
1812 msm7x27_reserve_table[p->memory_type].size += p->size;
1813}
1814
1815static void __init reserve_pmem_memory(void)
1816{
1817#ifdef CONFIG_ANDROID_PMEM
1818 reserve_memory_for(&android_pmem_adsp_pdata);
1819 reserve_memory_for(&android_pmem_pdata);
1820 reserve_memory_for(&android_pmem_audio_pdata);
1821 msm7x27_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
1822#endif
1823}
1824
1825static void __init msm7x27_calculate_reserve_sizes(void)
1826{
1827 size_pmem_devices();
1828 reserve_pmem_memory();
1829}
1830
1831static int msm7x27_paddr_to_memtype(unsigned int paddr)
1832{
1833 return MEMTYPE_EBI1;
1834}
1835
1836static struct reserve_info msm7x27_reserve_info __initdata = {
1837 .memtype_reserve_table = msm7x27_reserve_table,
1838 .calculate_reserve_sizes = msm7x27_calculate_reserve_sizes,
1839 .paddr_to_memtype = msm7x27_paddr_to_memtype,
1840};
1841
1842static void __init msm7x27_reserve(void)
1843{
1844 reserve_info = &msm7x27_reserve_info;
1845 msm_reserve();
1846}
1847
1848static void __init msm7x27_init_early(void)
1849{
1850 msm_msm7x2x_allocate_memory_regions();
Daniel Walker2682fd32010-02-24 15:47:58 -08001851}
1852
1853static void __init msm7x2x_map_io(void)
1854{
1855 msm_map_common_io();
Daniel Walker2682fd32010-02-24 15:47:58 -08001856
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001857 if (socinfo_init() < 0)
1858 BUG();
Daniel Walker2682fd32010-02-24 15:47:58 -08001859
1860#ifdef CONFIG_CACHE_L2X0
1861 if (machine_is_msm7x27_surf() || machine_is_msm7x27_ffa()) {
1862 /* 7x27 has 256KB L2 cache:
1863 64Kb/Way and 4-Way Associativity;
Daniel Walker2682fd32010-02-24 15:47:58 -08001864 evmon/parity/share disabled. */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001865 if ((SOCINFO_VERSION_MAJOR(socinfo_get_version()) > 1)
1866 || ((SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 1)
1867 && (SOCINFO_VERSION_MINOR(socinfo_get_version()) >= 3)))
1868 /* R/W latency: 4 cycles; */
1869 l2x0_init(MSM_L2CC_BASE, 0x0006801B, 0xfe000000);
1870 else
1871 /* R/W latency: 3 cycles; */
1872 l2x0_init(MSM_L2CC_BASE, 0x00068012, 0xfe000000);
Daniel Walker2682fd32010-02-24 15:47:58 -08001873 }
1874#endif
1875}
1876
1877MACHINE_START(MSM7X27_SURF, "QCT MSM7x27 SURF")
Russell Kingb75c1782011-01-04 19:03:16 +00001878 .boot_params = PLAT_PHYS_OFFSET + 0x100,
Daniel Walker2682fd32010-02-24 15:47:58 -08001879 .map_io = msm7x2x_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001880 .reserve = msm7x27_reserve,
Daniel Walker2682fd32010-02-24 15:47:58 -08001881 .init_irq = msm7x2x_init_irq,
1882 .init_machine = msm7x2x_init,
1883 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001884 .init_early = msm7x27_init_early,
Taniya Dasbe561a02011-10-12 09:53:11 +05301885 .handle_irq = vic_handle_irq,
Daniel Walker2682fd32010-02-24 15:47:58 -08001886MACHINE_END
1887
1888MACHINE_START(MSM7X27_FFA, "QCT MSM7x27 FFA")
Russell Kingb75c1782011-01-04 19:03:16 +00001889 .boot_params = PLAT_PHYS_OFFSET + 0x100,
Daniel Walker2682fd32010-02-24 15:47:58 -08001890 .map_io = msm7x2x_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001891 .reserve = msm7x27_reserve,
Daniel Walker2682fd32010-02-24 15:47:58 -08001892 .init_irq = msm7x2x_init_irq,
1893 .init_machine = msm7x2x_init,
1894 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001895 .init_early = msm7x27_init_early,
Taniya Dasbe561a02011-10-12 09:53:11 +05301896 .handle_irq = vic_handle_irq,
Daniel Walker2682fd32010-02-24 15:47:58 -08001897MACHINE_END
1898
1899MACHINE_START(MSM7X25_SURF, "QCT MSM7x25 SURF")
Russell Kingb75c1782011-01-04 19:03:16 +00001900 .boot_params = PLAT_PHYS_OFFSET + 0x100,
Daniel Walker2682fd32010-02-24 15:47:58 -08001901 .map_io = msm7x2x_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001902 .reserve = msm7x27_reserve,
Daniel Walker2682fd32010-02-24 15:47:58 -08001903 .init_irq = msm7x2x_init_irq,
1904 .init_machine = msm7x2x_init,
1905 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001906 .init_early = msm7x27_init_early,
Taniya Dasbe561a02011-10-12 09:53:11 +05301907 .handle_irq = vic_handle_irq,
Daniel Walker2682fd32010-02-24 15:47:58 -08001908MACHINE_END
1909
1910MACHINE_START(MSM7X25_FFA, "QCT MSM7x25 FFA")
Russell Kingb75c1782011-01-04 19:03:16 +00001911 .boot_params = PLAT_PHYS_OFFSET + 0x100,
Daniel Walker2682fd32010-02-24 15:47:58 -08001912 .map_io = msm7x2x_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001913 .reserve = msm7x27_reserve,
Daniel Walker2682fd32010-02-24 15:47:58 -08001914 .init_irq = msm7x2x_init_irq,
1915 .init_machine = msm7x2x_init,
1916 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001917 .init_early = msm7x27_init_early,
Taniya Dasbe561a02011-10-12 09:53:11 +05301918 .handle_irq = vic_handle_irq,
Daniel Walker2682fd32010-02-24 15:47:58 -08001919MACHINE_END