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Nagamalleswararao Ganji70fac1e2011-12-29 19:06:37 -08001/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
Steve Mucklea55df6e2010-01-07 12:43:24 -08002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
Steve Mucklea55df6e2010-01-07 12:43:24 -080012 */
13
14#include <linux/kernel.h>
15#include <linux/platform_device.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070016#include <linux/gpio.h>
Steve Muckle9161d302010-02-11 11:50:40 -080017#include <linux/irq.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018#include <linux/io.h>
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +053019#include <linux/msm_ssbi.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070020#include <linux/mfd/pmic8058.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080021
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070022#include <linux/leds.h>
23#include <linux/pmic8058-othc.h>
24#include <linux/mfd/pmic8901.h>
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053025#include <linux/regulator/gpio-regulator.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070026#include <linux/regulator/pmic8901-regulator.h>
27#include <linux/bootmem.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070028#include <linux/msm_adc.h>
29#include <linux/m_adcproc.h>
30#include <linux/mfd/marimba.h>
31#include <linux/msm-charger.h>
32#include <linux/i2c.h>
33#include <linux/i2c/sx150x.h>
34#include <linux/smsc911x.h>
35#include <linux/spi/spi.h>
36#include <linux/input/tdisc_shinetsu.h>
37#include <linux/input/cy8c_ts.h>
38#include <linux/cyttsp.h>
39#include <linux/i2c/isa1200.h>
40#include <linux/dma-mapping.h>
41#include <linux/i2c/bq27520.h>
42
43#ifdef CONFIG_ANDROID_PMEM
44#include <linux/android_pmem.h>
45#endif
46
47#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
48#include <linux/i2c/smb137b.h>
49#endif
Lei Zhou338cab82011-08-19 13:38:17 -040050#ifdef CONFIG_SND_SOC_WM8903
51#include <sound/wm8903.h>
52#endif
Steve Mucklea55df6e2010-01-07 12:43:24 -080053#include <asm/mach-types.h>
54#include <asm/mach/arch.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070055#include <asm/setup.h>
Marc Zyngier89bdafd12011-12-22 11:39:20 +053056#include <asm/hardware/gic.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080057
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070058#include <mach/dma.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080059#include <mach/board.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070060#include <mach/irqs.h>
61#include <mach/msm_spi.h>
62#include <mach/msm_serial_hs.h>
63#include <mach/msm_serial_hs_lite.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080064#include <mach/msm_iomap.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070065#include <mach/msm_memtypes.h>
66#include <asm/mach/mmc.h>
67#include <mach/msm_battery.h>
68#include <mach/msm_hsusb.h>
Rohit Vaswania513aa8d2011-07-18 15:14:28 -070069#include <mach/gpiomux.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070070#ifdef CONFIG_MSM_DSPS
71#include <mach/msm_dsps.h>
72#endif
73#include <mach/msm_xo.h>
74#include <mach/msm_bus_board.h>
75#include <mach/socinfo.h>
76#include <linux/i2c/isl9519.h>
77#ifdef CONFIG_USB_G_ANDROID
78#include <linux/usb/android.h>
79#include <mach/usbdiag.h>
80#endif
81#include <linux/regulator/consumer.h>
82#include <linux/regulator/machine.h>
83#include <mach/sdio_al.h>
84#include <mach/rpm.h>
85#include <mach/rpm-regulator.h>
Abhijeet Dharmapurikar6d565fd2011-09-15 18:49:56 -070086#include <mach/restart.h>
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053087#include <mach/board-msm8660.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080088
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070089#include "devices.h"
90#include "devices-msm8x60.h"
Abhijeet Dharmapurikarefaca4f2011-12-27 16:24:07 -080091#include <mach/cpuidle.h>
92#include <mach/pm.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070093#include "mpm.h"
94#include "spm.h"
95#include "rpm_log.h"
96#include "timer.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070097#include "gpiomux-8x60.h"
98#include "rpm_stats.h"
99#include "peripheral-loader.h"
100#include <linux/platform_data/qcom_crypto_device.h>
101#include "rpm_resources.h"
Matt Wagantall6d9ebee2011-08-26 12:15:24 -0700102#include "acpuclock.h"
Maheshkumar Sivasubramanian8ccc16e2011-10-25 15:59:57 -0600103#include "pm-boot.h"
Laura Abbott63cfd7e2011-10-10 18:21:01 -0700104
105#include <linux/ion.h>
106#include <mach/ion.h>
107
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700108#define MSM_SHARED_RAM_PHYS 0x40000000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700109#define MDM2AP_SYNC 129
110
Terence Hampson1c73fef2011-07-19 17:10:49 -0400111#define GPIO_ETHERNET_RESET_N_DRAGON 30
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700112#define LCDC_SPI_GPIO_CLK 73
113#define LCDC_SPI_GPIO_CS 72
114#define LCDC_SPI_GPIO_MOSI 70
115#define LCDC_AUO_PANEL_NAME "lcdc_auo_wvga"
116#define LCDC_SAMSUNG_OLED_PANEL_NAME "lcdc_samsung_oled"
117#define LCDC_SAMSUNG_WSVGA_PANEL_NAME "lcdc_samsung_wsvga"
118#define LCDC_SAMSUNG_SPI_DEVICE_NAME "lcdc_samsung_ams367pe02"
119#define LCDC_AUO_SPI_DEVICE_NAME "lcdc_auo_nt35582"
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -0400120#define LCDC_NT35582_PANEL_NAME "lcdc_nt35582_wvga"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700121
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -0700122#define PANEL_NAME_MAX_LEN 30
123#define MIPI_CMD_NOVATEK_QHD_PANEL_NAME "mipi_cmd_novatek_qhd"
124#define MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME "mipi_video_novatek_qhd"
125#define MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME "mipi_video_toshiba_wvga"
126#define HDMI_PANEL_NAME "hdmi_msm"
127#define TVOUT_PANEL_NAME "tvout_msm"
128
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700129#define DSPS_PIL_GENERIC_NAME "dsps"
130#define DSPS_PIL_FLUID_NAME "dsps_fluid"
131
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -0800132#ifdef CONFIG_ION_MSM
133static struct platform_device ion_dev;
134#endif
135
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700136enum {
137 GPIO_EXPANDER_IRQ_BASE = PM8901_IRQ_BASE + NR_PMIC8901_IRQS,
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530138 GPIO_EXPANDER_GPIO_BASE = PM8901_MPP_BASE + PM8901_MPPS,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700139 /* CORE expander */
140 GPIO_CORE_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE,
141 GPIO_CLASS_D1_EN = GPIO_CORE_EXPANDER_BASE,
142 GPIO_WLAN_DEEP_SLEEP_N,
143 GPIO_LVDS_SHUTDOWN_N,
144 GPIO_DISP_RESX_N = GPIO_LVDS_SHUTDOWN_N,
145 GPIO_MS_SYS_RESET_N,
146 GPIO_CAP_TS_RESOUT_N,
147 GPIO_CAP_GAUGE_BI_TOUT,
148 GPIO_ETHERNET_PME,
149 GPIO_EXT_GPS_LNA_EN,
150 GPIO_MSM_WAKES_BT,
151 GPIO_ETHERNET_RESET_N,
152 GPIO_HEADSET_DET_N,
153 GPIO_USB_UICC_EN,
154 GPIO_BACKLIGHT_EN,
155 GPIO_EXT_CAMIF_PWR_EN,
156 GPIO_BATT_GAUGE_INT_N,
157 GPIO_BATT_GAUGE_EN,
158 /* DOCKING expander */
159 GPIO_DOCKING_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + 16,
160 GPIO_MIPI_DSI_RST_N = GPIO_DOCKING_EXPANDER_BASE,
161 GPIO_AUX_JTAG_DET_N,
162 GPIO_DONGLE_DET_N,
163 GPIO_SVIDEO_LOAD_DET,
164 GPIO_SVID_AMP_SHUTDOWN1_N,
165 GPIO_SVID_AMP_SHUTDOWN0_N,
166 GPIO_SDC_WP,
167 GPIO_IRDA_PWDN,
168 GPIO_IRDA_RESET_N,
169 GPIO_DONGLE_GPIO0,
170 GPIO_DONGLE_GPIO1,
171 GPIO_DONGLE_GPIO2,
172 GPIO_DONGLE_GPIO3,
173 GPIO_DONGLE_PWR_EN,
174 GPIO_EMMC_RESET_N,
175 GPIO_TP_EXP2_IO15,
176 /* SURF expander */
177 GPIO_SURF_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 2),
178 GPIO_SD_CARD_DET_1 = GPIO_SURF_EXPANDER_BASE,
179 GPIO_SD_CARD_DET_2,
180 GPIO_SD_CARD_DET_4,
181 GPIO_SD_CARD_DET_5,
182 GPIO_UIM3_RST,
183 GPIO_SURF_EXPANDER_IO5,
184 GPIO_SURF_EXPANDER_IO6,
185 GPIO_ADC_I2C_EN,
186 GPIO_SURF_EXPANDER_IO8,
187 GPIO_SURF_EXPANDER_IO9,
188 GPIO_SURF_EXPANDER_IO10,
189 GPIO_SURF_EXPANDER_IO11,
190 GPIO_SURF_EXPANDER_IO12,
191 GPIO_SURF_EXPANDER_IO13,
192 GPIO_SURF_EXPANDER_IO14,
193 GPIO_SURF_EXPANDER_IO15,
194 /* LEFT KB IO expander */
195 GPIO_LEFT_KB_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 3),
196 GPIO_LEFT_LED_1 = GPIO_LEFT_KB_EXPANDER_BASE,
197 GPIO_LEFT_LED_2,
198 GPIO_LEFT_LED_3,
199 GPIO_LEFT_LED_WLAN,
200 GPIO_JOYSTICK_EN,
201 GPIO_CAP_TS_SLEEP,
202 GPIO_LEFT_KB_IO6,
203 GPIO_LEFT_LED_5,
204 /* RIGHT KB IO expander */
205 GPIO_RIGHT_KB_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 3) + 8,
206 GPIO_RIGHT_LED_1 = GPIO_RIGHT_KB_EXPANDER_BASE,
207 GPIO_RIGHT_LED_2,
208 GPIO_RIGHT_LED_3,
209 GPIO_RIGHT_LED_BT,
210 GPIO_WEB_CAMIF_STANDBY,
211 GPIO_COMPASS_RST_N,
212 GPIO_WEB_CAMIF_RESET_N,
213 GPIO_RIGHT_LED_5,
214 GPIO_R_ALTIMETER_RESET_N,
215 /* FLUID S IO expander */
216 GPIO_SOUTH_EXPANDER_BASE,
217 GPIO_MIC2_ANCR_SEL = GPIO_SOUTH_EXPANDER_BASE,
218 GPIO_MIC1_ANCL_SEL,
219 GPIO_HS_MIC4_SEL,
220 GPIO_FML_MIC3_SEL,
221 GPIO_FMR_MIC5_SEL,
222 GPIO_TS_SLEEP,
223 GPIO_HAP_SHIFT_LVL_OE,
224 GPIO_HS_SW_DIR,
225 /* FLUID N IO expander */
226 GPIO_NORTH_EXPANDER_BASE,
227 GPIO_EPM_3_3V_EN = GPIO_NORTH_EXPANDER_BASE,
228 GPIO_EPM_5V_BOOST_EN,
229 GPIO_AUX_CAM_2P7_EN,
230 GPIO_LED_FLASH_EN,
231 GPIO_LED1_GREEN_N,
232 GPIO_LED2_RED_N,
233 GPIO_FRONT_CAM_RESET_N,
234 GPIO_EPM_LVLSFT_EN,
235 GPIO_N_ALTIMETER_RESET_N,
236 /* EPM expander */
237 GPIO_EPM_EXPANDER_BASE,
238 GPIO_PWR_MON_START = GPIO_EPM_EXPANDER_BASE,
239 GPIO_PWR_MON_RESET_N,
240 GPIO_ADC1_PWDN_N,
241 GPIO_ADC2_PWDN_N,
242 GPIO_EPM_EXPANDER_IO4,
243 GPIO_ADC1_MUX_SPI_INT_N_3_3V,
244 GPIO_ADC2_MUX_SPI_INT_N,
245 GPIO_EPM_EXPANDER_IO7,
246 GPIO_PWR_MON_ENABLE,
247 GPIO_EPM_SPI_ADC1_CS_N,
248 GPIO_EPM_SPI_ADC2_CS_N,
249 GPIO_EPM_EXPANDER_IO11,
250 GPIO_EPM_EXPANDER_IO12,
251 GPIO_EPM_EXPANDER_IO13,
252 GPIO_EPM_EXPANDER_IO14,
253 GPIO_EPM_EXPANDER_IO15,
254};
255
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530256struct pm8xxx_mpp_init_info {
257 unsigned mpp;
258 struct pm8xxx_mpp_config_data config;
259};
260
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530261#define PM8058_MPP_INIT(_mpp, _type, _level, _control) \
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530262{ \
263 .mpp = PM8058_MPP_PM_TO_SYS(_mpp), \
264 .config = { \
265 .type = PM8XXX_MPP_TYPE_##_type, \
266 .level = _level, \
267 .control = PM8XXX_MPP_##_control, \
268 } \
269}
270
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530271#define PM8901_MPP_INIT(_mpp, _type, _level, _control) \
272{ \
273 .mpp = PM8901_MPP_PM_TO_SYS(_mpp), \
274 .config = { \
275 .type = PM8XXX_MPP_TYPE_##_type, \
276 .level = _level, \
277 .control = PM8XXX_MPP_##_control, \
278 } \
279}
280
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700281/*
282 * The UI_INTx_N lines are pmic gpio lines which connect i2c
283 * gpio expanders to the pm8058.
284 */
285#define UI_INT1_N 25
286#define UI_INT2_N 34
287#define UI_INT3_N 14
288/*
289FM GPIO is GPIO 18 on PMIC 8058.
290As the index starts from 0 in the PMIC driver, and hence 17
291corresponds to GPIO 18 on PMIC 8058.
292*/
293#define FM_GPIO 17
294
295#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
296static void (*sdc2_status_notify_cb)(int card_present, void *dev_id);
297static void *sdc2_status_notify_cb_devid;
298#endif
299
300#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
301static void (*sdc5_status_notify_cb)(int card_present, void *dev_id);
302static void *sdc5_status_notify_cb_devid;
303#endif
304
305static struct msm_spm_platform_data msm_spm_data_v1[] __initdata = {
306 [0] = {
307 .reg_base_addr = MSM_SAW0_BASE,
308
309#ifdef CONFIG_MSM_AVS_HW
310 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
311#endif
312 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x0F,
313 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
314 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0xFFFFFFFF,
315 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0xFFFFFFFF,
316
317 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x01,
318 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
319 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
320
321 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
322 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
323 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
324
325 .awake_vlevel = 0x94,
326 .retention_vlevel = 0x81,
327 .collapse_vlevel = 0x20,
328 .retention_mid_vlevel = 0x94,
329 .collapse_mid_vlevel = 0x8C,
330
331 .vctl_timeout_us = 50,
332 },
333
334 [1] = {
335 .reg_base_addr = MSM_SAW1_BASE,
336
337#ifdef CONFIG_MSM_AVS_HW
338 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
339#endif
340 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x0F,
341 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
342 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0xFFFFFFFF,
343 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0xFFFFFFFF,
344
345 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x13,
346 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
347 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
348
349 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
350 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
351 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
352
353 .awake_vlevel = 0x94,
354 .retention_vlevel = 0x81,
355 .collapse_vlevel = 0x20,
356 .retention_mid_vlevel = 0x94,
357 .collapse_mid_vlevel = 0x8C,
358
359 .vctl_timeout_us = 50,
360 },
361};
362
363static struct msm_spm_platform_data msm_spm_data[] __initdata = {
364 [0] = {
365 .reg_base_addr = MSM_SAW0_BASE,
366
367#ifdef CONFIG_MSM_AVS_HW
368 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
369#endif
370 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x1C,
371 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
372 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0x0C0CFFFF,
373 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0x78780FFF,
374
375 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x01,
376 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
377 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
378
379 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
380 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
381 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
382
383 .awake_vlevel = 0xA0,
384 .retention_vlevel = 0x89,
385 .collapse_vlevel = 0x20,
386 .retention_mid_vlevel = 0x89,
387 .collapse_mid_vlevel = 0x89,
388
389 .vctl_timeout_us = 50,
390 },
391
392 [1] = {
393 .reg_base_addr = MSM_SAW1_BASE,
394
395#ifdef CONFIG_MSM_AVS_HW
396 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
397#endif
398 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x1C,
399 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
400 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0x0C0CFFFF,
401 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0x78780FFF,
402
403 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x13,
404 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
405 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
406
407 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
408 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
409 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
410
411 .awake_vlevel = 0xA0,
412 .retention_vlevel = 0x89,
413 .collapse_vlevel = 0x20,
414 .retention_mid_vlevel = 0x89,
415 .collapse_mid_vlevel = 0x89,
416
417 .vctl_timeout_us = 50,
418 },
419};
420
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700421/*
422 * Consumer specific regulator names:
423 * regulator name consumer dev_name
424 */
425static struct regulator_consumer_supply vreg_consumers_8901_S0[] = {
426 REGULATOR_SUPPLY("8901_s0", NULL),
427};
428static struct regulator_consumer_supply vreg_consumers_8901_S1[] = {
429 REGULATOR_SUPPLY("8901_s1", NULL),
430};
431
432static struct regulator_init_data saw_s0_init_data = {
433 .constraints = {
434 .name = "8901_s0",
435 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
Tianyi Gou7c81dfa2011-07-27 12:15:24 -0700436 .min_uV = 800000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700437 .max_uV = 1250000,
438 },
439 .consumer_supplies = vreg_consumers_8901_S0,
440 .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S0),
441};
442
443static struct regulator_init_data saw_s1_init_data = {
444 .constraints = {
445 .name = "8901_s1",
446 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
Tianyi Gou7c81dfa2011-07-27 12:15:24 -0700447 .min_uV = 800000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700448 .max_uV = 1250000,
449 },
450 .consumer_supplies = vreg_consumers_8901_S1,
451 .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S1),
452};
453
454static struct platform_device msm_device_saw_s0 = {
455 .name = "saw-regulator",
456 .id = 0,
457 .dev = {
458 .platform_data = &saw_s0_init_data,
459 },
460};
461
462static struct platform_device msm_device_saw_s1 = {
463 .name = "saw-regulator",
464 .id = 1,
465 .dev = {
466 .platform_data = &saw_s1_init_data,
467 },
468};
469
470/*
471 * The smc91x configuration varies depending on platform.
472 * The resources data structure is filled in at runtime.
473 */
474static struct resource smc91x_resources[] = {
475 [0] = {
476 .flags = IORESOURCE_MEM,
477 },
478 [1] = {
479 .flags = IORESOURCE_IRQ,
480 },
481};
482
483static struct platform_device smc91x_device = {
484 .name = "smc91x",
485 .id = 0,
486 .num_resources = ARRAY_SIZE(smc91x_resources),
487 .resource = smc91x_resources,
488};
489
490static struct resource smsc911x_resources[] = {
491 [0] = {
492 .flags = IORESOURCE_MEM,
493 .start = 0x1b800000,
494 .end = 0x1b8000ff
495 },
496 [1] = {
497 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
498 },
499};
500
501static struct smsc911x_platform_config smsc911x_config = {
502 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
503 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
504 .flags = SMSC911X_USE_16BIT,
505 .has_reset_gpio = 1,
506 .reset_gpio = GPIO_ETHERNET_RESET_N
507};
508
509static struct platform_device smsc911x_device = {
510 .name = "smsc911x",
511 .id = 0,
512 .num_resources = ARRAY_SIZE(smsc911x_resources),
513 .resource = smsc911x_resources,
514 .dev = {
515 .platform_data = &smsc911x_config
516 }
517};
518
519#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
520 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE) || \
521 defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
522 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
523
524#define QCE_SIZE 0x10000
525#define QCE_0_BASE 0x18500000
526
527#define QCE_HW_KEY_SUPPORT 0
528#define QCE_SHA_HMAC_SUPPORT 0
529#define QCE_SHARE_CE_RESOURCE 2
530#define QCE_CE_SHARED 1
531
532static struct resource qcrypto_resources[] = {
533 [0] = {
534 .start = QCE_0_BASE,
535 .end = QCE_0_BASE + QCE_SIZE - 1,
536 .flags = IORESOURCE_MEM,
537 },
538 [1] = {
539 .name = "crypto_channels",
540 .start = DMOV_CE_IN_CHAN,
541 .end = DMOV_CE_OUT_CHAN,
542 .flags = IORESOURCE_DMA,
543 },
544 [2] = {
545 .name = "crypto_crci_in",
546 .start = DMOV_CE_IN_CRCI,
547 .end = DMOV_CE_IN_CRCI,
548 .flags = IORESOURCE_DMA,
549 },
550 [3] = {
551 .name = "crypto_crci_out",
552 .start = DMOV_CE_OUT_CRCI,
553 .end = DMOV_CE_OUT_CRCI,
554 .flags = IORESOURCE_DMA,
555 },
556 [4] = {
557 .name = "crypto_crci_hash",
558 .start = DMOV_CE_HASH_CRCI,
559 .end = DMOV_CE_HASH_CRCI,
560 .flags = IORESOURCE_DMA,
561 },
562};
563
564static struct resource qcedev_resources[] = {
565 [0] = {
566 .start = QCE_0_BASE,
567 .end = QCE_0_BASE + QCE_SIZE - 1,
568 .flags = IORESOURCE_MEM,
569 },
570 [1] = {
571 .name = "crypto_channels",
572 .start = DMOV_CE_IN_CHAN,
573 .end = DMOV_CE_OUT_CHAN,
574 .flags = IORESOURCE_DMA,
575 },
576 [2] = {
577 .name = "crypto_crci_in",
578 .start = DMOV_CE_IN_CRCI,
579 .end = DMOV_CE_IN_CRCI,
580 .flags = IORESOURCE_DMA,
581 },
582 [3] = {
583 .name = "crypto_crci_out",
584 .start = DMOV_CE_OUT_CRCI,
585 .end = DMOV_CE_OUT_CRCI,
586 .flags = IORESOURCE_DMA,
587 },
588 [4] = {
589 .name = "crypto_crci_hash",
590 .start = DMOV_CE_HASH_CRCI,
591 .end = DMOV_CE_HASH_CRCI,
592 .flags = IORESOURCE_DMA,
593 },
594};
595
596#endif
597
598#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
599 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
600
601static struct msm_ce_hw_support qcrypto_ce_hw_suppport = {
602 .ce_shared = QCE_CE_SHARED,
603 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
604 .hw_key_support = QCE_HW_KEY_SUPPORT,
605 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
Ramesh Masavarapu49259682011-12-02 14:00:18 -0800606 .bus_scale_table = NULL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700607};
608
609static struct platform_device qcrypto_device = {
610 .name = "qcrypto",
611 .id = 0,
612 .num_resources = ARRAY_SIZE(qcrypto_resources),
613 .resource = qcrypto_resources,
614 .dev = {
615 .coherent_dma_mask = DMA_BIT_MASK(32),
616 .platform_data = &qcrypto_ce_hw_suppport,
617 },
618};
619#endif
620
621#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
622 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
623
624static struct msm_ce_hw_support qcedev_ce_hw_suppport = {
625 .ce_shared = QCE_CE_SHARED,
626 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
627 .hw_key_support = QCE_HW_KEY_SUPPORT,
628 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
Ramesh Masavarapu49259682011-12-02 14:00:18 -0800629 .bus_scale_table = NULL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700630};
631
632static struct platform_device qcedev_device = {
633 .name = "qce",
634 .id = 0,
635 .num_resources = ARRAY_SIZE(qcedev_resources),
636 .resource = qcedev_resources,
637 .dev = {
638 .coherent_dma_mask = DMA_BIT_MASK(32),
639 .platform_data = &qcedev_ce_hw_suppport,
640 },
641};
642#endif
643
644#if defined(CONFIG_HAPTIC_ISA1200) || \
645 defined(CONFIG_HAPTIC_ISA1200_MODULE)
646
647static const char *vregs_isa1200_name[] = {
648 "8058_s3",
649 "8901_l4",
650};
651
652static const int vregs_isa1200_val[] = {
653 1800000,/* uV */
654 2600000,
655};
656static struct regulator *vregs_isa1200[ARRAY_SIZE(vregs_isa1200_name)];
657static struct msm_xo_voter *xo_handle_a1;
658
659static int isa1200_power(int vreg_on)
Steve Mucklea55df6e2010-01-07 12:43:24 -0800660{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700661 int i, rc = 0;
662
663 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++) {
664 rc = vreg_on ? regulator_enable(vregs_isa1200[i]) :
665 regulator_disable(vregs_isa1200[i]);
666 if (rc < 0) {
667 pr_err("%s: vreg %s %s failed (%d)\n",
668 __func__, vregs_isa1200_name[i],
669 vreg_on ? "enable" : "disable", rc);
670 goto vreg_fail;
671 }
672 }
673
674 rc = vreg_on ? msm_xo_mode_vote(xo_handle_a1, MSM_XO_MODE_ON) :
675 msm_xo_mode_vote(xo_handle_a1, MSM_XO_MODE_OFF);
676 if (rc < 0) {
677 pr_err("%s: failed to %svote for TCXO A1 buffer%d\n",
678 __func__, vreg_on ? "" : "de-", rc);
679 goto vreg_fail;
680 }
681 return 0;
682
683vreg_fail:
684 while (i--)
685 !vreg_on ? regulator_enable(vregs_isa1200[i]) :
686 regulator_disable(vregs_isa1200[i]);
687 return rc;
Steve Mucklea55df6e2010-01-07 12:43:24 -0800688}
689
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700690static int isa1200_dev_setup(bool enable)
Steve Mucklea55df6e2010-01-07 12:43:24 -0800691{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700692 int i, rc;
Steve Muckle9161d302010-02-11 11:50:40 -0800693
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700694 if (enable == true) {
695 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++) {
696 vregs_isa1200[i] = regulator_get(NULL,
697 vregs_isa1200_name[i]);
698 if (IS_ERR(vregs_isa1200[i])) {
699 pr_err("%s: regulator get of %s failed (%ld)\n",
700 __func__, vregs_isa1200_name[i],
701 PTR_ERR(vregs_isa1200[i]));
702 rc = PTR_ERR(vregs_isa1200[i]);
703 goto vreg_get_fail;
704 }
705 rc = regulator_set_voltage(vregs_isa1200[i],
706 vregs_isa1200_val[i], vregs_isa1200_val[i]);
707 if (rc) {
708 pr_err("%s: regulator_set_voltage(%s) failed\n",
709 __func__, vregs_isa1200_name[i]);
710 goto vreg_get_fail;
711 }
712 }
Steve Muckle9161d302010-02-11 11:50:40 -0800713
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700714 rc = gpio_request(GPIO_HAP_SHIFT_LVL_OE, "haptics_shft_lvl_oe");
715 if (rc) {
716 pr_err("%s: unable to request gpio %d (%d)\n",
717 __func__, GPIO_HAP_SHIFT_LVL_OE, rc);
718 goto vreg_get_fail;
719 }
Steve Muckle9161d302010-02-11 11:50:40 -0800720
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700721 rc = gpio_direction_output(GPIO_HAP_SHIFT_LVL_OE, 1);
722 if (rc) {
723 pr_err("%s: Unable to set direction\n", __func__);;
724 goto free_gpio;
725 }
726
727 xo_handle_a1 = msm_xo_get(MSM_XO_TCXO_A1, "isa1200");
728 if (IS_ERR(xo_handle_a1)) {
729 rc = PTR_ERR(xo_handle_a1);
730 pr_err("%s: failed to get the handle for A1(%d)\n",
731 __func__, rc);
732 goto gpio_set_dir;
733 }
734 } else {
735 gpio_set_value(GPIO_HAP_SHIFT_LVL_OE, 0);
736 gpio_free(GPIO_HAP_SHIFT_LVL_OE);
737
738 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++)
739 regulator_put(vregs_isa1200[i]);
740
741 msm_xo_put(xo_handle_a1);
742 }
743
744 return 0;
745gpio_set_dir:
746 gpio_set_value(GPIO_HAP_SHIFT_LVL_OE, 0);
747free_gpio:
748 gpio_free(GPIO_HAP_SHIFT_LVL_OE);
749vreg_get_fail:
750 while (i)
751 regulator_put(vregs_isa1200[--i]);
752 return rc;
753}
754
755#define PMIC_GPIO_HAP_ENABLE 18 /* PMIC GPIO Number 19 */
Mohan Pallaka4a1160d2011-09-09 15:17:45 +0530756#define PMIC_GPIO_HAP_LDO_ENABLE 5 /* PMIC GPIO Number 6 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700757static struct isa1200_platform_data isa1200_1_pdata = {
758 .name = "vibrator",
759 .power_on = isa1200_power,
760 .dev_setup = isa1200_dev_setup,
761 /*gpio to enable haptic*/
762 .hap_en_gpio = PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_ENABLE),
Mohan Pallaka4a1160d2011-09-09 15:17:45 +0530763 .hap_len_gpio = PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_LDO_ENABLE),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700764 .max_timeout = 15000,
765 .mode_ctrl = PWM_GEN_MODE,
766 .pwm_fd = {
767 .pwm_div = 256,
768 },
769 .is_erm = false,
770 .smart_en = true,
771 .ext_clk_en = true,
772 .chip_en = 1,
773};
774
775static struct i2c_board_info msm_isa1200_board_info[] = {
776 {
777 I2C_BOARD_INFO("isa1200_1", 0x90>>1),
778 .platform_data = &isa1200_1_pdata,
779 },
780};
781#endif
782
783#if defined(CONFIG_BATTERY_BQ27520) || \
784 defined(CONFIG_BATTERY_BQ27520_MODULE)
785static struct bq27520_platform_data bq27520_pdata = {
786 .name = "fuel-gauge",
787 .vreg_name = "8058_s3",
788 .vreg_value = 1800000,
789 .soc_int = GPIO_BATT_GAUGE_INT_N,
790 .bi_tout = GPIO_CAP_GAUGE_BI_TOUT,
791 .chip_en = GPIO_BATT_GAUGE_EN,
792 .enable_dlog = 0, /* if enable coulomb counter logger */
793};
794
795static struct i2c_board_info msm_bq27520_board_info[] = {
796 {
797 I2C_BOARD_INFO("bq27520", 0xaa>>1),
798 .platform_data = &bq27520_pdata,
799 },
800};
801#endif
802
803static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR * 2] = {
804 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
805 .idle_supported = 1,
806 .suspend_supported = 1,
807 .idle_enabled = 0,
808 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700809 },
810
811 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
812 .idle_supported = 1,
813 .suspend_supported = 1,
814 .idle_enabled = 0,
815 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700816 },
817
818 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
819 .idle_supported = 1,
820 .suspend_supported = 1,
821 .idle_enabled = 1,
822 .suspend_enabled = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700823 },
824
825 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
826 .idle_supported = 1,
827 .suspend_supported = 1,
828 .idle_enabled = 0,
829 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700830 },
831
832 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
833 .idle_supported = 1,
834 .suspend_supported = 1,
835 .idle_enabled = 0,
836 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700837 },
838
839 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
840 .idle_supported = 1,
841 .suspend_supported = 1,
842 .idle_enabled = 1,
843 .suspend_enabled = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700844 },
845};
846
847static struct msm_cpuidle_state msm_cstates[] __initdata = {
848 {0, 0, "C0", "WFI",
849 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
850
851 {0, 1, "C1", "STANDALONE_POWER_COLLAPSE",
852 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
853
854 {0, 2, "C2", "POWER_COLLAPSE",
855 MSM_PM_SLEEP_MODE_POWER_COLLAPSE},
856
857 {1, 0, "C0", "WFI",
858 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
859
860 {1, 1, "C1", "STANDALONE_POWER_COLLAPSE",
861 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
862};
863
864static struct msm_rpmrs_level msm_rpmrs_levels[] __initdata = {
865 {
866 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT,
867 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
868 true,
869 1, 8000, 100000, 1,
870 },
871
872 {
873 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE,
874 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
875 true,
876 1500, 5000, 60100000, 3000,
877 },
878
879 {
880 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
881 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
882 false,
883 1800, 5000, 60350000, 3500,
884 },
885 {
886 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
887 MSM_RPMRS_LIMITS(OFF, ACTIVE, MAX, ACTIVE),
888 false,
889 3800, 4500, 65350000, 5500,
890 },
891
892 {
893 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
894 MSM_RPMRS_LIMITS(ON, HSFS_OPEN, MAX, ACTIVE),
895 false,
896 2800, 2500, 66850000, 4800,
897 },
898
899 {
900 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
901 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, MAX, ACTIVE),
902 false,
903 4800, 2000, 71850000, 6800,
904 },
905
906 {
907 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
908 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, ACTIVE, RET_HIGH),
909 false,
910 6800, 500, 75850000, 8800,
911 },
912
913 {
914 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
915 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, RET_HIGH, RET_LOW),
916 false,
917 7800, 0, 76350000, 9800,
918 },
919};
920
Praveen Chidambaram78499012011-11-01 17:15:17 -0600921static struct msm_rpmrs_platform_data msm_rpmrs_data __initdata = {
922 .levels = &msm_rpmrs_levels[0],
923 .num_levels = ARRAY_SIZE(msm_rpmrs_levels),
924 .vdd_mem_levels = {
925 [MSM_RPMRS_VDD_MEM_RET_LOW] = 500,
926 [MSM_RPMRS_VDD_MEM_RET_HIGH] = 750,
927 [MSM_RPMRS_VDD_MEM_ACTIVE] = 1000,
928 [MSM_RPMRS_VDD_MEM_MAX] = 1250,
929 },
930 .vdd_dig_levels = {
931 [MSM_RPMRS_VDD_DIG_RET_LOW] = 500,
932 [MSM_RPMRS_VDD_DIG_RET_HIGH] = 750,
933 [MSM_RPMRS_VDD_DIG_ACTIVE] = 1000,
934 [MSM_RPMRS_VDD_DIG_MAX] = 1250,
935 },
936 .vdd_mask = 0xFFF,
937 .rpmrs_target_id = {
938 [MSM_RPMRS_ID_PXO_CLK] = MSM_RPM_ID_PXO_CLK,
939 [MSM_RPMRS_ID_L2_CACHE_CTL] = MSM_RPM_ID_APPS_L2_CACHE_CTL,
940 [MSM_RPMRS_ID_VDD_DIG_0] = MSM_RPM_ID_SMPS1_0,
941 [MSM_RPMRS_ID_VDD_DIG_1] = MSM_RPM_ID_SMPS1_1,
942 [MSM_RPMRS_ID_VDD_MEM_0] = MSM_RPM_ID_SMPS0_0,
943 [MSM_RPMRS_ID_VDD_MEM_1] = MSM_RPM_ID_SMPS0_1,
944 [MSM_RPMRS_ID_RPM_CTL] = MSM_RPM_ID_TRIGGER_SET_FROM,
945 },
946};
947
Maheshkumar Sivasubramanianc6c55032011-10-25 16:01:32 -0600948static struct msm_pm_boot_platform_data msm_pm_boot_pdata __initdata = {
949 .mode = MSM_PM_BOOT_CONFIG_TZ,
950};
951
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700952#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
953
954#define ISP1763_INT_GPIO 117
955#define ISP1763_RST_GPIO 152
956static struct resource isp1763_resources[] = {
957 [0] = {
958 .flags = IORESOURCE_MEM,
959 .start = 0x1D000000,
960 .end = 0x1D005FFF, /* 24KB */
961 },
962 [1] = {
963 .flags = IORESOURCE_IRQ,
964 },
965};
966static void __init msm8x60_cfg_isp1763(void)
967{
968 isp1763_resources[1].start = gpio_to_irq(ISP1763_INT_GPIO);
969 isp1763_resources[1].end = gpio_to_irq(ISP1763_INT_GPIO);
970}
971
972static int isp1763_setup_gpio(int enable)
973{
974 int status = 0;
975
976 if (enable) {
977 status = gpio_request(ISP1763_INT_GPIO, "isp1763_usb");
978 if (status) {
979 pr_err("%s:Failed to request GPIO %d\n",
980 __func__, ISP1763_INT_GPIO);
981 return status;
982 }
983 status = gpio_direction_input(ISP1763_INT_GPIO);
984 if (status) {
985 pr_err("%s:Failed to configure GPIO %d\n",
986 __func__, ISP1763_INT_GPIO);
987 goto gpio_free_int;
988 }
989 status = gpio_request(ISP1763_RST_GPIO, "isp1763_usb");
990 if (status) {
991 pr_err("%s:Failed to request GPIO %d\n",
992 __func__, ISP1763_RST_GPIO);
993 goto gpio_free_int;
994 }
995 status = gpio_direction_output(ISP1763_RST_GPIO, 1);
996 if (status) {
997 pr_err("%s:Failed to configure GPIO %d\n",
998 __func__, ISP1763_RST_GPIO);
999 goto gpio_free_rst;
1000 }
1001 pr_debug("\nISP GPIO configuration done\n");
1002 return status;
1003 }
1004
1005gpio_free_rst:
1006 gpio_free(ISP1763_RST_GPIO);
1007gpio_free_int:
1008 gpio_free(ISP1763_INT_GPIO);
1009
1010 return status;
1011}
1012static struct isp1763_platform_data isp1763_pdata = {
1013 .reset_gpio = ISP1763_RST_GPIO,
1014 .setup_gpio = isp1763_setup_gpio
1015};
1016
1017static struct platform_device isp1763_device = {
1018 .name = "isp1763_usb",
1019 .num_resources = ARRAY_SIZE(isp1763_resources),
1020 .resource = isp1763_resources,
1021 .dev = {
1022 .platform_data = &isp1763_pdata
1023 }
1024};
1025#endif
1026
1027#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_MSM_72K)
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301028static struct msm_otg_platform_data msm_otg_pdata;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001029static struct regulator *ldo6_3p3;
1030static struct regulator *ldo7_1p8;
1031static struct regulator *vdd_cx;
1032#define PMICID_INT PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 36)
Anji jonnalaae745e92011-11-14 18:34:31 +05301033#define PMIC_ID_GPIO 36
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001034notify_vbus_state notify_vbus_state_func_ptr;
1035static int usb_phy_susp_dig_vol = 750000;
1036static int pmic_id_notif_supported;
1037
1038#ifdef CONFIG_USB_EHCI_MSM_72K
1039#define USB_PMIC_ID_DET_DELAY msecs_to_jiffies(100)
1040struct delayed_work pmic_id_det;
1041
1042static int __init usb_id_pin_rework_setup(char *support)
1043{
1044 if (strncmp(support, "true", 4) == 0)
1045 pmic_id_notif_supported = 1;
1046
1047 return 1;
1048}
1049__setup("usb_id_pin_rework=", usb_id_pin_rework_setup);
1050
1051static void pmic_id_detect(struct work_struct *w)
1052{
1053 int val = gpio_get_value_cansleep(PM8058_GPIO_PM_TO_SYS(36));
1054 pr_debug("%s(): gpio_read_value = %d\n", __func__, val);
1055
1056 if (notify_vbus_state_func_ptr)
1057 (*notify_vbus_state_func_ptr) (val);
1058}
1059
1060static irqreturn_t pmic_id_on_irq(int irq, void *data)
1061{
1062 /*
1063 * Spurious interrupts are observed on pmic gpio line
1064 * even though there is no state change on USB ID. Schedule the
1065 * work to to allow debounce on gpio
Steve Muckle9161d302010-02-11 11:50:40 -08001066 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001067 schedule_delayed_work(&pmic_id_det, USB_PMIC_ID_DET_DELAY);
Steve Muckle9161d302010-02-11 11:50:40 -08001068
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001069 return IRQ_HANDLED;
1070}
1071
Anji jonnalaae745e92011-11-14 18:34:31 +05301072static int msm_hsusb_phy_id_setup_init(int init)
1073{
1074 unsigned ret;
1075
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301076 struct pm8xxx_mpp_config_data hsusb_phy_mpp = {
1077 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
1078 .level = PM8901_MPP_DIG_LEVEL_L5,
1079 };
1080
Anji jonnalaae745e92011-11-14 18:34:31 +05301081 if (init) {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301082 hsusb_phy_mpp.control = PM8XXX_MPP_DOUT_CTRL_HIGH;
1083 ret = pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1),
1084 &hsusb_phy_mpp);
Anji jonnalaae745e92011-11-14 18:34:31 +05301085 if (ret < 0)
1086 pr_err("%s:MPP2 configuration failed\n", __func__);
1087 } else {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301088 hsusb_phy_mpp.control = PM8XXX_MPP_DOUT_CTRL_LOW;
1089 ret = pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1),
1090 &hsusb_phy_mpp);
Anji jonnalaae745e92011-11-14 18:34:31 +05301091 if (ret < 0)
1092 pr_err("%s:MPP2 un config failed\n", __func__);
1093 }
1094 return ret;
1095}
1096
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001097static int msm_hsusb_pmic_id_notif_init(void (*callback)(int online), int init)
1098{
1099 unsigned ret = -ENODEV;
1100
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301101 struct pm_gpio pmic_id_cfg = {
Anji jonnalaae745e92011-11-14 18:34:31 +05301102 .direction = PM_GPIO_DIR_IN,
1103 .pull = PM_GPIO_PULL_UP_1P5,
1104 .function = PM_GPIO_FUNC_NORMAL,
1105 .vin_sel = 2,
1106 .inv_int_pol = 0,
1107 };
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301108 struct pm_gpio pmic_id_uncfg = {
Anji jonnalaae745e92011-11-14 18:34:31 +05301109 .direction = PM_GPIO_DIR_IN,
1110 .pull = PM_GPIO_PULL_NO,
1111 .function = PM_GPIO_FUNC_NORMAL,
1112 .vin_sel = 2,
1113 .inv_int_pol = 0,
1114 };
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001115 if (!callback)
1116 return -EINVAL;
1117
1118 if (machine_is_msm8x60_fluid())
1119 return -ENOTSUPP;
1120
1121 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 2) {
1122 pr_debug("%s: USB_ID pin is not routed to PMIC"
1123 "on V1 surf/ffa\n", __func__);
1124 return -ENOTSUPP;
1125 }
1126
Manu Gautam62158eb2011-11-24 16:20:46 +05301127 if ((machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa() ||
1128 machine_is_msm8x60_ffa()) && !pmic_id_notif_supported) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001129 pr_debug("%s: USB_ID is not routed to PMIC"
1130 "on V2 ffa\n", __func__);
1131 return -ENOTSUPP;
1132 }
1133
1134 usb_phy_susp_dig_vol = 500000;
1135
1136 if (init) {
1137 notify_vbus_state_func_ptr = callback;
Manu Gautame8420ef2011-11-11 15:37:21 +05301138 INIT_DELAYED_WORK(&pmic_id_det, pmic_id_detect);
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301139 ret = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(PMIC_ID_GPIO),
1140 &pmic_id_cfg);
Anji jonnalaae745e92011-11-14 18:34:31 +05301141 if (ret) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301142 pr_err("%s:return val of pm8xxx_gpio_config: %d\n",
Anji jonnalaae745e92011-11-14 18:34:31 +05301143 __func__, ret);
1144 return ret;
1145 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001146 ret = request_threaded_irq(PMICID_INT, NULL, pmic_id_on_irq,
1147 (IRQF_TRIGGER_RISING|IRQF_TRIGGER_FALLING),
1148 "msm_otg_id", NULL);
1149 if (ret) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001150 pr_err("%s:pmic_usb_id interrupt registration failed",
1151 __func__);
1152 return ret;
1153 }
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301154 msm_otg_pdata.pmic_id_irq = PMICID_INT;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001155 } else {
Anji jonnalaae745e92011-11-14 18:34:31 +05301156 usb_phy_susp_dig_vol = 750000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001157 free_irq(PMICID_INT, 0);
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301158 ret = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(PMIC_ID_GPIO),
1159 &pmic_id_uncfg);
Anji jonnalaae745e92011-11-14 18:34:31 +05301160 if (ret) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301161 pr_err("%s: return val of pm8xxx_gpio_config: %d\n",
Anji jonnalaae745e92011-11-14 18:34:31 +05301162 __func__, ret);
1163 return ret;
1164 }
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301165 msm_otg_pdata.pmic_id_irq = 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001166 cancel_delayed_work_sync(&pmic_id_det);
1167 notify_vbus_state_func_ptr = NULL;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001168 }
1169 return 0;
1170}
1171#endif
1172
1173#define USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL 1000000
1174#define USB_PHY_MAX_VDD_DIG_VOL 1320000
1175static int msm_hsusb_init_vddcx(int init)
1176{
1177 int ret = 0;
1178
1179 if (init) {
1180 vdd_cx = regulator_get(NULL, "8058_s1");
1181 if (IS_ERR(vdd_cx)) {
1182 return PTR_ERR(vdd_cx);
1183 }
1184
1185 ret = regulator_set_voltage(vdd_cx,
1186 USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL,
1187 USB_PHY_MAX_VDD_DIG_VOL);
1188 if (ret) {
1189 pr_err("%s: unable to set the voltage for regulator"
1190 "vdd_cx\n", __func__);
1191 regulator_put(vdd_cx);
1192 return ret;
1193 }
1194
1195 ret = regulator_enable(vdd_cx);
1196 if (ret) {
1197 pr_err("%s: unable to enable regulator"
1198 "vdd_cx\n", __func__);
1199 regulator_put(vdd_cx);
1200 }
1201 } else {
1202 ret = regulator_disable(vdd_cx);
1203 if (ret) {
1204 pr_err("%s: Unable to disable the regulator:"
1205 "vdd_cx\n", __func__);
1206 return ret;
1207 }
1208
1209 regulator_put(vdd_cx);
1210 }
1211
1212 return ret;
1213}
1214
1215static int msm_hsusb_config_vddcx(int high)
1216{
1217 int max_vol = USB_PHY_MAX_VDD_DIG_VOL;
1218 int min_vol;
1219 int ret;
1220
1221 if (high)
1222 min_vol = USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL;
1223 else
1224 min_vol = usb_phy_susp_dig_vol;
1225
1226 ret = regulator_set_voltage(vdd_cx, min_vol, max_vol);
1227 if (ret) {
1228 pr_err("%s: unable to set the voltage for regulator"
1229 "vdd_cx\n", __func__);
1230 return ret;
1231 }
1232
1233 pr_debug("%s: min_vol:%d max_vol:%d\n", __func__, min_vol, max_vol);
1234
1235 return ret;
1236}
1237
1238#define USB_PHY_3P3_VOL_MIN 3050000 /* uV */
1239#define USB_PHY_3P3_VOL_MAX 3050000 /* uV */
1240#define USB_PHY_3P3_HPM_LOAD 50000 /* uA */
1241#define USB_PHY_3P3_LPM_LOAD 4000 /* uA */
1242
1243#define USB_PHY_1P8_VOL_MIN 1800000 /* uV */
1244#define USB_PHY_1P8_VOL_MAX 1800000 /* uV */
1245#define USB_PHY_1P8_HPM_LOAD 50000 /* uA */
1246#define USB_PHY_1P8_LPM_LOAD 4000 /* uA */
1247static int msm_hsusb_ldo_init(int init)
1248{
1249 int rc = 0;
1250
1251 if (init) {
1252 ldo6_3p3 = regulator_get(NULL, "8058_l6");
1253 if (IS_ERR(ldo6_3p3))
1254 return PTR_ERR(ldo6_3p3);
1255
1256 ldo7_1p8 = regulator_get(NULL, "8058_l7");
1257 if (IS_ERR(ldo7_1p8)) {
1258 rc = PTR_ERR(ldo7_1p8);
1259 goto put_3p3;
1260 }
1261
1262 rc = regulator_set_voltage(ldo6_3p3, USB_PHY_3P3_VOL_MIN,
1263 USB_PHY_3P3_VOL_MAX);
1264 if (rc) {
1265 pr_err("%s: Unable to set voltage level for"
1266 "ldo6_3p3 regulator\n", __func__);
1267 goto put_1p8;
1268 }
1269 rc = regulator_enable(ldo6_3p3);
1270 if (rc) {
1271 pr_err("%s: Unable to enable the regulator:"
1272 "ldo6_3p3\n", __func__);
1273 goto put_1p8;
1274 }
1275 rc = regulator_set_voltage(ldo7_1p8, USB_PHY_1P8_VOL_MIN,
1276 USB_PHY_1P8_VOL_MAX);
1277 if (rc) {
1278 pr_err("%s: Unable to set voltage level for"
1279 "ldo7_1p8 regulator\n", __func__);
1280 goto disable_3p3;
1281 }
1282 rc = regulator_enable(ldo7_1p8);
1283 if (rc) {
1284 pr_err("%s: Unable to enable the regulator:"
1285 "ldo7_1p8\n", __func__);
1286 goto disable_3p3;
1287 }
1288
1289 return 0;
1290 }
1291
1292 regulator_disable(ldo7_1p8);
1293disable_3p3:
1294 regulator_disable(ldo6_3p3);
1295put_1p8:
1296 regulator_put(ldo7_1p8);
1297put_3p3:
1298 regulator_put(ldo6_3p3);
1299 return rc;
1300}
1301
1302static int msm_hsusb_ldo_enable(int on)
1303{
1304 int ret = 0;
1305
1306 if (!ldo7_1p8 || IS_ERR(ldo7_1p8)) {
1307 pr_err("%s: ldo7_1p8 is not initialized\n", __func__);
1308 return -ENODEV;
1309 }
1310
1311 if (!ldo6_3p3 || IS_ERR(ldo6_3p3)) {
1312 pr_err("%s: ldo6_3p3 is not initialized\n", __func__);
1313 return -ENODEV;
1314 }
1315
1316 if (on) {
1317 ret = regulator_set_optimum_mode(ldo7_1p8,
1318 USB_PHY_1P8_HPM_LOAD);
1319 if (ret < 0) {
1320 pr_err("%s: Unable to set HPM of the regulator:"
1321 "ldo7_1p8\n", __func__);
1322 return ret;
1323 }
1324 ret = regulator_set_optimum_mode(ldo6_3p3,
1325 USB_PHY_3P3_HPM_LOAD);
1326 if (ret < 0) {
1327 pr_err("%s: Unable to set HPM of the regulator:"
1328 "ldo6_3p3\n", __func__);
1329 regulator_set_optimum_mode(ldo7_1p8,
1330 USB_PHY_1P8_LPM_LOAD);
1331 return ret;
1332 }
1333 } else {
1334 ret = regulator_set_optimum_mode(ldo7_1p8,
1335 USB_PHY_1P8_LPM_LOAD);
1336 if (ret < 0)
1337 pr_err("%s: Unable to set LPM of the regulator:"
1338 "ldo7_1p8\n", __func__);
1339 ret = regulator_set_optimum_mode(ldo6_3p3,
1340 USB_PHY_3P3_LPM_LOAD);
1341 if (ret < 0)
1342 pr_err("%s: Unable to set LPM of the regulator:"
1343 "ldo6_3p3\n", __func__);
1344 }
1345
1346 pr_debug("reg (%s)\n", on ? "HPM" : "LPM");
1347 return ret < 0 ? ret : 0;
1348 }
1349#endif
1350#ifdef CONFIG_USB_EHCI_MSM_72K
1351#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
1352static void msm_hsusb_smb137b_vbus_power(unsigned phy_info, int on)
1353{
1354 static int vbus_is_on;
1355
1356 /* If VBUS is already on (or off), do nothing. */
1357 if (on == vbus_is_on)
1358 return;
1359 smb137b_otg_power(on);
1360 vbus_is_on = on;
1361}
1362#endif
1363static void msm_hsusb_vbus_power(unsigned phy_info, int on)
1364{
1365 static struct regulator *votg_5v_switch;
1366 static struct regulator *ext_5v_reg;
1367 static int vbus_is_on;
1368
1369 /* If VBUS is already on (or off), do nothing. */
1370 if (on == vbus_is_on)
1371 return;
1372
1373 if (!votg_5v_switch) {
1374 votg_5v_switch = regulator_get(NULL, "8901_usb_otg");
1375 if (IS_ERR(votg_5v_switch)) {
1376 pr_err("%s: unable to get votg_5v_switch\n", __func__);
1377 return;
1378 }
1379 }
1380 if (!ext_5v_reg) {
1381 ext_5v_reg = regulator_get(NULL, "8901_mpp0");
1382 if (IS_ERR(ext_5v_reg)) {
1383 pr_err("%s: unable to get ext_5v_reg\n", __func__);
1384 return;
1385 }
1386 }
1387 if (on) {
1388 if (regulator_enable(ext_5v_reg)) {
1389 pr_err("%s: Unable to enable the regulator:"
1390 " ext_5v_reg\n", __func__);
1391 return;
1392 }
1393 if (regulator_enable(votg_5v_switch)) {
1394 pr_err("%s: Unable to enable the regulator:"
1395 " votg_5v_switch\n", __func__);
1396 return;
1397 }
1398 } else {
1399 if (regulator_disable(votg_5v_switch))
1400 pr_err("%s: Unable to enable the regulator:"
1401 " votg_5v_switch\n", __func__);
1402 if (regulator_disable(ext_5v_reg))
1403 pr_err("%s: Unable to enable the regulator:"
1404 " ext_5v_reg\n", __func__);
1405 }
1406
1407 vbus_is_on = on;
1408}
1409
1410static struct msm_usb_host_platform_data msm_usb_host_pdata = {
1411 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_45NM),
1412 .power_budget = 390,
1413};
1414#endif
1415
1416#ifdef CONFIG_BATTERY_MSM8X60
1417static int msm_hsusb_pmic_vbus_notif_init(void (*callback)(int online),
1418 int init)
1419{
1420 int ret = -ENOTSUPP;
1421
1422#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
1423 if (machine_is_msm8x60_fluid()) {
1424 if (init)
1425 msm_charger_register_vbus_sn(callback);
1426 else
1427 msm_charger_unregister_vbus_sn(callback);
1428 return 0;
1429 }
1430#endif
1431 /* ID and VBUS lines are connected to pmic on 8660.V2.SURF,
1432 * hence, irrespective of either peripheral only mode or
1433 * OTG (host and peripheral) modes, can depend on pmic for
1434 * vbus notifications
Steve Muckle9161d302010-02-11 11:50:40 -08001435 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001436 if ((SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2)
1437 && (machine_is_msm8x60_surf() ||
1438 pmic_id_notif_supported)) {
1439 if (init)
1440 ret = msm_charger_register_vbus_sn(callback);
1441 else {
1442 msm_charger_unregister_vbus_sn(callback);
1443 ret = 0;
1444 }
1445 } else {
1446#if !defined(CONFIG_USB_EHCI_MSM_72K)
1447 if (init)
1448 ret = msm_charger_register_vbus_sn(callback);
1449 else {
1450 msm_charger_unregister_vbus_sn(callback);
1451 ret = 0;
1452 }
1453#endif
1454 }
1455 return ret;
1456}
1457#endif
1458
1459#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_MSM_72K)
1460static struct msm_otg_platform_data msm_otg_pdata = {
1461 /* if usb link is in sps there is no need for
1462 * usb pclk as dayatona fabric clock will be
1463 * used instead
1464 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001465 .pemp_level = PRE_EMPHASIS_WITH_20_PERCENT,
1466 .cdr_autoreset = CDR_AUTO_RESET_DISABLE,
1467 .se1_gating = SE1_GATING_DISABLE,
Chandra Devireddyb3fc78c2011-08-30 17:25:55 +05301468 .bam_disable = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001469#ifdef CONFIG_USB_EHCI_MSM_72K
1470 .pmic_id_notif_init = msm_hsusb_pmic_id_notif_init,
Anji jonnalaae745e92011-11-14 18:34:31 +05301471 .phy_id_setup_init = msm_hsusb_phy_id_setup_init,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001472#endif
1473#ifdef CONFIG_USB_EHCI_MSM_72K
1474 .vbus_power = msm_hsusb_vbus_power,
1475#endif
1476#ifdef CONFIG_BATTERY_MSM8X60
1477 .pmic_vbus_notif_init = msm_hsusb_pmic_vbus_notif_init,
1478#endif
1479 .ldo_init = msm_hsusb_ldo_init,
1480 .ldo_enable = msm_hsusb_ldo_enable,
1481 .config_vddcx = msm_hsusb_config_vddcx,
1482 .init_vddcx = msm_hsusb_init_vddcx,
1483#ifdef CONFIG_BATTERY_MSM8X60
1484 .chg_vbus_draw = msm_charger_vbus_draw,
1485#endif
1486};
1487#endif
1488
1489#ifdef CONFIG_USB_GADGET_MSM_72K
1490static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = {
1491 .is_phy_status_timer_on = 1,
1492};
1493#endif
1494
1495#ifdef CONFIG_USB_G_ANDROID
1496
1497#define PID_MAGIC_ID 0x71432909
1498#define SERIAL_NUM_MAGIC_ID 0x61945374
1499#define SERIAL_NUMBER_LENGTH 127
1500#define DLOAD_USB_BASE_ADD 0x2A05F0C8
1501
1502struct magic_num_struct {
1503 uint32_t pid;
1504 uint32_t serial_num;
1505};
1506
1507struct dload_struct {
1508 uint32_t reserved1;
1509 uint32_t reserved2;
1510 uint32_t reserved3;
1511 uint16_t reserved4;
1512 uint16_t pid;
1513 char serial_number[SERIAL_NUMBER_LENGTH];
1514 uint16_t reserved5;
1515 struct magic_num_struct
1516 magic_struct;
1517};
1518
1519static int usb_diag_update_pid_and_serial_num(uint32_t pid, const char *snum)
1520{
1521 struct dload_struct __iomem *dload = 0;
1522
1523 dload = ioremap(DLOAD_USB_BASE_ADD, sizeof(*dload));
1524 if (!dload) {
1525 pr_err("%s: cannot remap I/O memory region: %08x\n",
1526 __func__, DLOAD_USB_BASE_ADD);
1527 return -ENXIO;
1528 }
1529
1530 pr_debug("%s: dload:%p pid:%x serial_num:%s\n",
1531 __func__, dload, pid, snum);
1532 /* update pid */
1533 dload->magic_struct.pid = PID_MAGIC_ID;
1534 dload->pid = pid;
1535
1536 /* update serial number */
1537 dload->magic_struct.serial_num = 0;
1538 if (!snum)
1539 return 0;
1540
1541 dload->magic_struct.serial_num = SERIAL_NUM_MAGIC_ID;
1542 strncpy(dload->serial_number, snum, SERIAL_NUMBER_LENGTH);
1543 dload->serial_number[SERIAL_NUMBER_LENGTH - 1] = '\0';
1544
1545 iounmap(dload);
1546
1547 return 0;
1548}
1549
1550static struct android_usb_platform_data android_usb_pdata = {
1551 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
1552};
1553
1554static struct platform_device android_usb_device = {
1555 .name = "android_usb",
1556 .id = -1,
1557 .dev = {
1558 .platform_data = &android_usb_pdata,
1559 },
1560};
1561
1562
1563#endif
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08001564
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001565#ifdef CONFIG_MSM_VPE
1566static struct resource msm_vpe_resources[] = {
1567 {
1568 .start = 0x05300000,
1569 .end = 0x05300000 + SZ_1M - 1,
1570 .flags = IORESOURCE_MEM,
1571 },
1572 {
1573 .start = INT_VPE,
1574 .end = INT_VPE,
1575 .flags = IORESOURCE_IRQ,
1576 },
1577};
1578
1579static struct platform_device msm_vpe_device = {
1580 .name = "msm_vpe",
1581 .id = 0,
1582 .num_resources = ARRAY_SIZE(msm_vpe_resources),
1583 .resource = msm_vpe_resources,
1584};
1585#endif
1586
1587#ifdef CONFIG_MSM_CAMERA
1588#ifdef CONFIG_MSM_CAMERA_FLASH
1589#define VFE_CAMIF_TIMER1_GPIO 29
1590#define VFE_CAMIF_TIMER2_GPIO 30
1591#define VFE_CAMIF_TIMER3_GPIO_INT 31
1592#define FUSION_VFE_CAMIF_TIMER1_GPIO 42
1593static struct msm_camera_sensor_flash_src msm_flash_src = {
1594 .flash_sr_type = MSM_CAMERA_FLASH_SRC_PMIC,
1595 ._fsrc.pmic_src.num_of_src = 2,
1596 ._fsrc.pmic_src.low_current = 100,
1597 ._fsrc.pmic_src.high_current = 300,
1598 ._fsrc.pmic_src.led_src_1 = PMIC8058_ID_FLASH_LED_0,
1599 ._fsrc.pmic_src.led_src_2 = PMIC8058_ID_FLASH_LED_1,
1600 ._fsrc.pmic_src.pmic_set_current = pm8058_set_flash_led_current,
1601};
1602#ifdef CONFIG_IMX074
1603static struct msm_camera_sensor_strobe_flash_data strobe_flash_xenon = {
1604 .flash_trigger = VFE_CAMIF_TIMER2_GPIO,
1605 .flash_charge = VFE_CAMIF_TIMER1_GPIO,
1606 .flash_charge_done = VFE_CAMIF_TIMER3_GPIO_INT,
1607 .flash_recharge_duration = 50000,
1608 .irq = MSM_GPIO_TO_INT(VFE_CAMIF_TIMER3_GPIO_INT),
1609};
1610#endif
1611#endif
1612
1613int msm_cam_gpio_tbl[] = {
1614 32,/*CAMIF_MCLK*/
1615 47,/*CAMIF_I2C_DATA*/
1616 48,/*CAMIF_I2C_CLK*/
1617 105,/*STANDBY*/
1618};
1619
1620enum msm_cam_stat{
1621 MSM_CAM_OFF,
1622 MSM_CAM_ON,
1623};
1624
1625static int config_gpio_table(enum msm_cam_stat stat)
1626{
1627 int rc = 0, i = 0;
1628 if (stat == MSM_CAM_ON) {
1629 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++) {
1630 rc = gpio_request(msm_cam_gpio_tbl[i], "CAM_GPIO");
1631 if (unlikely(rc < 0)) {
1632 pr_err("%s not able to get gpio\n", __func__);
1633 for (i--; i >= 0; i--)
1634 gpio_free(msm_cam_gpio_tbl[i]);
1635 break;
1636 }
1637 }
1638 } else {
1639 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++)
1640 gpio_free(msm_cam_gpio_tbl[i]);
1641 }
1642 return rc;
1643}
1644
1645static struct msm_camera_sensor_platform_info sensor_board_info = {
1646 .mount_angle = 0
1647};
1648
1649/*external regulator VREG_5V*/
1650static struct regulator *reg_flash_5V;
1651
1652static int config_camera_on_gpios_fluid(void)
1653{
1654 int rc = 0;
1655
1656 reg_flash_5V = regulator_get(NULL, "8901_mpp0");
1657 if (IS_ERR(reg_flash_5V)) {
1658 pr_err("'%s' regulator not found, rc=%ld\n",
1659 "8901_mpp0", IS_ERR(reg_flash_5V));
1660 return -ENODEV;
1661 }
1662
1663 rc = regulator_enable(reg_flash_5V);
1664 if (rc) {
1665 pr_err("'%s' regulator enable failed, rc=%d\n",
1666 "8901_mpp0", rc);
1667 regulator_put(reg_flash_5V);
1668 return rc;
1669 }
1670
1671#ifdef CONFIG_IMX074
1672 sensor_board_info.mount_angle = 90;
1673#endif
1674 rc = config_gpio_table(MSM_CAM_ON);
1675 if (rc < 0) {
1676 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1677 "failed\n", __func__);
1678 return rc;
1679 }
1680
1681 rc = gpio_request(GPIO_EXT_CAMIF_PWR_EN, "CAM_EN");
1682 if (rc < 0) {
1683 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1684 "failed\n", __func__, GPIO_EXT_CAMIF_PWR_EN);
1685 regulator_disable(reg_flash_5V);
1686 regulator_put(reg_flash_5V);
1687 return rc;
1688 }
1689 gpio_direction_output(GPIO_EXT_CAMIF_PWR_EN, 0);
1690 msleep(20);
1691 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 1);
1692
1693
1694 /*Enable LED_FLASH_EN*/
1695 rc = gpio_request(GPIO_LED_FLASH_EN, "LED_FLASH_EN");
1696 if (rc < 0) {
1697 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1698 "failed\n", __func__, GPIO_LED_FLASH_EN);
1699
1700 regulator_disable(reg_flash_5V);
1701 regulator_put(reg_flash_5V);
1702 config_gpio_table(MSM_CAM_OFF);
1703 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1704 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1705 return rc;
1706 }
1707 gpio_direction_output(GPIO_LED_FLASH_EN, 1);
1708 msleep(20);
1709 return rc;
1710}
1711
1712
1713static void config_camera_off_gpios_fluid(void)
1714{
1715 regulator_disable(reg_flash_5V);
1716 regulator_put(reg_flash_5V);
1717
1718 gpio_direction_output(GPIO_LED_FLASH_EN, 0);
1719 gpio_free(GPIO_LED_FLASH_EN);
1720
1721 config_gpio_table(MSM_CAM_OFF);
1722
1723 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1724 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1725}
1726static int config_camera_on_gpios(void)
1727{
1728 int rc = 0;
1729
1730 if (machine_is_msm8x60_fluid())
1731 return config_camera_on_gpios_fluid();
1732
1733 rc = config_gpio_table(MSM_CAM_ON);
1734 if (rc < 0) {
1735 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1736 "failed\n", __func__);
1737 return rc;
1738 }
1739
Jilai Wang971f97f2011-07-13 14:25:25 -04001740 if (!machine_is_msm8x60_dragon()) {
1741 rc = gpio_request(GPIO_EXT_CAMIF_PWR_EN, "CAM_EN");
1742 if (rc < 0) {
1743 config_gpio_table(MSM_CAM_OFF);
1744 pr_err("%s: CAMSENSOR gpio %d request"
1745 "failed\n", __func__, GPIO_EXT_CAMIF_PWR_EN);
1746 return rc;
1747 }
1748 gpio_direction_output(GPIO_EXT_CAMIF_PWR_EN, 0);
1749 msleep(20);
1750 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001751 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001752
1753#ifdef CONFIG_MSM_CAMERA_FLASH
1754#ifdef CONFIG_IMX074
1755 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
1756 strobe_flash_xenon.flash_charge = FUSION_VFE_CAMIF_TIMER1_GPIO;
1757#endif
1758#endif
1759 return rc;
1760}
1761
1762static void config_camera_off_gpios(void)
1763{
1764 if (machine_is_msm8x60_fluid())
1765 return config_camera_off_gpios_fluid();
1766
1767
1768 config_gpio_table(MSM_CAM_OFF);
1769
Jilai Wang971f97f2011-07-13 14:25:25 -04001770 if (!machine_is_msm8x60_dragon()) {
1771 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1772 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1773 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001774}
1775
1776#ifdef CONFIG_QS_S5K4E1
1777
1778#define QS_CAM_HC37_CAM_PD PM8058_GPIO_PM_TO_SYS(26)
1779
1780static int config_camera_on_gpios_qs_cam_fluid(void)
1781{
1782 int rc = 0;
1783
1784 /* request QS_CAM_HC37_CAM_PD as an output to HC37 ASIC pin CAM_PD */
1785 rc = gpio_request(QS_CAM_HC37_CAM_PD, "QS_CAM_HC37_CAM_PD");
1786 if (rc < 0) {
1787 printk(KERN_ERR "%s: QS_CAM_HC37_CAM_PD gpio %d request"
1788 " failed\n", __func__, QS_CAM_HC37_CAM_PD);
1789 return rc;
1790 }
1791 gpio_direction_output(QS_CAM_HC37_CAM_PD, 0);
1792 msleep(20);
1793 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 1);
1794 msleep(20);
1795
1796 /*
1797 * Set GPIO_AUX_CAM_2P7_EN to 1 on North Expander IO2
1798 * to enable 2.7V power to Camera
1799 */
1800 rc = gpio_request(GPIO_AUX_CAM_2P7_EN, "CAM_2P7_EN");
1801 if (rc < 0) {
1802 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1803 " failed\n", __func__, GPIO_AUX_CAM_2P7_EN);
1804 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1805 gpio_free(QS_CAM_HC37_CAM_PD);
1806 return rc;
1807 }
1808 gpio_direction_output(GPIO_AUX_CAM_2P7_EN, 0);
1809 msleep(20);
1810 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 1);
1811 msleep(20);
1812
1813 rc = config_camera_on_gpios_fluid();
1814 if (rc < 0) {
1815 printk(KERN_ERR "%s: config_camera_on_gpios_fluid"
1816 " failed\n", __func__);
1817 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1818 gpio_free(QS_CAM_HC37_CAM_PD);
1819 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 0);
1820 gpio_free(GPIO_AUX_CAM_2P7_EN);
1821 return rc;
1822 }
1823 return rc;
1824}
1825
1826static void config_camera_off_gpios_qs_cam_fluid(void)
1827{
1828 /*
1829 * Set GPIO_AUX_CAM_2P7_EN to 0 on North Expander IO2
1830 * to disable 2.7V power to Camera
1831 */
1832 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 0);
1833 gpio_free(GPIO_AUX_CAM_2P7_EN);
1834
1835 /* set QS_CAM_HC37_CAM_PD to 0 to power off HC37 ASIC*/
1836 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1837 gpio_free(QS_CAM_HC37_CAM_PD);
1838
1839 config_camera_off_gpios_fluid();
1840 return;
1841}
1842
1843static int config_camera_on_gpios_qs_cam(void)
1844{
1845 int rc = 0;
1846
1847 if (machine_is_msm8x60_fluid())
1848 return config_camera_on_gpios_qs_cam_fluid();
1849
1850 rc = config_camera_on_gpios();
1851 return rc;
1852}
1853
1854static void config_camera_off_gpios_qs_cam(void)
1855{
1856 if (machine_is_msm8x60_fluid())
1857 return config_camera_off_gpios_qs_cam_fluid();
1858
1859 config_camera_off_gpios();
1860 return;
1861}
1862#endif
1863
1864static int config_camera_on_gpios_web_cam(void)
1865{
1866 int rc = 0;
1867 rc = config_gpio_table(MSM_CAM_ON);
1868 if (rc < 0) {
1869 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1870 "failed\n", __func__);
1871 return rc;
1872 }
1873
Jilai Wang53d27a82011-07-13 14:32:58 -04001874 if (!(machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon())) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001875 rc = gpio_request(GPIO_WEB_CAMIF_STANDBY, "CAM_EN");
1876 if (rc < 0) {
1877 config_gpio_table(MSM_CAM_OFF);
1878 pr_err(KERN_ERR "%s: CAMSENSOR gpio %d request"
1879 "failed\n", __func__, GPIO_WEB_CAMIF_STANDBY);
1880 return rc;
1881 }
1882 gpio_direction_output(GPIO_WEB_CAMIF_STANDBY, 0);
1883 }
1884 return rc;
1885}
1886
1887static void config_camera_off_gpios_web_cam(void)
1888{
1889 config_gpio_table(MSM_CAM_OFF);
Jilai Wang53d27a82011-07-13 14:32:58 -04001890 if (!(machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon())) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001891 gpio_set_value_cansleep(GPIO_WEB_CAMIF_STANDBY, 1);
1892 gpio_free(GPIO_WEB_CAMIF_STANDBY);
1893 }
1894 return;
1895}
1896
1897#ifdef CONFIG_MSM_BUS_SCALING
1898static struct msm_bus_vectors cam_init_vectors[] = {
1899 {
1900 .src = MSM_BUS_MASTER_VFE,
1901 .dst = MSM_BUS_SLAVE_SMI,
1902 .ab = 0,
1903 .ib = 0,
1904 },
1905 {
1906 .src = MSM_BUS_MASTER_VFE,
1907 .dst = MSM_BUS_SLAVE_EBI_CH0,
1908 .ab = 0,
1909 .ib = 0,
1910 },
1911 {
1912 .src = MSM_BUS_MASTER_VPE,
1913 .dst = MSM_BUS_SLAVE_SMI,
1914 .ab = 0,
1915 .ib = 0,
1916 },
1917 {
1918 .src = MSM_BUS_MASTER_VPE,
1919 .dst = MSM_BUS_SLAVE_EBI_CH0,
1920 .ab = 0,
1921 .ib = 0,
1922 },
1923 {
1924 .src = MSM_BUS_MASTER_JPEG_ENC,
1925 .dst = MSM_BUS_SLAVE_SMI,
1926 .ab = 0,
1927 .ib = 0,
1928 },
1929 {
1930 .src = MSM_BUS_MASTER_JPEG_ENC,
1931 .dst = MSM_BUS_SLAVE_EBI_CH0,
1932 .ab = 0,
1933 .ib = 0,
1934 },
1935};
1936
1937static struct msm_bus_vectors cam_preview_vectors[] = {
1938 {
1939 .src = MSM_BUS_MASTER_VFE,
1940 .dst = MSM_BUS_SLAVE_SMI,
1941 .ab = 0,
1942 .ib = 0,
1943 },
1944 {
1945 .src = MSM_BUS_MASTER_VFE,
1946 .dst = MSM_BUS_SLAVE_EBI_CH0,
1947 .ab = 283115520,
1948 .ib = 452984832,
1949 },
1950 {
1951 .src = MSM_BUS_MASTER_VPE,
1952 .dst = MSM_BUS_SLAVE_SMI,
1953 .ab = 0,
1954 .ib = 0,
1955 },
1956 {
1957 .src = MSM_BUS_MASTER_VPE,
1958 .dst = MSM_BUS_SLAVE_EBI_CH0,
1959 .ab = 0,
1960 .ib = 0,
1961 },
1962 {
1963 .src = MSM_BUS_MASTER_JPEG_ENC,
1964 .dst = MSM_BUS_SLAVE_SMI,
1965 .ab = 0,
1966 .ib = 0,
1967 },
1968 {
1969 .src = MSM_BUS_MASTER_JPEG_ENC,
1970 .dst = MSM_BUS_SLAVE_EBI_CH0,
1971 .ab = 0,
1972 .ib = 0,
1973 },
1974};
1975
1976static struct msm_bus_vectors cam_video_vectors[] = {
1977 {
1978 .src = MSM_BUS_MASTER_VFE,
1979 .dst = MSM_BUS_SLAVE_SMI,
1980 .ab = 283115520,
1981 .ib = 452984832,
1982 },
1983 {
1984 .src = MSM_BUS_MASTER_VFE,
1985 .dst = MSM_BUS_SLAVE_EBI_CH0,
1986 .ab = 283115520,
1987 .ib = 452984832,
1988 },
1989 {
1990 .src = MSM_BUS_MASTER_VPE,
1991 .dst = MSM_BUS_SLAVE_SMI,
1992 .ab = 319610880,
1993 .ib = 511377408,
1994 },
1995 {
1996 .src = MSM_BUS_MASTER_VPE,
1997 .dst = MSM_BUS_SLAVE_EBI_CH0,
1998 .ab = 0,
1999 .ib = 0,
2000 },
2001 {
2002 .src = MSM_BUS_MASTER_JPEG_ENC,
2003 .dst = MSM_BUS_SLAVE_SMI,
2004 .ab = 0,
2005 .ib = 0,
2006 },
2007 {
2008 .src = MSM_BUS_MASTER_JPEG_ENC,
2009 .dst = MSM_BUS_SLAVE_EBI_CH0,
2010 .ab = 0,
2011 .ib = 0,
2012 },
2013};
2014
2015static struct msm_bus_vectors cam_snapshot_vectors[] = {
2016 {
2017 .src = MSM_BUS_MASTER_VFE,
2018 .dst = MSM_BUS_SLAVE_SMI,
2019 .ab = 566231040,
2020 .ib = 905969664,
2021 },
2022 {
2023 .src = MSM_BUS_MASTER_VFE,
2024 .dst = MSM_BUS_SLAVE_EBI_CH0,
2025 .ab = 69984000,
2026 .ib = 111974400,
2027 },
2028 {
2029 .src = MSM_BUS_MASTER_VPE,
2030 .dst = MSM_BUS_SLAVE_SMI,
2031 .ab = 0,
2032 .ib = 0,
2033 },
2034 {
2035 .src = MSM_BUS_MASTER_VPE,
2036 .dst = MSM_BUS_SLAVE_EBI_CH0,
2037 .ab = 0,
2038 .ib = 0,
2039 },
2040 {
2041 .src = MSM_BUS_MASTER_JPEG_ENC,
2042 .dst = MSM_BUS_SLAVE_SMI,
2043 .ab = 320864256,
2044 .ib = 513382810,
2045 },
2046 {
2047 .src = MSM_BUS_MASTER_JPEG_ENC,
2048 .dst = MSM_BUS_SLAVE_EBI_CH0,
2049 .ab = 320864256,
2050 .ib = 513382810,
2051 },
2052};
2053
2054static struct msm_bus_vectors cam_zsl_vectors[] = {
2055 {
2056 .src = MSM_BUS_MASTER_VFE,
2057 .dst = MSM_BUS_SLAVE_SMI,
2058 .ab = 566231040,
2059 .ib = 905969664,
2060 },
2061 {
2062 .src = MSM_BUS_MASTER_VFE,
2063 .dst = MSM_BUS_SLAVE_EBI_CH0,
2064 .ab = 706199040,
2065 .ib = 1129918464,
2066 },
2067 {
2068 .src = MSM_BUS_MASTER_VPE,
2069 .dst = MSM_BUS_SLAVE_SMI,
2070 .ab = 0,
2071 .ib = 0,
2072 },
2073 {
2074 .src = MSM_BUS_MASTER_VPE,
2075 .dst = MSM_BUS_SLAVE_EBI_CH0,
2076 .ab = 0,
2077 .ib = 0,
2078 },
2079 {
2080 .src = MSM_BUS_MASTER_JPEG_ENC,
2081 .dst = MSM_BUS_SLAVE_SMI,
2082 .ab = 320864256,
2083 .ib = 513382810,
2084 },
2085 {
2086 .src = MSM_BUS_MASTER_JPEG_ENC,
2087 .dst = MSM_BUS_SLAVE_EBI_CH0,
2088 .ab = 320864256,
2089 .ib = 513382810,
2090 },
2091};
2092
2093static struct msm_bus_vectors cam_stereo_video_vectors[] = {
2094 {
2095 .src = MSM_BUS_MASTER_VFE,
2096 .dst = MSM_BUS_SLAVE_SMI,
2097 .ab = 212336640,
2098 .ib = 339738624,
2099 },
2100 {
2101 .src = MSM_BUS_MASTER_VFE,
2102 .dst = MSM_BUS_SLAVE_EBI_CH0,
2103 .ab = 25090560,
2104 .ib = 40144896,
2105 },
2106 {
2107 .src = MSM_BUS_MASTER_VPE,
2108 .dst = MSM_BUS_SLAVE_SMI,
2109 .ab = 239708160,
2110 .ib = 383533056,
2111 },
2112 {
2113 .src = MSM_BUS_MASTER_VPE,
2114 .dst = MSM_BUS_SLAVE_EBI_CH0,
2115 .ab = 79902720,
2116 .ib = 127844352,
2117 },
2118 {
2119 .src = MSM_BUS_MASTER_JPEG_ENC,
2120 .dst = MSM_BUS_SLAVE_SMI,
2121 .ab = 0,
2122 .ib = 0,
2123 },
2124 {
2125 .src = MSM_BUS_MASTER_JPEG_ENC,
2126 .dst = MSM_BUS_SLAVE_EBI_CH0,
2127 .ab = 0,
2128 .ib = 0,
2129 },
2130};
2131
2132static struct msm_bus_vectors cam_stereo_snapshot_vectors[] = {
2133 {
2134 .src = MSM_BUS_MASTER_VFE,
2135 .dst = MSM_BUS_SLAVE_SMI,
2136 .ab = 0,
2137 .ib = 0,
2138 },
2139 {
2140 .src = MSM_BUS_MASTER_VFE,
2141 .dst = MSM_BUS_SLAVE_EBI_CH0,
2142 .ab = 300902400,
2143 .ib = 481443840,
2144 },
2145 {
2146 .src = MSM_BUS_MASTER_VPE,
2147 .dst = MSM_BUS_SLAVE_SMI,
2148 .ab = 230307840,
2149 .ib = 368492544,
2150 },
2151 {
2152 .src = MSM_BUS_MASTER_VPE,
2153 .dst = MSM_BUS_SLAVE_EBI_CH0,
2154 .ab = 245113344,
2155 .ib = 392181351,
2156 },
2157 {
2158 .src = MSM_BUS_MASTER_JPEG_ENC,
2159 .dst = MSM_BUS_SLAVE_SMI,
2160 .ab = 106536960,
2161 .ib = 170459136,
2162 },
2163 {
2164 .src = MSM_BUS_MASTER_JPEG_ENC,
2165 .dst = MSM_BUS_SLAVE_EBI_CH0,
2166 .ab = 106536960,
2167 .ib = 170459136,
2168 },
2169};
2170
2171static struct msm_bus_paths cam_bus_client_config[] = {
2172 {
2173 ARRAY_SIZE(cam_init_vectors),
2174 cam_init_vectors,
2175 },
2176 {
2177 ARRAY_SIZE(cam_preview_vectors),
2178 cam_preview_vectors,
2179 },
2180 {
2181 ARRAY_SIZE(cam_video_vectors),
2182 cam_video_vectors,
2183 },
2184 {
2185 ARRAY_SIZE(cam_snapshot_vectors),
2186 cam_snapshot_vectors,
2187 },
2188 {
2189 ARRAY_SIZE(cam_zsl_vectors),
2190 cam_zsl_vectors,
2191 },
2192 {
2193 ARRAY_SIZE(cam_stereo_video_vectors),
2194 cam_stereo_video_vectors,
2195 },
2196 {
2197 ARRAY_SIZE(cam_stereo_snapshot_vectors),
2198 cam_stereo_snapshot_vectors,
2199 },
2200};
2201
2202static struct msm_bus_scale_pdata cam_bus_client_pdata = {
2203 cam_bus_client_config,
2204 ARRAY_SIZE(cam_bus_client_config),
2205 .name = "msm_camera",
2206};
2207#endif
2208
2209struct msm_camera_device_platform_data msm_camera_device_data = {
2210 .camera_gpio_on = config_camera_on_gpios,
2211 .camera_gpio_off = config_camera_off_gpios,
2212 .ioext.csiphy = 0x04800000,
2213 .ioext.csisz = 0x00000400,
2214 .ioext.csiirq = CSI_0_IRQ,
2215 .ioclk.mclk_clk_rate = 24000000,
2216 .ioclk.vfe_clk_rate = 228570000,
2217#ifdef CONFIG_MSM_BUS_SCALING
2218 .cam_bus_scale_table = &cam_bus_client_pdata,
2219#endif
2220};
2221
2222#ifdef CONFIG_QS_S5K4E1
2223struct msm_camera_device_platform_data msm_camera_device_data_qs_cam = {
2224 .camera_gpio_on = config_camera_on_gpios_qs_cam,
2225 .camera_gpio_off = config_camera_off_gpios_qs_cam,
2226 .ioext.csiphy = 0x04800000,
2227 .ioext.csisz = 0x00000400,
2228 .ioext.csiirq = CSI_0_IRQ,
2229 .ioclk.mclk_clk_rate = 24000000,
2230 .ioclk.vfe_clk_rate = 228570000,
2231#ifdef CONFIG_MSM_BUS_SCALING
2232 .cam_bus_scale_table = &cam_bus_client_pdata,
2233#endif
2234};
2235#endif
2236
2237struct msm_camera_device_platform_data msm_camera_device_data_web_cam = {
2238 .camera_gpio_on = config_camera_on_gpios_web_cam,
2239 .camera_gpio_off = config_camera_off_gpios_web_cam,
2240 .ioext.csiphy = 0x04900000,
2241 .ioext.csisz = 0x00000400,
2242 .ioext.csiirq = CSI_1_IRQ,
2243 .ioclk.mclk_clk_rate = 24000000,
2244 .ioclk.vfe_clk_rate = 228570000,
2245#ifdef CONFIG_MSM_BUS_SCALING
2246 .cam_bus_scale_table = &cam_bus_client_pdata,
2247#endif
2248};
2249
2250struct resource msm_camera_resources[] = {
2251 {
2252 .start = 0x04500000,
2253 .end = 0x04500000 + SZ_1M - 1,
2254 .flags = IORESOURCE_MEM,
2255 },
2256 {
2257 .start = VFE_IRQ,
2258 .end = VFE_IRQ,
2259 .flags = IORESOURCE_IRQ,
2260 },
2261};
2262#ifdef CONFIG_MT9E013
2263static struct msm_camera_sensor_platform_info mt9e013_sensor_8660_info = {
2264 .mount_angle = 0
2265};
2266
2267static struct msm_camera_sensor_flash_data flash_mt9e013 = {
2268 .flash_type = MSM_CAMERA_FLASH_LED,
2269 .flash_src = &msm_flash_src
2270};
2271
2272static struct msm_camera_sensor_info msm_camera_sensor_mt9e013_data = {
2273 .sensor_name = "mt9e013",
2274 .sensor_reset = 106,
2275 .sensor_pwd = 85,
2276 .vcm_pwd = 1,
2277 .vcm_enable = 0,
2278 .pdata = &msm_camera_device_data,
2279 .resource = msm_camera_resources,
2280 .num_resources = ARRAY_SIZE(msm_camera_resources),
2281 .flash_data = &flash_mt9e013,
2282 .strobe_flash_data = &strobe_flash_xenon,
2283 .sensor_platform_info = &mt9e013_sensor_8660_info,
2284 .csi_if = 1
2285};
2286struct platform_device msm_camera_sensor_mt9e013 = {
2287 .name = "msm_camera_mt9e013",
2288 .dev = {
2289 .platform_data = &msm_camera_sensor_mt9e013_data,
2290 },
2291};
2292#endif
2293
2294#ifdef CONFIG_IMX074
Roja Rani Yarubandi68ebb4d2011-10-20 10:33:16 +05302295static struct msm_camera_sensor_platform_info imx074_sensor_board_info = {
2296 .mount_angle = 180
2297};
2298
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002299static struct msm_camera_sensor_flash_data flash_imx074 = {
2300 .flash_type = MSM_CAMERA_FLASH_LED,
2301 .flash_src = &msm_flash_src
2302};
2303
2304static struct msm_camera_sensor_info msm_camera_sensor_imx074_data = {
2305 .sensor_name = "imx074",
2306 .sensor_reset = 106,
2307 .sensor_pwd = 85,
2308 .vcm_pwd = GPIO_AUX_CAM_2P7_EN,
2309 .vcm_enable = 1,
2310 .pdata = &msm_camera_device_data,
2311 .resource = msm_camera_resources,
2312 .num_resources = ARRAY_SIZE(msm_camera_resources),
2313 .flash_data = &flash_imx074,
2314 .strobe_flash_data = &strobe_flash_xenon,
Roja Rani Yarubandi68ebb4d2011-10-20 10:33:16 +05302315 .sensor_platform_info = &imx074_sensor_board_info,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002316 .csi_if = 1
2317};
2318struct platform_device msm_camera_sensor_imx074 = {
2319 .name = "msm_camera_imx074",
2320 .dev = {
2321 .platform_data = &msm_camera_sensor_imx074_data,
2322 },
2323};
2324#endif
2325#ifdef CONFIG_WEBCAM_OV9726
2326
2327static struct msm_camera_sensor_platform_info ov9726_sensor_8660_info = {
2328 .mount_angle = 0
2329};
2330
2331static struct msm_camera_sensor_flash_data flash_ov9726 = {
2332 .flash_type = MSM_CAMERA_FLASH_LED,
2333 .flash_src = &msm_flash_src
2334};
2335static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data = {
2336 .sensor_name = "ov9726",
Kevin Chan3382c512011-07-19 21:00:45 -07002337 .sensor_reset_enable = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002338 .sensor_reset = GPIO_FRONT_CAM_RESET_N,
2339 .sensor_pwd = 85,
2340 .vcm_pwd = 1,
2341 .vcm_enable = 0,
2342 .pdata = &msm_camera_device_data_web_cam,
2343 .resource = msm_camera_resources,
2344 .num_resources = ARRAY_SIZE(msm_camera_resources),
2345 .flash_data = &flash_ov9726,
2346 .sensor_platform_info = &ov9726_sensor_8660_info,
2347 .csi_if = 1
2348};
2349struct platform_device msm_camera_sensor_webcam_ov9726 = {
2350 .name = "msm_camera_ov9726",
2351 .dev = {
2352 .platform_data = &msm_camera_sensor_ov9726_data,
2353 },
2354};
2355#endif
2356#ifdef CONFIG_WEBCAM_OV7692
2357static struct msm_camera_sensor_flash_data flash_ov7692 = {
2358 .flash_type = MSM_CAMERA_FLASH_LED,
2359 .flash_src = &msm_flash_src
2360};
2361static struct msm_camera_sensor_info msm_camera_sensor_ov7692_data = {
2362 .sensor_name = "ov7692",
2363 .sensor_reset = GPIO_WEB_CAMIF_RESET_N,
2364 .sensor_pwd = 85,
2365 .vcm_pwd = 1,
2366 .vcm_enable = 0,
2367 .pdata = &msm_camera_device_data_web_cam,
2368 .resource = msm_camera_resources,
2369 .num_resources = ARRAY_SIZE(msm_camera_resources),
2370 .flash_data = &flash_ov7692,
2371 .csi_if = 1
2372};
2373
2374static struct platform_device msm_camera_sensor_webcam_ov7692 = {
2375 .name = "msm_camera_ov7692",
2376 .dev = {
2377 .platform_data = &msm_camera_sensor_ov7692_data,
2378 },
2379};
2380#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04002381#ifdef CONFIG_VX6953
2382static struct msm_camera_sensor_platform_info vx6953_sensor_8660_info = {
2383 .mount_angle = 270
2384};
2385
2386static struct msm_camera_sensor_flash_data flash_vx6953 = {
2387 .flash_type = MSM_CAMERA_FLASH_NONE,
2388 .flash_src = &msm_flash_src
2389};
2390
2391static struct msm_camera_sensor_info msm_camera_sensor_vx6953_data = {
2392 .sensor_name = "vx6953",
2393 .sensor_reset = 63,
2394 .sensor_pwd = 63,
2395 .vcm_pwd = GPIO_AUX_CAM_2P7_EN,
2396 .vcm_enable = 1,
2397 .pdata = &msm_camera_device_data,
2398 .resource = msm_camera_resources,
2399 .num_resources = ARRAY_SIZE(msm_camera_resources),
2400 .flash_data = &flash_vx6953,
2401 .sensor_platform_info = &vx6953_sensor_8660_info,
2402 .csi_if = 1
2403};
2404struct platform_device msm_camera_sensor_vx6953 = {
2405 .name = "msm_camera_vx6953",
2406 .dev = {
2407 .platform_data = &msm_camera_sensor_vx6953_data,
2408 },
2409};
2410#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002411#ifdef CONFIG_QS_S5K4E1
2412
Nishant Pandit613ab7a2011-09-02 03:36:01 +05302413static struct msm_camera_sensor_platform_info qs_s5k4e1_sensor_8660_info = {
2414#ifdef CONFIG_FB_MSM_MIPI_NOVATEK_CMD_QHD_PT
2415 .mount_angle = 90
2416#else
2417 .mount_angle = 0
2418#endif
2419};
2420
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002421static char eeprom_data[864];
2422static struct msm_camera_sensor_flash_data flash_qs_s5k4e1 = {
2423 .flash_type = MSM_CAMERA_FLASH_LED,
2424 .flash_src = &msm_flash_src
2425};
2426
2427static struct msm_camera_sensor_info msm_camera_sensor_qs_s5k4e1_data = {
2428 .sensor_name = "qs_s5k4e1",
2429 .sensor_reset = 106,
2430 .sensor_pwd = 85,
2431 .vcm_pwd = 1,
2432 .vcm_enable = 0,
2433 .pdata = &msm_camera_device_data_qs_cam,
2434 .resource = msm_camera_resources,
2435 .num_resources = ARRAY_SIZE(msm_camera_resources),
2436 .flash_data = &flash_qs_s5k4e1,
2437 .strobe_flash_data = &strobe_flash_xenon,
Nishant Pandit613ab7a2011-09-02 03:36:01 +05302438 .sensor_platform_info = &qs_s5k4e1_sensor_8660_info,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002439 .csi_if = 1,
2440 .eeprom_data = eeprom_data,
2441};
2442struct platform_device msm_camera_sensor_qs_s5k4e1 = {
2443 .name = "msm_camera_qs_s5k4e1",
2444 .dev = {
2445 .platform_data = &msm_camera_sensor_qs_s5k4e1_data,
2446 },
2447};
2448#endif
2449static struct i2c_board_info msm_camera_boardinfo[] __initdata = {
2450 #ifdef CONFIG_MT9E013
2451 {
2452 I2C_BOARD_INFO("mt9e013", 0x6C >> 2),
2453 },
2454 #endif
2455 #ifdef CONFIG_IMX074
2456 {
2457 I2C_BOARD_INFO("imx074", 0x1A),
2458 },
2459 #endif
2460 #ifdef CONFIG_WEBCAM_OV7692
2461 {
2462 I2C_BOARD_INFO("ov7692", 0x78),
2463 },
2464 #endif
2465 #ifdef CONFIG_WEBCAM_OV9726
2466 {
2467 I2C_BOARD_INFO("ov9726", 0x10),
2468 },
2469 #endif
2470 #ifdef CONFIG_QS_S5K4E1
2471 {
2472 I2C_BOARD_INFO("qs_s5k4e1", 0x20),
2473 },
2474 #endif
2475};
Jilai Wang971f97f2011-07-13 14:25:25 -04002476
2477static struct i2c_board_info msm_camera_dragon_boardinfo[] __initdata = {
Jilai Wang53d27a82011-07-13 14:32:58 -04002478 #ifdef CONFIG_WEBCAM_OV9726
2479 {
2480 I2C_BOARD_INFO("ov9726", 0x10),
2481 },
2482 #endif
Jilai Wang971f97f2011-07-13 14:25:25 -04002483 #ifdef CONFIG_VX6953
2484 {
2485 I2C_BOARD_INFO("vx6953", 0x20),
2486 },
2487 #endif
2488};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002489#endif
2490
2491#ifdef CONFIG_MSM_GEMINI
2492static struct resource msm_gemini_resources[] = {
2493 {
2494 .start = 0x04600000,
2495 .end = 0x04600000 + SZ_1M - 1,
2496 .flags = IORESOURCE_MEM,
2497 },
2498 {
2499 .start = INT_JPEG,
2500 .end = INT_JPEG,
2501 .flags = IORESOURCE_IRQ,
2502 },
2503};
2504
2505static struct platform_device msm_gemini_device = {
2506 .name = "msm_gemini",
2507 .resource = msm_gemini_resources,
2508 .num_resources = ARRAY_SIZE(msm_gemini_resources),
2509};
2510#endif
2511
2512#ifdef CONFIG_I2C_QUP
2513static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
2514{
2515}
2516
2517static struct msm_i2c_platform_data msm_gsbi3_qup_i2c_pdata = {
2518 .clk_freq = 384000,
2519 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002520 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2521};
2522
2523static struct msm_i2c_platform_data msm_gsbi4_qup_i2c_pdata = {
2524 .clk_freq = 100000,
2525 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002526 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2527};
2528
2529static struct msm_i2c_platform_data msm_gsbi7_qup_i2c_pdata = {
2530 .clk_freq = 100000,
2531 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002532 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2533};
2534
2535static struct msm_i2c_platform_data msm_gsbi8_qup_i2c_pdata = {
2536 .clk_freq = 100000,
2537 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002538 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2539};
2540
2541static struct msm_i2c_platform_data msm_gsbi9_qup_i2c_pdata = {
2542 .clk_freq = 100000,
2543 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002544 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2545};
2546
2547static struct msm_i2c_platform_data msm_gsbi12_qup_i2c_pdata = {
2548 .clk_freq = 100000,
2549 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002550 .use_gsbi_shared_mode = 1,
2551 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2552};
2553#endif
2554
2555#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
2556static struct msm_spi_platform_data msm_gsbi1_qup_spi_pdata = {
2557 .max_clock_speed = 24000000,
2558};
2559
2560static struct msm_spi_platform_data msm_gsbi10_qup_spi_pdata = {
2561 .max_clock_speed = 24000000,
2562};
2563#endif
2564
2565#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002566/* CODEC/TSSC SSBI */
2567static struct msm_i2c_ssbi_platform_data msm_ssbi3_pdata = {
2568 .controller_type = MSM_SBI_CTRL_SSBI,
2569};
2570#endif
2571
2572#ifdef CONFIG_BATTERY_MSM
2573/* Use basic value for fake MSM battery */
2574static struct msm_psy_batt_pdata msm_psy_batt_data = {
2575 .avail_chg_sources = AC_CHG,
2576};
2577
2578static struct platform_device msm_batt_device = {
2579 .name = "msm-battery",
2580 .id = -1,
2581 .dev.platform_data = &msm_psy_batt_data,
2582};
2583#endif
2584
2585#ifdef CONFIG_FB_MSM_LCDC_DSUB
2586/* VGA = 1440 x 900 x 4(bpp) x 2(pages)
2587 prim = 1024 x 600 x 4(bpp) x 2(pages)
2588 This is the difference. */
2589#define MSM_FB_DSUB_PMEM_ADDER (0xA32000-0x4B0000)
2590#else
2591#define MSM_FB_DSUB_PMEM_ADDER (0)
2592#endif
2593
2594/* Sensors DSPS platform data */
2595#ifdef CONFIG_MSM_DSPS
2596
2597static struct dsps_gpio_info dsps_surf_gpios[] = {
2598 {
2599 .name = "compass_rst_n",
2600 .num = GPIO_COMPASS_RST_N,
2601 .on_val = 1, /* device not in reset */
2602 .off_val = 0, /* device in reset */
2603 },
2604 {
2605 .name = "gpio_r_altimeter_reset_n",
2606 .num = GPIO_R_ALTIMETER_RESET_N,
2607 .on_val = 1, /* device not in reset */
2608 .off_val = 0, /* device in reset */
2609 }
2610};
2611
2612static struct dsps_gpio_info dsps_fluid_gpios[] = {
2613 {
2614 .name = "gpio_n_altimeter_reset_n",
2615 .num = GPIO_N_ALTIMETER_RESET_N,
2616 .on_val = 1, /* device not in reset */
2617 .off_val = 0, /* device in reset */
2618 }
2619};
2620
2621static void __init msm8x60_init_dsps(void)
2622{
2623 struct msm_dsps_platform_data *pdata =
2624 msm_dsps_device.dev.platform_data;
2625 /*
2626 * On Fluid the Compass sensor Chip-Select (CS) is directly connected
2627 * to the power supply and not controled via GPIOs. Fluid uses a
2628 * different IO-Expender (north) than used on surf/ffa.
2629 */
2630 if (machine_is_msm8x60_fluid()) {
2631 /* fluid has different firmware, gpios */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002632 pdata->pil_name = DSPS_PIL_FLUID_NAME;
2633 pdata->gpios = dsps_fluid_gpios;
2634 pdata->gpios_num = ARRAY_SIZE(dsps_fluid_gpios);
2635 } else {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002636 pdata->pil_name = DSPS_PIL_GENERIC_NAME;
2637 pdata->gpios = dsps_surf_gpios;
2638 pdata->gpios_num = ARRAY_SIZE(dsps_surf_gpios);
2639 }
2640
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002641 platform_device_register(&msm_dsps_device);
2642}
2643#endif /* CONFIG_MSM_DSPS */
2644
2645#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002646#define MSM_FB_PRIM_BUF_SIZE (1024 * 600 * 4 * 3) /* 4 bpp x 3 pages */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002647#else
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002648#define MSM_FB_PRIM_BUF_SIZE (1024 * 600 * 4 * 2) /* 4 bpp x 2 pages */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002649#endif
2650
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002651#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
2652#define MSM_FB_EXT_BUF_SIZE (1920 * 1080 * 2 * 1) /* 2 bpp x 1 page */
2653#elif defined(CONFIG_FB_MSM_TVOUT)
2654#define MSM_FB_EXT_BUF_SIZE (720 * 576 * 2 * 2) /* 2 bpp x 2 pages */
2655#else
2656#define MSM_FB_EXT_BUFT_SIZE 0
2657#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002658
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002659#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
2660/* 4 bpp x 2 page HDMI case */
2661#define MSM_FB_SIZE roundup((1920 * 1088 * 4 * 2), 4096)
2662#else
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002663/* Note: must be multiple of 4096 */
2664#define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE + \
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002665 MSM_FB_DSUB_PMEM_ADDER, 4096)
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002666#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002667
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002668#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
2669#define MSM_PMEM_SF_SIZE 0x8000000 /* 128 Mbytes */
2670#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002671#define MSM_PMEM_SF_SIZE 0x4000000 /* 64 Mbytes */
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002672#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002673
Huaibin Yanga5419422011-12-08 23:52:10 -08002674#ifdef CONFIG_FB_MSM_OVERLAY0_WRITEBACK
2675#define MSM_FB_OVERLAY0_WRITEBACK_SIZE roundup((1376 * 768 * 3 * 2), 4096)
2676#else
2677#define MSM_FB_OVERLAY0_WRITEBACK_SIZE (0)
2678#endif /* CONFIG_FB_MSM_OVERLAY0_WRITEBACK */
2679
2680#ifdef CONFIG_FB_MSM_OVERLAY1_WRITEBACK
2681#define MSM_FB_OVERLAY1_WRITEBACK_SIZE roundup((1920 * 1088 * 3 * 2), 4096)
2682#else
2683#define MSM_FB_OVERLAY1_WRITEBACK_SIZE (0)
2684#endif /* CONFIG_FB_MSM_OVERLAY1_WRITEBACK */
2685
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002686#define MSM_PMEM_KERNEL_EBI1_SIZE 0x600000
2687#define MSM_PMEM_ADSP_SIZE 0x2000000
Ben Romberger09e462d2011-08-09 15:24:37 -07002688#define MSM_PMEM_AUDIO_SIZE 0x28B000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002689
2690#define MSM_SMI_BASE 0x38000000
2691#define MSM_SMI_SIZE 0x4000000
2692
2693#define KERNEL_SMI_BASE (MSM_SMI_BASE)
Maheshwar Ajjac60c0462011-11-29 17:46:57 -08002694#define KERNEL_SMI_SIZE 0x600000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002695
2696#define USER_SMI_BASE (KERNEL_SMI_BASE + KERNEL_SMI_SIZE)
2697#define USER_SMI_SIZE (MSM_SMI_SIZE - KERNEL_SMI_SIZE)
2698#define MSM_PMEM_SMIPOOL_SIZE USER_SMI_SIZE
2699
Olav Hauganb5be7992011-11-18 14:29:02 -08002700#define MSM_ION_SF_SIZE 0x1800000 /* 24MB */
2701#define MSM_ION_CAMERA_SIZE MSM_PMEM_ADSP_SIZE
Olav Haugan42ebe712012-01-10 16:30:58 -08002702#define MSM_ION_MM_FW_SIZE 0x200000 /* (2MB) */
2703#define MSM_ION_MM_SIZE 0x3600000 /* (54MB) */
Olav Hauganb5be7992011-11-18 14:29:02 -08002704#define MSM_ION_MFC_SIZE SZ_8K
2705#define MSM_ION_WB_SIZE 0x600000 /* 6MB */
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002706
2707#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
Olav Haugan42ebe712012-01-10 16:30:58 -08002708#define MSM_ION_HEAP_NUM 7
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002709#else
Olav Hauganb5be7992011-11-18 14:29:02 -08002710#define MSM_ION_HEAP_NUM 1
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002711#endif
2712
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002713static unsigned fb_size;
2714static int __init fb_size_setup(char *p)
2715{
2716 fb_size = memparse(p, NULL);
2717 return 0;
2718}
2719early_param("fb_size", fb_size_setup);
2720
2721static unsigned pmem_kernel_ebi1_size = MSM_PMEM_KERNEL_EBI1_SIZE;
2722static int __init pmem_kernel_ebi1_size_setup(char *p)
2723{
2724 pmem_kernel_ebi1_size = memparse(p, NULL);
2725 return 0;
2726}
2727early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
2728
2729#ifdef CONFIG_ANDROID_PMEM
2730static unsigned pmem_sf_size = MSM_PMEM_SF_SIZE;
2731static int __init pmem_sf_size_setup(char *p)
2732{
2733 pmem_sf_size = memparse(p, NULL);
2734 return 0;
2735}
2736early_param("pmem_sf_size", pmem_sf_size_setup);
2737
2738static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
2739
2740static int __init pmem_adsp_size_setup(char *p)
2741{
2742 pmem_adsp_size = memparse(p, NULL);
2743 return 0;
2744}
2745early_param("pmem_adsp_size", pmem_adsp_size_setup);
2746
2747static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
2748
2749static int __init pmem_audio_size_setup(char *p)
2750{
2751 pmem_audio_size = memparse(p, NULL);
2752 return 0;
2753}
2754early_param("pmem_audio_size", pmem_audio_size_setup);
2755#endif
2756
2757static struct resource msm_fb_resources[] = {
2758 {
2759 .flags = IORESOURCE_DMA,
2760 }
2761};
2762
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002763static int msm_fb_detect_panel(const char *name)
2764{
2765 if (machine_is_msm8x60_fluid()) {
2766 uint32_t soc_platform_version = socinfo_get_platform_version();
2767 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3) {
2768#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
2769 if (!strncmp(name, LCDC_SAMSUNG_OLED_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002770 strnlen(LCDC_SAMSUNG_OLED_PANEL_NAME,
2771 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002772 return 0;
2773#endif
2774 } else { /*P3 and up use AUO panel */
2775#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
2776 if (!strncmp(name, LCDC_AUO_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002777 strnlen(LCDC_AUO_PANEL_NAME,
2778 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002779 return 0;
2780#endif
2781 }
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04002782#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
2783 } else if machine_is_msm8x60_dragon() {
2784 if (!strncmp(name, LCDC_NT35582_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002785 strnlen(LCDC_NT35582_PANEL_NAME,
2786 PANEL_NAME_MAX_LEN)))
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04002787 return 0;
2788#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002789 } else {
2790 if (!strncmp(name, LCDC_SAMSUNG_WSVGA_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002791 strnlen(LCDC_SAMSUNG_WSVGA_PANEL_NAME,
2792 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002793 return 0;
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002794
2795#if !defined(CONFIG_FB_MSM_LCDC_AUTO_DETECT) && \
2796 !defined(CONFIG_FB_MSM_MIPI_PANEL_AUTO_DETECT) && \
2797 !defined(CONFIG_FB_MSM_LCDC_MIPI_PANEL_AUTO_DETECT)
2798 if (!strncmp(name, MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME,
2799 strnlen(MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME,
2800 PANEL_NAME_MAX_LEN)))
2801 return 0;
2802
2803 if (!strncmp(name, MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
2804 strnlen(MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
2805 PANEL_NAME_MAX_LEN)))
2806 return 0;
2807
2808 if (!strncmp(name, MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
2809 strnlen(MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
2810 PANEL_NAME_MAX_LEN)))
2811 return 0;
2812#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002813 }
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002814
2815 if (!strncmp(name, HDMI_PANEL_NAME,
2816 strnlen(HDMI_PANEL_NAME,
2817 PANEL_NAME_MAX_LEN)))
2818 return 0;
2819
2820 if (!strncmp(name, TVOUT_PANEL_NAME,
2821 strnlen(TVOUT_PANEL_NAME,
2822 PANEL_NAME_MAX_LEN)))
2823 return 0;
2824
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002825 pr_warning("%s: not supported '%s'", __func__, name);
2826 return -ENODEV;
2827}
2828
2829static struct msm_fb_platform_data msm_fb_pdata = {
2830 .detect_client = msm_fb_detect_panel,
2831};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002832
2833static struct platform_device msm_fb_device = {
2834 .name = "msm_fb",
2835 .id = 0,
2836 .num_resources = ARRAY_SIZE(msm_fb_resources),
2837 .resource = msm_fb_resources,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002838 .dev.platform_data = &msm_fb_pdata,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002839};
2840
2841#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002842#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002843static struct android_pmem_platform_data android_pmem_pdata = {
2844 .name = "pmem",
2845 .allocator_type = PMEM_ALLOCATORTYPE_ALLORNOTHING,
2846 .cached = 1,
2847 .memory_type = MEMTYPE_EBI1,
2848};
2849
2850static struct platform_device android_pmem_device = {
2851 .name = "android_pmem",
2852 .id = 0,
2853 .dev = {.platform_data = &android_pmem_pdata},
2854};
2855
2856static struct android_pmem_platform_data android_pmem_adsp_pdata = {
2857 .name = "pmem_adsp",
2858 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2859 .cached = 0,
2860 .memory_type = MEMTYPE_EBI1,
2861};
2862
2863static struct platform_device android_pmem_adsp_device = {
2864 .name = "android_pmem",
2865 .id = 2,
2866 .dev = { .platform_data = &android_pmem_adsp_pdata },
2867};
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002868#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002869static struct android_pmem_platform_data android_pmem_audio_pdata = {
2870 .name = "pmem_audio",
2871 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2872 .cached = 0,
2873 .memory_type = MEMTYPE_EBI1,
2874};
2875
2876static struct platform_device android_pmem_audio_device = {
2877 .name = "android_pmem",
2878 .id = 4,
2879 .dev = { .platform_data = &android_pmem_audio_pdata },
2880};
2881
Laura Abbott1e36a022011-06-22 17:08:13 -07002882#define PMEM_BUS_WIDTH(_bw) \
2883 { \
2884 .vectors = &(struct msm_bus_vectors){ \
2885 .src = MSM_BUS_MASTER_AMPSS_M0, \
2886 .dst = MSM_BUS_SLAVE_SMI, \
2887 .ib = (_bw), \
2888 .ab = 0, \
2889 }, \
2890 .num_paths = 1, \
2891 }
Olav Hauganee0f7802011-12-19 13:28:57 -08002892
2893static struct msm_bus_paths mem_smi_table[] = {
Laura Abbott1e36a022011-06-22 17:08:13 -07002894 [0] = PMEM_BUS_WIDTH(0), /* Off */
2895 [1] = PMEM_BUS_WIDTH(1), /* On */
2896};
2897
2898static struct msm_bus_scale_pdata smi_client_pdata = {
Olav Hauganee0f7802011-12-19 13:28:57 -08002899 .usecase = mem_smi_table,
2900 .num_usecases = ARRAY_SIZE(mem_smi_table),
2901 .name = "mem_smi",
Laura Abbott1e36a022011-06-22 17:08:13 -07002902};
2903
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002904int request_smi_region(void *data)
Laura Abbott1e36a022011-06-22 17:08:13 -07002905{
2906 int bus_id = (int) data;
2907
2908 msm_bus_scale_client_update_request(bus_id, 1);
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002909 return 0;
Laura Abbott1e36a022011-06-22 17:08:13 -07002910}
2911
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002912int release_smi_region(void *data)
Laura Abbott1e36a022011-06-22 17:08:13 -07002913{
2914 int bus_id = (int) data;
2915
2916 msm_bus_scale_client_update_request(bus_id, 0);
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002917 return 0;
Laura Abbott1e36a022011-06-22 17:08:13 -07002918}
2919
Alex Bird199980e2011-10-21 11:29:27 -07002920void *setup_smi_region(void)
Laura Abbott1e36a022011-06-22 17:08:13 -07002921{
2922 return (void *)msm_bus_scale_register_client(&smi_client_pdata);
2923}
Olav Hauganee0f7802011-12-19 13:28:57 -08002924#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002925static struct android_pmem_platform_data android_pmem_smipool_pdata = {
2926 .name = "pmem_smipool",
2927 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2928 .cached = 0,
2929 .memory_type = MEMTYPE_SMI,
Alex Bird199980e2011-10-21 11:29:27 -07002930 .request_region = request_smi_region,
2931 .release_region = release_smi_region,
2932 .setup_region = setup_smi_region,
Laura Abbott1e36a022011-06-22 17:08:13 -07002933 .map_on_demand = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002934};
2935static struct platform_device android_pmem_smipool_device = {
2936 .name = "android_pmem",
2937 .id = 7,
2938 .dev = { .platform_data = &android_pmem_smipool_pdata },
2939};
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002940#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002941#endif
2942
2943#define GPIO_DONGLE_PWR_EN 258
2944static void setup_display_power(void);
2945static int lcdc_vga_enabled;
2946static int vga_enable_request(int enable)
2947{
2948 if (enable)
2949 lcdc_vga_enabled = 1;
2950 else
2951 lcdc_vga_enabled = 0;
2952 setup_display_power();
2953
2954 return 0;
2955}
2956
2957#define GPIO_BACKLIGHT_PWM0 0
2958#define GPIO_BACKLIGHT_PWM1 1
2959
2960static int pmic_backlight_gpio[2]
2961 = { GPIO_BACKLIGHT_PWM0, GPIO_BACKLIGHT_PWM1 };
2962static struct msm_panel_common_pdata lcdc_samsung_panel_data = {
2963 .gpio_num = pmic_backlight_gpio, /* two LPG CHANNELS for backlight */
2964 .vga_switch = vga_enable_request,
2965};
2966
2967static struct platform_device lcdc_samsung_panel_device = {
2968 .name = LCDC_SAMSUNG_WSVGA_PANEL_NAME,
2969 .id = 0,
2970 .dev = {
2971 .platform_data = &lcdc_samsung_panel_data,
2972 }
2973};
2974#if (!defined(CONFIG_SPI_QUP)) && \
2975 (defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
2976 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA))
2977
2978static int lcdc_spi_gpio_array_num[] = {
2979 LCDC_SPI_GPIO_CLK,
2980 LCDC_SPI_GPIO_CS,
2981 LCDC_SPI_GPIO_MOSI,
2982};
2983
2984static uint32_t lcdc_spi_gpio_config_data[] = {
2985 GPIO_CFG(LCDC_SPI_GPIO_CLK, 0,
2986 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2987 GPIO_CFG(LCDC_SPI_GPIO_CS, 0,
2988 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2989 GPIO_CFG(LCDC_SPI_GPIO_MOSI, 0,
2990 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2991};
2992
2993static void lcdc_config_spi_gpios(int enable)
2994{
2995 int n;
2996 for (n = 0; n < ARRAY_SIZE(lcdc_spi_gpio_config_data); ++n)
2997 gpio_tlmm_config(lcdc_spi_gpio_config_data[n], 0);
2998}
2999#endif
3000
3001#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
3002#ifdef CONFIG_SPI_QUP
3003static struct spi_board_info lcdc_samsung_spi_board_info[] __initdata = {
3004 {
3005 .modalias = LCDC_SAMSUNG_SPI_DEVICE_NAME,
3006 .mode = SPI_MODE_3,
3007 .bus_num = 1,
3008 .chip_select = 0,
3009 .max_speed_hz = 10800000,
3010 }
3011};
3012#endif /* CONFIG_SPI_QUP */
3013
3014static struct msm_panel_common_pdata lcdc_samsung_oled_panel_data = {
3015#ifndef CONFIG_SPI_QUP
3016 .panel_config_gpio = lcdc_config_spi_gpios,
3017 .gpio_num = lcdc_spi_gpio_array_num,
3018#endif
3019};
3020
3021static struct platform_device lcdc_samsung_oled_panel_device = {
3022 .name = LCDC_SAMSUNG_OLED_PANEL_NAME,
3023 .id = 0,
3024 .dev.platform_data = &lcdc_samsung_oled_panel_data,
3025};
3026#endif /*CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT */
3027
3028#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
3029#ifdef CONFIG_SPI_QUP
3030static struct spi_board_info lcdc_auo_spi_board_info[] __initdata = {
3031 {
3032 .modalias = LCDC_AUO_SPI_DEVICE_NAME,
3033 .mode = SPI_MODE_3,
3034 .bus_num = 1,
3035 .chip_select = 0,
3036 .max_speed_hz = 10800000,
3037 }
3038};
3039#endif
3040
3041static struct msm_panel_common_pdata lcdc_auo_wvga_panel_data = {
3042#ifndef CONFIG_SPI_QUP
3043 .panel_config_gpio = lcdc_config_spi_gpios,
3044 .gpio_num = lcdc_spi_gpio_array_num,
3045#endif
3046};
3047
3048static struct platform_device lcdc_auo_wvga_panel_device = {
3049 .name = LCDC_AUO_PANEL_NAME,
3050 .id = 0,
3051 .dev.platform_data = &lcdc_auo_wvga_panel_data,
3052};
3053#endif /*CONFIG_FB_MSM_LCDC_AUO_WVGA*/
3054
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04003055#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
3056
3057#define GPIO_NT35582_RESET 94
3058#define GPIO_NT35582_BL_EN_HW_PIN 24
3059#define GPIO_NT35582_BL_EN \
3060 PM8058_GPIO_PM_TO_SYS(GPIO_NT35582_BL_EN_HW_PIN - 1)
3061
3062static int lcdc_nt35582_pmic_gpio[] = {GPIO_NT35582_BL_EN };
3063
3064static struct msm_panel_common_pdata lcdc_nt35582_panel_data = {
3065 .gpio_num = lcdc_nt35582_pmic_gpio,
3066};
3067
3068static struct platform_device lcdc_nt35582_panel_device = {
3069 .name = LCDC_NT35582_PANEL_NAME,
3070 .id = 0,
3071 .dev = {
3072 .platform_data = &lcdc_nt35582_panel_data,
3073 }
3074};
3075
3076static struct spi_board_info lcdc_nt35582_spi_board_info[] __initdata = {
3077 {
3078 .modalias = "lcdc_nt35582_spi",
3079 .mode = SPI_MODE_0,
3080 .bus_num = 0,
3081 .chip_select = 0,
3082 .max_speed_hz = 1100000,
3083 }
3084};
3085#endif
3086
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003087#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
3088static struct resource hdmi_msm_resources[] = {
3089 {
3090 .name = "hdmi_msm_qfprom_addr",
3091 .start = 0x00700000,
3092 .end = 0x007060FF,
3093 .flags = IORESOURCE_MEM,
3094 },
3095 {
3096 .name = "hdmi_msm_hdmi_addr",
3097 .start = 0x04A00000,
3098 .end = 0x04A00FFF,
3099 .flags = IORESOURCE_MEM,
3100 },
3101 {
3102 .name = "hdmi_msm_irq",
3103 .start = HDMI_IRQ,
3104 .end = HDMI_IRQ,
3105 .flags = IORESOURCE_IRQ,
3106 },
3107};
3108
3109static int hdmi_enable_5v(int on);
3110static int hdmi_core_power(int on, int show);
3111static int hdmi_cec_power(int on);
3112
3113static struct msm_hdmi_platform_data hdmi_msm_data = {
3114 .irq = HDMI_IRQ,
3115 .enable_5v = hdmi_enable_5v,
3116 .core_power = hdmi_core_power,
3117 .cec_power = hdmi_cec_power,
3118};
3119
3120static struct platform_device hdmi_msm_device = {
3121 .name = "hdmi_msm",
3122 .id = 0,
3123 .num_resources = ARRAY_SIZE(hdmi_msm_resources),
3124 .resource = hdmi_msm_resources,
3125 .dev.platform_data = &hdmi_msm_data,
3126};
3127#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
3128
3129#ifdef CONFIG_FB_MSM_MIPI_DSI
3130static struct platform_device mipi_dsi_toshiba_panel_device = {
3131 .name = "mipi_toshiba",
3132 .id = 0,
3133};
3134
3135#define FPGA_3D_GPIO_CONFIG_ADDR 0x1D00017A
3136
Nagamalleswararao Ganjieac5dfa2011-07-23 17:31:16 -07003137static struct mipi_dsi_panel_platform_data novatek_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003138 .fpga_3d_config_addr = FPGA_3D_GPIO_CONFIG_ADDR,
Chandan Uddaraju83eac3c2011-09-11 18:32:23 -07003139 .fpga_ctrl_mode = FPGA_EBI2_INTF,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003140};
3141
3142static struct platform_device mipi_dsi_novatek_panel_device = {
3143 .name = "mipi_novatek",
3144 .id = 0,
3145 .dev = {
3146 .platform_data = &novatek_pdata,
3147 }
3148};
3149#endif
3150
3151static void __init msm8x60_allocate_memory_regions(void)
3152{
3153 void *addr;
3154 unsigned long size;
3155
3156 size = MSM_FB_SIZE;
3157 addr = alloc_bootmem_align(size, 0x1000);
3158 msm_fb_resources[0].start = __pa(addr);
3159 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
3160 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
3161 size, addr, __pa(addr));
3162
3163}
3164
3165#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
3166 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
3167/*virtual key support */
3168static ssize_t tma300_vkeys_show(struct kobject *kobj,
3169 struct kobj_attribute *attr, char *buf)
3170{
3171 return sprintf(buf,
3172 __stringify(EV_KEY) ":" __stringify(KEY_BACK) ":60:900:90:120"
3173 ":" __stringify(EV_KEY) ":" __stringify(KEY_MENU) ":180:900:90:120"
3174 ":" __stringify(EV_KEY) ":" __stringify(KEY_HOME) ":300:900:90:120"
3175 ":" __stringify(EV_KEY) ":" __stringify(KEY_SEARCH) ":420:900:90:120"
3176 "\n");
3177}
3178
3179static struct kobj_attribute tma300_vkeys_attr = {
3180 .attr = {
3181 .mode = S_IRUGO,
3182 },
3183 .show = &tma300_vkeys_show,
3184};
3185
3186static struct attribute *tma300_properties_attrs[] = {
3187 &tma300_vkeys_attr.attr,
3188 NULL
3189};
3190
3191static struct attribute_group tma300_properties_attr_group = {
3192 .attrs = tma300_properties_attrs,
3193};
3194
3195static struct kobject *properties_kobj;
3196
3197
3198
3199#define CYTTSP_TS_GPIO_IRQ 61
3200static int cyttsp_platform_init(struct i2c_client *client)
3201{
3202 int rc = -EINVAL;
3203 struct regulator *pm8058_l5 = NULL, *pm8058_s3;
3204
3205 if (machine_is_msm8x60_fluid()) {
3206 pm8058_l5 = regulator_get(NULL, "8058_l5");
3207 if (IS_ERR(pm8058_l5)) {
3208 pr_err("%s: regulator get of 8058_l5 failed (%ld)\n",
3209 __func__, PTR_ERR(pm8058_l5));
3210 rc = PTR_ERR(pm8058_l5);
3211 return rc;
3212 }
3213 rc = regulator_set_voltage(pm8058_l5, 2850000, 2850000);
3214 if (rc) {
3215 pr_err("%s: regulator_set_voltage of 8058_l5 failed(%d)\n",
3216 __func__, rc);
3217 goto reg_l5_put;
3218 }
3219
3220 rc = regulator_enable(pm8058_l5);
3221 if (rc) {
3222 pr_err("%s: regulator_enable of 8058_l5 failed(%d)\n",
3223 __func__, rc);
3224 goto reg_l5_put;
3225 }
3226 }
3227 /* vote for s3 to enable i2c communication lines */
3228 pm8058_s3 = regulator_get(NULL, "8058_s3");
3229 if (IS_ERR(pm8058_s3)) {
3230 pr_err("%s: regulator get of 8058_s3 failed (%ld)\n",
3231 __func__, PTR_ERR(pm8058_s3));
3232 rc = PTR_ERR(pm8058_s3);
3233 goto reg_l5_disable;
3234 }
3235
3236 rc = regulator_set_voltage(pm8058_s3, 1800000, 1800000);
3237 if (rc) {
3238 pr_err("%s: regulator_set_voltage() = %d\n",
3239 __func__, rc);
3240 goto reg_s3_put;
3241 }
3242
3243 rc = regulator_enable(pm8058_s3);
3244 if (rc) {
3245 pr_err("%s: regulator_enable of 8058_l5 failed(%d)\n",
3246 __func__, rc);
3247 goto reg_s3_put;
3248 }
3249
3250 /* wait for vregs to stabilize */
3251 usleep_range(10000, 10000);
3252
3253 /* check this device active by reading first byte/register */
3254 rc = i2c_smbus_read_byte_data(client, 0x01);
3255 if (rc < 0) {
3256 pr_err("%s: i2c sanity check failed\n", __func__);
3257 goto reg_s3_disable;
3258 }
3259
3260 /* virtual keys */
3261 if (machine_is_msm8x60_fluid()) {
3262 tma300_vkeys_attr.attr.name = "virtualkeys.cyttsp-i2c";
3263 properties_kobj = kobject_create_and_add("board_properties",
3264 NULL);
3265 if (properties_kobj)
3266 rc = sysfs_create_group(properties_kobj,
3267 &tma300_properties_attr_group);
3268 if (!properties_kobj || rc)
3269 pr_err("%s: failed to create board_properties\n",
3270 __func__);
3271 }
3272 return CY_OK;
3273
3274reg_s3_disable:
3275 regulator_disable(pm8058_s3);
3276reg_s3_put:
3277 regulator_put(pm8058_s3);
3278reg_l5_disable:
3279 if (machine_is_msm8x60_fluid())
3280 regulator_disable(pm8058_l5);
3281reg_l5_put:
3282 if (machine_is_msm8x60_fluid())
3283 regulator_put(pm8058_l5);
3284 return rc;
3285}
3286
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303287/* TODO: Put the regulator to LPM / HPM in suspend/resume*/
3288static int cyttsp_platform_suspend(struct i2c_client *client)
3289{
3290 msleep(20);
3291
3292 return CY_OK;
3293}
3294
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003295static int cyttsp_platform_resume(struct i2c_client *client)
3296{
3297 /* add any special code to strobe a wakeup pin or chip reset */
3298 msleep(10);
3299
3300 return CY_OK;
3301}
3302
3303static struct cyttsp_platform_data cyttsp_fluid_pdata = {
3304 .flags = 0x04,
3305 .gen = CY_GEN3, /* or */
3306 .use_st = CY_USE_ST,
3307 .use_mt = CY_USE_MT,
3308 .use_hndshk = CY_SEND_HNDSHK,
3309 .use_trk_id = CY_USE_TRACKING_ID,
Anirudh Ghayal15187772011-06-22 17:39:41 +05303310 .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003311 .use_gestures = CY_USE_GESTURES,
3312 /* activate up to 4 groups
3313 * and set active distance
3314 */
3315 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
3316 CY_GEST_GRP3 | CY_GEST_GRP4 |
3317 CY_ACT_DIST,
3318 /* change act_intrvl to customize the Active power state
3319 * scanning/processing refresh interval for Operating mode
3320 */
3321 .act_intrvl = CY_ACT_INTRVL_DFLT,
3322 /* change tch_tmout to customize the touch timeout for the
3323 * Active power state for Operating mode
3324 */
3325 .tch_tmout = CY_TCH_TMOUT_DFLT,
3326 /* change lp_intrvl to customize the Low Power power state
3327 * scanning/processing refresh interval for Operating mode
3328 */
3329 .lp_intrvl = CY_LP_INTRVL_DFLT,
3330 .sleep_gpio = -1,
3331 .resout_gpio = -1,
3332 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
3333 .resume = cyttsp_platform_resume,
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303334 .suspend = cyttsp_platform_suspend,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003335 .init = cyttsp_platform_init,
3336};
3337
3338static struct cyttsp_platform_data cyttsp_tmg240_pdata = {
3339 .panel_maxx = 1083,
3340 .panel_maxy = 659,
3341 .disp_minx = 30,
3342 .disp_maxx = 1053,
3343 .disp_miny = 30,
3344 .disp_maxy = 629,
3345 .correct_fw_ver = 8,
3346 .fw_fname = "cyttsp_8660_ffa.hex",
3347 .flags = 0x00,
3348 .gen = CY_GEN2, /* or */
3349 .use_st = CY_USE_ST,
3350 .use_mt = CY_USE_MT,
3351 .use_hndshk = CY_SEND_HNDSHK,
3352 .use_trk_id = CY_USE_TRACKING_ID,
Anirudh Ghayal15187772011-06-22 17:39:41 +05303353 .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003354 .use_gestures = CY_USE_GESTURES,
3355 /* activate up to 4 groups
3356 * and set active distance
3357 */
3358 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
3359 CY_GEST_GRP3 | CY_GEST_GRP4 |
3360 CY_ACT_DIST,
3361 /* change act_intrvl to customize the Active power state
3362 * scanning/processing refresh interval for Operating mode
3363 */
3364 .act_intrvl = CY_ACT_INTRVL_DFLT,
3365 /* change tch_tmout to customize the touch timeout for the
3366 * Active power state for Operating mode
3367 */
3368 .tch_tmout = CY_TCH_TMOUT_DFLT,
3369 /* change lp_intrvl to customize the Low Power power state
3370 * scanning/processing refresh interval for Operating mode
3371 */
3372 .lp_intrvl = CY_LP_INTRVL_DFLT,
3373 .sleep_gpio = -1,
3374 .resout_gpio = -1,
3375 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
3376 .resume = cyttsp_platform_resume,
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303377 .suspend = cyttsp_platform_suspend,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003378 .init = cyttsp_platform_init,
Mohan Pallaka1ea7d8a2011-08-18 15:06:00 +05303379 .disable_ghost_det = true,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003380};
3381static void cyttsp_set_params(void)
3382{
3383 if (SOCINFO_VERSION_MAJOR(socinfo_get_platform_version()) < 3) {
3384 cyttsp_fluid_pdata.fw_fname = "cyttsp_8660_fluid_p2.hex";
3385 cyttsp_fluid_pdata.panel_maxx = 539;
3386 cyttsp_fluid_pdata.panel_maxy = 994;
3387 cyttsp_fluid_pdata.disp_minx = 30;
3388 cyttsp_fluid_pdata.disp_maxx = 509;
3389 cyttsp_fluid_pdata.disp_miny = 60;
3390 cyttsp_fluid_pdata.disp_maxy = 859;
3391 cyttsp_fluid_pdata.correct_fw_ver = 4;
3392 } else {
3393 cyttsp_fluid_pdata.fw_fname = "cyttsp_8660_fluid_p3.hex";
3394 cyttsp_fluid_pdata.panel_maxx = 550;
3395 cyttsp_fluid_pdata.panel_maxy = 1013;
3396 cyttsp_fluid_pdata.disp_minx = 35;
3397 cyttsp_fluid_pdata.disp_maxx = 515;
3398 cyttsp_fluid_pdata.disp_miny = 69;
3399 cyttsp_fluid_pdata.disp_maxy = 869;
3400 cyttsp_fluid_pdata.correct_fw_ver = 5;
3401 }
3402
3403}
3404
3405static struct i2c_board_info cyttsp_fluid_info[] __initdata = {
3406 {
3407 I2C_BOARD_INFO(CY_I2C_NAME, 0x24),
3408 .platform_data = &cyttsp_fluid_pdata,
3409#ifndef CY_USE_TIMER
3410 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
3411#endif /* CY_USE_TIMER */
3412 },
3413};
3414
3415static struct i2c_board_info cyttsp_ffa_info[] __initdata = {
3416 {
3417 I2C_BOARD_INFO(CY_I2C_NAME, 0x3b),
3418 .platform_data = &cyttsp_tmg240_pdata,
3419#ifndef CY_USE_TIMER
3420 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
3421#endif /* CY_USE_TIMER */
3422 },
3423};
3424#endif
3425
3426static struct regulator *vreg_tmg200;
3427
3428#define TS_PEN_IRQ_GPIO 61
3429static int tmg200_power(int vreg_on)
3430{
3431 int rc = -EINVAL;
3432
3433 if (!vreg_tmg200) {
3434 printk(KERN_ERR "%s: regulator 8058_s3 not found (%d)\n",
3435 __func__, rc);
3436 return rc;
3437 }
3438
3439 rc = vreg_on ? regulator_enable(vreg_tmg200) :
3440 regulator_disable(vreg_tmg200);
3441 if (rc < 0)
3442 printk(KERN_ERR "%s: vreg 8058_s3 %s failed (%d)\n",
3443 __func__, vreg_on ? "enable" : "disable", rc);
3444
3445 /* wait for vregs to stabilize */
Amy Maloche12b5d4e2011-08-03 15:42:28 -07003446 msleep(20);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003447
3448 return rc;
3449}
3450
3451static int tmg200_dev_setup(bool enable)
3452{
3453 int rc;
3454
3455 if (enable) {
3456 vreg_tmg200 = regulator_get(NULL, "8058_s3");
3457 if (IS_ERR(vreg_tmg200)) {
3458 pr_err("%s: regulator get of 8058_s3 failed (%ld)\n",
3459 __func__, PTR_ERR(vreg_tmg200));
3460 rc = PTR_ERR(vreg_tmg200);
3461 return rc;
3462 }
3463
3464 rc = regulator_set_voltage(vreg_tmg200, 1800000, 1800000);
3465 if (rc) {
3466 pr_err("%s: regulator_set_voltage() = %d\n",
3467 __func__, rc);
3468 goto reg_put;
3469 }
3470 } else {
3471 /* put voltage sources */
3472 regulator_put(vreg_tmg200);
3473 }
3474 return 0;
3475reg_put:
3476 regulator_put(vreg_tmg200);
3477 return rc;
3478}
3479
3480static struct cy8c_ts_platform_data cy8ctmg200_pdata = {
3481 .ts_name = "msm_tmg200_ts",
3482 .dis_min_x = 0,
3483 .dis_max_x = 1023,
3484 .dis_min_y = 0,
3485 .dis_max_y = 599,
3486 .min_tid = 0,
3487 .max_tid = 255,
3488 .min_touch = 0,
3489 .max_touch = 255,
3490 .min_width = 0,
3491 .max_width = 255,
3492 .power_on = tmg200_power,
3493 .dev_setup = tmg200_dev_setup,
3494 .nfingers = 2,
3495 .irq_gpio = TS_PEN_IRQ_GPIO,
3496 .resout_gpio = GPIO_CAP_TS_RESOUT_N,
3497};
3498
3499static struct i2c_board_info cy8ctmg200_board_info[] = {
3500 {
3501 I2C_BOARD_INFO("cy8ctmg200", 0x2),
3502 .platform_data = &cy8ctmg200_pdata,
3503 }
3504};
3505
Zhang Chang Ken211df572011-07-05 19:16:39 -04003506static struct regulator *vreg_tma340;
3507
3508static int tma340_power(int vreg_on)
3509{
3510 int rc = -EINVAL;
3511
3512 if (!vreg_tma340) {
3513 pr_err("%s: regulator 8901_l2 not found (%d)\n",
3514 __func__, rc);
3515 return rc;
3516 }
3517
3518 rc = vreg_on ? regulator_enable(vreg_tma340) :
3519 regulator_disable(vreg_tma340);
3520 if (rc < 0)
3521 pr_err("%s: vreg 8901_l2 %s failed (%d)\n",
3522 __func__, vreg_on ? "enable" : "disable", rc);
3523
3524 /* wait for vregs to stabilize */
Amy Malocheb5c67e8d2011-08-18 16:39:35 -07003525 msleep(100);
Zhang Chang Ken211df572011-07-05 19:16:39 -04003526
3527 return rc;
3528}
3529
3530static struct kobject *tma340_prop_kobj;
3531
3532static int tma340_dragon_dev_setup(bool enable)
3533{
3534 int rc;
3535
3536 if (enable) {
3537 vreg_tma340 = regulator_get(NULL, "8901_l2");
3538 if (IS_ERR(vreg_tma340)) {
3539 pr_err("%s: regulator get of 8901_l2 failed (%ld)\n",
3540 __func__, PTR_ERR(vreg_tma340));
3541 rc = PTR_ERR(vreg_tma340);
3542 return rc;
3543 }
3544
3545 rc = regulator_set_voltage(vreg_tma340, 3300000, 3300000);
3546 if (rc) {
3547 pr_err("%s: regulator_set_voltage() = %d\n",
3548 __func__, rc);
3549 goto reg_put;
3550 }
3551 tma300_vkeys_attr.attr.name = "virtualkeys.cy8ctma340";
3552 tma340_prop_kobj = kobject_create_and_add("board_properties",
3553 NULL);
3554 if (tma340_prop_kobj) {
3555 rc = sysfs_create_group(tma340_prop_kobj,
3556 &tma300_properties_attr_group);
3557 if (rc) {
3558 kobject_put(tma340_prop_kobj);
3559 pr_err("%s: failed to create board_properties\n",
3560 __func__);
3561 goto reg_put;
3562 }
3563 }
3564
3565 } else {
3566 /* put voltage sources */
3567 regulator_put(vreg_tma340);
3568 /* destroy virtual keys */
3569 if (tma340_prop_kobj) {
3570 sysfs_remove_group(tma340_prop_kobj,
3571 &tma300_properties_attr_group);
3572 kobject_put(tma340_prop_kobj);
3573 }
3574 }
3575 return 0;
3576reg_put:
3577 regulator_put(vreg_tma340);
3578 return rc;
3579}
3580
3581
3582static struct cy8c_ts_platform_data cy8ctma340_dragon_pdata = {
3583 .ts_name = "cy8ctma340",
3584 .dis_min_x = 0,
3585 .dis_max_x = 479,
3586 .dis_min_y = 0,
3587 .dis_max_y = 799,
3588 .min_tid = 0,
3589 .max_tid = 255,
3590 .min_touch = 0,
3591 .max_touch = 255,
3592 .min_width = 0,
3593 .max_width = 255,
3594 .power_on = tma340_power,
3595 .dev_setup = tma340_dragon_dev_setup,
3596 .nfingers = 2,
3597 .irq_gpio = TS_PEN_IRQ_GPIO,
3598 .resout_gpio = -1,
3599};
3600
3601static struct i2c_board_info cy8ctma340_dragon_board_info[] = {
3602 {
3603 I2C_BOARD_INFO("cy8ctma340", 0x24),
3604 .platform_data = &cy8ctma340_dragon_pdata,
3605 }
3606};
3607
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003608#ifdef CONFIG_SERIAL_MSM_HS
3609static int configure_uart_gpios(int on)
3610{
3611 int ret = 0, i;
3612 int uart_gpios[] = {53, 54, 55, 56};
3613 for (i = 0; i < ARRAY_SIZE(uart_gpios); i++) {
3614 if (on) {
3615 ret = msm_gpiomux_get(uart_gpios[i]);
3616 if (unlikely(ret))
3617 break;
3618 } else {
3619 ret = msm_gpiomux_put(uart_gpios[i]);
3620 if (unlikely(ret))
3621 return ret;
3622 }
3623 }
3624 if (ret)
3625 for (; i >= 0; i--)
3626 msm_gpiomux_put(uart_gpios[i]);
3627 return ret;
3628}
3629static struct msm_serial_hs_platform_data msm_uart_dm1_pdata = {
3630 .inject_rx_on_wakeup = 1,
3631 .rx_to_inject = 0xFD,
3632 .gpio_config = configure_uart_gpios,
3633};
3634#endif
3635
3636
3637#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
3638
3639static struct gpio_led gpio_exp_leds_config[] = {
3640 {
3641 .name = "left_led1:green",
3642 .gpio = GPIO_LEFT_LED_1,
3643 .active_low = 1,
3644 .retain_state_suspended = 0,
3645 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3646 },
3647 {
3648 .name = "left_led2:red",
3649 .gpio = GPIO_LEFT_LED_2,
3650 .active_low = 1,
3651 .retain_state_suspended = 0,
3652 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3653 },
3654 {
3655 .name = "left_led3:green",
3656 .gpio = GPIO_LEFT_LED_3,
3657 .active_low = 1,
3658 .retain_state_suspended = 0,
3659 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3660 },
3661 {
3662 .name = "wlan_led:orange",
3663 .gpio = GPIO_LEFT_LED_WLAN,
3664 .active_low = 1,
3665 .retain_state_suspended = 0,
3666 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3667 },
3668 {
3669 .name = "left_led5:green",
3670 .gpio = GPIO_LEFT_LED_5,
3671 .active_low = 1,
3672 .retain_state_suspended = 0,
3673 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3674 },
3675 {
3676 .name = "right_led1:green",
3677 .gpio = GPIO_RIGHT_LED_1,
3678 .active_low = 1,
3679 .retain_state_suspended = 0,
3680 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3681 },
3682 {
3683 .name = "right_led2:red",
3684 .gpio = GPIO_RIGHT_LED_2,
3685 .active_low = 1,
3686 .retain_state_suspended = 0,
3687 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3688 },
3689 {
3690 .name = "right_led3:green",
3691 .gpio = GPIO_RIGHT_LED_3,
3692 .active_low = 1,
3693 .retain_state_suspended = 0,
3694 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3695 },
3696 {
3697 .name = "bt_led:blue",
3698 .gpio = GPIO_RIGHT_LED_BT,
3699 .active_low = 1,
3700 .retain_state_suspended = 0,
3701 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3702 },
3703 {
3704 .name = "right_led5:green",
3705 .gpio = GPIO_RIGHT_LED_5,
3706 .active_low = 1,
3707 .retain_state_suspended = 0,
3708 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3709 },
3710};
3711
3712static struct gpio_led_platform_data gpio_leds_pdata = {
3713 .num_leds = ARRAY_SIZE(gpio_exp_leds_config),
3714 .leds = gpio_exp_leds_config,
3715};
3716
3717static struct platform_device gpio_leds = {
3718 .name = "leds-gpio",
3719 .id = -1,
3720 .dev = {
3721 .platform_data = &gpio_leds_pdata,
3722 },
3723};
3724
3725static struct gpio_led fluid_gpio_leds[] = {
3726 {
3727 .name = "dual_led:green",
3728 .gpio = GPIO_LED1_GREEN_N,
3729 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3730 .active_low = 1,
3731 .retain_state_suspended = 0,
3732 },
3733 {
3734 .name = "dual_led:red",
3735 .gpio = GPIO_LED2_RED_N,
3736 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3737 .active_low = 1,
3738 .retain_state_suspended = 0,
3739 },
3740};
3741
3742static struct gpio_led_platform_data gpio_led_pdata = {
3743 .leds = fluid_gpio_leds,
3744 .num_leds = ARRAY_SIZE(fluid_gpio_leds),
3745};
3746
3747static struct platform_device fluid_leds_gpio = {
3748 .name = "leds-gpio",
3749 .id = -1,
3750 .dev = {
3751 .platform_data = &gpio_led_pdata,
3752 },
3753};
3754
3755#endif
3756
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003757#ifdef CONFIG_BATTERY_MSM8X60
3758static struct msm_charger_platform_data msm_charger_data = {
3759 .safety_time = 180,
3760 .update_time = 1,
3761 .max_voltage = 4200,
3762 .min_voltage = 3200,
3763};
3764
3765static struct platform_device msm_charger_device = {
3766 .name = "msm-charger",
3767 .id = -1,
3768 .dev = {
3769 .platform_data = &msm_charger_data,
3770 }
3771};
3772#endif
3773
3774/*
3775 * Consumer specific regulator names:
3776 * regulator name consumer dev_name
3777 */
3778static struct regulator_consumer_supply vreg_consumers_PM8058_L0[] = {
3779 REGULATOR_SUPPLY("8058_l0", NULL),
3780};
3781static struct regulator_consumer_supply vreg_consumers_PM8058_L1[] = {
3782 REGULATOR_SUPPLY("8058_l1", NULL),
3783};
3784static struct regulator_consumer_supply vreg_consumers_PM8058_L2[] = {
3785 REGULATOR_SUPPLY("8058_l2", NULL),
3786};
3787static struct regulator_consumer_supply vreg_consumers_PM8058_L3[] = {
3788 REGULATOR_SUPPLY("8058_l3", NULL),
3789};
3790static struct regulator_consumer_supply vreg_consumers_PM8058_L4[] = {
3791 REGULATOR_SUPPLY("8058_l4", NULL),
3792};
3793static struct regulator_consumer_supply vreg_consumers_PM8058_L5[] = {
3794 REGULATOR_SUPPLY("8058_l5", NULL),
3795};
3796static struct regulator_consumer_supply vreg_consumers_PM8058_L6[] = {
3797 REGULATOR_SUPPLY("8058_l6", NULL),
3798};
3799static struct regulator_consumer_supply vreg_consumers_PM8058_L7[] = {
3800 REGULATOR_SUPPLY("8058_l7", NULL),
3801};
3802static struct regulator_consumer_supply vreg_consumers_PM8058_L8[] = {
3803 REGULATOR_SUPPLY("8058_l8", NULL),
3804};
3805static struct regulator_consumer_supply vreg_consumers_PM8058_L9[] = {
3806 REGULATOR_SUPPLY("8058_l9", NULL),
3807};
3808static struct regulator_consumer_supply vreg_consumers_PM8058_L10[] = {
3809 REGULATOR_SUPPLY("8058_l10", NULL),
3810};
3811static struct regulator_consumer_supply vreg_consumers_PM8058_L11[] = {
3812 REGULATOR_SUPPLY("8058_l11", NULL),
3813};
3814static struct regulator_consumer_supply vreg_consumers_PM8058_L12[] = {
3815 REGULATOR_SUPPLY("8058_l12", NULL),
3816};
3817static struct regulator_consumer_supply vreg_consumers_PM8058_L13[] = {
3818 REGULATOR_SUPPLY("8058_l13", NULL),
3819};
3820static struct regulator_consumer_supply vreg_consumers_PM8058_L14[] = {
3821 REGULATOR_SUPPLY("8058_l14", NULL),
3822};
3823static struct regulator_consumer_supply vreg_consumers_PM8058_L15[] = {
3824 REGULATOR_SUPPLY("8058_l15", NULL),
3825};
3826static struct regulator_consumer_supply vreg_consumers_PM8058_L16[] = {
3827 REGULATOR_SUPPLY("8058_l16", NULL),
3828};
3829static struct regulator_consumer_supply vreg_consumers_PM8058_L17[] = {
3830 REGULATOR_SUPPLY("8058_l17", NULL),
3831};
3832static struct regulator_consumer_supply vreg_consumers_PM8058_L18[] = {
3833 REGULATOR_SUPPLY("8058_l18", NULL),
3834};
3835static struct regulator_consumer_supply vreg_consumers_PM8058_L19[] = {
3836 REGULATOR_SUPPLY("8058_l19", NULL),
3837};
3838static struct regulator_consumer_supply vreg_consumers_PM8058_L20[] = {
3839 REGULATOR_SUPPLY("8058_l20", NULL),
3840};
3841static struct regulator_consumer_supply vreg_consumers_PM8058_L21[] = {
3842 REGULATOR_SUPPLY("8058_l21", NULL),
3843};
3844static struct regulator_consumer_supply vreg_consumers_PM8058_L22[] = {
3845 REGULATOR_SUPPLY("8058_l22", NULL),
3846};
3847static struct regulator_consumer_supply vreg_consumers_PM8058_L23[] = {
3848 REGULATOR_SUPPLY("8058_l23", NULL),
3849};
3850static struct regulator_consumer_supply vreg_consumers_PM8058_L24[] = {
3851 REGULATOR_SUPPLY("8058_l24", NULL),
3852};
3853static struct regulator_consumer_supply vreg_consumers_PM8058_L25[] = {
3854 REGULATOR_SUPPLY("8058_l25", NULL),
3855};
3856static struct regulator_consumer_supply vreg_consumers_PM8058_S0[] = {
3857 REGULATOR_SUPPLY("8058_s0", NULL),
3858};
3859static struct regulator_consumer_supply vreg_consumers_PM8058_S1[] = {
3860 REGULATOR_SUPPLY("8058_s1", NULL),
3861};
3862static struct regulator_consumer_supply vreg_consumers_PM8058_S2[] = {
3863 REGULATOR_SUPPLY("8058_s2", NULL),
3864};
3865static struct regulator_consumer_supply vreg_consumers_PM8058_S3[] = {
3866 REGULATOR_SUPPLY("8058_s3", NULL),
3867};
3868static struct regulator_consumer_supply vreg_consumers_PM8058_S4[] = {
3869 REGULATOR_SUPPLY("8058_s4", NULL),
3870};
3871static struct regulator_consumer_supply vreg_consumers_PM8058_LVS0[] = {
3872 REGULATOR_SUPPLY("8058_lvs0", NULL),
3873};
3874static struct regulator_consumer_supply vreg_consumers_PM8058_LVS1[] = {
3875 REGULATOR_SUPPLY("8058_lvs1", NULL),
3876};
3877static struct regulator_consumer_supply vreg_consumers_PM8058_NCP[] = {
3878 REGULATOR_SUPPLY("8058_ncp", NULL),
3879};
3880
3881static struct regulator_consumer_supply vreg_consumers_PM8901_L0[] = {
3882 REGULATOR_SUPPLY("8901_l0", NULL),
3883};
3884static struct regulator_consumer_supply vreg_consumers_PM8901_L1[] = {
3885 REGULATOR_SUPPLY("8901_l1", NULL),
3886};
3887static struct regulator_consumer_supply vreg_consumers_PM8901_L2[] = {
3888 REGULATOR_SUPPLY("8901_l2", NULL),
3889};
3890static struct regulator_consumer_supply vreg_consumers_PM8901_L3[] = {
3891 REGULATOR_SUPPLY("8901_l3", NULL),
3892};
3893static struct regulator_consumer_supply vreg_consumers_PM8901_L4[] = {
3894 REGULATOR_SUPPLY("8901_l4", NULL),
3895};
3896static struct regulator_consumer_supply vreg_consumers_PM8901_L5[] = {
3897 REGULATOR_SUPPLY("8901_l5", NULL),
3898};
3899static struct regulator_consumer_supply vreg_consumers_PM8901_L6[] = {
3900 REGULATOR_SUPPLY("8901_l6", NULL),
3901};
3902static struct regulator_consumer_supply vreg_consumers_PM8901_S2[] = {
3903 REGULATOR_SUPPLY("8901_s2", NULL),
3904};
3905static struct regulator_consumer_supply vreg_consumers_PM8901_S3[] = {
3906 REGULATOR_SUPPLY("8901_s3", NULL),
3907};
3908static struct regulator_consumer_supply vreg_consumers_PM8901_S4[] = {
3909 REGULATOR_SUPPLY("8901_s4", NULL),
3910};
3911static struct regulator_consumer_supply vreg_consumers_PM8901_LVS0[] = {
3912 REGULATOR_SUPPLY("8901_lvs0", NULL),
3913};
3914static struct regulator_consumer_supply vreg_consumers_PM8901_LVS1[] = {
3915 REGULATOR_SUPPLY("8901_lvs1", NULL),
3916};
3917static struct regulator_consumer_supply vreg_consumers_PM8901_LVS2[] = {
3918 REGULATOR_SUPPLY("8901_lvs2", NULL),
3919};
3920static struct regulator_consumer_supply vreg_consumers_PM8901_LVS3[] = {
3921 REGULATOR_SUPPLY("8901_lvs3", NULL),
3922};
3923static struct regulator_consumer_supply vreg_consumers_PM8901_MVS0[] = {
3924 REGULATOR_SUPPLY("8901_mvs0", NULL),
3925};
3926
David Collins6f032ba2011-08-31 14:08:15 -07003927/* Pin control regulators */
3928static struct regulator_consumer_supply vreg_consumers_PM8058_L8_PC[] = {
3929 REGULATOR_SUPPLY("8058_l8_pc", NULL),
3930};
3931static struct regulator_consumer_supply vreg_consumers_PM8058_L20_PC[] = {
3932 REGULATOR_SUPPLY("8058_l20_pc", NULL),
3933};
3934static struct regulator_consumer_supply vreg_consumers_PM8058_L21_PC[] = {
3935 REGULATOR_SUPPLY("8058_l21_pc", NULL),
3936};
3937static struct regulator_consumer_supply vreg_consumers_PM8058_S2_PC[] = {
3938 REGULATOR_SUPPLY("8058_s2_pc", NULL),
3939};
3940static struct regulator_consumer_supply vreg_consumers_PM8901_L0_PC[] = {
3941 REGULATOR_SUPPLY("8901_l0_pc", NULL),
3942};
3943static struct regulator_consumer_supply vreg_consumers_PM8901_S4_PC[] = {
3944 REGULATOR_SUPPLY("8901_s4_pc", NULL),
3945};
3946
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003947#define RPM_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
3948 _default_uV, _peak_uA, _avg_uA, _pull_down, _pin_ctrl, \
David Collins6f032ba2011-08-31 14:08:15 -07003949 _freq, _pin_fn, _force_mode, _state, _sleep_selectable, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003950 _always_on) \
David Collins6f032ba2011-08-31 14:08:15 -07003951 { \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003952 .init_data = { \
3953 .constraints = { \
David Collins6f032ba2011-08-31 14:08:15 -07003954 .valid_modes_mask = _modes, \
3955 .valid_ops_mask = _ops, \
3956 .min_uV = _min_uV, \
3957 .max_uV = _max_uV, \
3958 .input_uV = _min_uV, \
3959 .apply_uV = _apply_uV, \
3960 .always_on = _always_on, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003961 }, \
David Collins6f032ba2011-08-31 14:08:15 -07003962 .consumer_supplies = vreg_consumers_##_id, \
3963 .num_consumer_supplies = \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003964 ARRAY_SIZE(vreg_consumers_##_id), \
3965 }, \
David Collins6f032ba2011-08-31 14:08:15 -07003966 .id = RPM_VREG_ID_##_id, \
3967 .default_uV = _default_uV, \
3968 .peak_uA = _peak_uA, \
3969 .avg_uA = _avg_uA, \
3970 .pull_down_enable = _pull_down, \
3971 .pin_ctrl = _pin_ctrl, \
3972 .freq = RPM_VREG_FREQ_##_freq, \
3973 .pin_fn = _pin_fn, \
3974 .force_mode = _force_mode, \
3975 .state = _state, \
3976 .sleep_selectable = _sleep_selectable, \
3977 }
3978
3979/* Pin control initialization */
3980#define RPM_PC(_id, _always_on, _pin_fn, _pin_ctrl) \
3981 { \
3982 .init_data = { \
3983 .constraints = { \
3984 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
3985 .always_on = _always_on, \
3986 }, \
3987 .num_consumer_supplies = \
3988 ARRAY_SIZE(vreg_consumers_##_id##_PC), \
3989 .consumer_supplies = vreg_consumers_##_id##_PC, \
3990 }, \
3991 .id = RPM_VREG_ID_##_id##_PC, \
3992 .pin_fn = RPM_VREG_PIN_FN_8660_##_pin_fn, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003993 .pin_ctrl = _pin_ctrl, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003994 }
3995
3996/*
3997 * The default LPM/HPM state of an RPM controlled regulator can be controlled
3998 * via the peak_uA value specified in the table below. If the value is less
3999 * than the high power min threshold for the regulator, then the regulator will
4000 * be set to LPM. Otherwise, it will be set to HPM.
4001 *
4002 * This value can be further overridden by specifying an initial mode via
4003 * .init_data.constraints.initial_mode.
4004 */
4005
David Collins6f032ba2011-08-31 14:08:15 -07004006#define RPM_LDO(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
4007 _init_peak_uA) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004008 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_FAST | \
4009 REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE | \
4010 REGULATOR_MODE_STANDBY, REGULATOR_CHANGE_VOLTAGE | \
4011 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
4012 REGULATOR_CHANGE_DRMS, 0, _min_uV, _init_peak_uA, \
David Collins6f032ba2011-08-31 14:08:15 -07004013 _init_peak_uA, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4014 RPM_VREG_PIN_FN_8660_ENABLE, \
4015 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004016 _sleep_selectable, _always_on)
4017
David Collins6f032ba2011-08-31 14:08:15 -07004018#define RPM_SMPS(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
4019 _init_peak_uA, _freq) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004020 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_FAST | \
4021 REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE | \
4022 REGULATOR_MODE_STANDBY, REGULATOR_CHANGE_VOLTAGE | \
4023 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
4024 REGULATOR_CHANGE_DRMS, 0, _min_uV, _init_peak_uA, \
David Collins6f032ba2011-08-31 14:08:15 -07004025 _init_peak_uA, _pd, RPM_VREG_PIN_CTRL_NONE, _freq, \
4026 RPM_VREG_PIN_FN_8660_ENABLE, \
4027 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4028 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004029
David Collins6f032ba2011-08-31 14:08:15 -07004030#define RPM_VS(_id, _always_on, _pd, _sleep_selectable) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004031 RPM_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE, \
4032 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE, 0, 0, \
David Collins6f032ba2011-08-31 14:08:15 -07004033 1000, 1000, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4034 RPM_VREG_PIN_FN_8660_ENABLE, \
4035 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4036 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004037
David Collins6f032ba2011-08-31 14:08:15 -07004038#define RPM_NCP(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004039 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_NORMAL, \
4040 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, 0, \
David Collins6f032ba2011-08-31 14:08:15 -07004041 _min_uV, 1000, 1000, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4042 RPM_VREG_PIN_FN_8660_ENABLE, \
4043 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4044 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004045
David Collins6f032ba2011-08-31 14:08:15 -07004046#define LDO50HMIN RPM_VREG_8660_LDO_50_HPM_MIN_LOAD
4047#define LDO150HMIN RPM_VREG_8660_LDO_150_HPM_MIN_LOAD
4048#define LDO300HMIN RPM_VREG_8660_LDO_300_HPM_MIN_LOAD
4049#define SMPS_HMIN RPM_VREG_8660_SMPS_HPM_MIN_LOAD
4050#define FTS_HMIN RPM_VREG_8660_FTSMPS_HPM_MIN_LOAD
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004051
David Collins6f032ba2011-08-31 14:08:15 -07004052/* RPM early regulator constraints */
4053static struct rpm_regulator_init_data rpm_regulator_early_init_data[] = {
4054 /* ID a_on pd ss min_uV max_uV init_ip freq */
4055 RPM_SMPS(PM8058_S0, 0, 1, 1, 500000, 1250000, SMPS_HMIN, 1p60),
4056 RPM_SMPS(PM8058_S1, 0, 1, 1, 500000, 1250000, SMPS_HMIN, 1p60),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004057};
4058
David Collins6f032ba2011-08-31 14:08:15 -07004059/* RPM regulator constraints */
4060static struct rpm_regulator_init_data rpm_regulator_init_data[] = {
4061 /* ID a_on pd ss min_uV max_uV init_ip */
4062 RPM_LDO(PM8058_L0, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
4063 RPM_LDO(PM8058_L1, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4064 RPM_LDO(PM8058_L2, 0, 1, 0, 1800000, 2600000, LDO300HMIN),
4065 RPM_LDO(PM8058_L3, 0, 1, 0, 1800000, 1800000, LDO150HMIN),
4066 RPM_LDO(PM8058_L4, 0, 1, 0, 2850000, 2850000, LDO50HMIN),
4067 RPM_LDO(PM8058_L5, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4068 RPM_LDO(PM8058_L6, 0, 1, 0, 3000000, 3600000, LDO50HMIN),
4069 RPM_LDO(PM8058_L7, 0, 1, 0, 1800000, 1800000, LDO50HMIN),
4070 RPM_LDO(PM8058_L8, 0, 1, 0, 2900000, 3050000, LDO300HMIN),
4071 RPM_LDO(PM8058_L9, 0, 1, 0, 1800000, 1800000, LDO300HMIN),
4072 RPM_LDO(PM8058_L10, 0, 1, 0, 2600000, 2600000, LDO300HMIN),
4073 RPM_LDO(PM8058_L11, 0, 1, 0, 1500000, 1500000, LDO150HMIN),
4074 RPM_LDO(PM8058_L12, 0, 1, 0, 2900000, 2900000, LDO150HMIN),
4075 RPM_LDO(PM8058_L13, 0, 1, 0, 2050000, 2050000, LDO300HMIN),
4076 RPM_LDO(PM8058_L14, 0, 0, 0, 2850000, 2850000, LDO300HMIN),
4077 RPM_LDO(PM8058_L15, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4078 RPM_LDO(PM8058_L16, 1, 1, 0, 1800000, 1800000, LDO300HMIN),
4079 RPM_LDO(PM8058_L17, 0, 1, 0, 2600000, 2600000, LDO150HMIN),
4080 RPM_LDO(PM8058_L18, 0, 1, 0, 2200000, 2200000, LDO150HMIN),
4081 RPM_LDO(PM8058_L19, 0, 1, 0, 2500000, 2500000, LDO150HMIN),
4082 RPM_LDO(PM8058_L20, 0, 1, 0, 1800000, 1800000, LDO150HMIN),
4083 RPM_LDO(PM8058_L21, 1, 1, 0, 1200000, 1200000, LDO150HMIN),
4084 RPM_LDO(PM8058_L22, 0, 1, 0, 1150000, 1150000, LDO300HMIN),
4085 RPM_LDO(PM8058_L23, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4086 RPM_LDO(PM8058_L24, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
4087 RPM_LDO(PM8058_L25, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004088
David Collins6f032ba2011-08-31 14:08:15 -07004089 /* ID a_on pd ss min_uV max_uV init_ip freq */
4090 RPM_SMPS(PM8058_S2, 0, 1, 1, 1200000, 1400000, SMPS_HMIN, 1p60),
4091 RPM_SMPS(PM8058_S3, 1, 1, 0, 1800000, 1800000, SMPS_HMIN, 1p60),
4092 RPM_SMPS(PM8058_S4, 1, 1, 0, 2200000, 2200000, SMPS_HMIN, 1p60),
4093
4094 /* ID a_on pd ss */
4095 RPM_VS(PM8058_LVS0, 0, 1, 0),
4096 RPM_VS(PM8058_LVS1, 0, 1, 0),
4097
4098 /* ID a_on pd ss min_uV max_uV */
4099 RPM_NCP(PM8058_NCP, 0, 1, 0, 1800000, 1800000),
4100
4101 /* ID a_on pd ss min_uV max_uV init_ip */
4102 RPM_LDO(PM8901_L0, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4103 RPM_LDO(PM8901_L1, 0, 1, 0, 3300000, 3300000, LDO300HMIN),
4104 RPM_LDO(PM8901_L2, 0, 1, 0, 2850000, 3300000, LDO300HMIN),
4105 RPM_LDO(PM8901_L3, 0, 1, 0, 3300000, 3300000, LDO300HMIN),
4106 RPM_LDO(PM8901_L4, 0, 1, 0, 2600000, 2600000, LDO300HMIN),
4107 RPM_LDO(PM8901_L5, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4108 RPM_LDO(PM8901_L6, 0, 1, 0, 2200000, 2200000, LDO300HMIN),
4109
4110 /* ID a_on pd ss min_uV max_uV init_ip freq */
4111 RPM_SMPS(PM8901_S2, 0, 1, 0, 1300000, 1300000, FTS_HMIN, 1p60),
4112 RPM_SMPS(PM8901_S3, 0, 1, 0, 1100000, 1100000, FTS_HMIN, 1p60),
4113 RPM_SMPS(PM8901_S4, 0, 1, 0, 1225000, 1225000, FTS_HMIN, 1p60),
4114
4115 /* ID a_on pd ss */
4116 RPM_VS(PM8901_LVS0, 1, 1, 0),
4117 RPM_VS(PM8901_LVS1, 0, 1, 0),
4118 RPM_VS(PM8901_LVS2, 0, 1, 0),
4119 RPM_VS(PM8901_LVS3, 0, 1, 0),
4120 RPM_VS(PM8901_MVS0, 0, 1, 0),
4121
4122 /* ID a_on pin_func pin_ctrl */
4123 RPM_PC(PM8058_L8, 0, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4124 RPM_PC(PM8058_L20, 0, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4125 RPM_PC(PM8058_L21, 1, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4126 RPM_PC(PM8058_S2, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8058_A0),
4127 RPM_PC(PM8901_L0, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8901_A0),
4128 RPM_PC(PM8901_S4, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8901_A0),
4129};
4130
4131static struct rpm_regulator_platform_data rpm_regulator_early_pdata = {
4132 .init_data = rpm_regulator_early_init_data,
4133 .num_regulators = ARRAY_SIZE(rpm_regulator_early_init_data),
4134 .version = RPM_VREG_VERSION_8660,
4135 .vreg_id_vdd_mem = RPM_VREG_ID_PM8058_S0,
4136 .vreg_id_vdd_dig = RPM_VREG_ID_PM8058_S1,
4137};
4138
4139static struct rpm_regulator_platform_data rpm_regulator_pdata = {
4140 .init_data = rpm_regulator_init_data,
4141 .num_regulators = ARRAY_SIZE(rpm_regulator_init_data),
4142 .version = RPM_VREG_VERSION_8660,
4143};
4144
4145static struct platform_device rpm_regulator_early_device = {
4146 .name = "rpm-regulator",
4147 .id = 0,
4148 .dev = {
4149 .platform_data = &rpm_regulator_early_pdata,
4150 },
4151};
4152
4153static struct platform_device rpm_regulator_device = {
4154 .name = "rpm-regulator",
4155 .id = 1,
4156 .dev = {
4157 .platform_data = &rpm_regulator_pdata,
4158 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004159};
4160
4161static struct platform_device *early_regulators[] __initdata = {
4162 &msm_device_saw_s0,
4163 &msm_device_saw_s1,
David Collins6f032ba2011-08-31 14:08:15 -07004164 &rpm_regulator_early_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004165};
4166
4167static struct platform_device *early_devices[] __initdata = {
4168#ifdef CONFIG_MSM_BUS_SCALING
4169 &msm_bus_apps_fabric,
4170 &msm_bus_sys_fabric,
4171 &msm_bus_mm_fabric,
4172 &msm_bus_sys_fpb,
4173 &msm_bus_cpss_fpb,
4174#endif
4175 &msm_device_dmov_adm0,
4176 &msm_device_dmov_adm1,
4177};
4178
4179#if (defined(CONFIG_MARIMBA_CORE)) && \
4180 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
4181
4182static int bluetooth_power(int);
4183static struct platform_device msm_bt_power_device = {
4184 .name = "bt_power",
4185 .id = -1,
4186 .dev = {
4187 .platform_data = &bluetooth_power,
4188 },
4189};
4190#endif
4191
4192static struct platform_device msm_tsens_device = {
4193 .name = "tsens-tm",
4194 .id = -1,
4195};
4196
4197static struct platform_device *rumi_sim_devices[] __initdata = {
4198 &smc91x_device,
4199 &msm_device_uart_dm12,
4200#ifdef CONFIG_I2C_QUP
4201 &msm_gsbi3_qup_i2c_device,
4202 &msm_gsbi4_qup_i2c_device,
4203 &msm_gsbi7_qup_i2c_device,
4204 &msm_gsbi8_qup_i2c_device,
4205 &msm_gsbi9_qup_i2c_device,
4206 &msm_gsbi12_qup_i2c_device,
4207#endif
4208#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004209 &msm_device_ssbi3,
4210#endif
4211#ifdef CONFIG_ANDROID_PMEM
Laura Abbottdf8b8a82011-11-02 23:13:45 -07004212#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004213 &android_pmem_device,
4214 &android_pmem_adsp_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004215 &android_pmem_smipool_device,
4216#endif
Laura Abbottdf8b8a82011-11-02 23:13:45 -07004217 &android_pmem_audio_device,
4218#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004219#ifdef CONFIG_MSM_ROTATOR
4220 &msm_rotator_device,
4221#endif
4222 &msm_fb_device,
4223 &msm_kgsl_3d0,
4224 &msm_kgsl_2d0,
4225 &msm_kgsl_2d1,
4226 &lcdc_samsung_panel_device,
4227#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
4228 &hdmi_msm_device,
4229#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
4230#ifdef CONFIG_MSM_CAMERA
4231#ifdef CONFIG_MT9E013
4232 &msm_camera_sensor_mt9e013,
4233#endif
4234#ifdef CONFIG_IMX074
4235 &msm_camera_sensor_imx074,
4236#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04004237#ifdef CONFIG_VX6953
4238 &msm_camera_sensor_vx6953,
4239#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004240#ifdef CONFIG_WEBCAM_OV7692
4241 &msm_camera_sensor_webcam_ov7692,
4242#endif
4243#ifdef CONFIG_WEBCAM_OV9726
4244 &msm_camera_sensor_webcam_ov9726,
4245#endif
4246#ifdef CONFIG_QS_S5K4E1
4247 &msm_camera_sensor_qs_s5k4e1,
4248#endif
4249#endif
4250#ifdef CONFIG_MSM_GEMINI
4251 &msm_gemini_device,
4252#endif
4253#ifdef CONFIG_MSM_VPE
4254 &msm_vpe_device,
4255#endif
4256 &msm_device_vidc,
4257};
4258
4259#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
4260enum {
4261 SX150X_CORE,
4262 SX150X_DOCKING,
4263 SX150X_SURF,
4264 SX150X_LEFT_FHA,
4265 SX150X_RIGHT_FHA,
4266 SX150X_SOUTH,
4267 SX150X_NORTH,
4268 SX150X_CORE_FLUID,
4269};
4270
4271static struct sx150x_platform_data sx150x_data[] __initdata = {
4272 [SX150X_CORE] = {
4273 .gpio_base = GPIO_CORE_EXPANDER_BASE,
4274 .oscio_is_gpo = false,
4275 .io_pullup_ena = 0x0c08,
4276 .io_pulldn_ena = 0x4060,
4277 .io_open_drain_ena = 0x000c,
4278 .io_polarity = 0,
4279 .irq_summary = -1, /* see fixup_i2c_configs() */
4280 .irq_base = GPIO_EXPANDER_IRQ_BASE,
4281 },
4282 [SX150X_DOCKING] = {
4283 .gpio_base = GPIO_DOCKING_EXPANDER_BASE,
4284 .oscio_is_gpo = false,
4285 .io_pullup_ena = 0x5e06,
4286 .io_pulldn_ena = 0x81b8,
4287 .io_open_drain_ena = 0,
4288 .io_polarity = 0,
4289 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4290 UI_INT2_N),
4291 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4292 GPIO_DOCKING_EXPANDER_BASE -
4293 GPIO_EXPANDER_GPIO_BASE,
4294 },
4295 [SX150X_SURF] = {
4296 .gpio_base = GPIO_SURF_EXPANDER_BASE,
4297 .oscio_is_gpo = false,
4298 .io_pullup_ena = 0,
4299 .io_pulldn_ena = 0,
4300 .io_open_drain_ena = 0,
4301 .io_polarity = 0,
4302 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4303 UI_INT1_N),
4304 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4305 GPIO_SURF_EXPANDER_BASE -
4306 GPIO_EXPANDER_GPIO_BASE,
4307 },
4308 [SX150X_LEFT_FHA] = {
4309 .gpio_base = GPIO_LEFT_KB_EXPANDER_BASE,
4310 .oscio_is_gpo = false,
4311 .io_pullup_ena = 0,
4312 .io_pulldn_ena = 0x40,
4313 .io_open_drain_ena = 0,
4314 .io_polarity = 0,
4315 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4316 UI_INT3_N),
4317 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4318 GPIO_LEFT_KB_EXPANDER_BASE -
4319 GPIO_EXPANDER_GPIO_BASE,
4320 },
4321 [SX150X_RIGHT_FHA] = {
4322 .gpio_base = GPIO_RIGHT_KB_EXPANDER_BASE,
4323 .oscio_is_gpo = true,
4324 .io_pullup_ena = 0,
4325 .io_pulldn_ena = 0,
4326 .io_open_drain_ena = 0,
4327 .io_polarity = 0,
4328 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4329 UI_INT3_N),
4330 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4331 GPIO_RIGHT_KB_EXPANDER_BASE -
4332 GPIO_EXPANDER_GPIO_BASE,
4333 },
4334 [SX150X_SOUTH] = {
4335 .gpio_base = GPIO_SOUTH_EXPANDER_BASE,
4336 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4337 GPIO_SOUTH_EXPANDER_BASE -
4338 GPIO_EXPANDER_GPIO_BASE,
4339 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT3_N),
4340 },
4341 [SX150X_NORTH] = {
4342 .gpio_base = GPIO_NORTH_EXPANDER_BASE,
4343 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4344 GPIO_NORTH_EXPANDER_BASE -
4345 GPIO_EXPANDER_GPIO_BASE,
4346 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT3_N),
4347 .oscio_is_gpo = true,
4348 .io_open_drain_ena = 0x30,
4349 },
4350 [SX150X_CORE_FLUID] = {
4351 .gpio_base = GPIO_CORE_EXPANDER_BASE,
4352 .oscio_is_gpo = false,
4353 .io_pullup_ena = 0x0408,
4354 .io_pulldn_ena = 0x4060,
4355 .io_open_drain_ena = 0x0008,
4356 .io_polarity = 0,
4357 .irq_summary = -1, /* see fixup_i2c_configs() */
4358 .irq_base = GPIO_EXPANDER_IRQ_BASE,
4359 },
4360};
4361
4362#ifdef CONFIG_SENSORS_MSM_ADC
4363/* Configuration of EPM expander is done when client
4364 * request an adc read
4365 */
4366static struct sx150x_platform_data sx150x_epmdata = {
4367 .gpio_base = GPIO_EPM_EXPANDER_BASE,
4368 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4369 GPIO_EPM_EXPANDER_BASE -
4370 GPIO_EXPANDER_GPIO_BASE,
4371 .irq_summary = -1,
4372};
4373#endif
4374
4375/* sx150x_low_power_cfg
4376 *
4377 * This data and init function are used to put unused gpio-expander output
4378 * lines into their low-power states at boot. The init
4379 * function must be deferred until a later init stage because the i2c
4380 * gpio expander drivers do not probe until after they are registered
4381 * (see register_i2c_devices) and the work-queues for those registrations
4382 * are processed. Because these lines are unused, there is no risk of
4383 * competing with a device driver for the gpio.
4384 *
4385 * gpio lines whose low-power states are input are naturally in their low-
4386 * power configurations once probed, see the platform data structures above.
4387 */
4388struct sx150x_low_power_cfg {
4389 unsigned gpio;
4390 unsigned val;
4391};
4392
4393static struct sx150x_low_power_cfg
4394common_sx150x_lp_cfgs[] __initdata = {
4395 {GPIO_WLAN_DEEP_SLEEP_N, 0},
4396 {GPIO_EXT_GPS_LNA_EN, 0},
4397 {GPIO_MSM_WAKES_BT, 0},
4398 {GPIO_USB_UICC_EN, 0},
4399 {GPIO_BATT_GAUGE_EN, 0},
4400};
4401
4402static struct sx150x_low_power_cfg
4403surf_ffa_sx150x_lp_cfgs[] __initdata = {
4404 {GPIO_MIPI_DSI_RST_N, 0},
4405 {GPIO_DONGLE_PWR_EN, 0},
4406 {GPIO_CAP_TS_SLEEP, 1},
4407 {GPIO_WEB_CAMIF_RESET_N, 0},
4408};
4409
4410static void __init
4411cfg_gpio_low_power(struct sx150x_low_power_cfg *cfgs, unsigned nelems)
4412{
4413 unsigned n;
4414 int rc;
4415
4416 for (n = 0; n < nelems; ++n) {
4417 rc = gpio_request(cfgs[n].gpio, NULL);
4418 if (!rc) {
4419 rc = gpio_direction_output(cfgs[n].gpio, cfgs[n].val);
4420 gpio_free(cfgs[n].gpio);
4421 }
4422
4423 if (rc) {
4424 printk(KERN_NOTICE "%s: failed to sleep gpio %d: %d\n",
4425 __func__, cfgs[n].gpio, rc);
4426 }
Steve Muckle9161d302010-02-11 11:50:40 -08004427 }
Steve Mucklea55df6e2010-01-07 12:43:24 -08004428}
4429
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004430static int __init cfg_sx150xs_low_power(void)
Steve Mucklea55df6e2010-01-07 12:43:24 -08004431{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004432 cfg_gpio_low_power(common_sx150x_lp_cfgs,
4433 ARRAY_SIZE(common_sx150x_lp_cfgs));
4434 if (!machine_is_msm8x60_fluid())
4435 cfg_gpio_low_power(surf_ffa_sx150x_lp_cfgs,
4436 ARRAY_SIZE(surf_ffa_sx150x_lp_cfgs));
4437 return 0;
4438}
4439module_init(cfg_sx150xs_low_power);
4440
4441#ifdef CONFIG_I2C
4442static struct i2c_board_info core_expander_i2c_info[] __initdata = {
4443 {
4444 I2C_BOARD_INFO("sx1509q", 0x3e),
4445 .platform_data = &sx150x_data[SX150X_CORE]
4446 },
4447};
4448
4449static struct i2c_board_info docking_expander_i2c_info[] __initdata = {
4450 {
4451 I2C_BOARD_INFO("sx1509q", 0x3f),
4452 .platform_data = &sx150x_data[SX150X_DOCKING]
4453 },
4454};
4455
4456static struct i2c_board_info surf_expanders_i2c_info[] __initdata = {
4457 {
4458 I2C_BOARD_INFO("sx1509q", 0x70),
4459 .platform_data = &sx150x_data[SX150X_SURF]
4460 }
4461};
4462
4463static struct i2c_board_info fha_expanders_i2c_info[] __initdata = {
4464 {
4465 I2C_BOARD_INFO("sx1508q", 0x21),
4466 .platform_data = &sx150x_data[SX150X_LEFT_FHA]
4467 },
4468 {
4469 I2C_BOARD_INFO("sx1508q", 0x22),
4470 .platform_data = &sx150x_data[SX150X_RIGHT_FHA]
4471 }
4472};
4473
4474static struct i2c_board_info fluid_expanders_i2c_info[] __initdata = {
4475 {
4476 I2C_BOARD_INFO("sx1508q", 0x23),
4477 .platform_data = &sx150x_data[SX150X_SOUTH]
4478 },
4479 {
4480 I2C_BOARD_INFO("sx1508q", 0x20),
4481 .platform_data = &sx150x_data[SX150X_NORTH]
4482 }
4483};
4484
4485static struct i2c_board_info fluid_core_expander_i2c_info[] __initdata = {
4486 {
4487 I2C_BOARD_INFO("sx1509q", 0x3e),
4488 .platform_data = &sx150x_data[SX150X_CORE_FLUID]
4489 },
4490};
4491
4492#ifdef CONFIG_SENSORS_MSM_ADC
4493static struct i2c_board_info fluid_expanders_i2c_epm_info[] = {
4494 {
4495 I2C_BOARD_INFO("sx1509q", 0x3e),
4496 .platform_data = &sx150x_epmdata
4497 },
4498};
4499#endif
4500#endif
4501#endif
4502
4503#ifdef CONFIG_SENSORS_MSM_ADC
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004504
4505static struct adc_access_fn xoadc_fn = {
4506 pm8058_xoadc_select_chan_and_start_conv,
4507 pm8058_xoadc_read_adc_code,
4508 pm8058_xoadc_get_properties,
4509 pm8058_xoadc_slot_request,
4510 pm8058_xoadc_restore_slot,
4511 pm8058_xoadc_calibrate,
4512};
4513
4514#if defined(CONFIG_I2C) && \
4515 (defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE))
4516static struct regulator *vreg_adc_epm1;
4517
4518static struct i2c_client *epm_expander_i2c_register_board(void)
4519
4520{
4521 struct i2c_adapter *i2c_adap;
4522 struct i2c_client *client = NULL;
4523 i2c_adap = i2c_get_adapter(0x0);
4524
4525 if (i2c_adap == NULL)
4526 printk(KERN_ERR "\nepm_expander_i2c_adapter is NULL\n");
4527
4528 if (i2c_adap != NULL)
4529 client = i2c_new_device(i2c_adap,
4530 &fluid_expanders_i2c_epm_info[0]);
4531 return client;
4532
4533}
4534
4535static unsigned int msm_adc_gpio_configure_expander_enable(void)
4536{
4537 int rc = 0;
4538 static struct i2c_client *epm_i2c_client;
4539
4540 printk(KERN_DEBUG "Enter msm_adc_gpio_configure_expander_enable\n");
4541
4542 vreg_adc_epm1 = regulator_get(NULL, "8058_s3");
4543
4544 if (IS_ERR(vreg_adc_epm1)) {
4545 printk(KERN_ERR "%s: Unable to get 8058_s3\n", __func__);
4546 return 0;
4547 }
4548
4549 rc = regulator_set_voltage(vreg_adc_epm1, 1800000, 1800000);
4550 if (rc)
4551 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4552 "regulator set voltage failed\n");
4553
4554 rc = regulator_enable(vreg_adc_epm1);
4555 if (rc) {
4556 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4557 "Error while enabling regulator for epm s3 %d\n", rc);
4558 return rc;
4559 }
4560
4561 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: Start"
4562 " setting the value of the EPM 3.3, 5v and lvlsft\n");
4563
4564 msleep(1000);
4565
4566 rc = gpio_request(GPIO_EPM_5V_BOOST_EN, "boost_epm_5v");
4567 if (!rc) {
4568 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4569 "Configure 5v boost\n");
4570 gpio_direction_output(GPIO_EPM_5V_BOOST_EN, 1);
4571 } else {
4572 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4573 "Error for epm 5v boost en\n");
4574 goto exit_vreg_epm;
4575 }
4576
4577 msleep(500);
4578
4579 rc = gpio_request(GPIO_EPM_3_3V_EN, "epm_3_3v");
4580 if (!rc) {
4581 gpio_direction_output(GPIO_EPM_3_3V_EN, 1);
4582 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4583 "Configure epm 3.3v\n");
4584 } else {
4585 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4586 "Error for gpio 3.3ven\n");
4587 goto exit_vreg_epm;
4588 }
4589 msleep(500);
4590
4591 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4592 "Trying to request EPM LVLSFT_EN\n");
4593 rc = gpio_request(GPIO_EPM_LVLSFT_EN, "lvsft_en");
4594 if (!rc) {
4595 gpio_direction_output(GPIO_EPM_LVLSFT_EN, 1);
4596 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4597 "Configure the lvlsft\n");
4598 } else {
4599 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4600 "Error for epm lvlsft_en\n");
4601 goto exit_vreg_epm;
4602 }
4603
4604 msleep(500);
4605
4606 if (!epm_i2c_client)
4607 epm_i2c_client = epm_expander_i2c_register_board();
4608
4609 rc = gpio_request(GPIO_PWR_MON_ENABLE, "pwr_mon_enable");
4610 if (!rc)
4611 rc = gpio_direction_output(GPIO_PWR_MON_ENABLE, 1);
4612 if (rc) {
4613 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4614 ": GPIO PWR MON Enable issue\n");
4615 goto exit_vreg_epm;
4616 }
4617
4618 msleep(1000);
4619
4620 rc = gpio_request(GPIO_ADC1_PWDN_N, "adc1_pwdn");
4621 if (!rc) {
4622 rc = gpio_direction_output(GPIO_ADC1_PWDN_N, 1);
4623 if (rc) {
4624 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4625 ": ADC1_PWDN error direction out\n");
4626 goto exit_vreg_epm;
4627 }
4628 }
4629
4630 msleep(100);
4631
4632 rc = gpio_request(GPIO_ADC2_PWDN_N, "adc2_pwdn");
4633 if (!rc) {
4634 rc = gpio_direction_output(GPIO_ADC2_PWDN_N, 1);
4635 if (rc) {
4636 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4637 ": ADC2_PWD error direction out\n");
4638 goto exit_vreg_epm;
4639 }
4640 }
4641
4642 msleep(1000);
4643
4644 rc = gpio_request(GPIO_PWR_MON_START, "pwr_mon_start");
4645 if (!rc) {
4646 rc = gpio_direction_output(GPIO_PWR_MON_START, 0);
4647 if (rc) {
4648 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4649 "Gpio request problem %d\n", rc);
4650 goto exit_vreg_epm;
4651 }
4652 }
4653
4654 rc = gpio_request(GPIO_EPM_SPI_ADC1_CS_N, "spi_adc1_cs");
4655 if (!rc) {
4656 rc = gpio_direction_output(GPIO_EPM_SPI_ADC1_CS_N, 0);
4657 if (rc) {
4658 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4659 ": EPM_SPI_ADC1_CS_N error\n");
4660 goto exit_vreg_epm;
4661 }
4662 }
4663
4664 rc = gpio_request(GPIO_EPM_SPI_ADC2_CS_N, "spi_adc2_cs");
4665 if (!rc) {
4666 rc = gpio_direction_output(GPIO_EPM_SPI_ADC2_CS_N, 0);
4667 if (rc) {
4668 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4669 ": EPM_SPI_ADC2_Cs_N error\n");
4670 goto exit_vreg_epm;
4671 }
4672 }
4673
4674 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: Set "
4675 "the power monitor reset for epm\n");
4676
4677 rc = gpio_request(GPIO_PWR_MON_RESET_N, "pwr_mon_reset_n");
4678 if (!rc) {
4679 gpio_direction_output(GPIO_PWR_MON_RESET_N, 0);
4680 if (rc) {
4681 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4682 ": Error in the power mon reset\n");
4683 goto exit_vreg_epm;
4684 }
4685 }
4686
4687 msleep(1000);
4688
4689 gpio_set_value_cansleep(GPIO_PWR_MON_RESET_N, 1);
4690
4691 msleep(500);
4692
4693 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4694
4695 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4696
4697 return rc;
4698
4699exit_vreg_epm:
4700 regulator_disable(vreg_adc_epm1);
4701
4702 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: Exit."
4703 " rc = %d.\n", rc);
4704 return rc;
4705};
4706
4707static unsigned int msm_adc_gpio_configure_expander_disable(void)
4708{
4709 int rc = 0;
4710
4711 gpio_set_value_cansleep(GPIO_PWR_MON_RESET_N, 0);
4712 gpio_free(GPIO_PWR_MON_RESET_N);
4713
4714 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 0);
4715 gpio_free(GPIO_EPM_SPI_ADC1_CS_N);
4716
4717 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 0);
4718 gpio_free(GPIO_EPM_SPI_ADC2_CS_N);
4719
4720 gpio_set_value_cansleep(GPIO_PWR_MON_START, 0);
4721 gpio_free(GPIO_PWR_MON_START);
4722
4723 gpio_direction_output(GPIO_ADC1_PWDN_N, 0);
4724 gpio_free(GPIO_ADC1_PWDN_N);
4725
4726 gpio_direction_output(GPIO_ADC2_PWDN_N, 0);
4727 gpio_free(GPIO_ADC2_PWDN_N);
4728
4729 gpio_set_value_cansleep(GPIO_PWR_MON_ENABLE, 0);
4730 gpio_free(GPIO_PWR_MON_ENABLE);
4731
4732 gpio_set_value_cansleep(GPIO_EPM_LVLSFT_EN, 0);
4733 gpio_free(GPIO_EPM_LVLSFT_EN);
4734
4735 gpio_set_value_cansleep(GPIO_EPM_5V_BOOST_EN, 0);
4736 gpio_free(GPIO_EPM_5V_BOOST_EN);
4737
4738 gpio_set_value_cansleep(GPIO_EPM_3_3V_EN, 0);
4739 gpio_free(GPIO_EPM_3_3V_EN);
4740
4741 rc = regulator_disable(vreg_adc_epm1);
4742 if (rc)
4743 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_disable: "
4744 "Error while enabling regulator for epm s3 %d\n", rc);
4745 regulator_put(vreg_adc_epm1);
4746
4747 printk(KERN_DEBUG "Exi msm_adc_gpio_configure_expander_disable\n");
4748 return rc;
4749};
4750
4751unsigned int msm_adc_gpio_expander_enable(int cs_enable)
4752{
4753 int rc = 0;
4754
4755 printk(KERN_DEBUG "msm_adc_gpio_expander_enable: cs_enable = %d",
4756 cs_enable);
4757
4758 if (cs_enable < 16) {
4759 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 0);
4760 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4761 } else {
4762 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 0);
4763 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4764 }
4765 return rc;
4766};
4767
4768unsigned int msm_adc_gpio_expander_disable(int cs_disable)
4769{
4770 int rc = 0;
4771
4772 printk(KERN_DEBUG "Enter msm_adc_gpio_expander_disable.\n");
4773
4774 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4775
4776 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4777
4778 return rc;
4779};
4780#endif
4781
4782static struct msm_adc_channels msm_adc_channels_data[] = {
4783 {"vbatt", CHANNEL_ADC_VBATT, 0, &xoadc_fn, CHAN_PATH_TYPE2,
4784 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4785 {"vcoin", CHANNEL_ADC_VCOIN, 0, &xoadc_fn, CHAN_PATH_TYPE1,
4786 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4787 {"vcharger_channel", CHANNEL_ADC_VCHG, 0, &xoadc_fn, CHAN_PATH_TYPE3,
4788 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE4, scale_default},
4789 {"charger_current_monitor", CHANNEL_ADC_CHG_MONITOR, 0, &xoadc_fn,
4790 CHAN_PATH_TYPE4,
4791 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_default},
4792 {"vph_pwr", CHANNEL_ADC_VPH_PWR, 0, &xoadc_fn, CHAN_PATH_TYPE5,
4793 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4794 {"usb_vbus", CHANNEL_ADC_USB_VBUS, 0, &xoadc_fn, CHAN_PATH_TYPE11,
4795 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4796 {"pmic_therm", CHANNEL_ADC_DIE_TEMP, 0, &xoadc_fn, CHAN_PATH_TYPE12,
4797 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_pmic_therm},
4798 {"pmic_therm_4K", CHANNEL_ADC_DIE_TEMP_4K, 0, &xoadc_fn,
4799 CHAN_PATH_TYPE12,
4800 ADC_CONFIG_TYPE1, ADC_CALIB_CONFIG_TYPE7, scale_pmic_therm},
4801 {"xo_therm", CHANNEL_ADC_XOTHERM, 0, &xoadc_fn, CHAN_PATH_TYPE_NONE,
4802 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE5, tdkntcgtherm},
4803 {"xo_therm_4K", CHANNEL_ADC_XOTHERM_4K, 0, &xoadc_fn,
4804 CHAN_PATH_TYPE_NONE,
4805 ADC_CONFIG_TYPE1, ADC_CALIB_CONFIG_TYPE6, tdkntcgtherm},
4806 {"hdset_detect", CHANNEL_ADC_HDSET, 0, &xoadc_fn, CHAN_PATH_TYPE6,
4807 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_default},
4808 {"chg_batt_amon", CHANNEL_ADC_BATT_AMON, 0, &xoadc_fn, CHAN_PATH_TYPE10,
4809 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1,
4810 scale_xtern_chgr_cur},
4811 {"msm_therm", CHANNEL_ADC_MSM_THERM, 0, &xoadc_fn, CHAN_PATH_TYPE8,
4812 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_msm_therm},
4813 {"batt_therm", CHANNEL_ADC_BATT_THERM, 0, &xoadc_fn, CHAN_PATH_TYPE7,
4814 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_batt_therm},
4815 {"batt_id", CHANNEL_ADC_BATT_ID, 0, &xoadc_fn, CHAN_PATH_TYPE9,
4816 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4817 {"ref_625mv", CHANNEL_ADC_625_REF, 0, &xoadc_fn, CHAN_PATH_TYPE15,
4818 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4819 {"ref_1250mv", CHANNEL_ADC_1250_REF, 0, &xoadc_fn, CHAN_PATH_TYPE13,
4820 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4821 {"ref_325mv", CHANNEL_ADC_325_REF, 0, &xoadc_fn, CHAN_PATH_TYPE14,
4822 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4823};
4824
4825static char *msm_adc_fluid_device_names[] = {
4826 "ADS_ADC1",
4827 "ADS_ADC2",
4828};
4829
4830static struct msm_adc_platform_data msm_adc_pdata = {
4831 .channel = msm_adc_channels_data,
4832 .num_chan_supported = ARRAY_SIZE(msm_adc_channels_data),
4833#if defined(CONFIG_I2C) && \
4834 (defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE))
4835 .adc_gpio_enable = msm_adc_gpio_expander_enable,
4836 .adc_gpio_disable = msm_adc_gpio_expander_disable,
4837 .adc_fluid_enable = msm_adc_gpio_configure_expander_enable,
4838 .adc_fluid_disable = msm_adc_gpio_configure_expander_disable,
4839#endif
4840};
4841
4842static struct platform_device msm_adc_device = {
4843 .name = "msm_adc",
4844 .id = -1,
4845 .dev = {
4846 .platform_data = &msm_adc_pdata,
4847 },
4848};
4849
4850static void pmic8058_xoadc_mpp_config(void)
4851{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304852 int rc, i;
4853 struct pm8xxx_mpp_init_info xoadc_mpps[] = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304854 PM8058_MPP_INIT(XOADC_MPP_3, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304855 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304856 PM8058_MPP_INIT(XOADC_MPP_5, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH9,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304857 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304858 PM8058_MPP_INIT(XOADC_MPP_7, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH6,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304859 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304860 PM8058_MPP_INIT(XOADC_MPP_8, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH8,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304861 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304862 PM8058_MPP_INIT(XOADC_MPP_10, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH7,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304863 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304864 PM8901_MPP_INIT(XOADC_MPP_4, D_OUTPUT, PM8901_MPP_DIG_LEVEL_S4,
4865 DOUT_CTRL_LOW),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304866 };
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004867
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304868 for (i = 0; i < ARRAY_SIZE(xoadc_mpps); i++) {
4869 rc = pm8xxx_mpp_config(xoadc_mpps[i].mpp,
4870 &xoadc_mpps[i].config);
4871 if (rc) {
4872 pr_err("%s: Config MPP %d of PM8058 failed\n",
4873 __func__, xoadc_mpps[i].mpp);
4874 }
4875 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004876}
4877
4878static struct regulator *vreg_ldo18_adc;
4879
4880static int pmic8058_xoadc_vreg_config(int on)
4881{
4882 int rc;
4883
4884 if (on) {
4885 rc = regulator_enable(vreg_ldo18_adc);
4886 if (rc)
4887 pr_err("%s: Enable of regulator ldo18_adc "
4888 "failed\n", __func__);
4889 } else {
4890 rc = regulator_disable(vreg_ldo18_adc);
4891 if (rc)
4892 pr_err("%s: Disable of regulator ldo18_adc "
4893 "failed\n", __func__);
4894 }
4895
4896 return rc;
4897}
4898
4899static int pmic8058_xoadc_vreg_setup(void)
4900{
4901 int rc;
4902
4903 vreg_ldo18_adc = regulator_get(NULL, "8058_l18");
4904 if (IS_ERR(vreg_ldo18_adc)) {
4905 printk(KERN_ERR "%s: vreg get failed (%ld)\n",
4906 __func__, PTR_ERR(vreg_ldo18_adc));
4907 rc = PTR_ERR(vreg_ldo18_adc);
4908 goto fail;
4909 }
4910
4911 rc = regulator_set_voltage(vreg_ldo18_adc, 2200000, 2200000);
4912 if (rc) {
4913 pr_err("%s: unable to set ldo18 voltage to 2.2V\n", __func__);
4914 goto fail;
4915 }
4916
4917 return rc;
4918fail:
4919 regulator_put(vreg_ldo18_adc);
4920 return rc;
4921}
4922
4923static void pmic8058_xoadc_vreg_shutdown(void)
4924{
4925 regulator_put(vreg_ldo18_adc);
4926}
4927
4928/* usec. For this ADC,
4929 * this time represents clk rate @ txco w/ 1024 decimation ratio.
4930 * Each channel has different configuration, thus at the time of starting
4931 * the conversion, xoadc will return actual conversion time
4932 * */
4933static struct adc_properties pm8058_xoadc_data = {
4934 .adc_reference = 2200, /* milli-voltage for this adc */
4935 .bitresolution = 15,
4936 .bipolar = 0,
4937 .conversiontime = 54,
4938};
4939
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304940static struct xoadc_platform_data pm8058_xoadc_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004941 .xoadc_prop = &pm8058_xoadc_data,
4942 .xoadc_mpp_config = pmic8058_xoadc_mpp_config,
4943 .xoadc_vreg_set = pmic8058_xoadc_vreg_config,
4944 .xoadc_num = XOADC_PMIC_0,
4945 .xoadc_vreg_setup = pmic8058_xoadc_vreg_setup,
4946 .xoadc_vreg_shutdown = pmic8058_xoadc_vreg_shutdown,
4947};
4948#endif
4949
4950#ifdef CONFIG_MSM_SDIO_AL
4951
4952static unsigned mdm2ap_status = 140;
4953
4954static int configure_mdm2ap_status(int on)
4955{
4956 int ret = 0;
4957 if (on)
4958 ret = msm_gpiomux_get(mdm2ap_status);
4959 else
4960 ret = msm_gpiomux_put(mdm2ap_status);
4961
4962 if (ret)
4963 pr_err("%s: mdm2ap_status config failed, on = %d\n", __func__,
4964 on);
4965
4966 return ret;
4967}
4968
4969
4970static int get_mdm2ap_status(void)
4971{
4972 return gpio_get_value(mdm2ap_status);
4973}
4974
4975static struct sdio_al_platform_data sdio_al_pdata = {
4976 .config_mdm2ap_status = configure_mdm2ap_status,
4977 .get_mdm2ap_status = get_mdm2ap_status,
4978 .allow_sdioc_version_major_2 = 0,
Konstantin Dorfmanee2e3082011-08-16 15:12:01 +03004979 .peer_sdioc_version_minor = 0x0202,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004980 .peer_sdioc_version_major = 0x0004,
4981 .peer_sdioc_boot_version_minor = 0x0001,
4982 .peer_sdioc_boot_version_major = 0x0003
4983};
4984
4985struct platform_device msm_device_sdio_al = {
4986 .name = "msm_sdio_al",
4987 .id = -1,
4988 .dev = {
Maya Erez6862b142011-08-22 09:07:07 +03004989 .parent = &msm_charm_modem.dev,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004990 .platform_data = &sdio_al_pdata,
4991 },
4992};
4993
4994#endif /* CONFIG_MSM_SDIO_AL */
4995
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304996#define GPIO_VREG_ID_EXT_5V 0
4997
4998static struct regulator_consumer_supply vreg_consumers_EXT_5V[] = {
4999 REGULATOR_SUPPLY("ext_5v", NULL),
5000 REGULATOR_SUPPLY("8901_mpp0", NULL),
5001};
5002
5003#define GPIO_VREG_INIT(_id, _reg_name, _gpio_label, _gpio, _active_low) \
5004 [GPIO_VREG_ID_##_id] = { \
5005 .init_data = { \
5006 .constraints = { \
5007 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
5008 }, \
5009 .num_consumer_supplies = \
5010 ARRAY_SIZE(vreg_consumers_##_id), \
5011 .consumer_supplies = vreg_consumers_##_id, \
5012 }, \
5013 .regulator_name = _reg_name, \
5014 .active_low = _active_low, \
5015 .gpio_label = _gpio_label, \
5016 .gpio = _gpio, \
5017 }
5018
5019/* GPIO regulator constraints */
5020static struct gpio_regulator_platform_data msm_gpio_regulator_pdata[] = {
5021 GPIO_VREG_INIT(EXT_5V, "ext_5v", "ext_5v_en",
5022 PM8901_MPP_PM_TO_SYS(0), 0),
5023};
5024
5025/* GPIO regulator */
5026static struct platform_device msm8x60_8901_mpp_vreg __devinitdata = {
5027 .name = GPIO_REGULATOR_DEV_NAME,
5028 .id = PM8901_MPP_PM_TO_SYS(0),
5029 .dev = {
5030 .platform_data =
5031 &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V],
5032 },
5033};
5034
5035static void __init pm8901_vreg_mpp0_init(void)
5036{
5037 int rc;
5038
5039 struct pm8xxx_mpp_init_info pm8901_vreg_mpp0 = {
5040 .mpp = PM8901_MPP_PM_TO_SYS(0),
5041 .config = {
5042 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
5043 .level = PM8901_MPP_DIG_LEVEL_VPH,
5044 },
5045 };
5046
5047 /*
5048 * Set PMIC 8901 MPP0 active_high to 0 for surf and charm_surf. This
5049 * implies that the regulator connected to MPP0 is enabled when
5050 * MPP0 is low.
5051 */
5052 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion()) {
5053 msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V].active_low = 1;
5054 pm8901_vreg_mpp0.config.control = PM8XXX_MPP_DOUT_CTRL_HIGH;
5055 } else {
5056 msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V].active_low = 0;
5057 pm8901_vreg_mpp0.config.control = PM8XXX_MPP_DOUT_CTRL_LOW;
5058 }
5059
5060 rc = pm8xxx_mpp_config(pm8901_vreg_mpp0.mpp, &pm8901_vreg_mpp0.config);
5061 if (rc)
5062 pr_err("%s: pm8xxx_mpp_config: rc=%d\n", __func__, rc);
5063}
5064
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005065static struct platform_device *charm_devices[] __initdata = {
5066 &msm_charm_modem,
5067#ifdef CONFIG_MSM_SDIO_AL
5068 &msm_device_sdio_al,
5069#endif
5070};
5071
Lei Zhou338cab82011-08-19 13:38:17 -04005072#ifdef CONFIG_SND_SOC_MSM8660_APQ
5073static struct platform_device *dragon_alsa_devices[] __initdata = {
5074 &msm_pcm,
5075 &msm_pcm_routing,
5076 &msm_cpudai0,
5077 &msm_cpudai1,
5078 &msm_cpudai_hdmi_rx,
5079 &msm_cpudai_bt_rx,
5080 &msm_cpudai_bt_tx,
5081 &msm_cpudai_fm_rx,
5082 &msm_cpudai_fm_tx,
5083 &msm_cpu_fe,
5084 &msm_stub_codec,
5085 &msm_lpa_pcm,
5086};
5087#endif
5088
5089static struct platform_device *asoc_devices[] __initdata = {
5090 &asoc_msm_pcm,
5091 &asoc_msm_dai0,
5092 &asoc_msm_dai1,
5093};
5094
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005095static struct platform_device *surf_devices[] __initdata = {
5096 &msm_device_smd,
5097 &msm_device_uart_dm12,
Stephen Boyd3acc9e42011-09-28 16:46:40 -07005098 &msm_pil_q6v3,
Stephen Boyd4eb885b2011-09-29 01:16:03 -07005099 &msm_pil_modem,
Stephen Boydd89eebe2011-09-28 23:28:11 -07005100 &msm_pil_tzapps,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005101#ifdef CONFIG_I2C_QUP
5102 &msm_gsbi3_qup_i2c_device,
5103 &msm_gsbi4_qup_i2c_device,
5104 &msm_gsbi7_qup_i2c_device,
5105 &msm_gsbi8_qup_i2c_device,
5106 &msm_gsbi9_qup_i2c_device,
5107 &msm_gsbi12_qup_i2c_device,
5108#endif
5109#ifdef CONFIG_SERIAL_MSM_HS
5110 &msm_device_uart_dm1,
5111#endif
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05305112#ifdef CONFIG_MSM_SSBI
5113 &msm_device_ssbi_pmic1,
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05305114 &msm_device_ssbi_pmic2,
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05305115#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005116#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005117 &msm_device_ssbi3,
5118#endif
5119#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
5120 &isp1763_device,
5121#endif
5122
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005123#if defined (CONFIG_MSM_8x60_VOIP)
5124 &asoc_msm_mvs,
5125 &asoc_mvs_dai0,
5126 &asoc_mvs_dai1,
5127#endif
Lei Zhou338cab82011-08-19 13:38:17 -04005128
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005129#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_HCD)
5130 &msm_device_otg,
5131#endif
5132#ifdef CONFIG_USB_GADGET_MSM_72K
5133 &msm_device_gadget_peripheral,
5134#endif
5135#ifdef CONFIG_USB_G_ANDROID
5136 &android_usb_device,
5137#endif
5138#ifdef CONFIG_BATTERY_MSM
5139 &msm_batt_device,
5140#endif
5141#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005142#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005143 &android_pmem_device,
5144 &android_pmem_adsp_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005145 &android_pmem_smipool_device,
5146#endif
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005147 &android_pmem_audio_device,
5148#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005149#ifdef CONFIG_MSM_ROTATOR
5150 &msm_rotator_device,
5151#endif
5152 &msm_fb_device,
5153 &msm_kgsl_3d0,
5154 &msm_kgsl_2d0,
5155 &msm_kgsl_2d1,
5156 &lcdc_samsung_panel_device,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005157#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5158 &lcdc_nt35582_panel_device,
5159#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005160#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
5161 &lcdc_samsung_oled_panel_device,
5162#endif
5163#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
5164 &lcdc_auo_wvga_panel_device,
5165#endif
5166#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
5167 &hdmi_msm_device,
5168#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
5169#ifdef CONFIG_FB_MSM_MIPI_DSI
5170 &mipi_dsi_toshiba_panel_device,
5171 &mipi_dsi_novatek_panel_device,
5172#endif
5173#ifdef CONFIG_MSM_CAMERA
5174#ifdef CONFIG_MT9E013
5175 &msm_camera_sensor_mt9e013,
5176#endif
5177#ifdef CONFIG_IMX074
5178 &msm_camera_sensor_imx074,
5179#endif
5180#ifdef CONFIG_WEBCAM_OV7692
5181 &msm_camera_sensor_webcam_ov7692,
5182#endif
5183#ifdef CONFIG_WEBCAM_OV9726
5184 &msm_camera_sensor_webcam_ov9726,
5185#endif
5186#ifdef CONFIG_QS_S5K4E1
5187 &msm_camera_sensor_qs_s5k4e1,
5188#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04005189#ifdef CONFIG_VX6953
5190 &msm_camera_sensor_vx6953,
5191#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005192#endif
5193#ifdef CONFIG_MSM_GEMINI
5194 &msm_gemini_device,
5195#endif
5196#ifdef CONFIG_MSM_VPE
5197 &msm_vpe_device,
5198#endif
5199
5200#if defined(CONFIG_MSM_RPM_LOG) || defined(CONFIG_MSM_RPM_LOG_MODULE)
Praveen Chidambaram78499012011-11-01 17:15:17 -06005201 &msm8660_rpm_log_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005202#endif
5203#if defined(CONFIG_MSM_RPM_STATS_LOG)
Praveen Chidambaram78499012011-11-01 17:15:17 -06005204 &msm8660_rpm_stat_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005205#endif
5206 &msm_device_vidc,
5207#if (defined(CONFIG_MARIMBA_CORE)) && \
5208 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
5209 &msm_bt_power_device,
5210#endif
5211#ifdef CONFIG_SENSORS_MSM_ADC
5212 &msm_adc_device,
5213#endif
David Collins6f032ba2011-08-31 14:08:15 -07005214 &rpm_regulator_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005215
5216#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
5217 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
5218 &qcrypto_device,
5219#endif
5220
5221#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
5222 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
5223 &qcedev_device,
5224#endif
5225
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005226
5227#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
5228#ifdef CONFIG_MSM_USE_TSIF1
5229 &msm_device_tsif[1],
5230#else
5231 &msm_device_tsif[0],
5232#endif /* CONFIG_MSM_USE_TSIF1 */
5233#endif /* CONFIG_TSIF */
5234
5235#ifdef CONFIG_HW_RANDOM_MSM
5236 &msm_device_rng,
5237#endif
5238
5239 &msm_tsens_device,
Praveen Chidambaram78499012011-11-01 17:15:17 -06005240 &msm8660_rpm_device,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005241#ifdef CONFIG_ION_MSM
5242 &ion_dev,
5243#endif
Jeff Ohlstein7e668552011-10-06 16:17:25 -07005244 &msm8660_device_watchdog,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005245};
5246
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005247#ifdef CONFIG_ION_MSM
Olav Haugan0703dbf2011-12-19 17:53:38 -08005248#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
5249static struct ion_cp_heap_pdata cp_mm_ion_pdata = {
5250 .permission_type = IPT_TYPE_MM_CARVEOUT,
Olav Haugan42ebe712012-01-10 16:30:58 -08005251 .align = PAGE_SIZE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005252 .request_region = request_smi_region,
5253 .release_region = release_smi_region,
5254 .setup_region = setup_smi_region,
5255};
5256
5257static struct ion_cp_heap_pdata cp_mfc_ion_pdata = {
5258 .permission_type = IPT_TYPE_MFC_SHAREDMEM,
Olav Haugan42ebe712012-01-10 16:30:58 -08005259 .align = PAGE_SIZE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005260 .request_region = request_smi_region,
5261 .release_region = release_smi_region,
5262 .setup_region = setup_smi_region,
5263};
5264
5265static struct ion_cp_heap_pdata cp_wb_ion_pdata = {
5266 .permission_type = IPT_TYPE_MDP_WRITEBACK,
Olav Haugan42ebe712012-01-10 16:30:58 -08005267 .align = PAGE_SIZE,
5268};
5269
5270static struct ion_co_heap_pdata fw_co_ion_pdata = {
5271 .adjacent_mem_id = ION_CP_MM_HEAP_ID,
5272 .align = SZ_128K,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005273};
5274
5275static struct ion_co_heap_pdata co_ion_pdata = {
Olav Haugan42ebe712012-01-10 16:30:58 -08005276 .adjacent_mem_id = INVALID_HEAP_ID,
5277 .align = PAGE_SIZE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005278};
5279#endif
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08005280static struct ion_platform_data ion_pdata = {
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005281 .nr = MSM_ION_HEAP_NUM,
5282 .heaps = {
5283 {
Olav Hauganb5be7992011-11-18 14:29:02 -08005284 .id = ION_SYSTEM_HEAP_ID,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005285 .type = ION_HEAP_TYPE_SYSTEM,
5286 .name = ION_VMALLOC_HEAP_NAME,
5287 },
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005288#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
5289 {
Olav Hauganb5be7992011-11-18 14:29:02 -08005290 .id = ION_SF_HEAP_ID,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005291 .type = ION_HEAP_TYPE_CARVEOUT,
Olav Hauganb5be7992011-11-18 14:29:02 -08005292 .name = ION_SF_HEAP_NAME,
5293 .size = MSM_ION_SF_SIZE,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005294 .memory_type = ION_EBI_TYPE,
Olav Haugan42ebe712012-01-10 16:30:58 -08005295 .extra_data = (void *)&co_ion_pdata,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005296 },
5297 {
Olav Hauganb5be7992011-11-18 14:29:02 -08005298 .id = ION_CP_MM_HEAP_ID,
Olav Haugan0a852512012-01-09 10:20:55 -08005299 .type = ION_HEAP_TYPE_CP,
Olav Hauganb5be7992011-11-18 14:29:02 -08005300 .name = ION_MM_HEAP_NAME,
5301 .size = MSM_ION_MM_SIZE,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005302 .memory_type = ION_SMI_TYPE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005303 .extra_data = (void *) &cp_mm_ion_pdata,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005304 },
Olav Hauganb5be7992011-11-18 14:29:02 -08005305 {
Olav Haugan42ebe712012-01-10 16:30:58 -08005306 .id = ION_MM_FIRMWARE_HEAP_ID,
5307 .type = ION_HEAP_TYPE_CARVEOUT,
5308 .name = ION_MM_FIRMWARE_HEAP_NAME,
5309 .size = MSM_ION_MM_FW_SIZE,
5310 .memory_type = ION_SMI_TYPE,
5311 .extra_data = (void *) &fw_co_ion_pdata,
5312 },
5313 {
Olav Hauganb5be7992011-11-18 14:29:02 -08005314 .id = ION_CAMERA_HEAP_ID,
5315 .type = ION_HEAP_TYPE_CARVEOUT,
5316 .name = ION_CAMERA_HEAP_NAME,
5317 .size = MSM_ION_CAMERA_SIZE,
5318 .memory_type = ION_EBI_TYPE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005319 .extra_data = &co_ion_pdata,
Olav Hauganb5be7992011-11-18 14:29:02 -08005320 },
5321 {
5322 .id = ION_CP_MFC_HEAP_ID,
Olav Haugan0a852512012-01-09 10:20:55 -08005323 .type = ION_HEAP_TYPE_CP,
Olav Hauganb5be7992011-11-18 14:29:02 -08005324 .name = ION_MFC_HEAP_NAME,
5325 .size = MSM_ION_MFC_SIZE,
5326 .memory_type = ION_SMI_TYPE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005327 .extra_data = (void *) &cp_mfc_ion_pdata,
Olav Hauganb5be7992011-11-18 14:29:02 -08005328 },
5329 {
5330 .id = ION_CP_WB_HEAP_ID,
Olav Haugan0a852512012-01-09 10:20:55 -08005331 .type = ION_HEAP_TYPE_CP,
Olav Hauganb5be7992011-11-18 14:29:02 -08005332 .name = ION_WB_HEAP_NAME,
5333 .size = MSM_ION_WB_SIZE,
5334 .memory_type = ION_EBI_TYPE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005335 .extra_data = (void *) &cp_wb_ion_pdata,
Olav Hauganb5be7992011-11-18 14:29:02 -08005336 },
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005337#endif
5338 }
5339};
5340
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08005341static struct platform_device ion_dev = {
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005342 .name = "ion-msm",
5343 .id = 1,
5344 .dev = { .platform_data = &ion_pdata },
5345};
5346#endif
5347
5348
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005349static struct memtype_reserve msm8x60_reserve_table[] __initdata = {
5350 /* Kernel SMI memory pool for video core, used for firmware */
5351 /* and encoder, decoder scratch buffers */
5352 /* Kernel SMI memory pool should always precede the user space */
5353 /* SMI memory pool, as the video core will use offset address */
5354 /* from the Firmware base */
5355 [MEMTYPE_SMI_KERNEL] = {
5356 .start = KERNEL_SMI_BASE,
5357 .limit = KERNEL_SMI_SIZE,
5358 .size = KERNEL_SMI_SIZE,
5359 .flags = MEMTYPE_FLAGS_FIXED,
5360 },
5361 /* User space SMI memory pool for video core */
5362 /* used for encoder, decoder input & output buffers */
5363 [MEMTYPE_SMI] = {
5364 .start = USER_SMI_BASE,
5365 .limit = USER_SMI_SIZE,
5366 .flags = MEMTYPE_FLAGS_FIXED,
5367 },
5368 [MEMTYPE_EBI0] = {
5369 .flags = MEMTYPE_FLAGS_1M_ALIGN,
5370 },
5371 [MEMTYPE_EBI1] = {
5372 .flags = MEMTYPE_FLAGS_1M_ALIGN,
5373 },
5374};
5375
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005376static void reserve_ion_memory(void)
5377{
5378#if defined(CONFIG_ION_MSM) && defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
Olav Hauganb5be7992011-11-18 14:29:02 -08005379 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_SF_SIZE;
Olav Haugan42ebe712012-01-10 16:30:58 -08005380 msm8x60_reserve_table[MEMTYPE_SMI].size += MSM_ION_MM_FW_SIZE;
Olav Hauganb5be7992011-11-18 14:29:02 -08005381 msm8x60_reserve_table[MEMTYPE_SMI].size += MSM_ION_MM_SIZE;
5382 msm8x60_reserve_table[MEMTYPE_SMI].size += MSM_ION_MFC_SIZE;
5383 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_CAMERA_SIZE;
5384 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_WB_SIZE;
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005385#endif
5386}
5387
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005388static void __init size_pmem_devices(void)
5389{
5390#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005391#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005392 android_pmem_adsp_pdata.size = pmem_adsp_size;
5393 android_pmem_smipool_pdata.size = MSM_PMEM_SMIPOOL_SIZE;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005394 android_pmem_pdata.size = pmem_sf_size;
5395#endif
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005396 android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE;
5397#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005398}
5399
5400static void __init reserve_memory_for(struct android_pmem_platform_data *p)
5401{
5402 msm8x60_reserve_table[p->memory_type].size += p->size;
5403}
5404
5405static void __init reserve_pmem_memory(void)
5406{
5407#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005408#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005409 reserve_memory_for(&android_pmem_adsp_pdata);
5410 reserve_memory_for(&android_pmem_smipool_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005411 reserve_memory_for(&android_pmem_pdata);
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005412#endif
5413 reserve_memory_for(&android_pmem_audio_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005414 msm8x60_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
5415#endif
5416}
5417
Huaibin Yanga5419422011-12-08 23:52:10 -08005418static void __init reserve_mdp_memory(void);
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005419
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005420static void __init msm8x60_calculate_reserve_sizes(void)
5421{
5422 size_pmem_devices();
5423 reserve_pmem_memory();
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005424 reserve_ion_memory();
Huaibin Yanga5419422011-12-08 23:52:10 -08005425 reserve_mdp_memory();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005426}
5427
5428static int msm8x60_paddr_to_memtype(unsigned int paddr)
5429{
5430 if (paddr >= 0x40000000 && paddr < 0x60000000)
5431 return MEMTYPE_EBI1;
5432 if (paddr >= 0x38000000 && paddr < 0x40000000)
5433 return MEMTYPE_SMI;
5434 return MEMTYPE_NONE;
5435}
5436
5437static struct reserve_info msm8x60_reserve_info __initdata = {
5438 .memtype_reserve_table = msm8x60_reserve_table,
5439 .calculate_reserve_sizes = msm8x60_calculate_reserve_sizes,
5440 .paddr_to_memtype = msm8x60_paddr_to_memtype,
5441};
5442
5443static void __init msm8x60_reserve(void)
5444{
5445 reserve_info = &msm8x60_reserve_info;
5446 msm_reserve();
5447}
5448
5449#define EXT_CHG_VALID_MPP 10
5450#define EXT_CHG_VALID_MPP_2 11
5451
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305452static struct pm8xxx_mpp_init_info isl_mpp[] = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05305453 PM8058_MPP_INIT(EXT_CHG_VALID_MPP, D_INPUT,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305454 PM8058_MPP_DIG_LEVEL_S3, DIN_TO_INT),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05305455 PM8058_MPP_INIT(EXT_CHG_VALID_MPP_2, D_BI_DIR,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305456 PM8058_MPP_DIG_LEVEL_S3, BI_PULLUP_10KOHM),
5457};
5458
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005459#ifdef CONFIG_ISL9519_CHARGER
5460static int isl_detection_setup(void)
5461{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305462 int ret = 0, i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005463
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305464 for (i = 0; i < ARRAY_SIZE(isl_mpp); i++) {
5465 ret = pm8xxx_mpp_config(isl_mpp[i].mpp,
5466 &isl_mpp[i].config);
5467 if (ret) {
5468 pr_err("%s: Config MPP %d of PM8058 failed\n",
5469 __func__, isl_mpp[i].mpp);
5470 return ret;
5471 }
5472 }
5473
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005474 return ret;
5475}
5476
5477static struct isl_platform_data isl_data __initdata = {
5478 .chgcurrent = 700,
5479 .valid_n_gpio = PM8058_MPP_PM_TO_SYS(10),
5480 .chg_detection_config = isl_detection_setup,
5481 .max_system_voltage = 4200,
5482 .min_system_voltage = 3200,
5483 .term_current = 120,
5484 .input_current = 2048,
5485};
5486
5487static struct i2c_board_info isl_charger_i2c_info[] __initdata = {
5488 {
5489 I2C_BOARD_INFO("isl9519q", 0x9),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305490 .irq = PM8058_IRQ_BASE + PM8058_CBLPWR_IRQ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005491 .platform_data = &isl_data,
5492 },
5493};
5494#endif
5495
5496#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
5497static int smb137b_detection_setup(void)
5498{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305499 int ret = 0, i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005500
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305501 for (i = 0; i < ARRAY_SIZE(isl_mpp); i++) {
5502 ret = pm8xxx_mpp_config(isl_mpp[i].mpp,
5503 &isl_mpp[i].config);
5504 if (ret) {
5505 pr_err("%s: Config MPP %d of PM8058 failed\n",
5506 __func__, isl_mpp[i].mpp);
5507 return ret;
5508 }
5509 }
5510
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005511 return ret;
5512}
5513
5514static struct smb137b_platform_data smb137b_data __initdata = {
5515 .chg_detection_config = smb137b_detection_setup,
5516 .valid_n_gpio = PM8058_MPP_PM_TO_SYS(10),
5517 .batt_mah_rating = 950,
5518};
5519
5520static struct i2c_board_info smb137b_charger_i2c_info[] __initdata = {
5521 {
5522 I2C_BOARD_INFO("smb137b", 0x08),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305523 .irq = PM8058_IRQ_BASE + PM8058_CBLPWR_IRQ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005524 .platform_data = &smb137b_data,
5525 },
5526};
5527#endif
5528
5529#ifdef CONFIG_PMIC8058
5530#define PMIC_GPIO_SDC3_DET 22
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305531#define PMIC_GPIO_TOUCH_DISC_INTR 5
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005532
5533static int pm8058_gpios_init(void)
5534{
5535 int i;
5536 int rc;
5537 struct pm8058_gpio_cfg {
5538 int gpio;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305539 struct pm_gpio cfg;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005540 };
5541
5542 struct pm8058_gpio_cfg gpio_cfgs[] = {
5543 { /* FFA ethernet */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305544 PM8058_GPIO_PM_TO_SYS(6),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005545 {
5546 .direction = PM_GPIO_DIR_IN,
5547 .pull = PM_GPIO_PULL_DN,
5548 .vin_sel = 2,
5549 .function = PM_GPIO_FUNC_NORMAL,
5550 .inv_int_pol = 0,
5551 },
5552 },
5553#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
5554 {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305555 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005556 {
5557 .direction = PM_GPIO_DIR_IN,
5558 .pull = PM_GPIO_PULL_UP_30,
5559 .vin_sel = 2,
5560 .function = PM_GPIO_FUNC_NORMAL,
5561 .inv_int_pol = 0,
5562 },
5563 },
5564#endif
5565 { /* core&surf gpio expander */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305566 PM8058_GPIO_PM_TO_SYS(UI_INT1_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005567 {
5568 .direction = PM_GPIO_DIR_IN,
5569 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305570 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005571 .function = PM_GPIO_FUNC_NORMAL,
5572 .inv_int_pol = 0,
5573 },
5574 },
5575 { /* docking gpio expander */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305576 PM8058_GPIO_PM_TO_SYS(UI_INT2_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005577 {
5578 .direction = PM_GPIO_DIR_IN,
5579 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305580 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005581 .function = PM_GPIO_FUNC_NORMAL,
5582 .inv_int_pol = 0,
5583 },
5584 },
5585 { /* FHA/keypad gpio expanders */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305586 PM8058_GPIO_PM_TO_SYS(UI_INT3_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005587 {
5588 .direction = PM_GPIO_DIR_IN,
5589 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305590 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005591 .function = PM_GPIO_FUNC_NORMAL,
5592 .inv_int_pol = 0,
5593 },
5594 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005595 { /* Timpani Reset */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305596 PM8058_GPIO_PM_TO_SYS(20),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005597 {
5598 .direction = PM_GPIO_DIR_OUT,
5599 .output_value = 1,
5600 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5601 .pull = PM_GPIO_PULL_DN,
5602 .out_strength = PM_GPIO_STRENGTH_HIGH,
5603 .function = PM_GPIO_FUNC_NORMAL,
5604 .vin_sel = 2,
5605 .inv_int_pol = 0,
5606 }
5607 },
5608 { /* PMIC ID interrupt */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305609 PM8058_GPIO_PM_TO_SYS(36),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005610 {
5611 .direction = PM_GPIO_DIR_IN,
Anji jonnalaae745e92011-11-14 18:34:31 +05305612 .pull = PM_GPIO_PULL_NO,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005613 .function = PM_GPIO_FUNC_NORMAL,
5614 .vin_sel = 2,
5615 .inv_int_pol = 0,
5616 }
5617 },
5618 };
5619
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305620#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
5621 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305622 struct pm_gpio touchdisc_intr_gpio_cfg = {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305623 .direction = PM_GPIO_DIR_IN,
5624 .pull = PM_GPIO_PULL_UP_1P5,
5625 .vin_sel = 2,
5626 .function = PM_GPIO_FUNC_NORMAL,
5627 };
5628#endif
5629
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005630#if defined(CONFIG_HAPTIC_ISA1200) || \
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305631 defined(CONFIG_HAPTIC_ISA1200_MODULE)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305632 struct pm_gpio en_hap_gpio_cfg = {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305633 .direction = PM_GPIO_DIR_OUT,
5634 .pull = PM_GPIO_PULL_NO,
5635 .out_strength = PM_GPIO_STRENGTH_HIGH,
5636 .function = PM_GPIO_FUNC_NORMAL,
5637 .inv_int_pol = 0,
5638 .vin_sel = 2,
5639 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5640 .output_value = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005641 };
5642#endif
5643
5644#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
5645 struct pm8058_gpio_cfg line_in_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305646 PM8058_GPIO_PM_TO_SYS(18),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005647 {
5648 .direction = PM_GPIO_DIR_IN,
5649 .pull = PM_GPIO_PULL_UP_1P5,
5650 .vin_sel = 2,
5651 .function = PM_GPIO_FUNC_NORMAL,
5652 .inv_int_pol = 0,
5653 }
5654 };
5655#endif
5656
5657#if defined(CONFIG_QS_S5K4E1)
5658 {
5659 struct pm8058_gpio_cfg qs_hc37_cam_pd_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305660 PM8058_GPIO_PM_TO_SYS(26),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005661 {
5662 .direction = PM_GPIO_DIR_OUT,
5663 .output_value = 0,
5664 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5665 .pull = PM_GPIO_PULL_DN,
5666 .out_strength = PM_GPIO_STRENGTH_HIGH,
5667 .function = PM_GPIO_FUNC_NORMAL,
5668 .vin_sel = 2,
5669 .inv_int_pol = 0,
5670 }
5671 };
5672#endif
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005673#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5674 struct pm8058_gpio_cfg pmic_lcdc_nt35582_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305675 PM8058_GPIO_PM_TO_SYS(GPIO_NT35582_BL_EN_HW_PIN - 1),
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005676 {
5677 .direction = PM_GPIO_DIR_OUT,
5678 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5679 .output_value = 1,
5680 .pull = PM_GPIO_PULL_UP_30,
5681 /* 2.9V PM_GPIO_VIN_L2, which gives 2.6V */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305682 .vin_sel = PM8058_GPIO_VIN_L5,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005683 .out_strength = PM_GPIO_STRENGTH_HIGH,
5684 .function = PM_GPIO_FUNC_NORMAL,
5685 .inv_int_pol = 0,
5686 }
5687 };
5688#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005689#if defined(CONFIG_HAPTIC_ISA1200) || \
5690 defined(CONFIG_HAPTIC_ISA1200_MODULE)
5691 if (machine_is_msm8x60_fluid()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305692 rc = pm8xxx_gpio_config(
5693 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_ENABLE),
5694 &en_hap_gpio_cfg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005695 if (rc < 0) {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305696 pr_err("%s: pmic haptics gpio config failed\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005697 __func__);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305698 }
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305699 rc = pm8xxx_gpio_config(
5700 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_LDO_ENABLE),
5701 &en_hap_gpio_cfg);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305702 if (rc < 0) {
5703 pr_err("%s: pmic haptics ldo gpio config failed\n",
5704 __func__);
5705 }
5706
5707 }
5708#endif
5709
5710#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
5711 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
5712 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_surf() ||
5713 machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305714 rc = pm8xxx_gpio_config(
5715 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_TOUCH_DISC_INTR),
5716 &touchdisc_intr_gpio_cfg);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305717 if (rc < 0) {
5718 pr_err("%s: Touchdisc interrupt gpio config failed\n",
5719 __func__);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005720 }
5721 }
5722#endif
5723
5724#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
5725 /* Line_in only for 8660 ffa & surf */
5726 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_surf() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04005727 machine_is_msm8x60_fusion() || machine_is_msm8x60_dragon() ||
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005728 machine_is_msm8x60_fusn_ffa()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305729 rc = pm8xxx_gpio_config(line_in_gpio_cfg.gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005730 &line_in_gpio_cfg.cfg);
5731 if (rc < 0) {
5732 pr_err("%s pmic line_in gpio config failed\n",
5733 __func__);
5734 return rc;
5735 }
5736 }
5737#endif
5738
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005739#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5740 if (machine_is_msm8x60_dragon()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305741 rc = pm8xxx_gpio_config(pmic_lcdc_nt35582_gpio_cfg.gpio,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005742 &pmic_lcdc_nt35582_gpio_cfg.cfg);
5743 if (rc < 0) {
5744 pr_err("%s pmic gpio config failed\n", __func__);
5745 return rc;
5746 }
5747 }
5748#endif
5749
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005750#if defined(CONFIG_QS_S5K4E1)
5751 /* qs_cam_hc37_cam_pd only for 8660 fluid qs camera*/
5752 if (machine_is_msm8x60_fluid()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305753 rc = pm8xxx_gpio_config(qs_hc37_cam_pd_gpio_cfg.gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005754 &qs_hc37_cam_pd_gpio_cfg.cfg);
5755 if (rc < 0) {
5756 pr_err("%s pmic qs_hc37_cam_pd gpio config failed\n",
5757 __func__);
5758 return rc;
5759 }
5760 }
5761 }
5762#endif
5763
5764 for (i = 0; i < ARRAY_SIZE(gpio_cfgs); ++i) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305765 rc = pm8xxx_gpio_config(gpio_cfgs[i].gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005766 &gpio_cfgs[i].cfg);
5767 if (rc < 0) {
5768 pr_err("%s pmic gpio config failed\n",
5769 __func__);
5770 return rc;
5771 }
5772 }
5773
5774 return 0;
5775}
5776
5777static const unsigned int ffa_keymap[] = {
5778 KEY(0, 0, KEY_FN_F1), /* LS - PUSH1 */
5779 KEY(0, 1, KEY_UP), /* NAV - UP */
5780 KEY(0, 2, KEY_LEFT), /* NAV - LEFT */
5781 KEY(0, 3, KEY_VOLUMEUP), /* Shuttle SW_UP */
5782
5783 KEY(1, 0, KEY_FN_F2), /* LS - PUSH2 */
5784 KEY(1, 1, KEY_RIGHT), /* NAV - RIGHT */
5785 KEY(1, 2, KEY_DOWN), /* NAV - DOWN */
5786 KEY(1, 3, KEY_VOLUMEDOWN),
5787
5788 KEY(2, 3, KEY_ENTER), /* SW_PUSH key */
5789
5790 KEY(4, 0, KEY_CAMERA_FOCUS), /* RS - PUSH1 */
5791 KEY(4, 1, KEY_UP), /* USER_UP */
5792 KEY(4, 2, KEY_LEFT), /* USER_LEFT */
5793 KEY(4, 3, KEY_HOME), /* Right switch: MIC Bd */
5794 KEY(4, 4, KEY_FN_F3), /* Reserved MIC */
5795
5796 KEY(5, 0, KEY_CAMERA), /* RS - PUSH2 */
5797 KEY(5, 1, KEY_RIGHT), /* USER_RIGHT */
5798 KEY(5, 2, KEY_DOWN), /* USER_DOWN */
5799 KEY(5, 3, KEY_BACK), /* Left switch: MIC */
5800 KEY(5, 4, KEY_MENU), /* Center switch: MIC */
5801};
5802
Zhang Chang Ken683be172011-08-10 17:45:34 -04005803static const unsigned int dragon_keymap[] = {
5804 KEY(0, 0, KEY_MENU),
5805 KEY(0, 2, KEY_1),
5806 KEY(0, 3, KEY_4),
5807 KEY(0, 4, KEY_7),
5808
5809 KEY(1, 0, KEY_UP),
5810 KEY(1, 1, KEY_LEFT),
5811 KEY(1, 2, KEY_DOWN),
5812 KEY(1, 3, KEY_5),
5813 KEY(1, 4, KEY_8),
5814
5815 KEY(2, 0, KEY_HOME),
5816 KEY(2, 1, KEY_REPLY),
5817 KEY(2, 2, KEY_2),
5818 KEY(2, 3, KEY_6),
5819 KEY(2, 4, KEY_0),
5820
5821 KEY(3, 0, KEY_VOLUMEUP),
5822 KEY(3, 1, KEY_RIGHT),
5823 KEY(3, 2, KEY_3),
5824 KEY(3, 3, KEY_9),
5825 KEY(3, 4, KEY_SWITCHVIDEOMODE),
5826
5827 KEY(4, 0, KEY_VOLUMEDOWN),
5828 KEY(4, 1, KEY_BACK),
5829 KEY(4, 2, KEY_CAMERA),
5830 KEY(4, 3, KEY_KBDILLUMTOGGLE),
5831};
5832
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005833static struct matrix_keymap_data ffa_keymap_data = {
5834 .keymap_size = ARRAY_SIZE(ffa_keymap),
5835 .keymap = ffa_keymap,
5836};
5837
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305838static struct pm8xxx_keypad_platform_data ffa_keypad_data = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005839 .input_name = "ffa-keypad",
5840 .input_phys_device = "ffa-keypad/input0",
5841 .num_rows = 6,
5842 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305843 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5844 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5845 .debounce_ms = 15,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005846 .scan_delay_ms = 32,
5847 .row_hold_ns = 91500,
5848 .wakeup = 1,
5849 .keymap_data = &ffa_keymap_data,
5850};
5851
Zhang Chang Ken683be172011-08-10 17:45:34 -04005852static struct matrix_keymap_data dragon_keymap_data = {
5853 .keymap_size = ARRAY_SIZE(dragon_keymap),
5854 .keymap = dragon_keymap,
5855};
5856
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305857static struct pm8xxx_keypad_platform_data dragon_keypad_data = {
Zhang Chang Ken683be172011-08-10 17:45:34 -04005858 .input_name = "dragon-keypad",
5859 .input_phys_device = "dragon-keypad/input0",
5860 .num_rows = 6,
5861 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305862 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5863 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5864 .debounce_ms = 15,
Zhang Chang Ken683be172011-08-10 17:45:34 -04005865 .scan_delay_ms = 32,
5866 .row_hold_ns = 91500,
5867 .wakeup = 1,
5868 .keymap_data = &dragon_keymap_data,
5869};
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305870
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005871static const unsigned int fluid_keymap[] = {
5872 KEY(0, 0, KEY_FN_F1), /* LS - PUSH1 */
5873 KEY(0, 1, KEY_UP), /* NAV - UP */
5874 KEY(0, 2, KEY_LEFT), /* NAV - LEFT */
5875 KEY(0, 3, KEY_VOLUMEDOWN), /* Shuttle SW_UP */
5876
5877 KEY(1, 0, KEY_FN_F2), /* LS - PUSH2 */
5878 KEY(1, 1, KEY_RIGHT), /* NAV - RIGHT */
5879 KEY(1, 2, KEY_DOWN), /* NAV - DOWN */
5880 KEY(1, 3, KEY_VOLUMEUP),
5881
5882 KEY(2, 3, KEY_ENTER), /* SW_PUSH key */
5883
5884 KEY(4, 0, KEY_CAMERA_FOCUS), /* RS - PUSH1 */
5885 KEY(4, 1, KEY_UP), /* USER_UP */
5886 KEY(4, 2, KEY_LEFT), /* USER_LEFT */
5887 KEY(4, 3, KEY_HOME), /* Right switch: MIC Bd */
5888 KEY(4, 4, KEY_FN_F3), /* Reserved MIC */
5889
Jilai Wang9a895102011-07-12 14:00:35 -04005890 KEY(5, 0, KEY_CAMERA), /* RS - PUSH2 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005891 KEY(5, 1, KEY_RIGHT), /* USER_RIGHT */
5892 KEY(5, 2, KEY_DOWN), /* USER_DOWN */
5893 KEY(5, 3, KEY_BACK), /* Left switch: MIC */
5894 KEY(5, 4, KEY_MENU), /* Center switch: MIC */
5895};
5896
5897static struct matrix_keymap_data fluid_keymap_data = {
5898 .keymap_size = ARRAY_SIZE(fluid_keymap),
5899 .keymap = fluid_keymap,
5900};
5901
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305902static struct pm8xxx_keypad_platform_data fluid_keypad_data = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005903 .input_name = "fluid-keypad",
5904 .input_phys_device = "fluid-keypad/input0",
5905 .num_rows = 6,
5906 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305907 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5908 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5909 .debounce_ms = 15,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005910 .scan_delay_ms = 32,
5911 .row_hold_ns = 91500,
5912 .wakeup = 1,
5913 .keymap_data = &fluid_keymap_data,
5914};
5915
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305916static struct pm8xxx_vibrator_platform_data pm8058_vib_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005917 .initial_vibrate_ms = 500,
5918 .level_mV = 3000,
5919 .max_timeout_ms = 15000,
5920};
5921
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305922static struct pm8xxx_rtc_platform_data pm8058_rtc_pdata = {
5923 .rtc_write_enable = false,
5924 .rtc_alarm_powerup = false,
5925};
5926
5927static struct pm8xxx_pwrkey_platform_data pm8058_pwrkey_pdata = {
5928 .pull_up = 1,
Jing Lineecdc062011-11-17 09:47:09 -08005929 .kpd_trigger_delay_us = 15625,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305930 .wakeup = 1,
5931};
5932
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005933#define PM8058_LINE_IN_DET_GPIO PM8058_GPIO_PM_TO_SYS(18)
5934
5935static struct othc_accessory_info othc_accessories[] = {
5936 {
5937 .accessory = OTHC_SVIDEO_OUT,
5938 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_SWITCH_DETECT
5939 | OTHC_ADC_DETECT,
5940 .key_code = SW_VIDEOOUT_INSERT,
5941 .enabled = false,
5942 .adc_thres = {
5943 .min_threshold = 20,
5944 .max_threshold = 40,
5945 },
5946 },
5947 {
5948 .accessory = OTHC_ANC_HEADPHONE,
5949 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_GPIO_DETECT |
5950 OTHC_SWITCH_DETECT,
5951 .gpio = PM8058_LINE_IN_DET_GPIO,
5952 .active_low = 1,
5953 .key_code = SW_HEADPHONE_INSERT,
5954 .enabled = true,
5955 },
5956 {
5957 .accessory = OTHC_ANC_HEADSET,
5958 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_GPIO_DETECT,
5959 .gpio = PM8058_LINE_IN_DET_GPIO,
5960 .active_low = 1,
5961 .key_code = SW_HEADPHONE_INSERT,
5962 .enabled = true,
5963 },
5964 {
5965 .accessory = OTHC_HEADPHONE,
5966 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_SWITCH_DETECT,
5967 .key_code = SW_HEADPHONE_INSERT,
5968 .enabled = true,
5969 },
5970 {
5971 .accessory = OTHC_MICROPHONE,
5972 .detect_flags = OTHC_GPIO_DETECT,
5973 .gpio = PM8058_LINE_IN_DET_GPIO,
5974 .active_low = 1,
5975 .key_code = SW_MICROPHONE_INSERT,
5976 .enabled = true,
5977 },
5978 {
5979 .accessory = OTHC_HEADSET,
5980 .detect_flags = OTHC_MICBIAS_DETECT,
5981 .key_code = SW_HEADPHONE_INSERT,
5982 .enabled = true,
5983 },
5984};
5985
5986static struct othc_switch_info switch_info[] = {
5987 {
5988 .min_adc_threshold = 0,
5989 .max_adc_threshold = 100,
5990 .key_code = KEY_PLAYPAUSE,
5991 },
5992 {
5993 .min_adc_threshold = 100,
5994 .max_adc_threshold = 200,
5995 .key_code = KEY_REWIND,
5996 },
5997 {
5998 .min_adc_threshold = 200,
5999 .max_adc_threshold = 500,
6000 .key_code = KEY_FASTFORWARD,
6001 },
6002};
6003
6004static struct othc_n_switch_config switch_config = {
6005 .voltage_settling_time_ms = 0,
6006 .num_adc_samples = 3,
6007 .adc_channel = CHANNEL_ADC_HDSET,
6008 .switch_info = switch_info,
6009 .num_keys = ARRAY_SIZE(switch_info),
6010 .default_sw_en = true,
6011 .default_sw_idx = 0,
6012};
6013
6014static struct hsed_bias_config hsed_bias_config = {
6015 /* HSED mic bias config info */
6016 .othc_headset = OTHC_HEADSET_NO,
6017 .othc_lowcurr_thresh_uA = 100,
6018 .othc_highcurr_thresh_uA = 600,
6019 .othc_hyst_prediv_us = 7800,
6020 .othc_period_clkdiv_us = 62500,
6021 .othc_hyst_clk_us = 121000,
6022 .othc_period_clk_us = 312500,
6023 .othc_wakeup = 1,
6024};
6025
6026static struct othc_hsed_config hsed_config_1 = {
6027 .hsed_bias_config = &hsed_bias_config,
6028 /*
6029 * The detection delay and switch reporting delay are
6030 * required to encounter a hardware bug (spurious switch
6031 * interrupts on slow insertion/removal of the headset).
6032 * This will introduce a delay in reporting the accessory
6033 * insertion and removal to the userspace.
6034 */
6035 .detection_delay_ms = 1500,
6036 /* Switch info */
6037 .switch_debounce_ms = 1500,
6038 .othc_support_n_switch = false,
6039 .switch_config = &switch_config,
6040 .ir_gpio = -1,
6041 /* Accessory info */
6042 .accessories_support = true,
6043 .accessories = othc_accessories,
6044 .othc_num_accessories = ARRAY_SIZE(othc_accessories),
6045};
6046
6047static struct othc_regulator_config othc_reg = {
6048 .regulator = "8058_l5",
6049 .max_uV = 2850000,
6050 .min_uV = 2850000,
6051};
6052
6053/* MIC_BIAS0 is configured as normal MIC BIAS */
6054static struct pmic8058_othc_config_pdata othc_config_pdata_0 = {
6055 .micbias_select = OTHC_MICBIAS_0,
6056 .micbias_capability = OTHC_MICBIAS,
6057 .micbias_enable = OTHC_SIGNAL_OFF,
6058 .micbias_regulator = &othc_reg,
6059};
6060
6061/* MIC_BIAS1 is configured as HSED_BIAS for OTHC */
6062static struct pmic8058_othc_config_pdata othc_config_pdata_1 = {
6063 .micbias_select = OTHC_MICBIAS_1,
6064 .micbias_capability = OTHC_MICBIAS_HSED,
6065 .micbias_enable = OTHC_SIGNAL_PWM_TCXO,
6066 .micbias_regulator = &othc_reg,
6067 .hsed_config = &hsed_config_1,
6068 .hsed_name = "8660_handset",
6069};
6070
6071/* MIC_BIAS2 is configured as normal MIC BIAS */
6072static struct pmic8058_othc_config_pdata othc_config_pdata_2 = {
6073 .micbias_select = OTHC_MICBIAS_2,
6074 .micbias_capability = OTHC_MICBIAS,
6075 .micbias_enable = OTHC_SIGNAL_OFF,
6076 .micbias_regulator = &othc_reg,
6077};
6078
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006079
6080static void __init msm8x60_init_pm8058_othc(void)
6081{
6082 int i;
6083
6084 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2 ||
6085 machine_is_msm8x60_fluid() || machine_is_msm8x60_fusion() ||
6086 machine_is_msm8x60_fusn_ffa()) {
6087 /* 3-switch headset supported only by V2 FFA and FLUID */
6088 hsed_config_1.accessories_adc_support = true,
6089 /* ADC based accessory detection works only on V2 and FLUID */
6090 hsed_config_1.accessories_adc_channel = CHANNEL_ADC_HDSET,
6091 hsed_config_1.othc_support_n_switch = true;
6092 }
6093
6094 /* IR GPIO is absent on FLUID */
6095 if (machine_is_msm8x60_fluid())
6096 hsed_config_1.ir_gpio = -1;
6097
6098 for (i = 0; i < ARRAY_SIZE(othc_accessories); i++) {
6099 if (machine_is_msm8x60_fluid()) {
6100 switch (othc_accessories[i].accessory) {
6101 case OTHC_ANC_HEADPHONE:
6102 case OTHC_ANC_HEADSET:
6103 othc_accessories[i].gpio = GPIO_HEADSET_DET_N;
6104 break;
6105 case OTHC_MICROPHONE:
6106 othc_accessories[i].enabled = false;
6107 break;
6108 case OTHC_SVIDEO_OUT:
6109 othc_accessories[i].enabled = true;
6110 hsed_config_1.video_out_gpio = GPIO_HS_SW_DIR;
6111 break;
6112 }
6113 }
6114 }
6115}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006116
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006117
6118static int pm8058_pwm_config(struct pwm_device *pwm, int ch, int on)
6119{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306120 struct pm_gpio pwm_gpio_config = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006121 .direction = PM_GPIO_DIR_OUT,
6122 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
6123 .output_value = 0,
6124 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306125 .vin_sel = PM8058_GPIO_VIN_VPH,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006126 .out_strength = PM_GPIO_STRENGTH_HIGH,
6127 .function = PM_GPIO_FUNC_2,
6128 };
6129
6130 int rc = -EINVAL;
6131 int id, mode, max_mA;
6132
6133 id = mode = max_mA = 0;
6134 switch (ch) {
6135 case 0:
6136 case 1:
6137 case 2:
6138 if (on) {
6139 id = 24 + ch;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306140 rc = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(id - 1),
6141 &pwm_gpio_config);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006142 if (rc)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306143 pr_err("%s: pm8xxx_gpio_config(%d): rc=%d\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006144 __func__, id, rc);
6145 }
6146 break;
6147
6148 case 6:
6149 id = PM_PWM_LED_FLASH;
6150 mode = PM_PWM_CONF_PWM1;
6151 max_mA = 300;
6152 break;
6153
6154 case 7:
6155 id = PM_PWM_LED_FLASH1;
6156 mode = PM_PWM_CONF_PWM1;
6157 max_mA = 300;
6158 break;
6159
6160 default:
6161 break;
6162 }
6163
6164 if (ch >= 6 && ch <= 7) {
6165 if (!on) {
6166 mode = PM_PWM_CONF_NONE;
6167 max_mA = 0;
6168 }
6169 rc = pm8058_pwm_config_led(pwm, id, mode, max_mA);
6170 if (rc)
6171 pr_err("%s: pm8058_pwm_config_led(ch=%d): rc=%d\n",
6172 __func__, ch, rc);
6173 }
6174 return rc;
6175
6176}
6177
6178static struct pm8058_pwm_pdata pm8058_pwm_data = {
6179 .config = pm8058_pwm_config,
6180};
6181
6182#define PM8058_GPIO_INT 88
6183
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006184static struct pmic8058_led pmic8058_flash_leds[] = {
6185 [0] = {
6186 .name = "camera:flash0",
6187 .max_brightness = 15,
6188 .id = PMIC8058_ID_FLASH_LED_0,
6189 },
6190 [1] = {
6191 .name = "camera:flash1",
6192 .max_brightness = 15,
6193 .id = PMIC8058_ID_FLASH_LED_1,
6194 },
6195};
6196
6197static struct pmic8058_leds_platform_data pm8058_flash_leds_data = {
6198 .num_leds = ARRAY_SIZE(pmic8058_flash_leds),
6199 .leds = pmic8058_flash_leds,
6200};
6201
Terence Hampsonc0b6dfb2011-07-15 11:07:17 -04006202static struct pmic8058_led pmic8058_dragon_leds[] = {
6203 [0] = {
6204 /* RED */
6205 .name = "led_drv0",
6206 .max_brightness = 15,
6207 .id = PMIC8058_ID_LED_0,
6208 },/* 300 mA flash led0 drv sink */
6209 [1] = {
6210 /* Yellow */
6211 .name = "led_drv1",
6212 .max_brightness = 15,
6213 .id = PMIC8058_ID_LED_1,
6214 },/* 300 mA flash led0 drv sink */
6215 [2] = {
6216 /* Green */
6217 .name = "led_drv2",
6218 .max_brightness = 15,
6219 .id = PMIC8058_ID_LED_2,
6220 },/* 300 mA flash led0 drv sink */
6221 [3] = {
6222 .name = "led_psensor",
6223 .max_brightness = 15,
6224 .id = PMIC8058_ID_LED_KB_LIGHT,
6225 },/* 300 mA flash led0 drv sink */
6226};
6227
6228static struct pmic8058_leds_platform_data pm8058_dragon_leds_data = {
6229 .num_leds = ARRAY_SIZE(pmic8058_dragon_leds),
6230 .leds = pmic8058_dragon_leds,
6231};
6232
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006233static struct pmic8058_led pmic8058_fluid_flash_leds[] = {
6234 [0] = {
6235 .name = "led:drv0",
6236 .max_brightness = 15,
6237 .id = PMIC8058_ID_FLASH_LED_0,
6238 },/* 300 mA flash led0 drv sink */
6239 [1] = {
6240 .name = "led:drv1",
6241 .max_brightness = 15,
6242 .id = PMIC8058_ID_FLASH_LED_1,
6243 },/* 300 mA flash led1 sink */
6244 [2] = {
6245 .name = "led:drv2",
6246 .max_brightness = 20,
6247 .id = PMIC8058_ID_LED_0,
6248 },/* 40 mA led0 sink */
6249 [3] = {
6250 .name = "keypad:drv",
6251 .max_brightness = 15,
6252 .id = PMIC8058_ID_LED_KB_LIGHT,
6253 },/* 300 mA keypad drv sink */
6254};
6255
6256static struct pmic8058_leds_platform_data pm8058_fluid_flash_leds_data = {
6257 .num_leds = ARRAY_SIZE(pmic8058_fluid_flash_leds),
6258 .leds = pmic8058_fluid_flash_leds,
6259};
6260
Terence Hampson90508a92011-08-09 10:40:08 -04006261static struct pmic8058_charger_data pmic8058_charger_dragon = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306262 .charger_data_valid = true,
Terence Hampson90508a92011-08-09 10:40:08 -04006263 .max_source_current = 1800,
6264 .charger_type = CHG_TYPE_AC,
6265};
6266
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306267static struct pmic8058_charger_data pmic8058_charger_ffa_surf = {
6268 .charger_data_valid = false,
6269};
6270
6271static struct pm8xxx_misc_platform_data pm8058_misc_pdata = {
6272 .priority = 0,
6273};
6274
6275static struct pm8xxx_irq_platform_data pm8058_irq_pdata = {
6276 .irq_base = PM8058_IRQ_BASE,
6277 .devirq = MSM_GPIO_TO_INT(PM8058_GPIO_INT),
6278 .irq_trigger_flag = IRQF_TRIGGER_LOW,
6279};
6280
6281static struct pm8xxx_gpio_platform_data pm8058_gpio_pdata = {
6282 .gpio_base = PM8058_GPIO_PM_TO_SYS(0),
6283};
6284
6285static struct pm8xxx_mpp_platform_data pm8058_mpp_pdata = {
6286 .mpp_base = PM8058_MPP_PM_TO_SYS(0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006287};
6288
6289static struct pm8058_platform_data pm8058_platform_data = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306290 .irq_pdata = &pm8058_irq_pdata,
6291 .gpio_pdata = &pm8058_gpio_pdata,
6292 .mpp_pdata = &pm8058_mpp_pdata,
6293 .rtc_pdata = &pm8058_rtc_pdata,
6294 .pwrkey_pdata = &pm8058_pwrkey_pdata,
6295 .othc0_pdata = &othc_config_pdata_0,
6296 .othc1_pdata = &othc_config_pdata_1,
6297 .othc2_pdata = &othc_config_pdata_2,
6298 .pwm_pdata = &pm8058_pwm_data,
6299 .misc_pdata = &pm8058_misc_pdata,
6300#ifdef CONFIG_SENSORS_MSM_ADC
6301 .xoadc_pdata = &pm8058_xoadc_pdata,
6302#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006303};
6304
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05306305#ifdef CONFIG_MSM_SSBI
6306static struct msm_ssbi_platform_data msm8x60_ssbi_pm8058_pdata __devinitdata = {
6307 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
6308 .slave = {
6309 .name = "pm8058-core",
6310 .platform_data = &pm8058_platform_data,
6311 },
6312};
6313#endif
6314#endif /* CONFIG_PMIC8058 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006315
6316#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
6317 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
6318#define TDISC_I2C_SLAVE_ADDR 0x67
6319#define PMIC_GPIO_TDISC PM8058_GPIO_PM_TO_SYS(5)
6320#define TDISC_INT PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 5)
6321
6322static const char *vregs_tdisc_name[] = {
6323 "8058_l5",
6324 "8058_s3",
6325};
6326
6327static const int vregs_tdisc_val[] = {
6328 2850000,/* uV */
6329 1800000,
6330};
6331static struct regulator *vregs_tdisc[ARRAY_SIZE(vregs_tdisc_name)];
6332
6333static int tdisc_shinetsu_setup(void)
6334{
6335 int rc, i;
6336
6337 rc = gpio_request(PMIC_GPIO_TDISC, "tdisc_interrupt");
6338 if (rc) {
6339 pr_err("%s: gpio_request failed for PMIC_GPIO_TDISC\n",
6340 __func__);
6341 return rc;
6342 }
6343
6344 rc = gpio_request(GPIO_JOYSTICK_EN, "tdisc_oe");
6345 if (rc) {
6346 pr_err("%s: gpio_request failed for GPIO_JOYSTICK_EN\n",
6347 __func__);
6348 goto fail_gpio_oe;
6349 }
6350
6351 rc = gpio_direction_output(GPIO_JOYSTICK_EN, 1);
6352 if (rc) {
6353 pr_err("%s: gpio_direction_output failed for GPIO_JOYSTICK_EN\n",
6354 __func__);
6355 gpio_free(GPIO_JOYSTICK_EN);
6356 goto fail_gpio_oe;
6357 }
6358
6359 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6360 vregs_tdisc[i] = regulator_get(NULL, vregs_tdisc_name[i]);
6361 if (IS_ERR(vregs_tdisc[i])) {
6362 printk(KERN_ERR "%s: regulator get %s failed (%ld)\n",
6363 __func__, vregs_tdisc_name[i],
6364 PTR_ERR(vregs_tdisc[i]));
6365 rc = PTR_ERR(vregs_tdisc[i]);
6366 goto vreg_get_fail;
6367 }
6368
6369 rc = regulator_set_voltage(vregs_tdisc[i],
6370 vregs_tdisc_val[i], vregs_tdisc_val[i]);
6371 if (rc) {
6372 printk(KERN_ERR "%s: regulator_set_voltage() = %d\n",
6373 __func__, rc);
6374 goto vreg_set_voltage_fail;
6375 }
6376 }
6377
6378 return rc;
6379vreg_set_voltage_fail:
6380 i++;
6381vreg_get_fail:
6382 while (i)
6383 regulator_put(vregs_tdisc[--i]);
6384fail_gpio_oe:
6385 gpio_free(PMIC_GPIO_TDISC);
6386 return rc;
6387}
6388
6389static void tdisc_shinetsu_release(void)
6390{
6391 int i;
6392
6393 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++)
6394 regulator_put(vregs_tdisc[i]);
6395
6396 gpio_free(PMIC_GPIO_TDISC);
6397 gpio_free(GPIO_JOYSTICK_EN);
6398}
6399
6400static int tdisc_shinetsu_enable(void)
6401{
6402 int i, rc = -EINVAL;
6403
6404 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6405 rc = regulator_enable(vregs_tdisc[i]);
6406 if (rc < 0) {
6407 printk(KERN_ERR "%s: vreg %s enable failed (%d)\n",
6408 __func__, vregs_tdisc_name[i], rc);
6409 goto vreg_fail;
6410 }
6411 }
6412
6413 /* Enable the OE (output enable) gpio */
6414 gpio_set_value_cansleep(GPIO_JOYSTICK_EN, 1);
6415 /* voltage and gpio stabilization delay */
6416 msleep(50);
6417
6418 return 0;
6419vreg_fail:
6420 while (i)
6421 regulator_disable(vregs_tdisc[--i]);
6422 return rc;
6423}
6424
6425static int tdisc_shinetsu_disable(void)
6426{
6427 int i, rc;
6428
6429 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6430 rc = regulator_disable(vregs_tdisc[i]);
6431 if (rc < 0) {
6432 printk(KERN_ERR "%s: vreg %s disable failed (%d)\n",
6433 __func__, vregs_tdisc_name[i], rc);
6434 goto tdisc_reg_fail;
6435 }
6436 }
6437
6438 /* Disable the OE (output enable) gpio */
6439 gpio_set_value_cansleep(GPIO_JOYSTICK_EN, 0);
6440
6441 return 0;
6442
6443tdisc_reg_fail:
6444 while (i)
6445 regulator_enable(vregs_tdisc[--i]);
6446 return rc;
6447}
6448
6449static struct tdisc_abs_values tdisc_abs = {
6450 .x_max = 32,
6451 .y_max = 32,
6452 .x_min = -32,
6453 .y_min = -32,
6454 .pressure_max = 32,
6455 .pressure_min = 0,
6456};
6457
6458static struct tdisc_platform_data tdisc_data = {
6459 .tdisc_setup = tdisc_shinetsu_setup,
6460 .tdisc_release = tdisc_shinetsu_release,
6461 .tdisc_enable = tdisc_shinetsu_enable,
6462 .tdisc_disable = tdisc_shinetsu_disable,
6463 .tdisc_wakeup = 0,
6464 .tdisc_gpio = PMIC_GPIO_TDISC,
6465 .tdisc_report_keys = true,
6466 .tdisc_report_relative = true,
6467 .tdisc_report_absolute = false,
6468 .tdisc_report_wheel = false,
6469 .tdisc_reverse_x = false,
6470 .tdisc_reverse_y = true,
6471 .tdisc_abs = &tdisc_abs,
6472};
6473
6474static struct i2c_board_info msm_i2c_gsbi3_tdisc_info[] = {
6475 {
6476 I2C_BOARD_INFO("vtd518", TDISC_I2C_SLAVE_ADDR),
6477 .irq = TDISC_INT,
6478 .platform_data = &tdisc_data,
6479 },
6480};
6481#endif
6482
6483#define PM_GPIO_CDC_RST_N 20
6484#define GPIO_CDC_RST_N PM8058_GPIO_PM_TO_SYS(PM_GPIO_CDC_RST_N)
6485
6486static struct regulator *vreg_timpani_1;
6487static struct regulator *vreg_timpani_2;
6488
6489static unsigned int msm_timpani_setup_power(void)
6490{
6491 int rc;
6492
6493 vreg_timpani_1 = regulator_get(NULL, "8058_l0");
6494 if (IS_ERR(vreg_timpani_1)) {
6495 pr_err("%s: Unable to get 8058_l0\n", __func__);
6496 return -ENODEV;
6497 }
6498
6499 vreg_timpani_2 = regulator_get(NULL, "8058_s3");
6500 if (IS_ERR(vreg_timpani_2)) {
6501 pr_err("%s: Unable to get 8058_s3\n", __func__);
6502 regulator_put(vreg_timpani_1);
6503 return -ENODEV;
6504 }
6505
6506 rc = regulator_set_voltage(vreg_timpani_1, 1200000, 1200000);
6507 if (rc) {
6508 pr_err("%s: unable to set L0 voltage to 1.2V\n", __func__);
6509 goto fail;
6510 }
6511
6512 rc = regulator_set_voltage(vreg_timpani_2, 1800000, 1800000);
6513 if (rc) {
6514 pr_err("%s: unable to set S3 voltage to 1.8V\n", __func__);
6515 goto fail;
6516 }
6517
6518 rc = regulator_enable(vreg_timpani_1);
6519 if (rc) {
6520 pr_err("%s: Enable regulator 8058_l0 failed\n", __func__);
6521 goto fail;
6522 }
6523
6524 /* The settings for LDO0 should be set such that
6525 * it doesn't require to reset the timpani. */
6526 rc = regulator_set_optimum_mode(vreg_timpani_1, 5000);
6527 if (rc < 0) {
6528 pr_err("Timpani regulator optimum mode setting failed\n");
6529 goto fail;
6530 }
6531
6532 rc = regulator_enable(vreg_timpani_2);
6533 if (rc) {
6534 pr_err("%s: Enable regulator 8058_s3 failed\n", __func__);
6535 regulator_disable(vreg_timpani_1);
6536 goto fail;
6537 }
6538
6539 rc = gpio_request(GPIO_CDC_RST_N, "CDC_RST_N");
6540 if (rc) {
6541 pr_err("%s: GPIO Request %d failed\n", __func__,
6542 GPIO_CDC_RST_N);
6543 regulator_disable(vreg_timpani_1);
6544 regulator_disable(vreg_timpani_2);
6545 goto fail;
6546 } else {
6547 gpio_direction_output(GPIO_CDC_RST_N, 1);
6548 usleep_range(1000, 1050);
6549 gpio_direction_output(GPIO_CDC_RST_N, 0);
6550 usleep_range(1000, 1050);
6551 gpio_direction_output(GPIO_CDC_RST_N, 1);
6552 gpio_free(GPIO_CDC_RST_N);
6553 }
6554 return rc;
6555
6556fail:
6557 regulator_put(vreg_timpani_1);
6558 regulator_put(vreg_timpani_2);
6559 return rc;
6560}
6561
6562static void msm_timpani_shutdown_power(void)
6563{
6564 int rc;
6565
6566 rc = regulator_disable(vreg_timpani_1);
6567 if (rc)
6568 pr_err("%s: Disable regulator 8058_l0 failed\n", __func__);
6569
6570 regulator_put(vreg_timpani_1);
6571
6572 rc = regulator_disable(vreg_timpani_2);
6573 if (rc)
6574 pr_err("%s: Disable regulator 8058_s3 failed\n", __func__);
6575
6576 regulator_put(vreg_timpani_2);
6577}
6578
6579/* Power analog function of codec */
6580static struct regulator *vreg_timpani_cdc_apwr;
6581static int msm_timpani_codec_power(int vreg_on)
6582{
6583 int rc = 0;
6584
6585 if (!vreg_timpani_cdc_apwr) {
6586
6587 vreg_timpani_cdc_apwr = regulator_get(NULL, "8058_s4");
6588
6589 if (IS_ERR(vreg_timpani_cdc_apwr)) {
6590 pr_err("%s: vreg_get failed (%ld)\n",
6591 __func__, PTR_ERR(vreg_timpani_cdc_apwr));
6592 rc = PTR_ERR(vreg_timpani_cdc_apwr);
6593 return rc;
6594 }
6595 }
6596
6597 if (vreg_on) {
6598
6599 rc = regulator_set_voltage(vreg_timpani_cdc_apwr,
6600 2200000, 2200000);
6601 if (rc) {
6602 pr_err("%s: unable to set 8058_s4 voltage to 2.2 V\n",
6603 __func__);
6604 goto vreg_fail;
6605 }
6606
6607 rc = regulator_enable(vreg_timpani_cdc_apwr);
6608 if (rc) {
6609 pr_err("%s: vreg_enable failed %d\n", __func__, rc);
6610 goto vreg_fail;
6611 }
6612 } else {
6613 rc = regulator_disable(vreg_timpani_cdc_apwr);
6614 if (rc) {
6615 pr_err("%s: vreg_disable failed %d\n",
6616 __func__, rc);
6617 goto vreg_fail;
6618 }
6619 }
6620
6621 return 0;
6622
6623vreg_fail:
6624 regulator_put(vreg_timpani_cdc_apwr);
6625 vreg_timpani_cdc_apwr = NULL;
6626 return rc;
6627}
6628
6629static struct marimba_codec_platform_data timpani_codec_pdata = {
6630 .marimba_codec_power = msm_timpani_codec_power,
6631};
6632
6633#define TIMPANI_SLAVE_ID_CDC_ADDR 0X77
6634#define TIMPANI_SLAVE_ID_QMEMBIST_ADDR 0X66
6635
6636static struct marimba_platform_data timpani_pdata = {
6637 .slave_id[MARIMBA_SLAVE_ID_CDC] = TIMPANI_SLAVE_ID_CDC_ADDR,
6638 .slave_id[MARIMBA_SLAVE_ID_QMEMBIST] = TIMPANI_SLAVE_ID_QMEMBIST_ADDR,
6639 .marimba_setup = msm_timpani_setup_power,
6640 .marimba_shutdown = msm_timpani_shutdown_power,
6641 .codec = &timpani_codec_pdata,
6642 .tsadc_ssbi_adap = MARIMBA_SSBI_ADAP,
6643};
6644
6645#define TIMPANI_I2C_SLAVE_ADDR 0xD
6646
6647static struct i2c_board_info msm_i2c_gsbi7_timpani_info[] = {
6648 {
6649 I2C_BOARD_INFO("timpani", TIMPANI_I2C_SLAVE_ADDR),
6650 .platform_data = &timpani_pdata,
6651 },
6652};
6653
Lei Zhou338cab82011-08-19 13:38:17 -04006654#ifdef CONFIG_SND_SOC_WM8903
6655static struct wm8903_platform_data wm8903_pdata = {
6656 .gpio_cfg[2] = 0x3A8,
6657};
6658
6659#define WM8903_I2C_SLAVE_ADDR 0x34
6660static struct i2c_board_info wm8903_codec_i2c_info[] = {
6661 {
6662 I2C_BOARD_INFO("wm8903", WM8903_I2C_SLAVE_ADDR >> 1),
6663 .platform_data = &wm8903_pdata,
6664 },
6665};
6666#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006667#ifdef CONFIG_PMIC8901
6668
6669#define PM8901_GPIO_INT 91
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006670/*
6671 * Consumer specific regulator names:
6672 * regulator name consumer dev_name
6673 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006674static struct regulator_consumer_supply vreg_consumers_8901_USB_OTG[] = {
6675 REGULATOR_SUPPLY("8901_usb_otg", NULL),
6676};
6677static struct regulator_consumer_supply vreg_consumers_8901_HDMI_MVS[] = {
6678 REGULATOR_SUPPLY("8901_hdmi_mvs", NULL),
6679};
6680
6681#define PM8901_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306682 _always_on) \
6683 { \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006684 .init_data = { \
6685 .constraints = { \
6686 .valid_modes_mask = _modes, \
6687 .valid_ops_mask = _ops, \
6688 .min_uV = _min_uV, \
6689 .max_uV = _max_uV, \
6690 .input_uV = _min_uV, \
6691 .apply_uV = _apply_uV, \
6692 .always_on = _always_on, \
6693 }, \
6694 .consumer_supplies = vreg_consumers_8901_##_id, \
6695 .num_consumer_supplies = \
6696 ARRAY_SIZE(vreg_consumers_8901_##_id), \
6697 }, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306698 .id = PM8901_VREG_ID_##_id, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006699 }
6700
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006701#define PM8901_VREG_INIT_VS(_id) \
6702 PM8901_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306703 REGULATOR_CHANGE_STATUS, 0, 0)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006704
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306705static struct pm8901_vreg_pdata pm8901_vreg_init[] = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006706 PM8901_VREG_INIT_VS(USB_OTG),
6707 PM8901_VREG_INIT_VS(HDMI_MVS),
6708};
6709
Anirudh Ghayalb6c98092011-12-13 14:06:48 +05306710static struct pm8xxx_misc_platform_data pm8901_misc_pdata = {
6711 .priority = 1,
6712};
6713
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306714static struct pm8xxx_irq_platform_data pm8901_irq_pdata = {
6715 .irq_base = PM8901_IRQ_BASE,
6716 .devirq = MSM_GPIO_TO_INT(PM8901_GPIO_INT),
6717 .irq_trigger_flag = IRQF_TRIGGER_LOW,
6718};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006719
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306720static struct pm8xxx_mpp_platform_data pm8901_mpp_pdata = {
6721 .mpp_base = PM8901_MPP_PM_TO_SYS(0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006722};
6723
6724static struct pm8901_platform_data pm8901_platform_data = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306725 .irq_pdata = &pm8901_irq_pdata,
6726 .mpp_pdata = &pm8901_mpp_pdata,
6727 .regulator_pdatas = pm8901_vreg_init,
6728 .num_regulators = ARRAY_SIZE(pm8901_vreg_init),
Anirudh Ghayalb6c98092011-12-13 14:06:48 +05306729 .misc_pdata = &pm8901_misc_pdata,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006730};
6731
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05306732static struct msm_ssbi_platform_data msm8x60_ssbi_pm8901_pdata __devinitdata = {
6733 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
6734 .slave = {
6735 .name = "pm8901-core",
6736 .platform_data = &pm8901_platform_data,
6737 },
6738};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006739#endif /* CONFIG_PMIC8901 */
6740
6741#if defined(CONFIG_MARIMBA_CORE) && (defined(CONFIG_GPIO_SX150X) \
6742 || defined(CONFIG_GPIO_SX150X_MODULE))
6743
6744static struct regulator *vreg_bahama;
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006745static int msm_bahama_sys_rst = GPIO_MS_SYS_RESET_N;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006746
6747struct bahama_config_register{
6748 u8 reg;
6749 u8 value;
6750 u8 mask;
6751};
6752
6753enum version{
6754 VER_1_0,
6755 VER_2_0,
6756 VER_UNSUPPORTED = 0xFF
6757};
6758
6759static u8 read_bahama_ver(void)
6760{
6761 int rc;
6762 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA };
6763 u8 bahama_version;
6764
6765 rc = marimba_read_bit_mask(&config, 0x00, &bahama_version, 1, 0x1F);
6766 if (rc < 0) {
6767 printk(KERN_ERR
6768 "%s: version read failed: %d\n",
6769 __func__, rc);
6770 return VER_UNSUPPORTED;
6771 } else {
6772 printk(KERN_INFO
6773 "%s: version read got: 0x%x\n",
6774 __func__, bahama_version);
6775 }
6776
6777 switch (bahama_version) {
6778 case 0x08: /* varient of bahama v1 */
6779 case 0x10:
6780 case 0x00:
6781 return VER_1_0;
6782 case 0x09: /* variant of bahama v2 */
6783 return VER_2_0;
6784 default:
6785 return VER_UNSUPPORTED;
6786 }
6787}
6788
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006789static int msm_bahama_setup_power_enable;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006790static unsigned int msm_bahama_setup_power(void)
6791{
6792 int rc = 0;
6793 const char *msm_bahama_regulator = "8058_s3";
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006794
6795 if (machine_is_msm8x60_dragon())
6796 msm_bahama_sys_rst = GPIO_CDC_RST_N;
6797
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006798 vreg_bahama = regulator_get(NULL, msm_bahama_regulator);
6799
6800 if (IS_ERR(vreg_bahama)) {
6801 rc = PTR_ERR(vreg_bahama);
6802 pr_err("%s: regulator_get %s = %d\n", __func__,
6803 msm_bahama_regulator, rc);
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006804 return rc;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006805 }
6806
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006807 rc = regulator_set_voltage(vreg_bahama, 1800000, 1800000);
6808 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006809 pr_err("%s: regulator_set_voltage %s = %d\n", __func__,
6810 msm_bahama_regulator, rc);
6811 goto unget;
6812 }
6813
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006814 rc = regulator_enable(vreg_bahama);
6815 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006816 pr_err("%s: regulator_enable %s = %d\n", __func__,
6817 msm_bahama_regulator, rc);
6818 goto unget;
6819 }
6820
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006821 rc = gpio_request(msm_bahama_sys_rst, "bahama sys_rst_n");
6822 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006823 pr_err("%s: gpio_request %d = %d\n", __func__,
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006824 msm_bahama_sys_rst, rc);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006825 goto unenable;
6826 }
6827
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006828 gpio_direction_output(msm_bahama_sys_rst, 0);
6829 usleep_range(1000, 1050);
6830 gpio_set_value_cansleep(msm_bahama_sys_rst, 1);
6831 usleep_range(1000, 1050);
6832 msm_bahama_setup_power_enable = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006833 return rc;
6834
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006835unenable:
6836 regulator_disable(vreg_bahama);
6837unget:
6838 regulator_put(vreg_bahama);
6839 return rc;
6840};
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006841
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006842static unsigned int msm_bahama_shutdown_power(int value)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006843{
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006844 if (msm_bahama_setup_power_enable) {
6845 gpio_set_value_cansleep(msm_bahama_sys_rst, 0);
6846 gpio_free(msm_bahama_sys_rst);
6847 regulator_disable(vreg_bahama);
6848 regulator_put(vreg_bahama);
6849 msm_bahama_setup_power_enable = 0;
6850 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006851
6852 return 0;
6853};
6854
6855static unsigned int msm_bahama_core_config(int type)
6856{
6857 int rc = 0;
6858
6859 if (type == BAHAMA_ID) {
6860
6861 int i;
6862 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA };
6863
6864 const struct bahama_config_register v20_init[] = {
6865 /* reg, value, mask */
6866 { 0xF4, 0x84, 0xFF }, /* AREG */
6867 { 0xF0, 0x04, 0xFF } /* DREG */
6868 };
6869
6870 if (read_bahama_ver() == VER_2_0) {
6871 for (i = 0; i < ARRAY_SIZE(v20_init); i++) {
6872 u8 value = v20_init[i].value;
6873 rc = marimba_write_bit_mask(&config,
6874 v20_init[i].reg,
6875 &value,
6876 sizeof(v20_init[i].value),
6877 v20_init[i].mask);
6878 if (rc < 0) {
6879 printk(KERN_ERR
6880 "%s: reg %d write failed: %d\n",
6881 __func__, v20_init[i].reg, rc);
6882 return rc;
6883 }
6884 printk(KERN_INFO "%s: reg 0x%02x value 0x%02x"
6885 " mask 0x%02x\n",
6886 __func__, v20_init[i].reg,
6887 v20_init[i].value, v20_init[i].mask);
6888 }
6889 }
6890 }
6891 printk(KERN_INFO "core type: %d\n", type);
6892
6893 return rc;
6894}
6895
6896static struct regulator *fm_regulator_s3;
6897static struct msm_xo_voter *fm_clock;
6898
6899static int fm_radio_setup(struct marimba_fm_platform_data *pdata)
6900{
6901 int rc = 0;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306902 struct pm_gpio cfg = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006903 .direction = PM_GPIO_DIR_IN,
6904 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306905 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006906 .function = PM_GPIO_FUNC_NORMAL,
6907 .inv_int_pol = 0,
6908 };
6909
6910 if (!fm_regulator_s3) {
6911 fm_regulator_s3 = regulator_get(NULL, "8058_s3");
6912 if (IS_ERR(fm_regulator_s3)) {
6913 rc = PTR_ERR(fm_regulator_s3);
6914 printk(KERN_ERR "%s: regulator get s3 (%d)\n",
6915 __func__, rc);
6916 goto out;
6917 }
6918 }
6919
6920
6921 rc = regulator_set_voltage(fm_regulator_s3, 1800000, 1800000);
6922 if (rc < 0) {
6923 printk(KERN_ERR "%s: regulator set voltage failed (%d)\n",
6924 __func__, rc);
6925 goto fm_fail_put;
6926 }
6927
6928 rc = regulator_enable(fm_regulator_s3);
6929 if (rc < 0) {
6930 printk(KERN_ERR "%s: regulator s3 enable failed (%d)\n",
6931 __func__, rc);
6932 goto fm_fail_put;
6933 }
6934
6935 /*Vote for XO clock*/
6936 fm_clock = msm_xo_get(MSM_XO_TCXO_D0, "fm_power");
6937
6938 if (IS_ERR(fm_clock)) {
6939 rc = PTR_ERR(fm_clock);
6940 printk(KERN_ERR "%s: Couldn't get TCXO_D0 vote for FM (%d)\n",
6941 __func__, rc);
6942 goto fm_fail_switch;
6943 }
6944
6945 rc = msm_xo_mode_vote(fm_clock, MSM_XO_MODE_ON);
6946 if (rc < 0) {
6947 printk(KERN_ERR "%s: Failed to vote for TCX0_D0 ON (%d)\n",
6948 __func__, rc);
6949 goto fm_fail_vote;
6950 }
6951
6952 /*GPIO 18 on PMIC is FM_IRQ*/
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306953 rc = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(FM_GPIO), &cfg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006954 if (rc) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306955 printk(KERN_ERR "%s: return val of pm8xxx_gpio_config: %d\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006956 __func__, rc);
6957 goto fm_fail_clock;
6958 }
6959 goto out;
6960
6961fm_fail_clock:
6962 msm_xo_mode_vote(fm_clock, MSM_XO_MODE_OFF);
6963fm_fail_vote:
6964 msm_xo_put(fm_clock);
6965fm_fail_switch:
6966 regulator_disable(fm_regulator_s3);
6967fm_fail_put:
6968 regulator_put(fm_regulator_s3);
6969out:
6970 return rc;
6971};
6972
6973static void fm_radio_shutdown(struct marimba_fm_platform_data *pdata)
6974{
6975 int rc = 0;
6976 if (fm_regulator_s3 != NULL) {
6977 rc = regulator_disable(fm_regulator_s3);
6978 if (rc < 0) {
6979 printk(KERN_ERR "%s: regulator s3 disable (%d)\n",
6980 __func__, rc);
6981 }
6982 regulator_put(fm_regulator_s3);
6983 fm_regulator_s3 = NULL;
6984 }
6985 printk(KERN_ERR "%s: Voting off for XO", __func__);
6986
6987 if (fm_clock != NULL) {
6988 rc = msm_xo_mode_vote(fm_clock, MSM_XO_MODE_OFF);
6989 if (rc < 0) {
6990 printk(KERN_ERR "%s: Voting off XO clock (%d)\n",
6991 __func__, rc);
6992 }
6993 msm_xo_put(fm_clock);
6994 }
6995 printk(KERN_ERR "%s: coming out of fm_radio_shutdown", __func__);
6996}
6997
6998/* Slave id address for FM/CDC/QMEMBIST
6999 * Values can be programmed using Marimba slave id 0
7000 * should there be a conflict with other I2C devices
7001 * */
7002#define BAHAMA_SLAVE_ID_FM_ADDR 0x2A
7003#define BAHAMA_SLAVE_ID_QMEMBIST_ADDR 0x7B
7004
7005static struct marimba_fm_platform_data marimba_fm_pdata = {
7006 .fm_setup = fm_radio_setup,
7007 .fm_shutdown = fm_radio_shutdown,
7008 .irq = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, FM_GPIO),
7009 .is_fm_soc_i2s_master = false,
7010 .config_i2s_gpio = NULL,
7011};
7012
7013/*
7014Just initializing the BAHAMA related slave
7015*/
7016static struct marimba_platform_data marimba_pdata = {
7017 .slave_id[SLAVE_ID_BAHAMA_FM] = BAHAMA_SLAVE_ID_FM_ADDR,
7018 .slave_id[SLAVE_ID_BAHAMA_QMEMBIST] = BAHAMA_SLAVE_ID_QMEMBIST_ADDR,
7019 .bahama_setup = msm_bahama_setup_power,
7020 .bahama_shutdown = msm_bahama_shutdown_power,
7021 .bahama_core_config = msm_bahama_core_config,
7022 .fm = &marimba_fm_pdata,
7023 .tsadc_ssbi_adap = MARIMBA_SSBI_ADAP,
7024};
7025
7026
7027static struct i2c_board_info msm_marimba_board_info[] = {
7028 {
7029 I2C_BOARD_INFO("marimba", 0xc),
7030 .platform_data = &marimba_pdata,
7031 }
7032};
7033#endif /* CONFIG_MAIMBA_CORE */
7034
7035#ifdef CONFIG_I2C
7036#define I2C_SURF 1
7037#define I2C_FFA (1 << 1)
7038#define I2C_RUMI (1 << 2)
7039#define I2C_SIM (1 << 3)
7040#define I2C_FLUID (1 << 4)
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007041#define I2C_DRAGON (1 << 5)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007042
7043struct i2c_registry {
7044 u8 machs;
7045 int bus;
7046 struct i2c_board_info *info;
7047 int len;
7048};
7049
7050static struct i2c_registry msm8x60_i2c_devices[] __initdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007051#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
7052 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007053 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007054 MSM_GSBI8_QUP_I2C_BUS_ID,
7055 core_expander_i2c_info,
7056 ARRAY_SIZE(core_expander_i2c_info),
7057 },
7058 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007059 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007060 MSM_GSBI8_QUP_I2C_BUS_ID,
7061 docking_expander_i2c_info,
7062 ARRAY_SIZE(docking_expander_i2c_info),
7063 },
7064 {
7065 I2C_SURF,
7066 MSM_GSBI8_QUP_I2C_BUS_ID,
7067 surf_expanders_i2c_info,
7068 ARRAY_SIZE(surf_expanders_i2c_info),
7069 },
7070 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007071 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007072 MSM_GSBI3_QUP_I2C_BUS_ID,
7073 fha_expanders_i2c_info,
7074 ARRAY_SIZE(fha_expanders_i2c_info),
7075 },
7076 {
7077 I2C_FLUID,
7078 MSM_GSBI3_QUP_I2C_BUS_ID,
7079 fluid_expanders_i2c_info,
7080 ARRAY_SIZE(fluid_expanders_i2c_info),
7081 },
7082 {
7083 I2C_FLUID,
7084 MSM_GSBI8_QUP_I2C_BUS_ID,
7085 fluid_core_expander_i2c_info,
7086 ARRAY_SIZE(fluid_core_expander_i2c_info),
7087 },
7088#endif
7089#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
7090 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
7091 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007092 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007093 MSM_GSBI3_QUP_I2C_BUS_ID,
7094 msm_i2c_gsbi3_tdisc_info,
7095 ARRAY_SIZE(msm_i2c_gsbi3_tdisc_info),
7096 },
7097#endif
7098 {
Zhang Chang Ken211df572011-07-05 19:16:39 -04007099 I2C_SURF | I2C_FFA | I2C_FLUID,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007100 MSM_GSBI3_QUP_I2C_BUS_ID,
7101 cy8ctmg200_board_info,
7102 ARRAY_SIZE(cy8ctmg200_board_info),
7103 },
Zhang Chang Ken211df572011-07-05 19:16:39 -04007104 {
7105 I2C_DRAGON,
7106 MSM_GSBI3_QUP_I2C_BUS_ID,
7107 cy8ctma340_dragon_board_info,
7108 ARRAY_SIZE(cy8ctma340_dragon_board_info),
7109 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007110#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
7111 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
7112 {
7113 I2C_FLUID,
7114 MSM_GSBI3_QUP_I2C_BUS_ID,
7115 cyttsp_fluid_info,
7116 ARRAY_SIZE(cyttsp_fluid_info),
7117 },
7118 {
7119 I2C_FFA | I2C_SURF,
7120 MSM_GSBI3_QUP_I2C_BUS_ID,
7121 cyttsp_ffa_info,
7122 ARRAY_SIZE(cyttsp_ffa_info),
7123 },
7124#endif
7125#ifdef CONFIG_MSM_CAMERA
Jilai Wang971f97f2011-07-13 14:25:25 -04007126 {
7127 I2C_SURF | I2C_FFA | I2C_FLUID ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007128 MSM_GSBI4_QUP_I2C_BUS_ID,
7129 msm_camera_boardinfo,
7130 ARRAY_SIZE(msm_camera_boardinfo),
7131 },
Jilai Wang971f97f2011-07-13 14:25:25 -04007132 {
7133 I2C_DRAGON,
7134 MSM_GSBI4_QUP_I2C_BUS_ID,
7135 msm_camera_dragon_boardinfo,
7136 ARRAY_SIZE(msm_camera_dragon_boardinfo),
7137 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007138#endif
7139 {
7140 I2C_SURF | I2C_FFA | I2C_FLUID,
7141 MSM_GSBI7_QUP_I2C_BUS_ID,
7142 msm_i2c_gsbi7_timpani_info,
7143 ARRAY_SIZE(msm_i2c_gsbi7_timpani_info),
7144 },
7145#if defined(CONFIG_MARIMBA_CORE)
7146 {
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04007147 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007148 MSM_GSBI7_QUP_I2C_BUS_ID,
7149 msm_marimba_board_info,
7150 ARRAY_SIZE(msm_marimba_board_info),
7151 },
7152#endif /* CONFIG_MARIMBA_CORE */
7153#ifdef CONFIG_ISL9519_CHARGER
7154 {
7155 I2C_SURF | I2C_FFA,
7156 MSM_GSBI8_QUP_I2C_BUS_ID,
7157 isl_charger_i2c_info,
7158 ARRAY_SIZE(isl_charger_i2c_info),
7159 },
7160#endif
7161#if defined(CONFIG_HAPTIC_ISA1200) || \
7162 defined(CONFIG_HAPTIC_ISA1200_MODULE)
7163 {
7164 I2C_FLUID,
7165 MSM_GSBI8_QUP_I2C_BUS_ID,
7166 msm_isa1200_board_info,
7167 ARRAY_SIZE(msm_isa1200_board_info),
7168 },
7169#endif
7170#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
7171 {
7172 I2C_FLUID,
7173 MSM_GSBI8_QUP_I2C_BUS_ID,
7174 smb137b_charger_i2c_info,
7175 ARRAY_SIZE(smb137b_charger_i2c_info),
7176 },
7177#endif
7178#if defined(CONFIG_BATTERY_BQ27520) || \
7179 defined(CONFIG_BATTERY_BQ27520_MODULE)
7180 {
7181 I2C_FLUID,
7182 MSM_GSBI8_QUP_I2C_BUS_ID,
7183 msm_bq27520_board_info,
7184 ARRAY_SIZE(msm_bq27520_board_info),
7185 },
7186#endif
Lei Zhou338cab82011-08-19 13:38:17 -04007187#if defined(CONFIG_SND_SOC_WM8903) || defined(CONFIG_SND_SOC_WM8903_MODULE)
7188 {
7189 I2C_DRAGON,
7190 MSM_GSBI8_QUP_I2C_BUS_ID,
7191 wm8903_codec_i2c_info,
7192 ARRAY_SIZE(wm8903_codec_i2c_info),
7193 },
7194#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007195};
7196#endif /* CONFIG_I2C */
7197
7198static void fixup_i2c_configs(void)
7199{
7200#ifdef CONFIG_I2C
7201#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
7202 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion())
7203 sx150x_data[SX150X_CORE].irq_summary =
7204 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT2_N);
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007205 else if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa() ||
7206 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007207 sx150x_data[SX150X_CORE].irq_summary =
7208 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT1_N);
7209 else if (machine_is_msm8x60_fluid())
7210 sx150x_data[SX150X_CORE_FLUID].irq_summary =
7211 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT1_N);
7212#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007213#endif
7214}
7215
7216static void register_i2c_devices(void)
7217{
7218#ifdef CONFIG_I2C
7219 u8 mach_mask = 0;
7220 int i;
7221
7222 /* Build the matching 'supported_machs' bitmask */
7223 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion())
7224 mach_mask = I2C_SURF;
7225 else if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa())
7226 mach_mask = I2C_FFA;
7227 else if (machine_is_msm8x60_rumi3())
7228 mach_mask = I2C_RUMI;
7229 else if (machine_is_msm8x60_sim())
7230 mach_mask = I2C_SIM;
7231 else if (machine_is_msm8x60_fluid())
7232 mach_mask = I2C_FLUID;
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007233 else if (machine_is_msm8x60_dragon())
7234 mach_mask = I2C_DRAGON;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007235 else
7236 pr_err("unmatched machine ID in register_i2c_devices\n");
7237
7238 /* Run the array and install devices as appropriate */
7239 for (i = 0; i < ARRAY_SIZE(msm8x60_i2c_devices); ++i) {
7240 if (msm8x60_i2c_devices[i].machs & mach_mask)
7241 i2c_register_board_info(msm8x60_i2c_devices[i].bus,
7242 msm8x60_i2c_devices[i].info,
7243 msm8x60_i2c_devices[i].len);
7244 }
7245#endif
7246}
7247
7248static void __init msm8x60_init_uart12dm(void)
7249{
7250#if !defined(CONFIG_USB_PEHCI_HCD) && !defined(CONFIG_USB_PEHCI_HCD_MODULE)
7251 /* 0x1D000000 now belongs to EBI2:CS3 i.e. USB ISP Controller */
7252 void *fpga_mem = ioremap_nocache(0x1D000000, SZ_4K);
7253
7254 if (!fpga_mem)
7255 pr_err("%s(): Error getting memory\n", __func__);
7256
7257 /* Advanced mode */
7258 writew(0xFFFF, fpga_mem + 0x15C);
7259 /* FPGA_UART_SEL */
7260 writew(0, fpga_mem + 0x172);
7261 /* FPGA_GPIO_CONFIG_117 */
7262 writew(1, fpga_mem + 0xEA);
7263 /* FPGA_GPIO_CONFIG_118 */
7264 writew(1, fpga_mem + 0xEC);
7265 mb();
7266 iounmap(fpga_mem);
7267#endif
7268}
7269
7270#define MSM_GSBI9_PHYS 0x19900000
7271#define GSBI_DUAL_MODE_CODE 0x60
7272
7273static void __init msm8x60_init_buses(void)
7274{
7275#ifdef CONFIG_I2C_QUP
7276 void *gsbi_mem = ioremap_nocache(0x19C00000, 4);
7277 /* Setting protocol code to 0x60 for dual UART/I2C in GSBI12 */
7278 writel_relaxed(0x6 << 4, gsbi_mem);
7279 /* Ensure protocol code is written before proceeding further */
7280 mb();
7281 iounmap(gsbi_mem);
7282
7283 msm_gsbi3_qup_i2c_device.dev.platform_data = &msm_gsbi3_qup_i2c_pdata;
7284 msm_gsbi4_qup_i2c_device.dev.platform_data = &msm_gsbi4_qup_i2c_pdata;
7285 msm_gsbi7_qup_i2c_device.dev.platform_data = &msm_gsbi7_qup_i2c_pdata;
7286 msm_gsbi8_qup_i2c_device.dev.platform_data = &msm_gsbi8_qup_i2c_pdata;
7287
7288#ifdef CONFIG_MSM_GSBI9_UART
7289 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
7290 /* Setting protocol code to 0x60 for dual UART/I2C in GSBI9 */
7291 gsbi_mem = ioremap_nocache(MSM_GSBI9_PHYS, 4);
7292 writel_relaxed(GSBI_DUAL_MODE_CODE, gsbi_mem);
7293 iounmap(gsbi_mem);
7294 msm_gsbi9_qup_i2c_pdata.use_gsbi_shared_mode = 1;
7295 }
7296#endif
7297 msm_gsbi9_qup_i2c_device.dev.platform_data = &msm_gsbi9_qup_i2c_pdata;
7298 msm_gsbi12_qup_i2c_device.dev.platform_data = &msm_gsbi12_qup_i2c_pdata;
7299#endif
7300#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
7301 msm_gsbi1_qup_spi_device.dev.platform_data = &msm_gsbi1_qup_spi_pdata;
7302#endif
7303#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007304 msm_device_ssbi3.dev.platform_data = &msm_ssbi3_pdata;
7305#endif
7306
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05307307#ifdef CONFIG_MSM_SSBI
7308 msm_device_ssbi_pmic1.dev.platform_data =
7309 &msm8x60_ssbi_pm8058_pdata;
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05307310 msm_device_ssbi_pmic2.dev.platform_data =
7311 &msm8x60_ssbi_pm8901_pdata;
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05307312#endif
7313
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007314 if (machine_is_msm8x60_fluid()) {
7315#if (defined(CONFIG_USB_EHCI_MSM_72K) && \
7316 (defined(CONFIG_SMB137B_CHARGER) || \
7317 defined(CONFIG_SMB137B_CHARGER_MODULE)))
7318 msm_otg_pdata.vbus_power = msm_hsusb_smb137b_vbus_power;
7319#endif
7320#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
7321 msm_gsbi10_qup_spi_device.dev.platform_data =
7322 &msm_gsbi10_qup_spi_pdata;
7323#endif
7324 }
7325
7326#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_HCD)
7327 /*
7328 * We can not put USB regulators (8058_l6 and 8058_l7) in LPM
7329 * when we depend on USB PHY for VBUS/ID notifications. VBUS
7330 * and ID notifications are available only on V2 surf and FFA
7331 * with a hardware workaround.
7332 */
7333 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2 &&
7334 (machine_is_msm8x60_surf() ||
7335 (machine_is_msm8x60_ffa() &&
7336 pmic_id_notif_supported)))
7337 msm_otg_pdata.phy_can_powercollapse = 1;
7338 msm_device_otg.dev.platform_data = &msm_otg_pdata;
7339#endif
7340
7341#ifdef CONFIG_USB_GADGET_MSM_72K
7342 msm_device_gadget_peripheral.dev.platform_data = &msm_gadget_pdata;
7343#endif
7344
7345#ifdef CONFIG_SERIAL_MSM_HS
7346 msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(54); /* GSBI6(2) */
7347 msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
7348#endif
7349#ifdef CONFIG_MSM_GSBI9_UART
7350 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
7351 msm_device_uart_gsbi9 = msm_add_gsbi9_uart();
7352 if (IS_ERR(msm_device_uart_gsbi9))
7353 pr_err("%s(): Failed to create uart gsbi9 device\n",
7354 __func__);
7355 }
7356#endif
7357
7358#ifdef CONFIG_MSM_BUS_SCALING
7359
7360 /* RPM calls are only enabled on V2 */
7361 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2) {
7362 msm_bus_apps_fabric_pdata.rpm_enabled = 1;
7363 msm_bus_sys_fabric_pdata.rpm_enabled = 1;
7364 msm_bus_mm_fabric_pdata.rpm_enabled = 1;
7365 msm_bus_sys_fpb_pdata.rpm_enabled = 1;
7366 msm_bus_cpss_fpb_pdata.rpm_enabled = 1;
7367 }
7368
7369 msm_bus_apps_fabric.dev.platform_data = &msm_bus_apps_fabric_pdata;
7370 msm_bus_sys_fabric.dev.platform_data = &msm_bus_sys_fabric_pdata;
7371 msm_bus_mm_fabric.dev.platform_data = &msm_bus_mm_fabric_pdata;
7372 msm_bus_sys_fpb.dev.platform_data = &msm_bus_sys_fpb_pdata;
7373 msm_bus_cpss_fpb.dev.platform_data = &msm_bus_cpss_fpb_pdata;
7374#endif
7375}
7376
7377static void __init msm8x60_map_io(void)
7378{
7379 msm_shared_ram_phys = MSM_SHARED_RAM_PHYS;
7380 msm_map_msm8x60_io();
Jeff Ohlstein3a77f9f2011-09-06 14:50:20 -07007381
7382 if (socinfo_init() < 0)
7383 pr_err("socinfo_init() failed!\n");
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007384}
7385
7386/*
7387 * Most segments of the EBI2 bus are disabled by default.
7388 */
7389static void __init msm8x60_init_ebi2(void)
7390{
7391 uint32_t ebi2_cfg;
7392 void *ebi2_cfg_ptr;
Terence Hampsonb36a38c2011-09-19 19:10:40 -04007393 struct clk *mem_clk = clk_get_sys("msm_ebi2", "mem_clk");
7394
7395 if (IS_ERR(mem_clk)) {
7396 pr_err("%s: clk_get_sys(%s,%s), failed", __func__,
7397 "msm_ebi2", "mem_clk");
7398 return;
7399 }
7400 clk_enable(mem_clk);
7401 clk_put(mem_clk);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007402
7403 ebi2_cfg_ptr = ioremap_nocache(0x1a100000, sizeof(uint32_t));
7404 if (ebi2_cfg_ptr != 0) {
7405 ebi2_cfg = readl_relaxed(ebi2_cfg_ptr);
7406
7407 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007408 machine_is_msm8x60_fluid() ||
7409 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007410 ebi2_cfg |= (1 << 4) | (1 << 5); /* CS2, CS3 */
7411 else if (machine_is_msm8x60_sim())
7412 ebi2_cfg |= (1 << 4); /* CS2 */
7413 else if (machine_is_msm8x60_rumi3())
7414 ebi2_cfg |= (1 << 5); /* CS3 */
7415
7416 writel_relaxed(ebi2_cfg, ebi2_cfg_ptr);
7417 iounmap(ebi2_cfg_ptr);
7418 }
7419
7420 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007421 machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon()) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007422 ebi2_cfg_ptr = ioremap_nocache(0x1a110000, SZ_4K);
7423 if (ebi2_cfg_ptr != 0) {
7424 /* EBI2_XMEM_CFG:PWRSAVE_MODE off */
7425 writel_relaxed(0UL, ebi2_cfg_ptr);
7426
7427 /* CS2: Delay 9 cycles (140ns@64MHz) between SMSC
7428 * LAN9221 Ethernet controller reads and writes.
7429 * The lowest 4 bits are the read delay, the next
7430 * 4 are the write delay. */
7431 writel_relaxed(0x031F1C99, ebi2_cfg_ptr + 0x10);
7432#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
7433 /*
7434 * RECOVERY=5, HOLD_WR=1
7435 * INIT_LATENCY_WR=1, INIT_LATENCY_RD=1
7436 * WAIT_WR=1, WAIT_RD=2
7437 */
7438 writel_relaxed(0x51010112, ebi2_cfg_ptr + 0x14);
7439 /*
7440 * HOLD_RD=1
7441 * ADV_OE_RECOVERY=0, ADDR_HOLD_ENA=1
7442 */
7443 writel_relaxed(0x01000020, ebi2_cfg_ptr + 0x34);
7444#else
7445 /* EBI2 CS3 muxed address/data,
7446 * two cyc addr enable */
7447 writel_relaxed(0xA3030020, ebi2_cfg_ptr + 0x34);
7448
7449#endif
7450 iounmap(ebi2_cfg_ptr);
7451 }
7452 }
7453}
7454
7455static void __init msm8x60_configure_smc91x(void)
7456{
7457 if (machine_is_msm8x60_sim()) {
7458
7459 smc91x_resources[0].start = 0x1b800300;
7460 smc91x_resources[0].end = 0x1b8003ff;
7461
7462 smc91x_resources[1].start = (NR_MSM_IRQS + 40);
7463 smc91x_resources[1].end = (NR_MSM_IRQS + 40);
7464
7465 } else if (machine_is_msm8x60_rumi3()) {
7466
7467 smc91x_resources[0].start = 0x1d000300;
7468 smc91x_resources[0].end = 0x1d0003ff;
7469
7470 smc91x_resources[1].start = TLMM_MSM_DIR_CONN_IRQ_0;
7471 smc91x_resources[1].end = TLMM_MSM_DIR_CONN_IRQ_0;
7472 }
7473}
7474
7475static void __init msm8x60_init_tlmm(void)
7476{
7477 if (machine_is_msm8x60_rumi3())
7478 msm_gpio_install_direct_irq(0, 0, 1);
7479}
7480
7481#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
7482 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
7483 || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
7484 || defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
7485 || defined(CONFIG_MMC_MSM_SDC5_SUPPORT))
7486
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007487/* 8x60 has 5 SDCC controllers */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007488#define MAX_SDCC_CONTROLLER 5
7489
7490struct msm_sdcc_gpio {
7491 /* maximum 10 GPIOs per SDCC controller */
7492 s16 no;
7493 /* name of this GPIO */
7494 const char *name;
7495 bool always_on;
7496 bool is_enabled;
7497};
7498
7499#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
7500static struct msm_sdcc_gpio sdc1_gpio_cfg[] = {
7501 {159, "sdc1_dat_0"},
7502 {160, "sdc1_dat_1"},
7503 {161, "sdc1_dat_2"},
7504 {162, "sdc1_dat_3"},
7505#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
7506 {163, "sdc1_dat_4"},
7507 {164, "sdc1_dat_5"},
7508 {165, "sdc1_dat_6"},
7509 {166, "sdc1_dat_7"},
7510#endif
7511 {167, "sdc1_clk"},
7512 {168, "sdc1_cmd"}
7513};
7514#endif
7515
7516#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
7517static struct msm_sdcc_gpio sdc2_gpio_cfg[] = {
7518 {143, "sdc2_dat_0"},
7519 {144, "sdc2_dat_1", 1},
7520 {145, "sdc2_dat_2"},
7521 {146, "sdc2_dat_3"},
7522#ifdef CONFIG_MMC_MSM_SDC2_8_BIT_SUPPORT
7523 {147, "sdc2_dat_4"},
7524 {148, "sdc2_dat_5"},
7525 {149, "sdc2_dat_6"},
7526 {150, "sdc2_dat_7"},
7527#endif
7528 {151, "sdc2_cmd"},
7529 {152, "sdc2_clk", 1}
7530};
7531#endif
7532
7533#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
7534static struct msm_sdcc_gpio sdc5_gpio_cfg[] = {
7535 {95, "sdc5_cmd"},
7536 {96, "sdc5_dat_3"},
7537 {97, "sdc5_clk", 1},
7538 {98, "sdc5_dat_2"},
7539 {99, "sdc5_dat_1", 1},
7540 {100, "sdc5_dat_0"}
7541};
7542#endif
7543
7544struct msm_sdcc_pad_pull_cfg {
7545 enum msm_tlmm_pull_tgt pull;
7546 u32 pull_val;
7547};
7548
7549struct msm_sdcc_pad_drv_cfg {
7550 enum msm_tlmm_hdrive_tgt drv;
7551 u32 drv_val;
7552};
7553
7554#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
7555static struct msm_sdcc_pad_drv_cfg sdc3_pad_on_drv_cfg[] = {
7556 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_8MA},
7557 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_8MA},
7558 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_8MA}
7559};
7560
7561static struct msm_sdcc_pad_pull_cfg sdc3_pad_on_pull_cfg[] = {
7562 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_UP},
7563 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_UP}
7564};
7565
7566static struct msm_sdcc_pad_drv_cfg sdc3_pad_off_drv_cfg[] = {
7567 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_2MA},
7568 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_2MA},
7569 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_2MA}
7570};
7571
7572static struct msm_sdcc_pad_pull_cfg sdc3_pad_off_pull_cfg[] = {
7573 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_DOWN},
7574 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_DOWN}
7575};
7576#endif
7577
7578#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
7579static struct msm_sdcc_pad_drv_cfg sdc4_pad_on_drv_cfg[] = {
7580 {TLMM_HDRV_SDC4_CLK, GPIO_CFG_8MA},
7581 {TLMM_HDRV_SDC4_CMD, GPIO_CFG_8MA},
7582 {TLMM_HDRV_SDC4_DATA, GPIO_CFG_8MA}
7583};
7584
7585static struct msm_sdcc_pad_pull_cfg sdc4_pad_on_pull_cfg[] = {
7586 {TLMM_PULL_SDC4_CMD, GPIO_CFG_PULL_UP},
7587 {TLMM_PULL_SDC4_DATA, GPIO_CFG_PULL_UP}
7588};
7589
7590static struct msm_sdcc_pad_drv_cfg sdc4_pad_off_drv_cfg[] = {
7591 {TLMM_HDRV_SDC4_CLK, GPIO_CFG_2MA},
7592 {TLMM_HDRV_SDC4_CMD, GPIO_CFG_2MA},
7593 {TLMM_HDRV_SDC4_DATA, GPIO_CFG_2MA}
7594};
7595
7596static struct msm_sdcc_pad_pull_cfg sdc4_pad_off_pull_cfg[] = {
7597 {TLMM_PULL_SDC4_CMD, GPIO_CFG_PULL_DOWN},
7598 {TLMM_PULL_SDC4_DATA, GPIO_CFG_PULL_DOWN}
7599};
7600#endif
7601
7602struct msm_sdcc_pin_cfg {
7603 /*
7604 * = 1 if controller pins are using gpios
7605 * = 0 if controller has dedicated MSM pins
7606 */
7607 u8 is_gpio;
7608 u8 cfg_sts;
7609 u8 gpio_data_size;
7610 struct msm_sdcc_gpio *gpio_data;
7611 struct msm_sdcc_pad_drv_cfg *pad_drv_on_data;
7612 struct msm_sdcc_pad_drv_cfg *pad_drv_off_data;
7613 struct msm_sdcc_pad_pull_cfg *pad_pull_on_data;
7614 struct msm_sdcc_pad_pull_cfg *pad_pull_off_data;
7615 u8 pad_drv_data_size;
7616 u8 pad_pull_data_size;
7617 u8 sdio_lpm_gpio_cfg;
7618};
7619
7620
7621static struct msm_sdcc_pin_cfg sdcc_pin_cfg_data[MAX_SDCC_CONTROLLER] = {
7622#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
7623 [0] = {
7624 .is_gpio = 1,
7625 .gpio_data_size = ARRAY_SIZE(sdc1_gpio_cfg),
7626 .gpio_data = sdc1_gpio_cfg
7627 },
7628#endif
7629#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
7630 [1] = {
7631 .is_gpio = 1,
7632 .gpio_data_size = ARRAY_SIZE(sdc2_gpio_cfg),
7633 .gpio_data = sdc2_gpio_cfg
7634 },
7635#endif
7636#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
7637 [2] = {
7638 .is_gpio = 0,
7639 .pad_drv_on_data = sdc3_pad_on_drv_cfg,
7640 .pad_drv_off_data = sdc3_pad_off_drv_cfg,
7641 .pad_pull_on_data = sdc3_pad_on_pull_cfg,
7642 .pad_pull_off_data = sdc3_pad_off_pull_cfg,
7643 .pad_drv_data_size = ARRAY_SIZE(sdc3_pad_on_drv_cfg),
7644 .pad_pull_data_size = ARRAY_SIZE(sdc3_pad_on_pull_cfg)
7645 },
7646#endif
7647#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
7648 [3] = {
7649 .is_gpio = 0,
7650 .pad_drv_on_data = sdc4_pad_on_drv_cfg,
7651 .pad_drv_off_data = sdc4_pad_off_drv_cfg,
7652 .pad_pull_on_data = sdc4_pad_on_pull_cfg,
7653 .pad_pull_off_data = sdc4_pad_off_pull_cfg,
7654 .pad_drv_data_size = ARRAY_SIZE(sdc4_pad_on_drv_cfg),
7655 .pad_pull_data_size = ARRAY_SIZE(sdc4_pad_on_pull_cfg)
7656 },
7657#endif
7658#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
7659 [4] = {
7660 .is_gpio = 1,
7661 .gpio_data_size = ARRAY_SIZE(sdc5_gpio_cfg),
7662 .gpio_data = sdc5_gpio_cfg
7663 }
7664#endif
7665};
7666
7667static int msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
7668{
7669 int rc = 0;
7670 struct msm_sdcc_pin_cfg *curr;
7671 int n;
7672
7673 curr = &sdcc_pin_cfg_data[dev_id - 1];
7674 if (!curr->gpio_data)
7675 goto out;
7676
7677 for (n = 0; n < curr->gpio_data_size; n++) {
7678 if (enable) {
7679
7680 if (curr->gpio_data[n].always_on &&
7681 curr->gpio_data[n].is_enabled)
7682 continue;
7683 pr_debug("%s: enable: %s\n", __func__,
7684 curr->gpio_data[n].name);
7685 rc = gpio_request(curr->gpio_data[n].no,
7686 curr->gpio_data[n].name);
7687 if (rc) {
7688 pr_err("%s: gpio_request(%d, %s)"
7689 "failed", __func__,
7690 curr->gpio_data[n].no,
7691 curr->gpio_data[n].name);
7692 goto free_gpios;
7693 }
7694 /* set direction as output for all GPIOs */
7695 rc = gpio_direction_output(
7696 curr->gpio_data[n].no, 1);
7697 if (rc) {
7698 pr_err("%s: gpio_direction_output"
7699 "(%d, 1) failed\n", __func__,
7700 curr->gpio_data[n].no);
7701 goto free_gpios;
7702 }
7703 curr->gpio_data[n].is_enabled = 1;
7704 } else {
7705 /*
7706 * now free this GPIO which will put GPIO
7707 * in low power mode and will also put GPIO
7708 * in input mode
7709 */
7710 if (curr->gpio_data[n].always_on)
7711 continue;
7712 pr_debug("%s: disable: %s\n", __func__,
7713 curr->gpio_data[n].name);
7714 gpio_free(curr->gpio_data[n].no);
7715 curr->gpio_data[n].is_enabled = 0;
7716 }
7717 }
7718 curr->cfg_sts = enable;
7719 goto out;
7720
7721free_gpios:
7722 for (; n >= 0; n--)
7723 gpio_free(curr->gpio_data[n].no);
7724out:
7725 return rc;
7726}
7727
7728static int msm_sdcc_setup_pad(int dev_id, unsigned int enable)
7729{
7730 int rc = 0;
7731 struct msm_sdcc_pin_cfg *curr;
7732 int n;
7733
7734 curr = &sdcc_pin_cfg_data[dev_id - 1];
7735 if (!curr->pad_drv_on_data || !curr->pad_pull_on_data)
7736 goto out;
7737
7738 if (enable) {
7739 /*
7740 * set up the normal driver strength and
7741 * pull config for pads
7742 */
7743 for (n = 0; n < curr->pad_drv_data_size; n++) {
7744 if (curr->sdio_lpm_gpio_cfg) {
7745 if (curr->pad_drv_on_data[n].drv ==
7746 TLMM_HDRV_SDC4_DATA)
7747 continue;
7748 }
7749 msm_tlmm_set_hdrive(curr->pad_drv_on_data[n].drv,
7750 curr->pad_drv_on_data[n].drv_val);
7751 }
7752 for (n = 0; n < curr->pad_pull_data_size; n++) {
7753 if (curr->sdio_lpm_gpio_cfg) {
7754 if (curr->pad_pull_on_data[n].pull ==
7755 TLMM_PULL_SDC4_DATA)
7756 continue;
7757 }
7758 msm_tlmm_set_pull(curr->pad_pull_on_data[n].pull,
7759 curr->pad_pull_on_data[n].pull_val);
7760 }
7761 } else {
7762 /* set the low power config for pads */
7763 for (n = 0; n < curr->pad_drv_data_size; n++) {
7764 if (curr->sdio_lpm_gpio_cfg) {
7765 if (curr->pad_drv_off_data[n].drv ==
7766 TLMM_HDRV_SDC4_DATA)
7767 continue;
7768 }
7769 msm_tlmm_set_hdrive(
7770 curr->pad_drv_off_data[n].drv,
7771 curr->pad_drv_off_data[n].drv_val);
7772 }
7773 for (n = 0; n < curr->pad_pull_data_size; n++) {
7774 if (curr->sdio_lpm_gpio_cfg) {
7775 if (curr->pad_pull_off_data[n].pull ==
7776 TLMM_PULL_SDC4_DATA)
7777 continue;
7778 }
7779 msm_tlmm_set_pull(
7780 curr->pad_pull_off_data[n].pull,
7781 curr->pad_pull_off_data[n].pull_val);
7782 }
7783 }
7784 curr->cfg_sts = enable;
7785out:
7786 return rc;
7787}
7788
7789struct sdcc_reg {
7790 /* VDD/VCC/VCCQ regulator name on PMIC8058/PMIC8089*/
7791 const char *reg_name;
7792 /*
7793 * is set voltage supported for this regulator?
7794 * 0 = not supported, 1 = supported
7795 */
7796 unsigned char set_voltage_sup;
7797 /* voltage level to be set */
7798 unsigned int level;
7799 /* VDD/VCC/VCCQ voltage regulator handle */
7800 struct regulator *reg;
7801 /* is this regulator enabled? */
7802 bool enabled;
7803 /* is this regulator needs to be always on? */
7804 bool always_on;
7805 /* is operating power mode setting required for this regulator? */
7806 bool op_pwr_mode_sup;
7807 /* Load values for low power and high power mode */
7808 unsigned int lpm_uA;
7809 unsigned int hpm_uA;
7810};
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007811/* all SDCC controllers require VDD/VCC voltage */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007812static struct sdcc_reg sdcc_vdd_reg_data[MAX_SDCC_CONTROLLER];
7813/* only SDCC1 requires VCCQ voltage */
7814static struct sdcc_reg sdcc_vccq_reg_data[1];
7815/* all SDCC controllers may require voting for VDD PAD voltage */
7816static struct sdcc_reg sdcc_vddp_reg_data[MAX_SDCC_CONTROLLER];
7817
7818struct sdcc_reg_data {
7819 struct sdcc_reg *vdd_data; /* keeps VDD/VCC regulator info */
7820 struct sdcc_reg *vccq_data; /* keeps VCCQ regulator info */
7821 struct sdcc_reg *vddp_data; /* keeps VDD Pad regulator info */
7822 unsigned char sts; /* regulator enable/disable status */
7823};
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007824/* msm8x60 has 5 SDCC controllers */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007825static struct sdcc_reg_data sdcc_vreg_data[MAX_SDCC_CONTROLLER];
7826
7827static int msm_sdcc_vreg_init_reg(struct sdcc_reg *vreg)
7828{
7829 int rc = 0;
7830
7831 /* Get the regulator handle */
7832 vreg->reg = regulator_get(NULL, vreg->reg_name);
7833 if (IS_ERR(vreg->reg)) {
7834 rc = PTR_ERR(vreg->reg);
7835 pr_err("%s: regulator_get(%s) failed. rc=%d\n",
7836 __func__, vreg->reg_name, rc);
7837 goto out;
7838 }
7839
7840 /* Set the voltage level if required */
7841 if (vreg->set_voltage_sup) {
7842 rc = regulator_set_voltage(vreg->reg, vreg->level,
7843 vreg->level);
7844 if (rc) {
7845 pr_err("%s: regulator_set_voltage(%s) failed rc=%d\n",
7846 __func__, vreg->reg_name, rc);
7847 goto vreg_put;
7848 }
7849 }
7850 goto out;
7851
7852vreg_put:
7853 regulator_put(vreg->reg);
7854out:
7855 return rc;
7856}
7857
7858static inline void msm_sdcc_vreg_deinit_reg(struct sdcc_reg *vreg)
7859{
7860 regulator_put(vreg->reg);
7861}
7862
7863/* this init function should be called only once for each SDCC */
7864static int msm_sdcc_vreg_init(int dev_id, unsigned char init)
7865{
7866 int rc = 0;
7867 struct sdcc_reg *curr_vdd_reg, *curr_vccq_reg, *curr_vddp_reg;
7868 struct sdcc_reg_data *curr;
7869
7870 curr = &sdcc_vreg_data[dev_id - 1];
7871 curr_vdd_reg = curr->vdd_data;
7872 curr_vccq_reg = curr->vccq_data;
7873 curr_vddp_reg = curr->vddp_data;
7874
7875 if (init) {
7876 /*
7877 * get the regulator handle from voltage regulator framework
7878 * and then try to set the voltage level for the regulator
7879 */
7880 if (curr_vdd_reg) {
7881 rc = msm_sdcc_vreg_init_reg(curr_vdd_reg);
7882 if (rc)
7883 goto out;
7884 }
7885 if (curr_vccq_reg) {
7886 rc = msm_sdcc_vreg_init_reg(curr_vccq_reg);
7887 if (rc)
7888 goto vdd_reg_deinit;
7889 }
7890 if (curr_vddp_reg) {
7891 rc = msm_sdcc_vreg_init_reg(curr_vddp_reg);
7892 if (rc)
7893 goto vccq_reg_deinit;
7894 }
7895 goto out;
7896 } else
7897 /* deregister with all regulators from regulator framework */
7898 goto vddp_reg_deinit;
7899
7900vddp_reg_deinit:
7901 if (curr_vddp_reg)
7902 msm_sdcc_vreg_deinit_reg(curr_vddp_reg);
7903vccq_reg_deinit:
7904 if (curr_vccq_reg)
7905 msm_sdcc_vreg_deinit_reg(curr_vccq_reg);
7906vdd_reg_deinit:
7907 if (curr_vdd_reg)
7908 msm_sdcc_vreg_deinit_reg(curr_vdd_reg);
7909out:
7910 return rc;
7911}
7912
7913static int msm_sdcc_vreg_enable(struct sdcc_reg *vreg)
7914{
7915 int rc;
7916
7917 if (!vreg->enabled) {
7918 rc = regulator_enable(vreg->reg);
7919 if (rc) {
7920 pr_err("%s: regulator_enable(%s) failed. rc=%d\n",
7921 __func__, vreg->reg_name, rc);
7922 goto out;
7923 }
7924 vreg->enabled = 1;
7925 }
7926
7927 /* Put always_on regulator in HPM (high power mode) */
7928 if (vreg->always_on && vreg->op_pwr_mode_sup) {
7929 rc = regulator_set_optimum_mode(vreg->reg, vreg->hpm_uA);
7930 if (rc < 0) {
7931 pr_err("%s: reg=%s: HPM setting failed"
7932 " hpm_uA=%d, rc=%d\n",
7933 __func__, vreg->reg_name,
7934 vreg->hpm_uA, rc);
7935 goto vreg_disable;
7936 }
7937 rc = 0;
7938 }
7939 goto out;
7940
7941vreg_disable:
7942 regulator_disable(vreg->reg);
7943 vreg->enabled = 0;
7944out:
7945 return rc;
7946}
7947
7948static int msm_sdcc_vreg_disable(struct sdcc_reg *vreg)
7949{
7950 int rc;
7951
7952 /* Never disable always_on regulator */
7953 if (!vreg->always_on) {
7954 rc = regulator_disable(vreg->reg);
7955 if (rc) {
7956 pr_err("%s: regulator_disable(%s) failed. rc=%d\n",
7957 __func__, vreg->reg_name, rc);
7958 goto out;
7959 }
7960 vreg->enabled = 0;
7961 }
7962
7963 /* Put always_on regulator in LPM (low power mode) */
7964 if (vreg->always_on && vreg->op_pwr_mode_sup) {
7965 rc = regulator_set_optimum_mode(vreg->reg, vreg->lpm_uA);
7966 if (rc < 0) {
7967 pr_err("%s: reg=%s: LPM setting failed"
7968 " lpm_uA=%d, rc=%d\n",
7969 __func__,
7970 vreg->reg_name,
7971 vreg->lpm_uA, rc);
7972 goto out;
7973 }
7974 rc = 0;
7975 }
7976
7977out:
7978 return rc;
7979}
7980
7981static int msm_sdcc_setup_vreg(int dev_id, unsigned char enable)
7982{
7983 int rc = 0;
7984 struct sdcc_reg *curr_vdd_reg, *curr_vccq_reg, *curr_vddp_reg;
7985 struct sdcc_reg_data *curr;
7986
7987 curr = &sdcc_vreg_data[dev_id - 1];
7988 curr_vdd_reg = curr->vdd_data;
7989 curr_vccq_reg = curr->vccq_data;
7990 curr_vddp_reg = curr->vddp_data;
7991
7992 /* check if regulators are initialized or not? */
7993 if ((curr_vdd_reg && !curr_vdd_reg->reg) ||
7994 (curr_vccq_reg && !curr_vccq_reg->reg) ||
7995 (curr_vddp_reg && !curr_vddp_reg->reg)) {
7996 /* initialize voltage regulators required for this SDCC */
7997 rc = msm_sdcc_vreg_init(dev_id, 1);
7998 if (rc) {
7999 pr_err("%s: regulator init failed = %d\n",
8000 __func__, rc);
8001 goto out;
8002 }
8003 }
8004
8005 if (curr->sts == enable)
8006 goto out;
8007
8008 if (curr_vdd_reg) {
8009 if (enable)
8010 rc = msm_sdcc_vreg_enable(curr_vdd_reg);
8011 else
8012 rc = msm_sdcc_vreg_disable(curr_vdd_reg);
8013 if (rc)
8014 goto out;
8015 }
8016
8017 if (curr_vccq_reg) {
8018 if (enable)
8019 rc = msm_sdcc_vreg_enable(curr_vccq_reg);
8020 else
8021 rc = msm_sdcc_vreg_disable(curr_vccq_reg);
8022 if (rc)
8023 goto out;
8024 }
8025
8026 if (curr_vddp_reg) {
8027 if (enable)
8028 rc = msm_sdcc_vreg_enable(curr_vddp_reg);
8029 else
8030 rc = msm_sdcc_vreg_disable(curr_vddp_reg);
8031 if (rc)
8032 goto out;
8033 }
8034 curr->sts = enable;
8035
8036out:
8037 return rc;
8038}
8039
8040static u32 msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
8041{
8042 u32 rc_pin_cfg = 0;
8043 u32 rc_vreg_cfg = 0;
8044 u32 rc = 0;
8045 struct platform_device *pdev;
8046 struct msm_sdcc_pin_cfg *curr_pin_cfg;
8047
8048 pdev = container_of(dv, struct platform_device, dev);
8049
8050 /* setup gpio/pad */
8051 curr_pin_cfg = &sdcc_pin_cfg_data[pdev->id - 1];
8052 if (curr_pin_cfg->cfg_sts == !!vdd)
8053 goto setup_vreg;
8054
8055 if (curr_pin_cfg->is_gpio)
8056 rc_pin_cfg = msm_sdcc_setup_gpio(pdev->id, !!vdd);
8057 else
8058 rc_pin_cfg = msm_sdcc_setup_pad(pdev->id, !!vdd);
8059
8060setup_vreg:
8061 /* setup voltage regulators */
8062 rc_vreg_cfg = msm_sdcc_setup_vreg(pdev->id, !!vdd);
8063
8064 if (rc_pin_cfg || rc_vreg_cfg)
8065 rc = rc_pin_cfg ? rc_pin_cfg : rc_vreg_cfg;
8066
8067 return rc;
8068}
8069
8070static void msm_sdcc_sdio_lpm_gpio(struct device *dv, unsigned int active)
8071{
8072 struct msm_sdcc_pin_cfg *curr_pin_cfg;
8073 struct platform_device *pdev;
8074
8075 pdev = container_of(dv, struct platform_device, dev);
8076 /* setup gpio/pad */
8077 curr_pin_cfg = &sdcc_pin_cfg_data[pdev->id - 1];
8078
8079 if (curr_pin_cfg->cfg_sts == active)
8080 return;
8081
8082 curr_pin_cfg->sdio_lpm_gpio_cfg = 1;
8083 if (curr_pin_cfg->is_gpio)
8084 msm_sdcc_setup_gpio(pdev->id, active);
8085 else
8086 msm_sdcc_setup_pad(pdev->id, active);
8087 curr_pin_cfg->sdio_lpm_gpio_cfg = 0;
8088}
8089
8090static int msm_sdc3_get_wpswitch(struct device *dev)
8091{
8092 struct platform_device *pdev;
8093 int status;
8094 pdev = container_of(dev, struct platform_device, dev);
8095
8096 status = gpio_request(GPIO_SDC_WP, "SD_WP_Switch");
8097 if (status) {
8098 pr_err("%s:Failed to request GPIO %d\n",
8099 __func__, GPIO_SDC_WP);
8100 } else {
8101 status = gpio_direction_input(GPIO_SDC_WP);
8102 if (!status) {
8103 status = gpio_get_value_cansleep(GPIO_SDC_WP);
8104 pr_info("%s: WP Status for Slot %d = %d\n",
8105 __func__, pdev->id, status);
8106 }
8107 gpio_free(GPIO_SDC_WP);
8108 }
8109 return status;
8110}
8111
8112#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8113int sdc5_register_status_notify(void (*callback)(int, void *),
8114 void *dev_id)
8115{
8116 sdc5_status_notify_cb = callback;
8117 sdc5_status_notify_cb_devid = dev_id;
8118 return 0;
8119}
8120#endif
8121
8122#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8123int sdc2_register_status_notify(void (*callback)(int, void *),
8124 void *dev_id)
8125{
8126 sdc2_status_notify_cb = callback;
8127 sdc2_status_notify_cb_devid = dev_id;
8128 return 0;
8129}
8130#endif
8131
8132/* Interrupt handler for SDC2 and SDC5 detection
8133 * This function uses dual-edge interrputs settings in order
8134 * to get SDIO detection when the GPIO is rising and SDIO removal
8135 * when the GPIO is falling */
8136static irqreturn_t msm8x60_multi_sdio_slot_status_irq(int irq, void *dev_id)
8137{
8138 int status;
8139
8140 if (!machine_is_msm8x60_fusion() &&
8141 !machine_is_msm8x60_fusn_ffa())
8142 return IRQ_NONE;
8143
8144 status = gpio_get_value(MDM2AP_SYNC);
8145 pr_info("%s: MDM2AP_SYNC Status = %d\n",
8146 __func__, status);
8147
8148#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8149 if (sdc2_status_notify_cb) {
8150 pr_info("%s: calling sdc2_status_notify_cb\n", __func__);
8151 sdc2_status_notify_cb(status,
8152 sdc2_status_notify_cb_devid);
8153 }
8154#endif
8155
8156#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8157 if (sdc5_status_notify_cb) {
8158 pr_info("%s: calling sdc5_status_notify_cb\n", __func__);
8159 sdc5_status_notify_cb(status,
8160 sdc5_status_notify_cb_devid);
8161 }
8162#endif
8163 return IRQ_HANDLED;
8164}
8165
8166static int msm8x60_multi_sdio_init(void)
8167{
8168 int ret, irq_num;
8169
8170 if (!machine_is_msm8x60_fusion() &&
8171 !machine_is_msm8x60_fusn_ffa())
8172 return 0;
8173
8174 ret = msm_gpiomux_get(MDM2AP_SYNC);
8175 if (ret) {
8176 pr_err("%s:Failed to request GPIO %d, ret=%d\n",
8177 __func__, MDM2AP_SYNC, ret);
8178 return ret;
8179 }
8180
8181 irq_num = gpio_to_irq(MDM2AP_SYNC);
8182
8183 ret = request_irq(irq_num,
8184 msm8x60_multi_sdio_slot_status_irq,
8185 IRQ_TYPE_EDGE_BOTH,
8186 "sdio_multidetection", NULL);
8187
8188 if (ret) {
8189 pr_err("%s:Failed to request irq, ret=%d\n",
8190 __func__, ret);
8191 return ret;
8192 }
8193
8194 return ret;
8195}
8196
8197#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8198#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
8199static unsigned int msm8x60_sdcc_slot_status(struct device *dev)
8200{
8201 int status;
8202
8203 status = gpio_request(PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1)
8204 , "SD_HW_Detect");
8205 if (status) {
8206 pr_err("%s:Failed to request GPIO %d\n", __func__,
8207 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8208 } else {
8209 status = gpio_direction_input(
8210 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8211 if (!status)
8212 status = !(gpio_get_value_cansleep(
8213 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1)));
8214 gpio_free(PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8215 }
8216 return (unsigned int) status;
8217}
8218#endif
8219#endif
8220
8221#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8222static int msm_sdcc_cfg_mpm_sdiowakeup(struct device *dev, unsigned mode)
8223{
8224 struct platform_device *pdev;
8225 enum msm_mpm_pin pin;
8226 int ret = 0;
8227
8228 pdev = container_of(dev, struct platform_device, dev);
8229
8230 /* Only SDCC4 slot connected to WLAN chip has wakeup capability */
8231 if (pdev->id == 4)
8232 pin = MSM_MPM_PIN_SDC4_DAT1;
8233 else
8234 return -EINVAL;
8235
8236 switch (mode) {
8237 case SDC_DAT1_DISABLE:
8238 ret = msm_mpm_enable_pin(pin, 0);
8239 break;
8240 case SDC_DAT1_ENABLE:
8241 ret = msm_mpm_set_pin_type(pin, IRQ_TYPE_LEVEL_LOW);
8242 ret = msm_mpm_enable_pin(pin, 1);
8243 break;
8244 case SDC_DAT1_ENWAKE:
8245 ret = msm_mpm_set_pin_wake(pin, 1);
8246 break;
8247 case SDC_DAT1_DISWAKE:
8248 ret = msm_mpm_set_pin_wake(pin, 0);
8249 break;
8250 default:
8251 ret = -EINVAL;
8252 break;
8253 }
8254 return ret;
8255}
8256#endif
8257#endif
8258
8259#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
8260static struct mmc_platform_data msm8x60_sdc1_data = {
8261 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8262 .translate_vdd = msm_sdcc_setup_power,
8263#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
8264 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
8265#else
8266 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8267#endif
8268 .msmsdcc_fmin = 400000,
8269 .msmsdcc_fmid = 24000000,
8270 .msmsdcc_fmax = 48000000,
8271 .nonremovable = 1,
8272 .pclk_src_dfab = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008273};
8274#endif
8275
8276#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8277static struct mmc_platform_data msm8x60_sdc2_data = {
8278 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_165_195,
8279 .translate_vdd = msm_sdcc_setup_power,
8280 .sdio_lpm_gpio_setup = msm_sdcc_sdio_lpm_gpio,
8281 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
8282 .msmsdcc_fmin = 400000,
8283 .msmsdcc_fmid = 24000000,
8284 .msmsdcc_fmax = 48000000,
8285 .nonremovable = 0,
8286 .pclk_src_dfab = 1,
8287 .register_status_notify = sdc2_register_status_notify,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008288#ifdef CONFIG_MSM_SDIO_AL
8289 .is_sdio_al_client = 1,
8290#endif
8291};
8292#endif
8293
8294#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8295static struct mmc_platform_data msm8x60_sdc3_data = {
8296 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8297 .translate_vdd = msm_sdcc_setup_power,
8298 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8299 .wpswitch = msm_sdc3_get_wpswitch,
8300#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
8301 .status = msm8x60_sdcc_slot_status,
8302 .status_irq = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
8303 PMIC_GPIO_SDC3_DET - 1),
8304 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
8305#endif
8306 .msmsdcc_fmin = 400000,
8307 .msmsdcc_fmid = 24000000,
8308 .msmsdcc_fmax = 48000000,
8309 .nonremovable = 0,
8310 .pclk_src_dfab = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008311};
8312#endif
8313
8314#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8315static struct mmc_platform_data msm8x60_sdc4_data = {
8316 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8317 .translate_vdd = msm_sdcc_setup_power,
8318 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8319 .msmsdcc_fmin = 400000,
8320 .msmsdcc_fmid = 24000000,
8321 .msmsdcc_fmax = 48000000,
8322 .nonremovable = 0,
8323 .pclk_src_dfab = 1,
8324 .cfg_mpm_sdiowakeup = msm_sdcc_cfg_mpm_sdiowakeup,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008325};
8326#endif
8327
8328#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8329static struct mmc_platform_data msm8x60_sdc5_data = {
8330 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_165_195,
8331 .translate_vdd = msm_sdcc_setup_power,
8332 .sdio_lpm_gpio_setup = msm_sdcc_sdio_lpm_gpio,
8333 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8334 .msmsdcc_fmin = 400000,
8335 .msmsdcc_fmid = 24000000,
8336 .msmsdcc_fmax = 48000000,
8337 .nonremovable = 0,
8338 .pclk_src_dfab = 1,
8339 .register_status_notify = sdc5_register_status_notify,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008340#ifdef CONFIG_MSM_SDIO_AL
8341 .is_sdio_al_client = 1,
8342#endif
8343};
8344#endif
8345
8346static void __init msm8x60_init_mmc(void)
8347{
8348#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
8349 /* SDCC1 : eMMC card connected */
8350 sdcc_vreg_data[0].vdd_data = &sdcc_vdd_reg_data[0];
8351 sdcc_vreg_data[0].vdd_data->reg_name = "8901_l5";
8352 sdcc_vreg_data[0].vdd_data->set_voltage_sup = 1;
8353 sdcc_vreg_data[0].vdd_data->level = 2850000;
Subhash Jadavania8482a32011-08-08 11:01:44 +05308354 sdcc_vreg_data[0].vdd_data->always_on = 1;
8355 sdcc_vreg_data[0].vdd_data->op_pwr_mode_sup = 1;
8356 sdcc_vreg_data[0].vdd_data->lpm_uA = 9000;
8357 sdcc_vreg_data[0].vdd_data->hpm_uA = 200000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008358
8359 sdcc_vreg_data[0].vccq_data = &sdcc_vccq_reg_data[0];
8360 sdcc_vreg_data[0].vccq_data->reg_name = "8901_lvs0";
8361 sdcc_vreg_data[0].vccq_data->set_voltage_sup = 0;
8362 sdcc_vreg_data[0].vccq_data->always_on = 1;
8363
8364 msm_add_sdcc(1, &msm8x60_sdc1_data);
8365#endif
8366#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8367 /*
8368 * MDM SDIO client is connected to SDC2 on charm SURF/FFA
8369 * and no card is connected on 8660 SURF/FFA/FLUID.
8370 */
8371 sdcc_vreg_data[1].vdd_data = &sdcc_vdd_reg_data[1];
8372 sdcc_vreg_data[1].vdd_data->reg_name = "8058_s3";
8373 sdcc_vreg_data[1].vdd_data->set_voltage_sup = 1;
8374 sdcc_vreg_data[1].vdd_data->level = 1800000;
8375
8376 sdcc_vreg_data[1].vccq_data = NULL;
8377
8378 if (machine_is_msm8x60_fusion())
8379 msm8x60_sdc2_data.msmsdcc_fmax = 24000000;
8380 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8381#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
8382 msm8x60_sdc2_data.sdiowakeup_irq = gpio_to_irq(144);
8383 msm_sdcc_setup_gpio(2, 1);
8384#endif
8385 msm_add_sdcc(2, &msm8x60_sdc2_data);
8386 }
8387#endif
8388#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8389 /* SDCC3 : External card slot connected */
8390 sdcc_vreg_data[2].vdd_data = &sdcc_vdd_reg_data[2];
8391 sdcc_vreg_data[2].vdd_data->reg_name = "8058_l14";
8392 sdcc_vreg_data[2].vdd_data->set_voltage_sup = 1;
8393 sdcc_vreg_data[2].vdd_data->level = 2850000;
8394 sdcc_vreg_data[2].vdd_data->always_on = 1;
8395 sdcc_vreg_data[2].vdd_data->op_pwr_mode_sup = 1;
8396 sdcc_vreg_data[2].vdd_data->lpm_uA = 9000;
8397 sdcc_vreg_data[2].vdd_data->hpm_uA = 200000;
8398
8399 sdcc_vreg_data[2].vccq_data = NULL;
8400
8401 sdcc_vreg_data[2].vddp_data = &sdcc_vddp_reg_data[2];
8402 sdcc_vreg_data[2].vddp_data->reg_name = "8058_l5";
8403 sdcc_vreg_data[2].vddp_data->set_voltage_sup = 1;
8404 sdcc_vreg_data[2].vddp_data->level = 2850000;
8405 sdcc_vreg_data[2].vddp_data->always_on = 1;
8406 sdcc_vreg_data[2].vddp_data->op_pwr_mode_sup = 1;
8407 /* Sleep current required is ~300 uA. But min. RPM
8408 * vote can be in terms of mA (min. 1 mA).
8409 * So let's vote for 2 mA during sleep.
8410 */
8411 sdcc_vreg_data[2].vddp_data->lpm_uA = 2000;
8412 /* Max. Active current required is 16 mA */
8413 sdcc_vreg_data[2].vddp_data->hpm_uA = 16000;
8414
8415 if (machine_is_msm8x60_fluid())
8416 msm8x60_sdc3_data.wpswitch = NULL;
8417 msm_add_sdcc(3, &msm8x60_sdc3_data);
8418#endif
8419#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8420 /* SDCC4 : WLAN WCN1314 chip is connected */
8421 sdcc_vreg_data[3].vdd_data = &sdcc_vdd_reg_data[3];
8422 sdcc_vreg_data[3].vdd_data->reg_name = "8058_s3";
8423 sdcc_vreg_data[3].vdd_data->set_voltage_sup = 1;
8424 sdcc_vreg_data[3].vdd_data->level = 1800000;
8425
8426 sdcc_vreg_data[3].vccq_data = NULL;
8427
8428 msm_add_sdcc(4, &msm8x60_sdc4_data);
8429#endif
8430#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8431 /*
8432 * MDM SDIO client is connected to SDC5 on charm SURF/FFA
8433 * and no card is connected on 8660 SURF/FFA/FLUID.
8434 */
8435 sdcc_vreg_data[4].vdd_data = &sdcc_vdd_reg_data[4];
8436 sdcc_vreg_data[4].vdd_data->reg_name = "8058_s3";
8437 sdcc_vreg_data[4].vdd_data->set_voltage_sup = 1;
8438 sdcc_vreg_data[4].vdd_data->level = 1800000;
8439
8440 sdcc_vreg_data[4].vccq_data = NULL;
8441
8442 if (machine_is_msm8x60_fusion())
8443 msm8x60_sdc5_data.msmsdcc_fmax = 24000000;
8444 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8445#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
8446 msm8x60_sdc5_data.sdiowakeup_irq = gpio_to_irq(99);
8447 msm_sdcc_setup_gpio(5, 1);
8448#endif
8449 msm_add_sdcc(5, &msm8x60_sdc5_data);
8450 }
8451#endif
8452}
8453
8454#if !defined(CONFIG_GPIO_SX150X) && !defined(CONFIG_GPIO_SX150X_MODULE)
8455static inline void display_common_power(int on) {}
8456#else
8457
8458#define _GET_REGULATOR(var, name) do { \
8459 if (var == NULL) { \
8460 var = regulator_get(NULL, name); \
8461 if (IS_ERR(var)) { \
8462 pr_err("'%s' regulator not found, rc=%ld\n", \
8463 name, PTR_ERR(var)); \
8464 var = NULL; \
8465 } \
8466 } \
8467} while (0)
8468
8469static int dsub_regulator(int on)
8470{
8471 static struct regulator *dsub_reg;
8472 static struct regulator *mpp0_reg;
8473 static int dsub_reg_enabled;
8474 int rc = 0;
8475
8476 _GET_REGULATOR(dsub_reg, "8901_l3");
8477 if (IS_ERR(dsub_reg)) {
8478 printk(KERN_ERR "%s: failed to get reg 8901_l3 err=%ld",
8479 __func__, PTR_ERR(dsub_reg));
8480 return PTR_ERR(dsub_reg);
8481 }
8482
8483 _GET_REGULATOR(mpp0_reg, "8901_mpp0");
8484 if (IS_ERR(mpp0_reg)) {
8485 printk(KERN_ERR "%s: failed to get reg 8901_mpp0 err=%ld",
8486 __func__, PTR_ERR(mpp0_reg));
8487 return PTR_ERR(mpp0_reg);
8488 }
8489
8490 if (on && !dsub_reg_enabled) {
8491 rc = regulator_set_voltage(dsub_reg, 3300000, 3300000);
8492 if (rc) {
8493 printk(KERN_ERR "%s: failed to set reg 8901_l3 voltage"
8494 " err=%d", __func__, rc);
8495 goto dsub_regulator_err;
8496 }
8497 rc = regulator_enable(dsub_reg);
8498 if (rc) {
8499 printk(KERN_ERR "%s: failed to enable reg 8901_l3"
8500 " err=%d", __func__, rc);
8501 goto dsub_regulator_err;
8502 }
8503 rc = regulator_enable(mpp0_reg);
8504 if (rc) {
8505 printk(KERN_ERR "%s: failed to enable reg 8901_mpp0"
8506 " err=%d", __func__, rc);
8507 goto dsub_regulator_err;
8508 }
8509 dsub_reg_enabled = 1;
8510 } else if (!on && dsub_reg_enabled) {
8511 rc = regulator_disable(dsub_reg);
8512 if (rc)
8513 printk(KERN_WARNING "%s: failed to disable reg 8901_l3"
8514 " err=%d", __func__, rc);
8515 rc = regulator_disable(mpp0_reg);
8516 if (rc)
8517 printk(KERN_WARNING "%s: failed to disable reg "
8518 "8901_mpp0 err=%d", __func__, rc);
8519 dsub_reg_enabled = 0;
8520 }
8521
8522 return rc;
8523
8524dsub_regulator_err:
8525 regulator_put(mpp0_reg);
8526 regulator_put(dsub_reg);
8527 return rc;
8528}
8529
8530static int display_power_on;
8531static void setup_display_power(void)
8532{
8533 if (display_power_on)
8534 if (lcdc_vga_enabled) {
8535 dsub_regulator(1);
8536 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 0);
8537 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 0);
8538 if (machine_is_msm8x60_ffa() ||
8539 machine_is_msm8x60_fusn_ffa())
8540 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 1);
8541 } else {
8542 dsub_regulator(0);
8543 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 1);
8544 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 1);
8545 if (machine_is_msm8x60_ffa() ||
8546 machine_is_msm8x60_fusn_ffa())
8547 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 0);
8548 }
8549 else {
8550 dsub_regulator(0);
8551 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa())
8552 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 0);
8553 /* BACKLIGHT */
8554 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 0);
8555 /* LVDS */
8556 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 0);
8557 }
8558}
8559
8560#define _GET_REGULATOR(var, name) do { \
8561 if (var == NULL) { \
8562 var = regulator_get(NULL, name); \
8563 if (IS_ERR(var)) { \
8564 pr_err("'%s' regulator not found, rc=%ld\n", \
8565 name, PTR_ERR(var)); \
8566 var = NULL; \
8567 } \
8568 } \
8569} while (0)
8570
8571#define GPIO_RESX_N (GPIO_EXPANDER_GPIO_BASE + 2)
8572
8573static void display_common_power(int on)
8574{
8575 int rc;
8576 static struct regulator *display_reg;
8577
8578 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
8579 machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8580 if (on) {
8581 /* LVDS */
8582 _GET_REGULATOR(display_reg, "8901_l2");
8583 if (!display_reg)
8584 return;
8585 rc = regulator_set_voltage(display_reg,
8586 3300000, 3300000);
8587 if (rc)
8588 goto out;
8589 rc = regulator_enable(display_reg);
8590 if (rc)
8591 goto out;
8592 rc = gpio_request(GPIO_LVDS_SHUTDOWN_N,
8593 "LVDS_STDN_OUT_N");
8594 if (rc) {
8595 printk(KERN_ERR "%s: LVDS gpio %d request"
8596 "failed\n", __func__,
8597 GPIO_LVDS_SHUTDOWN_N);
8598 goto out2;
8599 }
8600
8601 /* BACKLIGHT */
8602 rc = gpio_request(GPIO_BACKLIGHT_EN, "BACKLIGHT_EN");
8603 if (rc) {
8604 printk(KERN_ERR "%s: BACKLIGHT gpio %d request"
8605 "failed\n", __func__,
8606 GPIO_BACKLIGHT_EN);
8607 goto out3;
8608 }
8609
8610 if (machine_is_msm8x60_ffa() ||
8611 machine_is_msm8x60_fusn_ffa()) {
8612 rc = gpio_request(GPIO_DONGLE_PWR_EN,
8613 "DONGLE_PWR_EN");
8614 if (rc) {
8615 printk(KERN_ERR "%s: DONGLE_PWR_EN gpio"
8616 " %d request failed\n", __func__,
8617 GPIO_DONGLE_PWR_EN);
8618 goto out4;
8619 }
8620 }
8621
8622 gpio_direction_output(GPIO_LVDS_SHUTDOWN_N, 0);
8623 gpio_direction_output(GPIO_BACKLIGHT_EN, 0);
8624 if (machine_is_msm8x60_ffa() ||
8625 machine_is_msm8x60_fusn_ffa())
8626 gpio_direction_output(GPIO_DONGLE_PWR_EN, 0);
8627 mdelay(20);
8628 display_power_on = 1;
8629 setup_display_power();
8630 } else {
8631 if (display_power_on) {
8632 display_power_on = 0;
8633 setup_display_power();
8634 mdelay(20);
8635 if (machine_is_msm8x60_ffa() ||
8636 machine_is_msm8x60_fusn_ffa())
8637 gpio_free(GPIO_DONGLE_PWR_EN);
8638 goto out4;
8639 }
8640 }
8641 }
8642#if defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
8643 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA)
8644 else if (machine_is_msm8x60_fluid()) {
8645 static struct regulator *fluid_reg;
8646 static struct regulator *fluid_reg2;
8647
8648 if (on) {
8649 _GET_REGULATOR(fluid_reg, "8901_l2");
8650 if (!fluid_reg)
8651 return;
8652 _GET_REGULATOR(fluid_reg2, "8058_s3");
8653 if (!fluid_reg2) {
8654 regulator_put(fluid_reg);
8655 return;
8656 }
8657 rc = gpio_request(GPIO_RESX_N, "RESX_N");
8658 if (rc) {
8659 regulator_put(fluid_reg2);
8660 regulator_put(fluid_reg);
8661 return;
8662 }
8663 regulator_set_voltage(fluid_reg, 2850000, 2850000);
8664 regulator_set_voltage(fluid_reg2, 1800000, 1800000);
8665 regulator_enable(fluid_reg);
8666 regulator_enable(fluid_reg2);
8667 msleep(20);
8668 gpio_direction_output(GPIO_RESX_N, 0);
8669 udelay(10);
8670 gpio_set_value_cansleep(GPIO_RESX_N, 1);
8671 display_power_on = 1;
8672 setup_display_power();
8673 } else {
8674 gpio_set_value_cansleep(GPIO_RESX_N, 0);
8675 gpio_free(GPIO_RESX_N);
8676 msleep(20);
8677 regulator_disable(fluid_reg2);
8678 regulator_disable(fluid_reg);
8679 regulator_put(fluid_reg2);
8680 regulator_put(fluid_reg);
8681 display_power_on = 0;
8682 setup_display_power();
8683 fluid_reg = NULL;
8684 fluid_reg2 = NULL;
8685 }
8686 }
8687#endif
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04008688#if defined(CONFIG_FB_MSM_LCDC_NT35582_WVGA)
8689 else if (machine_is_msm8x60_dragon()) {
8690 static struct regulator *dragon_reg;
8691 static struct regulator *dragon_reg2;
8692
8693 if (on) {
8694 _GET_REGULATOR(dragon_reg, "8901_l2");
8695 if (!dragon_reg)
8696 return;
8697 _GET_REGULATOR(dragon_reg2, "8058_l16");
8698 if (!dragon_reg2) {
8699 regulator_put(dragon_reg);
8700 dragon_reg = NULL;
8701 return;
8702 }
8703
8704 rc = gpio_request(GPIO_NT35582_BL_EN, "lcdc_bl_en");
8705 if (rc) {
8706 pr_err("%s: gpio %d request failed with rc=%d\n",
8707 __func__, GPIO_NT35582_BL_EN, rc);
8708 regulator_put(dragon_reg);
8709 regulator_put(dragon_reg2);
8710 dragon_reg = NULL;
8711 dragon_reg2 = NULL;
8712 return;
8713 }
8714
8715 if (gpio_tlmm_config(GPIO_CFG(GPIO_NT35582_RESET, 0,
8716 GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN,
8717 GPIO_CFG_16MA), GPIO_CFG_ENABLE)) {
8718 pr_err("%s: config gpio '%d' failed!\n",
8719 __func__, GPIO_NT35582_RESET);
8720 gpio_free(GPIO_NT35582_BL_EN);
8721 regulator_put(dragon_reg);
8722 regulator_put(dragon_reg2);
8723 dragon_reg = NULL;
8724 dragon_reg2 = NULL;
8725 return;
8726 }
8727
8728 rc = gpio_request(GPIO_NT35582_RESET, "lcdc_reset");
8729 if (rc) {
8730 pr_err("%s: unable to request gpio %d (rc=%d)\n",
8731 __func__, GPIO_NT35582_RESET, rc);
8732 gpio_free(GPIO_NT35582_BL_EN);
8733 regulator_put(dragon_reg);
8734 regulator_put(dragon_reg2);
8735 dragon_reg = NULL;
8736 dragon_reg2 = NULL;
8737 return;
8738 }
8739
8740 regulator_set_voltage(dragon_reg, 3300000, 3300000);
8741 regulator_set_voltage(dragon_reg2, 1800000, 1800000);
8742 regulator_enable(dragon_reg);
8743 regulator_enable(dragon_reg2);
8744 msleep(20);
8745
8746 gpio_set_value_cansleep(GPIO_NT35582_RESET, 1);
8747 msleep(20);
8748 gpio_set_value_cansleep(GPIO_NT35582_RESET, 0);
8749 msleep(20);
8750 gpio_set_value_cansleep(GPIO_NT35582_RESET, 1);
8751 msleep(50);
8752
8753 gpio_set_value_cansleep(GPIO_NT35582_BL_EN, 1);
8754
8755 display_power_on = 1;
8756 } else if ((dragon_reg != NULL) && (dragon_reg2 != NULL)) {
8757 gpio_free(GPIO_NT35582_RESET);
8758 gpio_free(GPIO_NT35582_BL_EN);
8759 regulator_disable(dragon_reg2);
8760 regulator_disable(dragon_reg);
8761 regulator_put(dragon_reg2);
8762 regulator_put(dragon_reg);
8763 display_power_on = 0;
8764 dragon_reg = NULL;
8765 dragon_reg2 = NULL;
8766 }
8767 }
8768#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008769 return;
8770
8771out4:
8772 gpio_free(GPIO_BACKLIGHT_EN);
8773out3:
8774 gpio_free(GPIO_LVDS_SHUTDOWN_N);
8775out2:
8776 regulator_disable(display_reg);
8777out:
8778 regulator_put(display_reg);
8779 display_reg = NULL;
8780}
8781#undef _GET_REGULATOR
8782#endif
8783
8784static int mipi_dsi_panel_power(int on);
8785
8786#define LCDC_NUM_GPIO 28
8787#define LCDC_GPIO_START 0
8788
8789static void lcdc_samsung_panel_power(int on)
8790{
8791 int n, ret = 0;
8792
8793 display_common_power(on);
8794
8795 for (n = 0; n < LCDC_NUM_GPIO; n++) {
8796 if (on) {
8797 ret = gpio_request(LCDC_GPIO_START + n, "LCDC_GPIO");
8798 if (unlikely(ret)) {
8799 pr_err("%s not able to get gpio\n", __func__);
8800 break;
8801 }
8802 } else
8803 gpio_free(LCDC_GPIO_START + n);
8804 }
8805
8806 if (ret) {
8807 for (n--; n >= 0; n--)
8808 gpio_free(LCDC_GPIO_START + n);
8809 }
8810
8811 mipi_dsi_panel_power(0); /* set 8058_ldo0 to LPM */
8812}
8813
8814#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
8815#define _GET_REGULATOR(var, name) do { \
8816 var = regulator_get(NULL, name); \
8817 if (IS_ERR(var)) { \
8818 pr_err("'%s' regulator not found, rc=%ld\n", \
8819 name, IS_ERR(var)); \
8820 var = NULL; \
8821 return -ENODEV; \
8822 } \
8823} while (0)
8824
8825static int hdmi_enable_5v(int on)
8826{
8827 static struct regulator *reg_8901_hdmi_mvs; /* HDMI_5V */
8828 static struct regulator *reg_8901_mpp0; /* External 5V */
8829 static int prev_on;
8830 int rc;
8831
8832 if (on == prev_on)
8833 return 0;
8834
8835 if (!reg_8901_hdmi_mvs)
8836 _GET_REGULATOR(reg_8901_hdmi_mvs, "8901_hdmi_mvs");
8837 if (!reg_8901_mpp0)
8838 _GET_REGULATOR(reg_8901_mpp0, "8901_mpp0");
8839
8840 if (on) {
8841 rc = regulator_enable(reg_8901_mpp0);
8842 if (rc) {
8843 pr_err("'%s' regulator enable failed, rc=%d\n",
8844 "reg_8901_mpp0", rc);
8845 return rc;
8846 }
8847 rc = regulator_enable(reg_8901_hdmi_mvs);
8848 if (rc) {
8849 pr_err("'%s' regulator enable failed, rc=%d\n",
8850 "8901_hdmi_mvs", rc);
8851 return rc;
8852 }
8853 pr_info("%s(on): success\n", __func__);
8854 } else {
8855 rc = regulator_disable(reg_8901_hdmi_mvs);
8856 if (rc)
8857 pr_warning("'%s' regulator disable failed, rc=%d\n",
8858 "8901_hdmi_mvs", rc);
8859 rc = regulator_disable(reg_8901_mpp0);
8860 if (rc)
8861 pr_warning("'%s' regulator disable failed, rc=%d\n",
8862 "reg_8901_mpp0", rc);
8863 pr_info("%s(off): success\n", __func__);
8864 }
8865
8866 prev_on = on;
8867
8868 return 0;
8869}
8870
8871static int hdmi_core_power(int on, int show)
8872{
8873 static struct regulator *reg_8058_l16; /* VDD_HDMI */
8874 static int prev_on;
8875 int rc;
8876
8877 if (on == prev_on)
8878 return 0;
8879
8880 if (!reg_8058_l16)
8881 _GET_REGULATOR(reg_8058_l16, "8058_l16");
8882
8883 if (on) {
8884 rc = regulator_set_voltage(reg_8058_l16, 1800000, 1800000);
8885 if (!rc)
8886 rc = regulator_enable(reg_8058_l16);
8887 if (rc) {
8888 pr_err("'%s' regulator enable failed, rc=%d\n",
8889 "8058_l16", rc);
8890 return rc;
8891 }
8892 rc = gpio_request(170, "HDMI_DDC_CLK");
8893 if (rc) {
8894 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8895 "HDMI_DDC_CLK", 170, rc);
8896 goto error1;
8897 }
8898 rc = gpio_request(171, "HDMI_DDC_DATA");
8899 if (rc) {
8900 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8901 "HDMI_DDC_DATA", 171, rc);
8902 goto error2;
8903 }
8904 rc = gpio_request(172, "HDMI_HPD");
8905 if (rc) {
8906 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8907 "HDMI_HPD", 172, rc);
8908 goto error3;
8909 }
8910 pr_info("%s(on): success\n", __func__);
8911 } else {
8912 gpio_free(170);
8913 gpio_free(171);
8914 gpio_free(172);
8915 rc = regulator_disable(reg_8058_l16);
8916 if (rc)
8917 pr_warning("'%s' regulator disable failed, rc=%d\n",
8918 "8058_l16", rc);
8919 pr_info("%s(off): success\n", __func__);
8920 }
8921
8922 prev_on = on;
8923
8924 return 0;
8925
8926error3:
8927 gpio_free(171);
8928error2:
8929 gpio_free(170);
8930error1:
8931 regulator_disable(reg_8058_l16);
8932 return rc;
8933}
8934
8935static int hdmi_cec_power(int on)
8936{
8937 static struct regulator *reg_8901_l3; /* HDMI_CEC */
8938 static int prev_on;
8939 int rc;
8940
8941 if (on == prev_on)
8942 return 0;
8943
8944 if (!reg_8901_l3)
8945 _GET_REGULATOR(reg_8901_l3, "8901_l3");
8946
8947 if (on) {
8948 rc = regulator_set_voltage(reg_8901_l3, 3300000, 3300000);
8949 if (!rc)
8950 rc = regulator_enable(reg_8901_l3);
8951 if (rc) {
8952 pr_err("'%s' regulator enable failed, rc=%d\n",
8953 "8901_l3", rc);
8954 return rc;
8955 }
8956 rc = gpio_request(169, "HDMI_CEC_VAR");
8957 if (rc) {
8958 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8959 "HDMI_CEC_VAR", 169, rc);
8960 goto error;
8961 }
8962 pr_info("%s(on): success\n", __func__);
8963 } else {
8964 gpio_free(169);
8965 rc = regulator_disable(reg_8901_l3);
8966 if (rc)
8967 pr_warning("'%s' regulator disable failed, rc=%d\n",
8968 "8901_l3", rc);
8969 pr_info("%s(off): success\n", __func__);
8970 }
8971
8972 prev_on = on;
8973
8974 return 0;
8975error:
8976 regulator_disable(reg_8901_l3);
8977 return rc;
8978}
8979
8980#undef _GET_REGULATOR
8981
8982#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
8983
8984static int lcdc_panel_power(int on)
8985{
8986 int flag_on = !!on;
8987 static int lcdc_power_save_on;
8988
8989 if (lcdc_power_save_on == flag_on)
8990 return 0;
8991
8992 lcdc_power_save_on = flag_on;
8993
8994 lcdc_samsung_panel_power(on);
8995
8996 return 0;
8997}
8998
8999#ifdef CONFIG_MSM_BUS_SCALING
Nagamalleswararao Ganji5fabbd62011-11-06 23:10:43 -08009000
9001static struct msm_bus_vectors rotator_init_vectors[] = {
9002 {
9003 .src = MSM_BUS_MASTER_ROTATOR,
9004 .dst = MSM_BUS_SLAVE_SMI,
9005 .ab = 0,
9006 .ib = 0,
9007 },
9008 {
9009 .src = MSM_BUS_MASTER_ROTATOR,
9010 .dst = MSM_BUS_SLAVE_EBI_CH0,
9011 .ab = 0,
9012 .ib = 0,
9013 },
9014};
9015
9016static struct msm_bus_vectors rotator_ui_vectors[] = {
9017 {
9018 .src = MSM_BUS_MASTER_ROTATOR,
9019 .dst = MSM_BUS_SLAVE_SMI,
9020 .ab = 0,
9021 .ib = 0,
9022 },
9023 {
9024 .src = MSM_BUS_MASTER_ROTATOR,
9025 .dst = MSM_BUS_SLAVE_EBI_CH0,
9026 .ab = (1024 * 600 * 4 * 2 * 60),
9027 .ib = (1024 * 600 * 4 * 2 * 60 * 1.5),
9028 },
9029};
9030
9031static struct msm_bus_vectors rotator_vga_vectors[] = {
9032 {
9033 .src = MSM_BUS_MASTER_ROTATOR,
9034 .dst = MSM_BUS_SLAVE_SMI,
9035 .ab = (640 * 480 * 2 * 2 * 30),
9036 .ib = (640 * 480 * 2 * 2 * 30 * 1.5),
9037 },
9038 {
9039 .src = MSM_BUS_MASTER_ROTATOR,
9040 .dst = MSM_BUS_SLAVE_EBI_CH0,
9041 .ab = (640 * 480 * 2 * 2 * 30),
9042 .ib = (640 * 480 * 2 * 2 * 30 * 1.5),
9043 },
9044};
9045
9046static struct msm_bus_vectors rotator_720p_vectors[] = {
9047 {
9048 .src = MSM_BUS_MASTER_ROTATOR,
9049 .dst = MSM_BUS_SLAVE_SMI,
9050 .ab = (1280 * 736 * 2 * 2 * 30),
9051 .ib = (1280 * 736 * 2 * 2 * 30 * 1.5),
9052 },
9053 {
9054 .src = MSM_BUS_MASTER_ROTATOR,
9055 .dst = MSM_BUS_SLAVE_EBI_CH0,
9056 .ab = (1280 * 736 * 2 * 2 * 30),
9057 .ib = (1280 * 736 * 2 * 2 * 30 * 1.5),
9058 },
9059};
9060
9061static struct msm_bus_vectors rotator_1080p_vectors[] = {
9062 {
9063 .src = MSM_BUS_MASTER_ROTATOR,
9064 .dst = MSM_BUS_SLAVE_SMI,
9065 .ab = (1920 * 1088 * 2 * 2 * 30),
9066 .ib = (1920 * 1088 * 2 * 2 * 30 * 1.5),
9067 },
9068 {
9069 .src = MSM_BUS_MASTER_ROTATOR,
9070 .dst = MSM_BUS_SLAVE_EBI_CH0,
9071 .ab = (1920 * 1088 * 2 * 2 * 30),
9072 .ib = (1920 * 1088 * 2 * 2 * 30 * 1.5),
9073 },
9074};
9075
9076static struct msm_bus_paths rotator_bus_scale_usecases[] = {
9077 {
9078 ARRAY_SIZE(rotator_init_vectors),
9079 rotator_init_vectors,
9080 },
9081 {
9082 ARRAY_SIZE(rotator_ui_vectors),
9083 rotator_ui_vectors,
9084 },
9085 {
9086 ARRAY_SIZE(rotator_vga_vectors),
9087 rotator_vga_vectors,
9088 },
9089 {
9090 ARRAY_SIZE(rotator_720p_vectors),
9091 rotator_720p_vectors,
9092 },
9093 {
9094 ARRAY_SIZE(rotator_1080p_vectors),
9095 rotator_1080p_vectors,
9096 },
9097};
9098
9099struct msm_bus_scale_pdata rotator_bus_scale_pdata = {
9100 rotator_bus_scale_usecases,
9101 ARRAY_SIZE(rotator_bus_scale_usecases),
9102 .name = "rotator",
9103};
9104
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009105static struct msm_bus_vectors mdp_init_vectors[] = {
9106 /* For now, 0th array entry is reserved.
9107 * Please leave 0 as is and don't use it
9108 */
9109 {
9110 .src = MSM_BUS_MASTER_MDP_PORT0,
9111 .dst = MSM_BUS_SLAVE_SMI,
9112 .ab = 0,
9113 .ib = 0,
9114 },
9115 /* Master and slaves can be from different fabrics */
9116 {
9117 .src = MSM_BUS_MASTER_MDP_PORT0,
9118 .dst = MSM_BUS_SLAVE_EBI_CH0,
9119 .ab = 0,
9120 .ib = 0,
9121 },
9122};
9123
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009124#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
9125static struct msm_bus_vectors hdmi_as_primary_vectors[] = {
9126 /* If HDMI is used as primary */
9127 {
9128 .src = MSM_BUS_MASTER_MDP_PORT0,
9129 .dst = MSM_BUS_SLAVE_SMI,
9130 .ab = 2000000000,
9131 .ib = 2000000000,
9132 },
9133 /* Master and slaves can be from different fabrics */
9134 {
9135 .src = MSM_BUS_MASTER_MDP_PORT0,
9136 .dst = MSM_BUS_SLAVE_EBI_CH0,
9137 .ab = 2000000000,
9138 .ib = 2000000000,
9139 },
9140};
9141
9142static struct msm_bus_paths mdp_bus_scale_usecases[] = {
9143 {
9144 ARRAY_SIZE(mdp_init_vectors),
9145 mdp_init_vectors,
9146 },
9147 {
9148 ARRAY_SIZE(hdmi_as_primary_vectors),
9149 hdmi_as_primary_vectors,
9150 },
9151 {
9152 ARRAY_SIZE(hdmi_as_primary_vectors),
9153 hdmi_as_primary_vectors,
9154 },
9155 {
9156 ARRAY_SIZE(hdmi_as_primary_vectors),
9157 hdmi_as_primary_vectors,
9158 },
9159 {
9160 ARRAY_SIZE(hdmi_as_primary_vectors),
9161 hdmi_as_primary_vectors,
9162 },
9163 {
9164 ARRAY_SIZE(hdmi_as_primary_vectors),
9165 hdmi_as_primary_vectors,
9166 },
9167};
9168#else
9169#ifdef CONFIG_FB_MSM_LCDC_DSUB
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009170static struct msm_bus_vectors mdp_sd_smi_vectors[] = {
9171 /* Default case static display/UI/2d/3d if FB SMI */
9172 {
9173 .src = MSM_BUS_MASTER_MDP_PORT0,
9174 .dst = MSM_BUS_SLAVE_SMI,
9175 .ab = 388800000,
9176 .ib = 486000000,
9177 },
9178 /* Master and slaves can be from different fabrics */
9179 {
9180 .src = MSM_BUS_MASTER_MDP_PORT0,
9181 .dst = MSM_BUS_SLAVE_EBI_CH0,
9182 .ab = 0,
9183 .ib = 0,
9184 },
9185};
9186
9187static struct msm_bus_vectors mdp_sd_ebi_vectors[] = {
9188 /* Default case static display/UI/2d/3d if FB SMI */
9189 {
9190 .src = MSM_BUS_MASTER_MDP_PORT0,
9191 .dst = MSM_BUS_SLAVE_SMI,
9192 .ab = 0,
9193 .ib = 0,
9194 },
9195 /* Master and slaves can be from different fabrics */
9196 {
9197 .src = MSM_BUS_MASTER_MDP_PORT0,
9198 .dst = MSM_BUS_SLAVE_EBI_CH0,
9199 .ab = 388800000,
9200 .ib = 486000000 * 2,
9201 },
9202};
9203static struct msm_bus_vectors mdp_vga_vectors[] = {
9204 /* VGA and less video */
9205 {
9206 .src = MSM_BUS_MASTER_MDP_PORT0,
9207 .dst = MSM_BUS_SLAVE_SMI,
9208 .ab = 458092800,
9209 .ib = 572616000,
9210 },
9211 {
9212 .src = MSM_BUS_MASTER_MDP_PORT0,
9213 .dst = MSM_BUS_SLAVE_EBI_CH0,
9214 .ab = 458092800,
9215 .ib = 572616000 * 2,
9216 },
9217};
9218static struct msm_bus_vectors mdp_720p_vectors[] = {
9219 /* 720p and less video */
9220 {
9221 .src = MSM_BUS_MASTER_MDP_PORT0,
9222 .dst = MSM_BUS_SLAVE_SMI,
9223 .ab = 471744000,
9224 .ib = 589680000,
9225 },
9226 /* Master and slaves can be from different fabrics */
9227 {
9228 .src = MSM_BUS_MASTER_MDP_PORT0,
9229 .dst = MSM_BUS_SLAVE_EBI_CH0,
9230 .ab = 471744000,
9231 .ib = 589680000 * 2,
9232 },
9233};
9234
9235static struct msm_bus_vectors mdp_1080p_vectors[] = {
9236 /* 1080p and less video */
9237 {
9238 .src = MSM_BUS_MASTER_MDP_PORT0,
9239 .dst = MSM_BUS_SLAVE_SMI,
9240 .ab = 575424000,
9241 .ib = 719280000,
9242 },
9243 /* Master and slaves can be from different fabrics */
9244 {
9245 .src = MSM_BUS_MASTER_MDP_PORT0,
9246 .dst = MSM_BUS_SLAVE_EBI_CH0,
9247 .ab = 575424000,
9248 .ib = 719280000 * 2,
9249 },
9250};
9251
9252#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009253static struct msm_bus_vectors mdp_sd_smi_vectors[] = {
9254 /* Default case static display/UI/2d/3d if FB SMI */
9255 {
9256 .src = MSM_BUS_MASTER_MDP_PORT0,
9257 .dst = MSM_BUS_SLAVE_SMI,
9258 .ab = 175110000,
9259 .ib = 218887500,
9260 },
9261 /* Master and slaves can be from different fabrics */
9262 {
9263 .src = MSM_BUS_MASTER_MDP_PORT0,
9264 .dst = MSM_BUS_SLAVE_EBI_CH0,
9265 .ab = 0,
9266 .ib = 0,
9267 },
9268};
9269
9270static struct msm_bus_vectors mdp_sd_ebi_vectors[] = {
9271 /* Default case static display/UI/2d/3d if FB SMI */
9272 {
9273 .src = MSM_BUS_MASTER_MDP_PORT0,
9274 .dst = MSM_BUS_SLAVE_SMI,
9275 .ab = 0,
9276 .ib = 0,
9277 },
9278 /* Master and slaves can be from different fabrics */
9279 {
9280 .src = MSM_BUS_MASTER_MDP_PORT0,
9281 .dst = MSM_BUS_SLAVE_EBI_CH0,
9282 .ab = 216000000,
9283 .ib = 270000000 * 2,
9284 },
9285};
9286static struct msm_bus_vectors mdp_vga_vectors[] = {
9287 /* VGA and less video */
9288 {
9289 .src = MSM_BUS_MASTER_MDP_PORT0,
9290 .dst = MSM_BUS_SLAVE_SMI,
9291 .ab = 216000000,
9292 .ib = 270000000,
9293 },
9294 {
9295 .src = MSM_BUS_MASTER_MDP_PORT0,
9296 .dst = MSM_BUS_SLAVE_EBI_CH0,
9297 .ab = 216000000,
9298 .ib = 270000000 * 2,
9299 },
9300};
9301
9302static struct msm_bus_vectors mdp_720p_vectors[] = {
9303 /* 720p and less video */
9304 {
9305 .src = MSM_BUS_MASTER_MDP_PORT0,
9306 .dst = MSM_BUS_SLAVE_SMI,
9307 .ab = 230400000,
9308 .ib = 288000000,
9309 },
9310 /* Master and slaves can be from different fabrics */
9311 {
9312 .src = MSM_BUS_MASTER_MDP_PORT0,
9313 .dst = MSM_BUS_SLAVE_EBI_CH0,
9314 .ab = 230400000,
9315 .ib = 288000000 * 2,
9316 },
9317};
9318
9319static struct msm_bus_vectors mdp_1080p_vectors[] = {
9320 /* 1080p and less video */
9321 {
9322 .src = MSM_BUS_MASTER_MDP_PORT0,
9323 .dst = MSM_BUS_SLAVE_SMI,
9324 .ab = 334080000,
9325 .ib = 417600000,
9326 },
9327 /* Master and slaves can be from different fabrics */
9328 {
9329 .src = MSM_BUS_MASTER_MDP_PORT0,
9330 .dst = MSM_BUS_SLAVE_EBI_CH0,
9331 .ab = 334080000,
Ravishangar Kalyanam731beb92011-07-07 18:27:32 -07009332 .ib = 550000000 * 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009333 },
9334};
9335
9336#endif
9337static struct msm_bus_paths mdp_bus_scale_usecases[] = {
9338 {
9339 ARRAY_SIZE(mdp_init_vectors),
9340 mdp_init_vectors,
9341 },
9342 {
9343 ARRAY_SIZE(mdp_sd_smi_vectors),
9344 mdp_sd_smi_vectors,
9345 },
9346 {
9347 ARRAY_SIZE(mdp_sd_ebi_vectors),
9348 mdp_sd_ebi_vectors,
9349 },
9350 {
9351 ARRAY_SIZE(mdp_vga_vectors),
9352 mdp_vga_vectors,
9353 },
9354 {
9355 ARRAY_SIZE(mdp_720p_vectors),
9356 mdp_720p_vectors,
9357 },
9358 {
9359 ARRAY_SIZE(mdp_1080p_vectors),
9360 mdp_1080p_vectors,
9361 },
9362};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009363#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009364static struct msm_bus_scale_pdata mdp_bus_scale_pdata = {
9365 mdp_bus_scale_usecases,
9366 ARRAY_SIZE(mdp_bus_scale_usecases),
9367 .name = "mdp",
9368};
9369
9370#endif
9371#ifdef CONFIG_MSM_BUS_SCALING
9372static struct msm_bus_vectors dtv_bus_init_vectors[] = {
9373 /* For now, 0th array entry is reserved.
9374 * Please leave 0 as is and don't use it
9375 */
9376 {
9377 .src = MSM_BUS_MASTER_MDP_PORT0,
9378 .dst = MSM_BUS_SLAVE_SMI,
9379 .ab = 0,
9380 .ib = 0,
9381 },
9382 /* Master and slaves can be from different fabrics */
9383 {
9384 .src = MSM_BUS_MASTER_MDP_PORT0,
9385 .dst = MSM_BUS_SLAVE_EBI_CH0,
9386 .ab = 0,
9387 .ib = 0,
9388 },
9389};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009390#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
9391static struct msm_bus_vectors dtv_bus_def_vectors[] = {
9392 /* For now, 0th array entry is reserved.
9393 * Please leave 0 as is and don't use it
9394 */
9395 {
9396 .src = MSM_BUS_MASTER_MDP_PORT0,
9397 .dst = MSM_BUS_SLAVE_SMI,
9398 .ab = 2000000000,
9399 .ib = 2000000000,
9400 },
9401 /* Master and slaves can be from different fabrics */
9402 {
9403 .src = MSM_BUS_MASTER_MDP_PORT0,
9404 .dst = MSM_BUS_SLAVE_EBI_CH0,
9405 .ab = 2000000000,
9406 .ib = 2000000000,
9407 },
9408};
9409#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009410static struct msm_bus_vectors dtv_bus_def_vectors[] = {
9411 /* For now, 0th array entry is reserved.
9412 * Please leave 0 as is and don't use it
9413 */
9414 {
9415 .src = MSM_BUS_MASTER_MDP_PORT0,
9416 .dst = MSM_BUS_SLAVE_SMI,
9417 .ab = 566092800,
9418 .ib = 707616000,
9419 },
9420 /* Master and slaves can be from different fabrics */
9421 {
9422 .src = MSM_BUS_MASTER_MDP_PORT0,
9423 .dst = MSM_BUS_SLAVE_EBI_CH0,
9424 .ab = 566092800,
9425 .ib = 707616000,
9426 },
9427};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009428#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009429static struct msm_bus_paths dtv_bus_scale_usecases[] = {
9430 {
9431 ARRAY_SIZE(dtv_bus_init_vectors),
9432 dtv_bus_init_vectors,
9433 },
9434 {
9435 ARRAY_SIZE(dtv_bus_def_vectors),
9436 dtv_bus_def_vectors,
9437 },
9438};
9439static struct msm_bus_scale_pdata dtv_bus_scale_pdata = {
9440 dtv_bus_scale_usecases,
9441 ARRAY_SIZE(dtv_bus_scale_usecases),
9442 .name = "dtv",
9443};
9444
9445static struct lcdc_platform_data dtv_pdata = {
9446 .bus_scale_table = &dtv_bus_scale_pdata,
9447};
9448#endif
9449
9450
9451static struct lcdc_platform_data lcdc_pdata = {
9452 .lcdc_power_save = lcdc_panel_power,
9453};
9454
9455
9456#define MDP_VSYNC_GPIO 28
9457
9458/*
9459 * MIPI_DSI only use 8058_LDO0 which need always on
9460 * therefore it need to be put at low power mode if
9461 * it was not used instead of turn it off.
9462 */
9463static int mipi_dsi_panel_power(int on)
9464{
9465 int flag_on = !!on;
9466 static int mipi_dsi_power_save_on;
9467 static struct regulator *ldo0;
9468 int rc = 0;
9469
9470 if (mipi_dsi_power_save_on == flag_on)
9471 return 0;
9472
9473 mipi_dsi_power_save_on = flag_on;
9474
9475 if (ldo0 == NULL) { /* init */
9476 ldo0 = regulator_get(NULL, "8058_l0");
9477 if (IS_ERR(ldo0)) {
9478 pr_debug("%s: LDO0 failed\n", __func__);
9479 rc = PTR_ERR(ldo0);
9480 return rc;
9481 }
9482
9483 rc = regulator_set_voltage(ldo0, 1200000, 1200000);
9484 if (rc)
9485 goto out;
9486
9487 rc = regulator_enable(ldo0);
9488 if (rc)
9489 goto out;
9490 }
9491
9492 if (on) {
9493 /* set ldo0 to HPM */
9494 rc = regulator_set_optimum_mode(ldo0, 100000);
9495 if (rc < 0)
9496 goto out;
9497 } else {
9498 /* set ldo0 to LPM */
Padmanabhan Komanduru0b478ff2011-11-22 19:15:40 +05309499 rc = regulator_set_optimum_mode(ldo0, 1000);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009500 if (rc < 0)
9501 goto out;
9502 }
9503
9504 return 0;
9505out:
9506 regulator_disable(ldo0);
9507 regulator_put(ldo0);
9508 ldo0 = NULL;
9509 return rc;
9510}
9511
9512static struct mipi_dsi_platform_data mipi_dsi_pdata = {
9513 .vsync_gpio = MDP_VSYNC_GPIO,
9514 .dsi_power_save = mipi_dsi_panel_power,
9515};
9516
9517#ifdef CONFIG_FB_MSM_TVOUT
9518static struct regulator *reg_8058_l13;
9519
9520static int atv_dac_power(int on)
9521{
9522 int rc = 0;
9523 #define _GET_REGULATOR(var, name) do { \
9524 var = regulator_get(NULL, name); \
9525 if (IS_ERR(var)) { \
9526 pr_info("'%s' regulator not found, rc=%ld\n", \
9527 name, IS_ERR(var)); \
9528 var = NULL; \
9529 return -ENODEV; \
9530 } \
9531 } while (0)
9532
9533 if (!reg_8058_l13)
9534 _GET_REGULATOR(reg_8058_l13, "8058_l13");
9535 #undef _GET_REGULATOR
9536
9537 if (on) {
9538 rc = regulator_set_voltage(reg_8058_l13, 2050000, 2050000);
9539 if (rc) {
9540 pr_info("%s: '%s' regulator set voltage failed,\
9541 rc=%d\n", __func__, "8058_l13", rc);
9542 return rc;
9543 }
9544
9545 rc = regulator_enable(reg_8058_l13);
9546 if (rc) {
9547 pr_err("%s: '%s' regulator enable failed,\
9548 rc=%d\n", __func__, "8058_l13", rc);
9549 return rc;
9550 }
9551 } else {
9552 rc = regulator_force_disable(reg_8058_l13);
9553 if (rc)
9554 pr_warning("%s: '%s' regulator disable failed, rc=%d\n",
9555 __func__, "8058_l13", rc);
9556 }
9557 return rc;
9558
9559}
9560#endif
9561
9562#ifdef CONFIG_FB_MSM_MIPI_DSI
9563int mdp_core_clk_rate_table[] = {
9564 85330000,
9565 85330000,
9566 160000000,
9567 200000000,
9568};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009569#elif defined(CONFIG_FB_MSM_HDMI_AS_PRIMARY)
9570int mdp_core_clk_rate_table[] = {
9571 200000000,
9572 200000000,
9573 200000000,
9574 200000000,
9575};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009576#else
9577int mdp_core_clk_rate_table[] = {
9578 59080000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009579 85330000,
kuogee hsieh26791a92011-08-01 18:35:58 -07009580 128000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009581 200000000,
9582};
9583#endif
9584
9585static struct msm_panel_common_pdata mdp_pdata = {
9586 .gpio = MDP_VSYNC_GPIO,
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009587#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
9588 .mdp_core_clk_rate = 200000000,
9589#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009590 .mdp_core_clk_rate = 59080000,
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009591#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009592 .mdp_core_clk_table = mdp_core_clk_rate_table,
9593 .num_mdp_clk = ARRAY_SIZE(mdp_core_clk_rate_table),
9594#ifdef CONFIG_MSM_BUS_SCALING
9595 .mdp_bus_scale_table = &mdp_bus_scale_pdata,
9596#endif
9597 .mdp_rev = MDP_REV_41,
Nagamalleswararao Ganji937a1192011-12-07 19:00:52 -08009598#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
9599 .mem_hid = ION_CP_WB_HEAP_ID,
9600#else
9601 .mem_hid = MEMTYPE_EBI1,
9602#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009603};
9604
Huaibin Yanga5419422011-12-08 23:52:10 -08009605static void __init reserve_mdp_memory(void)
9606{
Nagamalleswararao Ganji937a1192011-12-07 19:00:52 -08009607 mdp_pdata.ov0_wb_size = MSM_FB_OVERLAY0_WRITEBACK_SIZE;
9608 mdp_pdata.ov1_wb_size = MSM_FB_OVERLAY1_WRITEBACK_SIZE;
9609#if defined(CONFIG_ANDROID_PMEM) && !defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
9610 msm8x60_reserve_table[mdp_pdata.mem_hid].size +=
9611 mdp_pdata.ov0_wb_size;
9612 msm8x60_reserve_table[mdp_pdata.mem_hid].size +=
9613 mdp_pdata.ov1_wb_size;
9614#endif
Huaibin Yanga5419422011-12-08 23:52:10 -08009615}
9616
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009617#ifdef CONFIG_FB_MSM_TVOUT
9618
9619#ifdef CONFIG_MSM_BUS_SCALING
9620static struct msm_bus_vectors atv_bus_init_vectors[] = {
9621 /* For now, 0th array entry is reserved.
9622 * Please leave 0 as is and don't use it
9623 */
9624 {
9625 .src = MSM_BUS_MASTER_MDP_PORT0,
9626 .dst = MSM_BUS_SLAVE_SMI,
9627 .ab = 0,
9628 .ib = 0,
9629 },
9630 /* Master and slaves can be from different fabrics */
9631 {
9632 .src = MSM_BUS_MASTER_MDP_PORT0,
9633 .dst = MSM_BUS_SLAVE_EBI_CH0,
9634 .ab = 0,
9635 .ib = 0,
9636 },
9637};
9638static struct msm_bus_vectors atv_bus_def_vectors[] = {
9639 /* For now, 0th array entry is reserved.
9640 * Please leave 0 as is and don't use it
9641 */
9642 {
9643 .src = MSM_BUS_MASTER_MDP_PORT0,
9644 .dst = MSM_BUS_SLAVE_SMI,
9645 .ab = 236390400,
9646 .ib = 265939200,
9647 },
9648 /* Master and slaves can be from different fabrics */
9649 {
9650 .src = MSM_BUS_MASTER_MDP_PORT0,
9651 .dst = MSM_BUS_SLAVE_EBI_CH0,
9652 .ab = 236390400,
9653 .ib = 265939200,
9654 },
9655};
9656static struct msm_bus_paths atv_bus_scale_usecases[] = {
9657 {
9658 ARRAY_SIZE(atv_bus_init_vectors),
9659 atv_bus_init_vectors,
9660 },
9661 {
9662 ARRAY_SIZE(atv_bus_def_vectors),
9663 atv_bus_def_vectors,
9664 },
9665};
9666static struct msm_bus_scale_pdata atv_bus_scale_pdata = {
9667 atv_bus_scale_usecases,
9668 ARRAY_SIZE(atv_bus_scale_usecases),
9669 .name = "atv",
9670};
9671#endif
9672
9673static struct tvenc_platform_data atv_pdata = {
9674 .poll = 0,
9675 .pm_vid_en = atv_dac_power,
9676#ifdef CONFIG_MSM_BUS_SCALING
9677 .bus_scale_table = &atv_bus_scale_pdata,
9678#endif
9679};
9680#endif
9681
9682static void __init msm_fb_add_devices(void)
9683{
9684#ifdef CONFIG_FB_MSM_LCDC_DSUB
9685 mdp_pdata.mdp_core_clk_table = NULL;
9686 mdp_pdata.num_mdp_clk = 0;
9687 mdp_pdata.mdp_core_clk_rate = 200000000;
9688#endif
9689 if (machine_is_msm8x60_rumi3())
9690 msm_fb_register_device("mdp", NULL);
9691 else
9692 msm_fb_register_device("mdp", &mdp_pdata);
9693
9694 msm_fb_register_device("lcdc", &lcdc_pdata);
9695 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
9696#ifdef CONFIG_MSM_BUS_SCALING
9697 msm_fb_register_device("dtv", &dtv_pdata);
9698#endif
9699#ifdef CONFIG_FB_MSM_TVOUT
9700 msm_fb_register_device("tvenc", &atv_pdata);
9701 msm_fb_register_device("tvout_device", NULL);
9702#endif
9703}
9704
9705#if (defined(CONFIG_MARIMBA_CORE)) && \
9706 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
9707
9708static const struct {
9709 char *name;
9710 int vmin;
9711 int vmax;
9712} bt_regs_info[] = {
9713 { "8058_s3", 1800000, 1800000 },
9714 { "8058_s2", 1300000, 1300000 },
9715 { "8058_l8", 2900000, 3050000 },
9716};
9717
9718static struct {
9719 bool enabled;
9720} bt_regs_status[] = {
9721 { false },
9722 { false },
9723 { false },
9724};
9725static struct regulator *bt_regs[ARRAY_SIZE(bt_regs_info)];
9726
9727static int bahama_bt(int on)
9728{
9729 int rc;
9730 int i;
9731 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
9732
9733 struct bahama_variant_register {
9734 const size_t size;
9735 const struct bahama_config_register *set;
9736 };
9737
9738 const struct bahama_config_register *p;
9739
9740 u8 version;
9741
9742 const struct bahama_config_register v10_bt_on[] = {
9743 { 0xE9, 0x00, 0xFF },
9744 { 0xF4, 0x80, 0xFF },
9745 { 0xE4, 0x00, 0xFF },
9746 { 0xE5, 0x00, 0x0F },
9747#ifdef CONFIG_WLAN
9748 { 0xE6, 0x38, 0x7F },
9749 { 0xE7, 0x06, 0xFF },
9750#endif
9751 { 0xE9, 0x21, 0xFF },
9752 { 0x01, 0x0C, 0x1F },
9753 { 0x01, 0x08, 0x1F },
9754 };
9755
9756 const struct bahama_config_register v20_bt_on_fm_off[] = {
9757 { 0x11, 0x0C, 0xFF },
9758 { 0x13, 0x01, 0xFF },
9759 { 0xF4, 0x80, 0xFF },
9760 { 0xF0, 0x00, 0xFF },
9761 { 0xE9, 0x00, 0xFF },
9762#ifdef CONFIG_WLAN
9763 { 0x81, 0x00, 0x7F },
9764 { 0x82, 0x00, 0xFF },
9765 { 0xE6, 0x38, 0x7F },
9766 { 0xE7, 0x06, 0xFF },
9767#endif
9768 { 0xE9, 0x21, 0xFF },
9769 };
9770
9771 const struct bahama_config_register v20_bt_on_fm_on[] = {
9772 { 0x11, 0x0C, 0xFF },
9773 { 0x13, 0x01, 0xFF },
9774 { 0xF4, 0x86, 0xFF },
9775 { 0xF0, 0x06, 0xFF },
9776 { 0xE9, 0x00, 0xFF },
9777#ifdef CONFIG_WLAN
9778 { 0x81, 0x00, 0x7F },
9779 { 0x82, 0x00, 0xFF },
9780 { 0xE6, 0x38, 0x7F },
9781 { 0xE7, 0x06, 0xFF },
9782#endif
9783 { 0xE9, 0x21, 0xFF },
9784 };
9785
9786 const struct bahama_config_register v10_bt_off[] = {
9787 { 0xE9, 0x00, 0xFF },
9788 };
9789
9790 const struct bahama_config_register v20_bt_off_fm_off[] = {
9791 { 0xF4, 0x84, 0xFF },
9792 { 0xF0, 0x04, 0xFF },
9793 { 0xE9, 0x00, 0xFF }
9794 };
9795
9796 const struct bahama_config_register v20_bt_off_fm_on[] = {
9797 { 0xF4, 0x86, 0xFF },
9798 { 0xF0, 0x06, 0xFF },
9799 { 0xE9, 0x00, 0xFF }
9800 };
9801 const struct bahama_variant_register bt_bahama[2][3] = {
9802 {
9803 { ARRAY_SIZE(v10_bt_off), v10_bt_off },
9804 { ARRAY_SIZE(v20_bt_off_fm_off), v20_bt_off_fm_off },
9805 { ARRAY_SIZE(v20_bt_off_fm_on), v20_bt_off_fm_on }
9806 },
9807 {
9808 { ARRAY_SIZE(v10_bt_on), v10_bt_on },
9809 { ARRAY_SIZE(v20_bt_on_fm_off), v20_bt_on_fm_off },
9810 { ARRAY_SIZE(v20_bt_on_fm_on), v20_bt_on_fm_on }
9811 }
9812 };
9813
9814 u8 offset = 0; /* index into bahama configs */
9815
9816 on = on ? 1 : 0;
9817 version = read_bahama_ver();
9818
9819 if (version == VER_UNSUPPORTED) {
9820 dev_err(&msm_bt_power_device.dev,
9821 "%s: unsupported version\n",
9822 __func__);
9823 return -EIO;
9824 }
9825
9826 if (version == VER_2_0) {
9827 if (marimba_get_fm_status(&config))
9828 offset = 0x01;
9829 }
9830
9831 /* Voting off 1.3V S2 Regulator,BahamaV2 used in Normal mode */
9832 if (on && (version == VER_2_0)) {
9833 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9834 if ((!strcmp(bt_regs_info[i].name, "8058_s2"))
9835 && (bt_regs_status[i].enabled == true)) {
9836 if (regulator_disable(bt_regs[i])) {
9837 dev_err(&msm_bt_power_device.dev,
9838 "%s: regulator disable failed",
9839 __func__);
9840 }
9841 bt_regs_status[i].enabled = false;
9842 break;
9843 }
9844 }
9845 }
9846
9847 p = bt_bahama[on][version + offset].set;
9848
9849 dev_info(&msm_bt_power_device.dev,
9850 "%s: found version %d\n", __func__, version);
9851
9852 for (i = 0; i < bt_bahama[on][version + offset].size; i++) {
9853 u8 value = (p+i)->value;
9854 rc = marimba_write_bit_mask(&config,
9855 (p+i)->reg,
9856 &value,
9857 sizeof((p+i)->value),
9858 (p+i)->mask);
9859 if (rc < 0) {
9860 dev_err(&msm_bt_power_device.dev,
9861 "%s: reg %d write failed: %d\n",
9862 __func__, (p+i)->reg, rc);
9863 return rc;
9864 }
9865 dev_dbg(&msm_bt_power_device.dev,
9866 "%s: reg 0x%02x write value 0x%02x mask 0x%02x\n",
9867 __func__, (p+i)->reg,
9868 value, (p+i)->mask);
9869 }
9870 /* Update BT Status */
9871 if (on)
9872 marimba_set_bt_status(&config, true);
9873 else
9874 marimba_set_bt_status(&config, false);
9875
9876 return 0;
9877}
9878
9879static int bluetooth_use_regulators(int on)
9880{
9881 int i, recover = -1, rc = 0;
9882
9883 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9884 bt_regs[i] = on ? regulator_get(&msm_bt_power_device.dev,
9885 bt_regs_info[i].name) :
9886 (regulator_put(bt_regs[i]), NULL);
9887 if (IS_ERR(bt_regs[i])) {
9888 rc = PTR_ERR(bt_regs[i]);
9889 dev_err(&msm_bt_power_device.dev,
9890 "regulator %s get failed (%d)\n",
9891 bt_regs_info[i].name, rc);
9892 recover = i - 1;
9893 bt_regs[i] = NULL;
9894 break;
9895 }
9896
9897 if (!on)
9898 continue;
9899
9900 rc = regulator_set_voltage(bt_regs[i],
9901 bt_regs_info[i].vmin,
9902 bt_regs_info[i].vmax);
9903 if (rc < 0) {
9904 dev_err(&msm_bt_power_device.dev,
9905 "regulator %s voltage set (%d)\n",
9906 bt_regs_info[i].name, rc);
9907 recover = i;
9908 break;
9909 }
9910 }
9911
9912 if (on && (recover > -1))
9913 for (i = recover; i >= 0; i--) {
9914 regulator_put(bt_regs[i]);
9915 bt_regs[i] = NULL;
9916 }
9917
9918 return rc;
9919}
9920
9921static int bluetooth_switch_regulators(int on)
9922{
9923 int i, rc = 0;
9924
9925 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9926 if (on && (bt_regs_status[i].enabled == false)) {
9927 rc = regulator_enable(bt_regs[i]);
9928 if (rc < 0) {
9929 dev_err(&msm_bt_power_device.dev,
9930 "regulator %s %s failed (%d)\n",
9931 bt_regs_info[i].name,
9932 "enable", rc);
9933 if (i > 0) {
9934 while (--i) {
9935 regulator_disable(bt_regs[i]);
9936 bt_regs_status[i].enabled
9937 = false;
9938 }
9939 break;
9940 }
9941 }
9942 bt_regs_status[i].enabled = true;
9943 } else if (!on && (bt_regs_status[i].enabled == true)) {
9944 rc = regulator_disable(bt_regs[i]);
9945 if (rc < 0) {
9946 dev_err(&msm_bt_power_device.dev,
9947 "regulator %s %s failed (%d)\n",
9948 bt_regs_info[i].name,
9949 "disable", rc);
9950 break;
9951 }
9952 bt_regs_status[i].enabled = false;
9953 }
9954 }
9955 return rc;
9956}
9957
9958static struct msm_xo_voter *bt_clock;
9959
9960static int bluetooth_power(int on)
9961{
9962 int rc = 0;
9963 int id;
9964
9965 /* In case probe function fails, cur_connv_type would be -1 */
9966 id = adie_get_detected_connectivity_type();
9967 if (id != BAHAMA_ID) {
9968 pr_err("%s: unexpected adie connectivity type: %d\n",
9969 __func__, id);
9970 return -ENODEV;
9971 }
9972
9973 if (on) {
9974
9975 rc = bluetooth_use_regulators(1);
9976 if (rc < 0)
9977 goto out;
9978
9979 rc = bluetooth_switch_regulators(1);
9980
9981 if (rc < 0)
9982 goto fail_put;
9983
9984 bt_clock = msm_xo_get(MSM_XO_TCXO_D0, "bt_power");
9985
9986 if (IS_ERR(bt_clock)) {
9987 pr_err("Couldn't get TCXO_D0 voter\n");
9988 goto fail_switch;
9989 }
9990
9991 rc = msm_xo_mode_vote(bt_clock, MSM_XO_MODE_ON);
9992
9993 if (rc < 0) {
9994 pr_err("Failed to vote for TCXO_DO ON\n");
9995 goto fail_vote;
9996 }
9997
9998 rc = bahama_bt(1);
9999
10000 if (rc < 0)
10001 goto fail_clock;
10002
10003 msleep(10);
10004
10005 rc = msm_xo_mode_vote(bt_clock, MSM_XO_MODE_PIN_CTRL);
10006
10007 if (rc < 0) {
10008 pr_err("Failed to vote for TCXO_DO pin control\n");
10009 goto fail_vote;
10010 }
10011 } else {
10012 /* check for initial RFKILL block (power off) */
10013 /* some RFKILL versions/configurations rfkill_register */
10014 /* calls here for an initial set_block */
10015 /* avoid calling i2c and regulator before unblock (on) */
10016 if (platform_get_drvdata(&msm_bt_power_device) == NULL) {
10017 dev_info(&msm_bt_power_device.dev,
10018 "%s: initialized OFF/blocked\n", __func__);
10019 goto out;
10020 }
10021
10022 bahama_bt(0);
10023
10024fail_clock:
10025 msm_xo_mode_vote(bt_clock, MSM_XO_MODE_OFF);
10026fail_vote:
10027 msm_xo_put(bt_clock);
10028fail_switch:
10029 bluetooth_switch_regulators(0);
10030fail_put:
10031 bluetooth_use_regulators(0);
10032 }
10033
10034out:
10035 if (rc < 0)
10036 on = 0;
10037 dev_info(&msm_bt_power_device.dev,
10038 "Bluetooth power switch: state %d result %d\n", on, rc);
10039
10040 return rc;
10041}
10042
10043#endif /*CONFIG_MARIMBA_CORE, CONFIG_MSM_BT_POWER, CONFIG_MSM_BT_POWER_MODULE*/
10044
10045static void __init msm8x60_cfg_smsc911x(void)
10046{
10047 smsc911x_resources[1].start =
10048 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 6);
10049 smsc911x_resources[1].end =
10050 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 6);
10051}
10052
Laura Abbott5d2d1e62011-08-10 16:27:35 -070010053void msm_fusion_setup_pinctrl(void)
10054{
10055 struct msm_xo_voter *a1;
10056
10057 if (socinfo_get_platform_subtype() == 0x3) {
10058 /*
10059 * Vote for the A1 clock to be in pin control mode before
10060 * the external images are loaded.
10061 */
10062 a1 = msm_xo_get(MSM_XO_TCXO_A1, "mdm");
10063 BUG_ON(!a1);
10064 msm_xo_mode_vote(a1, MSM_XO_MODE_PIN_CTRL);
10065 }
10066}
10067
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010068struct msm_board_data {
10069 struct msm_gpiomux_configs *gpiomux_cfgs;
10070};
10071
10072static struct msm_board_data msm8x60_rumi3_board_data __initdata = {
10073 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
10074};
10075
10076static struct msm_board_data msm8x60_sim_board_data __initdata = {
10077 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
10078};
10079
10080static struct msm_board_data msm8x60_surf_board_data __initdata = {
10081 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
10082};
10083
10084static struct msm_board_data msm8x60_ffa_board_data __initdata = {
10085 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
10086};
10087
10088static struct msm_board_data msm8x60_fluid_board_data __initdata = {
10089 .gpiomux_cfgs = msm8x60_fluid_gpiomux_cfgs,
10090};
10091
10092static struct msm_board_data msm8x60_charm_surf_board_data __initdata = {
10093 .gpiomux_cfgs = msm8x60_charm_gpiomux_cfgs,
10094};
10095
10096static struct msm_board_data msm8x60_charm_ffa_board_data __initdata = {
10097 .gpiomux_cfgs = msm8x60_charm_gpiomux_cfgs,
10098};
10099
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010100static struct msm_board_data msm8x60_dragon_board_data __initdata = {
10101 .gpiomux_cfgs = msm8x60_dragon_gpiomux_cfgs,
10102};
10103
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010104static void __init msm8x60_init(struct msm_board_data *board_data)
10105{
10106 uint32_t soc_platform_version;
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010107#ifdef CONFIG_USB_EHCI_MSM_72K
10108 struct pm8xxx_mpp_config_data hsusb_phy_mpp = {
10109 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
10110 .level = PM8901_MPP_DIG_LEVEL_L5,
10111 .control = PM8XXX_MPP_DOUT_CTRL_HIGH,
10112 };
10113#endif
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010114 pmic_reset_irq = PM8058_IRQ_BASE + PM8058_RESOUT_IRQ;
Abhijeet Dharmapurikar6d565fd2011-09-15 18:49:56 -070010115
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010116 /*
10117 * Initialize RPM first as other drivers and devices may need
10118 * it for their initialization.
10119 */
Praveen Chidambaram78499012011-11-01 17:15:17 -060010120 BUG_ON(msm_rpm_init(&msm8660_rpm_data));
10121 BUG_ON(msm_rpmrs_levels_init(&msm_rpmrs_data));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010122 if (msm_xo_init())
10123 pr_err("Failed to initialize XO votes\n");
10124
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010125 msm8x60_check_2d_hardware();
10126
10127 /* Change SPM handling of core 1 if PMM 8160 is present. */
10128 soc_platform_version = socinfo_get_platform_version();
10129 if (SOCINFO_VERSION_MAJOR(soc_platform_version) == 1 &&
10130 SOCINFO_VERSION_MINOR(soc_platform_version) >= 2) {
10131 struct msm_spm_platform_data *spm_data;
10132
10133 spm_data = &msm_spm_data_v1[1];
10134 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] &= ~0x0F00UL;
10135 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] |= 0x0100UL;
10136
10137 spm_data = &msm_spm_data[1];
10138 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] &= ~0x0F00UL;
10139 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] |= 0x0100UL;
10140 }
10141
10142 /*
10143 * Initialize SPM before acpuclock as the latter calls into SPM
10144 * driver to set ACPU voltages.
10145 */
10146 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 1)
10147 msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
10148 else
10149 msm_spm_init(msm_spm_data_v1, ARRAY_SIZE(msm_spm_data_v1));
10150
10151 /*
10152 * Set regulators 8901_l4 and 8901_l6 to be always on in HPM for SURF
10153 * devices so that the RPM doesn't drop into a low power mode that an
10154 * un-reworked SURF cannot resume from.
10155 */
10156 if (machine_is_msm8x60_surf()) {
David Collins6f032ba2011-08-31 14:08:15 -070010157 int i;
10158
10159 for (i = 0; i < ARRAY_SIZE(rpm_regulator_init_data); i++)
10160 if (rpm_regulator_init_data[i].id
10161 == RPM_VREG_ID_PM8901_L4
10162 || rpm_regulator_init_data[i].id
10163 == RPM_VREG_ID_PM8901_L6)
10164 rpm_regulator_init_data[i]
10165 .init_data.constraints.always_on = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010166 }
10167
10168 /*
10169 * Disable regulator info printing so that regulator registration
10170 * messages do not enter the kmsg log.
10171 */
10172 regulator_suppress_info_printing();
10173
10174 /* Initialize regulators needed for clock_init. */
10175 platform_add_devices(early_regulators, ARRAY_SIZE(early_regulators));
10176
Stephen Boydbb600ae2011-08-02 20:11:40 -070010177 msm_clock_init(&msm8x60_clock_init_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010178
10179 /* Buses need to be initialized before early-device registration
10180 * to get the platform data for fabrics.
10181 */
10182 msm8x60_init_buses();
10183 platform_add_devices(early_devices, ARRAY_SIZE(early_devices));
10184 /* CPU frequency control is not supported on simulated targets. */
10185 if (!machine_is_msm8x60_rumi3() && !machine_is_msm8x60_sim())
Matt Wagantallec57f062011-08-16 23:54:46 -070010186 acpuclk_init(&acpuclk_8x60_soc_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010187
Terence Hampsonb36a38c2011-09-19 19:10:40 -040010188 /*
10189 * Enable EBI2 only for boards which make use of it. Leave
10190 * it disabled for all others for additional power savings.
10191 */
10192 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10193 machine_is_msm8x60_rumi3() ||
10194 machine_is_msm8x60_sim() ||
10195 machine_is_msm8x60_fluid() ||
10196 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010197 msm8x60_init_ebi2();
10198 msm8x60_init_tlmm();
10199 msm8x60_init_gpiomux(board_data->gpiomux_cfgs);
10200 msm8x60_init_uart12dm();
10201 msm8x60_init_mmc();
10202
10203#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
10204 msm8x60_init_pm8058_othc();
10205#endif
10206
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010207 if (machine_is_msm8x60_fluid())
10208 pm8058_platform_data.keypad_pdata = &fluid_keypad_data;
10209 else if (machine_is_msm8x60_dragon())
10210 pm8058_platform_data.keypad_pdata = &dragon_keypad_data;
10211 else
10212 pm8058_platform_data.keypad_pdata = &ffa_keypad_data;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010213
Jilai Wang53d27a82011-07-13 14:32:58 -040010214 /* Specify reset pin for OV9726 */
10215 if (machine_is_msm8x60_dragon()) {
10216 msm_camera_sensor_ov9726_data.sensor_reset = 62;
10217 ov9726_sensor_8660_info.mount_angle = 270;
10218 }
10219
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010220#ifdef CONFIG_BATTERY_MSM8X60
10221 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10222 machine_is_msm8x60_fusion() || machine_is_msm8x60_dragon() ||
10223 machine_is_msm8x60_fusn_ffa() || machine_is_msm8x60_fluid())
10224 platform_device_register(&msm_charger_device);
10225#endif
10226
10227 if (machine_is_msm8x60_dragon())
10228 pm8058_platform_data.charger_pdata = &pmic8058_charger_dragon;
10229 if (!machine_is_msm8x60_fluid())
10230 pm8058_platform_data.charger_pdata = &pmic8058_charger_ffa_surf;
10231
10232 /* configure pmic leds */
10233 if (machine_is_msm8x60_fluid())
10234 pm8058_platform_data.leds_pdata = &pm8058_fluid_flash_leds_data;
10235 else if (machine_is_msm8x60_dragon())
10236 pm8058_platform_data.leds_pdata = &pm8058_dragon_leds_data;
10237 else
10238 pm8058_platform_data.leds_pdata = &pm8058_flash_leds_data;
10239
10240 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa() ||
10241 machine_is_msm8x60_dragon()) {
10242 pm8058_platform_data.vibrator_pdata = &pm8058_vib_pdata;
10243 }
10244
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010245 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10246 machine_is_msm8x60_fluid() || machine_is_msm8x60_fusion() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -040010247 machine_is_msm8x60_fusn_ffa() || machine_is_msm8x60_dragon()) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010248 msm8x60_cfg_smsc911x();
10249 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 1)
10250 platform_add_devices(msm_footswitch_devices,
10251 msm_num_footswitch_devices);
10252 platform_add_devices(surf_devices,
10253 ARRAY_SIZE(surf_devices));
10254
10255#ifdef CONFIG_MSM_DSPS
10256 if (machine_is_msm8x60_fluid()) {
10257 platform_device_unregister(&msm_gsbi12_qup_i2c_device);
10258 msm8x60_init_dsps();
10259 }
10260#endif
10261
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010262 pm8901_vreg_mpp0_init();
10263
10264 platform_device_register(&msm8x60_8901_mpp_vreg);
10265
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010266#ifdef CONFIG_USB_EHCI_MSM_72K
10267 /*
10268 * Drive MPP2 pin HIGH for PHY to generate ID interrupts on 8660
10269 * fluid
10270 */
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010271 if (machine_is_msm8x60_fluid())
10272 pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1), &hsusb_phy_mpp);
10273 msm_add_host(0, &msm_usb_host_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010274#endif
Lei Zhou338cab82011-08-19 13:38:17 -040010275
10276#ifdef CONFIG_SND_SOC_MSM8660_APQ
10277 if (machine_is_msm8x60_dragon())
10278 platform_add_devices(dragon_alsa_devices,
10279 ARRAY_SIZE(dragon_alsa_devices));
10280 else
10281#endif
10282 platform_add_devices(asoc_devices,
10283 ARRAY_SIZE(asoc_devices));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010284 } else {
10285 msm8x60_configure_smc91x();
10286 platform_add_devices(rumi_sim_devices,
10287 ARRAY_SIZE(rumi_sim_devices));
10288 }
10289#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
Zhang Chang Ken6baadf02011-08-05 09:48:15 -040010290 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10291 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010292 msm8x60_cfg_isp1763();
10293#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010294
10295 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
10296 platform_add_devices(charm_devices, ARRAY_SIZE(charm_devices));
10297
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010298
10299#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
10300 if (machine_is_msm8x60_fluid())
10301 platform_device_register(&msm_gsbi10_qup_spi_device);
10302 else
10303 platform_device_register(&msm_gsbi1_qup_spi_device);
10304#endif
10305
10306#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
10307 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
10308 if (machine_is_msm8x60_fluid())
10309 cyttsp_set_params();
10310#endif
10311 if (!machine_is_msm8x60_sim())
10312 msm_fb_add_devices();
10313 fixup_i2c_configs();
10314 register_i2c_devices();
10315
Terence Hampson1c73fef2011-07-19 17:10:49 -040010316 if (machine_is_msm8x60_dragon())
10317 smsc911x_config.reset_gpio
10318 = GPIO_ETHERNET_RESET_N_DRAGON;
10319
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010320 platform_device_register(&smsc911x_device);
10321
10322#if (defined(CONFIG_SPI_QUP)) && \
10323 (defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -040010324 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA) || \
10325 defined(CONFIG_FB_MSM_LCDC_NT35582_WVGA))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010326
10327 if (machine_is_msm8x60_fluid()) {
10328#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
10329 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3) {
10330 spi_register_board_info(lcdc_samsung_spi_board_info,
10331 ARRAY_SIZE(lcdc_samsung_spi_board_info));
10332 } else
10333#endif
10334 {
10335#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
10336 spi_register_board_info(lcdc_auo_spi_board_info,
10337 ARRAY_SIZE(lcdc_auo_spi_board_info));
10338#endif
10339 }
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -040010340#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
10341 } else if (machine_is_msm8x60_dragon()) {
10342 spi_register_board_info(lcdc_nt35582_spi_board_info,
10343 ARRAY_SIZE(lcdc_nt35582_spi_board_info));
10344#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010345 }
10346#endif
10347
10348 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
10349 msm_pm_set_rpm_wakeup_irq(RPM_SCSS_CPU0_WAKE_UP_IRQ);
10350 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
10351 msm_pm_data);
Maheshkumar Sivasubramanianc6c55032011-10-25 16:01:32 -060010352 BUG_ON(msm_pm_boot_init(&msm_pm_boot_pdata));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010353
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010354 pm8058_gpios_init();
10355
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010356#ifdef CONFIG_SENSORS_MSM_ADC
10357 if (machine_is_msm8x60_fluid()) {
10358 msm_adc_pdata.dev_names = msm_adc_fluid_device_names;
10359 msm_adc_pdata.num_adc = ARRAY_SIZE(msm_adc_fluid_device_names);
10360 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3)
10361 msm_adc_pdata.gpio_config = APROC_CONFIG;
10362 else
10363 msm_adc_pdata.gpio_config = MPROC_CONFIG;
10364 }
10365 msm_adc_pdata.target_hw = MSM_8x60;
10366#endif
10367#ifdef CONFIG_MSM8X60_AUDIO
10368 msm_snddev_init();
10369#endif
10370#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
10371 if (machine_is_msm8x60_fluid())
10372 platform_device_register(&fluid_leds_gpio);
10373 else
10374 platform_device_register(&gpio_leds);
10375#endif
10376
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010377 msm8x60_multi_sdio_init();
Laura Abbott5d2d1e62011-08-10 16:27:35 -070010378
10379 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
10380 msm_fusion_setup_pinctrl();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010381}
10382
10383static void __init msm8x60_rumi3_init(void)
10384{
10385 msm8x60_init(&msm8x60_rumi3_board_data);
10386}
10387
10388static void __init msm8x60_sim_init(void)
10389{
10390 msm8x60_init(&msm8x60_sim_board_data);
10391}
10392
10393static void __init msm8x60_surf_init(void)
10394{
10395 msm8x60_init(&msm8x60_surf_board_data);
10396}
10397
10398static void __init msm8x60_ffa_init(void)
10399{
10400 msm8x60_init(&msm8x60_ffa_board_data);
10401}
10402
10403static void __init msm8x60_fluid_init(void)
10404{
10405 msm8x60_init(&msm8x60_fluid_board_data);
10406}
10407
10408static void __init msm8x60_charm_surf_init(void)
10409{
10410 msm8x60_init(&msm8x60_charm_surf_board_data);
10411}
10412
10413static void __init msm8x60_charm_ffa_init(void)
10414{
10415 msm8x60_init(&msm8x60_charm_ffa_board_data);
10416}
10417
10418static void __init msm8x60_charm_init_early(void)
10419{
10420 msm8x60_allocate_memory_regions();
Steve Mucklea55df6e2010-01-07 12:43:24 -080010421}
10422
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010423static void __init msm8x60_dragon_init(void)
10424{
10425 msm8x60_init(&msm8x60_dragon_board_data);
10426}
10427
Steve Mucklea55df6e2010-01-07 12:43:24 -080010428MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
10429 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010430 .reserve = msm8x60_reserve,
Steve Mucklea55df6e2010-01-07 12:43:24 -080010431 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010432 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010433 .init_machine = msm8x60_rumi3_init,
Steve Mucklea55df6e2010-01-07 12:43:24 -080010434 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010435 .init_early = msm8x60_charm_init_early,
Steve Muckle49b76f72010-03-19 17:00:08 -070010436MACHINE_END
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010437
10438MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
10439 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010440 .reserve = msm8x60_reserve,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010441 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010442 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010443 .init_machine = msm8x60_sim_init,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010444 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010445 .init_early = msm8x60_charm_init_early,
10446MACHINE_END
10447
10448MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
10449 .map_io = msm8x60_map_io,
10450 .reserve = msm8x60_reserve,
10451 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010452 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010453 .init_machine = msm8x60_surf_init,
10454 .timer = &msm_timer,
10455 .init_early = msm8x60_charm_init_early,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010456MACHINE_END
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010457
10458MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
10459 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010460 .reserve = msm8x60_reserve,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010461 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010462 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010463 .init_machine = msm8x60_ffa_init,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010464 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010465 .init_early = msm8x60_charm_init_early,
10466MACHINE_END
10467
10468MACHINE_START(MSM8X60_FLUID, "QCT MSM8X60 FLUID")
10469 .map_io = msm8x60_map_io,
10470 .reserve = msm8x60_reserve,
10471 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010472 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010473 .init_machine = msm8x60_fluid_init,
10474 .timer = &msm_timer,
10475 .init_early = msm8x60_charm_init_early,
10476MACHINE_END
10477
10478MACHINE_START(MSM8X60_FUSION, "QCT MSM8X60 FUSION SURF")
10479 .map_io = msm8x60_map_io,
10480 .reserve = msm8x60_reserve,
10481 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010482 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010483 .init_machine = msm8x60_charm_surf_init,
10484 .timer = &msm_timer,
10485 .init_early = msm8x60_charm_init_early,
10486MACHINE_END
10487
10488MACHINE_START(MSM8X60_FUSN_FFA, "QCT MSM8X60 FUSION FFA")
10489 .map_io = msm8x60_map_io,
10490 .reserve = msm8x60_reserve,
10491 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010492 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010493 .init_machine = msm8x60_charm_ffa_init,
10494 .timer = &msm_timer,
10495 .init_early = msm8x60_charm_init_early,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010496MACHINE_END
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010497
10498MACHINE_START(MSM8X60_DRAGON, "QCT MSM8X60 DRAGON")
10499 .map_io = msm8x60_map_io,
10500 .reserve = msm8x60_reserve,
10501 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010502 .handle_irq = gic_handle_irq,
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010503 .init_machine = msm8x60_dragon_init,
10504 .timer = &msm_timer,
10505 .init_early = msm8x60_charm_init_early,
10506MACHINE_END