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Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -07001/*
2 * Copyright (c) 2012, Code Aurora Forum. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13/*
14 * Qualcomm PMIC QPNP ADC driver header file
15 *
16 */
17
18#ifndef __QPNP_ADC_H
19#define __QPNP_ADC_H
20
21#include <linux/kernel.h>
22#include <linux/list.h>
23/**
24 * enum qpnp_vadc_channels - QPNP AMUX arbiter channels
25 */
26enum qpnp_vadc_channels {
27 USBIN = 0,
28 DCIN,
29 VCHG_SNS,
30 SPARE1_03,
31 SPARE2_03,
32 VCOIN,
33 VBAT_SNS,
34 VSYS,
35 DIE_TEMP,
36 REF_625MV,
37 REF_125V,
38 CHG_TEMP,
39 SPARE1,
40 SPARE2,
41 GND_REF,
42 VDD_VADC,
43 P_MUX1_1_1,
44 P_MUX2_1_1,
45 P_MUX3_1_1,
46 P_MUX4_1_1,
47 P_MUX5_1_1,
48 P_MUX6_1_1,
49 P_MUX7_1_1,
50 P_MUX8_1_1,
51 P_MUX9_1_1,
52 P_MUX10_1_1,
53 P_MUX11_1_1,
54 P_MUX12_1_1,
55 P_MUX13_1_1,
56 P_MUX14_1_1,
57 P_MUX15_1_1,
58 P_MUX16_1_1,
59 P_MUX1_1_3,
60 P_MUX2_1_3,
61 P_MUX3_1_3,
62 P_MUX4_1_3,
63 P_MUX5_1_3,
64 P_MUX6_1_3,
65 P_MUX7_1_3,
66 P_MUX8_1_3,
67 P_MUX9_1_3,
68 P_MUX10_1_3,
69 P_MUX11_1_3,
70 P_MUX12_1_3,
71 P_MUX13_1_3,
72 P_MUX14_1_3,
73 P_MUX15_1_3,
74 P_MUX16_1_3,
75 LR_MUX1_BATT_THERM,
76 LR_MUX2_BAT_ID,
77 LR_MUX3_XO_THERM,
78 LR_MUX4_AMUX_THM1,
79 LR_MUX5_AMUX_THM2,
80 LR_MUX6_AMUX_THM3,
81 LR_MUX7_HW_ID,
82 LR_MUX8_AMUX_THM4,
83 LR_MUX9_AMUX_THM5,
84 LR_MUX10_USB_ID,
85 AMUX_PU1,
86 AMUX_PU2,
87 LR_MUX3_BUF_XO_THERM_BUF,
88 LR_MUX1_PU1_BAT_THERM,
89 LR_MUX2_PU1_BAT_ID,
90 LR_MUX3_PU1_XO_THERM,
91 LR_MUX4_PU1_AMUX_THM1,
92 LR_MUX5_PU1_AMUX_THM2,
93 LR_MUX6_PU1_AMUX_THM3,
94 LR_MUX7_PU1_AMUX_HW_ID,
95 LR_MUX8_PU1_AMUX_THM4,
96 LR_MUX9_PU1_AMUX_THM5,
97 LR_MUX10_PU1_AMUX_USB_ID,
98 LR_MUX3_BUF_PU1_XO_THERM_BUF,
99 LR_MUX1_PU2_BAT_THERM,
100 LR_MUX2_PU2_BAT_ID,
101 LR_MUX3_PU2_XO_THERM,
102 LR_MUX4_PU2_AMUX_THM1,
103 LR_MUX5_PU2_AMUX_THM2,
104 LR_MUX6_PU2_AMUX_THM3,
105 LR_MUX7_PU2_AMUX_HW_ID,
106 LR_MUX8_PU2_AMUX_THM4,
107 LR_MUX9_PU2_AMUX_THM5,
108 LR_MUX10_PU2_AMUX_USB_ID,
109 LR_MUX3_BUF_PU2_XO_THERM_BUF,
110 LR_MUX1_PU1_PU2_BAT_THERM,
111 LR_MUX2_PU1_PU2_BAT_ID,
112 LR_MUX3_PU1_PU2_XO_THERM,
113 LR_MUX4_PU1_PU2_AMUX_THM1,
114 LR_MUX5_PU1_PU2_AMUX_THM2,
115 LR_MUX6_PU1_PU2_AMUX_THM3,
116 LR_MUX7_PU1_PU2_AMUX_HW_ID,
117 LR_MUX8_PU1_PU2_AMUX_THM4,
118 LR_MUX9_PU1_PU2_AMUX_THM5,
119 LR_MUX10_PU1_PU2_AMUX_USB_ID,
120 LR_MUX3_BUF_PU1_PU2_XO_THERM_BUF,
121 ALL_OFF,
122 ADC_MAX_NUM,
123};
124
125#define QPNP_ADC_625_UV 625000
126
127/**
128 * enum qpnp_adc_decimation_type - Sampling rate supported.
129 * %DECIMATION_TYPE1: 512
130 * %DECIMATION_TYPE2: 1K
131 * %DECIMATION_TYPE3: 2K
132 * %DECIMATION_TYPE4: 4k
133 * %DECIMATION_NONE: Do not use this Sampling type.
134 *
135 * The Sampling rate is specific to each channel of the QPNP ADC arbiter.
136 */
137enum qpnp_adc_decimation_type {
138 DECIMATION_TYPE1 = 0,
139 DECIMATION_TYPE2,
140 DECIMATION_TYPE3,
141 DECIMATION_TYPE4,
142 DECIMATION_NONE,
143};
144
145/**
146 * enum qpnp_adc_calib_type - QPNP ADC Calibration type.
147 * %ADC_CALIB_ABSOLUTE: Use 625mV and 1.25V reference channels.
148 * %ADC_CALIB_RATIOMETRIC: Use reference Voltage/GND.
149 * %ADC_CALIB_CONFIG_NONE: Do not use this calibration type.
150 *
151 * Use the input reference voltage depending on the calibration type
152 * to calcluate the offset and gain parameters. The calibration is
153 * specific to each channel of the QPNP ADC.
154 */
155enum qpnp_adc_calib_type {
156 CALIB_ABSOLUTE = 0,
157 CALIB_RATIOMETRIC,
158 CALIB_NONE,
159};
160
161/**
162 * enum qpnp_adc_channel_scaling_param - pre-scaling AMUX ratio.
163 * %CHAN_PATH_SCALING1: ratio of {1, 1}
164 * %CHAN_PATH_SCALING2: ratio of {1, 3}
165 * %CHAN_PATH_SCALING3: ratio of {1, 4}
166 * %CHAN_PATH_SCALING4: ratio of {1, 6}
167 * %CHAN_PATH_NONE: Do not use this pre-scaling ratio type.
168 *
169 * The pre-scaling is applied for signals to be within the voltage range
170 * of the ADC.
171 */
172enum qpnp_adc_channel_scaling_param {
173 PATH_SCALING1 = 0,
174 PATH_SCALING2,
175 PATH_SCALING3,
176 PATH_SCALING4,
177 PATH_SCALING_NONE,
178};
179
180/**
181 * enum qpnp_adc_scale_fn_type - Scaling function for pm8921 pre calibrated
182 * digital data relative to ADC reference.
183 * %ADC_SCALE_DEFAULT: Default scaling to convert raw adc code to voltage.
184 * %ADC_SCALE_BATT_THERM: Conversion to temperature based on btm parameters.
185 * %ADC_SCALE_PMIC_THERM: Returns result in milli degree's Centigrade.
186 * %ADC_SCALE_XTERN_CHGR_CUR: Returns current across 0.1 ohm resistor.
187 * %ADC_SCALE_XOTHERM: Returns XO thermistor voltage in degree's Centigrade.
188 * %ADC_SCALE_NONE: Do not use this scaling type.
189 */
190enum qpnp_adc_scale_fn_type {
191 SCALE_DEFAULT = 0,
192 SCALE_BATT_THERM,
193 SCALE_PA_THERM,
194 SCALE_PMIC_THERM,
195 SCALE_XOTHERM,
196 SCALE_NONE,
197};
198
199/**
200 * enum qpnp_adc_fast_avg_ctl - Provides ability to obtain single result
201 * from the ADC that is an average of multiple measurement
202 * samples. Select number of samples for use in fast
203 * average mode (i.e. 2 ^ value).
204 * %ADC_FAST_AVG_SAMPLE_1: 0x0 = 1
205 * %ADC_FAST_AVG_SAMPLE_2: 0x1 = 2
206 * %ADC_FAST_AVG_SAMPLE_4: 0x2 = 4
207 * %ADC_FAST_AVG_SAMPLE_8: 0x3 = 8
208 * %ADC_FAST_AVG_SAMPLE_16: 0x4 = 16
209 * %ADC_FAST_AVG_SAMPLE_32: 0x5 = 32
210 * %ADC_FAST_AVG_SAMPLE_64: 0x6 = 64
211 * %ADC_FAST_AVG_SAMPLE_128: 0x7 = 128
212 * %ADC_FAST_AVG_SAMPLE_256: 0x8 = 256
213 * %ADC_FAST_AVG_SAMPLE_512: 0x9 = 512
214 */
215enum qpnp_adc_fast_avg_ctl {
216 ADC_FAST_AVG_SAMPLE_1 = 0,
217 ADC_FAST_AVG_SAMPLE_2,
218 ADC_FAST_AVG_SAMPLE_4,
219 ADC_FAST_AVG_SAMPLE_8,
220 ADC_FAST_AVG_SAMPLE_16,
221 ADC_FAST_AVG_SAMPLE_32,
222 ADC_FAST_AVG_SAMPLE_64,
223 ADC_FAST_AVG_SAMPLE_128,
224 ADC_FAST_AVG_SAMPLE_256,
225 ADC_FAST_AVG_SAMPLE_512,
226 ADC_FAST_AVG_SAMPLE_NONE,
227};
228
229/**
230 * enum qpnp_adc_hw_settle_time - Time between AMUX getting configured and
231 * the ADC starting conversion. Delay = 100us * value for
232 * value < 11 and 2ms * (value - 10) otherwise.
233 * %ADC_CHANNEL_HW_SETTLE_DELAY_0US: 0us
234 * %ADC_CHANNEL_HW_SETTLE_DELAY_100US: 100us
235 * %ADC_CHANNEL_HW_SETTLE_DELAY_200US: 200us
236 * %ADC_CHANNEL_HW_SETTLE_DELAY_300US: 300us
237 * %ADC_CHANNEL_HW_SETTLE_DELAY_400US: 400us
238 * %ADC_CHANNEL_HW_SETTLE_DELAY_500US: 500us
239 * %ADC_CHANNEL_HW_SETTLE_DELAY_600US: 600us
240 * %ADC_CHANNEL_HW_SETTLE_DELAY_700US: 700us
241 * %ADC_CHANNEL_HW_SETTLE_DELAY_800US: 800us
242 * %ADC_CHANNEL_HW_SETTLE_DELAY_900US: 900us
243 * %ADC_CHANNEL_HW_SETTLE_DELAY_1MS: 1ms
244 * %ADC_CHANNEL_HW_SETTLE_DELAY_2MS: 2ms
245 * %ADC_CHANNEL_HW_SETTLE_DELAY_4MS: 4ms
246 * %ADC_CHANNEL_HW_SETTLE_DELAY_6MS: 6ms
247 * %ADC_CHANNEL_HW_SETTLE_DELAY_8MS: 8ms
248 * %ADC_CHANNEL_HW_SETTLE_DELAY_10MS: 10ms
249 * %ADC_CHANNEL_HW_SETTLE_NONE
250 */
251enum qpnp_adc_hw_settle_time {
252 ADC_CHANNEL_HW_SETTLE_DELAY_0US = 0,
253 ADC_CHANNEL_HW_SETTLE_DELAY_100US,
254 ADC_CHANNEL_HW_SETTLE_DELAY_2000US,
255 ADC_CHANNEL_HW_SETTLE_DELAY_300US,
256 ADC_CHANNEL_HW_SETTLE_DELAY_400US,
257 ADC_CHANNEL_HW_SETTLE_DELAY_500US,
258 ADC_CHANNEL_HW_SETTLE_DELAY_600US,
259 ADC_CHANNEL_HW_SETTLE_DELAY_700US,
260 ADC_CHANNEL_HW_SETTLE_DELAY_800US,
261 ADC_CHANNEL_HW_SETTLE_DELAY_900US,
262 ADC_CHANNEL_HW_SETTLE_DELAY_1MS,
263 ADC_CHANNEL_HW_SETTLE_DELAY_2MS,
264 ADC_CHANNEL_HW_SETTLE_DELAY_4MS,
265 ADC_CHANNEL_HW_SETTLE_DELAY_6MS,
266 ADC_CHANNEL_HW_SETTLE_DELAY_8MS,
267 ADC_CHANNEL_HW_SETTLE_DELAY_10MS,
268 ADC_CHANNEL_HW_SETTLE_NONE,
269};
270
271/**
272 * enum qpnp_vadc_mode_sel - Selects the basic mode of operation.
273 * - The normal mode is used for single measurement.
274 * - The Conversion sequencer is used to trigger an
275 * ADC read when a HW trigger is selected.
276 * - The measurement interval performs a single or
277 * continous measurement at a specified interval/delay.
278 * %ADC_OP_NORMAL_MODE : Normal mode used for single measurement.
279 * %ADC_OP_CONVERSION_SEQUENCER : Conversion sequencer used to trigger
280 * an ADC read on a HW supported trigger.
281 * Refer to enum qpnp_vadc_trigger for
282 * supported HW triggers.
283 * %ADC_OP_MEASUREMENT_INTERVAL : The measurement interval performs a
284 * single or continous measurement after a specified delay.
285 * For delay look at qpnp_adc_meas_timer.
286 */
287enum qpnp_vadc_mode_sel {
288 ADC_OP_NORMAL_MODE = 0,
289 ADC_OP_CONVERSION_SEQUENCER,
290 ADC_OP_MEASUREMENT_INTERVAL,
291 ADC_OP_MODE_NONE,
292};
293
294/**
295 * enum qpnp_vadc_trigger - Select the HW trigger to be used while
296 * measuring the ADC reading.
297 * %ADC_GSM_PA_ON : GSM power amplifier on.
298 * %ADC_TX_GTR_THRES : Transmit power greater than threshold.
299 * %ADC_CAMERA_FLASH_RAMP : Flash ramp up done.
300 * %ADC_DTEST : DTEST.
301 */
302enum qpnp_vadc_trigger {
303 ADC_GSM_PA_ON = 0,
304 ADC_TX_GTR_THRES,
305 ADC_CAMERA_FLASH_RAMP,
306 ADC_DTEST,
307 ADC_SEQ_NONE,
308};
309
310/**
311 * enum qpnp_vadc_conv_seq_timeout - Select delay (0 to 15ms) from
312 * conversion request to triggering conversion sequencer
313 * hold off time.
314 */
315enum qpnp_vadc_conv_seq_timeout {
316 ADC_CONV_SEQ_TIMEOUT_0MS = 0,
317 ADC_CONV_SEQ_TIMEOUT_1MS,
318 ADC_CONV_SEQ_TIMEOUT_2MS,
319 ADC_CONV_SEQ_TIMEOUT_3MS,
320 ADC_CONV_SEQ_TIMEOUT_4MS,
321 ADC_CONV_SEQ_TIMEOUT_5MS,
322 ADC_CONV_SEQ_TIMEOUT_6MS,
323 ADC_CONV_SEQ_TIMEOUT_7MS,
324 ADC_CONV_SEQ_TIMEOUT_8MS,
325 ADC_CONV_SEQ_TIMEOUT_9MS,
326 ADC_CONV_SEQ_TIMEOUT_10MS,
327 ADC_CONV_SEQ_TIMEOUT_11MS,
328 ADC_CONV_SEQ_TIMEOUT_12MS,
329 ADC_CONV_SEQ_TIMEOUT_13MS,
330 ADC_CONV_SEQ_TIMEOUT_14MS,
331 ADC_CONV_SEQ_TIMEOUT_15MS,
332 ADC_CONV_SEQ_TIMEOUT_NONE,
333};
334
335/**
336 * enum qpnp_adc_conv_seq_holdoff - Select delay from conversion
337 * trigger signal (i.e. adc_conv_seq_trig) transition
338 * to ADC enable. Delay = 25us * (value + 1).
339 */
340enum qpnp_adc_conv_seq_holdoff {
341 ADC_SEQ_HOLD_25US = 0,
342 ADC_SEQ_HOLD_50US,
343 ADC_SEQ_HOLD_75US,
344 ADC_SEQ_HOLD_100US,
345 ADC_SEQ_HOLD_125US,
346 ADC_SEQ_HOLD_150US,
347 ADC_SEQ_HOLD_175US,
348 ADC_SEQ_HOLD_200US,
349 ADC_SEQ_HOLD_225US,
350 ADC_SEQ_HOLD_250US,
351 ADC_SEQ_HOLD_275US,
352 ADC_SEQ_HOLD_300US,
353 ADC_SEQ_HOLD_325US,
354 ADC_SEQ_HOLD_350US,
355 ADC_SEQ_HOLD_375US,
356 ADC_SEQ_HOLD_400US,
357 ADC_SEQ_HOLD_NONE,
358};
359
360/**
361 * enum qpnp_adc_conv_seq_state - Conversion sequencer operating state
362 * %ADC_CONV_SEQ_IDLE : Sequencer is in idle.
363 * %ADC_CONV_TRIG_RISE : Waiting for rising edge trigger.
364 * %ADC_CONV_TRIG_HOLDOFF : Waiting for rising trigger hold off time.
365 * %ADC_CONV_MEAS_RISE : Measuring selected ADC signal.
366 * %ADC_CONV_TRIG_FALL : Waiting for falling trigger edge.
367 * %ADC_CONV_FALL_HOLDOFF : Waiting for falling trigger hold off time.
368 * %ADC_CONV_MEAS_FALL : Measuring selected ADC signal.
369 * %ADC_CONV_ERROR : Aberrant Hardware problem.
370 */
371enum qpnp_adc_conv_seq_state {
372 ADC_CONV_SEQ_IDLE = 0,
373 ADC_CONV_TRIG_RISE,
374 ADC_CONV_TRIG_HOLDOFF,
375 ADC_CONV_MEAS_RISE,
376 ADC_CONV_TRIG_FALL,
377 ADC_CONV_FALL_HOLDOFF,
378 ADC_CONV_MEAS_FALL,
379 ADC_CONV_ERROR,
380 ADC_CONV_NONE,
381};
382
383/**
384 * enum qpnp_adc_meas_timer - Selects the measurement interval time.
385 * If value = 0, use 0ms else use 2^(value + 4)/ 32768).
386 * %ADC_MEAS_INTERVAL_0MS : 0ms
387 * %ADC_MEAS_INTERVAL_1P0MS : 1ms
388 * %ADC_MEAS_INTERVAL_2P0MS : 2ms
389 * %ADC_MEAS_INTERVAL_3P9MS : 3.9ms
390 * %ADC_MEAS_INTERVAL_7P8MS : 7.8ms
391 * %ADC_MEAS_INTERVAL_15P6MS : 15.6ms
392 * %ADC_MEAS_INTERVAL_31P3MS : 31.3ms
393 * %ADC_MEAS_INTERVAL_62P5MS : 62.5ms
394 * %ADC_MEAS_INTERVAL_125MS : 125ms
395 * %ADC_MEAS_INTERVAL_250MS : 250ms
396 * %ADC_MEAS_INTERVAL_500MS : 500ms
397 * %ADC_MEAS_INTERVAL_1S : 1seconds
398 * %ADC_MEAS_INTERVAL_2S : 2seconds
399 * %ADC_MEAS_INTERVAL_4S : 4seconds
400 * %ADC_MEAS_INTERVAL_8S : 8seconds
401 * %ADC_MEAS_INTERVAL_16S: 16seconds
402 */
403enum qpnp_adc_meas_timer {
404 ADC_MEAS_INTERVAL_0MS = 0,
405 ADC_MEAS_INTERVAL_1P0MS,
406 ADC_MEAS_INTERVAL_2P0MS,
407 ADC_MEAS_INTERVAL_3P9MS,
408 ADC_MEAS_INTERVAL_7P8MS,
409 ADC_MEAS_INTERVAL_15P6MS,
410 ADC_MEAS_INTERVAL_31P3MS,
411 ADC_MEAS_INTERVAL_62P5MS,
412 ADC_MEAS_INTERVAL_125MS,
413 ADC_MEAS_INTERVAL_250MS,
414 ADC_MEAS_INTERVAL_500MS,
415 ADC_MEAS_INTERVAL_1S,
416 ADC_MEAS_INTERVAL_2S,
417 ADC_MEAS_INTERVAL_4S,
418 ADC_MEAS_INTERVAL_8S,
419 ADC_MEAS_INTERVAL_16S,
420 ADC_MEAS_INTERVAL_NONE,
421};
422
423/**
424 * enum qpnp_adc_meas_interval_op_ctl - Select operating mode.
425 * %ADC_MEAS_INTERVAL_OP_SINGLE : Conduct single measurement at specified time
426 * delay.
427 * %ADC_MEAS_INTERVAL_OP_CONTINUOUS : Make measurements at measurement interval
428 * times.
429 */
430enum qpnp_adc_meas_interval_op_ctl {
431 ADC_MEAS_INTERVAL_OP_SINGLE = 0,
432 ADC_MEAS_INTERVAL_OP_CONTINUOUS,
433 ADC_MEAS_INTERVAL_OP_NONE,
434};
435
436/**
437 * struct qpnp_vadc_linear_graph - Represent ADC characteristics.
438 * @dy: Numerator slope to calculate the gain.
439 * @dx: Denominator slope to calculate the gain.
440 * @adc_vref: A/D word of the voltage reference used for the channel.
441 * @adc_gnd: A/D word of the ground reference used for the channel.
442 *
443 * Each ADC device has different offset and gain parameters which are computed
444 * to calibrate the device.
445 */
446struct qpnp_vadc_linear_graph {
447 int64_t dy;
448 int64_t dx;
449 int64_t adc_vref;
450 int64_t adc_gnd;
451};
452
453/**
454 * struct qpnp_vadc_map_pt - Map the graph representation for ADC channel
455 * @x: Represent the ADC digitized code.
456 * @y: Represent the physical data which can be temperature, voltage,
457 * resistance.
458 */
459struct qpnp_vadc_map_pt {
460 int32_t x;
461 int32_t y;
462};
463
464/**
465 * struct qpnp_vadc_scaling_ratio - Represent scaling ratio for adc input.
466 * @num: Numerator scaling parameter.
467 * @den: Denominator scaling parameter.
468 */
469struct qpnp_vadc_scaling_ratio {
470 int32_t num;
471 int32_t den;
472};
473
474/**
475 * struct qpnp_adc_properties - Represent the ADC properties.
476 * @adc_reference: Reference voltage for QPNP ADC.
477 * @bitresolution: ADC bit resolution for QPNP ADC.
478 * @biploar: Polarity for QPNP ADC.
479 */
480struct qpnp_adc_properties {
481 uint32_t adc_vdd_reference;
482 uint32_t bitresolution;
483 bool bipolar;
484};
485
486/**
487 * struct qpnp_vadc_chan_properties - Represent channel properties of the ADC.
488 * @offset_gain_numerator: The inverse numerator of the gain applied to the
489 * input channel.
490 * @offset_gain_denominator: The inverse denominator of the gain applied to the
491 * input channel.
492 * @adc_graph: ADC graph for the channel of struct type qpnp_adc_linear_graph.
493 */
494struct qpnp_vadc_chan_properties {
495 uint32_t offset_gain_numerator;
496 uint32_t offset_gain_denominator;
497 struct qpnp_vadc_linear_graph adc_graph[2];
498};
499
500/**
501 * struct qpnp_adc_result - Represent the result of the QPNP ADC.
502 * @chan: The channel number of the requested conversion.
503 * @adc_code: The pre-calibrated digital output of a given ADC relative to the
504 * the ADC reference.
505 * @measurement: In units specific for a given ADC; most ADC uses reference
506 * voltage but some ADC uses reference current. This measurement
507 * here is a number relative to a reference of a given ADC.
508 * @physical: The data meaningful for each individual channel whether it is
509 * voltage, current, temperature, etc.
510 * All voltage units are represented in micro - volts.
511 * -Battery temperature units are represented as 0.1 DegC.
512 * -PA Therm temperature units are represented as DegC.
513 * -PMIC Die temperature units are represented as 0.001 DegC.
514 */
515struct qpnp_vadc_result {
516 uint32_t chan;
517 int32_t adc_code;
518 int64_t measurement;
519 int64_t physical;
520};
521
522/**
523 * struct qpnp_adc_amux - AMUX properties for individual channel
524 * @name: Channel string name.
525 * @channel_num: Channel in integer used from qpnp_adc_channels.
526 * @chan_path_prescaling: Channel scaling performed on the input signal.
527 * @adc_decimation: Sampling rate desired for the channel.
528 * adc_scale_fn: Scaling function to convert to the data meaningful for
529 * each individual channel whether it is voltage, current,
530 * temperature, etc and compensates the channel properties.
531 */
532struct qpnp_vadc_amux {
533 char *name;
534 enum qpnp_vadc_channels channel_num;
535 enum qpnp_adc_channel_scaling_param chan_path_prescaling;
536 enum qpnp_adc_decimation_type adc_decimation;
537 enum qpnp_adc_scale_fn_type adc_scale_fn;
538 enum qpnp_adc_fast_avg_ctl fast_avg_setup;
539 enum qpnp_adc_hw_settle_time hw_settle_time;
540};
541
542/**
543 * struct qpnp_vadc_scaling_ratio
544 *
545 */
546static const struct qpnp_vadc_scaling_ratio qpnp_vadc_amux_scaling_ratio[] = {
547 {1, 1},
548 {1, 3},
549 {1, 4},
550 {1, 6},
551 {1, 20}
552};
553
554/**
555 * struct qpnp_vadc_scale_fn - Scaling function prototype
556 * @chan: Function pointer to one of the scaling functions
557 * which takes the adc properties, channel properties,
558 * and returns the physical result
559 */
560struct qpnp_vadc_scale_fn {
561 int32_t (*chan) (int32_t,
562 const struct qpnp_adc_properties *,
563 const struct qpnp_vadc_chan_properties *,
564 struct qpnp_vadc_result *);
565};
566
567/**
568 * struct qpnp_adc_drv - QPNP ADC device structure.
569 * @spmi - spmi device for ADC peripheral.
570 * @offset - base offset for the ADC peripheral.
571 * @adc_prop - ADC properties specific to the ADC peripheral.
572 * @amux_prop - AMUX properties representing the ADC peripheral.
573 * @adc_channels - ADC channel properties for the ADC peripheral.
574 * @adc_irq - IRQ number that is mapped to the ADC peripheral.
575 * @adc_lock - ADC lock for access to the peripheral.
576 * @adc_rslt_completion - ADC result notification after interrupt
577 * is received.
578 */
579struct qpnp_adc_drv {
580 struct spmi_device *spmi;
581 uint8_t slave;
582 uint16_t offset;
583 struct qpnp_adc_properties *adc_prop;
584 struct qpnp_vadc_amux_properties *amux_prop;
585 struct qpnp_vadc_amux *adc_channels;
586 int adc_irq;
587 struct mutex adc_lock;
588 struct completion adc_rslt_completion;
589};
590
591/**
592 * struct qpnp_vadc_amux_properties - QPNP VADC amux channel property.
593 * @amux_channel - Refer to the qpnp_vadc_channel list.
594 * @decimation - Sampling rate supported for the channel.
595 * @mode_sel - The basic mode of operation.
596 * @hw_settle_time - The time between AMUX being configured and the
597 * start of conversion.
598 * @fast_avg_setup - Ability to provide single result from the ADC
599 * that is an average of multiple measurements.
600 * @trigger_channel - HW trigger channel for conversion sequencer.
601 * @chan_prop - Represent the channel properties of the ADC.
602 */
603struct qpnp_vadc_amux_properties {
604 uint32_t amux_channel;
605 uint32_t decimation;
606 uint32_t mode_sel;
607 uint32_t hw_settle_time;
608 uint32_t fast_avg_setup;
609 enum qpnp_vadc_trigger trigger_channel;
610 struct qpnp_vadc_chan_properties chan_prop[0];
611};
612
613/* Public API */
614#if defined(CONFIG_SENSORS_QPNP_ADC_VOLTAGE) \
615 || defined(CONFIG_SENSORS_QPNP_ADC_VOLTAGE_MODULE)
616/**
617 * qpnp_vadc_read() - Performs ADC read on the channel.
618 * @channel: Input channel to perform the ADC read.
619 * @result: Structure pointer of type adc_chan_result
620 * in which the ADC read results are stored.
621 */
622int32_t qpnp_vadc_read(enum qpnp_vadc_channels channel,
623 struct qpnp_vadc_result *result);
624
625/**
626 * qpnp_vadc_conv_seq_request() - Performs ADC read on the conversion
627 * sequencer channel.
628 * @channel: Input channel to perform the ADC read.
629 * @result: Structure pointer of type adc_chan_result
630 * in which the ADC read results are stored.
631 */
632int32_t qpnp_vadc_conv_seq_request(
633 enum qpnp_vadc_trigger trigger_channel,
634 enum qpnp_vadc_channels channel,
635 struct qpnp_vadc_result *result);
636
637/**
638 * qpnp_vadc_check_result() - Performs check on the ADC raw code.
639 * @data: Data used for verifying the range of the ADC code.
640 */
641int32_t qpnp_vadc_check_result(int32_t *data);
642
643/**
644 * qpnp_adc_get_devicetree_data() - Abstracts the ADC devicetree data.
645 * @spmi: spmi ADC device.
646 * @adc_qpnp: spmi device tree node structure
647 */
648int32_t qpnp_adc_get_devicetree_data(struct spmi_device *spmi,
649 struct qpnp_adc_drv *adc_qpnp);
650
651/**
652 * qpnp_vadc_configure() - Configure ADC device to start conversion.
653 * @chan_prop: Individual channel properties for the AMUX channel.
654 */
655int32_t qpnp_vadc_configure(
656 struct qpnp_vadc_amux_properties *chan_prop);
657
658/**
659 * qpnp_adc_scale_default() - Scales the pre-calibrated digital output
660 * of an ADC to the ADC reference and compensates for the
661 * gain and offset.
662 * @adc_code: pre-calibrated digital ouput of the ADC.
663 * @adc_prop: adc properties of the qpnp adc such as bit resolution,
664 * reference voltage.
665 * @chan_prop: Individual channel properties to compensate the i/p scaling,
666 * slope and offset.
667 * @chan_rslt: Physical result to be stored.
668 */
669int32_t qpnp_adc_scale_default(int32_t adc_code,
670 const struct qpnp_adc_properties *adc_prop,
671 const struct qpnp_vadc_chan_properties *chan_prop,
672 struct qpnp_vadc_result *chan_rslt);
673#else
674static inline int32_t qpnp_vadc_read(uint32_t channel,
675 struct qpnp_vadc_result *result)
676{ return -ENXIO; }
677static inline int32_t qpnp_vadc_conv_seq_request(
678 enum qpnp_vadc_trigger trigger_channel,
679 enum qpnp_vadc_channels channel,
680 struct qpnp_vadc_result *result)
681{ return -ENXIO; }
682static inline int32_t qpnp_adc_scale_default(int32_t adc_code,
683 const struct qpnp_adc_properties *adc_prop,
684 const struct qpnp_adc_chan_properties *chan_prop,
685 struct qpnp_adc_chan_result *chan_rslt)
686{ return -ENXIO; }
687#endif
688
689#endif