blob: 6e31b17d546d59ce93e71e6bfbb5fd5c5ecebb9b [file] [log] [blame]
Ingo Molnar7b387252009-01-28 19:11:44 +01001/*
2 * Default generic APIC driver. This handles up to 8 CPUs.
3 *
4 * Copyright 2003 Andi Kleen, SuSE Labs.
5 * Subject to the GNU Public License, v.2
6 *
7 * Generic x86 APIC driver probe layer.
8 */
9#include <linux/threads.h>
10#include <linux/cpumask.h>
Ingo Molnar7d01d322009-02-17 12:33:20 +010011#include <linux/module.h>
Ingo Molnar7b387252009-01-28 19:11:44 +010012#include <linux/string.h>
13#include <linux/kernel.h>
14#include <linux/ctype.h>
15#include <linux/init.h>
16#include <linux/errno.h>
17#include <asm/fixmap.h>
18#include <asm/mpspec.h>
19#include <asm/apicdef.h>
20#include <asm/genapic.h>
21#include <asm/setup.h>
22
23#include <linux/threads.h>
24#include <linux/cpumask.h>
25#include <asm/mpspec.h>
26#include <asm/genapic.h>
27#include <asm/fixmap.h>
28#include <asm/apicdef.h>
29#include <linux/kernel.h>
30#include <linux/string.h>
31#include <linux/smp.h>
32#include <linux/init.h>
33#include <asm/genapic.h>
34#include <asm/ipi.h>
35
Ingo Molnar6bda2c82009-01-28 19:32:55 +010036#include <linux/smp.h>
37#include <linux/init.h>
38#include <linux/interrupt.h>
39#include <asm/acpi.h>
40#include <asm/arch_hooks.h>
41#include <asm/e820.h>
42#include <asm/setup.h>
43
44#include <asm/genapic.h>
45
46#ifdef CONFIG_HOTPLUG_CPU
47#define DEFAULT_SEND_IPI (1)
48#else
49#define DEFAULT_SEND_IPI (0)
50#endif
51
52int no_broadcast = DEFAULT_SEND_IPI;
53
54#ifdef CONFIG_X86_LOCAL_APIC
55
Ingo Molnar7b387252009-01-28 19:11:44 +010056static void default_vector_allocation_domain(int cpu, struct cpumask *retmask)
57{
58 /*
59 * Careful. Some cpus do not strictly honor the set of cpus
60 * specified in the interrupt destination when using lowest
61 * priority interrupt delivery mode.
62 *
63 * In particular there was a hyperthreading cpu observed to
64 * deliver interrupts to the wrong hyperthread when only one
65 * hyperthread was specified in the interrupt desitination.
66 */
67 *retmask = (cpumask_t) { { [0] = APIC_ALL_CPUS } };
68}
69
70/* should be called last. */
71static int probe_default(void)
72{
73 return 1;
74}
75
76struct genapic apic_default = {
77
78 .name = "default",
79 .probe = probe_default,
80 .acpi_madt_oem_check = NULL,
81 .apic_id_registered = default_apic_id_registered,
82
83 .irq_delivery_mode = dest_LowestPrio,
84 /* logical delivery broadcast to all CPUs: */
85 .irq_dest_mode = 1,
86
87 .target_cpus = default_target_cpus,
88 .disable_esr = 0,
89 .dest_logical = APIC_DEST_LOGICAL,
90 .check_apicid_used = default_check_apicid_used,
91 .check_apicid_present = default_check_apicid_present,
92
93 .vector_allocation_domain = default_vector_allocation_domain,
94 .init_apic_ldr = default_init_apic_ldr,
95
96 .ioapic_phys_id_map = default_ioapic_phys_id_map,
97 .setup_apic_routing = default_setup_apic_routing,
98 .multi_timer_check = NULL,
99 .apicid_to_node = default_apicid_to_node,
100 .cpu_to_logical_apicid = default_cpu_to_logical_apicid,
101 .cpu_present_to_apicid = default_cpu_present_to_apicid,
102 .apicid_to_cpu_present = default_apicid_to_cpu_present,
103 .setup_portio_remap = NULL,
104 .check_phys_apicid_present = default_check_phys_apicid_present,
105 .enable_apic_mode = NULL,
106 .phys_pkg_id = default_phys_pkg_id,
107 .mps_oem_check = NULL,
108
109 .get_apic_id = default_get_apic_id,
110 .set_apic_id = NULL,
111 .apic_id_mask = 0x0F << 24,
112
113 .cpu_mask_to_apicid = default_cpu_mask_to_apicid,
114 .cpu_mask_to_apicid_and = default_cpu_mask_to_apicid_and,
115
Yinghai Lu43f39892009-01-29 19:31:49 -0800116 .send_IPI_mask = default_send_IPI_mask_logical,
117 .send_IPI_mask_allbutself = default_send_IPI_mask_allbutself_logical,
Ingo Molnar7b387252009-01-28 19:11:44 +0100118 .send_IPI_allbutself = default_send_IPI_allbutself,
119 .send_IPI_all = default_send_IPI_all,
Ingo Molnar6b64ee02009-01-30 23:42:18 +0100120 .send_IPI_self = default_send_IPI_self,
Ingo Molnar7b387252009-01-28 19:11:44 +0100121
122 .wakeup_cpu = NULL,
123 .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
124 .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
125
126 .wait_for_init_deassert = default_wait_for_init_deassert,
127
128 .smp_callin_clear_local_apic = NULL,
129 .store_NMI_vector = NULL,
130 .inquire_remote_apic = default_inquire_remote_apic,
Yinghai Luc1eeb2d2009-02-16 23:02:14 -0800131
132 .read = native_apic_mem_read,
133 .write = native_apic_mem_write,
134 .icr_read = native_apic_icr_read,
135 .icr_write = native_apic_icr_write,
136 .wait_icr_idle = native_apic_wait_icr_idle,
137 .safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
Ingo Molnar7b387252009-01-28 19:11:44 +0100138};
139
140extern struct genapic apic_numaq;
141extern struct genapic apic_summit;
142extern struct genapic apic_bigsmp;
143extern struct genapic apic_es7000;
144extern struct genapic apic_default;
145
146struct genapic *apic = &apic_default;
Ingo Molnar7d01d322009-02-17 12:33:20 +0100147EXPORT_SYMBOL_GPL(apic);
Ingo Molnar7b387252009-01-28 19:11:44 +0100148
149static struct genapic *apic_probe[] __initdata = {
150#ifdef CONFIG_X86_NUMAQ
151 &apic_numaq,
152#endif
153#ifdef CONFIG_X86_SUMMIT
154 &apic_summit,
155#endif
156#ifdef CONFIG_X86_BIGSMP
157 &apic_bigsmp,
158#endif
159#ifdef CONFIG_X86_ES7000
160 &apic_es7000,
161#endif
162 &apic_default, /* must be last */
163 NULL,
164};
165
166static int cmdline_apic __initdata;
167static int __init parse_apic(char *arg)
168{
169 int i;
170
171 if (!arg)
172 return -EINVAL;
173
174 for (i = 0; apic_probe[i]; i++) {
175 if (!strcmp(apic_probe[i]->name, arg)) {
176 apic = apic_probe[i];
177 cmdline_apic = 1;
178 return 0;
179 }
180 }
181
182 if (x86_quirks->update_genapic)
183 x86_quirks->update_genapic();
184
185 /* Parsed again by __setup for debug/verbose */
186 return 0;
187}
188early_param("apic", parse_apic);
189
190void __init generic_bigsmp_probe(void)
191{
192#ifdef CONFIG_X86_BIGSMP
193 /*
194 * This routine is used to switch to bigsmp mode when
195 * - There is no apic= option specified by the user
196 * - generic_apic_probe() has chosen apic_default as the sub_arch
197 * - we find more than 8 CPUs in acpi LAPIC listing with xAPIC support
198 */
199
200 if (!cmdline_apic && apic == &apic_default) {
201 if (apic_bigsmp.probe()) {
202 apic = &apic_bigsmp;
203 if (x86_quirks->update_genapic)
204 x86_quirks->update_genapic();
205 printk(KERN_INFO "Overriding APIC driver with %s\n",
206 apic->name);
207 }
208 }
209#endif
210}
211
212void __init generic_apic_probe(void)
213{
214 if (!cmdline_apic) {
215 int i;
216 for (i = 0; apic_probe[i]; i++) {
217 if (apic_probe[i]->probe()) {
218 apic = apic_probe[i];
219 break;
220 }
221 }
222 /* Not visible without early console */
223 if (!apic_probe[i])
224 panic("Didn't find an APIC driver");
225
226 if (x86_quirks->update_genapic)
227 x86_quirks->update_genapic();
228 }
229 printk(KERN_INFO "Using APIC driver %s\n", apic->name);
230}
231
232/* These functions can switch the APIC even after the initial ->probe() */
233
234int __init
235generic_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
236{
237 int i;
238
239 for (i = 0; apic_probe[i]; ++i) {
240 if (!apic_probe[i]->mps_oem_check)
241 continue;
242 if (!apic_probe[i]->mps_oem_check(mpc, oem, productid))
243 continue;
244
245 if (!cmdline_apic) {
246 apic = apic_probe[i];
247 if (x86_quirks->update_genapic)
248 x86_quirks->update_genapic();
249 printk(KERN_INFO "Switched to APIC driver `%s'.\n",
250 apic->name);
251 }
252 return 1;
253 }
254 return 0;
255}
256
257int __init default_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
258{
259 int i;
260
261 for (i = 0; apic_probe[i]; ++i) {
262 if (!apic_probe[i]->acpi_madt_oem_check)
263 continue;
264 if (!apic_probe[i]->acpi_madt_oem_check(oem_id, oem_table_id))
265 continue;
266
267 if (!cmdline_apic) {
268 apic = apic_probe[i];
269 if (x86_quirks->update_genapic)
270 x86_quirks->update_genapic();
271 printk(KERN_INFO "Switched to APIC driver `%s'.\n",
272 apic->name);
273 }
274 return 1;
275 }
276 return 0;
277}
Ingo Molnar6bda2c82009-01-28 19:32:55 +0100278
279#endif /* CONFIG_X86_LOCAL_APIC */
280
281/**
282 * pre_intr_init_hook - initialisation prior to setting up interrupt vectors
283 *
284 * Description:
285 * Perform any necessary interrupt initialisation prior to setting up
286 * the "ordinary" interrupt call gates. For legacy reasons, the ISA
287 * interrupts should be initialised here if the machine emulates a PC
288 * in any way.
289 **/
290void __init pre_intr_init_hook(void)
291{
292 if (x86_quirks->arch_pre_intr_init) {
293 if (x86_quirks->arch_pre_intr_init())
294 return;
295 }
296 init_ISA_irqs();
297}
298
299/**
300 * intr_init_hook - post gate setup interrupt initialisation
301 *
302 * Description:
303 * Fill in any interrupts that may have been left out by the general
304 * init_IRQ() routine. interrupts having to do with the machine rather
305 * than the devices on the I/O bus (like APIC interrupts in intel MP
306 * systems) are started here.
307 **/
308void __init intr_init_hook(void)
309{
310 if (x86_quirks->arch_intr_init) {
311 if (x86_quirks->arch_intr_init())
312 return;
313 }
314}
315
316/**
317 * pre_setup_arch_hook - hook called prior to any setup_arch() execution
318 *
319 * Description:
320 * generally used to activate any machine specific identification
321 * routines that may be needed before setup_arch() runs. On Voyager
322 * this is used to get the board revision and type.
323 **/
324void __init pre_setup_arch_hook(void)
325{
326}
327
328/**
329 * trap_init_hook - initialise system specific traps
330 *
331 * Description:
332 * Called as the final act of trap_init(). Used in VISWS to initialise
333 * the various board specific APIC traps.
334 **/
335void __init trap_init_hook(void)
336{
337 if (x86_quirks->arch_trap_init) {
338 if (x86_quirks->arch_trap_init())
339 return;
340 }
341}
342
343static struct irqaction irq0 = {
344 .handler = timer_interrupt,
345 .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL,
346 .mask = CPU_MASK_NONE,
347 .name = "timer"
348};
349
350/**
351 * pre_time_init_hook - do any specific initialisations before.
352 *
353 **/
354void __init pre_time_init_hook(void)
355{
356 if (x86_quirks->arch_pre_time_init)
357 x86_quirks->arch_pre_time_init();
358}
359
360/**
361 * time_init_hook - do any specific initialisations for the system timer.
362 *
363 * Description:
364 * Must plug the system timer interrupt source at HZ into the IRQ listed
365 * in irq_vectors.h:TIMER_IRQ
366 **/
367void __init time_init_hook(void)
368{
369 if (x86_quirks->arch_time_init) {
370 /*
371 * A nonzero return code does not mean failure, it means
372 * that the architecture quirk does not want any
373 * generic (timer) setup to be performed after this:
374 */
375 if (x86_quirks->arch_time_init())
376 return;
377 }
378
379 irq0.mask = cpumask_of_cpu(0);
380 setup_irq(0, &irq0);
381}
382
383#ifdef CONFIG_MCA
384/**
385 * mca_nmi_hook - hook into MCA specific NMI chain
386 *
387 * Description:
388 * The MCA (Microchannel Architecture) has an NMI chain for NMI sources
389 * along the MCA bus. Use this to hook into that chain if you will need
390 * it.
391 **/
392void mca_nmi_hook(void)
393{
394 /*
395 * If I recall correctly, there's a whole bunch of other things that
396 * we can do to check for NMI problems, but that's all I know about
397 * at the moment.
398 */
399 pr_warning("NMI generated from unknown source!\n");
400}
401#endif
402
403static __init int no_ipi_broadcast(char *str)
404{
405 get_option(&str, &no_broadcast);
406 pr_info("Using %s mode\n",
407 no_broadcast ? "No IPI Broadcast" : "IPI Broadcast");
408 return 1;
409}
410__setup("no_ipi_broadcast=", no_ipi_broadcast);
411
412static int __init print_ipi_mode(void)
413{
414 pr_info("Using IPI %s mode\n",
415 no_broadcast ? "No-Shortcut" : "Shortcut");
416 return 0;
417}
418
419late_initcall(print_ipi_mode);
420