| Michael Ellerman | 5cd16ee | 2005-11-11 14:25:24 +1100 | [diff] [blame] | 1 | #ifndef _ASM_POWERPC_PAGE_32_H | 
 | 2 | #define _ASM_POWERPC_PAGE_32_H | 
| Arnd Bergmann | 88ced03 | 2005-12-16 22:43:46 +0100 | [diff] [blame] | 3 | #ifdef __KERNEL__ | 
| Michael Ellerman | 5cd16ee | 2005-11-11 14:25:24 +1100 | [diff] [blame] | 4 |  | 
 | 5 | #define VM_DATA_DEFAULT_FLAGS	VM_DATA_DEFAULT_FLAGS32 | 
 | 6 |  | 
| Paul Mackerras | 493f25e | 2005-11-14 17:32:50 +1100 | [diff] [blame] | 7 | #define PPC_MEMSTART	0 | 
 | 8 |  | 
| Michael Ellerman | 5cd16ee | 2005-11-11 14:25:24 +1100 | [diff] [blame] | 9 | #ifndef __ASSEMBLY__ | 
 | 10 | /* | 
 | 11 |  * The basic type of a PTE - 64 bits for those CPUs with > 32 bit | 
 | 12 |  * physical addressing.  For now this just the IBM PPC440. | 
 | 13 |  */ | 
 | 14 | #ifdef CONFIG_PTE_64BIT | 
 | 15 | typedef unsigned long long pte_basic_t; | 
 | 16 | #define PTE_SHIFT	(PAGE_SHIFT - 3)	/* 512 ptes per page */ | 
 | 17 | #define PTE_FMT		"%16Lx" | 
 | 18 | #else | 
 | 19 | typedef unsigned long pte_basic_t; | 
 | 20 | #define PTE_SHIFT	(PAGE_SHIFT - 2)	/* 1024 ptes per page */ | 
 | 21 | #define PTE_FMT		"%.8lx" | 
 | 22 | #endif | 
 | 23 |  | 
 | 24 | struct page; | 
 | 25 | extern void clear_pages(void *page, int order); | 
 | 26 | static inline void clear_page(void *page) { clear_pages(page, 0); } | 
 | 27 | extern void copy_page(void *to, void *from); | 
 | 28 |  | 
 | 29 | /* Pure 2^n version of get_order */ | 
 | 30 | extern __inline__ int get_order(unsigned long size) | 
 | 31 | { | 
 | 32 | 	int lz; | 
 | 33 |  | 
 | 34 | 	size = (size-1) >> PAGE_SHIFT; | 
 | 35 | 	asm ("cntlzw %0,%1" : "=r" (lz) : "r" (size)); | 
 | 36 | 	return 32 - lz; | 
 | 37 | } | 
 | 38 |  | 
 | 39 | #endif /* __ASSEMBLY__ */ | 
 | 40 |  | 
| Arnd Bergmann | 88ced03 | 2005-12-16 22:43:46 +0100 | [diff] [blame] | 41 | #endif /* __KERNEL__ */ | 
| Michael Ellerman | 5cd16ee | 2005-11-11 14:25:24 +1100 | [diff] [blame] | 42 | #endif /* _ASM_POWERPC_PAGE_32_H */ |