blob: a51bb9fb3c89d2047151a5da22d14c7582a43643 [file] [log] [blame]
Haavard Skinnemoen9ca20a82007-04-12 17:26:57 +02001/*
2 * Board-specific setup code for the ATNGW100 Network Gateway
3 *
4 * Copyright (C) 2005-2006 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/clk.h>
11#include <linux/etherdevice.h>
David Brownell7ef31e92008-06-12 12:18:05 -070012#include <linux/irq.h>
13#include <linux/i2c.h>
Haavard Skinnemoen54bb69e2007-07-12 16:36:34 +020014#include <linux/i2c-gpio.h>
Haavard Skinnemoen9ca20a82007-04-12 17:26:57 +020015#include <linux/init.h>
16#include <linux/linkage.h>
17#include <linux/platform_device.h>
18#include <linux/types.h>
David Brownellf9f451d2007-07-08 11:49:53 +010019#include <linux/leds.h>
Haavard Skinnemoen9ca20a82007-04-12 17:26:57 +020020#include <linux/spi/spi.h>
21
22#include <asm/io.h>
23#include <asm/setup.h>
24
Haavard Skinnemoen438ff3f2007-10-29 15:28:07 +010025#include <asm/arch/at32ap700x.h>
Haavard Skinnemoen9ca20a82007-04-12 17:26:57 +020026#include <asm/arch/board.h>
27#include <asm/arch/init.h>
David Brownellf9f451d2007-07-08 11:49:53 +010028#include <asm/arch/portmux.h>
Haavard Skinnemoen9ca20a82007-04-12 17:26:57 +020029
Alex60ed7952008-03-17 14:55:06 +010030/* Oscillator frequencies. These are board-specific */
31unsigned long at32_board_osc_rates[3] = {
32 [0] = 32768, /* 32.768 kHz on RTC osc */
33 [1] = 20000000, /* 20 MHz on osc0 */
34 [2] = 12000000, /* 12 MHz on osc1 */
35};
36
Haavard Skinnemoen9ca20a82007-04-12 17:26:57 +020037/* Initialized by bootloader-specific startup code. */
38struct tag *bootloader_tags __initdata;
39
40struct eth_addr {
41 u8 addr[6];
42};
43static struct eth_addr __initdata hw_addr[2];
44static struct eth_platform_data __initdata eth_data[2];
45
46static struct spi_board_info spi0_board_info[] __initdata = {
47 {
48 .modalias = "mtd_dataflash",
49 .max_speed_hz = 10000000,
50 .chip_select = 0,
51 },
52};
53
54/*
55 * The next two functions should go away as the boot loader is
56 * supposed to initialize the macb address registers with a valid
57 * ethernet address. But we need to keep it around for a while until
58 * we can be reasonably sure the boot loader does this.
59 *
60 * The phy_id is ignored as the driver will probe for it.
61 */
62static int __init parse_tag_ethernet(struct tag *tag)
63{
64 int i;
65
66 i = tag->u.ethernet.mac_index;
67 if (i < ARRAY_SIZE(hw_addr))
68 memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address,
69 sizeof(hw_addr[i].addr));
70
71 return 0;
72}
73__tagtable(ATAG_ETHERNET, parse_tag_ethernet);
74
75static void __init set_hw_addr(struct platform_device *pdev)
76{
77 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
78 const u8 *addr;
79 void __iomem *regs;
80 struct clk *pclk;
81
82 if (!res)
83 return;
84 if (pdev->id >= ARRAY_SIZE(hw_addr))
85 return;
86
87 addr = hw_addr[pdev->id].addr;
88 if (!is_valid_ether_addr(addr))
89 return;
90
91 /*
92 * Since this is board-specific code, we'll cheat and use the
93 * physical address directly as we happen to know that it's
94 * the same as the virtual address.
95 */
96 regs = (void __iomem __force *)res->start;
97 pclk = clk_get(&pdev->dev, "pclk");
98 if (!pclk)
99 return;
100
101 clk_enable(pclk);
102 __raw_writel((addr[3] << 24) | (addr[2] << 16)
103 | (addr[1] << 8) | addr[0], regs + 0x98);
104 __raw_writel((addr[5] << 8) | addr[4], regs + 0x9c);
105 clk_disable(pclk);
106 clk_put(pclk);
107}
108
Haavard Skinnemoen9ca20a82007-04-12 17:26:57 +0200109void __init setup_board(void)
110{
111 at32_map_usart(1, 0); /* USART 1: /dev/ttyS0, DB9 */
112 at32_setup_serial_console(0);
113}
114
David Brownellf9f451d2007-07-08 11:49:53 +0100115static const struct gpio_led ngw_leds[] = {
116 { .name = "sys", .gpio = GPIO_PIN_PA(16), .active_low = 1,
117 .default_trigger = "heartbeat",
118 },
119 { .name = "a", .gpio = GPIO_PIN_PA(19), .active_low = 1, },
120 { .name = "b", .gpio = GPIO_PIN_PE(19), .active_low = 1, },
121};
122
123static const struct gpio_led_platform_data ngw_led_data = {
124 .num_leds = ARRAY_SIZE(ngw_leds),
125 .leds = (void *) ngw_leds,
126};
127
128static struct platform_device ngw_gpio_leds = {
129 .name = "leds-gpio",
130 .id = -1,
131 .dev = {
132 .platform_data = (void *) &ngw_led_data,
133 }
134};
135
Haavard Skinnemoen54bb69e2007-07-12 16:36:34 +0200136static struct i2c_gpio_platform_data i2c_gpio_data = {
David Brownell82c54f82007-09-25 07:17:48 -0700137 .sda_pin = GPIO_PIN_PA(6),
138 .scl_pin = GPIO_PIN_PA(7),
139 .sda_is_open_drain = 1,
140 .scl_is_open_drain = 1,
141 .udelay = 2, /* close to 100 kHz */
Haavard Skinnemoen54bb69e2007-07-12 16:36:34 +0200142};
143
144static struct platform_device i2c_gpio_device = {
145 .name = "i2c-gpio",
146 .id = 0,
147 .dev = {
148 .platform_data = &i2c_gpio_data,
149 },
150};
151
David Brownell7ef31e92008-06-12 12:18:05 -0700152static struct i2c_board_info __initdata i2c_info[] = {
153 /* NOTE: original ATtiny24 firmware is at address 0x0b */
154};
155
Haavard Skinnemoen9ca20a82007-04-12 17:26:57 +0200156static int __init atngw100_init(void)
157{
David Brownellf9f451d2007-07-08 11:49:53 +0100158 unsigned i;
159
Haavard Skinnemoen9ca20a82007-04-12 17:26:57 +0200160 /*
161 * ATNGW100 uses 16-bit SDRAM interface, so we don't need to
162 * reserve any pins for it.
163 */
164
165 at32_add_system_devices();
166
167 at32_add_device_usart(0);
168
169 set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
170 set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
171
172 at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
Haavard Skinnemoen6fcf0612007-06-14 17:37:31 +0200173 at32_add_device_usba(0, NULL);
Haavard Skinnemoen9ca20a82007-04-12 17:26:57 +0200174
David Brownellf9f451d2007-07-08 11:49:53 +0100175 for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) {
176 at32_select_gpio(ngw_leds[i].gpio,
177 AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
178 }
179 platform_device_register(&ngw_gpio_leds);
180
David Brownell7ef31e92008-06-12 12:18:05 -0700181 /* all these i2c/smbus pins should have external pullups for
182 * open-drain sharing among all I2C devices. SDA and SCL do;
183 * PB28/EXTINT3 doesn't; it should be SMBALERT# (for PMBus),
184 * but it's not available off-board.
185 */
186 at32_select_periph(GPIO_PIN_PB(28), 0, AT32_GPIOF_PULLUP);
David Brownell82c54f82007-09-25 07:17:48 -0700187 at32_select_gpio(i2c_gpio_data.sda_pin,
188 AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
189 at32_select_gpio(i2c_gpio_data.scl_pin,
190 AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
Haavard Skinnemoen54bb69e2007-07-12 16:36:34 +0200191 platform_device_register(&i2c_gpio_device);
David Brownell7ef31e92008-06-12 12:18:05 -0700192 i2c_register_board_info(0, i2c_info, ARRAY_SIZE(i2c_info));
Haavard Skinnemoen54bb69e2007-07-12 16:36:34 +0200193
Haavard Skinnemoen9ca20a82007-04-12 17:26:57 +0200194 return 0;
195}
196postcore_initcall(atngw100_init);
David Brownell7ef31e92008-06-12 12:18:05 -0700197
198static int __init atngw100_arch_init(void)
199{
200 /* set_irq_type() after the arch_initcall for EIC has run, and
201 * before the I2C subsystem could try using this IRQ.
202 */
203 return set_irq_type(AT32_EXTINT(3), IRQ_TYPE_EDGE_FALLING);
204}
205arch_initcall(atngw100_arch_init);