blob: d0084bcb1eca40b99b13856fe9ad2817338686cd [file] [log] [blame]
Zhu Yib481de92007-09-25 17:54:57 -07001/******************************************************************************
2 *
Reinette Chatreeb7ae892008-03-11 16:17:17 -07003 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
Zhu Yib481de92007-09-25 17:54:57 -07004 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
Zhu Yib481de92007-09-25 17:54:57 -070030#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/version.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/dma-mapping.h>
36#include <linux/delay.h>
37#include <linux/skbuff.h>
38#include <linux/netdevice.h>
39#include <linux/wireless.h>
40#include <linux/firmware.h>
Zhu Yib481de92007-09-25 17:54:57 -070041#include <linux/etherdevice.h>
42#include <linux/if_arp.h>
43
44#include <net/ieee80211_radiotap.h>
45#include <net/mac80211.h>
46
47#include <asm/div64.h>
48
Tomas Winkler82b9a122008-03-04 18:09:30 -080049#include "iwl-3945-core.h"
Zhu Yib481de92007-09-25 17:54:57 -070050#include "iwl-3945.h"
51#include "iwl-helpers.h"
52
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +080053#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -080054u32 iwl3945_debug_level;
Zhu Yib481de92007-09-25 17:54:57 -070055#endif
56
Christoph Hellwigbb8c0932008-01-27 16:41:47 -080057static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
58 struct iwl3945_tx_queue *txq);
Christoph Hellwig416e1432007-10-25 17:15:49 +080059
Zhu Yib481de92007-09-25 17:54:57 -070060/******************************************************************************
61 *
62 * module boiler plate
63 *
64 ******************************************************************************/
65
66/* module parameters */
Cahill, Ben M6440adb2007-11-29 11:09:55 +080067static int iwl3945_param_disable_hw_scan; /* def: 0 = use 3945's h/w scan */
68static int iwl3945_param_debug; /* def: 0 = minimal debug log messages */
69static int iwl3945_param_disable; /* def: 0 = enable radio */
Ben Cahill9fbab512007-11-29 11:09:47 +080070static int iwl3945_param_antenna; /* def: 0 = both antennas (use diversity) */
Cahill, Ben M6440adb2007-11-29 11:09:55 +080071int iwl3945_param_hwcrypto; /* def: 0 = use software encryption */
72static int iwl3945_param_qos_enable = 1; /* def: 1 = use quality of service */
Ron Rindjunskydfe7d452008-04-15 16:01:45 -070073int iwl3945_param_queues_num = IWL39_MAX_NUM_QUEUES; /* def: 8 Tx queues */
Zhu Yib481de92007-09-25 17:54:57 -070074
75/*
76 * module name, copyright, version, etc.
77 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
78 */
79
80#define DRV_DESCRIPTION \
81"Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
82
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +080083#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -070084#define VD "d"
85#else
86#define VD
87#endif
88
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +080089#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -070090#define VS "s"
91#else
92#define VS
93#endif
94
Reinette Chatreb9e0b442008-02-08 16:39:11 -080095#define IWLWIFI_VERSION "1.2.26k" VD VS
Reinette Chatreeb7ae892008-03-11 16:17:17 -070096#define DRV_COPYRIGHT "Copyright(c) 2003-2008 Intel Corporation"
Zhu Yib481de92007-09-25 17:54:57 -070097#define DRV_VERSION IWLWIFI_VERSION
98
Zhu Yib481de92007-09-25 17:54:57 -070099
100MODULE_DESCRIPTION(DRV_DESCRIPTION);
101MODULE_VERSION(DRV_VERSION);
102MODULE_AUTHOR(DRV_COPYRIGHT);
103MODULE_LICENSE("GPL");
104
Johannes Berg8318d782008-01-24 19:38:38 +0100105static const struct ieee80211_supported_band *iwl3945_get_band(
106 struct iwl3945_priv *priv, enum ieee80211_band band)
Zhu Yib481de92007-09-25 17:54:57 -0700107{
Johannes Berg8318d782008-01-24 19:38:38 +0100108 return priv->hw->wiphy->bands[band];
Zhu Yib481de92007-09-25 17:54:57 -0700109}
110
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800111static int iwl3945_is_empty_essid(const char *essid, int essid_len)
Zhu Yib481de92007-09-25 17:54:57 -0700112{
113 /* Single white space is for Linksys APs */
114 if (essid_len == 1 && essid[0] == ' ')
115 return 1;
116
117 /* Otherwise, if the entire essid is 0, we assume it is hidden */
118 while (essid_len) {
119 essid_len--;
120 if (essid[essid_len] != '\0')
121 return 0;
122 }
123
124 return 1;
125}
126
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800127static const char *iwl3945_escape_essid(const char *essid, u8 essid_len)
Zhu Yib481de92007-09-25 17:54:57 -0700128{
129 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
130 const char *s = essid;
131 char *d = escaped;
132
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800133 if (iwl3945_is_empty_essid(essid, essid_len)) {
Zhu Yib481de92007-09-25 17:54:57 -0700134 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
135 return escaped;
136 }
137
138 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
139 while (essid_len--) {
140 if (*s == '\0') {
141 *d++ = '\\';
142 *d++ = '0';
143 s++;
144 } else
145 *d++ = *s++;
146 }
147 *d = '\0';
148 return escaped;
149}
150
Zhu Yib481de92007-09-25 17:54:57 -0700151/*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
152 * DMA services
153 *
154 * Theory of operation
155 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800156 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
157 * of buffer descriptors, each of which points to one or more data buffers for
158 * the device to read from or fill. Driver and device exchange status of each
159 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
160 * entries in each circular buffer, to protect against confusing empty and full
161 * queue states.
162 *
163 * The device reads or writes the data in the queues via the device's several
164 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
Zhu Yib481de92007-09-25 17:54:57 -0700165 *
166 * For Tx queue, there are low mark and high mark limits. If, after queuing
167 * the packet for Tx, free space become < low mark, Tx queue stopped. When
168 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
169 * Tx queue resumed.
170 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800171 * The 3945 operates with six queues: One receive queue, one transmit queue
172 * (#4) for sending commands to the device firmware, and four transmit queues
173 * (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
Zhu Yib481de92007-09-25 17:54:57 -0700174 ***************************************************/
175
Tomas Winklerc54b6792008-03-06 17:36:53 -0800176int iwl3945_queue_space(const struct iwl3945_queue *q)
Zhu Yib481de92007-09-25 17:54:57 -0700177{
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800178 int s = q->read_ptr - q->write_ptr;
Zhu Yib481de92007-09-25 17:54:57 -0700179
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800180 if (q->read_ptr > q->write_ptr)
Zhu Yib481de92007-09-25 17:54:57 -0700181 s -= q->n_bd;
182
183 if (s <= 0)
184 s += q->n_window;
185 /* keep some reserve to not confuse empty and full situations */
186 s -= 2;
187 if (s < 0)
188 s = 0;
189 return s;
190}
191
Tomas Winklerc54b6792008-03-06 17:36:53 -0800192int iwl3945_x2_queue_used(const struct iwl3945_queue *q, int i)
Zhu Yib481de92007-09-25 17:54:57 -0700193{
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800194 return q->write_ptr > q->read_ptr ?
195 (i >= q->read_ptr && i < q->write_ptr) :
196 !(i < q->read_ptr && i >= q->write_ptr);
Zhu Yib481de92007-09-25 17:54:57 -0700197}
198
Tomas Winklerc54b6792008-03-06 17:36:53 -0800199
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800200static inline u8 get_cmd_index(struct iwl3945_queue *q, u32 index, int is_huge)
Zhu Yib481de92007-09-25 17:54:57 -0700201{
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800202 /* This is for scan command, the big buffer at end of command array */
Zhu Yib481de92007-09-25 17:54:57 -0700203 if (is_huge)
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800204 return q->n_window; /* must be power of 2 */
Zhu Yib481de92007-09-25 17:54:57 -0700205
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800206 /* Otherwise, use normal size buffers */
Zhu Yib481de92007-09-25 17:54:57 -0700207 return index & (q->n_window - 1);
208}
209
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800210/**
211 * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
212 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800213static int iwl3945_queue_init(struct iwl3945_priv *priv, struct iwl3945_queue *q,
Zhu Yib481de92007-09-25 17:54:57 -0700214 int count, int slots_num, u32 id)
215{
216 q->n_bd = count;
217 q->n_window = slots_num;
218 q->id = id;
219
Tomas Winklerc54b6792008-03-06 17:36:53 -0800220 /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
221 * and iwl_queue_dec_wrap are broken. */
Zhu Yib481de92007-09-25 17:54:57 -0700222 BUG_ON(!is_power_of_2(count));
223
224 /* slots_num must be power-of-two size, otherwise
225 * get_cmd_index is broken. */
226 BUG_ON(!is_power_of_2(slots_num));
227
228 q->low_mark = q->n_window / 4;
229 if (q->low_mark < 4)
230 q->low_mark = 4;
231
232 q->high_mark = q->n_window / 8;
233 if (q->high_mark < 2)
234 q->high_mark = 2;
235
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800236 q->write_ptr = q->read_ptr = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700237
238 return 0;
239}
240
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800241/**
242 * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
243 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800244static int iwl3945_tx_queue_alloc(struct iwl3945_priv *priv,
245 struct iwl3945_tx_queue *txq, u32 id)
Zhu Yib481de92007-09-25 17:54:57 -0700246{
247 struct pci_dev *dev = priv->pci_dev;
248
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800249 /* Driver private data, only for Tx (not command) queues,
250 * not shared with device. */
Zhu Yib481de92007-09-25 17:54:57 -0700251 if (id != IWL_CMD_QUEUE_NUM) {
252 txq->txb = kmalloc(sizeof(txq->txb[0]) *
253 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
254 if (!txq->txb) {
Ian Schram01ebd062007-10-25 17:15:22 +0800255 IWL_ERROR("kmalloc for auxiliary BD "
Zhu Yib481de92007-09-25 17:54:57 -0700256 "structures failed\n");
257 goto error;
258 }
259 } else
260 txq->txb = NULL;
261
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800262 /* Circular buffer of transmit frame descriptors (TFDs),
263 * shared with device */
Zhu Yib481de92007-09-25 17:54:57 -0700264 txq->bd = pci_alloc_consistent(dev,
265 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
266 &txq->q.dma_addr);
267
268 if (!txq->bd) {
269 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
270 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
271 goto error;
272 }
273 txq->q.id = id;
274
275 return 0;
276
277 error:
278 if (txq->txb) {
279 kfree(txq->txb);
280 txq->txb = NULL;
281 }
282
283 return -ENOMEM;
284}
285
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800286/**
287 * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
288 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800289int iwl3945_tx_queue_init(struct iwl3945_priv *priv,
290 struct iwl3945_tx_queue *txq, int slots_num, u32 txq_id)
Zhu Yib481de92007-09-25 17:54:57 -0700291{
292 struct pci_dev *dev = priv->pci_dev;
293 int len;
294 int rc = 0;
295
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800296 /*
297 * Alloc buffer array for commands (Tx or other types of commands).
298 * For the command queue (#4), allocate command space + one big
299 * command for scan, since scan command is very huge; the system will
300 * not have two scans at the same time, so only one is needed.
301 * For data Tx queues (all other queues), no super-size command
302 * space is needed.
303 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800304 len = sizeof(struct iwl3945_cmd) * slots_num;
Zhu Yib481de92007-09-25 17:54:57 -0700305 if (txq_id == IWL_CMD_QUEUE_NUM)
306 len += IWL_MAX_SCAN_SIZE;
307 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
308 if (!txq->cmd)
309 return -ENOMEM;
310
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800311 /* Alloc driver data array and TFD circular buffer */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800312 rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
Zhu Yib481de92007-09-25 17:54:57 -0700313 if (rc) {
314 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
315
316 return -ENOMEM;
317 }
318 txq->need_update = 0;
319
320 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
Tomas Winklerc54b6792008-03-06 17:36:53 -0800321 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
Zhu Yib481de92007-09-25 17:54:57 -0700322 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800323
324 /* Initialize queue high/low-water, head/tail indexes */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800325 iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
Zhu Yib481de92007-09-25 17:54:57 -0700326
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800327 /* Tell device where to find queue, enable DMA channel. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800328 iwl3945_hw_tx_queue_init(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -0700329
330 return 0;
331}
332
333/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800334 * iwl3945_tx_queue_free - Deallocate DMA queue.
Zhu Yib481de92007-09-25 17:54:57 -0700335 * @txq: Transmit queue to deallocate.
336 *
337 * Empty queue by removing and destroying all BD's.
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800338 * Free all buffers.
339 * 0-fill, but do not free "txq" descriptor structure.
Zhu Yib481de92007-09-25 17:54:57 -0700340 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800341void iwl3945_tx_queue_free(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
Zhu Yib481de92007-09-25 17:54:57 -0700342{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800343 struct iwl3945_queue *q = &txq->q;
Zhu Yib481de92007-09-25 17:54:57 -0700344 struct pci_dev *dev = priv->pci_dev;
345 int len;
346
347 if (q->n_bd == 0)
348 return;
349
350 /* first, empty all BD's */
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800351 for (; q->write_ptr != q->read_ptr;
Tomas Winklerc54b6792008-03-06 17:36:53 -0800352 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800353 iwl3945_hw_txq_free_tfd(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -0700354
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800355 len = sizeof(struct iwl3945_cmd) * q->n_window;
Zhu Yib481de92007-09-25 17:54:57 -0700356 if (q->id == IWL_CMD_QUEUE_NUM)
357 len += IWL_MAX_SCAN_SIZE;
358
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800359 /* De-alloc array of command/tx buffers */
Zhu Yib481de92007-09-25 17:54:57 -0700360 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
361
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800362 /* De-alloc circular buffer of TFDs */
Zhu Yib481de92007-09-25 17:54:57 -0700363 if (txq->q.n_bd)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800364 pci_free_consistent(dev, sizeof(struct iwl3945_tfd_frame) *
Zhu Yib481de92007-09-25 17:54:57 -0700365 txq->q.n_bd, txq->bd, txq->q.dma_addr);
366
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800367 /* De-alloc array of per-TFD driver data */
Zhu Yib481de92007-09-25 17:54:57 -0700368 if (txq->txb) {
369 kfree(txq->txb);
370 txq->txb = NULL;
371 }
372
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800373 /* 0-fill queue descriptor structure */
Zhu Yib481de92007-09-25 17:54:57 -0700374 memset(txq, 0, sizeof(*txq));
375}
376
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800377const u8 iwl3945_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
Zhu Yib481de92007-09-25 17:54:57 -0700378
379/*************** STATION TABLE MANAGEMENT ****
Ben Cahill9fbab512007-11-29 11:09:47 +0800380 * mac80211 should be examined to determine if sta_info is duplicating
Zhu Yib481de92007-09-25 17:54:57 -0700381 * the functionality provided here
382 */
383
384/**************************************************************/
Ian Schram01ebd062007-10-25 17:15:22 +0800385#if 0 /* temporary disable till we add real remove station */
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800386/**
387 * iwl3945_remove_station - Remove driver's knowledge of station.
388 *
389 * NOTE: This does not remove station from device's station table.
390 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800391static u8 iwl3945_remove_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap)
Zhu Yib481de92007-09-25 17:54:57 -0700392{
393 int index = IWL_INVALID_STATION;
394 int i;
395 unsigned long flags;
396
397 spin_lock_irqsave(&priv->sta_lock, flags);
398
399 if (is_ap)
400 index = IWL_AP_ID;
401 else if (is_broadcast_ether_addr(addr))
402 index = priv->hw_setting.bcast_sta_id;
403 else
404 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
405 if (priv->stations[i].used &&
406 !compare_ether_addr(priv->stations[i].sta.sta.addr,
407 addr)) {
408 index = i;
409 break;
410 }
411
412 if (unlikely(index == IWL_INVALID_STATION))
413 goto out;
414
415 if (priv->stations[index].used) {
416 priv->stations[index].used = 0;
417 priv->num_stations--;
418 }
419
420 BUG_ON(priv->num_stations < 0);
421
422out:
423 spin_unlock_irqrestore(&priv->sta_lock, flags);
424 return 0;
425}
Zhu Yi556f8db2007-09-27 11:27:33 +0800426#endif
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800427
428/**
429 * iwl3945_clear_stations_table - Clear the driver's station table
430 *
431 * NOTE: This does not clear or otherwise alter the device's station table.
432 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800433static void iwl3945_clear_stations_table(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700434{
435 unsigned long flags;
436
437 spin_lock_irqsave(&priv->sta_lock, flags);
438
439 priv->num_stations = 0;
440 memset(priv->stations, 0, sizeof(priv->stations));
441
442 spin_unlock_irqrestore(&priv->sta_lock, flags);
443}
444
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800445/**
446 * iwl3945_add_station - Add station to station tables in driver and device
447 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800448u8 iwl3945_add_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap, u8 flags)
Zhu Yib481de92007-09-25 17:54:57 -0700449{
450 int i;
451 int index = IWL_INVALID_STATION;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800452 struct iwl3945_station_entry *station;
Zhu Yib481de92007-09-25 17:54:57 -0700453 unsigned long flags_spin;
Joe Perches0795af52007-10-03 17:59:30 -0700454 DECLARE_MAC_BUF(mac);
Zhu Yic14c5212007-09-27 11:27:35 +0800455 u8 rate;
Zhu Yib481de92007-09-25 17:54:57 -0700456
457 spin_lock_irqsave(&priv->sta_lock, flags_spin);
458 if (is_ap)
459 index = IWL_AP_ID;
460 else if (is_broadcast_ether_addr(addr))
461 index = priv->hw_setting.bcast_sta_id;
462 else
463 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
464 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
465 addr)) {
466 index = i;
467 break;
468 }
469
470 if (!priv->stations[i].used &&
471 index == IWL_INVALID_STATION)
472 index = i;
473 }
474
Ian Schram01ebd062007-10-25 17:15:22 +0800475 /* These two conditions has the same outcome but keep them separate
Zhu Yib481de92007-09-25 17:54:57 -0700476 since they have different meaning */
477 if (unlikely(index == IWL_INVALID_STATION)) {
478 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
479 return index;
480 }
481
482 if (priv->stations[index].used &&
483 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
484 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
485 return index;
486 }
487
Joe Perches0795af52007-10-03 17:59:30 -0700488 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
Zhu Yib481de92007-09-25 17:54:57 -0700489 station = &priv->stations[index];
490 station->used = 1;
491 priv->num_stations++;
492
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800493 /* Set up the REPLY_ADD_STA command to send to device */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800494 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
Zhu Yib481de92007-09-25 17:54:57 -0700495 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
496 station->sta.mode = 0;
497 station->sta.sta.sta_id = index;
498 station->sta.station_flags = 0;
499
Johannes Berg8318d782008-01-24 19:38:38 +0100500 if (priv->band == IEEE80211_BAND_5GHZ)
Tomas Winkler69946332007-10-25 17:15:27 +0800501 rate = IWL_RATE_6M_PLCP;
502 else
503 rate = IWL_RATE_1M_PLCP;
Zhu Yic14c5212007-09-27 11:27:35 +0800504
505 /* Turn on both antennas for the station... */
506 station->sta.rate_n_flags =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800507 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
Zhu Yic14c5212007-09-27 11:27:35 +0800508 station->current_rate.rate_n_flags =
509 le16_to_cpu(station->sta.rate_n_flags);
510
Zhu Yib481de92007-09-25 17:54:57 -0700511 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800512
513 /* Add station to device's station table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800514 iwl3945_send_add_station(priv, &station->sta, flags);
Zhu Yib481de92007-09-25 17:54:57 -0700515 return index;
516
517}
518
519/*************** DRIVER STATUS FUNCTIONS *****/
520
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800521static inline int iwl3945_is_ready(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700522{
523 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
524 * set but EXIT_PENDING is not */
525 return test_bit(STATUS_READY, &priv->status) &&
526 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
527 !test_bit(STATUS_EXIT_PENDING, &priv->status);
528}
529
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800530static inline int iwl3945_is_alive(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700531{
532 return test_bit(STATUS_ALIVE, &priv->status);
533}
534
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800535static inline int iwl3945_is_init(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700536{
537 return test_bit(STATUS_INIT, &priv->status);
538}
539
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800540static inline int iwl3945_is_rfkill(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700541{
542 return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
543 test_bit(STATUS_RF_KILL_SW, &priv->status);
544}
545
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800546static inline int iwl3945_is_ready_rf(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700547{
548
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800549 if (iwl3945_is_rfkill(priv))
Zhu Yib481de92007-09-25 17:54:57 -0700550 return 0;
551
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800552 return iwl3945_is_ready(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700553}
554
555/*************** HOST COMMAND QUEUE FUNCTIONS *****/
556
557#define IWL_CMD(x) case x : return #x
558
559static const char *get_cmd_string(u8 cmd)
560{
561 switch (cmd) {
562 IWL_CMD(REPLY_ALIVE);
563 IWL_CMD(REPLY_ERROR);
564 IWL_CMD(REPLY_RXON);
565 IWL_CMD(REPLY_RXON_ASSOC);
566 IWL_CMD(REPLY_QOS_PARAM);
567 IWL_CMD(REPLY_RXON_TIMING);
568 IWL_CMD(REPLY_ADD_STA);
569 IWL_CMD(REPLY_REMOVE_STA);
570 IWL_CMD(REPLY_REMOVE_ALL_STA);
571 IWL_CMD(REPLY_3945_RX);
572 IWL_CMD(REPLY_TX);
573 IWL_CMD(REPLY_RATE_SCALE);
574 IWL_CMD(REPLY_LEDS_CMD);
575 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
576 IWL_CMD(RADAR_NOTIFICATION);
577 IWL_CMD(REPLY_QUIET_CMD);
578 IWL_CMD(REPLY_CHANNEL_SWITCH);
579 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
580 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
581 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
582 IWL_CMD(POWER_TABLE_CMD);
583 IWL_CMD(PM_SLEEP_NOTIFICATION);
584 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
585 IWL_CMD(REPLY_SCAN_CMD);
586 IWL_CMD(REPLY_SCAN_ABORT_CMD);
587 IWL_CMD(SCAN_START_NOTIFICATION);
588 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
589 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
590 IWL_CMD(BEACON_NOTIFICATION);
591 IWL_CMD(REPLY_TX_BEACON);
592 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
593 IWL_CMD(QUIET_NOTIFICATION);
594 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
595 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
596 IWL_CMD(REPLY_BT_CONFIG);
597 IWL_CMD(REPLY_STATISTICS_CMD);
598 IWL_CMD(STATISTICS_NOTIFICATION);
599 IWL_CMD(REPLY_CARD_STATE_CMD);
600 IWL_CMD(CARD_STATE_NOTIFICATION);
601 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
602 default:
603 return "UNKNOWN";
604
605 }
606}
607
608#define HOST_COMPLETE_TIMEOUT (HZ / 2)
609
610/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800611 * iwl3945_enqueue_hcmd - enqueue a uCode command
Zhu Yib481de92007-09-25 17:54:57 -0700612 * @priv: device private data point
613 * @cmd: a point to the ucode command structure
614 *
615 * The function returns < 0 values to indicate the operation is
616 * failed. On success, it turns the index (> 0) of command in the
617 * command queue.
618 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800619static int iwl3945_enqueue_hcmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700620{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800621 struct iwl3945_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
622 struct iwl3945_queue *q = &txq->q;
623 struct iwl3945_tfd_frame *tfd;
Zhu Yib481de92007-09-25 17:54:57 -0700624 u32 *control_flags;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800625 struct iwl3945_cmd *out_cmd;
Zhu Yib481de92007-09-25 17:54:57 -0700626 u32 idx;
627 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
628 dma_addr_t phys_addr;
629 int pad;
630 u16 count;
631 int ret;
632 unsigned long flags;
633
634 /* If any of the command structures end up being larger than
635 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
636 * we will need to increase the size of the TFD entries */
637 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
638 !(cmd->meta.flags & CMD_SIZE_HUGE));
639
Gregory Greenmanc342a1b2008-02-06 11:20:40 -0800640
641 if (iwl3945_is_rfkill(priv)) {
642 IWL_DEBUG_INFO("Not sending command - RF KILL");
643 return -EIO;
644 }
645
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800646 if (iwl3945_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
Zhu Yib481de92007-09-25 17:54:57 -0700647 IWL_ERROR("No space for Tx\n");
648 return -ENOSPC;
649 }
650
651 spin_lock_irqsave(&priv->hcmd_lock, flags);
652
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800653 tfd = &txq->bd[q->write_ptr];
Zhu Yib481de92007-09-25 17:54:57 -0700654 memset(tfd, 0, sizeof(*tfd));
655
656 control_flags = (u32 *) tfd;
657
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800658 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
Zhu Yib481de92007-09-25 17:54:57 -0700659 out_cmd = &txq->cmd[idx];
660
661 out_cmd->hdr.cmd = cmd->id;
662 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
663 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
664
665 /* At this point, the out_cmd now has all of the incoming cmd
666 * information */
667
668 out_cmd->hdr.flags = 0;
669 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800670 INDEX_TO_SEQ(q->write_ptr));
Zhu Yib481de92007-09-25 17:54:57 -0700671 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
672 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
673
674 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800675 offsetof(struct iwl3945_cmd, hdr);
676 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
Zhu Yib481de92007-09-25 17:54:57 -0700677
678 pad = U32_PAD(cmd->len);
679 count = TFD_CTL_COUNT_GET(*control_flags);
680 *control_flags = TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad);
681
682 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
683 "%d bytes at %d[%d]:%d\n",
684 get_cmd_string(out_cmd->hdr.cmd),
685 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800686 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
Zhu Yib481de92007-09-25 17:54:57 -0700687
688 txq->need_update = 1;
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800689
690 /* Increment and update queue's write index */
Tomas Winklerc54b6792008-03-06 17:36:53 -0800691 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800692 ret = iwl3945_tx_queue_update_write_ptr(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -0700693
694 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
695 return ret ? ret : idx;
696}
697
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800698static int iwl3945_send_cmd_async(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700699{
700 int ret;
701
702 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
703
704 /* An asynchronous command can not expect an SKB to be set. */
705 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
706
707 /* An asynchronous command MUST have a callback. */
708 BUG_ON(!cmd->meta.u.callback);
709
710 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
711 return -EBUSY;
712
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800713 ret = iwl3945_enqueue_hcmd(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700714 if (ret < 0) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800715 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
Zhu Yib481de92007-09-25 17:54:57 -0700716 get_cmd_string(cmd->id), ret);
717 return ret;
718 }
719 return 0;
720}
721
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800722static int iwl3945_send_cmd_sync(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700723{
724 int cmd_idx;
725 int ret;
Zhu Yib481de92007-09-25 17:54:57 -0700726
727 BUG_ON(cmd->meta.flags & CMD_ASYNC);
728
729 /* A synchronous command can not have a callback set. */
730 BUG_ON(cmd->meta.u.callback != NULL);
731
Tomas Winklere5472972008-03-28 16:21:12 -0700732 if (test_and_set_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status)) {
Zhu Yib481de92007-09-25 17:54:57 -0700733 IWL_ERROR("Error sending %s: Already sending a host command\n",
734 get_cmd_string(cmd->id));
Tomas Winklere5472972008-03-28 16:21:12 -0700735 ret = -EBUSY;
736 goto out;
Zhu Yib481de92007-09-25 17:54:57 -0700737 }
738
739 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
740
741 if (cmd->meta.flags & CMD_WANT_SKB)
742 cmd->meta.source = &cmd->meta;
743
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800744 cmd_idx = iwl3945_enqueue_hcmd(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700745 if (cmd_idx < 0) {
746 ret = cmd_idx;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800747 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
Zhu Yib481de92007-09-25 17:54:57 -0700748 get_cmd_string(cmd->id), ret);
749 goto out;
750 }
751
752 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
753 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
754 HOST_COMPLETE_TIMEOUT);
755 if (!ret) {
756 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
757 IWL_ERROR("Error sending %s: time out after %dms.\n",
758 get_cmd_string(cmd->id),
759 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
760
761 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
762 ret = -ETIMEDOUT;
763 goto cancel;
764 }
765 }
766
767 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
768 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
769 get_cmd_string(cmd->id));
770 ret = -ECANCELED;
771 goto fail;
772 }
773 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
774 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
775 get_cmd_string(cmd->id));
776 ret = -EIO;
777 goto fail;
778 }
779 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
780 IWL_ERROR("Error: Response NULL in '%s'\n",
781 get_cmd_string(cmd->id));
782 ret = -EIO;
783 goto out;
784 }
785
786 ret = 0;
787 goto out;
788
789cancel:
790 if (cmd->meta.flags & CMD_WANT_SKB) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800791 struct iwl3945_cmd *qcmd;
Zhu Yib481de92007-09-25 17:54:57 -0700792
793 /* Cancel the CMD_WANT_SKB flag for the cmd in the
794 * TX cmd queue. Otherwise in case the cmd comes
795 * in later, it will possibly set an invalid
796 * address (cmd->meta.source). */
797 qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
798 qcmd->meta.flags &= ~CMD_WANT_SKB;
799 }
800fail:
801 if (cmd->meta.u.skb) {
802 dev_kfree_skb_any(cmd->meta.u.skb);
803 cmd->meta.u.skb = NULL;
804 }
805out:
Tomas Winklere5472972008-03-28 16:21:12 -0700806 clear_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -0700807 return ret;
808}
809
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800810int iwl3945_send_cmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700811{
Zhu Yib481de92007-09-25 17:54:57 -0700812 if (cmd->meta.flags & CMD_ASYNC)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800813 return iwl3945_send_cmd_async(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700814
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800815 return iwl3945_send_cmd_sync(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700816}
817
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800818int iwl3945_send_cmd_pdu(struct iwl3945_priv *priv, u8 id, u16 len, const void *data)
Zhu Yib481de92007-09-25 17:54:57 -0700819{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800820 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -0700821 .id = id,
822 .len = len,
823 .data = data,
824 };
825
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800826 return iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700827}
828
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800829static int __must_check iwl3945_send_cmd_u32(struct iwl3945_priv *priv, u8 id, u32 val)
Zhu Yib481de92007-09-25 17:54:57 -0700830{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800831 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -0700832 .id = id,
833 .len = sizeof(val),
834 .data = &val,
835 };
836
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800837 return iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700838}
839
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800840int iwl3945_send_statistics_request(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700841{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800842 return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
Zhu Yib481de92007-09-25 17:54:57 -0700843}
844
845/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800846 * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
Johannes Berg8318d782008-01-24 19:38:38 +0100847 * @band: 2.4 or 5 GHz band
848 * @channel: Any channel valid for the requested band
Zhu Yib481de92007-09-25 17:54:57 -0700849
Johannes Berg8318d782008-01-24 19:38:38 +0100850 * In addition to setting the staging RXON, priv->band is also set.
Zhu Yib481de92007-09-25 17:54:57 -0700851 *
852 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
Johannes Berg8318d782008-01-24 19:38:38 +0100853 * in the staging RXON flag structure based on the band
Zhu Yib481de92007-09-25 17:54:57 -0700854 */
Johannes Berg8318d782008-01-24 19:38:38 +0100855static int iwl3945_set_rxon_channel(struct iwl3945_priv *priv,
856 enum ieee80211_band band,
857 u16 channel)
Zhu Yib481de92007-09-25 17:54:57 -0700858{
Johannes Berg8318d782008-01-24 19:38:38 +0100859 if (!iwl3945_get_channel_info(priv, band, channel)) {
Zhu Yib481de92007-09-25 17:54:57 -0700860 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
Johannes Berg8318d782008-01-24 19:38:38 +0100861 channel, band);
Zhu Yib481de92007-09-25 17:54:57 -0700862 return -EINVAL;
863 }
864
865 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
Johannes Berg8318d782008-01-24 19:38:38 +0100866 (priv->band == band))
Zhu Yib481de92007-09-25 17:54:57 -0700867 return 0;
868
869 priv->staging_rxon.channel = cpu_to_le16(channel);
Johannes Berg8318d782008-01-24 19:38:38 +0100870 if (band == IEEE80211_BAND_5GHZ)
Zhu Yib481de92007-09-25 17:54:57 -0700871 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
872 else
873 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
874
Johannes Berg8318d782008-01-24 19:38:38 +0100875 priv->band = band;
Zhu Yib481de92007-09-25 17:54:57 -0700876
Johannes Berg8318d782008-01-24 19:38:38 +0100877 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
Zhu Yib481de92007-09-25 17:54:57 -0700878
879 return 0;
880}
881
882/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800883 * iwl3945_check_rxon_cmd - validate RXON structure is valid
Zhu Yib481de92007-09-25 17:54:57 -0700884 *
885 * NOTE: This is really only useful during development and can eventually
886 * be #ifdef'd out once the driver is stable and folks aren't actively
887 * making changes
888 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800889static int iwl3945_check_rxon_cmd(struct iwl3945_rxon_cmd *rxon)
Zhu Yib481de92007-09-25 17:54:57 -0700890{
891 int error = 0;
892 int counter = 1;
893
894 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
895 error |= le32_to_cpu(rxon->flags &
896 (RXON_FLG_TGJ_NARROW_BAND_MSK |
897 RXON_FLG_RADAR_DETECT_MSK));
898 if (error)
899 IWL_WARNING("check 24G fields %d | %d\n",
900 counter++, error);
901 } else {
902 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
903 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
904 if (error)
905 IWL_WARNING("check 52 fields %d | %d\n",
906 counter++, error);
907 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
908 if (error)
909 IWL_WARNING("check 52 CCK %d | %d\n",
910 counter++, error);
911 }
912 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
913 if (error)
914 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
915
916 /* make sure basic rates 6Mbps and 1Mbps are supported */
917 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
918 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
919 if (error)
920 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
921
922 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
923 if (error)
924 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
925
926 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
927 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
928 if (error)
929 IWL_WARNING("check CCK and short slot %d | %d\n",
930 counter++, error);
931
932 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
933 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
934 if (error)
935 IWL_WARNING("check CCK & auto detect %d | %d\n",
936 counter++, error);
937
938 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
939 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
940 if (error)
941 IWL_WARNING("check TGG and auto detect %d | %d\n",
942 counter++, error);
943
944 if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
945 error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
946 RXON_FLG_ANT_A_MSK)) == 0);
947 if (error)
948 IWL_WARNING("check antenna %d %d\n", counter++, error);
949
950 if (error)
951 IWL_WARNING("Tuning to channel %d\n",
952 le16_to_cpu(rxon->channel));
953
954 if (error) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800955 IWL_ERROR("Not a valid iwl3945_rxon_assoc_cmd field values\n");
Zhu Yib481de92007-09-25 17:54:57 -0700956 return -1;
957 }
958 return 0;
959}
960
961/**
Ben Cahill9fbab512007-11-29 11:09:47 +0800962 * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
Ian Schram01ebd062007-10-25 17:15:22 +0800963 * @priv: staging_rxon is compared to active_rxon
Zhu Yib481de92007-09-25 17:54:57 -0700964 *
Ben Cahill9fbab512007-11-29 11:09:47 +0800965 * If the RXON structure is changing enough to require a new tune,
966 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
967 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
Zhu Yib481de92007-09-25 17:54:57 -0700968 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800969static int iwl3945_full_rxon_required(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700970{
971
972 /* These items are only settable from the full RXON command */
973 if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
974 compare_ether_addr(priv->staging_rxon.bssid_addr,
975 priv->active_rxon.bssid_addr) ||
976 compare_ether_addr(priv->staging_rxon.node_addr,
977 priv->active_rxon.node_addr) ||
978 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
979 priv->active_rxon.wlap_bssid_addr) ||
980 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
981 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
982 (priv->staging_rxon.air_propagation !=
983 priv->active_rxon.air_propagation) ||
984 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
985 return 1;
986
987 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
988 * be updated with the RXON_ASSOC command -- however only some
989 * flag transitions are allowed using RXON_ASSOC */
990
991 /* Check if we are not switching bands */
992 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
993 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
994 return 1;
995
996 /* Check if we are switching association toggle */
997 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
998 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
999 return 1;
1000
1001 return 0;
1002}
1003
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001004static int iwl3945_send_rxon_assoc(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001005{
1006 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001007 struct iwl3945_rx_packet *res = NULL;
1008 struct iwl3945_rxon_assoc_cmd rxon_assoc;
1009 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001010 .id = REPLY_RXON_ASSOC,
1011 .len = sizeof(rxon_assoc),
1012 .meta.flags = CMD_WANT_SKB,
1013 .data = &rxon_assoc,
1014 };
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001015 const struct iwl3945_rxon_cmd *rxon1 = &priv->staging_rxon;
1016 const struct iwl3945_rxon_cmd *rxon2 = &priv->active_rxon;
Zhu Yib481de92007-09-25 17:54:57 -07001017
1018 if ((rxon1->flags == rxon2->flags) &&
1019 (rxon1->filter_flags == rxon2->filter_flags) &&
1020 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1021 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1022 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1023 return 0;
1024 }
1025
1026 rxon_assoc.flags = priv->staging_rxon.flags;
1027 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1028 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1029 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1030 rxon_assoc.reserved = 0;
1031
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001032 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001033 if (rc)
1034 return rc;
1035
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001036 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001037 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1038 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
1039 rc = -EIO;
1040 }
1041
1042 priv->alloc_rxb_skb--;
1043 dev_kfree_skb_any(cmd.meta.u.skb);
1044
1045 return rc;
1046}
1047
1048/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001049 * iwl3945_commit_rxon - commit staging_rxon to hardware
Zhu Yib481de92007-09-25 17:54:57 -07001050 *
Ian Schram01ebd062007-10-25 17:15:22 +08001051 * The RXON command in staging_rxon is committed to the hardware and
Zhu Yib481de92007-09-25 17:54:57 -07001052 * the active_rxon structure is updated with the new data. This
1053 * function correctly transitions out of the RXON_ASSOC_MSK state if
1054 * a HW tune is required based on the RXON structure changes.
1055 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001056static int iwl3945_commit_rxon(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001057{
1058 /* cast away the const for active_rxon in this function */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001059 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
Zhu Yib481de92007-09-25 17:54:57 -07001060 int rc = 0;
Joe Perches0795af52007-10-03 17:59:30 -07001061 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07001062
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001063 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07001064 return -1;
1065
1066 /* always get timestamp with Rx frame */
1067 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
1068
1069 /* select antenna */
1070 priv->staging_rxon.flags &=
1071 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
1072 priv->staging_rxon.flags |= iwl3945_get_antenna_flags(priv);
1073
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001074 rc = iwl3945_check_rxon_cmd(&priv->staging_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07001075 if (rc) {
1076 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
1077 return -EINVAL;
1078 }
1079
1080 /* If we don't need to send a full RXON, we can use
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001081 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
Zhu Yib481de92007-09-25 17:54:57 -07001082 * and other flags for the current radio configuration. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001083 if (!iwl3945_full_rxon_required(priv)) {
1084 rc = iwl3945_send_rxon_assoc(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001085 if (rc) {
1086 IWL_ERROR("Error setting RXON_ASSOC "
1087 "configuration (%d).\n", rc);
1088 return rc;
1089 }
1090
1091 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1092
1093 return 0;
1094 }
1095
1096 /* If we are currently associated and the new config requires
1097 * an RXON_ASSOC and the new config wants the associated mask enabled,
1098 * we must clear the associated from the active configuration
1099 * before we apply the new config */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001100 if (iwl3945_is_associated(priv) &&
Zhu Yib481de92007-09-25 17:54:57 -07001101 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
1102 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
1103 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1104
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001105 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1106 sizeof(struct iwl3945_rxon_cmd),
Zhu Yib481de92007-09-25 17:54:57 -07001107 &priv->active_rxon);
1108
1109 /* If the mask clearing failed then we set
1110 * active_rxon back to what it was previously */
1111 if (rc) {
1112 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1113 IWL_ERROR("Error clearing ASSOC_MSK on current "
1114 "configuration (%d).\n", rc);
1115 return rc;
1116 }
Zhu Yib481de92007-09-25 17:54:57 -07001117 }
1118
1119 IWL_DEBUG_INFO("Sending RXON\n"
1120 "* with%s RXON_FILTER_ASSOC_MSK\n"
1121 "* channel = %d\n"
Joe Perches0795af52007-10-03 17:59:30 -07001122 "* bssid = %s\n",
Zhu Yib481de92007-09-25 17:54:57 -07001123 ((priv->staging_rxon.filter_flags &
1124 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1125 le16_to_cpu(priv->staging_rxon.channel),
Joe Perches0795af52007-10-03 17:59:30 -07001126 print_mac(mac, priv->staging_rxon.bssid_addr));
Zhu Yib481de92007-09-25 17:54:57 -07001127
1128 /* Apply the new configuration */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001129 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1130 sizeof(struct iwl3945_rxon_cmd), &priv->staging_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07001131 if (rc) {
1132 IWL_ERROR("Error setting new configuration (%d).\n", rc);
1133 return rc;
1134 }
1135
1136 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1137
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001138 iwl3945_clear_stations_table(priv);
Zhu Yi556f8db2007-09-27 11:27:33 +08001139
Zhu Yib481de92007-09-25 17:54:57 -07001140 /* If we issue a new RXON command which required a tune then we must
1141 * send a new TXPOWER command or we won't be able to Tx any frames */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001142 rc = iwl3945_hw_reg_send_txpower(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001143 if (rc) {
1144 IWL_ERROR("Error setting Tx power (%d).\n", rc);
1145 return rc;
1146 }
1147
1148 /* Add the broadcast address so we can send broadcast frames */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001149 if (iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0) ==
Zhu Yib481de92007-09-25 17:54:57 -07001150 IWL_INVALID_STATION) {
1151 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1152 return -EIO;
1153 }
1154
1155 /* If we have set the ASSOC_MSK and we are in BSS mode then
1156 * add the IWL_AP_ID to the station rate table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001157 if (iwl3945_is_associated(priv) &&
Zhu Yib481de92007-09-25 17:54:57 -07001158 (priv->iw_mode == IEEE80211_IF_TYPE_STA))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001159 if (iwl3945_add_station(priv, priv->active_rxon.bssid_addr, 1, 0)
Zhu Yib481de92007-09-25 17:54:57 -07001160 == IWL_INVALID_STATION) {
1161 IWL_ERROR("Error adding AP address for transmit.\n");
1162 return -EIO;
1163 }
1164
Johannes Berg8318d782008-01-24 19:38:38 +01001165 /* Init the hardware's rate fallback order based on the band */
Zhu Yib481de92007-09-25 17:54:57 -07001166 rc = iwl3945_init_hw_rate_table(priv);
1167 if (rc) {
1168 IWL_ERROR("Error setting HW rate table: %02X\n", rc);
1169 return -EIO;
1170 }
1171
1172 return 0;
1173}
1174
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001175static int iwl3945_send_bt_config(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001176{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001177 struct iwl3945_bt_cmd bt_cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001178 .flags = 3,
1179 .lead_time = 0xAA,
1180 .max_kill = 1,
1181 .kill_ack_mask = 0,
1182 .kill_cts_mask = 0,
1183 };
1184
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001185 return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1186 sizeof(struct iwl3945_bt_cmd), &bt_cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001187}
1188
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001189static int iwl3945_send_scan_abort(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001190{
1191 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001192 struct iwl3945_rx_packet *res;
1193 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001194 .id = REPLY_SCAN_ABORT_CMD,
1195 .meta.flags = CMD_WANT_SKB,
1196 };
1197
1198 /* If there isn't a scan actively going on in the hardware
1199 * then we are in between scan bands and not actually
1200 * actively scanning, so don't send the abort command */
1201 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1202 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1203 return 0;
1204 }
1205
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001206 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001207 if (rc) {
1208 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1209 return rc;
1210 }
1211
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001212 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001213 if (res->u.status != CAN_ABORT_STATUS) {
1214 /* The scan abort will return 1 for success or
1215 * 2 for "failure". A failure condition can be
1216 * due to simply not being in an active scan which
1217 * can occur if we send the scan abort before we
1218 * the microcode has notified us that a scan is
1219 * completed. */
1220 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1221 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1222 clear_bit(STATUS_SCAN_HW, &priv->status);
1223 }
1224
1225 dev_kfree_skb_any(cmd.meta.u.skb);
1226
1227 return rc;
1228}
1229
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001230static int iwl3945_card_state_sync_callback(struct iwl3945_priv *priv,
1231 struct iwl3945_cmd *cmd,
Zhu Yib481de92007-09-25 17:54:57 -07001232 struct sk_buff *skb)
1233{
1234 return 1;
1235}
1236
1237/*
1238 * CARD_STATE_CMD
1239 *
Ben Cahill9fbab512007-11-29 11:09:47 +08001240 * Use: Sets the device's internal card state to enable, disable, or halt
Zhu Yib481de92007-09-25 17:54:57 -07001241 *
1242 * When in the 'enable' state the card operates as normal.
1243 * When in the 'disable' state, the card enters into a low power mode.
1244 * When in the 'halt' state, the card is shut down and must be fully
1245 * restarted to come back on.
1246 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001247static int iwl3945_send_card_state(struct iwl3945_priv *priv, u32 flags, u8 meta_flag)
Zhu Yib481de92007-09-25 17:54:57 -07001248{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001249 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001250 .id = REPLY_CARD_STATE_CMD,
1251 .len = sizeof(u32),
1252 .data = &flags,
1253 .meta.flags = meta_flag,
1254 };
1255
1256 if (meta_flag & CMD_ASYNC)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001257 cmd.meta.u.callback = iwl3945_card_state_sync_callback;
Zhu Yib481de92007-09-25 17:54:57 -07001258
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001259 return iwl3945_send_cmd(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001260}
1261
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001262static int iwl3945_add_sta_sync_callback(struct iwl3945_priv *priv,
1263 struct iwl3945_cmd *cmd, struct sk_buff *skb)
Zhu Yib481de92007-09-25 17:54:57 -07001264{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001265 struct iwl3945_rx_packet *res = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07001266
1267 if (!skb) {
1268 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1269 return 1;
1270 }
1271
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001272 res = (struct iwl3945_rx_packet *)skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001273 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1274 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1275 res->hdr.flags);
1276 return 1;
1277 }
1278
1279 switch (res->u.add_sta.status) {
1280 case ADD_STA_SUCCESS_MSK:
1281 break;
1282 default:
1283 break;
1284 }
1285
1286 /* We didn't cache the SKB; let the caller free it */
1287 return 1;
1288}
1289
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001290int iwl3945_send_add_station(struct iwl3945_priv *priv,
1291 struct iwl3945_addsta_cmd *sta, u8 flags)
Zhu Yib481de92007-09-25 17:54:57 -07001292{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001293 struct iwl3945_rx_packet *res = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07001294 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001295 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001296 .id = REPLY_ADD_STA,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001297 .len = sizeof(struct iwl3945_addsta_cmd),
Zhu Yib481de92007-09-25 17:54:57 -07001298 .meta.flags = flags,
1299 .data = sta,
1300 };
1301
1302 if (flags & CMD_ASYNC)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001303 cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
Zhu Yib481de92007-09-25 17:54:57 -07001304 else
1305 cmd.meta.flags |= CMD_WANT_SKB;
1306
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001307 rc = iwl3945_send_cmd(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001308
1309 if (rc || (flags & CMD_ASYNC))
1310 return rc;
1311
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001312 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001313 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1314 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1315 res->hdr.flags);
1316 rc = -EIO;
1317 }
1318
1319 if (rc == 0) {
1320 switch (res->u.add_sta.status) {
1321 case ADD_STA_SUCCESS_MSK:
1322 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1323 break;
1324 default:
1325 rc = -EIO;
1326 IWL_WARNING("REPLY_ADD_STA failed\n");
1327 break;
1328 }
1329 }
1330
1331 priv->alloc_rxb_skb--;
1332 dev_kfree_skb_any(cmd.meta.u.skb);
1333
1334 return rc;
1335}
1336
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001337static int iwl3945_update_sta_key_info(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07001338 struct ieee80211_key_conf *keyconf,
1339 u8 sta_id)
1340{
1341 unsigned long flags;
1342 __le16 key_flags = 0;
1343
1344 switch (keyconf->alg) {
1345 case ALG_CCMP:
1346 key_flags |= STA_KEY_FLG_CCMP;
1347 key_flags |= cpu_to_le16(
1348 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1349 key_flags &= ~STA_KEY_FLG_INVALID;
1350 break;
1351 case ALG_TKIP:
1352 case ALG_WEP:
Zhu Yib481de92007-09-25 17:54:57 -07001353 default:
1354 return -EINVAL;
1355 }
1356 spin_lock_irqsave(&priv->sta_lock, flags);
1357 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1358 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
1359 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1360 keyconf->keylen);
1361
1362 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1363 keyconf->keylen);
1364 priv->stations[sta_id].sta.key.key_flags = key_flags;
1365 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1366 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1367
1368 spin_unlock_irqrestore(&priv->sta_lock, flags);
1369
1370 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001371 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
Zhu Yib481de92007-09-25 17:54:57 -07001372 return 0;
1373}
1374
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001375static int iwl3945_clear_sta_key_info(struct iwl3945_priv *priv, u8 sta_id)
Zhu Yib481de92007-09-25 17:54:57 -07001376{
1377 unsigned long flags;
1378
1379 spin_lock_irqsave(&priv->sta_lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001380 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
1381 memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl3945_keyinfo));
Zhu Yib481de92007-09-25 17:54:57 -07001382 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1383 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1384 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1385 spin_unlock_irqrestore(&priv->sta_lock, flags);
1386
1387 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001388 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
Zhu Yib481de92007-09-25 17:54:57 -07001389 return 0;
1390}
1391
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001392static void iwl3945_clear_free_frames(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001393{
1394 struct list_head *element;
1395
1396 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1397 priv->frames_count);
1398
1399 while (!list_empty(&priv->free_frames)) {
1400 element = priv->free_frames.next;
1401 list_del(element);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001402 kfree(list_entry(element, struct iwl3945_frame, list));
Zhu Yib481de92007-09-25 17:54:57 -07001403 priv->frames_count--;
1404 }
1405
1406 if (priv->frames_count) {
1407 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1408 priv->frames_count);
1409 priv->frames_count = 0;
1410 }
1411}
1412
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001413static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001414{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001415 struct iwl3945_frame *frame;
Zhu Yib481de92007-09-25 17:54:57 -07001416 struct list_head *element;
1417 if (list_empty(&priv->free_frames)) {
1418 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1419 if (!frame) {
1420 IWL_ERROR("Could not allocate frame!\n");
1421 return NULL;
1422 }
1423
1424 priv->frames_count++;
1425 return frame;
1426 }
1427
1428 element = priv->free_frames.next;
1429 list_del(element);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001430 return list_entry(element, struct iwl3945_frame, list);
Zhu Yib481de92007-09-25 17:54:57 -07001431}
1432
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001433static void iwl3945_free_frame(struct iwl3945_priv *priv, struct iwl3945_frame *frame)
Zhu Yib481de92007-09-25 17:54:57 -07001434{
1435 memset(frame, 0, sizeof(*frame));
1436 list_add(&frame->list, &priv->free_frames);
1437}
1438
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001439unsigned int iwl3945_fill_beacon_frame(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07001440 struct ieee80211_hdr *hdr,
1441 const u8 *dest, int left)
1442{
1443
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001444 if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
Zhu Yib481de92007-09-25 17:54:57 -07001445 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1446 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1447 return 0;
1448
1449 if (priv->ibss_beacon->len > left)
1450 return 0;
1451
1452 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1453
1454 return priv->ibss_beacon->len;
1455}
1456
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001457static u8 iwl3945_rate_get_lowest_plcp(int rate_mask)
Zhu Yib481de92007-09-25 17:54:57 -07001458{
1459 u8 i;
1460
1461 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001462 i = iwl3945_rates[i].next_ieee) {
Zhu Yib481de92007-09-25 17:54:57 -07001463 if (rate_mask & (1 << i))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001464 return iwl3945_rates[i].plcp;
Zhu Yib481de92007-09-25 17:54:57 -07001465 }
1466
1467 return IWL_RATE_INVALID;
1468}
1469
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001470static int iwl3945_send_beacon_cmd(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001471{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001472 struct iwl3945_frame *frame;
Zhu Yib481de92007-09-25 17:54:57 -07001473 unsigned int frame_size;
1474 int rc;
1475 u8 rate;
1476
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001477 frame = iwl3945_get_free_frame(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001478
1479 if (!frame) {
1480 IWL_ERROR("Could not obtain free frame buffer for beacon "
1481 "command.\n");
1482 return -ENOMEM;
1483 }
1484
1485 if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001486 rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic &
Zhu Yib481de92007-09-25 17:54:57 -07001487 0xFF0);
1488 if (rate == IWL_INVALID_RATE)
1489 rate = IWL_RATE_6M_PLCP;
1490 } else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001491 rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
Zhu Yib481de92007-09-25 17:54:57 -07001492 if (rate == IWL_INVALID_RATE)
1493 rate = IWL_RATE_1M_PLCP;
1494 }
1495
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001496 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
Zhu Yib481de92007-09-25 17:54:57 -07001497
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001498 rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
Zhu Yib481de92007-09-25 17:54:57 -07001499 &frame->u.cmd[0]);
1500
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001501 iwl3945_free_frame(priv, frame);
Zhu Yib481de92007-09-25 17:54:57 -07001502
1503 return rc;
1504}
1505
1506/******************************************************************************
1507 *
1508 * EEPROM related functions
1509 *
1510 ******************************************************************************/
1511
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001512static void get_eeprom_mac(struct iwl3945_priv *priv, u8 *mac)
Zhu Yib481de92007-09-25 17:54:57 -07001513{
1514 memcpy(mac, priv->eeprom.mac_address, 6);
1515}
1516
Reinette Chatre74a3a252008-01-23 10:15:19 -08001517/*
1518 * Clear the OWNER_MSK, to establish driver (instead of uCode running on
1519 * embedded controller) as EEPROM reader; each read is a series of pulses
1520 * to/from the EEPROM chip, not a single event, so even reads could conflict
1521 * if they weren't arbitrated by some ownership mechanism. Here, the driver
1522 * simply claims ownership, which should be safe when this function is called
1523 * (i.e. before loading uCode!).
1524 */
1525static inline int iwl3945_eeprom_acquire_semaphore(struct iwl3945_priv *priv)
1526{
1527 _iwl3945_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
1528 return 0;
1529}
1530
Zhu Yib481de92007-09-25 17:54:57 -07001531/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001532 * iwl3945_eeprom_init - read EEPROM contents
Zhu Yib481de92007-09-25 17:54:57 -07001533 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +08001534 * Load the EEPROM contents from adapter into priv->eeprom
Zhu Yib481de92007-09-25 17:54:57 -07001535 *
1536 * NOTE: This routine uses the non-debug IO access functions.
1537 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001538int iwl3945_eeprom_init(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001539{
Tomas Winkler58ff6d42008-02-13 02:47:54 +02001540 u16 *e = (u16 *)&priv->eeprom;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001541 u32 gp = iwl3945_read32(priv, CSR_EEPROM_GP);
Zhu Yib481de92007-09-25 17:54:57 -07001542 u32 r;
1543 int sz = sizeof(priv->eeprom);
1544 int rc;
1545 int i;
1546 u16 addr;
1547
1548 /* The EEPROM structure has several padding buffers within it
1549 * and when adding new EEPROM maps is subject to programmer errors
1550 * which may be very difficult to identify without explicitly
1551 * checking the resulting size of the eeprom map. */
1552 BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
1553
1554 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1555 IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
1556 return -ENOENT;
1557 }
1558
Cahill, Ben M6440adb2007-11-29 11:09:55 +08001559 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001560 rc = iwl3945_eeprom_acquire_semaphore(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001561 if (rc < 0) {
Ian Schram91e17472007-10-25 17:15:23 +08001562 IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
Zhu Yib481de92007-09-25 17:54:57 -07001563 return -ENOENT;
1564 }
1565
1566 /* eeprom is an array of 16bit values */
1567 for (addr = 0; addr < sz; addr += sizeof(u16)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001568 _iwl3945_write32(priv, CSR_EEPROM_REG, addr << 1);
1569 _iwl3945_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
Zhu Yib481de92007-09-25 17:54:57 -07001570
1571 for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
1572 i += IWL_EEPROM_ACCESS_DELAY) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001573 r = _iwl3945_read_direct32(priv, CSR_EEPROM_REG);
Zhu Yib481de92007-09-25 17:54:57 -07001574 if (r & CSR_EEPROM_REG_READ_VALID_MSK)
1575 break;
1576 udelay(IWL_EEPROM_ACCESS_DELAY);
1577 }
1578
1579 if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
1580 IWL_ERROR("Time out reading EEPROM[%d]", addr);
1581 return -ETIMEDOUT;
1582 }
Tomas Winkler58ff6d42008-02-13 02:47:54 +02001583 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
Zhu Yib481de92007-09-25 17:54:57 -07001584 }
1585
1586 return 0;
1587}
1588
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001589static void iwl3945_unset_hw_setting(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001590{
1591 if (priv->hw_setting.shared_virt)
1592 pci_free_consistent(priv->pci_dev,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001593 sizeof(struct iwl3945_shared),
Zhu Yib481de92007-09-25 17:54:57 -07001594 priv->hw_setting.shared_virt,
1595 priv->hw_setting.shared_phys);
1596}
1597
1598/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001599 * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
Zhu Yib481de92007-09-25 17:54:57 -07001600 *
1601 * return : set the bit for each supported rate insert in ie
1602 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001603static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001604 u16 basic_rate, int *left)
Zhu Yib481de92007-09-25 17:54:57 -07001605{
1606 u16 ret_rates = 0, bit;
1607 int i;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001608 u8 *cnt = ie;
1609 u8 *rates = ie + 1;
Zhu Yib481de92007-09-25 17:54:57 -07001610
1611 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1612 if (bit & supported_rate) {
1613 ret_rates |= bit;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001614 rates[*cnt] = iwl3945_rates[i].ieee |
Tomas Winklerc7c46672007-10-18 02:04:15 +02001615 ((bit & basic_rate) ? 0x80 : 0x00);
1616 (*cnt)++;
1617 (*left)--;
1618 if ((*left <= 0) ||
1619 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
Zhu Yib481de92007-09-25 17:54:57 -07001620 break;
1621 }
1622 }
1623
1624 return ret_rates;
1625}
1626
1627/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001628 * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
Zhu Yib481de92007-09-25 17:54:57 -07001629 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001630static u16 iwl3945_fill_probe_req(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07001631 struct ieee80211_mgmt *frame,
1632 int left, int is_direct)
1633{
1634 int len = 0;
1635 u8 *pos = NULL;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001636 u16 active_rates, ret_rates, cck_rates;
Zhu Yib481de92007-09-25 17:54:57 -07001637
1638 /* Make sure there is enough space for the probe request,
1639 * two mandatory IEs and the data */
1640 left -= 24;
1641 if (left < 0)
1642 return 0;
1643 len += 24;
1644
1645 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001646 memcpy(frame->da, iwl3945_broadcast_addr, ETH_ALEN);
Zhu Yib481de92007-09-25 17:54:57 -07001647 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001648 memcpy(frame->bssid, iwl3945_broadcast_addr, ETH_ALEN);
Zhu Yib481de92007-09-25 17:54:57 -07001649 frame->seq_ctrl = 0;
1650
1651 /* fill in our indirect SSID IE */
1652 /* ...next IE... */
1653
1654 left -= 2;
1655 if (left < 0)
1656 return 0;
1657 len += 2;
1658 pos = &(frame->u.probe_req.variable[0]);
1659 *pos++ = WLAN_EID_SSID;
1660 *pos++ = 0;
1661
1662 /* fill in our direct SSID IE... */
1663 if (is_direct) {
1664 /* ...next IE... */
1665 left -= 2 + priv->essid_len;
1666 if (left < 0)
1667 return 0;
1668 /* ... fill it in... */
1669 *pos++ = WLAN_EID_SSID;
1670 *pos++ = priv->essid_len;
1671 memcpy(pos, priv->essid, priv->essid_len);
1672 pos += priv->essid_len;
1673 len += 2 + priv->essid_len;
1674 }
1675
1676 /* fill in supported rate */
1677 /* ...next IE... */
1678 left -= 2;
1679 if (left < 0)
1680 return 0;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001681
Zhu Yib481de92007-09-25 17:54:57 -07001682 /* ... fill it in... */
1683 *pos++ = WLAN_EID_SUPP_RATES;
1684 *pos = 0;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001685
1686 priv->active_rate = priv->rates_mask;
1687 active_rates = priv->active_rate;
Zhu Yib481de92007-09-25 17:54:57 -07001688 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1689
Tomas Winklerc7c46672007-10-18 02:04:15 +02001690 cck_rates = IWL_CCK_RATES_MASK & active_rates;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001691 ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001692 priv->active_rate_basic, &left);
1693 active_rates &= ~ret_rates;
1694
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001695 ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001696 priv->active_rate_basic, &left);
1697 active_rates &= ~ret_rates;
1698
Zhu Yib481de92007-09-25 17:54:57 -07001699 len += 2 + *pos;
1700 pos += (*pos) + 1;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001701 if (active_rates == 0)
Zhu Yib481de92007-09-25 17:54:57 -07001702 goto fill_end;
1703
1704 /* fill in supported extended rate */
1705 /* ...next IE... */
1706 left -= 2;
1707 if (left < 0)
1708 return 0;
1709 /* ... fill it in... */
1710 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1711 *pos = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001712 iwl3945_supported_rate_to_ie(pos, active_rates,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001713 priv->active_rate_basic, &left);
Zhu Yib481de92007-09-25 17:54:57 -07001714 if (*pos > 0)
1715 len += 2 + *pos;
1716
1717 fill_end:
1718 return (u16)len;
1719}
1720
1721/*
1722 * QoS support
1723*/
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001724static int iwl3945_send_qos_params_command(struct iwl3945_priv *priv,
1725 struct iwl3945_qosparam_cmd *qos)
Zhu Yib481de92007-09-25 17:54:57 -07001726{
1727
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001728 return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM,
1729 sizeof(struct iwl3945_qosparam_cmd), qos);
Zhu Yib481de92007-09-25 17:54:57 -07001730}
1731
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001732static void iwl3945_reset_qos(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001733{
1734 u16 cw_min = 15;
1735 u16 cw_max = 1023;
1736 u8 aifs = 2;
1737 u8 is_legacy = 0;
1738 unsigned long flags;
1739 int i;
1740
1741 spin_lock_irqsave(&priv->lock, flags);
1742 priv->qos_data.qos_active = 0;
1743
1744 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
1745 if (priv->qos_data.qos_enable)
1746 priv->qos_data.qos_active = 1;
1747 if (!(priv->active_rate & 0xfff0)) {
1748 cw_min = 31;
1749 is_legacy = 1;
1750 }
1751 } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
1752 if (priv->qos_data.qos_enable)
1753 priv->qos_data.qos_active = 1;
1754 } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
1755 cw_min = 31;
1756 is_legacy = 1;
1757 }
1758
1759 if (priv->qos_data.qos_active)
1760 aifs = 3;
1761
1762 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
1763 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
1764 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
1765 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
1766 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
1767
1768 if (priv->qos_data.qos_active) {
1769 i = 1;
1770 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
1771 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
1772 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
1773 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1774 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1775
1776 i = 2;
1777 priv->qos_data.def_qos_parm.ac[i].cw_min =
1778 cpu_to_le16((cw_min + 1) / 2 - 1);
1779 priv->qos_data.def_qos_parm.ac[i].cw_max =
1780 cpu_to_le16(cw_max);
1781 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1782 if (is_legacy)
1783 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1784 cpu_to_le16(6016);
1785 else
1786 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1787 cpu_to_le16(3008);
1788 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1789
1790 i = 3;
1791 priv->qos_data.def_qos_parm.ac[i].cw_min =
1792 cpu_to_le16((cw_min + 1) / 4 - 1);
1793 priv->qos_data.def_qos_parm.ac[i].cw_max =
1794 cpu_to_le16((cw_max + 1) / 2 - 1);
1795 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1796 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1797 if (is_legacy)
1798 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1799 cpu_to_le16(3264);
1800 else
1801 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1802 cpu_to_le16(1504);
1803 } else {
1804 for (i = 1; i < 4; i++) {
1805 priv->qos_data.def_qos_parm.ac[i].cw_min =
1806 cpu_to_le16(cw_min);
1807 priv->qos_data.def_qos_parm.ac[i].cw_max =
1808 cpu_to_le16(cw_max);
1809 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
1810 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1811 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1812 }
1813 }
1814 IWL_DEBUG_QOS("set QoS to default \n");
1815
1816 spin_unlock_irqrestore(&priv->lock, flags);
1817}
1818
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001819static void iwl3945_activate_qos(struct iwl3945_priv *priv, u8 force)
Zhu Yib481de92007-09-25 17:54:57 -07001820{
1821 unsigned long flags;
1822
Zhu Yib481de92007-09-25 17:54:57 -07001823 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1824 return;
1825
1826 if (!priv->qos_data.qos_enable)
1827 return;
1828
1829 spin_lock_irqsave(&priv->lock, flags);
1830 priv->qos_data.def_qos_parm.qos_flags = 0;
1831
1832 if (priv->qos_data.qos_cap.q_AP.queue_request &&
1833 !priv->qos_data.qos_cap.q_AP.txop_request)
1834 priv->qos_data.def_qos_parm.qos_flags |=
1835 QOS_PARAM_FLG_TXOP_TYPE_MSK;
1836
1837 if (priv->qos_data.qos_active)
1838 priv->qos_data.def_qos_parm.qos_flags |=
1839 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
1840
1841 spin_unlock_irqrestore(&priv->lock, flags);
1842
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001843 if (force || iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07001844 IWL_DEBUG_QOS("send QoS cmd with Qos active %d \n",
1845 priv->qos_data.qos_active);
1846
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001847 iwl3945_send_qos_params_command(priv,
Zhu Yib481de92007-09-25 17:54:57 -07001848 &(priv->qos_data.def_qos_parm));
1849 }
1850}
1851
Zhu Yib481de92007-09-25 17:54:57 -07001852/*
1853 * Power management (not Tx power!) functions
1854 */
1855#define MSEC_TO_USEC 1024
1856
1857#define NOSLP __constant_cpu_to_le32(0)
1858#define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK
1859#define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
1860#define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
1861 __constant_cpu_to_le32(X1), \
1862 __constant_cpu_to_le32(X2), \
1863 __constant_cpu_to_le32(X3), \
1864 __constant_cpu_to_le32(X4)}
1865
1866
1867/* default power management (not Tx power) table values */
1868/* for tim 0-10 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001869static struct iwl3945_power_vec_entry range_0[IWL_POWER_AC] = {
Zhu Yib481de92007-09-25 17:54:57 -07001870 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1871 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
1872 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
1873 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
1874 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
1875 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
1876};
1877
1878/* for tim > 10 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001879static struct iwl3945_power_vec_entry range_1[IWL_POWER_AC] = {
Zhu Yib481de92007-09-25 17:54:57 -07001880 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1881 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
1882 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
1883 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
1884 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
1885 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
1886 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
1887 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
1888 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
1889 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
1890};
1891
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001892int iwl3945_power_init_handle(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001893{
1894 int rc = 0, i;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001895 struct iwl3945_power_mgr *pow_data;
1896 int size = sizeof(struct iwl3945_power_vec_entry) * IWL_POWER_AC;
Zhu Yib481de92007-09-25 17:54:57 -07001897 u16 pci_pm;
1898
1899 IWL_DEBUG_POWER("Initialize power \n");
1900
1901 pow_data = &(priv->power_data);
1902
1903 memset(pow_data, 0, sizeof(*pow_data));
1904
1905 pow_data->active_index = IWL_POWER_RANGE_0;
1906 pow_data->dtim_val = 0xffff;
1907
1908 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
1909 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
1910
1911 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
1912 if (rc != 0)
1913 return 0;
1914 else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001915 struct iwl3945_powertable_cmd *cmd;
Zhu Yib481de92007-09-25 17:54:57 -07001916
1917 IWL_DEBUG_POWER("adjust power command flags\n");
1918
1919 for (i = 0; i < IWL_POWER_AC; i++) {
1920 cmd = &pow_data->pwr_range_0[i].cmd;
1921
1922 if (pci_pm & 0x1)
1923 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
1924 else
1925 cmd->flags |= IWL_POWER_PCI_PM_MSK;
1926 }
1927 }
1928 return rc;
1929}
1930
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001931static int iwl3945_update_power_cmd(struct iwl3945_priv *priv,
1932 struct iwl3945_powertable_cmd *cmd, u32 mode)
Zhu Yib481de92007-09-25 17:54:57 -07001933{
1934 int rc = 0, i;
1935 u8 skip;
1936 u32 max_sleep = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001937 struct iwl3945_power_vec_entry *range;
Zhu Yib481de92007-09-25 17:54:57 -07001938 u8 period = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001939 struct iwl3945_power_mgr *pow_data;
Zhu Yib481de92007-09-25 17:54:57 -07001940
1941 if (mode > IWL_POWER_INDEX_5) {
1942 IWL_DEBUG_POWER("Error invalid power mode \n");
1943 return -1;
1944 }
1945 pow_data = &(priv->power_data);
1946
1947 if (pow_data->active_index == IWL_POWER_RANGE_0)
1948 range = &pow_data->pwr_range_0[0];
1949 else
1950 range = &pow_data->pwr_range_1[1];
1951
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001952 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
Zhu Yib481de92007-09-25 17:54:57 -07001953
1954#ifdef IWL_MAC80211_DISABLE
1955 if (priv->assoc_network != NULL) {
1956 unsigned long flags;
1957
1958 period = priv->assoc_network->tim.tim_period;
1959 }
1960#endif /*IWL_MAC80211_DISABLE */
1961 skip = range[mode].no_dtim;
1962
1963 if (period == 0) {
1964 period = 1;
1965 skip = 0;
1966 }
1967
1968 if (skip == 0) {
1969 max_sleep = period;
1970 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
1971 } else {
1972 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
1973 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
1974 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
1975 }
1976
1977 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
1978 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
1979 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
1980 }
1981
1982 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
1983 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
1984 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
1985 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
1986 le32_to_cpu(cmd->sleep_interval[0]),
1987 le32_to_cpu(cmd->sleep_interval[1]),
1988 le32_to_cpu(cmd->sleep_interval[2]),
1989 le32_to_cpu(cmd->sleep_interval[3]),
1990 le32_to_cpu(cmd->sleep_interval[4]));
1991
1992 return rc;
1993}
1994
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001995static int iwl3945_send_power_mode(struct iwl3945_priv *priv, u32 mode)
Zhu Yib481de92007-09-25 17:54:57 -07001996{
John W. Linville9a62f732007-11-15 16:27:36 -05001997 u32 uninitialized_var(final_mode);
Zhu Yib481de92007-09-25 17:54:57 -07001998 int rc;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001999 struct iwl3945_powertable_cmd cmd;
Zhu Yib481de92007-09-25 17:54:57 -07002000
2001 /* If on battery, set to 3,
Ian Schram01ebd062007-10-25 17:15:22 +08002002 * if plugged into AC power, set to CAM ("continuously aware mode"),
Zhu Yib481de92007-09-25 17:54:57 -07002003 * else user level */
2004 switch (mode) {
2005 case IWL_POWER_BATTERY:
2006 final_mode = IWL_POWER_INDEX_3;
2007 break;
2008 case IWL_POWER_AC:
2009 final_mode = IWL_POWER_MODE_CAM;
2010 break;
2011 default:
2012 final_mode = mode;
2013 break;
2014 }
2015
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002016 iwl3945_update_power_cmd(priv, &cmd, final_mode);
Zhu Yib481de92007-09-25 17:54:57 -07002017
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002018 rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07002019
2020 if (final_mode == IWL_POWER_MODE_CAM)
2021 clear_bit(STATUS_POWER_PMI, &priv->status);
2022 else
2023 set_bit(STATUS_POWER_PMI, &priv->status);
2024
2025 return rc;
2026}
2027
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002028int iwl3945_is_network_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *header)
Zhu Yib481de92007-09-25 17:54:57 -07002029{
2030 /* Filter incoming packets to determine if they are targeted toward
2031 * this network, discarding packets coming from ourselves */
2032 switch (priv->iw_mode) {
2033 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
2034 /* packets from our adapter are dropped (echo) */
2035 if (!compare_ether_addr(header->addr2, priv->mac_addr))
2036 return 0;
2037 /* {broad,multi}cast packets to our IBSS go through */
2038 if (is_multicast_ether_addr(header->addr1))
2039 return !compare_ether_addr(header->addr3, priv->bssid);
2040 /* packets to our adapter go through */
2041 return !compare_ether_addr(header->addr1, priv->mac_addr);
2042 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
2043 /* packets from our adapter are dropped (echo) */
2044 if (!compare_ether_addr(header->addr3, priv->mac_addr))
2045 return 0;
2046 /* {broad,multi}cast packets to our BSS go through */
2047 if (is_multicast_ether_addr(header->addr1))
2048 return !compare_ether_addr(header->addr2, priv->bssid);
2049 /* packets to our adapter go through */
2050 return !compare_ether_addr(header->addr1, priv->mac_addr);
Tomas Winkler69dc5d92008-03-25 16:33:41 -07002051 default:
2052 return 1;
Zhu Yib481de92007-09-25 17:54:57 -07002053 }
2054
2055 return 1;
2056}
2057
Zhu Yib481de92007-09-25 17:54:57 -07002058/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002059 * iwl3945_scan_cancel - Cancel any currently executing HW scan
Zhu Yib481de92007-09-25 17:54:57 -07002060 *
2061 * NOTE: priv->mutex is not required before calling this function
2062 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002063static int iwl3945_scan_cancel(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002064{
2065 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
2066 clear_bit(STATUS_SCANNING, &priv->status);
2067 return 0;
2068 }
2069
2070 if (test_bit(STATUS_SCANNING, &priv->status)) {
2071 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2072 IWL_DEBUG_SCAN("Queuing scan abort.\n");
2073 set_bit(STATUS_SCAN_ABORTING, &priv->status);
2074 queue_work(priv->workqueue, &priv->abort_scan);
2075
2076 } else
2077 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
2078
2079 return test_bit(STATUS_SCANNING, &priv->status);
2080 }
2081
2082 return 0;
2083}
2084
2085/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002086 * iwl3945_scan_cancel_timeout - Cancel any currently executing HW scan
Zhu Yib481de92007-09-25 17:54:57 -07002087 * @ms: amount of time to wait (in milliseconds) for scan to abort
2088 *
2089 * NOTE: priv->mutex must be held before calling this function
2090 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002091static int iwl3945_scan_cancel_timeout(struct iwl3945_priv *priv, unsigned long ms)
Zhu Yib481de92007-09-25 17:54:57 -07002092{
2093 unsigned long now = jiffies;
2094 int ret;
2095
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002096 ret = iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002097 if (ret && ms) {
2098 mutex_unlock(&priv->mutex);
2099 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
2100 test_bit(STATUS_SCANNING, &priv->status))
2101 msleep(1);
2102 mutex_lock(&priv->mutex);
2103
2104 return test_bit(STATUS_SCANNING, &priv->status);
2105 }
2106
2107 return ret;
2108}
2109
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002110static void iwl3945_sequence_reset(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002111{
2112 /* Reset ieee stats */
2113
2114 /* We don't reset the net_device_stats (ieee->stats) on
2115 * re-association */
2116
2117 priv->last_seq_num = -1;
2118 priv->last_frag_num = -1;
2119 priv->last_packet_time = 0;
2120
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002121 iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002122}
2123
2124#define MAX_UCODE_BEACON_INTERVAL 1024
2125#define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
2126
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002127static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
Zhu Yib481de92007-09-25 17:54:57 -07002128{
2129 u16 new_val = 0;
2130 u16 beacon_factor = 0;
2131
2132 beacon_factor =
2133 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
2134 / MAX_UCODE_BEACON_INTERVAL;
2135 new_val = beacon_val / beacon_factor;
2136
2137 return cpu_to_le16(new_val);
2138}
2139
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002140static void iwl3945_setup_rxon_timing(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002141{
2142 u64 interval_tm_unit;
2143 u64 tsf, result;
2144 unsigned long flags;
2145 struct ieee80211_conf *conf = NULL;
2146 u16 beacon_int = 0;
2147
2148 conf = ieee80211_get_hw_conf(priv->hw);
2149
2150 spin_lock_irqsave(&priv->lock, flags);
2151 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
2152 priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
2153
2154 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
2155
2156 tsf = priv->timestamp1;
2157 tsf = ((tsf << 32) | priv->timestamp0);
2158
2159 beacon_int = priv->beacon_int;
2160 spin_unlock_irqrestore(&priv->lock, flags);
2161
2162 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
2163 if (beacon_int == 0) {
2164 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
2165 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
2166 } else {
2167 priv->rxon_timing.beacon_interval =
2168 cpu_to_le16(beacon_int);
2169 priv->rxon_timing.beacon_interval =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002170 iwl3945_adjust_beacon_interval(
Zhu Yib481de92007-09-25 17:54:57 -07002171 le16_to_cpu(priv->rxon_timing.beacon_interval));
2172 }
2173
2174 priv->rxon_timing.atim_window = 0;
2175 } else {
2176 priv->rxon_timing.beacon_interval =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002177 iwl3945_adjust_beacon_interval(conf->beacon_int);
Zhu Yib481de92007-09-25 17:54:57 -07002178 /* TODO: we need to get atim_window from upper stack
2179 * for now we set to 0 */
2180 priv->rxon_timing.atim_window = 0;
2181 }
2182
2183 interval_tm_unit =
2184 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2185 result = do_div(tsf, interval_tm_unit);
2186 priv->rxon_timing.beacon_init_val =
2187 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2188
2189 IWL_DEBUG_ASSOC
2190 ("beacon interval %d beacon timer %d beacon tim %d\n",
2191 le16_to_cpu(priv->rxon_timing.beacon_interval),
2192 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2193 le16_to_cpu(priv->rxon_timing.atim_window));
2194}
2195
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002196static int iwl3945_scan_initiate(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002197{
2198 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2199 IWL_ERROR("APs don't scan.\n");
2200 return 0;
2201 }
2202
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002203 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07002204 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2205 return -EIO;
2206 }
2207
2208 if (test_bit(STATUS_SCANNING, &priv->status)) {
2209 IWL_DEBUG_SCAN("Scan already in progress.\n");
2210 return -EAGAIN;
2211 }
2212
2213 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2214 IWL_DEBUG_SCAN("Scan request while abort pending. "
2215 "Queuing.\n");
2216 return -EAGAIN;
2217 }
2218
2219 IWL_DEBUG_INFO("Starting scan...\n");
2220 priv->scan_bands = 2;
2221 set_bit(STATUS_SCANNING, &priv->status);
2222 priv->scan_start = jiffies;
2223 priv->scan_pass_start = priv->scan_start;
2224
2225 queue_work(priv->workqueue, &priv->request_scan);
2226
2227 return 0;
2228}
2229
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002230static int iwl3945_set_rxon_hwcrypto(struct iwl3945_priv *priv, int hw_decrypt)
Zhu Yib481de92007-09-25 17:54:57 -07002231{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002232 struct iwl3945_rxon_cmd *rxon = &priv->staging_rxon;
Zhu Yib481de92007-09-25 17:54:57 -07002233
2234 if (hw_decrypt)
2235 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2236 else
2237 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2238
2239 return 0;
2240}
2241
Johannes Berg8318d782008-01-24 19:38:38 +01002242static void iwl3945_set_flags_for_phymode(struct iwl3945_priv *priv,
2243 enum ieee80211_band band)
Zhu Yib481de92007-09-25 17:54:57 -07002244{
Johannes Berg8318d782008-01-24 19:38:38 +01002245 if (band == IEEE80211_BAND_5GHZ) {
Zhu Yib481de92007-09-25 17:54:57 -07002246 priv->staging_rxon.flags &=
2247 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2248 | RXON_FLG_CCK_MSK);
2249 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2250 } else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002251 /* Copied from iwl3945_bg_post_associate() */
Zhu Yib481de92007-09-25 17:54:57 -07002252 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2253 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2254 else
2255 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2256
2257 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2258 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2259
2260 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2261 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2262 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
2263 }
2264}
2265
2266/*
Ian Schram01ebd062007-10-25 17:15:22 +08002267 * initialize rxon structure with default values from eeprom
Zhu Yib481de92007-09-25 17:54:57 -07002268 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002269static void iwl3945_connection_init_rx_config(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002270{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002271 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07002272
2273 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
2274
2275 switch (priv->iw_mode) {
2276 case IEEE80211_IF_TYPE_AP:
2277 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
2278 break;
2279
2280 case IEEE80211_IF_TYPE_STA:
2281 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2282 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2283 break;
2284
2285 case IEEE80211_IF_TYPE_IBSS:
2286 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2287 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2288 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2289 RXON_FILTER_ACCEPT_GRP_MSK;
2290 break;
2291
2292 case IEEE80211_IF_TYPE_MNTR:
2293 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2294 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2295 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2296 break;
Tomas Winkler69dc5d92008-03-25 16:33:41 -07002297 default:
2298 IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode);
2299 break;
Zhu Yib481de92007-09-25 17:54:57 -07002300 }
2301
2302#if 0
2303 /* TODO: Figure out when short_preamble would be set and cache from
2304 * that */
2305 if (!hw_to_local(priv->hw)->short_preamble)
2306 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2307 else
2308 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2309#endif
2310
Johannes Berg8318d782008-01-24 19:38:38 +01002311 ch_info = iwl3945_get_channel_info(priv, priv->band,
Zhu Yib481de92007-09-25 17:54:57 -07002312 le16_to_cpu(priv->staging_rxon.channel));
2313
2314 if (!ch_info)
2315 ch_info = &priv->channel_info[0];
2316
2317 /*
2318 * in some case A channels are all non IBSS
2319 * in this case force B/G channel
2320 */
2321 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
2322 !(is_channel_ibss(ch_info)))
2323 ch_info = &priv->channel_info[0];
2324
2325 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
2326 if (is_channel_a_band(ch_info))
Johannes Berg8318d782008-01-24 19:38:38 +01002327 priv->band = IEEE80211_BAND_5GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07002328 else
Johannes Berg8318d782008-01-24 19:38:38 +01002329 priv->band = IEEE80211_BAND_2GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07002330
Johannes Berg8318d782008-01-24 19:38:38 +01002331 iwl3945_set_flags_for_phymode(priv, priv->band);
Zhu Yib481de92007-09-25 17:54:57 -07002332
2333 priv->staging_rxon.ofdm_basic_rates =
2334 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2335 priv->staging_rxon.cck_basic_rates =
2336 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2337}
2338
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002339static int iwl3945_set_mode(struct iwl3945_priv *priv, int mode)
Zhu Yib481de92007-09-25 17:54:57 -07002340{
Zhu Yib481de92007-09-25 17:54:57 -07002341 if (mode == IEEE80211_IF_TYPE_IBSS) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002342 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07002343
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002344 ch_info = iwl3945_get_channel_info(priv,
Johannes Berg8318d782008-01-24 19:38:38 +01002345 priv->band,
Zhu Yib481de92007-09-25 17:54:57 -07002346 le16_to_cpu(priv->staging_rxon.channel));
2347
2348 if (!ch_info || !is_channel_ibss(ch_info)) {
2349 IWL_ERROR("channel %d not IBSS channel\n",
2350 le16_to_cpu(priv->staging_rxon.channel));
2351 return -EINVAL;
2352 }
2353 }
2354
Zhu Yib481de92007-09-25 17:54:57 -07002355 priv->iw_mode = mode;
2356
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002357 iwl3945_connection_init_rx_config(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002358 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2359
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002360 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002361
Mohamed Abbasfde35712007-11-29 11:10:15 +08002362 /* dont commit rxon if rf-kill is on*/
2363 if (!iwl3945_is_ready_rf(priv))
2364 return -EAGAIN;
2365
2366 cancel_delayed_work(&priv->scan_check);
2367 if (iwl3945_scan_cancel_timeout(priv, 100)) {
2368 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2369 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2370 return -EAGAIN;
2371 }
2372
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002373 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002374
2375 return 0;
2376}
2377
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002378static void iwl3945_build_tx_cmd_hwcrypto(struct iwl3945_priv *priv,
Johannes Berge039fa42008-05-15 12:55:29 +02002379 struct ieee80211_tx_info *info,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002380 struct iwl3945_cmd *cmd,
Zhu Yib481de92007-09-25 17:54:57 -07002381 struct sk_buff *skb_frag,
2382 int last_frag)
2383{
Ivo van Doorn1c014422008-04-17 19:41:02 +02002384 struct iwl3945_hw_key *keyinfo =
Johannes Berge039fa42008-05-15 12:55:29 +02002385 &priv->stations[info->control.hw_key->hw_key_idx].keyinfo;
Zhu Yib481de92007-09-25 17:54:57 -07002386
2387 switch (keyinfo->alg) {
2388 case ALG_CCMP:
2389 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2390 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2391 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
2392 break;
2393
2394 case ALG_TKIP:
2395#if 0
2396 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2397
2398 if (last_frag)
2399 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2400 8);
2401 else
2402 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2403#endif
2404 break;
2405
2406 case ALG_WEP:
2407 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
Johannes Berge039fa42008-05-15 12:55:29 +02002408 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
Zhu Yib481de92007-09-25 17:54:57 -07002409
2410 if (keyinfo->keylen == 13)
2411 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2412
2413 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2414
2415 IWL_DEBUG_TX("Configuring packet for WEP encryption "
Johannes Berge039fa42008-05-15 12:55:29 +02002416 "with key %d\n", info->control.hw_key->hw_key_idx);
Zhu Yib481de92007-09-25 17:54:57 -07002417 break;
2418
Zhu Yib481de92007-09-25 17:54:57 -07002419 default:
2420 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2421 break;
2422 }
2423}
2424
2425/*
2426 * handle build REPLY_TX command notification.
2427 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002428static void iwl3945_build_tx_cmd_basic(struct iwl3945_priv *priv,
2429 struct iwl3945_cmd *cmd,
Johannes Berge039fa42008-05-15 12:55:29 +02002430 struct ieee80211_tx_info *info,
Zhu Yib481de92007-09-25 17:54:57 -07002431 struct ieee80211_hdr *hdr,
2432 int is_unicast, u8 std_id)
2433{
Zhu Yib481de92007-09-25 17:54:57 -07002434 u16 fc = le16_to_cpu(hdr->frame_control);
2435 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2436
2437 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
Johannes Berge039fa42008-05-15 12:55:29 +02002438 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
Zhu Yib481de92007-09-25 17:54:57 -07002439 tx_flags |= TX_CMD_FLG_ACK_MSK;
2440 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
2441 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2442 if (ieee80211_is_probe_response(fc) &&
2443 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2444 tx_flags |= TX_CMD_FLG_TSF_MSK;
2445 } else {
2446 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2447 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2448 }
2449
2450 cmd->cmd.tx.sta_id = std_id;
2451 if (ieee80211_get_morefrag(hdr))
2452 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2453
Tomas Winkler54dbb522008-05-15 13:54:06 +08002454 if (ieee80211_is_qos_data(fc)) {
2455 u8 *qc = ieee80211_get_qos_ctrl(hdr, ieee80211_get_hdrlen(fc));
2456 cmd->cmd.tx.tid_tspec = qc[0] & 0xf;
Zhu Yib481de92007-09-25 17:54:57 -07002457 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
Tomas Winkler54dbb522008-05-15 13:54:06 +08002458 } else {
Zhu Yib481de92007-09-25 17:54:57 -07002459 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
Tomas Winkler54dbb522008-05-15 13:54:06 +08002460 }
Zhu Yib481de92007-09-25 17:54:57 -07002461
Johannes Berge039fa42008-05-15 12:55:29 +02002462 if (info->flags & IEEE80211_TX_CTL_USE_RTS_CTS) {
Zhu Yib481de92007-09-25 17:54:57 -07002463 tx_flags |= TX_CMD_FLG_RTS_MSK;
2464 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
Johannes Berge039fa42008-05-15 12:55:29 +02002465 } else if (info->flags & IEEE80211_TX_CTL_USE_CTS_PROTECT) {
Zhu Yib481de92007-09-25 17:54:57 -07002466 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2467 tx_flags |= TX_CMD_FLG_CTS_MSK;
2468 }
2469
2470 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2471 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2472
2473 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2474 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
2475 if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
2476 (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
Ian Schrambc434dd2007-10-25 17:15:29 +08002477 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
Zhu Yib481de92007-09-25 17:54:57 -07002478 else
Ian Schrambc434dd2007-10-25 17:15:29 +08002479 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
Mohamed Abbasab53d8a2008-03-25 16:33:36 -07002480 } else {
Zhu Yib481de92007-09-25 17:54:57 -07002481 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
Mohamed Abbasab53d8a2008-03-25 16:33:36 -07002482#ifdef CONFIG_IWL3945_LEDS
2483 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
2484#endif
2485 }
Zhu Yib481de92007-09-25 17:54:57 -07002486
2487 cmd->cmd.tx.driver_txop = 0;
2488 cmd->cmd.tx.tx_flags = tx_flags;
2489 cmd->cmd.tx.next_frame_len = 0;
2490}
2491
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002492/**
2493 * iwl3945_get_sta_id - Find station's index within station table
2494 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002495static int iwl3945_get_sta_id(struct iwl3945_priv *priv, struct ieee80211_hdr *hdr)
Zhu Yib481de92007-09-25 17:54:57 -07002496{
2497 int sta_id;
2498 u16 fc = le16_to_cpu(hdr->frame_control);
2499
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002500 /* If this frame is broadcast or management, use broadcast station id */
Zhu Yib481de92007-09-25 17:54:57 -07002501 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2502 is_multicast_ether_addr(hdr->addr1))
2503 return priv->hw_setting.bcast_sta_id;
2504
2505 switch (priv->iw_mode) {
2506
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002507 /* If we are a client station in a BSS network, use the special
2508 * AP station entry (that's the only station we communicate with) */
Zhu Yib481de92007-09-25 17:54:57 -07002509 case IEEE80211_IF_TYPE_STA:
2510 return IWL_AP_ID;
2511
2512 /* If we are an AP, then find the station, or use BCAST */
2513 case IEEE80211_IF_TYPE_AP:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002514 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
Zhu Yib481de92007-09-25 17:54:57 -07002515 if (sta_id != IWL_INVALID_STATION)
2516 return sta_id;
2517 return priv->hw_setting.bcast_sta_id;
2518
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002519 /* If this frame is going out to an IBSS network, find the station,
2520 * or create a new station table entry */
Joe Perches0795af52007-10-03 17:59:30 -07002521 case IEEE80211_IF_TYPE_IBSS: {
2522 DECLARE_MAC_BUF(mac);
2523
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002524 /* Create new station table entry */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002525 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
Zhu Yib481de92007-09-25 17:54:57 -07002526 if (sta_id != IWL_INVALID_STATION)
2527 return sta_id;
2528
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002529 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
Zhu Yib481de92007-09-25 17:54:57 -07002530
2531 if (sta_id != IWL_INVALID_STATION)
2532 return sta_id;
2533
Joe Perches0795af52007-10-03 17:59:30 -07002534 IWL_DEBUG_DROP("Station %s not in station map. "
Zhu Yib481de92007-09-25 17:54:57 -07002535 "Defaulting to broadcast...\n",
Joe Perches0795af52007-10-03 17:59:30 -07002536 print_mac(mac, hdr->addr1));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002537 iwl3945_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
Zhu Yib481de92007-09-25 17:54:57 -07002538 return priv->hw_setting.bcast_sta_id;
Joe Perches0795af52007-10-03 17:59:30 -07002539 }
Zhu Yib481de92007-09-25 17:54:57 -07002540 default:
Ian Schram01ebd062007-10-25 17:15:22 +08002541 IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
Zhu Yib481de92007-09-25 17:54:57 -07002542 return priv->hw_setting.bcast_sta_id;
2543 }
2544}
2545
2546/*
2547 * start REPLY_TX command process
2548 */
Johannes Berge039fa42008-05-15 12:55:29 +02002549static int iwl3945_tx_skb(struct iwl3945_priv *priv, struct sk_buff *skb)
Zhu Yib481de92007-09-25 17:54:57 -07002550{
2551 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
Johannes Berge039fa42008-05-15 12:55:29 +02002552 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002553 struct iwl3945_tfd_frame *tfd;
Zhu Yib481de92007-09-25 17:54:57 -07002554 u32 *control_flags;
Johannes Berge2530082008-05-17 00:57:14 +02002555 int txq_id = skb_get_queue_mapping(skb);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002556 struct iwl3945_tx_queue *txq = NULL;
2557 struct iwl3945_queue *q = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002558 dma_addr_t phys_addr;
2559 dma_addr_t txcmd_phys;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002560 struct iwl3945_cmd *out_cmd = NULL;
Tomas Winkler54dbb522008-05-15 13:54:06 +08002561 u16 len, idx, len_org, hdr_len;
2562 u8 id;
2563 u8 unicast;
Zhu Yib481de92007-09-25 17:54:57 -07002564 u8 sta_id;
Tomas Winkler54dbb522008-05-15 13:54:06 +08002565 u8 tid = 0;
Zhu Yib481de92007-09-25 17:54:57 -07002566 u16 seq_number = 0;
2567 u16 fc;
Zhu Yib481de92007-09-25 17:54:57 -07002568 u8 wait_write_ptr = 0;
Tomas Winkler54dbb522008-05-15 13:54:06 +08002569 u8 *qc = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002570 unsigned long flags;
2571 int rc;
2572
2573 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002574 if (iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07002575 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2576 goto drop_unlock;
2577 }
2578
Johannes Berg32bfd352007-12-19 01:31:26 +01002579 if (!priv->vif) {
2580 IWL_DEBUG_DROP("Dropping - !priv->vif\n");
Zhu Yib481de92007-09-25 17:54:57 -07002581 goto drop_unlock;
2582 }
2583
Johannes Berge039fa42008-05-15 12:55:29 +02002584 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
Zhu Yib481de92007-09-25 17:54:57 -07002585 IWL_ERROR("ERROR: No TX rate available.\n");
2586 goto drop_unlock;
2587 }
2588
2589 unicast = !is_multicast_ether_addr(hdr->addr1);
2590 id = 0;
2591
2592 fc = le16_to_cpu(hdr->frame_control);
2593
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08002594#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07002595 if (ieee80211_is_auth(fc))
2596 IWL_DEBUG_TX("Sending AUTH frame\n");
2597 else if (ieee80211_is_assoc_request(fc))
2598 IWL_DEBUG_TX("Sending ASSOC frame\n");
2599 else if (ieee80211_is_reassoc_request(fc))
2600 IWL_DEBUG_TX("Sending REASSOC frame\n");
2601#endif
2602
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08002603 /* drop all data frame if we are not associated */
Reinette Chatrea6477242008-02-14 10:40:28 -08002604 if ((!iwl3945_is_associated(priv) ||
2605 ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id)) &&
Zhu Yib481de92007-09-25 17:54:57 -07002606 ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002607 IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
Zhu Yib481de92007-09-25 17:54:57 -07002608 goto drop_unlock;
2609 }
2610
2611 spin_unlock_irqrestore(&priv->lock, flags);
2612
2613 hdr_len = ieee80211_get_hdrlen(fc);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002614
2615 /* Find (or create) index into station table for destination station */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002616 sta_id = iwl3945_get_sta_id(priv, hdr);
Zhu Yib481de92007-09-25 17:54:57 -07002617 if (sta_id == IWL_INVALID_STATION) {
Joe Perches0795af52007-10-03 17:59:30 -07002618 DECLARE_MAC_BUF(mac);
2619
2620 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2621 print_mac(mac, hdr->addr1));
Zhu Yib481de92007-09-25 17:54:57 -07002622 goto drop;
2623 }
2624
2625 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2626
Tomas Winkler54dbb522008-05-15 13:54:06 +08002627 if (ieee80211_is_qos_data(fc)) {
2628 qc = ieee80211_get_qos_ctrl(hdr, hdr_len);
2629 tid = qc[0] & 0xf;
Zhu Yib481de92007-09-25 17:54:57 -07002630 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2631 IEEE80211_SCTL_SEQ;
2632 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2633 (hdr->seq_ctrl &
2634 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2635 seq_number += 0x10;
2636 }
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002637
2638 /* Descriptor for chosen Tx queue */
Zhu Yib481de92007-09-25 17:54:57 -07002639 txq = &priv->txq[txq_id];
2640 q = &txq->q;
2641
2642 spin_lock_irqsave(&priv->lock, flags);
2643
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002644 /* Set up first empty TFD within this queue's circular TFD buffer */
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002645 tfd = &txq->bd[q->write_ptr];
Zhu Yib481de92007-09-25 17:54:57 -07002646 memset(tfd, 0, sizeof(*tfd));
2647 control_flags = (u32 *) tfd;
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002648 idx = get_cmd_index(q, q->write_ptr, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002649
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002650 /* Set up driver data for this TFD */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002651 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl3945_tx_info));
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002652 txq->txb[q->write_ptr].skb[0] = skb;
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002653
2654 /* Init first empty entry in queue's array of Tx/cmd buffers */
Zhu Yib481de92007-09-25 17:54:57 -07002655 out_cmd = &txq->cmd[idx];
2656 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2657 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002658
2659 /*
2660 * Set up the Tx-command (not MAC!) header.
2661 * Store the chosen Tx queue and TFD index within the sequence field;
2662 * after Tx, uCode's Tx response will return this value so driver can
2663 * locate the frame within the tx queue and do post-tx processing.
2664 */
Zhu Yib481de92007-09-25 17:54:57 -07002665 out_cmd->hdr.cmd = REPLY_TX;
2666 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002667 INDEX_TO_SEQ(q->write_ptr)));
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002668
2669 /* Copy MAC header from skb into command buffer */
Zhu Yib481de92007-09-25 17:54:57 -07002670 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2671
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002672 /*
2673 * Use the first empty entry in this queue's command buffer array
2674 * to contain the Tx command and MAC header concatenated together
2675 * (payload data will be in another buffer).
2676 * Size of this varies, due to varying MAC header length.
2677 * If end is not dword aligned, we'll have 2 extra bytes at the end
2678 * of the MAC header (device reads on dword boundaries).
2679 * We'll tell device about this padding later.
2680 */
Zhu Yib481de92007-09-25 17:54:57 -07002681 len = priv->hw_setting.tx_cmd_len +
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002682 sizeof(struct iwl3945_cmd_header) + hdr_len;
Zhu Yib481de92007-09-25 17:54:57 -07002683
2684 len_org = len;
2685 len = (len + 3) & ~3;
2686
2687 if (len_org != len)
2688 len_org = 1;
2689 else
2690 len_org = 0;
2691
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002692 /* Physical address of this Tx command's header (not MAC header!),
2693 * within command buffer array. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002694 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl3945_cmd) * idx +
2695 offsetof(struct iwl3945_cmd, hdr);
Zhu Yib481de92007-09-25 17:54:57 -07002696
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002697 /* Add buffer containing Tx command and MAC(!) header to TFD's
2698 * first entry */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002699 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
Zhu Yib481de92007-09-25 17:54:57 -07002700
Johannes Berge039fa42008-05-15 12:55:29 +02002701 if (!(info->flags & IEEE80211_TX_CTL_DO_NOT_ENCRYPT))
2702 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002703
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002704 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2705 * if any (802.11 null frames have no payload). */
Zhu Yib481de92007-09-25 17:54:57 -07002706 len = skb->len - hdr_len;
2707 if (len) {
2708 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2709 len, PCI_DMA_TODEVICE);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002710 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
Zhu Yib481de92007-09-25 17:54:57 -07002711 }
2712
Zhu Yib481de92007-09-25 17:54:57 -07002713 if (!len)
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002714 /* If there is no payload, then we use only one Tx buffer */
Zhu Yib481de92007-09-25 17:54:57 -07002715 *control_flags = TFD_CTL_COUNT_SET(1);
2716 else
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002717 /* Else use 2 buffers.
2718 * Tell 3945 about any padding after MAC header */
Zhu Yib481de92007-09-25 17:54:57 -07002719 *control_flags = TFD_CTL_COUNT_SET(2) |
2720 TFD_CTL_PAD_SET(U32_PAD(len));
2721
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002722 /* Total # bytes to be transmitted */
Zhu Yib481de92007-09-25 17:54:57 -07002723 len = (u16)skb->len;
2724 out_cmd->cmd.tx.len = cpu_to_le16(len);
2725
2726 /* TODO need this for burst mode later on */
Johannes Berge039fa42008-05-15 12:55:29 +02002727 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, unicast, sta_id);
Zhu Yib481de92007-09-25 17:54:57 -07002728
2729 /* set is_hcca to 0; it probably will never be implemented */
Johannes Berge039fa42008-05-15 12:55:29 +02002730 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002731
2732 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
2733 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
2734
2735 if (!ieee80211_get_morefrag(hdr)) {
2736 txq->need_update = 1;
2737 if (qc) {
Zhu Yib481de92007-09-25 17:54:57 -07002738 priv->stations[sta_id].tid[tid].seq_number = seq_number;
2739 }
2740 } else {
2741 wait_write_ptr = 1;
2742 txq->need_update = 0;
2743 }
2744
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002745 iwl3945_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
Zhu Yib481de92007-09-25 17:54:57 -07002746 sizeof(out_cmd->cmd.tx));
2747
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002748 iwl3945_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
Zhu Yib481de92007-09-25 17:54:57 -07002749 ieee80211_get_hdrlen(fc));
2750
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002751 /* Tell device the write index *just past* this latest filled TFD */
Tomas Winklerc54b6792008-03-06 17:36:53 -08002752 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002753 rc = iwl3945_tx_queue_update_write_ptr(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -07002754 spin_unlock_irqrestore(&priv->lock, flags);
2755
2756 if (rc)
2757 return rc;
2758
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002759 if ((iwl3945_queue_space(q) < q->high_mark)
Zhu Yib481de92007-09-25 17:54:57 -07002760 && priv->mac80211_registered) {
2761 if (wait_write_ptr) {
2762 spin_lock_irqsave(&priv->lock, flags);
2763 txq->need_update = 1;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002764 iwl3945_tx_queue_update_write_ptr(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -07002765 spin_unlock_irqrestore(&priv->lock, flags);
2766 }
2767
Johannes Berge2530082008-05-17 00:57:14 +02002768 ieee80211_stop_queue(priv->hw, skb_get_queue_mapping(skb));
Zhu Yib481de92007-09-25 17:54:57 -07002769 }
2770
2771 return 0;
2772
2773drop_unlock:
2774 spin_unlock_irqrestore(&priv->lock, flags);
2775drop:
2776 return -1;
2777}
2778
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002779static void iwl3945_set_rate(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002780{
Johannes Berg8318d782008-01-24 19:38:38 +01002781 const struct ieee80211_supported_band *sband = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002782 struct ieee80211_rate *rate;
2783 int i;
2784
Johannes Berg8318d782008-01-24 19:38:38 +01002785 sband = iwl3945_get_band(priv, priv->band);
2786 if (!sband) {
Saleem Abdulrasoolc4ba9622007-11-18 23:59:08 -08002787 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
2788 return;
2789 }
Zhu Yib481de92007-09-25 17:54:57 -07002790
2791 priv->active_rate = 0;
2792 priv->active_rate_basic = 0;
2793
Johannes Berg8318d782008-01-24 19:38:38 +01002794 IWL_DEBUG_RATE("Setting rates for %s GHz\n",
2795 sband->band == IEEE80211_BAND_2GHZ ? "2.4" : "5");
Zhu Yib481de92007-09-25 17:54:57 -07002796
Johannes Berg8318d782008-01-24 19:38:38 +01002797 for (i = 0; i < sband->n_bitrates; i++) {
2798 rate = &sband->bitrates[i];
2799 if ((rate->hw_value < IWL_RATE_COUNT) &&
2800 !(rate->flags & IEEE80211_CHAN_DISABLED)) {
2801 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)\n",
2802 rate->hw_value, iwl3945_rates[rate->hw_value].plcp);
2803 priv->active_rate |= (1 << rate->hw_value);
2804 }
Zhu Yib481de92007-09-25 17:54:57 -07002805 }
2806
2807 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
2808 priv->active_rate, priv->active_rate_basic);
2809
2810 /*
2811 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
2812 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
2813 * OFDM
2814 */
2815 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
2816 priv->staging_rxon.cck_basic_rates =
2817 ((priv->active_rate_basic &
2818 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
2819 else
2820 priv->staging_rxon.cck_basic_rates =
2821 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2822
2823 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
2824 priv->staging_rxon.ofdm_basic_rates =
2825 ((priv->active_rate_basic &
2826 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
2827 IWL_FIRST_OFDM_RATE) & 0xFF;
2828 else
2829 priv->staging_rxon.ofdm_basic_rates =
2830 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2831}
2832
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002833static void iwl3945_radio_kill_sw(struct iwl3945_priv *priv, int disable_radio)
Zhu Yib481de92007-09-25 17:54:57 -07002834{
2835 unsigned long flags;
2836
2837 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
2838 return;
2839
2840 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
2841 disable_radio ? "OFF" : "ON");
2842
2843 if (disable_radio) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002844 iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002845 /* FIXME: This is a workaround for AP */
2846 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
2847 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002848 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
Zhu Yib481de92007-09-25 17:54:57 -07002849 CSR_UCODE_SW_BIT_RFKILL);
2850 spin_unlock_irqrestore(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002851 iwl3945_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002852 set_bit(STATUS_RF_KILL_SW, &priv->status);
2853 }
2854 return;
2855 }
2856
2857 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002858 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
Zhu Yib481de92007-09-25 17:54:57 -07002859
2860 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2861 spin_unlock_irqrestore(&priv->lock, flags);
2862
2863 /* wake up ucode */
2864 msleep(10);
2865
2866 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002867 iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
2868 if (!iwl3945_grab_nic_access(priv))
2869 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002870 spin_unlock_irqrestore(&priv->lock, flags);
2871
2872 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
2873 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2874 "disabled by HW switch\n");
2875 return;
2876 }
2877
Zhu Yi808e72a2008-06-12 09:47:17 +08002878 if (priv->is_open)
2879 queue_work(priv->workqueue, &priv->restart);
Zhu Yib481de92007-09-25 17:54:57 -07002880 return;
2881}
2882
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002883void iwl3945_set_decrypted_flag(struct iwl3945_priv *priv, struct sk_buff *skb,
Zhu Yib481de92007-09-25 17:54:57 -07002884 u32 decrypt_res, struct ieee80211_rx_status *stats)
2885{
2886 u16 fc =
2887 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
2888
2889 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2890 return;
2891
2892 if (!(fc & IEEE80211_FCTL_PROTECTED))
2893 return;
2894
2895 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2896 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2897 case RX_RES_STATUS_SEC_TYPE_TKIP:
2898 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2899 RX_RES_STATUS_BAD_ICV_MIC)
2900 stats->flag |= RX_FLAG_MMIC_ERROR;
2901 case RX_RES_STATUS_SEC_TYPE_WEP:
2902 case RX_RES_STATUS_SEC_TYPE_CCMP:
2903 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2904 RX_RES_STATUS_DECRYPT_OK) {
2905 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2906 stats->flag |= RX_FLAG_DECRYPTED;
2907 }
2908 break;
2909
2910 default:
2911 break;
2912 }
2913}
2914
Zhu Yib481de92007-09-25 17:54:57 -07002915#define IWL_PACKET_RETRY_TIME HZ
2916
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002917int iwl3945_is_duplicate_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *header)
Zhu Yib481de92007-09-25 17:54:57 -07002918{
2919 u16 sc = le16_to_cpu(header->seq_ctrl);
2920 u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
2921 u16 frag = sc & IEEE80211_SCTL_FRAG;
2922 u16 *last_seq, *last_frag;
2923 unsigned long *last_time;
2924
2925 switch (priv->iw_mode) {
2926 case IEEE80211_IF_TYPE_IBSS:{
2927 struct list_head *p;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002928 struct iwl3945_ibss_seq *entry = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002929 u8 *mac = header->addr2;
2930 int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
2931
2932 __list_for_each(p, &priv->ibss_mac_hash[index]) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002933 entry = list_entry(p, struct iwl3945_ibss_seq, list);
Zhu Yib481de92007-09-25 17:54:57 -07002934 if (!compare_ether_addr(entry->mac, mac))
2935 break;
2936 }
2937 if (p == &priv->ibss_mac_hash[index]) {
2938 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
2939 if (!entry) {
Ian Schrambc434dd2007-10-25 17:15:29 +08002940 IWL_ERROR("Cannot malloc new mac entry\n");
Zhu Yib481de92007-09-25 17:54:57 -07002941 return 0;
2942 }
2943 memcpy(entry->mac, mac, ETH_ALEN);
2944 entry->seq_num = seq;
2945 entry->frag_num = frag;
2946 entry->packet_time = jiffies;
Ian Schrambc434dd2007-10-25 17:15:29 +08002947 list_add(&entry->list, &priv->ibss_mac_hash[index]);
Zhu Yib481de92007-09-25 17:54:57 -07002948 return 0;
2949 }
2950 last_seq = &entry->seq_num;
2951 last_frag = &entry->frag_num;
2952 last_time = &entry->packet_time;
2953 break;
2954 }
2955 case IEEE80211_IF_TYPE_STA:
2956 last_seq = &priv->last_seq_num;
2957 last_frag = &priv->last_frag_num;
2958 last_time = &priv->last_packet_time;
2959 break;
2960 default:
2961 return 0;
2962 }
2963 if ((*last_seq == seq) &&
2964 time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
2965 if (*last_frag == frag)
2966 goto drop;
2967 if (*last_frag + 1 != frag)
2968 /* out-of-order fragment */
2969 goto drop;
2970 } else
2971 *last_seq = seq;
2972
2973 *last_frag = frag;
2974 *last_time = jiffies;
2975 return 0;
2976
2977 drop:
2978 return 1;
2979}
2980
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08002981#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -07002982
2983#include "iwl-spectrum.h"
2984
2985#define BEACON_TIME_MASK_LOW 0x00FFFFFF
2986#define BEACON_TIME_MASK_HIGH 0xFF000000
2987#define TIME_UNIT 1024
2988
2989/*
2990 * extended beacon time format
2991 * time in usec will be changed into a 32-bit value in 8:24 format
2992 * the high 1 byte is the beacon counts
2993 * the lower 3 bytes is the time in usec within one beacon interval
2994 */
2995
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002996static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
Zhu Yib481de92007-09-25 17:54:57 -07002997{
2998 u32 quot;
2999 u32 rem;
3000 u32 interval = beacon_interval * 1024;
3001
3002 if (!interval || !usec)
3003 return 0;
3004
3005 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
3006 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
3007
3008 return (quot << 24) + rem;
3009}
3010
3011/* base is usually what we get from ucode with each received frame,
3012 * the same as HW timer counter counting down
3013 */
3014
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003015static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
Zhu Yib481de92007-09-25 17:54:57 -07003016{
3017 u32 base_low = base & BEACON_TIME_MASK_LOW;
3018 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
3019 u32 interval = beacon_interval * TIME_UNIT;
3020 u32 res = (base & BEACON_TIME_MASK_HIGH) +
3021 (addon & BEACON_TIME_MASK_HIGH);
3022
3023 if (base_low > addon_low)
3024 res += base_low - addon_low;
3025 else if (base_low < addon_low) {
3026 res += interval + base_low - addon_low;
3027 res += (1 << 24);
3028 } else
3029 res += (1 << 24);
3030
3031 return cpu_to_le32(res);
3032}
3033
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003034static int iwl3945_get_measurement(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07003035 struct ieee80211_measurement_params *params,
3036 u8 type)
3037{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003038 struct iwl3945_spectrum_cmd spectrum;
3039 struct iwl3945_rx_packet *res;
3040 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07003041 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
3042 .data = (void *)&spectrum,
3043 .meta.flags = CMD_WANT_SKB,
3044 };
3045 u32 add_time = le64_to_cpu(params->start_time);
3046 int rc;
3047 int spectrum_resp_status;
3048 int duration = le16_to_cpu(params->duration);
3049
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003050 if (iwl3945_is_associated(priv))
Zhu Yib481de92007-09-25 17:54:57 -07003051 add_time =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003052 iwl3945_usecs_to_beacons(
Zhu Yib481de92007-09-25 17:54:57 -07003053 le64_to_cpu(params->start_time) - priv->last_tsf,
3054 le16_to_cpu(priv->rxon_timing.beacon_interval));
3055
3056 memset(&spectrum, 0, sizeof(spectrum));
3057
3058 spectrum.channel_count = cpu_to_le16(1);
3059 spectrum.flags =
3060 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
3061 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
3062 cmd.len = sizeof(spectrum);
3063 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
3064
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003065 if (iwl3945_is_associated(priv))
Zhu Yib481de92007-09-25 17:54:57 -07003066 spectrum.start_time =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003067 iwl3945_add_beacon_time(priv->last_beacon_time,
Zhu Yib481de92007-09-25 17:54:57 -07003068 add_time,
3069 le16_to_cpu(priv->rxon_timing.beacon_interval));
3070 else
3071 spectrum.start_time = 0;
3072
3073 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
3074 spectrum.channels[0].channel = params->channel;
3075 spectrum.channels[0].type = type;
3076 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
3077 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
3078 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
3079
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003080 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07003081 if (rc)
3082 return rc;
3083
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003084 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003085 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
3086 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
3087 rc = -EIO;
3088 }
3089
3090 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
3091 switch (spectrum_resp_status) {
3092 case 0: /* Command will be handled */
3093 if (res->u.spectrum.id != 0xff) {
Ian Schrambc434dd2007-10-25 17:15:29 +08003094 IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
3095 res->u.spectrum.id);
Zhu Yib481de92007-09-25 17:54:57 -07003096 priv->measurement_status &= ~MEASUREMENT_READY;
3097 }
3098 priv->measurement_status |= MEASUREMENT_ACTIVE;
3099 rc = 0;
3100 break;
3101
3102 case 1: /* Command will not be handled */
3103 rc = -EAGAIN;
3104 break;
3105 }
3106
3107 dev_kfree_skb_any(cmd.meta.u.skb);
3108
3109 return rc;
3110}
3111#endif
3112
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003113static void iwl3945_rx_reply_alive(struct iwl3945_priv *priv,
3114 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003115{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003116 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3117 struct iwl3945_alive_resp *palive;
Zhu Yib481de92007-09-25 17:54:57 -07003118 struct delayed_work *pwork;
3119
3120 palive = &pkt->u.alive_frame;
3121
3122 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
3123 "0x%01X 0x%01X\n",
3124 palive->is_valid, palive->ver_type,
3125 palive->ver_subtype);
3126
3127 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
3128 IWL_DEBUG_INFO("Initialization Alive received.\n");
3129 memcpy(&priv->card_alive_init,
3130 &pkt->u.alive_frame,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003131 sizeof(struct iwl3945_init_alive_resp));
Zhu Yib481de92007-09-25 17:54:57 -07003132 pwork = &priv->init_alive_start;
3133 } else {
3134 IWL_DEBUG_INFO("Runtime Alive received.\n");
3135 memcpy(&priv->card_alive, &pkt->u.alive_frame,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003136 sizeof(struct iwl3945_alive_resp));
Zhu Yib481de92007-09-25 17:54:57 -07003137 pwork = &priv->alive_start;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003138 iwl3945_disable_events(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003139 }
3140
3141 /* We delay the ALIVE response by 5ms to
3142 * give the HW RF Kill time to activate... */
3143 if (palive->is_valid == UCODE_VALID_OK)
3144 queue_delayed_work(priv->workqueue, pwork,
3145 msecs_to_jiffies(5));
3146 else
3147 IWL_WARNING("uCode did not respond OK.\n");
3148}
3149
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003150static void iwl3945_rx_reply_add_sta(struct iwl3945_priv *priv,
3151 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003152{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003153 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003154
3155 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
3156 return;
3157}
3158
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003159static void iwl3945_rx_reply_error(struct iwl3945_priv *priv,
3160 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003161{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003162 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003163
3164 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
3165 "seq 0x%04X ser 0x%08X\n",
3166 le32_to_cpu(pkt->u.err_resp.error_type),
3167 get_cmd_string(pkt->u.err_resp.cmd_id),
3168 pkt->u.err_resp.cmd_id,
3169 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
3170 le32_to_cpu(pkt->u.err_resp.error_info));
3171}
3172
3173#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3174
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003175static void iwl3945_rx_csa(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003176{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003177 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3178 struct iwl3945_rxon_cmd *rxon = (void *)&priv->active_rxon;
3179 struct iwl3945_csa_notification *csa = &(pkt->u.csa_notif);
Zhu Yib481de92007-09-25 17:54:57 -07003180 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3181 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3182 rxon->channel = csa->channel;
3183 priv->staging_rxon.channel = csa->channel;
3184}
3185
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003186static void iwl3945_rx_spectrum_measure_notif(struct iwl3945_priv *priv,
3187 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003188{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003189#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003190 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3191 struct iwl3945_spectrum_notification *report = &(pkt->u.spectrum_notif);
Zhu Yib481de92007-09-25 17:54:57 -07003192
3193 if (!report->state) {
3194 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3195 "Spectrum Measure Notification: Start\n");
3196 return;
3197 }
3198
3199 memcpy(&priv->measure_report, report, sizeof(*report));
3200 priv->measurement_status |= MEASUREMENT_READY;
3201#endif
3202}
3203
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003204static void iwl3945_rx_pm_sleep_notif(struct iwl3945_priv *priv,
3205 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003206{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003207#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003208 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3209 struct iwl3945_sleep_notification *sleep = &(pkt->u.sleep_notif);
Zhu Yib481de92007-09-25 17:54:57 -07003210 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3211 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3212#endif
3213}
3214
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003215static void iwl3945_rx_pm_debug_statistics_notif(struct iwl3945_priv *priv,
3216 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003217{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003218 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003219 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3220 "notification for %s:\n",
3221 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003222 iwl3945_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
Zhu Yib481de92007-09-25 17:54:57 -07003223}
3224
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003225static void iwl3945_bg_beacon_update(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07003226{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003227 struct iwl3945_priv *priv =
3228 container_of(work, struct iwl3945_priv, beacon_update);
Zhu Yib481de92007-09-25 17:54:57 -07003229 struct sk_buff *beacon;
3230
3231 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
Johannes Berge039fa42008-05-15 12:55:29 +02003232 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
Zhu Yib481de92007-09-25 17:54:57 -07003233
3234 if (!beacon) {
3235 IWL_ERROR("update beacon failed\n");
3236 return;
3237 }
3238
3239 mutex_lock(&priv->mutex);
3240 /* new beacon skb is allocated every time; dispose previous.*/
3241 if (priv->ibss_beacon)
3242 dev_kfree_skb(priv->ibss_beacon);
3243
3244 priv->ibss_beacon = beacon;
3245 mutex_unlock(&priv->mutex);
3246
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003247 iwl3945_send_beacon_cmd(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003248}
3249
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003250static void iwl3945_rx_beacon_notif(struct iwl3945_priv *priv,
3251 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003252{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003253#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003254 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3255 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
Zhu Yib481de92007-09-25 17:54:57 -07003256 u8 rate = beacon->beacon_notify_hdr.rate;
3257
3258 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3259 "tsf %d %d rate %d\n",
3260 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3261 beacon->beacon_notify_hdr.failure_frame,
3262 le32_to_cpu(beacon->ibss_mgr_status),
3263 le32_to_cpu(beacon->high_tsf),
3264 le32_to_cpu(beacon->low_tsf), rate);
3265#endif
3266
3267 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
3268 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3269 queue_work(priv->workqueue, &priv->beacon_update);
3270}
3271
3272/* Service response to REPLY_SCAN_CMD (0x80) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003273static void iwl3945_rx_reply_scan(struct iwl3945_priv *priv,
3274 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003275{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003276#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003277 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3278 struct iwl3945_scanreq_notification *notif =
3279 (struct iwl3945_scanreq_notification *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003280
3281 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3282#endif
3283}
3284
3285/* Service SCAN_START_NOTIFICATION (0x82) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003286static void iwl3945_rx_scan_start_notif(struct iwl3945_priv *priv,
3287 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003288{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003289 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3290 struct iwl3945_scanstart_notification *notif =
3291 (struct iwl3945_scanstart_notification *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003292 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3293 IWL_DEBUG_SCAN("Scan start: "
3294 "%d [802.11%s] "
3295 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3296 notif->channel,
3297 notif->band ? "bg" : "a",
3298 notif->tsf_high,
3299 notif->tsf_low, notif->status, notif->beacon_timer);
3300}
3301
3302/* Service SCAN_RESULTS_NOTIFICATION (0x83) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003303static void iwl3945_rx_scan_results_notif(struct iwl3945_priv *priv,
3304 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003305{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003306 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3307 struct iwl3945_scanresults_notification *notif =
3308 (struct iwl3945_scanresults_notification *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003309
3310 IWL_DEBUG_SCAN("Scan ch.res: "
3311 "%d [802.11%s] "
3312 "(TSF: 0x%08X:%08X) - %d "
3313 "elapsed=%lu usec (%dms since last)\n",
3314 notif->channel,
3315 notif->band ? "bg" : "a",
3316 le32_to_cpu(notif->tsf_high),
3317 le32_to_cpu(notif->tsf_low),
3318 le32_to_cpu(notif->statistics[0]),
3319 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3320 jiffies_to_msecs(elapsed_jiffies
3321 (priv->last_scan_jiffies, jiffies)));
3322
3323 priv->last_scan_jiffies = jiffies;
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08003324 priv->next_scan_jiffies = 0;
Zhu Yib481de92007-09-25 17:54:57 -07003325}
3326
3327/* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003328static void iwl3945_rx_scan_complete_notif(struct iwl3945_priv *priv,
3329 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003330{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003331 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3332 struct iwl3945_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003333
3334 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3335 scan_notif->scanned_channels,
3336 scan_notif->tsf_low,
3337 scan_notif->tsf_high, scan_notif->status);
3338
3339 /* The HW is no longer scanning */
3340 clear_bit(STATUS_SCAN_HW, &priv->status);
3341
3342 /* The scan completion notification came in, so kill that timer... */
3343 cancel_delayed_work(&priv->scan_check);
3344
3345 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3346 (priv->scan_bands == 2) ? "2.4" : "5.2",
3347 jiffies_to_msecs(elapsed_jiffies
3348 (priv->scan_pass_start, jiffies)));
3349
3350 /* Remove this scanned band from the list
3351 * of pending bands to scan */
3352 priv->scan_bands--;
3353
3354 /* If a request to abort was given, or the scan did not succeed
3355 * then we reset the scan state machine and terminate,
3356 * re-queuing another scan if one has been requested */
3357 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3358 IWL_DEBUG_INFO("Aborted scan completed.\n");
3359 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3360 } else {
3361 /* If there are more bands on this scan pass reschedule */
3362 if (priv->scan_bands > 0)
3363 goto reschedule;
3364 }
3365
3366 priv->last_scan_jiffies = jiffies;
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08003367 priv->next_scan_jiffies = 0;
Zhu Yib481de92007-09-25 17:54:57 -07003368 IWL_DEBUG_INFO("Setting scan to off\n");
3369
3370 clear_bit(STATUS_SCANNING, &priv->status);
3371
3372 IWL_DEBUG_INFO("Scan took %dms\n",
3373 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3374
3375 queue_work(priv->workqueue, &priv->scan_completed);
3376
3377 return;
3378
3379reschedule:
3380 priv->scan_pass_start = jiffies;
3381 queue_work(priv->workqueue, &priv->request_scan);
3382}
3383
3384/* Handle notification from uCode that card's power state is changing
3385 * due to software, hardware, or critical temperature RFKILL */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003386static void iwl3945_rx_card_state_notif(struct iwl3945_priv *priv,
3387 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003388{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003389 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003390 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3391 unsigned long status = priv->status;
3392
3393 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3394 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3395 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3396
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003397 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
Zhu Yib481de92007-09-25 17:54:57 -07003398 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3399
3400 if (flags & HW_CARD_DISABLED)
3401 set_bit(STATUS_RF_KILL_HW, &priv->status);
3402 else
3403 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3404
3405
3406 if (flags & SW_CARD_DISABLED)
3407 set_bit(STATUS_RF_KILL_SW, &priv->status);
3408 else
3409 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3410
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003411 iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003412
3413 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3414 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3415 (test_bit(STATUS_RF_KILL_SW, &status) !=
3416 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3417 queue_work(priv->workqueue, &priv->rf_kill);
3418 else
3419 wake_up_interruptible(&priv->wait_command_queue);
3420}
3421
3422/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003423 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
Zhu Yib481de92007-09-25 17:54:57 -07003424 *
3425 * Setup the RX handlers for each of the reply types sent from the uCode
3426 * to the host.
3427 *
3428 * This function chains into the hardware specific files for them to setup
3429 * any hardware specific handlers as well.
3430 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003431static void iwl3945_setup_rx_handlers(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003432{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003433 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
3434 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
3435 priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
3436 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
Zhu Yib481de92007-09-25 17:54:57 -07003437 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003438 iwl3945_rx_spectrum_measure_notif;
3439 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003440 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003441 iwl3945_rx_pm_debug_statistics_notif;
3442 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003443
Ben Cahill9fbab512007-11-29 11:09:47 +08003444 /*
3445 * The same handler is used for both the REPLY to a discrete
3446 * statistics request from the host as well as for the periodic
3447 * statistics notifications (after received beacons) from the uCode.
Zhu Yib481de92007-09-25 17:54:57 -07003448 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003449 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
3450 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
Zhu Yib481de92007-09-25 17:54:57 -07003451
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003452 priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
3453 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003454 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003455 iwl3945_rx_scan_results_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003456 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003457 iwl3945_rx_scan_complete_notif;
3458 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003459
Ben Cahill9fbab512007-11-29 11:09:47 +08003460 /* Set up hardware specific Rx handlers */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003461 iwl3945_hw_rx_handler_setup(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003462}
3463
3464/**
Tomas Winkler91c066f2008-03-06 17:36:55 -08003465 * iwl3945_cmd_queue_reclaim - Reclaim CMD queue entries
3466 * When FW advances 'R' index, all entries between old and new 'R' index
3467 * need to be reclaimed.
3468 */
3469static void iwl3945_cmd_queue_reclaim(struct iwl3945_priv *priv,
3470 int txq_id, int index)
3471{
3472 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
3473 struct iwl3945_queue *q = &txq->q;
3474 int nfreed = 0;
3475
3476 if ((index >= q->n_bd) || (iwl3945_x2_queue_used(q, index) == 0)) {
3477 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3478 "is out of range [0-%d] %d %d.\n", txq_id,
3479 index, q->n_bd, q->write_ptr, q->read_ptr);
3480 return;
3481 }
3482
3483 for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
3484 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3485 if (nfreed > 1) {
3486 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
3487 q->write_ptr, q->read_ptr);
3488 queue_work(priv->workqueue, &priv->restart);
3489 break;
3490 }
3491 nfreed++;
3492 }
3493}
3494
3495
3496/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003497 * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
Zhu Yib481de92007-09-25 17:54:57 -07003498 * @rxb: Rx buffer to reclaim
3499 *
3500 * If an Rx buffer has an async callback associated with it the callback
3501 * will be executed. The attached skb (if present) will only be freed
3502 * if the callback returns 1
3503 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003504static void iwl3945_tx_cmd_complete(struct iwl3945_priv *priv,
3505 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003506{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003507 struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003508 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3509 int txq_id = SEQ_TO_QUEUE(sequence);
3510 int index = SEQ_TO_INDEX(sequence);
3511 int huge = sequence & SEQ_HUGE_FRAME;
3512 int cmd_index;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003513 struct iwl3945_cmd *cmd;
Zhu Yib481de92007-09-25 17:54:57 -07003514
Zhu Yib481de92007-09-25 17:54:57 -07003515 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3516
3517 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3518 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3519
3520 /* Input error checking is done when commands are added to queue. */
3521 if (cmd->meta.flags & CMD_WANT_SKB) {
3522 cmd->meta.source->u.skb = rxb->skb;
3523 rxb->skb = NULL;
3524 } else if (cmd->meta.u.callback &&
3525 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3526 rxb->skb = NULL;
3527
Tomas Winkler91c066f2008-03-06 17:36:55 -08003528 iwl3945_cmd_queue_reclaim(priv, txq_id, index);
Zhu Yib481de92007-09-25 17:54:57 -07003529
3530 if (!(cmd->meta.flags & CMD_ASYNC)) {
3531 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3532 wake_up_interruptible(&priv->wait_command_queue);
3533 }
3534}
3535
3536/************************** RX-FUNCTIONS ****************************/
3537/*
3538 * Rx theory of operation
3539 *
3540 * The host allocates 32 DMA target addresses and passes the host address
3541 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
3542 * 0 to 31
3543 *
3544 * Rx Queue Indexes
3545 * The host/firmware share two index registers for managing the Rx buffers.
3546 *
3547 * The READ index maps to the first position that the firmware may be writing
3548 * to -- the driver can read up to (but not including) this position and get
3549 * good data.
3550 * The READ index is managed by the firmware once the card is enabled.
3551 *
3552 * The WRITE index maps to the last position the driver has read from -- the
3553 * position preceding WRITE is the last slot the firmware can place a packet.
3554 *
3555 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3556 * WRITE = READ.
3557 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003558 * During initialization, the host sets up the READ queue position to the first
Zhu Yib481de92007-09-25 17:54:57 -07003559 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3560 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003561 * When the firmware places a packet in a buffer, it will advance the READ index
Zhu Yib481de92007-09-25 17:54:57 -07003562 * and fire the RX interrupt. The driver can then query the READ index and
3563 * process as many packets as possible, moving the WRITE index forward as it
3564 * resets the Rx queue buffers with new memory.
3565 *
3566 * The management in the driver is as follows:
3567 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3568 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
Ian Schram01ebd062007-10-25 17:15:22 +08003569 * to replenish the iwl->rxq->rx_free.
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003570 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
Zhu Yib481de92007-09-25 17:54:57 -07003571 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3572 * 'processed' and 'read' driver indexes as well)
3573 * + A received packet is processed and handed to the kernel network stack,
3574 * detached from the iwl->rxq. The driver 'processed' index is updated.
3575 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3576 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3577 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3578 * were enough free buffers and RX_STALLED is set it is cleared.
3579 *
3580 *
3581 * Driver sequence:
3582 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003583 * iwl3945_rx_queue_alloc() Allocates rx_free
3584 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003585 * iwl3945_rx_queue_restock
Ben Cahill9fbab512007-11-29 11:09:47 +08003586 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
Zhu Yib481de92007-09-25 17:54:57 -07003587 * queue, updates firmware pointers, and updates
3588 * the WRITE index. If insufficient rx_free buffers
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003589 * are available, schedules iwl3945_rx_replenish
Zhu Yib481de92007-09-25 17:54:57 -07003590 *
3591 * -- enable interrupts --
Ben Cahill9fbab512007-11-29 11:09:47 +08003592 * ISR - iwl3945_rx() Detach iwl3945_rx_mem_buffers from pool up to the
Zhu Yib481de92007-09-25 17:54:57 -07003593 * READ INDEX, detaching the SKB from the pool.
3594 * Moves the packet buffer from queue to rx_used.
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003595 * Calls iwl3945_rx_queue_restock to refill any empty
Zhu Yib481de92007-09-25 17:54:57 -07003596 * slots.
3597 * ...
3598 *
3599 */
3600
3601/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003602 * iwl3945_rx_queue_space - Return number of free slots available in queue.
Zhu Yib481de92007-09-25 17:54:57 -07003603 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003604static int iwl3945_rx_queue_space(const struct iwl3945_rx_queue *q)
Zhu Yib481de92007-09-25 17:54:57 -07003605{
3606 int s = q->read - q->write;
3607 if (s <= 0)
3608 s += RX_QUEUE_SIZE;
3609 /* keep some buffer to not confuse full and empty queue */
3610 s -= 2;
3611 if (s < 0)
3612 s = 0;
3613 return s;
3614}
3615
3616/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003617 * iwl3945_rx_queue_update_write_ptr - Update the write pointer for the RX queue
Zhu Yib481de92007-09-25 17:54:57 -07003618 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003619int iwl3945_rx_queue_update_write_ptr(struct iwl3945_priv *priv, struct iwl3945_rx_queue *q)
Zhu Yib481de92007-09-25 17:54:57 -07003620{
3621 u32 reg = 0;
3622 int rc = 0;
3623 unsigned long flags;
3624
3625 spin_lock_irqsave(&q->lock, flags);
3626
3627 if (q->need_update == 0)
3628 goto exit_unlock;
3629
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003630 /* If power-saving is in use, make sure device is awake */
Zhu Yib481de92007-09-25 17:54:57 -07003631 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003632 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
Zhu Yib481de92007-09-25 17:54:57 -07003633
3634 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003635 iwl3945_set_bit(priv, CSR_GP_CNTRL,
Zhu Yib481de92007-09-25 17:54:57 -07003636 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3637 goto exit_unlock;
3638 }
3639
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003640 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003641 if (rc)
3642 goto exit_unlock;
3643
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003644 /* Device expects a multiple of 8 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003645 iwl3945_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
Zhu Yib481de92007-09-25 17:54:57 -07003646 q->write & ~0x7);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003647 iwl3945_release_nic_access(priv);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003648
3649 /* Else device is assumed to be awake */
Zhu Yib481de92007-09-25 17:54:57 -07003650 } else
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003651 /* Device expects a multiple of 8 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003652 iwl3945_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
Zhu Yib481de92007-09-25 17:54:57 -07003653
3654
3655 q->need_update = 0;
3656
3657 exit_unlock:
3658 spin_unlock_irqrestore(&q->lock, flags);
3659 return rc;
3660}
3661
3662/**
Ben Cahill9fbab512007-11-29 11:09:47 +08003663 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
Zhu Yib481de92007-09-25 17:54:57 -07003664 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003665static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07003666 dma_addr_t dma_addr)
3667{
3668 return cpu_to_le32((u32)dma_addr);
3669}
3670
3671/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003672 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
Zhu Yib481de92007-09-25 17:54:57 -07003673 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003674 * If there are slots in the RX queue that need to be restocked,
Zhu Yib481de92007-09-25 17:54:57 -07003675 * and we have free pre-allocated buffers, fill the ranks as much
Ben Cahill9fbab512007-11-29 11:09:47 +08003676 * as we can, pulling from rx_free.
Zhu Yib481de92007-09-25 17:54:57 -07003677 *
3678 * This moves the 'write' index forward to catch up with 'processed', and
3679 * also updates the memory address in the firmware to reference the new
3680 * target buffer.
3681 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003682static int iwl3945_rx_queue_restock(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003683{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003684 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07003685 struct list_head *element;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003686 struct iwl3945_rx_mem_buffer *rxb;
Zhu Yib481de92007-09-25 17:54:57 -07003687 unsigned long flags;
3688 int write, rc;
3689
3690 spin_lock_irqsave(&rxq->lock, flags);
3691 write = rxq->write & ~0x7;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003692 while ((iwl3945_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003693 /* Get next free Rx buffer, remove from free list */
Zhu Yib481de92007-09-25 17:54:57 -07003694 element = rxq->rx_free.next;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003695 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
Zhu Yib481de92007-09-25 17:54:57 -07003696 list_del(element);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003697
3698 /* Point to Rx buffer via next RBD in circular buffer */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003699 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->dma_addr);
Zhu Yib481de92007-09-25 17:54:57 -07003700 rxq->queue[rxq->write] = rxb;
3701 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
3702 rxq->free_count--;
3703 }
3704 spin_unlock_irqrestore(&rxq->lock, flags);
3705 /* If the pre-allocated buffer pool is dropping low, schedule to
3706 * refill it */
3707 if (rxq->free_count <= RX_LOW_WATERMARK)
3708 queue_work(priv->workqueue, &priv->rx_replenish);
3709
3710
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003711 /* If we've added more space for the firmware to place data, tell it.
3712 * Increment device's write pointer in multiples of 8. */
Zhu Yib481de92007-09-25 17:54:57 -07003713 if ((write != (rxq->write & ~0x7))
3714 || (abs(rxq->write - rxq->read) > 7)) {
3715 spin_lock_irqsave(&rxq->lock, flags);
3716 rxq->need_update = 1;
3717 spin_unlock_irqrestore(&rxq->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003718 rc = iwl3945_rx_queue_update_write_ptr(priv, rxq);
Zhu Yib481de92007-09-25 17:54:57 -07003719 if (rc)
3720 return rc;
3721 }
3722
3723 return 0;
3724}
3725
3726/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003727 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
Zhu Yib481de92007-09-25 17:54:57 -07003728 *
3729 * When moving to rx_free an SKB is allocated for the slot.
3730 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003731 * Also restock the Rx queue via iwl3945_rx_queue_restock.
Ian Schram01ebd062007-10-25 17:15:22 +08003732 * This is called as a scheduled work item (except for during initialization)
Zhu Yib481de92007-09-25 17:54:57 -07003733 */
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08003734static void iwl3945_rx_allocate(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003735{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003736 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07003737 struct list_head *element;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003738 struct iwl3945_rx_mem_buffer *rxb;
Zhu Yib481de92007-09-25 17:54:57 -07003739 unsigned long flags;
3740 spin_lock_irqsave(&rxq->lock, flags);
3741 while (!list_empty(&rxq->rx_used)) {
3742 element = rxq->rx_used.next;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003743 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003744
3745 /* Alloc a new receive buffer */
Zhu Yib481de92007-09-25 17:54:57 -07003746 rxb->skb =
3747 alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
3748 if (!rxb->skb) {
3749 if (net_ratelimit())
3750 printk(KERN_CRIT DRV_NAME
3751 ": Can not allocate SKB buffers\n");
3752 /* We don't reschedule replenish work here -- we will
3753 * call the restock method and if it still needs
3754 * more buffers it will schedule replenish */
3755 break;
3756 }
Zhu Yi12342c42007-12-20 11:27:32 +08003757
3758 /* If radiotap head is required, reserve some headroom here.
3759 * The physical head count is a variable rx_stats->phy_count.
3760 * We reserve 4 bytes here. Plus these extra bytes, the
3761 * headroom of the physical head should be enough for the
3762 * radiotap head that iwl3945 supported. See iwl3945_rt.
3763 */
3764 skb_reserve(rxb->skb, 4);
3765
Zhu Yib481de92007-09-25 17:54:57 -07003766 priv->alloc_rxb_skb++;
3767 list_del(element);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003768
3769 /* Get physical address of RB/SKB */
Zhu Yib481de92007-09-25 17:54:57 -07003770 rxb->dma_addr =
3771 pci_map_single(priv->pci_dev, rxb->skb->data,
3772 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3773 list_add_tail(&rxb->list, &rxq->rx_free);
3774 rxq->free_count++;
3775 }
3776 spin_unlock_irqrestore(&rxq->lock, flags);
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08003777}
3778
3779/*
3780 * this should be called while priv->lock is locked
3781 */
Tomas Winkler4fd1f842007-12-05 20:59:58 +02003782static void __iwl3945_rx_replenish(void *data)
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08003783{
3784 struct iwl3945_priv *priv = data;
3785
3786 iwl3945_rx_allocate(priv);
3787 iwl3945_rx_queue_restock(priv);
3788}
3789
3790
3791void iwl3945_rx_replenish(void *data)
3792{
3793 struct iwl3945_priv *priv = data;
3794 unsigned long flags;
3795
3796 iwl3945_rx_allocate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003797
3798 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003799 iwl3945_rx_queue_restock(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003800 spin_unlock_irqrestore(&priv->lock, flags);
3801}
3802
3803/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
Ben Cahill9fbab512007-11-29 11:09:47 +08003804 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
Zhu Yib481de92007-09-25 17:54:57 -07003805 * This free routine walks the list of POOL entries and if SKB is set to
3806 * non NULL it is unmapped and freed
3807 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003808static void iwl3945_rx_queue_free(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
Zhu Yib481de92007-09-25 17:54:57 -07003809{
3810 int i;
3811 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
3812 if (rxq->pool[i].skb != NULL) {
3813 pci_unmap_single(priv->pci_dev,
3814 rxq->pool[i].dma_addr,
3815 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3816 dev_kfree_skb(rxq->pool[i].skb);
3817 }
3818 }
3819
3820 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
3821 rxq->dma_addr);
3822 rxq->bd = NULL;
3823}
3824
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003825int iwl3945_rx_queue_alloc(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003826{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003827 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07003828 struct pci_dev *dev = priv->pci_dev;
3829 int i;
3830
3831 spin_lock_init(&rxq->lock);
3832 INIT_LIST_HEAD(&rxq->rx_free);
3833 INIT_LIST_HEAD(&rxq->rx_used);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003834
3835 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
Zhu Yib481de92007-09-25 17:54:57 -07003836 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
3837 if (!rxq->bd)
3838 return -ENOMEM;
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003839
Zhu Yib481de92007-09-25 17:54:57 -07003840 /* Fill the rx_used queue with _all_ of the Rx buffers */
3841 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
3842 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003843
Zhu Yib481de92007-09-25 17:54:57 -07003844 /* Set us so that we have processed and used all buffers, but have
3845 * not restocked the Rx queue with fresh buffers */
3846 rxq->read = rxq->write = 0;
3847 rxq->free_count = 0;
3848 rxq->need_update = 0;
3849 return 0;
3850}
3851
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003852void iwl3945_rx_queue_reset(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
Zhu Yib481de92007-09-25 17:54:57 -07003853{
3854 unsigned long flags;
3855 int i;
3856 spin_lock_irqsave(&rxq->lock, flags);
3857 INIT_LIST_HEAD(&rxq->rx_free);
3858 INIT_LIST_HEAD(&rxq->rx_used);
3859 /* Fill the rx_used queue with _all_ of the Rx buffers */
3860 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
3861 /* In the reset function, these buffers may have been allocated
3862 * to an SKB, so we need to unmap and free potential storage */
3863 if (rxq->pool[i].skb != NULL) {
3864 pci_unmap_single(priv->pci_dev,
3865 rxq->pool[i].dma_addr,
3866 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3867 priv->alloc_rxb_skb--;
3868 dev_kfree_skb(rxq->pool[i].skb);
3869 rxq->pool[i].skb = NULL;
3870 }
3871 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3872 }
3873
3874 /* Set us so that we have processed and used all buffers, but have
3875 * not restocked the Rx queue with fresh buffers */
3876 rxq->read = rxq->write = 0;
3877 rxq->free_count = 0;
3878 spin_unlock_irqrestore(&rxq->lock, flags);
3879}
3880
3881/* Convert linear signal-to-noise ratio into dB */
3882static u8 ratio2dB[100] = {
3883/* 0 1 2 3 4 5 6 7 8 9 */
3884 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
3885 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
3886 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
3887 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
3888 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
3889 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
3890 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
3891 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
3892 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
3893 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
3894};
3895
3896/* Calculates a relative dB value from a ratio of linear
3897 * (i.e. not dB) signal levels.
3898 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003899int iwl3945_calc_db_from_ratio(int sig_ratio)
Zhu Yib481de92007-09-25 17:54:57 -07003900{
Adrian Bunk221c80c2008-02-02 23:19:01 +02003901 /* 1000:1 or higher just report as 60 dB */
3902 if (sig_ratio >= 1000)
Zhu Yib481de92007-09-25 17:54:57 -07003903 return 60;
3904
Adrian Bunk221c80c2008-02-02 23:19:01 +02003905 /* 100:1 or higher, divide by 10 and use table,
Zhu Yib481de92007-09-25 17:54:57 -07003906 * add 20 dB to make up for divide by 10 */
Adrian Bunk221c80c2008-02-02 23:19:01 +02003907 if (sig_ratio >= 100)
Zhu Yib481de92007-09-25 17:54:57 -07003908 return (20 + (int)ratio2dB[sig_ratio/10]);
3909
3910 /* We shouldn't see this */
3911 if (sig_ratio < 1)
3912 return 0;
3913
3914 /* Use table for ratios 1:1 - 99:1 */
3915 return (int)ratio2dB[sig_ratio];
3916}
3917
3918#define PERFECT_RSSI (-20) /* dBm */
3919#define WORST_RSSI (-95) /* dBm */
3920#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
3921
3922/* Calculate an indication of rx signal quality (a percentage, not dBm!).
3923 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
3924 * about formulas used below. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003925int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
Zhu Yib481de92007-09-25 17:54:57 -07003926{
3927 int sig_qual;
3928 int degradation = PERFECT_RSSI - rssi_dbm;
3929
3930 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
3931 * as indicator; formula is (signal dbm - noise dbm).
3932 * SNR at or above 40 is a great signal (100%).
3933 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
3934 * Weakest usable signal is usually 10 - 15 dB SNR. */
3935 if (noise_dbm) {
3936 if (rssi_dbm - noise_dbm >= 40)
3937 return 100;
3938 else if (rssi_dbm < noise_dbm)
3939 return 0;
3940 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
3941
3942 /* Else use just the signal level.
3943 * This formula is a least squares fit of data points collected and
3944 * compared with a reference system that had a percentage (%) display
3945 * for signal quality. */
3946 } else
3947 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
3948 (15 * RSSI_RANGE + 62 * degradation)) /
3949 (RSSI_RANGE * RSSI_RANGE);
3950
3951 if (sig_qual > 100)
3952 sig_qual = 100;
3953 else if (sig_qual < 1)
3954 sig_qual = 0;
3955
3956 return sig_qual;
3957}
3958
3959/**
Ben Cahill9fbab512007-11-29 11:09:47 +08003960 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
Zhu Yib481de92007-09-25 17:54:57 -07003961 *
3962 * Uses the priv->rx_handlers callback function array to invoke
3963 * the appropriate handlers, including command responses,
3964 * frame-received notifications, and other notifications.
3965 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003966static void iwl3945_rx_handle(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003967{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003968 struct iwl3945_rx_mem_buffer *rxb;
3969 struct iwl3945_rx_packet *pkt;
3970 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07003971 u32 r, i;
3972 int reclaim;
3973 unsigned long flags;
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08003974 u8 fill_rx = 0;
Mohamed Abbasd68ab682008-02-07 13:16:33 -08003975 u32 count = 8;
Zhu Yib481de92007-09-25 17:54:57 -07003976
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003977 /* uCode's read index (stored in shared DRAM) indicates the last Rx
3978 * buffer that the driver may process (last buffer filled by ucode). */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003979 r = iwl3945_hw_get_rx_read(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003980 i = rxq->read;
3981
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08003982 if (iwl3945_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
3983 fill_rx = 1;
Zhu Yib481de92007-09-25 17:54:57 -07003984 /* Rx interrupt, but nothing sent from uCode */
3985 if (i == r)
3986 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
3987
3988 while (i != r) {
3989 rxb = rxq->queue[i];
3990
Ben Cahill9fbab512007-11-29 11:09:47 +08003991 /* If an RXB doesn't have a Rx queue slot associated with it,
Zhu Yib481de92007-09-25 17:54:57 -07003992 * then a bug has been introduced in the queue refilling
3993 * routines -- catch it here */
3994 BUG_ON(rxb == NULL);
3995
3996 rxq->queue[i] = NULL;
3997
3998 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
3999 IWL_RX_BUF_SIZE,
4000 PCI_DMA_FROMDEVICE);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004001 pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07004002
4003 /* Reclaim a command buffer only if this packet is a response
4004 * to a (driver-originated) command.
4005 * If the packet (e.g. Rx frame) originated from uCode,
4006 * there is no command buffer to reclaim.
4007 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
4008 * but apparently a few don't get set; catch them here. */
4009 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
4010 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
4011 (pkt->hdr.cmd != REPLY_TX);
4012
4013 /* Based on type of command response or notification,
4014 * handle those that need handling via function in
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004015 * rx_handlers table. See iwl3945_setup_rx_handlers() */
Zhu Yib481de92007-09-25 17:54:57 -07004016 if (priv->rx_handlers[pkt->hdr.cmd]) {
4017 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4018 "r = %d, i = %d, %s, 0x%02x\n", r, i,
4019 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4020 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
4021 } else {
4022 /* No handling needed */
4023 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4024 "r %d i %d No handler needed for %s, 0x%02x\n",
4025 r, i, get_cmd_string(pkt->hdr.cmd),
4026 pkt->hdr.cmd);
4027 }
4028
4029 if (reclaim) {
Ben Cahill9fbab512007-11-29 11:09:47 +08004030 /* Invoke any callbacks, transfer the skb to caller, and
4031 * fire off the (possibly) blocking iwl3945_send_cmd()
Zhu Yib481de92007-09-25 17:54:57 -07004032 * as we reclaim the driver command queue */
4033 if (rxb && rxb->skb)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004034 iwl3945_tx_cmd_complete(priv, rxb);
Zhu Yib481de92007-09-25 17:54:57 -07004035 else
4036 IWL_WARNING("Claim null rxb?\n");
4037 }
4038
4039 /* For now we just don't re-use anything. We can tweak this
4040 * later to try and re-use notification packets and SKBs that
4041 * fail to Rx correctly */
4042 if (rxb->skb != NULL) {
4043 priv->alloc_rxb_skb--;
4044 dev_kfree_skb_any(rxb->skb);
4045 rxb->skb = NULL;
4046 }
4047
4048 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
4049 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4050 spin_lock_irqsave(&rxq->lock, flags);
4051 list_add_tail(&rxb->list, &priv->rxq.rx_used);
4052 spin_unlock_irqrestore(&rxq->lock, flags);
4053 i = (i + 1) & RX_QUEUE_MASK;
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08004054 /* If there are a lot of unused frames,
4055 * restock the Rx queue so ucode won't assert. */
4056 if (fill_rx) {
4057 count++;
4058 if (count >= 8) {
4059 priv->rxq.read = i;
4060 __iwl3945_rx_replenish(priv);
4061 count = 0;
4062 }
4063 }
Zhu Yib481de92007-09-25 17:54:57 -07004064 }
4065
4066 /* Backtrack one entry */
4067 priv->rxq.read = i;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004068 iwl3945_rx_queue_restock(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004069}
4070
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004071/**
4072 * iwl3945_tx_queue_update_write_ptr - Send new write index to hardware
4073 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004074static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
4075 struct iwl3945_tx_queue *txq)
Zhu Yib481de92007-09-25 17:54:57 -07004076{
4077 u32 reg = 0;
4078 int rc = 0;
4079 int txq_id = txq->q.id;
4080
4081 if (txq->need_update == 0)
4082 return rc;
4083
4084 /* if we're trying to save power */
4085 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4086 /* wake up nic if it's powered down ...
4087 * uCode will wake up, and interrupt us again, so next
4088 * time we'll skip this part. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004089 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
Zhu Yib481de92007-09-25 17:54:57 -07004090
4091 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4092 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004093 iwl3945_set_bit(priv, CSR_GP_CNTRL,
Zhu Yib481de92007-09-25 17:54:57 -07004094 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4095 return rc;
4096 }
4097
4098 /* restore this queue's parameters in nic hardware. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004099 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004100 if (rc)
4101 return rc;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004102 iwl3945_write_direct32(priv, HBUS_TARG_WRPTR,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08004103 txq->q.write_ptr | (txq_id << 8));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004104 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004105
4106 /* else not in power-save mode, uCode will never sleep when we're
4107 * trying to tx (during RFKILL, we're not trying to tx). */
4108 } else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004109 iwl3945_write32(priv, HBUS_TARG_WRPTR,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08004110 txq->q.write_ptr | (txq_id << 8));
Zhu Yib481de92007-09-25 17:54:57 -07004111
4112 txq->need_update = 0;
4113
4114 return rc;
4115}
4116
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004117#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004118static void iwl3945_print_rx_config_cmd(struct iwl3945_rxon_cmd *rxon)
Zhu Yib481de92007-09-25 17:54:57 -07004119{
Joe Perches0795af52007-10-03 17:59:30 -07004120 DECLARE_MAC_BUF(mac);
4121
Zhu Yib481de92007-09-25 17:54:57 -07004122 IWL_DEBUG_RADIO("RX CONFIG:\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004123 iwl3945_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
Zhu Yib481de92007-09-25 17:54:57 -07004124 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4125 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4126 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
4127 le32_to_cpu(rxon->filter_flags));
4128 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4129 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
4130 rxon->ofdm_basic_rates);
4131 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
Joe Perches0795af52007-10-03 17:59:30 -07004132 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
4133 print_mac(mac, rxon->node_addr));
4134 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
4135 print_mac(mac, rxon->bssid_addr));
Zhu Yib481de92007-09-25 17:54:57 -07004136 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4137}
4138#endif
4139
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004140static void iwl3945_enable_interrupts(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004141{
4142 IWL_DEBUG_ISR("Enabling interrupts\n");
4143 set_bit(STATUS_INT_ENABLED, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004144 iwl3945_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
Zhu Yib481de92007-09-25 17:54:57 -07004145}
4146
Mohamed Abbas0359fac2008-03-28 16:21:08 -07004147
4148/* call this function to flush any scheduled tasklet */
4149static inline void iwl_synchronize_irq(struct iwl3945_priv *priv)
4150{
4151 /* wait to make sure we flush pedding tasklet*/
4152 synchronize_irq(priv->pci_dev->irq);
4153 tasklet_kill(&priv->irq_tasklet);
4154}
4155
4156
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004157static inline void iwl3945_disable_interrupts(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004158{
4159 clear_bit(STATUS_INT_ENABLED, &priv->status);
4160
4161 /* disable interrupts from uCode/NIC to host */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004162 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
Zhu Yib481de92007-09-25 17:54:57 -07004163
4164 /* acknowledge/clear/reset any interrupts still pending
4165 * from uCode or flow handler (Rx/Tx DMA) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004166 iwl3945_write32(priv, CSR_INT, 0xffffffff);
4167 iwl3945_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
Zhu Yib481de92007-09-25 17:54:57 -07004168 IWL_DEBUG_ISR("Disabled interrupts\n");
4169}
4170
4171static const char *desc_lookup(int i)
4172{
4173 switch (i) {
4174 case 1:
4175 return "FAIL";
4176 case 2:
4177 return "BAD_PARAM";
4178 case 3:
4179 return "BAD_CHECKSUM";
4180 case 4:
4181 return "NMI_INTERRUPT";
4182 case 5:
4183 return "SYSASSERT";
4184 case 6:
4185 return "FATAL_ERROR";
4186 }
4187
4188 return "UNKNOWN";
4189}
4190
4191#define ERROR_START_OFFSET (1 * sizeof(u32))
4192#define ERROR_ELEM_SIZE (7 * sizeof(u32))
4193
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004194static void iwl3945_dump_nic_error_log(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004195{
4196 u32 i;
4197 u32 desc, time, count, base, data1;
4198 u32 blink1, blink2, ilink1, ilink2;
4199 int rc;
4200
4201 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4202
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004203 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
Zhu Yib481de92007-09-25 17:54:57 -07004204 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4205 return;
4206 }
4207
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004208 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004209 if (rc) {
4210 IWL_WARNING("Can not read from adapter at this time.\n");
4211 return;
4212 }
4213
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004214 count = iwl3945_read_targ_mem(priv, base);
Zhu Yib481de92007-09-25 17:54:57 -07004215
4216 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4217 IWL_ERROR("Start IWL Error Log Dump:\n");
Tomas Winkler2acae162008-03-02 01:25:59 +02004218 IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
Zhu Yib481de92007-09-25 17:54:57 -07004219 }
4220
4221 IWL_ERROR("Desc Time asrtPC blink2 "
4222 "ilink1 nmiPC Line\n");
4223 for (i = ERROR_START_OFFSET;
4224 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
4225 i += ERROR_ELEM_SIZE) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004226 desc = iwl3945_read_targ_mem(priv, base + i);
Zhu Yib481de92007-09-25 17:54:57 -07004227 time =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004228 iwl3945_read_targ_mem(priv, base + i + 1 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004229 blink1 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004230 iwl3945_read_targ_mem(priv, base + i + 2 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004231 blink2 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004232 iwl3945_read_targ_mem(priv, base + i + 3 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004233 ilink1 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004234 iwl3945_read_targ_mem(priv, base + i + 4 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004235 ilink2 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004236 iwl3945_read_targ_mem(priv, base + i + 5 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004237 data1 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004238 iwl3945_read_targ_mem(priv, base + i + 6 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004239
4240 IWL_ERROR
4241 ("%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
4242 desc_lookup(desc), desc, time, blink1, blink2,
4243 ilink1, ilink2, data1);
4244 }
4245
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004246 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004247
4248}
4249
Ben Cahillf58177b2007-11-29 11:09:43 +08004250#define EVENT_START_OFFSET (6 * sizeof(u32))
Zhu Yib481de92007-09-25 17:54:57 -07004251
4252/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004253 * iwl3945_print_event_log - Dump error event log to syslog
Zhu Yib481de92007-09-25 17:54:57 -07004254 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004255 * NOTE: Must be called with iwl3945_grab_nic_access() already obtained!
Zhu Yib481de92007-09-25 17:54:57 -07004256 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004257static void iwl3945_print_event_log(struct iwl3945_priv *priv, u32 start_idx,
Zhu Yib481de92007-09-25 17:54:57 -07004258 u32 num_events, u32 mode)
4259{
4260 u32 i;
4261 u32 base; /* SRAM byte address of event log header */
4262 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4263 u32 ptr; /* SRAM byte address of log data */
4264 u32 ev, time, data; /* event log data */
4265
4266 if (num_events == 0)
4267 return;
4268
4269 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4270
4271 if (mode == 0)
4272 event_size = 2 * sizeof(u32);
4273 else
4274 event_size = 3 * sizeof(u32);
4275
4276 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4277
4278 /* "time" is actually "data" for mode 0 (no timestamp).
4279 * place event id # at far right for easier visual parsing. */
4280 for (i = 0; i < num_events; i++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004281 ev = iwl3945_read_targ_mem(priv, ptr);
Zhu Yib481de92007-09-25 17:54:57 -07004282 ptr += sizeof(u32);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004283 time = iwl3945_read_targ_mem(priv, ptr);
Zhu Yib481de92007-09-25 17:54:57 -07004284 ptr += sizeof(u32);
4285 if (mode == 0)
4286 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4287 else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004288 data = iwl3945_read_targ_mem(priv, ptr);
Zhu Yib481de92007-09-25 17:54:57 -07004289 ptr += sizeof(u32);
4290 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4291 }
4292 }
4293}
4294
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004295static void iwl3945_dump_nic_event_log(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004296{
4297 int rc;
4298 u32 base; /* SRAM byte address of event log header */
4299 u32 capacity; /* event log capacity in # entries */
4300 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4301 u32 num_wraps; /* # times uCode wrapped to top of log */
4302 u32 next_entry; /* index of next entry to be written by uCode */
4303 u32 size; /* # entries that we'll print */
4304
4305 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004306 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
Zhu Yib481de92007-09-25 17:54:57 -07004307 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4308 return;
4309 }
4310
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004311 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004312 if (rc) {
4313 IWL_WARNING("Can not read from adapter at this time.\n");
4314 return;
4315 }
4316
4317 /* event log header */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004318 capacity = iwl3945_read_targ_mem(priv, base);
4319 mode = iwl3945_read_targ_mem(priv, base + (1 * sizeof(u32)));
4320 num_wraps = iwl3945_read_targ_mem(priv, base + (2 * sizeof(u32)));
4321 next_entry = iwl3945_read_targ_mem(priv, base + (3 * sizeof(u32)));
Zhu Yib481de92007-09-25 17:54:57 -07004322
4323 size = num_wraps ? capacity : next_entry;
4324
4325 /* bail out if nothing in log */
4326 if (size == 0) {
Zhu Yi583fab32007-09-27 11:27:30 +08004327 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004328 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004329 return;
4330 }
4331
Zhu Yi583fab32007-09-27 11:27:30 +08004332 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
Zhu Yib481de92007-09-25 17:54:57 -07004333 size, num_wraps);
4334
4335 /* if uCode has wrapped back to top of log, start at the oldest entry,
4336 * i.e the next one that uCode would fill. */
4337 if (num_wraps)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004338 iwl3945_print_event_log(priv, next_entry,
Zhu Yib481de92007-09-25 17:54:57 -07004339 capacity - next_entry, mode);
4340
4341 /* (then/else) start at top of log */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004342 iwl3945_print_event_log(priv, 0, next_entry, mode);
Zhu Yib481de92007-09-25 17:54:57 -07004343
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004344 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004345}
4346
4347/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004348 * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
Zhu Yib481de92007-09-25 17:54:57 -07004349 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004350static void iwl3945_irq_handle_error(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004351{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004352 /* Set the FW error flag -- cleared on iwl3945_down */
Zhu Yib481de92007-09-25 17:54:57 -07004353 set_bit(STATUS_FW_ERROR, &priv->status);
4354
4355 /* Cancel currently queued command. */
4356 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4357
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004358#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004359 if (iwl3945_debug_level & IWL_DL_FW_ERRORS) {
4360 iwl3945_dump_nic_error_log(priv);
4361 iwl3945_dump_nic_event_log(priv);
4362 iwl3945_print_rx_config_cmd(&priv->staging_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07004363 }
4364#endif
4365
4366 wake_up_interruptible(&priv->wait_command_queue);
4367
4368 /* Keep the restart process from trying to send host
4369 * commands by clearing the INIT status bit */
4370 clear_bit(STATUS_READY, &priv->status);
4371
4372 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4373 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4374 "Restarting adapter due to uCode error.\n");
4375
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004376 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07004377 memcpy(&priv->recovery_rxon, &priv->active_rxon,
4378 sizeof(priv->recovery_rxon));
4379 priv->error_recovering = 1;
4380 }
4381 queue_work(priv->workqueue, &priv->restart);
4382 }
4383}
4384
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004385static void iwl3945_error_recovery(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004386{
4387 unsigned long flags;
4388
4389 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
4390 sizeof(priv->staging_rxon));
4391 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004392 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004393
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004394 iwl3945_add_station(priv, priv->bssid, 1, 0);
Zhu Yib481de92007-09-25 17:54:57 -07004395
4396 spin_lock_irqsave(&priv->lock, flags);
4397 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
4398 priv->error_recovering = 0;
4399 spin_unlock_irqrestore(&priv->lock, flags);
4400}
4401
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004402static void iwl3945_irq_tasklet(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004403{
4404 u32 inta, handled = 0;
4405 u32 inta_fh;
4406 unsigned long flags;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004407#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07004408 u32 inta_mask;
4409#endif
4410
4411 spin_lock_irqsave(&priv->lock, flags);
4412
4413 /* Ack/clear/reset pending uCode interrupts.
4414 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4415 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004416 inta = iwl3945_read32(priv, CSR_INT);
4417 iwl3945_write32(priv, CSR_INT, inta);
Zhu Yib481de92007-09-25 17:54:57 -07004418
4419 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4420 * Any new interrupts that happen after this, either while we're
4421 * in this tasklet, or later, will show up in next ISR/tasklet. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004422 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4423 iwl3945_write32(priv, CSR_FH_INT_STATUS, inta_fh);
Zhu Yib481de92007-09-25 17:54:57 -07004424
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004425#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004426 if (iwl3945_debug_level & IWL_DL_ISR) {
Ben Cahill9fbab512007-11-29 11:09:47 +08004427 /* just for debug */
4428 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
Zhu Yib481de92007-09-25 17:54:57 -07004429 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4430 inta, inta_mask, inta_fh);
4431 }
4432#endif
4433
4434 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4435 * atomic, make sure that inta covers all the interrupts that
4436 * we've discovered, even if FH interrupt came in just after
4437 * reading CSR_INT. */
Tomas Winkler6f83eaa2008-03-04 18:09:28 -08004438 if (inta_fh & CSR39_FH_INT_RX_MASK)
Zhu Yib481de92007-09-25 17:54:57 -07004439 inta |= CSR_INT_BIT_FH_RX;
Tomas Winkler6f83eaa2008-03-04 18:09:28 -08004440 if (inta_fh & CSR39_FH_INT_TX_MASK)
Zhu Yib481de92007-09-25 17:54:57 -07004441 inta |= CSR_INT_BIT_FH_TX;
4442
4443 /* Now service all interrupt bits discovered above. */
4444 if (inta & CSR_INT_BIT_HW_ERR) {
4445 IWL_ERROR("Microcode HW error detected. Restarting.\n");
4446
4447 /* Tell the device to stop sending interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004448 iwl3945_disable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004449
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004450 iwl3945_irq_handle_error(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004451
4452 handled |= CSR_INT_BIT_HW_ERR;
4453
4454 spin_unlock_irqrestore(&priv->lock, flags);
4455
4456 return;
4457 }
4458
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004459#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004460 if (iwl3945_debug_level & (IWL_DL_ISR)) {
Zhu Yib481de92007-09-25 17:54:57 -07004461 /* NIC fires this, but we don't use it, redundant with WAKEUP */
Joonwoo Park25c03d82008-01-23 10:15:20 -08004462 if (inta & CSR_INT_BIT_SCD)
4463 IWL_DEBUG_ISR("Scheduler finished to transmit "
4464 "the frame/frames.\n");
Zhu Yib481de92007-09-25 17:54:57 -07004465
4466 /* Alive notification via Rx interrupt will do the real work */
4467 if (inta & CSR_INT_BIT_ALIVE)
4468 IWL_DEBUG_ISR("Alive interrupt\n");
4469 }
4470#endif
4471 /* Safely ignore these bits for debug checks below */
Joonwoo Park25c03d82008-01-23 10:15:20 -08004472 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
Zhu Yib481de92007-09-25 17:54:57 -07004473
4474 /* HW RF KILL switch toggled (4965 only) */
4475 if (inta & CSR_INT_BIT_RF_KILL) {
4476 int hw_rf_kill = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004477 if (!(iwl3945_read32(priv, CSR_GP_CNTRL) &
Zhu Yib481de92007-09-25 17:54:57 -07004478 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4479 hw_rf_kill = 1;
4480
4481 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
4482 "RF_KILL bit toggled to %s.\n",
4483 hw_rf_kill ? "disable radio":"enable radio");
4484
4485 /* Queue restart only if RF_KILL switch was set to "kill"
4486 * when we loaded driver, and is now set to "enable".
4487 * After we're Alive, RF_KILL gets handled by
Reinette Chatre32304552008-02-15 14:34:37 -08004488 * iwl3945_rx_card_state_notif() */
Zhu Yi53e49092007-12-06 16:08:44 +08004489 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
4490 clear_bit(STATUS_RF_KILL_HW, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -07004491 queue_work(priv->workqueue, &priv->restart);
Zhu Yi53e49092007-12-06 16:08:44 +08004492 }
Zhu Yib481de92007-09-25 17:54:57 -07004493
4494 handled |= CSR_INT_BIT_RF_KILL;
4495 }
4496
4497 /* Chip got too hot and stopped itself (4965 only) */
4498 if (inta & CSR_INT_BIT_CT_KILL) {
4499 IWL_ERROR("Microcode CT kill error detected.\n");
4500 handled |= CSR_INT_BIT_CT_KILL;
4501 }
4502
4503 /* Error detected by uCode */
4504 if (inta & CSR_INT_BIT_SW_ERR) {
4505 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
4506 inta);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004507 iwl3945_irq_handle_error(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004508 handled |= CSR_INT_BIT_SW_ERR;
4509 }
4510
4511 /* uCode wakes up after power-down sleep */
4512 if (inta & CSR_INT_BIT_WAKEUP) {
4513 IWL_DEBUG_ISR("Wakeup interrupt\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004514 iwl3945_rx_queue_update_write_ptr(priv, &priv->rxq);
4515 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[0]);
4516 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[1]);
4517 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[2]);
4518 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[3]);
4519 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[4]);
4520 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[5]);
Zhu Yib481de92007-09-25 17:54:57 -07004521
4522 handled |= CSR_INT_BIT_WAKEUP;
4523 }
4524
4525 /* All uCode command responses, including Tx command responses,
4526 * Rx "responses" (frame-received notification), and other
4527 * notifications from uCode come through here*/
4528 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004529 iwl3945_rx_handle(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004530 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4531 }
4532
4533 if (inta & CSR_INT_BIT_FH_TX) {
4534 IWL_DEBUG_ISR("Tx interrupt\n");
4535
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004536 iwl3945_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
4537 if (!iwl3945_grab_nic_access(priv)) {
4538 iwl3945_write_direct32(priv,
Zhu Yib481de92007-09-25 17:54:57 -07004539 FH_TCSR_CREDIT
4540 (ALM_FH_SRVC_CHNL), 0x0);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004541 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004542 }
4543 handled |= CSR_INT_BIT_FH_TX;
4544 }
4545
4546 if (inta & ~handled)
4547 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4548
4549 if (inta & ~CSR_INI_SET_MASK) {
4550 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
4551 inta & ~CSR_INI_SET_MASK);
4552 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
4553 }
4554
4555 /* Re-enable all interrupts */
Mohamed Abbas0359fac2008-03-28 16:21:08 -07004556 /* only Re-enable if disabled by irq */
4557 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4558 iwl3945_enable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004559
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004560#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004561 if (iwl3945_debug_level & (IWL_DL_ISR)) {
4562 inta = iwl3945_read32(priv, CSR_INT);
4563 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
4564 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
Zhu Yib481de92007-09-25 17:54:57 -07004565 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4566 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4567 }
4568#endif
4569 spin_unlock_irqrestore(&priv->lock, flags);
4570}
4571
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004572static irqreturn_t iwl3945_isr(int irq, void *data)
Zhu Yib481de92007-09-25 17:54:57 -07004573{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004574 struct iwl3945_priv *priv = data;
Zhu Yib481de92007-09-25 17:54:57 -07004575 u32 inta, inta_mask;
4576 u32 inta_fh;
4577 if (!priv)
4578 return IRQ_NONE;
4579
4580 spin_lock(&priv->lock);
4581
4582 /* Disable (but don't clear!) interrupts here to avoid
4583 * back-to-back ISRs and sporadic interrupts from our NIC.
4584 * If we have something to service, the tasklet will re-enable ints.
4585 * If we *don't* have something, we'll re-enable before leaving here. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004586 inta_mask = iwl3945_read32(priv, CSR_INT_MASK); /* just for debug */
4587 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
Zhu Yib481de92007-09-25 17:54:57 -07004588
4589 /* Discover which interrupts are active/pending */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004590 inta = iwl3945_read32(priv, CSR_INT);
4591 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
Zhu Yib481de92007-09-25 17:54:57 -07004592
4593 /* Ignore interrupt if there's nothing in NIC to service.
4594 * This may be due to IRQ shared with another device,
4595 * or due to sporadic interrupts thrown from our NIC. */
4596 if (!inta && !inta_fh) {
4597 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4598 goto none;
4599 }
4600
4601 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
4602 /* Hardware disappeared */
4603 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
Oliver Neukumcb4da1a2007-11-13 21:10:32 -08004604 goto unplugged;
Zhu Yib481de92007-09-25 17:54:57 -07004605 }
4606
4607 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4608 inta, inta_mask, inta_fh);
4609
Joonwoo Park25c03d82008-01-23 10:15:20 -08004610 inta &= ~CSR_INT_BIT_SCD;
4611
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004612 /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
Joonwoo Park25c03d82008-01-23 10:15:20 -08004613 if (likely(inta || inta_fh))
4614 tasklet_schedule(&priv->irq_tasklet);
Oliver Neukumcb4da1a2007-11-13 21:10:32 -08004615unplugged:
Zhu Yib481de92007-09-25 17:54:57 -07004616 spin_unlock(&priv->lock);
4617
4618 return IRQ_HANDLED;
4619
4620 none:
4621 /* re-enable interrupts here since we don't have anything to service. */
Mohamed Abbas0359fac2008-03-28 16:21:08 -07004622 /* only Re-enable if disabled by irq */
4623 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4624 iwl3945_enable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004625 spin_unlock(&priv->lock);
4626 return IRQ_NONE;
4627}
4628
4629/************************** EEPROM BANDS ****************************
4630 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004631 * The iwl3945_eeprom_band definitions below provide the mapping from the
Zhu Yib481de92007-09-25 17:54:57 -07004632 * EEPROM contents to the specific channel number supported for each
4633 * band.
4634 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004635 * For example, iwl3945_priv->eeprom.band_3_channels[4] from the band_3
Zhu Yib481de92007-09-25 17:54:57 -07004636 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
4637 * The specific geography and calibration information for that channel
4638 * is contained in the eeprom map itself.
4639 *
4640 * During init, we copy the eeprom information and channel map
4641 * information into priv->channel_info_24/52 and priv->channel_map_24/52
4642 *
4643 * channel_map_24/52 provides the index in the channel_info array for a
4644 * given channel. We have to have two separate maps as there is channel
4645 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
4646 * band_2
4647 *
4648 * A value of 0xff stored in the channel_map indicates that the channel
4649 * is not supported by the hardware at all.
4650 *
4651 * A value of 0xfe in the channel_map indicates that the channel is not
4652 * valid for Tx with the current hardware. This means that
4653 * while the system can tune and receive on a given channel, it may not
4654 * be able to associate or transmit any frames on that
4655 * channel. There is no corresponding channel information for that
4656 * entry.
4657 *
4658 *********************************************************************/
4659
4660/* 2.4 GHz */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004661static const u8 iwl3945_eeprom_band_1[14] = {
Zhu Yib481de92007-09-25 17:54:57 -07004662 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
4663};
4664
4665/* 5.2 GHz bands */
Ben Cahill9fbab512007-11-29 11:09:47 +08004666static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
Zhu Yib481de92007-09-25 17:54:57 -07004667 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
4668};
4669
Ben Cahill9fbab512007-11-29 11:09:47 +08004670static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
Zhu Yib481de92007-09-25 17:54:57 -07004671 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
4672};
4673
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004674static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
Zhu Yib481de92007-09-25 17:54:57 -07004675 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
4676};
4677
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004678static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
Zhu Yib481de92007-09-25 17:54:57 -07004679 145, 149, 153, 157, 161, 165
4680};
4681
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004682static void iwl3945_init_band_reference(const struct iwl3945_priv *priv, int band,
Zhu Yib481de92007-09-25 17:54:57 -07004683 int *eeprom_ch_count,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004684 const struct iwl3945_eeprom_channel
Zhu Yib481de92007-09-25 17:54:57 -07004685 **eeprom_ch_info,
4686 const u8 **eeprom_ch_index)
4687{
4688 switch (band) {
4689 case 1: /* 2.4GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004690 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
Zhu Yib481de92007-09-25 17:54:57 -07004691 *eeprom_ch_info = priv->eeprom.band_1_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004692 *eeprom_ch_index = iwl3945_eeprom_band_1;
Zhu Yib481de92007-09-25 17:54:57 -07004693 break;
Ben Cahill9fbab512007-11-29 11:09:47 +08004694 case 2: /* 4.9GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004695 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
Zhu Yib481de92007-09-25 17:54:57 -07004696 *eeprom_ch_info = priv->eeprom.band_2_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004697 *eeprom_ch_index = iwl3945_eeprom_band_2;
Zhu Yib481de92007-09-25 17:54:57 -07004698 break;
4699 case 3: /* 5.2GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004700 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
Zhu Yib481de92007-09-25 17:54:57 -07004701 *eeprom_ch_info = priv->eeprom.band_3_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004702 *eeprom_ch_index = iwl3945_eeprom_band_3;
Zhu Yib481de92007-09-25 17:54:57 -07004703 break;
Ben Cahill9fbab512007-11-29 11:09:47 +08004704 case 4: /* 5.5GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004705 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
Zhu Yib481de92007-09-25 17:54:57 -07004706 *eeprom_ch_info = priv->eeprom.band_4_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004707 *eeprom_ch_index = iwl3945_eeprom_band_4;
Zhu Yib481de92007-09-25 17:54:57 -07004708 break;
Ben Cahill9fbab512007-11-29 11:09:47 +08004709 case 5: /* 5.7GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004710 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
Zhu Yib481de92007-09-25 17:54:57 -07004711 *eeprom_ch_info = priv->eeprom.band_5_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004712 *eeprom_ch_index = iwl3945_eeprom_band_5;
Zhu Yib481de92007-09-25 17:54:57 -07004713 break;
4714 default:
4715 BUG();
4716 return;
4717 }
4718}
4719
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004720/**
4721 * iwl3945_get_channel_info - Find driver's private channel info
4722 *
4723 * Based on band and channel number.
4724 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004725const struct iwl3945_channel_info *iwl3945_get_channel_info(const struct iwl3945_priv *priv,
Johannes Berg8318d782008-01-24 19:38:38 +01004726 enum ieee80211_band band, u16 channel)
Zhu Yib481de92007-09-25 17:54:57 -07004727{
4728 int i;
4729
Johannes Berg8318d782008-01-24 19:38:38 +01004730 switch (band) {
4731 case IEEE80211_BAND_5GHZ:
Zhu Yib481de92007-09-25 17:54:57 -07004732 for (i = 14; i < priv->channel_count; i++) {
4733 if (priv->channel_info[i].channel == channel)
4734 return &priv->channel_info[i];
4735 }
4736 break;
4737
Johannes Berg8318d782008-01-24 19:38:38 +01004738 case IEEE80211_BAND_2GHZ:
Zhu Yib481de92007-09-25 17:54:57 -07004739 if (channel >= 1 && channel <= 14)
4740 return &priv->channel_info[channel - 1];
4741 break;
Johannes Berg8318d782008-01-24 19:38:38 +01004742 case IEEE80211_NUM_BANDS:
4743 WARN_ON(1);
Zhu Yib481de92007-09-25 17:54:57 -07004744 }
4745
4746 return NULL;
4747}
4748
4749#define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
4750 ? # x " " : "")
4751
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004752/**
4753 * iwl3945_init_channel_map - Set up driver's info for all possible channels
4754 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004755static int iwl3945_init_channel_map(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004756{
4757 int eeprom_ch_count = 0;
4758 const u8 *eeprom_ch_index = NULL;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004759 const struct iwl3945_eeprom_channel *eeprom_ch_info = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07004760 int band, ch;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004761 struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07004762
4763 if (priv->channel_count) {
4764 IWL_DEBUG_INFO("Channel map already initialized.\n");
4765 return 0;
4766 }
4767
4768 if (priv->eeprom.version < 0x2f) {
4769 IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
4770 priv->eeprom.version);
4771 return -EINVAL;
4772 }
4773
4774 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
4775
4776 priv->channel_count =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004777 ARRAY_SIZE(iwl3945_eeprom_band_1) +
4778 ARRAY_SIZE(iwl3945_eeprom_band_2) +
4779 ARRAY_SIZE(iwl3945_eeprom_band_3) +
4780 ARRAY_SIZE(iwl3945_eeprom_band_4) +
4781 ARRAY_SIZE(iwl3945_eeprom_band_5);
Zhu Yib481de92007-09-25 17:54:57 -07004782
4783 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
4784
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004785 priv->channel_info = kzalloc(sizeof(struct iwl3945_channel_info) *
Zhu Yib481de92007-09-25 17:54:57 -07004786 priv->channel_count, GFP_KERNEL);
4787 if (!priv->channel_info) {
4788 IWL_ERROR("Could not allocate channel_info\n");
4789 priv->channel_count = 0;
4790 return -ENOMEM;
4791 }
4792
4793 ch_info = priv->channel_info;
4794
4795 /* Loop through the 5 EEPROM bands adding them in order to the
4796 * channel map we maintain (that contains additional information than
4797 * what just in the EEPROM) */
4798 for (band = 1; band <= 5; band++) {
4799
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004800 iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
Zhu Yib481de92007-09-25 17:54:57 -07004801 &eeprom_ch_info, &eeprom_ch_index);
4802
4803 /* Loop through each band adding each of the channels */
4804 for (ch = 0; ch < eeprom_ch_count; ch++) {
4805 ch_info->channel = eeprom_ch_index[ch];
Johannes Berg8318d782008-01-24 19:38:38 +01004806 ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
4807 IEEE80211_BAND_5GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07004808
4809 /* permanently store EEPROM's channel regulatory flags
4810 * and max power in channel info database. */
4811 ch_info->eeprom = eeprom_ch_info[ch];
4812
4813 /* Copy the run-time flags so they are there even on
4814 * invalid channels */
4815 ch_info->flags = eeprom_ch_info[ch].flags;
4816
4817 if (!(is_channel_valid(ch_info))) {
4818 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
4819 "No traffic\n",
4820 ch_info->channel,
4821 ch_info->flags,
4822 is_channel_a_band(ch_info) ?
4823 "5.2" : "2.4");
4824 ch_info++;
4825 continue;
4826 }
4827
4828 /* Initialize regulatory-based run-time data */
4829 ch_info->max_power_avg = ch_info->curr_txpow =
4830 eeprom_ch_info[ch].max_power_avg;
4831 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
4832 ch_info->min_power = 0;
4833
Guy Cohenfe7c4042008-04-21 15:41:56 -07004834 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
Zhu Yib481de92007-09-25 17:54:57 -07004835 " %ddBm): Ad-Hoc %ssupported\n",
4836 ch_info->channel,
4837 is_channel_a_band(ch_info) ?
4838 "5.2" : "2.4",
Tomas Winkler8211ef72008-03-02 01:36:04 +02004839 CHECK_AND_PRINT(VALID),
Zhu Yib481de92007-09-25 17:54:57 -07004840 CHECK_AND_PRINT(IBSS),
4841 CHECK_AND_PRINT(ACTIVE),
4842 CHECK_AND_PRINT(RADAR),
4843 CHECK_AND_PRINT(WIDE),
Zhu Yib481de92007-09-25 17:54:57 -07004844 CHECK_AND_PRINT(DFS),
4845 eeprom_ch_info[ch].flags,
4846 eeprom_ch_info[ch].max_power_avg,
4847 ((eeprom_ch_info[ch].
4848 flags & EEPROM_CHANNEL_IBSS)
4849 && !(eeprom_ch_info[ch].
4850 flags & EEPROM_CHANNEL_RADAR))
4851 ? "" : "not ");
4852
4853 /* Set the user_txpower_limit to the highest power
4854 * supported by any channel */
4855 if (eeprom_ch_info[ch].max_power_avg >
4856 priv->user_txpower_limit)
4857 priv->user_txpower_limit =
4858 eeprom_ch_info[ch].max_power_avg;
4859
4860 ch_info++;
4861 }
4862 }
4863
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004864 /* Set up txpower settings in driver for all channels */
Zhu Yib481de92007-09-25 17:54:57 -07004865 if (iwl3945_txpower_set_from_eeprom(priv))
4866 return -EIO;
4867
4868 return 0;
4869}
4870
Reinette Chatre849e0dc2008-01-23 10:15:18 -08004871/*
4872 * iwl3945_free_channel_map - undo allocations in iwl3945_init_channel_map
4873 */
4874static void iwl3945_free_channel_map(struct iwl3945_priv *priv)
4875{
4876 kfree(priv->channel_info);
4877 priv->channel_count = 0;
4878}
4879
Zhu Yib481de92007-09-25 17:54:57 -07004880/* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
4881 * sending probe req. This should be set long enough to hear probe responses
4882 * from more than one AP. */
4883#define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
4884#define IWL_ACTIVE_DWELL_TIME_52 (10)
4885
4886/* For faster active scanning, scan will move to the next channel if fewer than
4887 * PLCP_QUIET_THRESH packets are heard on this channel within
4888 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
4889 * time if it's a quiet channel (nothing responded to our probe, and there's
4890 * no other traffic).
4891 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
4892#define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
4893#define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
4894
4895/* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
4896 * Must be set longer than active dwell time.
4897 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
4898#define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
4899#define IWL_PASSIVE_DWELL_TIME_52 (10)
4900#define IWL_PASSIVE_DWELL_BASE (100)
4901#define IWL_CHANNEL_TUNE_TIME 5
4902
Johannes Berg8318d782008-01-24 19:38:38 +01004903static inline u16 iwl3945_get_active_dwell_time(struct iwl3945_priv *priv,
4904 enum ieee80211_band band)
Zhu Yib481de92007-09-25 17:54:57 -07004905{
Johannes Berg8318d782008-01-24 19:38:38 +01004906 if (band == IEEE80211_BAND_5GHZ)
Zhu Yib481de92007-09-25 17:54:57 -07004907 return IWL_ACTIVE_DWELL_TIME_52;
4908 else
4909 return IWL_ACTIVE_DWELL_TIME_24;
4910}
4911
Johannes Berg8318d782008-01-24 19:38:38 +01004912static u16 iwl3945_get_passive_dwell_time(struct iwl3945_priv *priv,
4913 enum ieee80211_band band)
Zhu Yib481de92007-09-25 17:54:57 -07004914{
Johannes Berg8318d782008-01-24 19:38:38 +01004915 u16 active = iwl3945_get_active_dwell_time(priv, band);
4916 u16 passive = (band == IEEE80211_BAND_2GHZ) ?
Zhu Yib481de92007-09-25 17:54:57 -07004917 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
4918 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
4919
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004920 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07004921 /* If we're associated, we clamp the maximum passive
4922 * dwell time to be 98% of the beacon interval (minus
4923 * 2 * channel tune time) */
4924 passive = priv->beacon_int;
4925 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
4926 passive = IWL_PASSIVE_DWELL_BASE;
4927 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
4928 }
4929
4930 if (passive <= active)
4931 passive = active + 1;
4932
4933 return passive;
4934}
4935
Johannes Berg8318d782008-01-24 19:38:38 +01004936static int iwl3945_get_channels_for_scan(struct iwl3945_priv *priv,
4937 enum ieee80211_band band,
Zhu Yib481de92007-09-25 17:54:57 -07004938 u8 is_active, u8 direct_mask,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004939 struct iwl3945_scan_channel *scan_ch)
Zhu Yib481de92007-09-25 17:54:57 -07004940{
4941 const struct ieee80211_channel *channels = NULL;
Johannes Berg8318d782008-01-24 19:38:38 +01004942 const struct ieee80211_supported_band *sband;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004943 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07004944 u16 passive_dwell = 0;
4945 u16 active_dwell = 0;
4946 int added, i;
4947
Johannes Berg8318d782008-01-24 19:38:38 +01004948 sband = iwl3945_get_band(priv, band);
4949 if (!sband)
Zhu Yib481de92007-09-25 17:54:57 -07004950 return 0;
4951
Johannes Berg8318d782008-01-24 19:38:38 +01004952 channels = sband->channels;
Zhu Yib481de92007-09-25 17:54:57 -07004953
Johannes Berg8318d782008-01-24 19:38:38 +01004954 active_dwell = iwl3945_get_active_dwell_time(priv, band);
4955 passive_dwell = iwl3945_get_passive_dwell_time(priv, band);
Zhu Yib481de92007-09-25 17:54:57 -07004956
Johannes Berg8318d782008-01-24 19:38:38 +01004957 for (i = 0, added = 0; i < sband->n_channels; i++) {
Johannes Berg182e2e62008-04-04 10:41:56 +02004958 if (channels[i].flags & IEEE80211_CHAN_DISABLED)
4959 continue;
4960
Johannes Berg8318d782008-01-24 19:38:38 +01004961 scan_ch->channel = channels[i].hw_value;
Zhu Yib481de92007-09-25 17:54:57 -07004962
Johannes Berg8318d782008-01-24 19:38:38 +01004963 ch_info = iwl3945_get_channel_info(priv, band, scan_ch->channel);
Zhu Yib481de92007-09-25 17:54:57 -07004964 if (!is_channel_valid(ch_info)) {
4965 IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
4966 scan_ch->channel);
4967 continue;
4968 }
4969
4970 if (!is_active || is_channel_passive(ch_info) ||
Johannes Berg8318d782008-01-24 19:38:38 +01004971 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
Zhu Yib481de92007-09-25 17:54:57 -07004972 scan_ch->type = 0; /* passive */
4973 else
4974 scan_ch->type = 1; /* active */
4975
4976 if (scan_ch->type & 1)
4977 scan_ch->type |= (direct_mask << 1);
4978
Zhu Yib481de92007-09-25 17:54:57 -07004979 scan_ch->active_dwell = cpu_to_le16(active_dwell);
4980 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
4981
Ben Cahill9fbab512007-11-29 11:09:47 +08004982 /* Set txpower levels to defaults */
Zhu Yib481de92007-09-25 17:54:57 -07004983 scan_ch->tpc.dsp_atten = 110;
4984 /* scan_pwr_info->tpc.dsp_atten; */
4985
4986 /*scan_pwr_info->tpc.tx_gain; */
Johannes Berg8318d782008-01-24 19:38:38 +01004987 if (band == IEEE80211_BAND_5GHZ)
Zhu Yib481de92007-09-25 17:54:57 -07004988 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
4989 else {
4990 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
4991 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
Ben Cahill9fbab512007-11-29 11:09:47 +08004992 * power level:
Reinette Chatre8a1b0242008-01-14 17:46:25 -08004993 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
Zhu Yib481de92007-09-25 17:54:57 -07004994 */
4995 }
4996
4997 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
4998 scan_ch->channel,
4999 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
5000 (scan_ch->type & 1) ?
5001 active_dwell : passive_dwell);
5002
5003 scan_ch++;
5004 added++;
5005 }
5006
5007 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
5008 return added;
5009}
5010
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005011static void iwl3945_init_hw_rates(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07005012 struct ieee80211_rate *rates)
5013{
5014 int i;
5015
5016 for (i = 0; i < IWL_RATE_COUNT; i++) {
Johannes Berg8318d782008-01-24 19:38:38 +01005017 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
5018 rates[i].hw_value = i; /* Rate scaling will work on indexes */
5019 rates[i].hw_value_short = i;
5020 rates[i].flags = 0;
5021 if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
Zhu Yib481de92007-09-25 17:54:57 -07005022 /*
Johannes Berg8318d782008-01-24 19:38:38 +01005023 * If CCK != 1M then set short preamble rate flag.
Zhu Yib481de92007-09-25 17:54:57 -07005024 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005025 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
Johannes Berg8318d782008-01-24 19:38:38 +01005026 0 : IEEE80211_RATE_SHORT_PREAMBLE;
Zhu Yib481de92007-09-25 17:54:57 -07005027 }
Zhu Yib481de92007-09-25 17:54:57 -07005028 }
5029}
5030
5031/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005032 * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
Zhu Yib481de92007-09-25 17:54:57 -07005033 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005034static int iwl3945_init_geos(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005035{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005036 struct iwl3945_channel_info *ch;
Tomas Winkler8211ef72008-03-02 01:36:04 +02005037 struct ieee80211_supported_band *sband;
Zhu Yib481de92007-09-25 17:54:57 -07005038 struct ieee80211_channel *channels;
5039 struct ieee80211_channel *geo_ch;
5040 struct ieee80211_rate *rates;
5041 int i = 0;
Zhu Yib481de92007-09-25 17:54:57 -07005042
Johannes Berg8318d782008-01-24 19:38:38 +01005043 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
5044 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
Zhu Yib481de92007-09-25 17:54:57 -07005045 IWL_DEBUG_INFO("Geography modes already initialized.\n");
5046 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5047 return 0;
5048 }
5049
Zhu Yib481de92007-09-25 17:54:57 -07005050 channels = kzalloc(sizeof(struct ieee80211_channel) *
5051 priv->channel_count, GFP_KERNEL);
Johannes Berg8318d782008-01-24 19:38:38 +01005052 if (!channels)
Zhu Yib481de92007-09-25 17:54:57 -07005053 return -ENOMEM;
Zhu Yib481de92007-09-25 17:54:57 -07005054
Tomas Winkler8211ef72008-03-02 01:36:04 +02005055 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
Zhu Yib481de92007-09-25 17:54:57 -07005056 GFP_KERNEL);
5057 if (!rates) {
Zhu Yib481de92007-09-25 17:54:57 -07005058 kfree(channels);
5059 return -ENOMEM;
5060 }
5061
Zhu Yib481de92007-09-25 17:54:57 -07005062 /* 5.2GHz channels start after the 2.4GHz channels */
Tomas Winkler8211ef72008-03-02 01:36:04 +02005063 sband = &priv->bands[IEEE80211_BAND_5GHZ];
5064 sband->channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
5065 /* just OFDM */
5066 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5067 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
Zhu Yib481de92007-09-25 17:54:57 -07005068
Tomas Winkler8211ef72008-03-02 01:36:04 +02005069 sband = &priv->bands[IEEE80211_BAND_2GHZ];
5070 sband->channels = channels;
5071 /* OFDM & CCK */
5072 sband->bitrates = rates;
5073 sband->n_bitrates = IWL_RATE_COUNT;
Zhu Yib481de92007-09-25 17:54:57 -07005074
5075 priv->ieee_channels = channels;
5076 priv->ieee_rates = rates;
5077
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005078 iwl3945_init_hw_rates(priv, rates);
Zhu Yib481de92007-09-25 17:54:57 -07005079
Tomas Winkler8211ef72008-03-02 01:36:04 +02005080 for (i = 0; i < priv->channel_count; i++) {
Zhu Yib481de92007-09-25 17:54:57 -07005081 ch = &priv->channel_info[i];
5082
Tomas Winkler8211ef72008-03-02 01:36:04 +02005083 /* FIXME: might be removed if scan is OK*/
5084 if (!is_channel_valid(ch))
Zhu Yib481de92007-09-25 17:54:57 -07005085 continue;
Zhu Yib481de92007-09-25 17:54:57 -07005086
5087 if (is_channel_a_band(ch))
Tomas Winkler8211ef72008-03-02 01:36:04 +02005088 sband = &priv->bands[IEEE80211_BAND_5GHZ];
Johannes Berg8318d782008-01-24 19:38:38 +01005089 else
Tomas Winkler8211ef72008-03-02 01:36:04 +02005090 sband = &priv->bands[IEEE80211_BAND_2GHZ];
Zhu Yib481de92007-09-25 17:54:57 -07005091
Tomas Winkler8211ef72008-03-02 01:36:04 +02005092 geo_ch = &sband->channels[sband->n_channels++];
5093
5094 geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
Johannes Berg8318d782008-01-24 19:38:38 +01005095 geo_ch->max_power = ch->max_power_avg;
5096 geo_ch->max_antenna_gain = 0xff;
Mohamed Abbas7b723042008-01-31 21:46:40 -08005097 geo_ch->hw_value = ch->channel;
Zhu Yib481de92007-09-25 17:54:57 -07005098
5099 if (is_channel_valid(ch)) {
Johannes Berg8318d782008-01-24 19:38:38 +01005100 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
5101 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
Zhu Yib481de92007-09-25 17:54:57 -07005102
Johannes Berg8318d782008-01-24 19:38:38 +01005103 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
5104 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
Zhu Yib481de92007-09-25 17:54:57 -07005105
5106 if (ch->flags & EEPROM_CHANNEL_RADAR)
Johannes Berg8318d782008-01-24 19:38:38 +01005107 geo_ch->flags |= IEEE80211_CHAN_RADAR;
Zhu Yib481de92007-09-25 17:54:57 -07005108
5109 if (ch->max_power_avg > priv->max_channel_txpower_limit)
5110 priv->max_channel_txpower_limit =
5111 ch->max_power_avg;
Tomas Winkler8211ef72008-03-02 01:36:04 +02005112 } else {
Johannes Berg8318d782008-01-24 19:38:38 +01005113 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
Tomas Winkler8211ef72008-03-02 01:36:04 +02005114 }
5115
5116 /* Save flags for reg domain usage */
5117 geo_ch->orig_flags = geo_ch->flags;
5118
5119 IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
5120 ch->channel, geo_ch->center_freq,
5121 is_channel_a_band(ch) ? "5.2" : "2.4",
5122 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
5123 "restricted" : "valid",
5124 geo_ch->flags);
Zhu Yib481de92007-09-25 17:54:57 -07005125 }
5126
Tomas Winkler82b9a122008-03-04 18:09:30 -08005127 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
5128 priv->cfg->sku & IWL_SKU_A) {
Zhu Yib481de92007-09-25 17:54:57 -07005129 printk(KERN_INFO DRV_NAME
5130 ": Incorrectly detected BG card as ABG. Please send "
5131 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
5132 priv->pci_dev->device, priv->pci_dev->subsystem_device);
Tomas Winkler82b9a122008-03-04 18:09:30 -08005133 priv->cfg->sku &= ~IWL_SKU_A;
Zhu Yib481de92007-09-25 17:54:57 -07005134 }
5135
5136 printk(KERN_INFO DRV_NAME
5137 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
Johannes Berg8318d782008-01-24 19:38:38 +01005138 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
5139 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
Zhu Yib481de92007-09-25 17:54:57 -07005140
John W. Linvillee0e0a672008-03-25 15:58:40 -04005141 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
5142 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
5143 &priv->bands[IEEE80211_BAND_2GHZ];
5144 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
5145 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
5146 &priv->bands[IEEE80211_BAND_5GHZ];
Zhu Yib481de92007-09-25 17:54:57 -07005147
Zhu Yib481de92007-09-25 17:54:57 -07005148 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5149
5150 return 0;
5151}
5152
Reinette Chatre849e0dc2008-01-23 10:15:18 -08005153/*
5154 * iwl3945_free_geos - undo allocations in iwl3945_init_geos
5155 */
5156static void iwl3945_free_geos(struct iwl3945_priv *priv)
5157{
Reinette Chatre849e0dc2008-01-23 10:15:18 -08005158 kfree(priv->ieee_channels);
5159 kfree(priv->ieee_rates);
5160 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
5161}
5162
Zhu Yib481de92007-09-25 17:54:57 -07005163/******************************************************************************
5164 *
5165 * uCode download functions
5166 *
5167 ******************************************************************************/
5168
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005169static void iwl3945_dealloc_ucode_pci(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005170{
Tomas Winkler98c92212008-01-14 17:46:20 -08005171 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
5172 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
5173 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5174 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
5175 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5176 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
Zhu Yib481de92007-09-25 17:54:57 -07005177}
5178
5179/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005180 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
Zhu Yib481de92007-09-25 17:54:57 -07005181 * looking at all data.
5182 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005183static int iwl3945_verify_inst_full(struct iwl3945_priv *priv, __le32 * image, u32 len)
Zhu Yib481de92007-09-25 17:54:57 -07005184{
5185 u32 val;
5186 u32 save_len = len;
5187 int rc = 0;
5188 u32 errcnt;
5189
5190 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5191
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005192 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005193 if (rc)
5194 return rc;
5195
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005196 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
Zhu Yib481de92007-09-25 17:54:57 -07005197
5198 errcnt = 0;
5199 for (; len > 0; len -= sizeof(u32), image++) {
5200 /* read data comes through single port, auto-incr addr */
5201 /* NOTE: Use the debugless read so we don't flood kernel log
5202 * if IWL_DL_IO is set */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005203 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
Zhu Yib481de92007-09-25 17:54:57 -07005204 if (val != le32_to_cpu(*image)) {
5205 IWL_ERROR("uCode INST section is invalid at "
5206 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5207 save_len - len, val, le32_to_cpu(*image));
5208 rc = -EIO;
5209 errcnt++;
5210 if (errcnt >= 20)
5211 break;
5212 }
5213 }
5214
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005215 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005216
5217 if (!errcnt)
Ian Schrambc434dd2007-10-25 17:15:29 +08005218 IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
Zhu Yib481de92007-09-25 17:54:57 -07005219
5220 return rc;
5221}
5222
5223
5224/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005225 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
Zhu Yib481de92007-09-25 17:54:57 -07005226 * using sample data 100 bytes apart. If these sample points are good,
5227 * it's a pretty good bet that everything between them is good, too.
5228 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005229static int iwl3945_verify_inst_sparse(struct iwl3945_priv *priv, __le32 *image, u32 len)
Zhu Yib481de92007-09-25 17:54:57 -07005230{
5231 u32 val;
5232 int rc = 0;
5233 u32 errcnt = 0;
5234 u32 i;
5235
5236 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5237
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005238 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005239 if (rc)
5240 return rc;
5241
5242 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
5243 /* read data comes through single port, auto-incr addr */
5244 /* NOTE: Use the debugless read so we don't flood kernel log
5245 * if IWL_DL_IO is set */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005246 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR,
Zhu Yib481de92007-09-25 17:54:57 -07005247 i + RTC_INST_LOWER_BOUND);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005248 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
Zhu Yib481de92007-09-25 17:54:57 -07005249 if (val != le32_to_cpu(*image)) {
5250#if 0 /* Enable this if you want to see details */
5251 IWL_ERROR("uCode INST section is invalid at "
5252 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5253 i, val, *image);
5254#endif
5255 rc = -EIO;
5256 errcnt++;
5257 if (errcnt >= 3)
5258 break;
5259 }
5260 }
5261
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005262 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005263
5264 return rc;
5265}
5266
5267
5268/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005269 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
Zhu Yib481de92007-09-25 17:54:57 -07005270 * and verify its contents
5271 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005272static int iwl3945_verify_ucode(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005273{
5274 __le32 *image;
5275 u32 len;
5276 int rc = 0;
5277
5278 /* Try bootstrap */
5279 image = (__le32 *)priv->ucode_boot.v_addr;
5280 len = priv->ucode_boot.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005281 rc = iwl3945_verify_inst_sparse(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005282 if (rc == 0) {
5283 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
5284 return 0;
5285 }
5286
5287 /* Try initialize */
5288 image = (__le32 *)priv->ucode_init.v_addr;
5289 len = priv->ucode_init.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005290 rc = iwl3945_verify_inst_sparse(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005291 if (rc == 0) {
5292 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
5293 return 0;
5294 }
5295
5296 /* Try runtime/protocol */
5297 image = (__le32 *)priv->ucode_code.v_addr;
5298 len = priv->ucode_code.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005299 rc = iwl3945_verify_inst_sparse(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005300 if (rc == 0) {
5301 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
5302 return 0;
5303 }
5304
5305 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
5306
Ben Cahill9fbab512007-11-29 11:09:47 +08005307 /* Since nothing seems to match, show first several data entries in
5308 * instruction SRAM, so maybe visual inspection will give a clue.
5309 * Selection of bootstrap image (vs. other images) is arbitrary. */
Zhu Yib481de92007-09-25 17:54:57 -07005310 image = (__le32 *)priv->ucode_boot.v_addr;
5311 len = priv->ucode_boot.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005312 rc = iwl3945_verify_inst_full(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005313
5314 return rc;
5315}
5316
5317
5318/* check contents of special bootstrap uCode SRAM */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005319static int iwl3945_verify_bsm(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005320{
5321 __le32 *image = priv->ucode_boot.v_addr;
5322 u32 len = priv->ucode_boot.len;
5323 u32 reg;
5324 u32 val;
5325
5326 IWL_DEBUG_INFO("Begin verify bsm\n");
5327
5328 /* verify BSM SRAM contents */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005329 val = iwl3945_read_prph(priv, BSM_WR_DWCOUNT_REG);
Zhu Yib481de92007-09-25 17:54:57 -07005330 for (reg = BSM_SRAM_LOWER_BOUND;
5331 reg < BSM_SRAM_LOWER_BOUND + len;
5332 reg += sizeof(u32), image ++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005333 val = iwl3945_read_prph(priv, reg);
Zhu Yib481de92007-09-25 17:54:57 -07005334 if (val != le32_to_cpu(*image)) {
5335 IWL_ERROR("BSM uCode verification failed at "
5336 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
5337 BSM_SRAM_LOWER_BOUND,
5338 reg - BSM_SRAM_LOWER_BOUND, len,
5339 val, le32_to_cpu(*image));
5340 return -EIO;
5341 }
5342 }
5343
5344 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
5345
5346 return 0;
5347}
5348
5349/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005350 * iwl3945_load_bsm - Load bootstrap instructions
Zhu Yib481de92007-09-25 17:54:57 -07005351 *
5352 * BSM operation:
5353 *
5354 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
5355 * in special SRAM that does not power down during RFKILL. When powering back
5356 * up after power-saving sleeps (or during initial uCode load), the BSM loads
5357 * the bootstrap program into the on-board processor, and starts it.
5358 *
5359 * The bootstrap program loads (via DMA) instructions and data for a new
5360 * program from host DRAM locations indicated by the host driver in the
5361 * BSM_DRAM_* registers. Once the new program is loaded, it starts
5362 * automatically.
5363 *
5364 * When initializing the NIC, the host driver points the BSM to the
5365 * "initialize" uCode image. This uCode sets up some internal data, then
5366 * notifies host via "initialize alive" that it is complete.
5367 *
5368 * The host then replaces the BSM_DRAM_* pointer values to point to the
5369 * normal runtime uCode instructions and a backup uCode data cache buffer
5370 * (filled initially with starting data values for the on-board processor),
5371 * then triggers the "initialize" uCode to load and launch the runtime uCode,
5372 * which begins normal operation.
5373 *
5374 * When doing a power-save shutdown, runtime uCode saves data SRAM into
5375 * the backup data cache in DRAM before SRAM is powered down.
5376 *
5377 * When powering back up, the BSM loads the bootstrap program. This reloads
5378 * the runtime uCode instructions and the backup data cache into SRAM,
5379 * and re-launches the runtime uCode from where it left off.
5380 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005381static int iwl3945_load_bsm(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005382{
5383 __le32 *image = priv->ucode_boot.v_addr;
5384 u32 len = priv->ucode_boot.len;
5385 dma_addr_t pinst;
5386 dma_addr_t pdata;
5387 u32 inst_len;
5388 u32 data_len;
5389 int rc;
5390 int i;
5391 u32 done;
5392 u32 reg_offset;
5393
5394 IWL_DEBUG_INFO("Begin load bsm\n");
5395
5396 /* make sure bootstrap program is no larger than BSM's SRAM size */
5397 if (len > IWL_MAX_BSM_SIZE)
5398 return -EINVAL;
5399
5400 /* Tell bootstrap uCode where to find the "Initialize" uCode
Ben Cahill9fbab512007-11-29 11:09:47 +08005401 * in host DRAM ... host DRAM physical address bits 31:0 for 3945.
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005402 * NOTE: iwl3945_initialize_alive_start() will replace these values,
Zhu Yib481de92007-09-25 17:54:57 -07005403 * after the "initialize" uCode has run, to point to
5404 * runtime/protocol instructions and backup data cache. */
5405 pinst = priv->ucode_init.p_addr;
5406 pdata = priv->ucode_init_data.p_addr;
5407 inst_len = priv->ucode_init.len;
5408 data_len = priv->ucode_init_data.len;
5409
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005410 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005411 if (rc)
5412 return rc;
5413
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005414 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5415 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5416 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
5417 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
Zhu Yib481de92007-09-25 17:54:57 -07005418
5419 /* Fill BSM memory with bootstrap instructions */
5420 for (reg_offset = BSM_SRAM_LOWER_BOUND;
5421 reg_offset < BSM_SRAM_LOWER_BOUND + len;
5422 reg_offset += sizeof(u32), image++)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005423 _iwl3945_write_prph(priv, reg_offset,
Zhu Yib481de92007-09-25 17:54:57 -07005424 le32_to_cpu(*image));
5425
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005426 rc = iwl3945_verify_bsm(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005427 if (rc) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005428 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005429 return rc;
5430 }
5431
5432 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005433 iwl3945_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
5434 iwl3945_write_prph(priv, BSM_WR_MEM_DST_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005435 RTC_INST_LOWER_BOUND);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005436 iwl3945_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07005437
5438 /* Load bootstrap code into instruction SRAM now,
5439 * to prepare to load "initialize" uCode */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005440 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005441 BSM_WR_CTRL_REG_BIT_START);
5442
5443 /* Wait for load of bootstrap uCode to finish */
5444 for (i = 0; i < 100; i++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005445 done = iwl3945_read_prph(priv, BSM_WR_CTRL_REG);
Zhu Yib481de92007-09-25 17:54:57 -07005446 if (!(done & BSM_WR_CTRL_REG_BIT_START))
5447 break;
5448 udelay(10);
5449 }
5450 if (i < 100)
5451 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
5452 else {
5453 IWL_ERROR("BSM write did not complete!\n");
5454 return -EIO;
5455 }
5456
5457 /* Enable future boot loads whenever power management unit triggers it
5458 * (e.g. when powering back up after power-save shutdown) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005459 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005460 BSM_WR_CTRL_REG_BIT_START_EN);
5461
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005462 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005463
5464 return 0;
5465}
5466
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005467static void iwl3945_nic_start(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005468{
5469 /* Remove all resets to allow NIC to operate */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005470 iwl3945_write32(priv, CSR_RESET, 0);
Zhu Yib481de92007-09-25 17:54:57 -07005471}
5472
5473/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005474 * iwl3945_read_ucode - Read uCode images from disk file.
Zhu Yib481de92007-09-25 17:54:57 -07005475 *
5476 * Copy into buffers for card to fetch via bus-mastering
5477 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005478static int iwl3945_read_ucode(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005479{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005480 struct iwl3945_ucode *ucode;
Tomas Winkler90e759d2007-11-29 11:09:41 +08005481 int ret = 0;
Zhu Yib481de92007-09-25 17:54:57 -07005482 const struct firmware *ucode_raw;
5483 /* firmware file name contains uCode/driver compatibility version */
Tomas Winkler4bf775c2008-03-04 18:09:31 -08005484 const char *name = priv->cfg->fw_name;
Zhu Yib481de92007-09-25 17:54:57 -07005485 u8 *src;
5486 size_t len;
5487 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
5488
5489 /* Ask kernel firmware_class module to get the boot firmware off disk.
5490 * request_firmware() is synchronous, file is in memory on return. */
Tomas Winkler90e759d2007-11-29 11:09:41 +08005491 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
5492 if (ret < 0) {
5493 IWL_ERROR("%s firmware file req failed: Reason %d\n",
5494 name, ret);
Zhu Yib481de92007-09-25 17:54:57 -07005495 goto error;
5496 }
5497
5498 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
5499 name, ucode_raw->size);
5500
5501 /* Make sure that we got at least our header! */
5502 if (ucode_raw->size < sizeof(*ucode)) {
5503 IWL_ERROR("File size way too small!\n");
Tomas Winkler90e759d2007-11-29 11:09:41 +08005504 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005505 goto err_release;
5506 }
5507
5508 /* Data from ucode file: header followed by uCode images */
5509 ucode = (void *)ucode_raw->data;
5510
5511 ver = le32_to_cpu(ucode->ver);
5512 inst_size = le32_to_cpu(ucode->inst_size);
5513 data_size = le32_to_cpu(ucode->data_size);
5514 init_size = le32_to_cpu(ucode->init_size);
5515 init_data_size = le32_to_cpu(ucode->init_data_size);
5516 boot_size = le32_to_cpu(ucode->boot_size);
5517
5518 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
Ian Schrambc434dd2007-10-25 17:15:29 +08005519 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
5520 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
5521 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
5522 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
5523 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
Zhu Yib481de92007-09-25 17:54:57 -07005524
5525 /* Verify size of file vs. image size info in file's header */
5526 if (ucode_raw->size < sizeof(*ucode) +
5527 inst_size + data_size + init_size +
5528 init_data_size + boot_size) {
5529
5530 IWL_DEBUG_INFO("uCode file size %d too small\n",
5531 (int)ucode_raw->size);
Tomas Winkler90e759d2007-11-29 11:09:41 +08005532 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005533 goto err_release;
5534 }
5535
5536 /* Verify that uCode images will fit in card's SRAM */
5537 if (inst_size > IWL_MAX_INST_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005538 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
5539 inst_size);
5540 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005541 goto err_release;
5542 }
5543
5544 if (data_size > IWL_MAX_DATA_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005545 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
5546 data_size);
5547 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005548 goto err_release;
5549 }
5550 if (init_size > IWL_MAX_INST_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005551 IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
5552 init_size);
5553 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005554 goto err_release;
5555 }
5556 if (init_data_size > IWL_MAX_DATA_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005557 IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
5558 init_data_size);
5559 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005560 goto err_release;
5561 }
5562 if (boot_size > IWL_MAX_BSM_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005563 IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
5564 boot_size);
5565 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005566 goto err_release;
5567 }
5568
5569 /* Allocate ucode buffers for card's bus-master loading ... */
5570
5571 /* Runtime instructions and 2 copies of data:
5572 * 1) unmodified from disk
5573 * 2) backup cache for save/restore during power-downs */
5574 priv->ucode_code.len = inst_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005575 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
Zhu Yib481de92007-09-25 17:54:57 -07005576
5577 priv->ucode_data.len = data_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005578 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
Zhu Yib481de92007-09-25 17:54:57 -07005579
5580 priv->ucode_data_backup.len = data_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005581 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
Zhu Yib481de92007-09-25 17:54:57 -07005582
5583 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
Tomas Winkler90e759d2007-11-29 11:09:41 +08005584 !priv->ucode_data_backup.v_addr)
Zhu Yib481de92007-09-25 17:54:57 -07005585 goto err_pci_alloc;
5586
Tomas Winkler90e759d2007-11-29 11:09:41 +08005587 /* Initialization instructions and data */
5588 if (init_size && init_data_size) {
5589 priv->ucode_init.len = init_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005590 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
Tomas Winkler90e759d2007-11-29 11:09:41 +08005591
5592 priv->ucode_init_data.len = init_data_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005593 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
Tomas Winkler90e759d2007-11-29 11:09:41 +08005594
5595 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
5596 goto err_pci_alloc;
5597 }
5598
5599 /* Bootstrap (instructions only, no data) */
5600 if (boot_size) {
5601 priv->ucode_boot.len = boot_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005602 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
Tomas Winkler90e759d2007-11-29 11:09:41 +08005603
5604 if (!priv->ucode_boot.v_addr)
5605 goto err_pci_alloc;
5606 }
5607
Zhu Yib481de92007-09-25 17:54:57 -07005608 /* Copy images into buffers for card's bus-master reads ... */
5609
5610 /* Runtime instructions (first block of data in file) */
5611 src = &ucode->data[0];
5612 len = priv->ucode_code.len;
Tomas Winkler90e759d2007-11-29 11:09:41 +08005613 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
Zhu Yib481de92007-09-25 17:54:57 -07005614 memcpy(priv->ucode_code.v_addr, src, len);
5615 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
5616 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
5617
5618 /* Runtime data (2nd block)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005619 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
Zhu Yib481de92007-09-25 17:54:57 -07005620 src = &ucode->data[inst_size];
5621 len = priv->ucode_data.len;
Tomas Winkler90e759d2007-11-29 11:09:41 +08005622 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
Zhu Yib481de92007-09-25 17:54:57 -07005623 memcpy(priv->ucode_data.v_addr, src, len);
5624 memcpy(priv->ucode_data_backup.v_addr, src, len);
5625
5626 /* Initialization instructions (3rd block) */
5627 if (init_size) {
5628 src = &ucode->data[inst_size + data_size];
5629 len = priv->ucode_init.len;
Tomas Winkler90e759d2007-11-29 11:09:41 +08005630 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
5631 len);
Zhu Yib481de92007-09-25 17:54:57 -07005632 memcpy(priv->ucode_init.v_addr, src, len);
5633 }
5634
5635 /* Initialization data (4th block) */
5636 if (init_data_size) {
5637 src = &ucode->data[inst_size + data_size + init_size];
5638 len = priv->ucode_init_data.len;
5639 IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
5640 (int)len);
5641 memcpy(priv->ucode_init_data.v_addr, src, len);
5642 }
5643
5644 /* Bootstrap instructions (5th block) */
5645 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
5646 len = priv->ucode_boot.len;
5647 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
5648 (int)len);
5649 memcpy(priv->ucode_boot.v_addr, src, len);
5650
5651 /* We have our copies now, allow OS release its copies */
5652 release_firmware(ucode_raw);
5653 return 0;
5654
5655 err_pci_alloc:
5656 IWL_ERROR("failed to allocate pci memory\n");
Tomas Winkler90e759d2007-11-29 11:09:41 +08005657 ret = -ENOMEM;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005658 iwl3945_dealloc_ucode_pci(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005659
5660 err_release:
5661 release_firmware(ucode_raw);
5662
5663 error:
Tomas Winkler90e759d2007-11-29 11:09:41 +08005664 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07005665}
5666
5667
5668/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005669 * iwl3945_set_ucode_ptrs - Set uCode address location
Zhu Yib481de92007-09-25 17:54:57 -07005670 *
5671 * Tell initialization uCode where to find runtime uCode.
5672 *
5673 * BSM registers initially contain pointers to initialization uCode.
5674 * We need to replace them to load runtime uCode inst and data,
5675 * and to save runtime data when powering down.
5676 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005677static int iwl3945_set_ucode_ptrs(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005678{
5679 dma_addr_t pinst;
5680 dma_addr_t pdata;
5681 int rc = 0;
5682 unsigned long flags;
5683
5684 /* bits 31:0 for 3945 */
5685 pinst = priv->ucode_code.p_addr;
5686 pdata = priv->ucode_data_backup.p_addr;
5687
5688 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005689 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005690 if (rc) {
5691 spin_unlock_irqrestore(&priv->lock, flags);
5692 return rc;
5693 }
5694
5695 /* Tell bootstrap uCode where to find image to load */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005696 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5697 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5698 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005699 priv->ucode_data.len);
5700
5701 /* Inst bytecount must be last to set up, bit 31 signals uCode
5702 * that all new ptr/size info is in place */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005703 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005704 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
5705
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005706 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005707
5708 spin_unlock_irqrestore(&priv->lock, flags);
5709
5710 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
5711
5712 return rc;
5713}
5714
5715/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005716 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
Zhu Yib481de92007-09-25 17:54:57 -07005717 *
5718 * Called after REPLY_ALIVE notification received from "initialize" uCode.
5719 *
Zhu Yib481de92007-09-25 17:54:57 -07005720 * Tell "initialize" uCode to go ahead and load the runtime uCode.
Ben Cahill9fbab512007-11-29 11:09:47 +08005721 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005722static void iwl3945_init_alive_start(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005723{
5724 /* Check alive response for "valid" sign from uCode */
5725 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
5726 /* We had an error bringing up the hardware, so take it
5727 * all the way back down so we can try again */
5728 IWL_DEBUG_INFO("Initialize Alive failed.\n");
5729 goto restart;
5730 }
5731
5732 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
5733 * This is a paranoid check, because we would not have gotten the
5734 * "initialize" alive if code weren't properly loaded. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005735 if (iwl3945_verify_ucode(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07005736 /* Runtime instruction load was bad;
5737 * take it all the way back down so we can try again */
5738 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
5739 goto restart;
5740 }
5741
5742 /* Send pointers to protocol/runtime uCode image ... init code will
5743 * load and launch runtime uCode, which will send us another "Alive"
5744 * notification. */
5745 IWL_DEBUG_INFO("Initialization Alive received.\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005746 if (iwl3945_set_ucode_ptrs(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07005747 /* Runtime instruction load won't happen;
5748 * take it all the way back down so we can try again */
5749 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
5750 goto restart;
5751 }
5752 return;
5753
5754 restart:
5755 queue_work(priv->workqueue, &priv->restart);
5756}
5757
5758
5759/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005760 * iwl3945_alive_start - called after REPLY_ALIVE notification received
Zhu Yib481de92007-09-25 17:54:57 -07005761 * from protocol/runtime uCode (initialization uCode's
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005762 * Alive gets handled by iwl3945_init_alive_start()).
Zhu Yib481de92007-09-25 17:54:57 -07005763 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005764static void iwl3945_alive_start(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005765{
5766 int rc = 0;
5767 int thermal_spin = 0;
5768 u32 rfkill;
5769
5770 IWL_DEBUG_INFO("Runtime Alive received.\n");
5771
5772 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
5773 /* We had an error bringing up the hardware, so take it
5774 * all the way back down so we can try again */
5775 IWL_DEBUG_INFO("Alive failed.\n");
5776 goto restart;
5777 }
5778
5779 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
5780 * This is a paranoid check, because we would not have gotten the
5781 * "runtime" alive if code weren't properly loaded. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005782 if (iwl3945_verify_ucode(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07005783 /* Runtime instruction load was bad;
5784 * take it all the way back down so we can try again */
5785 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
5786 goto restart;
5787 }
5788
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005789 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005790
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005791 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005792 if (rc) {
5793 IWL_WARNING("Can not read rfkill status from adapter\n");
5794 return;
5795 }
5796
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005797 rfkill = iwl3945_read_prph(priv, APMG_RFKILL_REG);
Zhu Yib481de92007-09-25 17:54:57 -07005798 IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005799 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005800
5801 if (rfkill & 0x1) {
5802 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5803 /* if rfkill is not on, then wait for thermal
5804 * sensor in adapter to kick in */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005805 while (iwl3945_hw_get_temperature(priv) == 0) {
Zhu Yib481de92007-09-25 17:54:57 -07005806 thermal_spin++;
5807 udelay(10);
5808 }
5809
5810 if (thermal_spin)
5811 IWL_DEBUG_INFO("Thermal calibration took %dus\n",
5812 thermal_spin * 10);
5813 } else
5814 set_bit(STATUS_RF_KILL_HW, &priv->status);
5815
Ben Cahill9fbab512007-11-29 11:09:47 +08005816 /* After the ALIVE response, we can send commands to 3945 uCode */
Zhu Yib481de92007-09-25 17:54:57 -07005817 set_bit(STATUS_ALIVE, &priv->status);
5818
5819 /* Clear out the uCode error bit if it is set */
5820 clear_bit(STATUS_FW_ERROR, &priv->status);
5821
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005822 if (iwl3945_is_rfkill(priv))
Zhu Yib481de92007-09-25 17:54:57 -07005823 return;
5824
Johannes Berg36d68252008-05-15 12:55:26 +02005825 ieee80211_wake_queues(priv->hw);
Zhu Yib481de92007-09-25 17:54:57 -07005826
5827 priv->active_rate = priv->rates_mask;
5828 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
5829
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005830 iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
Zhu Yib481de92007-09-25 17:54:57 -07005831
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005832 if (iwl3945_is_associated(priv)) {
5833 struct iwl3945_rxon_cmd *active_rxon =
5834 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07005835
5836 memcpy(&priv->staging_rxon, &priv->active_rxon,
5837 sizeof(priv->staging_rxon));
5838 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5839 } else {
5840 /* Initialize our rx_config data */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005841 iwl3945_connection_init_rx_config(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005842 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
5843 }
5844
Ben Cahill9fbab512007-11-29 11:09:47 +08005845 /* Configure Bluetooth device coexistence support */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005846 iwl3945_send_bt_config(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005847
5848 /* Configure the adapter for unassociated operation */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005849 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005850
Zhu Yib481de92007-09-25 17:54:57 -07005851 iwl3945_reg_txpower_periodic(priv);
5852
Reinette Chatrefe00b5a2008-04-03 16:05:23 -07005853 iwl3945_led_register(priv);
5854
Zhu Yib481de92007-09-25 17:54:57 -07005855 IWL_DEBUG_INFO("ALIVE processing complete.\n");
Rick Farringtona9f46782008-03-18 14:57:49 -07005856 set_bit(STATUS_READY, &priv->status);
Zhu Yi5a669262008-01-14 17:46:18 -08005857 wake_up_interruptible(&priv->wait_command_queue);
Zhu Yib481de92007-09-25 17:54:57 -07005858
5859 if (priv->error_recovering)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005860 iwl3945_error_recovery(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005861
Mohamed Abbas84363e62008-04-04 16:59:58 -07005862 ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC);
Zhu Yib481de92007-09-25 17:54:57 -07005863 return;
5864
5865 restart:
5866 queue_work(priv->workqueue, &priv->restart);
5867}
5868
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005869static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv);
Zhu Yib481de92007-09-25 17:54:57 -07005870
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005871static void __iwl3945_down(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005872{
5873 unsigned long flags;
5874 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
5875 struct ieee80211_conf *conf = NULL;
5876
5877 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
5878
5879 conf = ieee80211_get_hw_conf(priv->hw);
5880
5881 if (!exit_pending)
5882 set_bit(STATUS_EXIT_PENDING, &priv->status);
5883
Mohamed Abbasab53d8a2008-03-25 16:33:36 -07005884 iwl3945_led_unregister(priv);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005885 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005886
5887 /* Unblock any waiting calls */
5888 wake_up_interruptible_all(&priv->wait_command_queue);
5889
Zhu Yib481de92007-09-25 17:54:57 -07005890 /* Wipe out the EXIT_PENDING status bit if we are not actually
5891 * exiting the module */
5892 if (!exit_pending)
5893 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5894
5895 /* stop and reset the on-board processor */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005896 iwl3945_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
Zhu Yib481de92007-09-25 17:54:57 -07005897
5898 /* tell the device to stop sending interrupts */
Mohamed Abbas0359fac2008-03-28 16:21:08 -07005899 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005900 iwl3945_disable_interrupts(priv);
Mohamed Abbas0359fac2008-03-28 16:21:08 -07005901 spin_unlock_irqrestore(&priv->lock, flags);
5902 iwl_synchronize_irq(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005903
5904 if (priv->mac80211_registered)
5905 ieee80211_stop_queues(priv->hw);
5906
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005907 /* If we have not previously called iwl3945_init() then
Zhu Yib481de92007-09-25 17:54:57 -07005908 * clear all bits but the RF Kill and SUSPEND bits and return */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005909 if (!iwl3945_is_init(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07005910 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5911 STATUS_RF_KILL_HW |
5912 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5913 STATUS_RF_KILL_SW |
Reinette Chatre97888642008-02-06 11:20:38 -08005914 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5915 STATUS_GEO_CONFIGURED |
Zhu Yib481de92007-09-25 17:54:57 -07005916 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5917 STATUS_IN_SUSPEND;
5918 goto exit;
5919 }
5920
5921 /* ...otherwise clear out all the status bits but the RF Kill and
5922 * SUSPEND bits and continue taking the NIC down. */
5923 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5924 STATUS_RF_KILL_HW |
5925 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5926 STATUS_RF_KILL_SW |
Reinette Chatre97888642008-02-06 11:20:38 -08005927 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5928 STATUS_GEO_CONFIGURED |
Zhu Yib481de92007-09-25 17:54:57 -07005929 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5930 STATUS_IN_SUSPEND |
5931 test_bit(STATUS_FW_ERROR, &priv->status) <<
5932 STATUS_FW_ERROR;
5933
5934 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005935 iwl3945_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
Zhu Yib481de92007-09-25 17:54:57 -07005936 spin_unlock_irqrestore(&priv->lock, flags);
5937
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005938 iwl3945_hw_txq_ctx_stop(priv);
5939 iwl3945_hw_rxq_stop(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005940
5941 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005942 if (!iwl3945_grab_nic_access(priv)) {
5943 iwl3945_write_prph(priv, APMG_CLK_DIS_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005944 APMG_CLK_VAL_DMA_CLK_RQT);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005945 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005946 }
5947 spin_unlock_irqrestore(&priv->lock, flags);
5948
5949 udelay(5);
5950
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005951 iwl3945_hw_nic_stop_master(priv);
5952 iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
5953 iwl3945_hw_nic_reset(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005954
5955 exit:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005956 memset(&priv->card_alive, 0, sizeof(struct iwl3945_alive_resp));
Zhu Yib481de92007-09-25 17:54:57 -07005957
5958 if (priv->ibss_beacon)
5959 dev_kfree_skb(priv->ibss_beacon);
5960 priv->ibss_beacon = NULL;
5961
5962 /* clear out any free frames */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005963 iwl3945_clear_free_frames(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005964}
5965
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005966static void iwl3945_down(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005967{
5968 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005969 __iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005970 mutex_unlock(&priv->mutex);
Zhu Yib24d22b2007-12-19 13:59:52 +08005971
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005972 iwl3945_cancel_deferred_work(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005973}
5974
5975#define MAX_HW_RESTARTS 5
5976
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005977static int __iwl3945_up(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005978{
5979 int rc, i;
5980
5981 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5982 IWL_WARNING("Exit pending; will not bring the NIC up\n");
5983 return -EIO;
5984 }
5985
5986 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
5987 IWL_WARNING("Radio disabled by SW RF kill (module "
5988 "parameter)\n");
Zhu Yie655b9f2008-01-24 02:19:38 -08005989 return -ENODEV;
5990 }
5991
Reinette Chatree903fbd2008-01-30 22:05:15 -08005992 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
5993 IWL_ERROR("ucode not available for device bringup\n");
5994 return -EIO;
5995 }
5996
Zhu Yie655b9f2008-01-24 02:19:38 -08005997 /* If platform's RF_KILL switch is NOT set to KILL */
5998 if (iwl3945_read32(priv, CSR_GP_CNTRL) &
5999 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
6000 clear_bit(STATUS_RF_KILL_HW, &priv->status);
6001 else {
6002 set_bit(STATUS_RF_KILL_HW, &priv->status);
6003 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
6004 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
6005 return -ENODEV;
6006 }
Zhu Yib481de92007-09-25 17:54:57 -07006007 }
6008
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006009 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
Zhu Yib481de92007-09-25 17:54:57 -07006010
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006011 rc = iwl3945_hw_nic_init(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006012 if (rc) {
6013 IWL_ERROR("Unable to int nic\n");
6014 return rc;
6015 }
6016
6017 /* make sure rfkill handshake bits are cleared */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006018 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6019 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR,
Zhu Yib481de92007-09-25 17:54:57 -07006020 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
6021
6022 /* clear (again), then enable host interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006023 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
6024 iwl3945_enable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006025
6026 /* really make sure rfkill handshake bits are cleared */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006027 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6028 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
Zhu Yib481de92007-09-25 17:54:57 -07006029
6030 /* Copy original ucode data image from disk into backup cache.
6031 * This will be used to initialize the on-board processor's
6032 * data SRAM for a clean start when the runtime program first loads. */
6033 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
Zhu Yi5a669262008-01-14 17:46:18 -08006034 priv->ucode_data.len);
Zhu Yib481de92007-09-25 17:54:57 -07006035
Zhu Yie655b9f2008-01-24 02:19:38 -08006036 /* We return success when we resume from suspend and rf_kill is on. */
6037 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
6038 return 0;
6039
Zhu Yib481de92007-09-25 17:54:57 -07006040 for (i = 0; i < MAX_HW_RESTARTS; i++) {
6041
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006042 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006043
6044 /* load bootstrap state machine,
6045 * load bootstrap program into processor's memory,
6046 * prepare to load the "initialize" uCode */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006047 rc = iwl3945_load_bsm(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006048
6049 if (rc) {
6050 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
6051 continue;
6052 }
6053
6054 /* start card; "initialize" will load runtime ucode */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006055 iwl3945_nic_start(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006056
Zhu Yib481de92007-09-25 17:54:57 -07006057 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
6058
6059 return 0;
6060 }
6061
6062 set_bit(STATUS_EXIT_PENDING, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006063 __iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006064
6065 /* tried to restart and config the device for as long as our
6066 * patience could withstand */
6067 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
6068 return -EIO;
6069}
6070
6071
6072/*****************************************************************************
6073 *
6074 * Workqueue callbacks
6075 *
6076 *****************************************************************************/
6077
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006078static void iwl3945_bg_init_alive_start(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006079{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006080 struct iwl3945_priv *priv =
6081 container_of(data, struct iwl3945_priv, init_alive_start.work);
Zhu Yib481de92007-09-25 17:54:57 -07006082
6083 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6084 return;
6085
6086 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006087 iwl3945_init_alive_start(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006088 mutex_unlock(&priv->mutex);
6089}
6090
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006091static void iwl3945_bg_alive_start(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006092{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006093 struct iwl3945_priv *priv =
6094 container_of(data, struct iwl3945_priv, alive_start.work);
Zhu Yib481de92007-09-25 17:54:57 -07006095
6096 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6097 return;
6098
6099 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006100 iwl3945_alive_start(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006101 mutex_unlock(&priv->mutex);
6102}
6103
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006104static void iwl3945_bg_rf_kill(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07006105{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006106 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, rf_kill);
Zhu Yib481de92007-09-25 17:54:57 -07006107
6108 wake_up_interruptible(&priv->wait_command_queue);
6109
6110 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6111 return;
6112
6113 mutex_lock(&priv->mutex);
6114
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006115 if (!iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006116 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
6117 "HW and/or SW RF Kill no longer active, restarting "
6118 "device\n");
6119 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6120 queue_work(priv->workqueue, &priv->restart);
6121 } else {
6122
6123 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
6124 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
6125 "disabled by SW switch\n");
6126 else
6127 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
6128 "Kill switch must be turned off for "
6129 "wireless networking to work.\n");
6130 }
6131 mutex_unlock(&priv->mutex);
6132}
6133
Abhijeet Kolekar5ec03972008-05-05 10:22:48 +08006134static void iwl3945_bg_set_monitor(struct work_struct *work)
6135{
6136 struct iwl3945_priv *priv = container_of(work,
6137 struct iwl3945_priv, set_monitor);
6138
6139 IWL_DEBUG(IWL_DL_STATE, "setting monitor mode\n");
6140
6141 mutex_lock(&priv->mutex);
6142
6143 if (!iwl3945_is_ready(priv))
6144 IWL_DEBUG(IWL_DL_STATE, "leave - not ready\n");
6145 else
6146 if (iwl3945_set_mode(priv, IEEE80211_IF_TYPE_MNTR) != 0)
6147 IWL_ERROR("iwl3945_set_mode() failed\n");
6148
6149 mutex_unlock(&priv->mutex);
6150}
6151
Zhu Yib481de92007-09-25 17:54:57 -07006152#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
6153
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006154static void iwl3945_bg_scan_check(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006155{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006156 struct iwl3945_priv *priv =
6157 container_of(data, struct iwl3945_priv, scan_check.work);
Zhu Yib481de92007-09-25 17:54:57 -07006158
6159 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6160 return;
6161
6162 mutex_lock(&priv->mutex);
6163 if (test_bit(STATUS_SCANNING, &priv->status) ||
6164 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6165 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
6166 "Scan completion watchdog resetting adapter (%dms)\n",
6167 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
Mohamed Abbas15e869d2007-10-25 17:15:46 +08006168
Zhu Yib481de92007-09-25 17:54:57 -07006169 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006170 iwl3945_send_scan_abort(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006171 }
6172 mutex_unlock(&priv->mutex);
6173}
6174
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006175static void iwl3945_bg_request_scan(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006176{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006177 struct iwl3945_priv *priv =
6178 container_of(data, struct iwl3945_priv, request_scan);
6179 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07006180 .id = REPLY_SCAN_CMD,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006181 .len = sizeof(struct iwl3945_scan_cmd),
Zhu Yib481de92007-09-25 17:54:57 -07006182 .meta.flags = CMD_SIZE_HUGE,
6183 };
6184 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006185 struct iwl3945_scan_cmd *scan;
Zhu Yib481de92007-09-25 17:54:57 -07006186 struct ieee80211_conf *conf = NULL;
6187 u8 direct_mask;
Johannes Berg8318d782008-01-24 19:38:38 +01006188 enum ieee80211_band band;
Zhu Yib481de92007-09-25 17:54:57 -07006189
6190 conf = ieee80211_get_hw_conf(priv->hw);
6191
6192 mutex_lock(&priv->mutex);
6193
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006194 if (!iwl3945_is_ready(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006195 IWL_WARNING("request scan called when driver not ready.\n");
6196 goto done;
6197 }
6198
6199 /* Make sure the scan wasn't cancelled before this queued work
6200 * was given the chance to run... */
6201 if (!test_bit(STATUS_SCANNING, &priv->status))
6202 goto done;
6203
6204 /* This should never be called or scheduled if there is currently
6205 * a scan active in the hardware. */
6206 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
6207 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
6208 "Ignoring second request.\n");
6209 rc = -EIO;
6210 goto done;
6211 }
6212
6213 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6214 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6215 goto done;
6216 }
6217
6218 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6219 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6220 goto done;
6221 }
6222
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006223 if (iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006224 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6225 goto done;
6226 }
6227
6228 if (!test_bit(STATUS_READY, &priv->status)) {
6229 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6230 goto done;
6231 }
6232
6233 if (!priv->scan_bands) {
6234 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6235 goto done;
6236 }
6237
6238 if (!priv->scan) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006239 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
Zhu Yib481de92007-09-25 17:54:57 -07006240 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
6241 if (!priv->scan) {
6242 rc = -ENOMEM;
6243 goto done;
6244 }
6245 }
6246 scan = priv->scan;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006247 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
Zhu Yib481de92007-09-25 17:54:57 -07006248
6249 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
6250 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
6251
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006252 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006253 u16 interval = 0;
6254 u32 extra;
6255 u32 suspend_time = 100;
6256 u32 scan_suspend_time = 100;
6257 unsigned long flags;
6258
6259 IWL_DEBUG_INFO("Scanning while associated...\n");
6260
6261 spin_lock_irqsave(&priv->lock, flags);
6262 interval = priv->beacon_int;
6263 spin_unlock_irqrestore(&priv->lock, flags);
6264
6265 scan->suspend_time = 0;
Mohamed Abbas15e869d2007-10-25 17:15:46 +08006266 scan->max_out_time = cpu_to_le32(200 * 1024);
Zhu Yib481de92007-09-25 17:54:57 -07006267 if (!interval)
6268 interval = suspend_time;
6269 /*
6270 * suspend time format:
6271 * 0-19: beacon interval in usec (time before exec.)
6272 * 20-23: 0
6273 * 24-31: number of beacons (suspend between channels)
6274 */
6275
6276 extra = (suspend_time / interval) << 24;
6277 scan_suspend_time = 0xFF0FFFFF &
6278 (extra | ((suspend_time % interval) * 1024));
6279
6280 scan->suspend_time = cpu_to_le32(scan_suspend_time);
6281 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
6282 scan_suspend_time, interval);
6283 }
6284
6285 /* We should add the ability for user to lock to PASSIVE ONLY */
6286 if (priv->one_direct_scan) {
6287 IWL_DEBUG_SCAN
6288 ("Kicking off one direct scan for '%s'\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006289 iwl3945_escape_essid(priv->direct_ssid,
Zhu Yib481de92007-09-25 17:54:57 -07006290 priv->direct_ssid_len));
6291 scan->direct_scan[0].id = WLAN_EID_SSID;
6292 scan->direct_scan[0].len = priv->direct_ssid_len;
6293 memcpy(scan->direct_scan[0].ssid,
6294 priv->direct_ssid, priv->direct_ssid_len);
6295 direct_mask = 1;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006296 } else if (!iwl3945_is_associated(priv) && priv->essid_len) {
Bill Moss786b4552008-04-17 16:03:40 -07006297 IWL_DEBUG_SCAN
6298 ("Kicking off one direct scan for '%s' when not associated\n",
6299 iwl3945_escape_essid(priv->essid, priv->essid_len));
Zhu Yib481de92007-09-25 17:54:57 -07006300 scan->direct_scan[0].id = WLAN_EID_SSID;
6301 scan->direct_scan[0].len = priv->essid_len;
6302 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
6303 direct_mask = 1;
Bill Moss786b4552008-04-17 16:03:40 -07006304 } else {
6305 IWL_DEBUG_SCAN("Kicking off one indirect scan.\n");
Zhu Yib481de92007-09-25 17:54:57 -07006306 direct_mask = 0;
Bill Moss786b4552008-04-17 16:03:40 -07006307 }
Zhu Yib481de92007-09-25 17:54:57 -07006308
6309 /* We don't build a direct scan probe request; the uCode will do
6310 * that based on the direct_mask added to each channel entry */
6311 scan->tx_cmd.len = cpu_to_le16(
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006312 iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
Cyrill Gorcunov18904f52008-01-26 19:09:36 +03006313 IWL_MAX_SCAN_SIZE - sizeof(*scan), 0));
Zhu Yib481de92007-09-25 17:54:57 -07006314 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
6315 scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
6316 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
6317
6318 /* flags + rate selection */
6319
6320 switch (priv->scan_bands) {
6321 case 2:
6322 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
6323 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
6324 scan->good_CRC_th = 0;
Johannes Berg8318d782008-01-24 19:38:38 +01006325 band = IEEE80211_BAND_2GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07006326 break;
6327
6328 case 1:
6329 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
6330 scan->good_CRC_th = IWL_GOOD_CRC_TH;
Johannes Berg8318d782008-01-24 19:38:38 +01006331 band = IEEE80211_BAND_5GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07006332 break;
6333
6334 default:
6335 IWL_WARNING("Invalid scan band count\n");
6336 goto done;
6337 }
6338
6339 /* select Rx antennas */
6340 scan->flags |= iwl3945_get_antenna_flags(priv);
6341
6342 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
6343 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
6344
Bill Moss786b4552008-04-17 16:03:40 -07006345 if (direct_mask)
Reinette Chatre26c0f032008-03-11 16:17:15 -07006346 scan->channel_count =
6347 iwl3945_get_channels_for_scan(
6348 priv, band, 1, /* active */
6349 direct_mask,
6350 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
Bill Moss786b4552008-04-17 16:03:40 -07006351 else
Reinette Chatre26c0f032008-03-11 16:17:15 -07006352 scan->channel_count =
6353 iwl3945_get_channels_for_scan(
6354 priv, band, 0, /* passive */
6355 direct_mask,
6356 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
Zhu Yib481de92007-09-25 17:54:57 -07006357
6358 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006359 scan->channel_count * sizeof(struct iwl3945_scan_channel);
Zhu Yib481de92007-09-25 17:54:57 -07006360 cmd.data = scan;
6361 scan->len = cpu_to_le16(cmd.len);
6362
6363 set_bit(STATUS_SCAN_HW, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006364 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07006365 if (rc)
6366 goto done;
6367
6368 queue_delayed_work(priv->workqueue, &priv->scan_check,
6369 IWL_SCAN_CHECK_WATCHDOG);
6370
6371 mutex_unlock(&priv->mutex);
6372 return;
6373
6374 done:
Ian Schram01ebd062007-10-25 17:15:22 +08006375 /* inform mac80211 scan aborted */
Zhu Yib481de92007-09-25 17:54:57 -07006376 queue_work(priv->workqueue, &priv->scan_completed);
6377 mutex_unlock(&priv->mutex);
6378}
6379
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006380static void iwl3945_bg_up(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006381{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006382 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, up);
Zhu Yib481de92007-09-25 17:54:57 -07006383
6384 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6385 return;
6386
6387 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006388 __iwl3945_up(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006389 mutex_unlock(&priv->mutex);
6390}
6391
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006392static void iwl3945_bg_restart(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006393{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006394 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, restart);
Zhu Yib481de92007-09-25 17:54:57 -07006395
6396 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6397 return;
6398
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006399 iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006400 queue_work(priv->workqueue, &priv->up);
6401}
6402
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006403static void iwl3945_bg_rx_replenish(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006404{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006405 struct iwl3945_priv *priv =
6406 container_of(data, struct iwl3945_priv, rx_replenish);
Zhu Yib481de92007-09-25 17:54:57 -07006407
6408 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6409 return;
6410
6411 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006412 iwl3945_rx_replenish(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006413 mutex_unlock(&priv->mutex);
6414}
6415
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08006416#define IWL_DELAY_NEXT_SCAN (HZ*2)
6417
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006418static void iwl3945_bg_post_associate(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006419{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006420 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv,
Zhu Yib481de92007-09-25 17:54:57 -07006421 post_associate.work);
6422
6423 int rc = 0;
6424 struct ieee80211_conf *conf = NULL;
Joe Perches0795af52007-10-03 17:59:30 -07006425 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07006426
6427 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6428 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
6429 return;
6430 }
6431
6432
Joe Perches0795af52007-10-03 17:59:30 -07006433 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
6434 priv->assoc_id,
6435 print_mac(mac, priv->active_rxon.bssid_addr));
Zhu Yib481de92007-09-25 17:54:57 -07006436
6437 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6438 return;
6439
6440 mutex_lock(&priv->mutex);
6441
Johannes Berg32bfd352007-12-19 01:31:26 +01006442 if (!priv->vif || !priv->is_open) {
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08006443 mutex_unlock(&priv->mutex);
6444 return;
6445 }
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006446 iwl3945_scan_cancel_timeout(priv, 200);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08006447
Zhu Yib481de92007-09-25 17:54:57 -07006448 conf = ieee80211_get_hw_conf(priv->hw);
6449
6450 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006451 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006452
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006453 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
6454 iwl3945_setup_rxon_timing(priv);
6455 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
Zhu Yib481de92007-09-25 17:54:57 -07006456 sizeof(priv->rxon_timing), &priv->rxon_timing);
6457 if (rc)
6458 IWL_WARNING("REPLY_RXON_TIMING failed - "
6459 "Attempting to continue.\n");
6460
6461 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6462
6463 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6464
6465 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
6466 priv->assoc_id, priv->beacon_int);
6467
6468 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6469 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6470 else
6471 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6472
6473 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6474 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
6475 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
6476 else
6477 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6478
6479 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6480 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6481
6482 }
6483
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006484 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006485
6486 switch (priv->iw_mode) {
6487 case IEEE80211_IF_TYPE_STA:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006488 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
Zhu Yib481de92007-09-25 17:54:57 -07006489 break;
6490
6491 case IEEE80211_IF_TYPE_IBSS:
6492
6493 /* clear out the station table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006494 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006495
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006496 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
6497 iwl3945_add_station(priv, priv->bssid, 0, 0);
Zhu Yib481de92007-09-25 17:54:57 -07006498 iwl3945_sync_sta(priv, IWL_STA_ID,
Johannes Berg8318d782008-01-24 19:38:38 +01006499 (priv->band == IEEE80211_BAND_5GHZ) ?
Zhu Yib481de92007-09-25 17:54:57 -07006500 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
6501 CMD_ASYNC);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006502 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
6503 iwl3945_send_beacon_cmd(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006504
6505 break;
6506
6507 default:
6508 IWL_ERROR("%s Should not be called in %d mode\n",
Ian Schrambc434dd2007-10-25 17:15:29 +08006509 __FUNCTION__, priv->iw_mode);
Zhu Yib481de92007-09-25 17:54:57 -07006510 break;
6511 }
6512
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006513 iwl3945_sequence_reset(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006514
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006515 iwl3945_activate_qos(priv, 0);
Ron Rindjunsky292ae172008-02-06 11:20:39 -08006516
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08006517 /* we have just associated, don't start scan too early */
6518 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
Zhu Yib481de92007-09-25 17:54:57 -07006519 mutex_unlock(&priv->mutex);
6520}
6521
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006522static void iwl3945_bg_abort_scan(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07006523{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006524 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, abort_scan);
Zhu Yib481de92007-09-25 17:54:57 -07006525
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006526 if (!iwl3945_is_ready(priv))
Zhu Yib481de92007-09-25 17:54:57 -07006527 return;
6528
6529 mutex_lock(&priv->mutex);
6530
6531 set_bit(STATUS_SCAN_ABORTING, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006532 iwl3945_send_scan_abort(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006533
6534 mutex_unlock(&priv->mutex);
6535}
6536
Zhu Yi76bb77e2007-11-22 10:53:22 +08006537static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
6538
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006539static void iwl3945_bg_scan_completed(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07006540{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006541 struct iwl3945_priv *priv =
6542 container_of(work, struct iwl3945_priv, scan_completed);
Zhu Yib481de92007-09-25 17:54:57 -07006543
6544 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6545
6546 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6547 return;
6548
Zhu Yia0646472007-12-20 14:10:01 +08006549 if (test_bit(STATUS_CONF_PENDING, &priv->status))
6550 iwl3945_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
Zhu Yi76bb77e2007-11-22 10:53:22 +08006551
Zhu Yib481de92007-09-25 17:54:57 -07006552 ieee80211_scan_completed(priv->hw);
6553
6554 /* Since setting the TXPOWER may have been deferred while
6555 * performing the scan, fire one off */
6556 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006557 iwl3945_hw_reg_send_txpower(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006558 mutex_unlock(&priv->mutex);
6559}
6560
6561/*****************************************************************************
6562 *
6563 * mac80211 entry point functions
6564 *
6565 *****************************************************************************/
6566
Zhu Yi5a669262008-01-14 17:46:18 -08006567#define UCODE_READY_TIMEOUT (2 * HZ)
6568
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006569static int iwl3945_mac_start(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07006570{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006571 struct iwl3945_priv *priv = hw->priv;
Zhu Yi5a669262008-01-14 17:46:18 -08006572 int ret;
Zhu Yib481de92007-09-25 17:54:57 -07006573
6574 IWL_DEBUG_MAC80211("enter\n");
6575
Zhu Yi5a669262008-01-14 17:46:18 -08006576 if (pci_enable_device(priv->pci_dev)) {
6577 IWL_ERROR("Fail to pci_enable_device\n");
6578 return -ENODEV;
6579 }
6580 pci_restore_state(priv->pci_dev);
6581 pci_enable_msi(priv->pci_dev);
6582
6583 ret = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
6584 DRV_NAME, priv);
6585 if (ret) {
6586 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
6587 goto out_disable_msi;
6588 }
6589
Zhu Yib481de92007-09-25 17:54:57 -07006590 /* we should be verifying the device is ready to be opened */
6591 mutex_lock(&priv->mutex);
6592
Zhu Yi5a669262008-01-14 17:46:18 -08006593 memset(&priv->staging_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
6594 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
6595 * ucode filename and max sizes are card-specific. */
6596
6597 if (!priv->ucode_code.len) {
6598 ret = iwl3945_read_ucode(priv);
6599 if (ret) {
6600 IWL_ERROR("Could not read microcode: %d\n", ret);
6601 mutex_unlock(&priv->mutex);
6602 goto out_release_irq;
6603 }
6604 }
6605
Zhu Yie655b9f2008-01-24 02:19:38 -08006606 ret = __iwl3945_up(priv);
Zhu Yi5a669262008-01-14 17:46:18 -08006607
Zhu Yib481de92007-09-25 17:54:57 -07006608 mutex_unlock(&priv->mutex);
Zhu Yi5a669262008-01-14 17:46:18 -08006609
Zhu Yie655b9f2008-01-24 02:19:38 -08006610 if (ret)
6611 goto out_release_irq;
6612
6613 IWL_DEBUG_INFO("Start UP work.\n");
6614
6615 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
6616 return 0;
6617
Zhu Yi5a669262008-01-14 17:46:18 -08006618 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
6619 * mac80211 will not be run successfully. */
6620 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
6621 test_bit(STATUS_READY, &priv->status),
6622 UCODE_READY_TIMEOUT);
6623 if (!ret) {
6624 if (!test_bit(STATUS_READY, &priv->status)) {
6625 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
6626 jiffies_to_msecs(UCODE_READY_TIMEOUT));
6627 ret = -ETIMEDOUT;
6628 goto out_release_irq;
6629 }
6630 }
6631
Zhu Yie655b9f2008-01-24 02:19:38 -08006632 priv->is_open = 1;
Zhu Yib481de92007-09-25 17:54:57 -07006633 IWL_DEBUG_MAC80211("leave\n");
6634 return 0;
Zhu Yi5a669262008-01-14 17:46:18 -08006635
6636out_release_irq:
6637 free_irq(priv->pci_dev->irq, priv);
6638out_disable_msi:
6639 pci_disable_msi(priv->pci_dev);
Zhu Yie655b9f2008-01-24 02:19:38 -08006640 pci_disable_device(priv->pci_dev);
6641 priv->is_open = 0;
6642 IWL_DEBUG_MAC80211("leave - failed\n");
Zhu Yi5a669262008-01-14 17:46:18 -08006643 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07006644}
6645
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006646static void iwl3945_mac_stop(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07006647{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006648 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07006649
6650 IWL_DEBUG_MAC80211("enter\n");
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08006651
Zhu Yie655b9f2008-01-24 02:19:38 -08006652 if (!priv->is_open) {
6653 IWL_DEBUG_MAC80211("leave - skip\n");
6654 return;
6655 }
6656
Zhu Yib481de92007-09-25 17:54:57 -07006657 priv->is_open = 0;
Zhu Yi5a669262008-01-14 17:46:18 -08006658
6659 if (iwl3945_is_ready_rf(priv)) {
Zhu Yie655b9f2008-01-24 02:19:38 -08006660 /* stop mac, cancel any scan request and clear
6661 * RXON_FILTER_ASSOC_MSK BIT
6662 */
Zhu Yi5a669262008-01-14 17:46:18 -08006663 mutex_lock(&priv->mutex);
6664 iwl3945_scan_cancel_timeout(priv, 100);
6665 cancel_delayed_work(&priv->post_associate);
Mohamed Abbasfde35712007-11-29 11:10:15 +08006666 mutex_unlock(&priv->mutex);
Mohamed Abbasfde35712007-11-29 11:10:15 +08006667 }
6668
Zhu Yi5a669262008-01-14 17:46:18 -08006669 iwl3945_down(priv);
6670
6671 flush_workqueue(priv->workqueue);
6672 free_irq(priv->pci_dev->irq, priv);
6673 pci_disable_msi(priv->pci_dev);
6674 pci_save_state(priv->pci_dev);
6675 pci_disable_device(priv->pci_dev);
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08006676
Zhu Yib481de92007-09-25 17:54:57 -07006677 IWL_DEBUG_MAC80211("leave\n");
Zhu Yib481de92007-09-25 17:54:57 -07006678}
6679
Johannes Berge039fa42008-05-15 12:55:29 +02006680static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
Zhu Yib481de92007-09-25 17:54:57 -07006681{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006682 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07006683
6684 IWL_DEBUG_MAC80211("enter\n");
6685
6686 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
6687 IWL_DEBUG_MAC80211("leave - monitor\n");
6688 return -1;
6689 }
6690
6691 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
Johannes Berge039fa42008-05-15 12:55:29 +02006692 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
Zhu Yib481de92007-09-25 17:54:57 -07006693
Johannes Berge039fa42008-05-15 12:55:29 +02006694 if (iwl3945_tx_skb(priv, skb))
Zhu Yib481de92007-09-25 17:54:57 -07006695 dev_kfree_skb_any(skb);
6696
6697 IWL_DEBUG_MAC80211("leave\n");
6698 return 0;
6699}
6700
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006701static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07006702 struct ieee80211_if_init_conf *conf)
6703{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006704 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07006705 unsigned long flags;
Joe Perches0795af52007-10-03 17:59:30 -07006706 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07006707
Johannes Berg32bfd352007-12-19 01:31:26 +01006708 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
Zhu Yib481de92007-09-25 17:54:57 -07006709
Johannes Berg32bfd352007-12-19 01:31:26 +01006710 if (priv->vif) {
6711 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
Tomas Winkler864792e2007-11-27 21:00:52 +02006712 return -EOPNOTSUPP;
Zhu Yib481de92007-09-25 17:54:57 -07006713 }
6714
6715 spin_lock_irqsave(&priv->lock, flags);
Johannes Berg32bfd352007-12-19 01:31:26 +01006716 priv->vif = conf->vif;
Zhu Yib481de92007-09-25 17:54:57 -07006717
6718 spin_unlock_irqrestore(&priv->lock, flags);
6719
6720 mutex_lock(&priv->mutex);
Tomas Winkler864792e2007-11-27 21:00:52 +02006721
6722 if (conf->mac_addr) {
6723 IWL_DEBUG_MAC80211("Set: %s\n", print_mac(mac, conf->mac_addr));
6724 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
6725 }
6726
Zhu Yi5a669262008-01-14 17:46:18 -08006727 if (iwl3945_is_ready(priv))
6728 iwl3945_set_mode(priv, conf->type);
Zhu Yib481de92007-09-25 17:54:57 -07006729
Zhu Yib481de92007-09-25 17:54:57 -07006730 mutex_unlock(&priv->mutex);
6731
Zhu Yi5a669262008-01-14 17:46:18 -08006732 IWL_DEBUG_MAC80211("leave\n");
Zhu Yib481de92007-09-25 17:54:57 -07006733 return 0;
6734}
6735
6736/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006737 * iwl3945_mac_config - mac80211 config callback
Zhu Yib481de92007-09-25 17:54:57 -07006738 *
6739 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
6740 * be set inappropriately and the driver currently sets the hardware up to
6741 * use it whenever needed.
6742 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006743static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
Zhu Yib481de92007-09-25 17:54:57 -07006744{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006745 struct iwl3945_priv *priv = hw->priv;
6746 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07006747 unsigned long flags;
Zhu Yi76bb77e2007-11-22 10:53:22 +08006748 int ret = 0;
Zhu Yib481de92007-09-25 17:54:57 -07006749
6750 mutex_lock(&priv->mutex);
Johannes Berg8318d782008-01-24 19:38:38 +01006751 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
Zhu Yib481de92007-09-25 17:54:57 -07006752
Zhu Yi12342c42007-12-20 11:27:32 +08006753 priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
6754
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006755 if (!iwl3945_is_ready(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006756 IWL_DEBUG_MAC80211("leave - not ready\n");
Zhu Yi76bb77e2007-11-22 10:53:22 +08006757 ret = -EIO;
6758 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07006759 }
6760
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006761 if (unlikely(!iwl3945_param_disable_hw_scan &&
Zhu Yib481de92007-09-25 17:54:57 -07006762 test_bit(STATUS_SCANNING, &priv->status))) {
Zhu Yia0646472007-12-20 14:10:01 +08006763 IWL_DEBUG_MAC80211("leave - scanning\n");
6764 set_bit(STATUS_CONF_PENDING, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -07006765 mutex_unlock(&priv->mutex);
Zhu Yia0646472007-12-20 14:10:01 +08006766 return 0;
Zhu Yib481de92007-09-25 17:54:57 -07006767 }
6768
6769 spin_lock_irqsave(&priv->lock, flags);
6770
Johannes Berg8318d782008-01-24 19:38:38 +01006771 ch_info = iwl3945_get_channel_info(priv, conf->channel->band,
6772 conf->channel->hw_value);
Zhu Yib481de92007-09-25 17:54:57 -07006773 if (!is_channel_valid(ch_info)) {
6774 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
Johannes Berg8318d782008-01-24 19:38:38 +01006775 conf->channel->hw_value, conf->channel->band);
Zhu Yib481de92007-09-25 17:54:57 -07006776 IWL_DEBUG_MAC80211("leave - invalid channel\n");
6777 spin_unlock_irqrestore(&priv->lock, flags);
Zhu Yi76bb77e2007-11-22 10:53:22 +08006778 ret = -EINVAL;
6779 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07006780 }
6781
Johannes Berg8318d782008-01-24 19:38:38 +01006782 iwl3945_set_rxon_channel(priv, conf->channel->band, conf->channel->hw_value);
Zhu Yib481de92007-09-25 17:54:57 -07006783
Johannes Berg8318d782008-01-24 19:38:38 +01006784 iwl3945_set_flags_for_phymode(priv, conf->channel->band);
Zhu Yib481de92007-09-25 17:54:57 -07006785
6786 /* The list of supported rates and rate mask can be different
6787 * for each phymode; since the phymode may have changed, reset
6788 * the rate mask to what mac80211 lists */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006789 iwl3945_set_rate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006790
6791 spin_unlock_irqrestore(&priv->lock, flags);
6792
6793#ifdef IEEE80211_CONF_CHANNEL_SWITCH
6794 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006795 iwl3945_hw_channel_switch(priv, conf->channel);
Zhu Yi76bb77e2007-11-22 10:53:22 +08006796 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07006797 }
6798#endif
6799
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006800 iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
Zhu Yib481de92007-09-25 17:54:57 -07006801
6802 if (!conf->radio_enabled) {
6803 IWL_DEBUG_MAC80211("leave - radio disabled\n");
Zhu Yi76bb77e2007-11-22 10:53:22 +08006804 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07006805 }
6806
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006807 if (iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006808 IWL_DEBUG_MAC80211("leave - RF kill\n");
Zhu Yi76bb77e2007-11-22 10:53:22 +08006809 ret = -EIO;
6810 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07006811 }
6812
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006813 iwl3945_set_rate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006814
6815 if (memcmp(&priv->active_rxon,
6816 &priv->staging_rxon, sizeof(priv->staging_rxon)))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006817 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006818 else
6819 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
6820
6821 IWL_DEBUG_MAC80211("leave\n");
6822
Zhu Yi76bb77e2007-11-22 10:53:22 +08006823out:
Zhu Yia0646472007-12-20 14:10:01 +08006824 clear_bit(STATUS_CONF_PENDING, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -07006825 mutex_unlock(&priv->mutex);
Zhu Yi76bb77e2007-11-22 10:53:22 +08006826 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07006827}
6828
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006829static void iwl3945_config_ap(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006830{
6831 int rc = 0;
6832
Maarten Lankhorstd986bcd2008-01-23 10:15:16 -08006833 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
Zhu Yib481de92007-09-25 17:54:57 -07006834 return;
6835
6836 /* The following should be done only at AP bring up */
6837 if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
6838
6839 /* RXON - unassoc (to set timing command) */
6840 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006841 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006842
6843 /* RXON Timing */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006844 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
6845 iwl3945_setup_rxon_timing(priv);
6846 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
Zhu Yib481de92007-09-25 17:54:57 -07006847 sizeof(priv->rxon_timing), &priv->rxon_timing);
6848 if (rc)
6849 IWL_WARNING("REPLY_RXON_TIMING failed - "
6850 "Attempting to continue.\n");
6851
6852 /* FIXME: what should be the assoc_id for AP? */
6853 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6854 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6855 priv->staging_rxon.flags |=
6856 RXON_FLG_SHORT_PREAMBLE_MSK;
6857 else
6858 priv->staging_rxon.flags &=
6859 ~RXON_FLG_SHORT_PREAMBLE_MSK;
6860
6861 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6862 if (priv->assoc_capability &
6863 WLAN_CAPABILITY_SHORT_SLOT_TIME)
6864 priv->staging_rxon.flags |=
6865 RXON_FLG_SHORT_SLOT_MSK;
6866 else
6867 priv->staging_rxon.flags &=
6868 ~RXON_FLG_SHORT_SLOT_MSK;
6869
6870 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6871 priv->staging_rxon.flags &=
6872 ~RXON_FLG_SHORT_SLOT_MSK;
6873 }
6874 /* restore RXON assoc */
6875 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006876 iwl3945_commit_rxon(priv);
6877 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
Zhu Yi556f8db2007-09-27 11:27:33 +08006878 }
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006879 iwl3945_send_beacon_cmd(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006880
6881 /* FIXME - we need to add code here to detect a totally new
6882 * configuration, reset the AP, unassoc, rxon timing, assoc,
6883 * clear sta table, add BCAST sta... */
6884}
6885
Johannes Berg32bfd352007-12-19 01:31:26 +01006886static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
6887 struct ieee80211_vif *vif,
Zhu Yib481de92007-09-25 17:54:57 -07006888 struct ieee80211_if_conf *conf)
6889{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006890 struct iwl3945_priv *priv = hw->priv;
Joe Perches0795af52007-10-03 17:59:30 -07006891 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07006892 unsigned long flags;
6893 int rc;
6894
6895 if (conf == NULL)
6896 return -EIO;
6897
Emmanuel Grumbachb716bb92008-03-04 18:09:32 -08006898 if (priv->vif != vif) {
6899 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
Emmanuel Grumbachb716bb92008-03-04 18:09:32 -08006900 return 0;
6901 }
6902
Johannes Berg4150c572007-09-17 01:29:23 -04006903 /* XXX: this MUST use conf->mac_addr */
6904
Zhu Yib481de92007-09-25 17:54:57 -07006905 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
6906 (!conf->beacon || !conf->ssid_len)) {
6907 IWL_DEBUG_MAC80211
6908 ("Leaving in AP mode because HostAPD is not ready.\n");
6909 return 0;
6910 }
6911
Zhu Yi5a669262008-01-14 17:46:18 -08006912 if (!iwl3945_is_alive(priv))
6913 return -EAGAIN;
6914
Zhu Yib481de92007-09-25 17:54:57 -07006915 mutex_lock(&priv->mutex);
6916
Zhu Yib481de92007-09-25 17:54:57 -07006917 if (conf->bssid)
Joe Perches0795af52007-10-03 17:59:30 -07006918 IWL_DEBUG_MAC80211("bssid: %s\n",
6919 print_mac(mac, conf->bssid));
Zhu Yib481de92007-09-25 17:54:57 -07006920
Johannes Berg4150c572007-09-17 01:29:23 -04006921/*
6922 * very dubious code was here; the probe filtering flag is never set:
6923 *
Zhu Yib481de92007-09-25 17:54:57 -07006924 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
6925 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
Johannes Berg4150c572007-09-17 01:29:23 -04006926 */
Zhu Yib481de92007-09-25 17:54:57 -07006927
6928 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6929 if (!conf->bssid) {
6930 conf->bssid = priv->mac_addr;
6931 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
Joe Perches0795af52007-10-03 17:59:30 -07006932 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
6933 print_mac(mac, conf->bssid));
Zhu Yib481de92007-09-25 17:54:57 -07006934 }
6935 if (priv->ibss_beacon)
6936 dev_kfree_skb(priv->ibss_beacon);
6937
6938 priv->ibss_beacon = conf->beacon;
6939 }
6940
Mohamed Abbasfde35712007-11-29 11:10:15 +08006941 if (iwl3945_is_rfkill(priv))
6942 goto done;
6943
Zhu Yib481de92007-09-25 17:54:57 -07006944 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
6945 !is_multicast_ether_addr(conf->bssid)) {
6946 /* If there is currently a HW scan going on in the background
6947 * then we need to cancel it else the RXON below will fail. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006948 if (iwl3945_scan_cancel_timeout(priv, 100)) {
Zhu Yib481de92007-09-25 17:54:57 -07006949 IWL_WARNING("Aborted scan still in progress "
6950 "after 100ms\n");
6951 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
6952 mutex_unlock(&priv->mutex);
6953 return -EAGAIN;
6954 }
6955 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
6956
6957 /* TODO: Audit driver for usage of these members and see
6958 * if mac80211 deprecates them (priv->bssid looks like it
6959 * shouldn't be there, but I haven't scanned the IBSS code
6960 * to verify) - jpk */
6961 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
6962
6963 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006964 iwl3945_config_ap(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006965 else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006966 rc = iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006967 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006968 iwl3945_add_station(priv,
Zhu Yi556f8db2007-09-27 11:27:33 +08006969 priv->active_rxon.bssid_addr, 1, 0);
Zhu Yib481de92007-09-25 17:54:57 -07006970 }
6971
6972 } else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006973 iwl3945_scan_cancel_timeout(priv, 100);
Zhu Yib481de92007-09-25 17:54:57 -07006974 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006975 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006976 }
6977
Mohamed Abbasfde35712007-11-29 11:10:15 +08006978 done:
Zhu Yib481de92007-09-25 17:54:57 -07006979 spin_lock_irqsave(&priv->lock, flags);
6980 if (!conf->ssid_len)
6981 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
6982 else
6983 memcpy(priv->essid, conf->ssid, conf->ssid_len);
6984
6985 priv->essid_len = conf->ssid_len;
6986 spin_unlock_irqrestore(&priv->lock, flags);
6987
6988 IWL_DEBUG_MAC80211("leave\n");
6989 mutex_unlock(&priv->mutex);
6990
6991 return 0;
6992}
6993
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006994static void iwl3945_configure_filter(struct ieee80211_hw *hw,
Johannes Berg4150c572007-09-17 01:29:23 -04006995 unsigned int changed_flags,
6996 unsigned int *total_flags,
6997 int mc_count, struct dev_addr_list *mc_list)
6998{
6999 /*
7000 * XXX: dummy
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007001 * see also iwl3945_connection_init_rx_config
Johannes Berg4150c572007-09-17 01:29:23 -04007002 */
Abhijeet Kolekar5ec03972008-05-05 10:22:48 +08007003 struct iwl3945_priv *priv = hw->priv;
7004 int new_flags = 0;
7005 if (changed_flags & (FIF_PROMISC_IN_BSS | FIF_OTHER_BSS)) {
7006 if (*total_flags & (FIF_PROMISC_IN_BSS | FIF_OTHER_BSS)) {
7007 IWL_DEBUG_MAC80211("Enter: type %d (0x%x, 0x%x)\n",
7008 IEEE80211_IF_TYPE_MNTR,
7009 changed_flags, *total_flags);
7010 /* queue work 'cuz mac80211 is holding a lock which
7011 * prevents us from issuing (synchronous) f/w cmds */
7012 queue_work(priv->workqueue, &priv->set_monitor);
7013 new_flags &= FIF_PROMISC_IN_BSS |
7014 FIF_OTHER_BSS |
7015 FIF_ALLMULTI;
7016 }
7017 }
7018 *total_flags = new_flags;
Johannes Berg4150c572007-09-17 01:29:23 -04007019}
7020
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007021static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07007022 struct ieee80211_if_init_conf *conf)
7023{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007024 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007025
7026 IWL_DEBUG_MAC80211("enter\n");
7027
7028 mutex_lock(&priv->mutex);
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08007029
Mohamed Abbasfde35712007-11-29 11:10:15 +08007030 if (iwl3945_is_ready_rf(priv)) {
7031 iwl3945_scan_cancel_timeout(priv, 100);
7032 cancel_delayed_work(&priv->post_associate);
7033 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7034 iwl3945_commit_rxon(priv);
7035 }
Johannes Berg32bfd352007-12-19 01:31:26 +01007036 if (priv->vif == conf->vif) {
7037 priv->vif = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07007038 memset(priv->bssid, 0, ETH_ALEN);
7039 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7040 priv->essid_len = 0;
7041 }
7042 mutex_unlock(&priv->mutex);
7043
7044 IWL_DEBUG_MAC80211("leave\n");
Zhu Yib481de92007-09-25 17:54:57 -07007045}
7046
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007047static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
Zhu Yib481de92007-09-25 17:54:57 -07007048{
7049 int rc = 0;
7050 unsigned long flags;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007051 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007052
7053 IWL_DEBUG_MAC80211("enter\n");
7054
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007055 mutex_lock(&priv->mutex);
Zhu Yib481de92007-09-25 17:54:57 -07007056 spin_lock_irqsave(&priv->lock, flags);
7057
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007058 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007059 rc = -EIO;
7060 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
7061 goto out_unlock;
7062 }
7063
7064 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
7065 rc = -EIO;
7066 IWL_ERROR("ERROR: APs don't scan\n");
7067 goto out_unlock;
7068 }
7069
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08007070 /* we don't schedule scan within next_scan_jiffies period */
7071 if (priv->next_scan_jiffies &&
7072 time_after(priv->next_scan_jiffies, jiffies)) {
7073 rc = -EAGAIN;
7074 goto out_unlock;
7075 }
Bill Moss15dbf1b2008-05-06 11:05:15 +08007076 /* if we just finished scan ask for delay for a broadcast scan */
7077 if ((len == 0) && priv->last_scan_jiffies &&
7078 time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
7079 jiffies)) {
Zhu Yib481de92007-09-25 17:54:57 -07007080 rc = -EAGAIN;
7081 goto out_unlock;
7082 }
7083 if (len) {
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08007084 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007085 iwl3945_escape_essid(ssid, len), (int)len);
Zhu Yib481de92007-09-25 17:54:57 -07007086
7087 priv->one_direct_scan = 1;
7088 priv->direct_ssid_len = (u8)
7089 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
7090 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08007091 } else
7092 priv->one_direct_scan = 0;
Zhu Yib481de92007-09-25 17:54:57 -07007093
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007094 rc = iwl3945_scan_initiate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007095
7096 IWL_DEBUG_MAC80211("leave\n");
7097
7098out_unlock:
7099 spin_unlock_irqrestore(&priv->lock, flags);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007100 mutex_unlock(&priv->mutex);
Zhu Yib481de92007-09-25 17:54:57 -07007101
7102 return rc;
7103}
7104
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007105static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
Zhu Yib481de92007-09-25 17:54:57 -07007106 const u8 *local_addr, const u8 *addr,
7107 struct ieee80211_key_conf *key)
7108{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007109 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007110 int rc = 0;
7111 u8 sta_id;
7112
7113 IWL_DEBUG_MAC80211("enter\n");
7114
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007115 if (!iwl3945_param_hwcrypto) {
Zhu Yib481de92007-09-25 17:54:57 -07007116 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7117 return -EOPNOTSUPP;
7118 }
7119
7120 if (is_zero_ether_addr(addr))
7121 /* only support pairwise keys */
7122 return -EOPNOTSUPP;
7123
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007124 sta_id = iwl3945_hw_find_station(priv, addr);
Zhu Yib481de92007-09-25 17:54:57 -07007125 if (sta_id == IWL_INVALID_STATION) {
Joe Perches0795af52007-10-03 17:59:30 -07007126 DECLARE_MAC_BUF(mac);
7127
7128 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
7129 print_mac(mac, addr));
Zhu Yib481de92007-09-25 17:54:57 -07007130 return -EINVAL;
7131 }
7132
7133 mutex_lock(&priv->mutex);
7134
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007135 iwl3945_scan_cancel_timeout(priv, 100);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007136
Zhu Yib481de92007-09-25 17:54:57 -07007137 switch (cmd) {
7138 case SET_KEY:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007139 rc = iwl3945_update_sta_key_info(priv, key, sta_id);
Zhu Yib481de92007-09-25 17:54:57 -07007140 if (!rc) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007141 iwl3945_set_rxon_hwcrypto(priv, 1);
7142 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007143 key->hw_key_idx = sta_id;
7144 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
7145 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
7146 }
7147 break;
7148 case DISABLE_KEY:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007149 rc = iwl3945_clear_sta_key_info(priv, sta_id);
Zhu Yib481de92007-09-25 17:54:57 -07007150 if (!rc) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007151 iwl3945_set_rxon_hwcrypto(priv, 0);
7152 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007153 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
7154 }
7155 break;
7156 default:
7157 rc = -EINVAL;
7158 }
7159
7160 IWL_DEBUG_MAC80211("leave\n");
7161 mutex_unlock(&priv->mutex);
7162
7163 return rc;
7164}
7165
Johannes Berge100bb62008-04-30 18:51:21 +02007166static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
Zhu Yib481de92007-09-25 17:54:57 -07007167 const struct ieee80211_tx_queue_params *params)
7168{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007169 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007170 unsigned long flags;
7171 int q;
Zhu Yib481de92007-09-25 17:54:57 -07007172
7173 IWL_DEBUG_MAC80211("enter\n");
7174
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007175 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007176 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7177 return -EIO;
7178 }
7179
7180 if (queue >= AC_NUM) {
7181 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7182 return 0;
7183 }
7184
Zhu Yib481de92007-09-25 17:54:57 -07007185 if (!priv->qos_data.qos_enable) {
7186 priv->qos_data.qos_active = 0;
7187 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
7188 return 0;
7189 }
7190 q = AC_NUM - 1 - queue;
7191
7192 spin_lock_irqsave(&priv->lock, flags);
7193
7194 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7195 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7196 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7197 priv->qos_data.def_qos_parm.ac[q].edca_txop =
Johannes Berg3330d7be2008-02-10 16:49:38 +01007198 cpu_to_le16((params->txop * 32));
Zhu Yib481de92007-09-25 17:54:57 -07007199
7200 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7201 priv->qos_data.qos_active = 1;
7202
7203 spin_unlock_irqrestore(&priv->lock, flags);
7204
7205 mutex_lock(&priv->mutex);
7206 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007207 iwl3945_activate_qos(priv, 1);
7208 else if (priv->assoc_id && iwl3945_is_associated(priv))
7209 iwl3945_activate_qos(priv, 0);
Zhu Yib481de92007-09-25 17:54:57 -07007210
7211 mutex_unlock(&priv->mutex);
7212
Zhu Yib481de92007-09-25 17:54:57 -07007213 IWL_DEBUG_MAC80211("leave\n");
7214 return 0;
7215}
7216
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007217static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07007218 struct ieee80211_tx_queue_stats *stats)
7219{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007220 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007221 int i, avail;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007222 struct iwl3945_tx_queue *txq;
7223 struct iwl3945_queue *q;
Zhu Yib481de92007-09-25 17:54:57 -07007224 unsigned long flags;
7225
7226 IWL_DEBUG_MAC80211("enter\n");
7227
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007228 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007229 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7230 return -EIO;
7231 }
7232
7233 spin_lock_irqsave(&priv->lock, flags);
7234
7235 for (i = 0; i < AC_NUM; i++) {
7236 txq = &priv->txq[i];
7237 q = &txq->q;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007238 avail = iwl3945_queue_space(q);
Zhu Yib481de92007-09-25 17:54:57 -07007239
Johannes Berg57ffc582008-04-29 17:18:59 +02007240 stats[i].len = q->n_window - avail;
7241 stats[i].limit = q->n_window - q->high_mark;
7242 stats[i].count = q->n_window;
Zhu Yib481de92007-09-25 17:54:57 -07007243
7244 }
7245 spin_unlock_irqrestore(&priv->lock, flags);
7246
7247 IWL_DEBUG_MAC80211("leave\n");
7248
7249 return 0;
7250}
7251
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007252static int iwl3945_mac_get_stats(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07007253 struct ieee80211_low_level_stats *stats)
7254{
7255 IWL_DEBUG_MAC80211("enter\n");
7256 IWL_DEBUG_MAC80211("leave\n");
7257
7258 return 0;
7259}
7260
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007261static u64 iwl3945_mac_get_tsf(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07007262{
7263 IWL_DEBUG_MAC80211("enter\n");
7264 IWL_DEBUG_MAC80211("leave\n");
7265
7266 return 0;
7267}
7268
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007269static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07007270{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007271 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007272 unsigned long flags;
7273
7274 mutex_lock(&priv->mutex);
7275 IWL_DEBUG_MAC80211("enter\n");
7276
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007277 iwl3945_reset_qos(priv);
Ron Rindjunsky292ae172008-02-06 11:20:39 -08007278
Zhu Yib481de92007-09-25 17:54:57 -07007279 cancel_delayed_work(&priv->post_associate);
7280
7281 spin_lock_irqsave(&priv->lock, flags);
7282 priv->assoc_id = 0;
7283 priv->assoc_capability = 0;
7284 priv->call_post_assoc_from_beacon = 0;
7285
7286 /* new association get rid of ibss beacon skb */
7287 if (priv->ibss_beacon)
7288 dev_kfree_skb(priv->ibss_beacon);
7289
7290 priv->ibss_beacon = NULL;
7291
7292 priv->beacon_int = priv->hw->conf.beacon_int;
7293 priv->timestamp1 = 0;
7294 priv->timestamp0 = 0;
7295 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
7296 priv->beacon_int = 0;
7297
7298 spin_unlock_irqrestore(&priv->lock, flags);
7299
Mohamed Abbasfde35712007-11-29 11:10:15 +08007300 if (!iwl3945_is_ready_rf(priv)) {
7301 IWL_DEBUG_MAC80211("leave - not ready\n");
7302 mutex_unlock(&priv->mutex);
7303 return;
7304 }
7305
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007306 /* we are restarting association process
7307 * clear RXON_FILTER_ASSOC_MSK bit
7308 */
7309 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007310 iwl3945_scan_cancel_timeout(priv, 100);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007311 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007312 iwl3945_commit_rxon(priv);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007313 }
7314
Zhu Yib481de92007-09-25 17:54:57 -07007315 /* Per mac80211.h: This is only used in IBSS mode... */
7316 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007317
Zhu Yib481de92007-09-25 17:54:57 -07007318 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
7319 mutex_unlock(&priv->mutex);
7320 return;
7321 }
7322
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007323 iwl3945_set_rate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007324
7325 mutex_unlock(&priv->mutex);
7326
7327 IWL_DEBUG_MAC80211("leave\n");
7328
7329}
7330
Johannes Berge039fa42008-05-15 12:55:29 +02007331static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
Zhu Yib481de92007-09-25 17:54:57 -07007332{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007333 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007334 unsigned long flags;
7335
7336 mutex_lock(&priv->mutex);
7337 IWL_DEBUG_MAC80211("enter\n");
7338
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007339 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007340 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7341 mutex_unlock(&priv->mutex);
7342 return -EIO;
7343 }
7344
7345 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
7346 IWL_DEBUG_MAC80211("leave - not IBSS\n");
7347 mutex_unlock(&priv->mutex);
7348 return -EIO;
7349 }
7350
7351 spin_lock_irqsave(&priv->lock, flags);
7352
7353 if (priv->ibss_beacon)
7354 dev_kfree_skb(priv->ibss_beacon);
7355
7356 priv->ibss_beacon = skb;
7357
7358 priv->assoc_id = 0;
7359
7360 IWL_DEBUG_MAC80211("leave\n");
7361 spin_unlock_irqrestore(&priv->lock, flags);
7362
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007363 iwl3945_reset_qos(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007364
7365 queue_work(priv->workqueue, &priv->post_associate.work);
7366
7367 mutex_unlock(&priv->mutex);
7368
7369 return 0;
7370}
7371
7372/*****************************************************************************
7373 *
7374 * sysfs attributes
7375 *
7376 *****************************************************************************/
7377
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007378#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07007379
7380/*
7381 * The following adds a new attribute to the sysfs representation
7382 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
7383 * used for controlling the debug level.
7384 *
7385 * See the level definitions in iwl for details.
7386 */
7387
7388static ssize_t show_debug_level(struct device_driver *d, char *buf)
7389{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007390 return sprintf(buf, "0x%08X\n", iwl3945_debug_level);
Zhu Yib481de92007-09-25 17:54:57 -07007391}
7392static ssize_t store_debug_level(struct device_driver *d,
7393 const char *buf, size_t count)
7394{
7395 char *p = (char *)buf;
7396 u32 val;
7397
7398 val = simple_strtoul(p, &p, 0);
7399 if (p == buf)
7400 printk(KERN_INFO DRV_NAME
7401 ": %s is not in hex or decimal form.\n", buf);
7402 else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007403 iwl3945_debug_level = val;
Zhu Yib481de92007-09-25 17:54:57 -07007404
7405 return strnlen(buf, count);
7406}
7407
7408static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
7409 show_debug_level, store_debug_level);
7410
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007411#endif /* CONFIG_IWL3945_DEBUG */
Zhu Yib481de92007-09-25 17:54:57 -07007412
7413static ssize_t show_rf_kill(struct device *d,
7414 struct device_attribute *attr, char *buf)
7415{
7416 /*
7417 * 0 - RF kill not enabled
7418 * 1 - SW based RF kill active (sysfs)
7419 * 2 - HW based RF kill active
7420 * 3 - Both HW and SW based RF kill active
7421 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007422 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007423 int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
7424 (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
7425
7426 return sprintf(buf, "%i\n", val);
7427}
7428
7429static ssize_t store_rf_kill(struct device *d,
7430 struct device_attribute *attr,
7431 const char *buf, size_t count)
7432{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007433 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007434
7435 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007436 iwl3945_radio_kill_sw(priv, buf[0] == '1');
Zhu Yib481de92007-09-25 17:54:57 -07007437 mutex_unlock(&priv->mutex);
7438
7439 return count;
7440}
7441
7442static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
7443
7444static ssize_t show_temperature(struct device *d,
7445 struct device_attribute *attr, char *buf)
7446{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007447 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007448
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007449 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07007450 return -EAGAIN;
7451
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007452 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
Zhu Yib481de92007-09-25 17:54:57 -07007453}
7454
7455static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
7456
7457static ssize_t show_rs_window(struct device *d,
7458 struct device_attribute *attr,
7459 char *buf)
7460{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007461 struct iwl3945_priv *priv = d->driver_data;
7462 return iwl3945_fill_rs_info(priv->hw, buf, IWL_AP_ID);
Zhu Yib481de92007-09-25 17:54:57 -07007463}
7464static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
7465
7466static ssize_t show_tx_power(struct device *d,
7467 struct device_attribute *attr, char *buf)
7468{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007469 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007470 return sprintf(buf, "%d\n", priv->user_txpower_limit);
7471}
7472
7473static ssize_t store_tx_power(struct device *d,
7474 struct device_attribute *attr,
7475 const char *buf, size_t count)
7476{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007477 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007478 char *p = (char *)buf;
7479 u32 val;
7480
7481 val = simple_strtoul(p, &p, 10);
7482 if (p == buf)
7483 printk(KERN_INFO DRV_NAME
7484 ": %s is not in decimal form.\n", buf);
7485 else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007486 iwl3945_hw_reg_set_txpower(priv, val);
Zhu Yib481de92007-09-25 17:54:57 -07007487
7488 return count;
7489}
7490
7491static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
7492
7493static ssize_t show_flags(struct device *d,
7494 struct device_attribute *attr, char *buf)
7495{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007496 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007497
7498 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
7499}
7500
7501static ssize_t store_flags(struct device *d,
7502 struct device_attribute *attr,
7503 const char *buf, size_t count)
7504{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007505 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007506 u32 flags = simple_strtoul(buf, NULL, 0);
7507
7508 mutex_lock(&priv->mutex);
7509 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
7510 /* Cancel any currently running scans... */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007511 if (iwl3945_scan_cancel_timeout(priv, 100))
Zhu Yib481de92007-09-25 17:54:57 -07007512 IWL_WARNING("Could not cancel scan.\n");
7513 else {
7514 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
7515 flags);
7516 priv->staging_rxon.flags = cpu_to_le32(flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007517 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007518 }
7519 }
7520 mutex_unlock(&priv->mutex);
7521
7522 return count;
7523}
7524
7525static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
7526
7527static ssize_t show_filter_flags(struct device *d,
7528 struct device_attribute *attr, char *buf)
7529{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007530 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007531
7532 return sprintf(buf, "0x%04X\n",
7533 le32_to_cpu(priv->active_rxon.filter_flags));
7534}
7535
7536static ssize_t store_filter_flags(struct device *d,
7537 struct device_attribute *attr,
7538 const char *buf, size_t count)
7539{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007540 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007541 u32 filter_flags = simple_strtoul(buf, NULL, 0);
7542
7543 mutex_lock(&priv->mutex);
7544 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
7545 /* Cancel any currently running scans... */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007546 if (iwl3945_scan_cancel_timeout(priv, 100))
Zhu Yib481de92007-09-25 17:54:57 -07007547 IWL_WARNING("Could not cancel scan.\n");
7548 else {
7549 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
7550 "0x%04X\n", filter_flags);
7551 priv->staging_rxon.filter_flags =
7552 cpu_to_le32(filter_flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007553 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007554 }
7555 }
7556 mutex_unlock(&priv->mutex);
7557
7558 return count;
7559}
7560
7561static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
7562 store_filter_flags);
7563
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007564#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -07007565
7566static ssize_t show_measurement(struct device *d,
7567 struct device_attribute *attr, char *buf)
7568{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007569 struct iwl3945_priv *priv = dev_get_drvdata(d);
7570 struct iwl3945_spectrum_notification measure_report;
Zhu Yib481de92007-09-25 17:54:57 -07007571 u32 size = sizeof(measure_report), len = 0, ofs = 0;
7572 u8 *data = (u8 *) & measure_report;
7573 unsigned long flags;
7574
7575 spin_lock_irqsave(&priv->lock, flags);
7576 if (!(priv->measurement_status & MEASUREMENT_READY)) {
7577 spin_unlock_irqrestore(&priv->lock, flags);
7578 return 0;
7579 }
7580 memcpy(&measure_report, &priv->measure_report, size);
7581 priv->measurement_status = 0;
7582 spin_unlock_irqrestore(&priv->lock, flags);
7583
7584 while (size && (PAGE_SIZE - len)) {
7585 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7586 PAGE_SIZE - len, 1);
7587 len = strlen(buf);
7588 if (PAGE_SIZE - len)
7589 buf[len++] = '\n';
7590
7591 ofs += 16;
7592 size -= min(size, 16U);
7593 }
7594
7595 return len;
7596}
7597
7598static ssize_t store_measurement(struct device *d,
7599 struct device_attribute *attr,
7600 const char *buf, size_t count)
7601{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007602 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007603 struct ieee80211_measurement_params params = {
7604 .channel = le16_to_cpu(priv->active_rxon.channel),
7605 .start_time = cpu_to_le64(priv->last_tsf),
7606 .duration = cpu_to_le16(1),
7607 };
7608 u8 type = IWL_MEASURE_BASIC;
7609 u8 buffer[32];
7610 u8 channel;
7611
7612 if (count) {
7613 char *p = buffer;
7614 strncpy(buffer, buf, min(sizeof(buffer), count));
7615 channel = simple_strtoul(p, NULL, 0);
7616 if (channel)
7617 params.channel = channel;
7618
7619 p = buffer;
7620 while (*p && *p != ' ')
7621 p++;
7622 if (*p)
7623 type = simple_strtoul(p + 1, NULL, 0);
7624 }
7625
7626 IWL_DEBUG_INFO("Invoking measurement of type %d on "
7627 "channel %d (for '%s')\n", type, params.channel, buf);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007628 iwl3945_get_measurement(priv, &params, type);
Zhu Yib481de92007-09-25 17:54:57 -07007629
7630 return count;
7631}
7632
7633static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
7634 show_measurement, store_measurement);
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007635#endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
Zhu Yib481de92007-09-25 17:54:57 -07007636
Zhu Yib481de92007-09-25 17:54:57 -07007637static ssize_t store_retry_rate(struct device *d,
7638 struct device_attribute *attr,
7639 const char *buf, size_t count)
7640{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007641 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007642
7643 priv->retry_rate = simple_strtoul(buf, NULL, 0);
7644 if (priv->retry_rate <= 0)
7645 priv->retry_rate = 1;
7646
7647 return count;
7648}
7649
7650static ssize_t show_retry_rate(struct device *d,
7651 struct device_attribute *attr, char *buf)
7652{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007653 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007654 return sprintf(buf, "%d", priv->retry_rate);
7655}
7656
7657static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
7658 store_retry_rate);
7659
7660static ssize_t store_power_level(struct device *d,
7661 struct device_attribute *attr,
7662 const char *buf, size_t count)
7663{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007664 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007665 int rc;
7666 int mode;
7667
7668 mode = simple_strtoul(buf, NULL, 0);
7669 mutex_lock(&priv->mutex);
7670
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007671 if (!iwl3945_is_ready(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007672 rc = -EAGAIN;
7673 goto out;
7674 }
7675
7676 if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
7677 mode = IWL_POWER_AC;
7678 else
7679 mode |= IWL_POWER_ENABLED;
7680
7681 if (mode != priv->power_mode) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007682 rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
Zhu Yib481de92007-09-25 17:54:57 -07007683 if (rc) {
7684 IWL_DEBUG_MAC80211("failed setting power mode.\n");
7685 goto out;
7686 }
7687 priv->power_mode = mode;
7688 }
7689
7690 rc = count;
7691
7692 out:
7693 mutex_unlock(&priv->mutex);
7694 return rc;
7695}
7696
7697#define MAX_WX_STRING 80
7698
7699/* Values are in microsecond */
7700static const s32 timeout_duration[] = {
7701 350000,
7702 250000,
7703 75000,
7704 37000,
7705 25000,
7706};
7707static const s32 period_duration[] = {
7708 400000,
7709 700000,
7710 1000000,
7711 1000000,
7712 1000000
7713};
7714
7715static ssize_t show_power_level(struct device *d,
7716 struct device_attribute *attr, char *buf)
7717{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007718 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007719 int level = IWL_POWER_LEVEL(priv->power_mode);
7720 char *p = buf;
7721
7722 p += sprintf(p, "%d ", level);
7723 switch (level) {
7724 case IWL_POWER_MODE_CAM:
7725 case IWL_POWER_AC:
7726 p += sprintf(p, "(AC)");
7727 break;
7728 case IWL_POWER_BATTERY:
7729 p += sprintf(p, "(BATTERY)");
7730 break;
7731 default:
7732 p += sprintf(p,
7733 "(Timeout %dms, Period %dms)",
7734 timeout_duration[level - 1] / 1000,
7735 period_duration[level - 1] / 1000);
7736 }
7737
7738 if (!(priv->power_mode & IWL_POWER_ENABLED))
7739 p += sprintf(p, " OFF\n");
7740 else
7741 p += sprintf(p, " \n");
7742
7743 return (p - buf + 1);
7744
7745}
7746
7747static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
7748 store_power_level);
7749
7750static ssize_t show_channels(struct device *d,
7751 struct device_attribute *attr, char *buf)
7752{
Johannes Berg8318d782008-01-24 19:38:38 +01007753 /* all this shit doesn't belong into sysfs anyway */
7754 return 0;
Zhu Yib481de92007-09-25 17:54:57 -07007755}
7756
7757static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
7758
7759static ssize_t show_statistics(struct device *d,
7760 struct device_attribute *attr, char *buf)
7761{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007762 struct iwl3945_priv *priv = dev_get_drvdata(d);
7763 u32 size = sizeof(struct iwl3945_notif_statistics);
Zhu Yib481de92007-09-25 17:54:57 -07007764 u32 len = 0, ofs = 0;
7765 u8 *data = (u8 *) & priv->statistics;
7766 int rc = 0;
7767
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007768 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07007769 return -EAGAIN;
7770
7771 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007772 rc = iwl3945_send_statistics_request(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007773 mutex_unlock(&priv->mutex);
7774
7775 if (rc) {
7776 len = sprintf(buf,
7777 "Error sending statistics request: 0x%08X\n", rc);
7778 return len;
7779 }
7780
7781 while (size && (PAGE_SIZE - len)) {
7782 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7783 PAGE_SIZE - len, 1);
7784 len = strlen(buf);
7785 if (PAGE_SIZE - len)
7786 buf[len++] = '\n';
7787
7788 ofs += 16;
7789 size -= min(size, 16U);
7790 }
7791
7792 return len;
7793}
7794
7795static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
7796
7797static ssize_t show_antenna(struct device *d,
7798 struct device_attribute *attr, char *buf)
7799{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007800 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007801
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007802 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07007803 return -EAGAIN;
7804
7805 return sprintf(buf, "%d\n", priv->antenna);
7806}
7807
7808static ssize_t store_antenna(struct device *d,
7809 struct device_attribute *attr,
7810 const char *buf, size_t count)
7811{
7812 int ant;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007813 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007814
7815 if (count == 0)
7816 return 0;
7817
7818 if (sscanf(buf, "%1i", &ant) != 1) {
7819 IWL_DEBUG_INFO("not in hex or decimal form.\n");
7820 return count;
7821 }
7822
7823 if ((ant >= 0) && (ant <= 2)) {
7824 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007825 priv->antenna = (enum iwl3945_antenna)ant;
Zhu Yib481de92007-09-25 17:54:57 -07007826 } else
7827 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
7828
7829
7830 return count;
7831}
7832
7833static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
7834
7835static ssize_t show_status(struct device *d,
7836 struct device_attribute *attr, char *buf)
7837{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007838 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7839 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07007840 return -EAGAIN;
7841 return sprintf(buf, "0x%08x\n", (int)priv->status);
7842}
7843
7844static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
7845
7846static ssize_t dump_error_log(struct device *d,
7847 struct device_attribute *attr,
7848 const char *buf, size_t count)
7849{
7850 char *p = (char *)buf;
7851
7852 if (p[0] == '1')
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007853 iwl3945_dump_nic_error_log((struct iwl3945_priv *)d->driver_data);
Zhu Yib481de92007-09-25 17:54:57 -07007854
7855 return strnlen(buf, count);
7856}
7857
7858static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
7859
7860static ssize_t dump_event_log(struct device *d,
7861 struct device_attribute *attr,
7862 const char *buf, size_t count)
7863{
7864 char *p = (char *)buf;
7865
7866 if (p[0] == '1')
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007867 iwl3945_dump_nic_event_log((struct iwl3945_priv *)d->driver_data);
Zhu Yib481de92007-09-25 17:54:57 -07007868
7869 return strnlen(buf, count);
7870}
7871
7872static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
7873
7874/*****************************************************************************
7875 *
7876 * driver setup and teardown
7877 *
7878 *****************************************************************************/
7879
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007880static void iwl3945_setup_deferred_work(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07007881{
7882 priv->workqueue = create_workqueue(DRV_NAME);
7883
7884 init_waitqueue_head(&priv->wait_command_queue);
7885
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007886 INIT_WORK(&priv->up, iwl3945_bg_up);
7887 INIT_WORK(&priv->restart, iwl3945_bg_restart);
7888 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
7889 INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
7890 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
7891 INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
7892 INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill);
7893 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
Abhijeet Kolekar5ec03972008-05-05 10:22:48 +08007894 INIT_WORK(&priv->set_monitor, iwl3945_bg_set_monitor);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007895 INIT_DELAYED_WORK(&priv->post_associate, iwl3945_bg_post_associate);
7896 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
7897 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
7898 INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);
Zhu Yib481de92007-09-25 17:54:57 -07007899
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007900 iwl3945_hw_setup_deferred_work(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007901
7902 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007903 iwl3945_irq_tasklet, (unsigned long)priv);
Zhu Yib481de92007-09-25 17:54:57 -07007904}
7905
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007906static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07007907{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007908 iwl3945_hw_cancel_deferred_work(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007909
Joonwoo Parke47eb6a2007-11-29 10:42:49 +09007910 cancel_delayed_work_sync(&priv->init_alive_start);
Zhu Yib481de92007-09-25 17:54:57 -07007911 cancel_delayed_work(&priv->scan_check);
7912 cancel_delayed_work(&priv->alive_start);
7913 cancel_delayed_work(&priv->post_associate);
7914 cancel_work_sync(&priv->beacon_update);
7915}
7916
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007917static struct attribute *iwl3945_sysfs_entries[] = {
Zhu Yib481de92007-09-25 17:54:57 -07007918 &dev_attr_antenna.attr,
7919 &dev_attr_channels.attr,
7920 &dev_attr_dump_errors.attr,
7921 &dev_attr_dump_events.attr,
7922 &dev_attr_flags.attr,
7923 &dev_attr_filter_flags.attr,
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007924#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -07007925 &dev_attr_measurement.attr,
7926#endif
7927 &dev_attr_power_level.attr,
Zhu Yib481de92007-09-25 17:54:57 -07007928 &dev_attr_retry_rate.attr,
7929 &dev_attr_rf_kill.attr,
7930 &dev_attr_rs_window.attr,
7931 &dev_attr_statistics.attr,
7932 &dev_attr_status.attr,
7933 &dev_attr_temperature.attr,
Zhu Yib481de92007-09-25 17:54:57 -07007934 &dev_attr_tx_power.attr,
7935
7936 NULL
7937};
7938
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007939static struct attribute_group iwl3945_attribute_group = {
Zhu Yib481de92007-09-25 17:54:57 -07007940 .name = NULL, /* put in device directory */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007941 .attrs = iwl3945_sysfs_entries,
Zhu Yib481de92007-09-25 17:54:57 -07007942};
7943
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007944static struct ieee80211_ops iwl3945_hw_ops = {
7945 .tx = iwl3945_mac_tx,
7946 .start = iwl3945_mac_start,
7947 .stop = iwl3945_mac_stop,
7948 .add_interface = iwl3945_mac_add_interface,
7949 .remove_interface = iwl3945_mac_remove_interface,
7950 .config = iwl3945_mac_config,
7951 .config_interface = iwl3945_mac_config_interface,
7952 .configure_filter = iwl3945_configure_filter,
7953 .set_key = iwl3945_mac_set_key,
7954 .get_stats = iwl3945_mac_get_stats,
7955 .get_tx_stats = iwl3945_mac_get_tx_stats,
7956 .conf_tx = iwl3945_mac_conf_tx,
7957 .get_tsf = iwl3945_mac_get_tsf,
7958 .reset_tsf = iwl3945_mac_reset_tsf,
7959 .beacon_update = iwl3945_mac_beacon_update,
7960 .hw_scan = iwl3945_mac_hw_scan
Zhu Yib481de92007-09-25 17:54:57 -07007961};
7962
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007963static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
Zhu Yib481de92007-09-25 17:54:57 -07007964{
7965 int err = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007966 struct iwl3945_priv *priv;
Zhu Yib481de92007-09-25 17:54:57 -07007967 struct ieee80211_hw *hw;
Tomas Winkler82b9a122008-03-04 18:09:30 -08007968 struct iwl_3945_cfg *cfg = (struct iwl_3945_cfg *)(ent->driver_data);
Zhu Yib481de92007-09-25 17:54:57 -07007969 int i;
Mohamed Abbas0359fac2008-03-28 16:21:08 -07007970 unsigned long flags;
Zhu Yi5a669262008-01-14 17:46:18 -08007971 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07007972
Cahill, Ben M6440adb2007-11-29 11:09:55 +08007973 /* Disabling hardware scan means that mac80211 will perform scans
7974 * "the hard way", rather than using device's scan. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007975 if (iwl3945_param_disable_hw_scan) {
Zhu Yib481de92007-09-25 17:54:57 -07007976 IWL_DEBUG_INFO("Disabling hw_scan\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007977 iwl3945_hw_ops.hw_scan = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07007978 }
7979
Ron Rindjunskydfe7d452008-04-15 16:01:45 -07007980 if ((iwl3945_param_queues_num > IWL39_MAX_NUM_QUEUES) ||
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007981 (iwl3945_param_queues_num < IWL_MIN_NUM_QUEUES)) {
Zhu Yib481de92007-09-25 17:54:57 -07007982 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
Ron Rindjunskydfe7d452008-04-15 16:01:45 -07007983 IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
Zhu Yib481de92007-09-25 17:54:57 -07007984 err = -EINVAL;
7985 goto out;
7986 }
7987
7988 /* mac80211 allocates memory for this device instance, including
7989 * space for this driver's private structure */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007990 hw = ieee80211_alloc_hw(sizeof(struct iwl3945_priv), &iwl3945_hw_ops);
Zhu Yib481de92007-09-25 17:54:57 -07007991 if (hw == NULL) {
7992 IWL_ERROR("Can not allocate network device\n");
7993 err = -ENOMEM;
7994 goto out;
7995 }
7996 SET_IEEE80211_DEV(hw, &pdev->dev);
7997
Johannes Bergf51359a2007-10-28 14:53:36 +01007998 hw->rate_control_algorithm = "iwl-3945-rs";
7999
Zhu Yib481de92007-09-25 17:54:57 -07008000 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
8001 priv = hw->priv;
8002 priv->hw = hw;
8003
8004 priv->pci_dev = pdev;
Tomas Winkler82b9a122008-03-04 18:09:30 -08008005 priv->cfg = cfg;
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008006
8007 /* Select antenna (may be helpful if only one antenna is connected) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008008 priv->antenna = (enum iwl3945_antenna)iwl3945_param_antenna;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008009#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008010 iwl3945_debug_level = iwl3945_param_debug;
Zhu Yib481de92007-09-25 17:54:57 -07008011 atomic_set(&priv->restrict_refcnt, 0);
8012#endif
8013 priv->retry_rate = 1;
8014
8015 priv->ibss_beacon = NULL;
8016
Bruno Randolf566bfe52008-05-08 19:15:40 +02008017 /* Tell mac80211 our characteristics */
8018 hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
8019 IEEE80211_HW_SIGNAL_DBM |
8020 IEEE80211_HW_NOISE_DBM;
Zhu Yib481de92007-09-25 17:54:57 -07008021
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008022 /* 4 EDCA QOS priorities */
Zhu Yib481de92007-09-25 17:54:57 -07008023 hw->queues = 4;
8024
8025 spin_lock_init(&priv->lock);
8026 spin_lock_init(&priv->power_data.lock);
8027 spin_lock_init(&priv->sta_lock);
8028 spin_lock_init(&priv->hcmd_lock);
8029
8030 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
8031 INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
8032
8033 INIT_LIST_HEAD(&priv->free_frames);
8034
8035 mutex_init(&priv->mutex);
8036 if (pci_enable_device(pdev)) {
8037 err = -ENODEV;
8038 goto out_ieee80211_free_hw;
8039 }
8040
8041 pci_set_master(pdev);
8042
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008043 /* Clear the driver's (not device's) station table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008044 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008045
8046 priv->data_retry_limit = -1;
8047 priv->ieee_channels = NULL;
8048 priv->ieee_rates = NULL;
Johannes Berg8318d782008-01-24 19:38:38 +01008049 priv->band = IEEE80211_BAND_2GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07008050
8051 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
8052 if (!err)
8053 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
8054 if (err) {
8055 printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
8056 goto out_pci_disable_device;
8057 }
8058
8059 pci_set_drvdata(pdev, priv);
8060 err = pci_request_regions(pdev, DRV_NAME);
8061 if (err)
8062 goto out_pci_disable_device;
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008063
Zhu Yib481de92007-09-25 17:54:57 -07008064 /* We disable the RETRY_TIMEOUT register (0x41) to keep
8065 * PCI Tx retries from interfering with C3 CPU state */
8066 pci_write_config_byte(pdev, 0x41, 0x00);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008067
Zhu Yib481de92007-09-25 17:54:57 -07008068 priv->hw_base = pci_iomap(pdev, 0, 0);
8069 if (!priv->hw_base) {
8070 err = -ENODEV;
8071 goto out_pci_release_regions;
8072 }
8073
8074 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
8075 (unsigned long long) pci_resource_len(pdev, 0));
8076 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
8077
8078 /* Initialize module parameter values here */
8079
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008080 /* Disable radio (SW RF KILL) via parameter when loading driver */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008081 if (iwl3945_param_disable) {
Zhu Yib481de92007-09-25 17:54:57 -07008082 set_bit(STATUS_RF_KILL_SW, &priv->status);
8083 IWL_DEBUG_INFO("Radio disabled.\n");
8084 }
8085
8086 priv->iw_mode = IEEE80211_IF_TYPE_STA;
8087
Zhu Yib481de92007-09-25 17:54:57 -07008088 printk(KERN_INFO DRV_NAME
Tomas Winkler82b9a122008-03-04 18:09:30 -08008089 ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
Zhu Yib481de92007-09-25 17:54:57 -07008090
8091 /* Device-specific setup */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008092 if (iwl3945_hw_set_hw_setting(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07008093 IWL_ERROR("failed to set hw settings\n");
Zhu Yib481de92007-09-25 17:54:57 -07008094 goto out_iounmap;
8095 }
8096
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008097 if (iwl3945_param_qos_enable)
Zhu Yib481de92007-09-25 17:54:57 -07008098 priv->qos_data.qos_enable = 1;
8099
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008100 iwl3945_reset_qos(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008101
8102 priv->qos_data.qos_active = 0;
8103 priv->qos_data.qos_cap.val = 0;
Zhu Yib481de92007-09-25 17:54:57 -07008104
Johannes Berg8318d782008-01-24 19:38:38 +01008105 iwl3945_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008106 iwl3945_setup_deferred_work(priv);
8107 iwl3945_setup_rx_handlers(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008108
8109 priv->rates_mask = IWL_RATES_MASK;
8110 /* If power management is turned on, default to AC mode */
8111 priv->power_mode = IWL_POWER_AC;
8112 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
8113
Mohamed Abbas0359fac2008-03-28 16:21:08 -07008114 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008115 iwl3945_disable_interrupts(priv);
Mohamed Abbas0359fac2008-03-28 16:21:08 -07008116 spin_unlock_irqrestore(&priv->lock, flags);
Jes Sorensen49df2b32007-10-26 16:10:39 +02008117
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008118 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
Zhu Yib481de92007-09-25 17:54:57 -07008119 if (err) {
8120 IWL_ERROR("failed to create sysfs device attributes\n");
Zhu Yib481de92007-09-25 17:54:57 -07008121 goto out_release_irq;
8122 }
8123
Zhu Yi5a669262008-01-14 17:46:18 -08008124 /* nic init */
8125 iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
8126 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
8127
8128 iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
8129 err = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
8130 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
8131 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
8132 if (err < 0) {
8133 IWL_DEBUG_INFO("Failed to init the card\n");
8134 goto out_remove_sysfs;
8135 }
8136 /* Read the EEPROM */
8137 err = iwl3945_eeprom_init(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008138 if (err) {
Zhu Yi5a669262008-01-14 17:46:18 -08008139 IWL_ERROR("Unable to init EEPROM\n");
8140 goto out_remove_sysfs;
8141 }
8142 /* MAC Address location in EEPROM same for 3945/4965 */
8143 get_eeprom_mac(priv, priv->mac_addr);
8144 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
8145 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
8146
Reinette Chatre849e0dc2008-01-23 10:15:18 -08008147 err = iwl3945_init_channel_map(priv);
8148 if (err) {
8149 IWL_ERROR("initializing regulatory failed: %d\n", err);
8150 goto out_remove_sysfs;
8151 }
8152
8153 err = iwl3945_init_geos(priv);
8154 if (err) {
8155 IWL_ERROR("initializing geos failed: %d\n", err);
8156 goto out_free_channel_map;
8157 }
Reinette Chatre849e0dc2008-01-23 10:15:18 -08008158
Zhu Yi5a669262008-01-14 17:46:18 -08008159 err = ieee80211_register_hw(priv->hw);
8160 if (err) {
8161 IWL_ERROR("Failed to register network device (error %d)\n", err);
Reinette Chatre849e0dc2008-01-23 10:15:18 -08008162 goto out_free_geos;
Zhu Yib481de92007-09-25 17:54:57 -07008163 }
8164
Zhu Yi5a669262008-01-14 17:46:18 -08008165 priv->hw->conf.beacon_int = 100;
8166 priv->mac80211_registered = 1;
8167 pci_save_state(pdev);
8168 pci_disable_device(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008169
8170 return 0;
8171
Reinette Chatre849e0dc2008-01-23 10:15:18 -08008172 out_free_geos:
8173 iwl3945_free_geos(priv);
8174 out_free_channel_map:
8175 iwl3945_free_channel_map(priv);
Zhu Yi5a669262008-01-14 17:46:18 -08008176 out_remove_sysfs:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008177 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
Zhu Yib481de92007-09-25 17:54:57 -07008178
8179 out_release_irq:
Zhu Yib481de92007-09-25 17:54:57 -07008180 destroy_workqueue(priv->workqueue);
8181 priv->workqueue = NULL;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008182 iwl3945_unset_hw_setting(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008183
8184 out_iounmap:
8185 pci_iounmap(pdev, priv->hw_base);
8186 out_pci_release_regions:
8187 pci_release_regions(pdev);
8188 out_pci_disable_device:
8189 pci_disable_device(pdev);
8190 pci_set_drvdata(pdev, NULL);
8191 out_ieee80211_free_hw:
8192 ieee80211_free_hw(priv->hw);
8193 out:
8194 return err;
8195}
8196
Reinette Chatrec83dbf62008-03-21 13:53:41 -07008197static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
Zhu Yib481de92007-09-25 17:54:57 -07008198{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008199 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008200 struct list_head *p, *q;
8201 int i;
Mohamed Abbas0359fac2008-03-28 16:21:08 -07008202 unsigned long flags;
Zhu Yib481de92007-09-25 17:54:57 -07008203
8204 if (!priv)
8205 return;
8206
8207 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
8208
Zhu Yib481de92007-09-25 17:54:57 -07008209 set_bit(STATUS_EXIT_PENDING, &priv->status);
Zhu Yib24d22b2007-12-19 13:59:52 +08008210
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008211 iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008212
Mohamed Abbas0359fac2008-03-28 16:21:08 -07008213 /* make sure we flush any pending irq or
8214 * tasklet for the driver
8215 */
8216 spin_lock_irqsave(&priv->lock, flags);
8217 iwl3945_disable_interrupts(priv);
8218 spin_unlock_irqrestore(&priv->lock, flags);
8219
8220 iwl_synchronize_irq(priv);
8221
Zhu Yib481de92007-09-25 17:54:57 -07008222 /* Free MAC hash list for ADHOC */
8223 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
8224 list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
8225 list_del(p);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008226 kfree(list_entry(p, struct iwl3945_ibss_seq, list));
Zhu Yib481de92007-09-25 17:54:57 -07008227 }
8228 }
8229
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008230 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
Zhu Yib481de92007-09-25 17:54:57 -07008231
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008232 iwl3945_dealloc_ucode_pci(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008233
8234 if (priv->rxq.bd)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008235 iwl3945_rx_queue_free(priv, &priv->rxq);
8236 iwl3945_hw_txq_ctx_free(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008237
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008238 iwl3945_unset_hw_setting(priv);
8239 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008240
8241 if (priv->mac80211_registered) {
8242 ieee80211_unregister_hw(priv->hw);
Zhu Yib481de92007-09-25 17:54:57 -07008243 }
8244
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08008245 /*netif_stop_queue(dev); */
8246 flush_workqueue(priv->workqueue);
8247
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008248 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
Zhu Yib481de92007-09-25 17:54:57 -07008249 * priv->workqueue... so we can't take down the workqueue
8250 * until now... */
8251 destroy_workqueue(priv->workqueue);
8252 priv->workqueue = NULL;
8253
Zhu Yib481de92007-09-25 17:54:57 -07008254 pci_iounmap(pdev, priv->hw_base);
8255 pci_release_regions(pdev);
8256 pci_disable_device(pdev);
8257 pci_set_drvdata(pdev, NULL);
8258
Reinette Chatre849e0dc2008-01-23 10:15:18 -08008259 iwl3945_free_channel_map(priv);
8260 iwl3945_free_geos(priv);
Emmanuel Grumbach261415f2008-05-29 16:35:25 +08008261 kfree(priv->scan);
Zhu Yib481de92007-09-25 17:54:57 -07008262 if (priv->ibss_beacon)
8263 dev_kfree_skb(priv->ibss_beacon);
8264
8265 ieee80211_free_hw(priv->hw);
8266}
8267
8268#ifdef CONFIG_PM
8269
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008270static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
Zhu Yib481de92007-09-25 17:54:57 -07008271{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008272 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008273
Zhu Yie655b9f2008-01-24 02:19:38 -08008274 if (priv->is_open) {
8275 set_bit(STATUS_IN_SUSPEND, &priv->status);
8276 iwl3945_mac_stop(priv->hw);
8277 priv->is_open = 1;
8278 }
Zhu Yib481de92007-09-25 17:54:57 -07008279
Zhu Yib481de92007-09-25 17:54:57 -07008280 pci_set_power_state(pdev, PCI_D3hot);
8281
Zhu Yib481de92007-09-25 17:54:57 -07008282 return 0;
8283}
8284
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008285static int iwl3945_pci_resume(struct pci_dev *pdev)
Zhu Yib481de92007-09-25 17:54:57 -07008286{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008287 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008288
Zhu Yib481de92007-09-25 17:54:57 -07008289 pci_set_power_state(pdev, PCI_D0);
Zhu Yib481de92007-09-25 17:54:57 -07008290
Zhu Yie655b9f2008-01-24 02:19:38 -08008291 if (priv->is_open)
8292 iwl3945_mac_start(priv->hw);
Zhu Yib481de92007-09-25 17:54:57 -07008293
Zhu Yie655b9f2008-01-24 02:19:38 -08008294 clear_bit(STATUS_IN_SUSPEND, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -07008295 return 0;
8296}
8297
8298#endif /* CONFIG_PM */
8299
8300/*****************************************************************************
8301 *
8302 * driver and module entry point
8303 *
8304 *****************************************************************************/
8305
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008306static struct pci_driver iwl3945_driver = {
Zhu Yib481de92007-09-25 17:54:57 -07008307 .name = DRV_NAME,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008308 .id_table = iwl3945_hw_card_ids,
8309 .probe = iwl3945_pci_probe,
8310 .remove = __devexit_p(iwl3945_pci_remove),
Zhu Yib481de92007-09-25 17:54:57 -07008311#ifdef CONFIG_PM
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008312 .suspend = iwl3945_pci_suspend,
8313 .resume = iwl3945_pci_resume,
Zhu Yib481de92007-09-25 17:54:57 -07008314#endif
8315};
8316
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008317static int __init iwl3945_init(void)
Zhu Yib481de92007-09-25 17:54:57 -07008318{
8319
8320 int ret;
8321 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
8322 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
Reinette Chatre897e1cf2008-03-28 16:21:09 -07008323
8324 ret = iwl3945_rate_control_register();
8325 if (ret) {
8326 IWL_ERROR("Unable to register rate control algorithm: %d\n", ret);
8327 return ret;
8328 }
8329
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008330 ret = pci_register_driver(&iwl3945_driver);
Zhu Yib481de92007-09-25 17:54:57 -07008331 if (ret) {
8332 IWL_ERROR("Unable to initialize PCI module\n");
Reinette Chatre897e1cf2008-03-28 16:21:09 -07008333 goto error_register;
Zhu Yib481de92007-09-25 17:54:57 -07008334 }
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008335#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008336 ret = driver_create_file(&iwl3945_driver.driver, &driver_attr_debug_level);
Zhu Yib481de92007-09-25 17:54:57 -07008337 if (ret) {
8338 IWL_ERROR("Unable to create driver sysfs file\n");
Reinette Chatre897e1cf2008-03-28 16:21:09 -07008339 goto error_debug;
Zhu Yib481de92007-09-25 17:54:57 -07008340 }
8341#endif
8342
8343 return ret;
Reinette Chatre897e1cf2008-03-28 16:21:09 -07008344
8345#ifdef CONFIG_IWL3945_DEBUG
8346error_debug:
8347 pci_unregister_driver(&iwl3945_driver);
8348#endif
8349error_register:
8350 iwl3945_rate_control_unregister();
8351 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07008352}
8353
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008354static void __exit iwl3945_exit(void)
Zhu Yib481de92007-09-25 17:54:57 -07008355{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008356#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008357 driver_remove_file(&iwl3945_driver.driver, &driver_attr_debug_level);
Zhu Yib481de92007-09-25 17:54:57 -07008358#endif
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008359 pci_unregister_driver(&iwl3945_driver);
Reinette Chatre897e1cf2008-03-28 16:21:09 -07008360 iwl3945_rate_control_unregister();
Zhu Yib481de92007-09-25 17:54:57 -07008361}
8362
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008363module_param_named(antenna, iwl3945_param_antenna, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008364MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008365module_param_named(disable, iwl3945_param_disable, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008366MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008367module_param_named(hwcrypto, iwl3945_param_hwcrypto, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008368MODULE_PARM_DESC(hwcrypto,
8369 "using hardware crypto engine (default 0 [software])\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008370module_param_named(debug, iwl3945_param_debug, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008371MODULE_PARM_DESC(debug, "debug output mask");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008372module_param_named(disable_hw_scan, iwl3945_param_disable_hw_scan, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008373MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
8374
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008375module_param_named(queues_num, iwl3945_param_queues_num, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008376MODULE_PARM_DESC(queues_num, "number of hw queues.");
8377
8378/* QoS */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008379module_param_named(qos_enable, iwl3945_param_qos_enable, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008380MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
8381
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008382module_exit(iwl3945_exit);
8383module_init(iwl3945_init);