blob: 57a1d70f2abf92cfab8d1907c49154fc14b40821 [file] [log] [blame]
Zhu Yib481de92007-09-25 17:54:57 -07001/******************************************************************************
2 *
3 * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
Zhu Yib481de92007-09-25 17:54:57 -070030#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/version.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/dma-mapping.h>
36#include <linux/delay.h>
37#include <linux/skbuff.h>
38#include <linux/netdevice.h>
39#include <linux/wireless.h>
40#include <linux/firmware.h>
Zhu Yib481de92007-09-25 17:54:57 -070041#include <linux/etherdevice.h>
42#include <linux/if_arp.h>
43
44#include <net/ieee80211_radiotap.h>
45#include <net/mac80211.h>
46
47#include <asm/div64.h>
48
Zhu Yib481de92007-09-25 17:54:57 -070049#include "iwl-3945.h"
50#include "iwl-helpers.h"
51
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +080052#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -080053u32 iwl3945_debug_level;
Zhu Yib481de92007-09-25 17:54:57 -070054#endif
55
Christoph Hellwigbb8c0932008-01-27 16:41:47 -080056static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
57 struct iwl3945_tx_queue *txq);
Christoph Hellwig416e1432007-10-25 17:15:49 +080058
Zhu Yib481de92007-09-25 17:54:57 -070059/******************************************************************************
60 *
61 * module boiler plate
62 *
63 ******************************************************************************/
64
65/* module parameters */
Cahill, Ben M6440adb2007-11-29 11:09:55 +080066static int iwl3945_param_disable_hw_scan; /* def: 0 = use 3945's h/w scan */
67static int iwl3945_param_debug; /* def: 0 = minimal debug log messages */
68static int iwl3945_param_disable; /* def: 0 = enable radio */
Ben Cahill9fbab512007-11-29 11:09:47 +080069static int iwl3945_param_antenna; /* def: 0 = both antennas (use diversity) */
Cahill, Ben M6440adb2007-11-29 11:09:55 +080070int iwl3945_param_hwcrypto; /* def: 0 = use software encryption */
71static int iwl3945_param_qos_enable = 1; /* def: 1 = use quality of service */
72int iwl3945_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 8 Tx queues */
Zhu Yib481de92007-09-25 17:54:57 -070073
74/*
75 * module name, copyright, version, etc.
76 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
77 */
78
79#define DRV_DESCRIPTION \
80"Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
81
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +080082#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -070083#define VD "d"
84#else
85#define VD
86#endif
87
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +080088#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -070089#define VS "s"
90#else
91#define VS
92#endif
93
Zhu Yi71972662008-01-14 17:46:23 -080094#define IWLWIFI_VERSION "1.2.23k" VD VS
Zhu Yib481de92007-09-25 17:54:57 -070095#define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
96#define DRV_VERSION IWLWIFI_VERSION
97
98/* Change firmware file name, using "-" and incrementing number,
99 * *only* when uCode interface or architecture changes so that it
100 * is not compatible with earlier drivers.
101 * This number will also appear in << 8 position of 1st dword of uCode file */
102#define IWL3945_UCODE_API "-1"
103
104MODULE_DESCRIPTION(DRV_DESCRIPTION);
105MODULE_VERSION(DRV_VERSION);
106MODULE_AUTHOR(DRV_COPYRIGHT);
107MODULE_LICENSE("GPL");
108
Christoph Hellwig416e1432007-10-25 17:15:49 +0800109static __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
Zhu Yib481de92007-09-25 17:54:57 -0700110{
111 u16 fc = le16_to_cpu(hdr->frame_control);
112 int hdr_len = ieee80211_get_hdrlen(fc);
113
114 if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
115 return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
116 return NULL;
117}
118
Johannes Berg8318d782008-01-24 19:38:38 +0100119static const struct ieee80211_supported_band *iwl3945_get_band(
120 struct iwl3945_priv *priv, enum ieee80211_band band)
Zhu Yib481de92007-09-25 17:54:57 -0700121{
Johannes Berg8318d782008-01-24 19:38:38 +0100122 return priv->hw->wiphy->bands[band];
Zhu Yib481de92007-09-25 17:54:57 -0700123}
124
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800125static int iwl3945_is_empty_essid(const char *essid, int essid_len)
Zhu Yib481de92007-09-25 17:54:57 -0700126{
127 /* Single white space is for Linksys APs */
128 if (essid_len == 1 && essid[0] == ' ')
129 return 1;
130
131 /* Otherwise, if the entire essid is 0, we assume it is hidden */
132 while (essid_len) {
133 essid_len--;
134 if (essid[essid_len] != '\0')
135 return 0;
136 }
137
138 return 1;
139}
140
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800141static const char *iwl3945_escape_essid(const char *essid, u8 essid_len)
Zhu Yib481de92007-09-25 17:54:57 -0700142{
143 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
144 const char *s = essid;
145 char *d = escaped;
146
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800147 if (iwl3945_is_empty_essid(essid, essid_len)) {
Zhu Yib481de92007-09-25 17:54:57 -0700148 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
149 return escaped;
150 }
151
152 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
153 while (essid_len--) {
154 if (*s == '\0') {
155 *d++ = '\\';
156 *d++ = '0';
157 s++;
158 } else
159 *d++ = *s++;
160 }
161 *d = '\0';
162 return escaped;
163}
164
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800165static void iwl3945_print_hex_dump(int level, void *p, u32 len)
Zhu Yib481de92007-09-25 17:54:57 -0700166{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +0800167#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800168 if (!(iwl3945_debug_level & level))
Zhu Yib481de92007-09-25 17:54:57 -0700169 return;
170
171 print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
172 p, len, 1);
173#endif
174}
175
176/*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
177 * DMA services
178 *
179 * Theory of operation
180 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800181 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
182 * of buffer descriptors, each of which points to one or more data buffers for
183 * the device to read from or fill. Driver and device exchange status of each
184 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
185 * entries in each circular buffer, to protect against confusing empty and full
186 * queue states.
187 *
188 * The device reads or writes the data in the queues via the device's several
189 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
Zhu Yib481de92007-09-25 17:54:57 -0700190 *
191 * For Tx queue, there are low mark and high mark limits. If, after queuing
192 * the packet for Tx, free space become < low mark, Tx queue stopped. When
193 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
194 * Tx queue resumed.
195 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800196 * The 3945 operates with six queues: One receive queue, one transmit queue
197 * (#4) for sending commands to the device firmware, and four transmit queues
198 * (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
Zhu Yib481de92007-09-25 17:54:57 -0700199 ***************************************************/
200
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800201static int iwl3945_queue_space(const struct iwl3945_queue *q)
Zhu Yib481de92007-09-25 17:54:57 -0700202{
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800203 int s = q->read_ptr - q->write_ptr;
Zhu Yib481de92007-09-25 17:54:57 -0700204
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800205 if (q->read_ptr > q->write_ptr)
Zhu Yib481de92007-09-25 17:54:57 -0700206 s -= q->n_bd;
207
208 if (s <= 0)
209 s += q->n_window;
210 /* keep some reserve to not confuse empty and full situations */
211 s -= 2;
212 if (s < 0)
213 s = 0;
214 return s;
215}
216
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800217/**
218 * iwl3945_queue_inc_wrap - increment queue index, wrap back to beginning
219 * @index -- current index
220 * @n_bd -- total number of entries in queue (must be power of 2)
221 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800222static inline int iwl3945_queue_inc_wrap(int index, int n_bd)
Zhu Yib481de92007-09-25 17:54:57 -0700223{
224 return ++index & (n_bd - 1);
225}
226
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800227/**
228 * iwl3945_queue_dec_wrap - increment queue index, wrap back to end
229 * @index -- current index
230 * @n_bd -- total number of entries in queue (must be power of 2)
231 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800232static inline int iwl3945_queue_dec_wrap(int index, int n_bd)
Zhu Yib481de92007-09-25 17:54:57 -0700233{
234 return --index & (n_bd - 1);
235}
236
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800237static inline int x2_queue_used(const struct iwl3945_queue *q, int i)
Zhu Yib481de92007-09-25 17:54:57 -0700238{
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800239 return q->write_ptr > q->read_ptr ?
240 (i >= q->read_ptr && i < q->write_ptr) :
241 !(i < q->read_ptr && i >= q->write_ptr);
Zhu Yib481de92007-09-25 17:54:57 -0700242}
243
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800244static inline u8 get_cmd_index(struct iwl3945_queue *q, u32 index, int is_huge)
Zhu Yib481de92007-09-25 17:54:57 -0700245{
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800246 /* This is for scan command, the big buffer at end of command array */
Zhu Yib481de92007-09-25 17:54:57 -0700247 if (is_huge)
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800248 return q->n_window; /* must be power of 2 */
Zhu Yib481de92007-09-25 17:54:57 -0700249
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800250 /* Otherwise, use normal size buffers */
Zhu Yib481de92007-09-25 17:54:57 -0700251 return index & (q->n_window - 1);
252}
253
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800254/**
255 * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
256 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800257static int iwl3945_queue_init(struct iwl3945_priv *priv, struct iwl3945_queue *q,
Zhu Yib481de92007-09-25 17:54:57 -0700258 int count, int slots_num, u32 id)
259{
260 q->n_bd = count;
261 q->n_window = slots_num;
262 q->id = id;
263
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800264 /* count must be power-of-two size, otherwise iwl3945_queue_inc_wrap
265 * and iwl3945_queue_dec_wrap are broken. */
Zhu Yib481de92007-09-25 17:54:57 -0700266 BUG_ON(!is_power_of_2(count));
267
268 /* slots_num must be power-of-two size, otherwise
269 * get_cmd_index is broken. */
270 BUG_ON(!is_power_of_2(slots_num));
271
272 q->low_mark = q->n_window / 4;
273 if (q->low_mark < 4)
274 q->low_mark = 4;
275
276 q->high_mark = q->n_window / 8;
277 if (q->high_mark < 2)
278 q->high_mark = 2;
279
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800280 q->write_ptr = q->read_ptr = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700281
282 return 0;
283}
284
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800285/**
286 * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
287 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800288static int iwl3945_tx_queue_alloc(struct iwl3945_priv *priv,
289 struct iwl3945_tx_queue *txq, u32 id)
Zhu Yib481de92007-09-25 17:54:57 -0700290{
291 struct pci_dev *dev = priv->pci_dev;
292
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800293 /* Driver private data, only for Tx (not command) queues,
294 * not shared with device. */
Zhu Yib481de92007-09-25 17:54:57 -0700295 if (id != IWL_CMD_QUEUE_NUM) {
296 txq->txb = kmalloc(sizeof(txq->txb[0]) *
297 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
298 if (!txq->txb) {
Ian Schram01ebd062007-10-25 17:15:22 +0800299 IWL_ERROR("kmalloc for auxiliary BD "
Zhu Yib481de92007-09-25 17:54:57 -0700300 "structures failed\n");
301 goto error;
302 }
303 } else
304 txq->txb = NULL;
305
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800306 /* Circular buffer of transmit frame descriptors (TFDs),
307 * shared with device */
Zhu Yib481de92007-09-25 17:54:57 -0700308 txq->bd = pci_alloc_consistent(dev,
309 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
310 &txq->q.dma_addr);
311
312 if (!txq->bd) {
313 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
314 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
315 goto error;
316 }
317 txq->q.id = id;
318
319 return 0;
320
321 error:
322 if (txq->txb) {
323 kfree(txq->txb);
324 txq->txb = NULL;
325 }
326
327 return -ENOMEM;
328}
329
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800330/**
331 * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
332 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800333int iwl3945_tx_queue_init(struct iwl3945_priv *priv,
334 struct iwl3945_tx_queue *txq, int slots_num, u32 txq_id)
Zhu Yib481de92007-09-25 17:54:57 -0700335{
336 struct pci_dev *dev = priv->pci_dev;
337 int len;
338 int rc = 0;
339
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800340 /*
341 * Alloc buffer array for commands (Tx or other types of commands).
342 * For the command queue (#4), allocate command space + one big
343 * command for scan, since scan command is very huge; the system will
344 * not have two scans at the same time, so only one is needed.
345 * For data Tx queues (all other queues), no super-size command
346 * space is needed.
347 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800348 len = sizeof(struct iwl3945_cmd) * slots_num;
Zhu Yib481de92007-09-25 17:54:57 -0700349 if (txq_id == IWL_CMD_QUEUE_NUM)
350 len += IWL_MAX_SCAN_SIZE;
351 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
352 if (!txq->cmd)
353 return -ENOMEM;
354
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800355 /* Alloc driver data array and TFD circular buffer */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800356 rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
Zhu Yib481de92007-09-25 17:54:57 -0700357 if (rc) {
358 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
359
360 return -ENOMEM;
361 }
362 txq->need_update = 0;
363
364 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800365 * iwl3945_queue_inc_wrap and iwl3945_queue_dec_wrap are broken. */
Zhu Yib481de92007-09-25 17:54:57 -0700366 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800367
368 /* Initialize queue high/low-water, head/tail indexes */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800369 iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
Zhu Yib481de92007-09-25 17:54:57 -0700370
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800371 /* Tell device where to find queue, enable DMA channel. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800372 iwl3945_hw_tx_queue_init(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -0700373
374 return 0;
375}
376
377/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800378 * iwl3945_tx_queue_free - Deallocate DMA queue.
Zhu Yib481de92007-09-25 17:54:57 -0700379 * @txq: Transmit queue to deallocate.
380 *
381 * Empty queue by removing and destroying all BD's.
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800382 * Free all buffers.
383 * 0-fill, but do not free "txq" descriptor structure.
Zhu Yib481de92007-09-25 17:54:57 -0700384 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800385void iwl3945_tx_queue_free(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
Zhu Yib481de92007-09-25 17:54:57 -0700386{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800387 struct iwl3945_queue *q = &txq->q;
Zhu Yib481de92007-09-25 17:54:57 -0700388 struct pci_dev *dev = priv->pci_dev;
389 int len;
390
391 if (q->n_bd == 0)
392 return;
393
394 /* first, empty all BD's */
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800395 for (; q->write_ptr != q->read_ptr;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800396 q->read_ptr = iwl3945_queue_inc_wrap(q->read_ptr, q->n_bd))
397 iwl3945_hw_txq_free_tfd(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -0700398
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800399 len = sizeof(struct iwl3945_cmd) * q->n_window;
Zhu Yib481de92007-09-25 17:54:57 -0700400 if (q->id == IWL_CMD_QUEUE_NUM)
401 len += IWL_MAX_SCAN_SIZE;
402
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800403 /* De-alloc array of command/tx buffers */
Zhu Yib481de92007-09-25 17:54:57 -0700404 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
405
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800406 /* De-alloc circular buffer of TFDs */
Zhu Yib481de92007-09-25 17:54:57 -0700407 if (txq->q.n_bd)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800408 pci_free_consistent(dev, sizeof(struct iwl3945_tfd_frame) *
Zhu Yib481de92007-09-25 17:54:57 -0700409 txq->q.n_bd, txq->bd, txq->q.dma_addr);
410
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800411 /* De-alloc array of per-TFD driver data */
Zhu Yib481de92007-09-25 17:54:57 -0700412 if (txq->txb) {
413 kfree(txq->txb);
414 txq->txb = NULL;
415 }
416
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800417 /* 0-fill queue descriptor structure */
Zhu Yib481de92007-09-25 17:54:57 -0700418 memset(txq, 0, sizeof(*txq));
419}
420
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800421const u8 iwl3945_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
Zhu Yib481de92007-09-25 17:54:57 -0700422
423/*************** STATION TABLE MANAGEMENT ****
Ben Cahill9fbab512007-11-29 11:09:47 +0800424 * mac80211 should be examined to determine if sta_info is duplicating
Zhu Yib481de92007-09-25 17:54:57 -0700425 * the functionality provided here
426 */
427
428/**************************************************************/
Ian Schram01ebd062007-10-25 17:15:22 +0800429#if 0 /* temporary disable till we add real remove station */
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800430/**
431 * iwl3945_remove_station - Remove driver's knowledge of station.
432 *
433 * NOTE: This does not remove station from device's station table.
434 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800435static u8 iwl3945_remove_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap)
Zhu Yib481de92007-09-25 17:54:57 -0700436{
437 int index = IWL_INVALID_STATION;
438 int i;
439 unsigned long flags;
440
441 spin_lock_irqsave(&priv->sta_lock, flags);
442
443 if (is_ap)
444 index = IWL_AP_ID;
445 else if (is_broadcast_ether_addr(addr))
446 index = priv->hw_setting.bcast_sta_id;
447 else
448 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
449 if (priv->stations[i].used &&
450 !compare_ether_addr(priv->stations[i].sta.sta.addr,
451 addr)) {
452 index = i;
453 break;
454 }
455
456 if (unlikely(index == IWL_INVALID_STATION))
457 goto out;
458
459 if (priv->stations[index].used) {
460 priv->stations[index].used = 0;
461 priv->num_stations--;
462 }
463
464 BUG_ON(priv->num_stations < 0);
465
466out:
467 spin_unlock_irqrestore(&priv->sta_lock, flags);
468 return 0;
469}
Zhu Yi556f8db2007-09-27 11:27:33 +0800470#endif
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800471
472/**
473 * iwl3945_clear_stations_table - Clear the driver's station table
474 *
475 * NOTE: This does not clear or otherwise alter the device's station table.
476 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800477static void iwl3945_clear_stations_table(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700478{
479 unsigned long flags;
480
481 spin_lock_irqsave(&priv->sta_lock, flags);
482
483 priv->num_stations = 0;
484 memset(priv->stations, 0, sizeof(priv->stations));
485
486 spin_unlock_irqrestore(&priv->sta_lock, flags);
487}
488
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800489/**
490 * iwl3945_add_station - Add station to station tables in driver and device
491 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800492u8 iwl3945_add_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap, u8 flags)
Zhu Yib481de92007-09-25 17:54:57 -0700493{
494 int i;
495 int index = IWL_INVALID_STATION;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800496 struct iwl3945_station_entry *station;
Zhu Yib481de92007-09-25 17:54:57 -0700497 unsigned long flags_spin;
Joe Perches0795af52007-10-03 17:59:30 -0700498 DECLARE_MAC_BUF(mac);
Zhu Yic14c5212007-09-27 11:27:35 +0800499 u8 rate;
Zhu Yib481de92007-09-25 17:54:57 -0700500
501 spin_lock_irqsave(&priv->sta_lock, flags_spin);
502 if (is_ap)
503 index = IWL_AP_ID;
504 else if (is_broadcast_ether_addr(addr))
505 index = priv->hw_setting.bcast_sta_id;
506 else
507 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
508 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
509 addr)) {
510 index = i;
511 break;
512 }
513
514 if (!priv->stations[i].used &&
515 index == IWL_INVALID_STATION)
516 index = i;
517 }
518
Ian Schram01ebd062007-10-25 17:15:22 +0800519 /* These two conditions has the same outcome but keep them separate
Zhu Yib481de92007-09-25 17:54:57 -0700520 since they have different meaning */
521 if (unlikely(index == IWL_INVALID_STATION)) {
522 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
523 return index;
524 }
525
526 if (priv->stations[index].used &&
527 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
528 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
529 return index;
530 }
531
Joe Perches0795af52007-10-03 17:59:30 -0700532 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
Zhu Yib481de92007-09-25 17:54:57 -0700533 station = &priv->stations[index];
534 station->used = 1;
535 priv->num_stations++;
536
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800537 /* Set up the REPLY_ADD_STA command to send to device */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800538 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
Zhu Yib481de92007-09-25 17:54:57 -0700539 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
540 station->sta.mode = 0;
541 station->sta.sta.sta_id = index;
542 station->sta.station_flags = 0;
543
Johannes Berg8318d782008-01-24 19:38:38 +0100544 if (priv->band == IEEE80211_BAND_5GHZ)
Tomas Winkler69946332007-10-25 17:15:27 +0800545 rate = IWL_RATE_6M_PLCP;
546 else
547 rate = IWL_RATE_1M_PLCP;
Zhu Yic14c5212007-09-27 11:27:35 +0800548
549 /* Turn on both antennas for the station... */
550 station->sta.rate_n_flags =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800551 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
Zhu Yic14c5212007-09-27 11:27:35 +0800552 station->current_rate.rate_n_flags =
553 le16_to_cpu(station->sta.rate_n_flags);
554
Zhu Yib481de92007-09-25 17:54:57 -0700555 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800556
557 /* Add station to device's station table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800558 iwl3945_send_add_station(priv, &station->sta, flags);
Zhu Yib481de92007-09-25 17:54:57 -0700559 return index;
560
561}
562
563/*************** DRIVER STATUS FUNCTIONS *****/
564
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800565static inline int iwl3945_is_ready(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700566{
567 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
568 * set but EXIT_PENDING is not */
569 return test_bit(STATUS_READY, &priv->status) &&
570 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
571 !test_bit(STATUS_EXIT_PENDING, &priv->status);
572}
573
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800574static inline int iwl3945_is_alive(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700575{
576 return test_bit(STATUS_ALIVE, &priv->status);
577}
578
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800579static inline int iwl3945_is_init(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700580{
581 return test_bit(STATUS_INIT, &priv->status);
582}
583
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800584static inline int iwl3945_is_rfkill(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700585{
586 return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
587 test_bit(STATUS_RF_KILL_SW, &priv->status);
588}
589
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800590static inline int iwl3945_is_ready_rf(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700591{
592
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800593 if (iwl3945_is_rfkill(priv))
Zhu Yib481de92007-09-25 17:54:57 -0700594 return 0;
595
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800596 return iwl3945_is_ready(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700597}
598
599/*************** HOST COMMAND QUEUE FUNCTIONS *****/
600
601#define IWL_CMD(x) case x : return #x
602
603static const char *get_cmd_string(u8 cmd)
604{
605 switch (cmd) {
606 IWL_CMD(REPLY_ALIVE);
607 IWL_CMD(REPLY_ERROR);
608 IWL_CMD(REPLY_RXON);
609 IWL_CMD(REPLY_RXON_ASSOC);
610 IWL_CMD(REPLY_QOS_PARAM);
611 IWL_CMD(REPLY_RXON_TIMING);
612 IWL_CMD(REPLY_ADD_STA);
613 IWL_CMD(REPLY_REMOVE_STA);
614 IWL_CMD(REPLY_REMOVE_ALL_STA);
615 IWL_CMD(REPLY_3945_RX);
616 IWL_CMD(REPLY_TX);
617 IWL_CMD(REPLY_RATE_SCALE);
618 IWL_CMD(REPLY_LEDS_CMD);
619 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
620 IWL_CMD(RADAR_NOTIFICATION);
621 IWL_CMD(REPLY_QUIET_CMD);
622 IWL_CMD(REPLY_CHANNEL_SWITCH);
623 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
624 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
625 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
626 IWL_CMD(POWER_TABLE_CMD);
627 IWL_CMD(PM_SLEEP_NOTIFICATION);
628 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
629 IWL_CMD(REPLY_SCAN_CMD);
630 IWL_CMD(REPLY_SCAN_ABORT_CMD);
631 IWL_CMD(SCAN_START_NOTIFICATION);
632 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
633 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
634 IWL_CMD(BEACON_NOTIFICATION);
635 IWL_CMD(REPLY_TX_BEACON);
636 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
637 IWL_CMD(QUIET_NOTIFICATION);
638 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
639 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
640 IWL_CMD(REPLY_BT_CONFIG);
641 IWL_CMD(REPLY_STATISTICS_CMD);
642 IWL_CMD(STATISTICS_NOTIFICATION);
643 IWL_CMD(REPLY_CARD_STATE_CMD);
644 IWL_CMD(CARD_STATE_NOTIFICATION);
645 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
646 default:
647 return "UNKNOWN";
648
649 }
650}
651
652#define HOST_COMPLETE_TIMEOUT (HZ / 2)
653
654/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800655 * iwl3945_enqueue_hcmd - enqueue a uCode command
Zhu Yib481de92007-09-25 17:54:57 -0700656 * @priv: device private data point
657 * @cmd: a point to the ucode command structure
658 *
659 * The function returns < 0 values to indicate the operation is
660 * failed. On success, it turns the index (> 0) of command in the
661 * command queue.
662 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800663static int iwl3945_enqueue_hcmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700664{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800665 struct iwl3945_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
666 struct iwl3945_queue *q = &txq->q;
667 struct iwl3945_tfd_frame *tfd;
Zhu Yib481de92007-09-25 17:54:57 -0700668 u32 *control_flags;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800669 struct iwl3945_cmd *out_cmd;
Zhu Yib481de92007-09-25 17:54:57 -0700670 u32 idx;
671 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
672 dma_addr_t phys_addr;
673 int pad;
674 u16 count;
675 int ret;
676 unsigned long flags;
677
678 /* If any of the command structures end up being larger than
679 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
680 * we will need to increase the size of the TFD entries */
681 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
682 !(cmd->meta.flags & CMD_SIZE_HUGE));
683
Gregory Greenmanc342a1b2008-02-06 11:20:40 -0800684
685 if (iwl3945_is_rfkill(priv)) {
686 IWL_DEBUG_INFO("Not sending command - RF KILL");
687 return -EIO;
688 }
689
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800690 if (iwl3945_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
Zhu Yib481de92007-09-25 17:54:57 -0700691 IWL_ERROR("No space for Tx\n");
692 return -ENOSPC;
693 }
694
695 spin_lock_irqsave(&priv->hcmd_lock, flags);
696
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800697 tfd = &txq->bd[q->write_ptr];
Zhu Yib481de92007-09-25 17:54:57 -0700698 memset(tfd, 0, sizeof(*tfd));
699
700 control_flags = (u32 *) tfd;
701
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800702 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
Zhu Yib481de92007-09-25 17:54:57 -0700703 out_cmd = &txq->cmd[idx];
704
705 out_cmd->hdr.cmd = cmd->id;
706 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
707 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
708
709 /* At this point, the out_cmd now has all of the incoming cmd
710 * information */
711
712 out_cmd->hdr.flags = 0;
713 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800714 INDEX_TO_SEQ(q->write_ptr));
Zhu Yib481de92007-09-25 17:54:57 -0700715 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
716 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
717
718 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800719 offsetof(struct iwl3945_cmd, hdr);
720 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
Zhu Yib481de92007-09-25 17:54:57 -0700721
722 pad = U32_PAD(cmd->len);
723 count = TFD_CTL_COUNT_GET(*control_flags);
724 *control_flags = TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad);
725
726 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
727 "%d bytes at %d[%d]:%d\n",
728 get_cmd_string(out_cmd->hdr.cmd),
729 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800730 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
Zhu Yib481de92007-09-25 17:54:57 -0700731
732 txq->need_update = 1;
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800733
734 /* Increment and update queue's write index */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800735 q->write_ptr = iwl3945_queue_inc_wrap(q->write_ptr, q->n_bd);
736 ret = iwl3945_tx_queue_update_write_ptr(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -0700737
738 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
739 return ret ? ret : idx;
740}
741
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800742static int iwl3945_send_cmd_async(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700743{
744 int ret;
745
746 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
747
748 /* An asynchronous command can not expect an SKB to be set. */
749 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
750
751 /* An asynchronous command MUST have a callback. */
752 BUG_ON(!cmd->meta.u.callback);
753
754 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
755 return -EBUSY;
756
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800757 ret = iwl3945_enqueue_hcmd(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700758 if (ret < 0) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800759 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
Zhu Yib481de92007-09-25 17:54:57 -0700760 get_cmd_string(cmd->id), ret);
761 return ret;
762 }
763 return 0;
764}
765
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800766static int iwl3945_send_cmd_sync(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700767{
768 int cmd_idx;
769 int ret;
770 static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
771
772 BUG_ON(cmd->meta.flags & CMD_ASYNC);
773
774 /* A synchronous command can not have a callback set. */
775 BUG_ON(cmd->meta.u.callback != NULL);
776
777 if (atomic_xchg(&entry, 1)) {
778 IWL_ERROR("Error sending %s: Already sending a host command\n",
779 get_cmd_string(cmd->id));
780 return -EBUSY;
781 }
782
783 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
784
785 if (cmd->meta.flags & CMD_WANT_SKB)
786 cmd->meta.source = &cmd->meta;
787
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800788 cmd_idx = iwl3945_enqueue_hcmd(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700789 if (cmd_idx < 0) {
790 ret = cmd_idx;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800791 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
Zhu Yib481de92007-09-25 17:54:57 -0700792 get_cmd_string(cmd->id), ret);
793 goto out;
794 }
795
796 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
797 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
798 HOST_COMPLETE_TIMEOUT);
799 if (!ret) {
800 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
801 IWL_ERROR("Error sending %s: time out after %dms.\n",
802 get_cmd_string(cmd->id),
803 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
804
805 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
806 ret = -ETIMEDOUT;
807 goto cancel;
808 }
809 }
810
811 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
812 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
813 get_cmd_string(cmd->id));
814 ret = -ECANCELED;
815 goto fail;
816 }
817 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
818 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
819 get_cmd_string(cmd->id));
820 ret = -EIO;
821 goto fail;
822 }
823 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
824 IWL_ERROR("Error: Response NULL in '%s'\n",
825 get_cmd_string(cmd->id));
826 ret = -EIO;
827 goto out;
828 }
829
830 ret = 0;
831 goto out;
832
833cancel:
834 if (cmd->meta.flags & CMD_WANT_SKB) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800835 struct iwl3945_cmd *qcmd;
Zhu Yib481de92007-09-25 17:54:57 -0700836
837 /* Cancel the CMD_WANT_SKB flag for the cmd in the
838 * TX cmd queue. Otherwise in case the cmd comes
839 * in later, it will possibly set an invalid
840 * address (cmd->meta.source). */
841 qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
842 qcmd->meta.flags &= ~CMD_WANT_SKB;
843 }
844fail:
845 if (cmd->meta.u.skb) {
846 dev_kfree_skb_any(cmd->meta.u.skb);
847 cmd->meta.u.skb = NULL;
848 }
849out:
850 atomic_set(&entry, 0);
851 return ret;
852}
853
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800854int iwl3945_send_cmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700855{
Zhu Yib481de92007-09-25 17:54:57 -0700856 if (cmd->meta.flags & CMD_ASYNC)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800857 return iwl3945_send_cmd_async(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700858
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800859 return iwl3945_send_cmd_sync(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700860}
861
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800862int iwl3945_send_cmd_pdu(struct iwl3945_priv *priv, u8 id, u16 len, const void *data)
Zhu Yib481de92007-09-25 17:54:57 -0700863{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800864 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -0700865 .id = id,
866 .len = len,
867 .data = data,
868 };
869
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800870 return iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700871}
872
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800873static int __must_check iwl3945_send_cmd_u32(struct iwl3945_priv *priv, u8 id, u32 val)
Zhu Yib481de92007-09-25 17:54:57 -0700874{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800875 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -0700876 .id = id,
877 .len = sizeof(val),
878 .data = &val,
879 };
880
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800881 return iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700882}
883
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800884int iwl3945_send_statistics_request(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700885{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800886 return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
Zhu Yib481de92007-09-25 17:54:57 -0700887}
888
889/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800890 * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
Johannes Berg8318d782008-01-24 19:38:38 +0100891 * @band: 2.4 or 5 GHz band
892 * @channel: Any channel valid for the requested band
Zhu Yib481de92007-09-25 17:54:57 -0700893
Johannes Berg8318d782008-01-24 19:38:38 +0100894 * In addition to setting the staging RXON, priv->band is also set.
Zhu Yib481de92007-09-25 17:54:57 -0700895 *
896 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
Johannes Berg8318d782008-01-24 19:38:38 +0100897 * in the staging RXON flag structure based on the band
Zhu Yib481de92007-09-25 17:54:57 -0700898 */
Johannes Berg8318d782008-01-24 19:38:38 +0100899static int iwl3945_set_rxon_channel(struct iwl3945_priv *priv,
900 enum ieee80211_band band,
901 u16 channel)
Zhu Yib481de92007-09-25 17:54:57 -0700902{
Johannes Berg8318d782008-01-24 19:38:38 +0100903 if (!iwl3945_get_channel_info(priv, band, channel)) {
Zhu Yib481de92007-09-25 17:54:57 -0700904 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
Johannes Berg8318d782008-01-24 19:38:38 +0100905 channel, band);
Zhu Yib481de92007-09-25 17:54:57 -0700906 return -EINVAL;
907 }
908
909 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
Johannes Berg8318d782008-01-24 19:38:38 +0100910 (priv->band == band))
Zhu Yib481de92007-09-25 17:54:57 -0700911 return 0;
912
913 priv->staging_rxon.channel = cpu_to_le16(channel);
Johannes Berg8318d782008-01-24 19:38:38 +0100914 if (band == IEEE80211_BAND_5GHZ)
Zhu Yib481de92007-09-25 17:54:57 -0700915 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
916 else
917 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
918
Johannes Berg8318d782008-01-24 19:38:38 +0100919 priv->band = band;
Zhu Yib481de92007-09-25 17:54:57 -0700920
Johannes Berg8318d782008-01-24 19:38:38 +0100921 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
Zhu Yib481de92007-09-25 17:54:57 -0700922
923 return 0;
924}
925
926/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800927 * iwl3945_check_rxon_cmd - validate RXON structure is valid
Zhu Yib481de92007-09-25 17:54:57 -0700928 *
929 * NOTE: This is really only useful during development and can eventually
930 * be #ifdef'd out once the driver is stable and folks aren't actively
931 * making changes
932 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800933static int iwl3945_check_rxon_cmd(struct iwl3945_rxon_cmd *rxon)
Zhu Yib481de92007-09-25 17:54:57 -0700934{
935 int error = 0;
936 int counter = 1;
937
938 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
939 error |= le32_to_cpu(rxon->flags &
940 (RXON_FLG_TGJ_NARROW_BAND_MSK |
941 RXON_FLG_RADAR_DETECT_MSK));
942 if (error)
943 IWL_WARNING("check 24G fields %d | %d\n",
944 counter++, error);
945 } else {
946 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
947 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
948 if (error)
949 IWL_WARNING("check 52 fields %d | %d\n",
950 counter++, error);
951 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
952 if (error)
953 IWL_WARNING("check 52 CCK %d | %d\n",
954 counter++, error);
955 }
956 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
957 if (error)
958 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
959
960 /* make sure basic rates 6Mbps and 1Mbps are supported */
961 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
962 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
963 if (error)
964 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
965
966 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
967 if (error)
968 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
969
970 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
971 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
972 if (error)
973 IWL_WARNING("check CCK and short slot %d | %d\n",
974 counter++, error);
975
976 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
977 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
978 if (error)
979 IWL_WARNING("check CCK & auto detect %d | %d\n",
980 counter++, error);
981
982 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
983 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
984 if (error)
985 IWL_WARNING("check TGG and auto detect %d | %d\n",
986 counter++, error);
987
988 if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
989 error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
990 RXON_FLG_ANT_A_MSK)) == 0);
991 if (error)
992 IWL_WARNING("check antenna %d %d\n", counter++, error);
993
994 if (error)
995 IWL_WARNING("Tuning to channel %d\n",
996 le16_to_cpu(rxon->channel));
997
998 if (error) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800999 IWL_ERROR("Not a valid iwl3945_rxon_assoc_cmd field values\n");
Zhu Yib481de92007-09-25 17:54:57 -07001000 return -1;
1001 }
1002 return 0;
1003}
1004
1005/**
Ben Cahill9fbab512007-11-29 11:09:47 +08001006 * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
Ian Schram01ebd062007-10-25 17:15:22 +08001007 * @priv: staging_rxon is compared to active_rxon
Zhu Yib481de92007-09-25 17:54:57 -07001008 *
Ben Cahill9fbab512007-11-29 11:09:47 +08001009 * If the RXON structure is changing enough to require a new tune,
1010 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
1011 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
Zhu Yib481de92007-09-25 17:54:57 -07001012 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001013static int iwl3945_full_rxon_required(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001014{
1015
1016 /* These items are only settable from the full RXON command */
1017 if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
1018 compare_ether_addr(priv->staging_rxon.bssid_addr,
1019 priv->active_rxon.bssid_addr) ||
1020 compare_ether_addr(priv->staging_rxon.node_addr,
1021 priv->active_rxon.node_addr) ||
1022 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
1023 priv->active_rxon.wlap_bssid_addr) ||
1024 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
1025 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
1026 (priv->staging_rxon.air_propagation !=
1027 priv->active_rxon.air_propagation) ||
1028 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
1029 return 1;
1030
1031 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
1032 * be updated with the RXON_ASSOC command -- however only some
1033 * flag transitions are allowed using RXON_ASSOC */
1034
1035 /* Check if we are not switching bands */
1036 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
1037 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
1038 return 1;
1039
1040 /* Check if we are switching association toggle */
1041 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
1042 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
1043 return 1;
1044
1045 return 0;
1046}
1047
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001048static int iwl3945_send_rxon_assoc(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001049{
1050 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001051 struct iwl3945_rx_packet *res = NULL;
1052 struct iwl3945_rxon_assoc_cmd rxon_assoc;
1053 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001054 .id = REPLY_RXON_ASSOC,
1055 .len = sizeof(rxon_assoc),
1056 .meta.flags = CMD_WANT_SKB,
1057 .data = &rxon_assoc,
1058 };
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001059 const struct iwl3945_rxon_cmd *rxon1 = &priv->staging_rxon;
1060 const struct iwl3945_rxon_cmd *rxon2 = &priv->active_rxon;
Zhu Yib481de92007-09-25 17:54:57 -07001061
1062 if ((rxon1->flags == rxon2->flags) &&
1063 (rxon1->filter_flags == rxon2->filter_flags) &&
1064 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1065 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1066 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1067 return 0;
1068 }
1069
1070 rxon_assoc.flags = priv->staging_rxon.flags;
1071 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1072 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1073 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1074 rxon_assoc.reserved = 0;
1075
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001076 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001077 if (rc)
1078 return rc;
1079
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001080 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001081 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1082 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
1083 rc = -EIO;
1084 }
1085
1086 priv->alloc_rxb_skb--;
1087 dev_kfree_skb_any(cmd.meta.u.skb);
1088
1089 return rc;
1090}
1091
1092/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001093 * iwl3945_commit_rxon - commit staging_rxon to hardware
Zhu Yib481de92007-09-25 17:54:57 -07001094 *
Ian Schram01ebd062007-10-25 17:15:22 +08001095 * The RXON command in staging_rxon is committed to the hardware and
Zhu Yib481de92007-09-25 17:54:57 -07001096 * the active_rxon structure is updated with the new data. This
1097 * function correctly transitions out of the RXON_ASSOC_MSK state if
1098 * a HW tune is required based on the RXON structure changes.
1099 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001100static int iwl3945_commit_rxon(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001101{
1102 /* cast away the const for active_rxon in this function */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001103 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
Zhu Yib481de92007-09-25 17:54:57 -07001104 int rc = 0;
Joe Perches0795af52007-10-03 17:59:30 -07001105 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07001106
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001107 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07001108 return -1;
1109
1110 /* always get timestamp with Rx frame */
1111 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
1112
1113 /* select antenna */
1114 priv->staging_rxon.flags &=
1115 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
1116 priv->staging_rxon.flags |= iwl3945_get_antenna_flags(priv);
1117
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001118 rc = iwl3945_check_rxon_cmd(&priv->staging_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07001119 if (rc) {
1120 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
1121 return -EINVAL;
1122 }
1123
1124 /* If we don't need to send a full RXON, we can use
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001125 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
Zhu Yib481de92007-09-25 17:54:57 -07001126 * and other flags for the current radio configuration. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001127 if (!iwl3945_full_rxon_required(priv)) {
1128 rc = iwl3945_send_rxon_assoc(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001129 if (rc) {
1130 IWL_ERROR("Error setting RXON_ASSOC "
1131 "configuration (%d).\n", rc);
1132 return rc;
1133 }
1134
1135 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1136
1137 return 0;
1138 }
1139
1140 /* If we are currently associated and the new config requires
1141 * an RXON_ASSOC and the new config wants the associated mask enabled,
1142 * we must clear the associated from the active configuration
1143 * before we apply the new config */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001144 if (iwl3945_is_associated(priv) &&
Zhu Yib481de92007-09-25 17:54:57 -07001145 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
1146 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
1147 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1148
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001149 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1150 sizeof(struct iwl3945_rxon_cmd),
Zhu Yib481de92007-09-25 17:54:57 -07001151 &priv->active_rxon);
1152
1153 /* If the mask clearing failed then we set
1154 * active_rxon back to what it was previously */
1155 if (rc) {
1156 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1157 IWL_ERROR("Error clearing ASSOC_MSK on current "
1158 "configuration (%d).\n", rc);
1159 return rc;
1160 }
Zhu Yib481de92007-09-25 17:54:57 -07001161 }
1162
1163 IWL_DEBUG_INFO("Sending RXON\n"
1164 "* with%s RXON_FILTER_ASSOC_MSK\n"
1165 "* channel = %d\n"
Joe Perches0795af52007-10-03 17:59:30 -07001166 "* bssid = %s\n",
Zhu Yib481de92007-09-25 17:54:57 -07001167 ((priv->staging_rxon.filter_flags &
1168 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1169 le16_to_cpu(priv->staging_rxon.channel),
Joe Perches0795af52007-10-03 17:59:30 -07001170 print_mac(mac, priv->staging_rxon.bssid_addr));
Zhu Yib481de92007-09-25 17:54:57 -07001171
1172 /* Apply the new configuration */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001173 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1174 sizeof(struct iwl3945_rxon_cmd), &priv->staging_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07001175 if (rc) {
1176 IWL_ERROR("Error setting new configuration (%d).\n", rc);
1177 return rc;
1178 }
1179
1180 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1181
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001182 iwl3945_clear_stations_table(priv);
Zhu Yi556f8db2007-09-27 11:27:33 +08001183
Zhu Yib481de92007-09-25 17:54:57 -07001184 /* If we issue a new RXON command which required a tune then we must
1185 * send a new TXPOWER command or we won't be able to Tx any frames */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001186 rc = iwl3945_hw_reg_send_txpower(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001187 if (rc) {
1188 IWL_ERROR("Error setting Tx power (%d).\n", rc);
1189 return rc;
1190 }
1191
1192 /* Add the broadcast address so we can send broadcast frames */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001193 if (iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0) ==
Zhu Yib481de92007-09-25 17:54:57 -07001194 IWL_INVALID_STATION) {
1195 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1196 return -EIO;
1197 }
1198
1199 /* If we have set the ASSOC_MSK and we are in BSS mode then
1200 * add the IWL_AP_ID to the station rate table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001201 if (iwl3945_is_associated(priv) &&
Zhu Yib481de92007-09-25 17:54:57 -07001202 (priv->iw_mode == IEEE80211_IF_TYPE_STA))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001203 if (iwl3945_add_station(priv, priv->active_rxon.bssid_addr, 1, 0)
Zhu Yib481de92007-09-25 17:54:57 -07001204 == IWL_INVALID_STATION) {
1205 IWL_ERROR("Error adding AP address for transmit.\n");
1206 return -EIO;
1207 }
1208
Johannes Berg8318d782008-01-24 19:38:38 +01001209 /* Init the hardware's rate fallback order based on the band */
Zhu Yib481de92007-09-25 17:54:57 -07001210 rc = iwl3945_init_hw_rate_table(priv);
1211 if (rc) {
1212 IWL_ERROR("Error setting HW rate table: %02X\n", rc);
1213 return -EIO;
1214 }
1215
1216 return 0;
1217}
1218
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001219static int iwl3945_send_bt_config(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001220{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001221 struct iwl3945_bt_cmd bt_cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001222 .flags = 3,
1223 .lead_time = 0xAA,
1224 .max_kill = 1,
1225 .kill_ack_mask = 0,
1226 .kill_cts_mask = 0,
1227 };
1228
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001229 return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1230 sizeof(struct iwl3945_bt_cmd), &bt_cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001231}
1232
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001233static int iwl3945_send_scan_abort(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001234{
1235 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001236 struct iwl3945_rx_packet *res;
1237 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001238 .id = REPLY_SCAN_ABORT_CMD,
1239 .meta.flags = CMD_WANT_SKB,
1240 };
1241
1242 /* If there isn't a scan actively going on in the hardware
1243 * then we are in between scan bands and not actually
1244 * actively scanning, so don't send the abort command */
1245 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1246 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1247 return 0;
1248 }
1249
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001250 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001251 if (rc) {
1252 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1253 return rc;
1254 }
1255
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001256 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001257 if (res->u.status != CAN_ABORT_STATUS) {
1258 /* The scan abort will return 1 for success or
1259 * 2 for "failure". A failure condition can be
1260 * due to simply not being in an active scan which
1261 * can occur if we send the scan abort before we
1262 * the microcode has notified us that a scan is
1263 * completed. */
1264 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1265 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1266 clear_bit(STATUS_SCAN_HW, &priv->status);
1267 }
1268
1269 dev_kfree_skb_any(cmd.meta.u.skb);
1270
1271 return rc;
1272}
1273
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001274static int iwl3945_card_state_sync_callback(struct iwl3945_priv *priv,
1275 struct iwl3945_cmd *cmd,
Zhu Yib481de92007-09-25 17:54:57 -07001276 struct sk_buff *skb)
1277{
1278 return 1;
1279}
1280
1281/*
1282 * CARD_STATE_CMD
1283 *
Ben Cahill9fbab512007-11-29 11:09:47 +08001284 * Use: Sets the device's internal card state to enable, disable, or halt
Zhu Yib481de92007-09-25 17:54:57 -07001285 *
1286 * When in the 'enable' state the card operates as normal.
1287 * When in the 'disable' state, the card enters into a low power mode.
1288 * When in the 'halt' state, the card is shut down and must be fully
1289 * restarted to come back on.
1290 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001291static int iwl3945_send_card_state(struct iwl3945_priv *priv, u32 flags, u8 meta_flag)
Zhu Yib481de92007-09-25 17:54:57 -07001292{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001293 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001294 .id = REPLY_CARD_STATE_CMD,
1295 .len = sizeof(u32),
1296 .data = &flags,
1297 .meta.flags = meta_flag,
1298 };
1299
1300 if (meta_flag & CMD_ASYNC)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001301 cmd.meta.u.callback = iwl3945_card_state_sync_callback;
Zhu Yib481de92007-09-25 17:54:57 -07001302
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001303 return iwl3945_send_cmd(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001304}
1305
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001306static int iwl3945_add_sta_sync_callback(struct iwl3945_priv *priv,
1307 struct iwl3945_cmd *cmd, struct sk_buff *skb)
Zhu Yib481de92007-09-25 17:54:57 -07001308{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001309 struct iwl3945_rx_packet *res = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07001310
1311 if (!skb) {
1312 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1313 return 1;
1314 }
1315
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001316 res = (struct iwl3945_rx_packet *)skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001317 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1318 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1319 res->hdr.flags);
1320 return 1;
1321 }
1322
1323 switch (res->u.add_sta.status) {
1324 case ADD_STA_SUCCESS_MSK:
1325 break;
1326 default:
1327 break;
1328 }
1329
1330 /* We didn't cache the SKB; let the caller free it */
1331 return 1;
1332}
1333
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001334int iwl3945_send_add_station(struct iwl3945_priv *priv,
1335 struct iwl3945_addsta_cmd *sta, u8 flags)
Zhu Yib481de92007-09-25 17:54:57 -07001336{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001337 struct iwl3945_rx_packet *res = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07001338 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001339 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001340 .id = REPLY_ADD_STA,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001341 .len = sizeof(struct iwl3945_addsta_cmd),
Zhu Yib481de92007-09-25 17:54:57 -07001342 .meta.flags = flags,
1343 .data = sta,
1344 };
1345
1346 if (flags & CMD_ASYNC)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001347 cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
Zhu Yib481de92007-09-25 17:54:57 -07001348 else
1349 cmd.meta.flags |= CMD_WANT_SKB;
1350
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001351 rc = iwl3945_send_cmd(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001352
1353 if (rc || (flags & CMD_ASYNC))
1354 return rc;
1355
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001356 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001357 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1358 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1359 res->hdr.flags);
1360 rc = -EIO;
1361 }
1362
1363 if (rc == 0) {
1364 switch (res->u.add_sta.status) {
1365 case ADD_STA_SUCCESS_MSK:
1366 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1367 break;
1368 default:
1369 rc = -EIO;
1370 IWL_WARNING("REPLY_ADD_STA failed\n");
1371 break;
1372 }
1373 }
1374
1375 priv->alloc_rxb_skb--;
1376 dev_kfree_skb_any(cmd.meta.u.skb);
1377
1378 return rc;
1379}
1380
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001381static int iwl3945_update_sta_key_info(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07001382 struct ieee80211_key_conf *keyconf,
1383 u8 sta_id)
1384{
1385 unsigned long flags;
1386 __le16 key_flags = 0;
1387
1388 switch (keyconf->alg) {
1389 case ALG_CCMP:
1390 key_flags |= STA_KEY_FLG_CCMP;
1391 key_flags |= cpu_to_le16(
1392 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1393 key_flags &= ~STA_KEY_FLG_INVALID;
1394 break;
1395 case ALG_TKIP:
1396 case ALG_WEP:
Zhu Yib481de92007-09-25 17:54:57 -07001397 default:
1398 return -EINVAL;
1399 }
1400 spin_lock_irqsave(&priv->sta_lock, flags);
1401 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1402 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
1403 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1404 keyconf->keylen);
1405
1406 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1407 keyconf->keylen);
1408 priv->stations[sta_id].sta.key.key_flags = key_flags;
1409 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1410 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1411
1412 spin_unlock_irqrestore(&priv->sta_lock, flags);
1413
1414 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001415 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
Zhu Yib481de92007-09-25 17:54:57 -07001416 return 0;
1417}
1418
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001419static int iwl3945_clear_sta_key_info(struct iwl3945_priv *priv, u8 sta_id)
Zhu Yib481de92007-09-25 17:54:57 -07001420{
1421 unsigned long flags;
1422
1423 spin_lock_irqsave(&priv->sta_lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001424 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
1425 memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl3945_keyinfo));
Zhu Yib481de92007-09-25 17:54:57 -07001426 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1427 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1428 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1429 spin_unlock_irqrestore(&priv->sta_lock, flags);
1430
1431 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001432 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
Zhu Yib481de92007-09-25 17:54:57 -07001433 return 0;
1434}
1435
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001436static void iwl3945_clear_free_frames(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001437{
1438 struct list_head *element;
1439
1440 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1441 priv->frames_count);
1442
1443 while (!list_empty(&priv->free_frames)) {
1444 element = priv->free_frames.next;
1445 list_del(element);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001446 kfree(list_entry(element, struct iwl3945_frame, list));
Zhu Yib481de92007-09-25 17:54:57 -07001447 priv->frames_count--;
1448 }
1449
1450 if (priv->frames_count) {
1451 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1452 priv->frames_count);
1453 priv->frames_count = 0;
1454 }
1455}
1456
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001457static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001458{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001459 struct iwl3945_frame *frame;
Zhu Yib481de92007-09-25 17:54:57 -07001460 struct list_head *element;
1461 if (list_empty(&priv->free_frames)) {
1462 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1463 if (!frame) {
1464 IWL_ERROR("Could not allocate frame!\n");
1465 return NULL;
1466 }
1467
1468 priv->frames_count++;
1469 return frame;
1470 }
1471
1472 element = priv->free_frames.next;
1473 list_del(element);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001474 return list_entry(element, struct iwl3945_frame, list);
Zhu Yib481de92007-09-25 17:54:57 -07001475}
1476
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001477static void iwl3945_free_frame(struct iwl3945_priv *priv, struct iwl3945_frame *frame)
Zhu Yib481de92007-09-25 17:54:57 -07001478{
1479 memset(frame, 0, sizeof(*frame));
1480 list_add(&frame->list, &priv->free_frames);
1481}
1482
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001483unsigned int iwl3945_fill_beacon_frame(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07001484 struct ieee80211_hdr *hdr,
1485 const u8 *dest, int left)
1486{
1487
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001488 if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
Zhu Yib481de92007-09-25 17:54:57 -07001489 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1490 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1491 return 0;
1492
1493 if (priv->ibss_beacon->len > left)
1494 return 0;
1495
1496 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1497
1498 return priv->ibss_beacon->len;
1499}
1500
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001501static u8 iwl3945_rate_get_lowest_plcp(int rate_mask)
Zhu Yib481de92007-09-25 17:54:57 -07001502{
1503 u8 i;
1504
1505 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001506 i = iwl3945_rates[i].next_ieee) {
Zhu Yib481de92007-09-25 17:54:57 -07001507 if (rate_mask & (1 << i))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001508 return iwl3945_rates[i].plcp;
Zhu Yib481de92007-09-25 17:54:57 -07001509 }
1510
1511 return IWL_RATE_INVALID;
1512}
1513
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001514static int iwl3945_send_beacon_cmd(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001515{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001516 struct iwl3945_frame *frame;
Zhu Yib481de92007-09-25 17:54:57 -07001517 unsigned int frame_size;
1518 int rc;
1519 u8 rate;
1520
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001521 frame = iwl3945_get_free_frame(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001522
1523 if (!frame) {
1524 IWL_ERROR("Could not obtain free frame buffer for beacon "
1525 "command.\n");
1526 return -ENOMEM;
1527 }
1528
1529 if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001530 rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic &
Zhu Yib481de92007-09-25 17:54:57 -07001531 0xFF0);
1532 if (rate == IWL_INVALID_RATE)
1533 rate = IWL_RATE_6M_PLCP;
1534 } else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001535 rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
Zhu Yib481de92007-09-25 17:54:57 -07001536 if (rate == IWL_INVALID_RATE)
1537 rate = IWL_RATE_1M_PLCP;
1538 }
1539
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001540 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
Zhu Yib481de92007-09-25 17:54:57 -07001541
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001542 rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
Zhu Yib481de92007-09-25 17:54:57 -07001543 &frame->u.cmd[0]);
1544
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001545 iwl3945_free_frame(priv, frame);
Zhu Yib481de92007-09-25 17:54:57 -07001546
1547 return rc;
1548}
1549
1550/******************************************************************************
1551 *
1552 * EEPROM related functions
1553 *
1554 ******************************************************************************/
1555
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001556static void get_eeprom_mac(struct iwl3945_priv *priv, u8 *mac)
Zhu Yib481de92007-09-25 17:54:57 -07001557{
1558 memcpy(mac, priv->eeprom.mac_address, 6);
1559}
1560
Reinette Chatre74a3a252008-01-23 10:15:19 -08001561/*
1562 * Clear the OWNER_MSK, to establish driver (instead of uCode running on
1563 * embedded controller) as EEPROM reader; each read is a series of pulses
1564 * to/from the EEPROM chip, not a single event, so even reads could conflict
1565 * if they weren't arbitrated by some ownership mechanism. Here, the driver
1566 * simply claims ownership, which should be safe when this function is called
1567 * (i.e. before loading uCode!).
1568 */
1569static inline int iwl3945_eeprom_acquire_semaphore(struct iwl3945_priv *priv)
1570{
1571 _iwl3945_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
1572 return 0;
1573}
1574
Zhu Yib481de92007-09-25 17:54:57 -07001575/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001576 * iwl3945_eeprom_init - read EEPROM contents
Zhu Yib481de92007-09-25 17:54:57 -07001577 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +08001578 * Load the EEPROM contents from adapter into priv->eeprom
Zhu Yib481de92007-09-25 17:54:57 -07001579 *
1580 * NOTE: This routine uses the non-debug IO access functions.
1581 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001582int iwl3945_eeprom_init(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001583{
Tomas Winkler58ff6d42008-02-13 02:47:54 +02001584 u16 *e = (u16 *)&priv->eeprom;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001585 u32 gp = iwl3945_read32(priv, CSR_EEPROM_GP);
Zhu Yib481de92007-09-25 17:54:57 -07001586 u32 r;
1587 int sz = sizeof(priv->eeprom);
1588 int rc;
1589 int i;
1590 u16 addr;
1591
1592 /* The EEPROM structure has several padding buffers within it
1593 * and when adding new EEPROM maps is subject to programmer errors
1594 * which may be very difficult to identify without explicitly
1595 * checking the resulting size of the eeprom map. */
1596 BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
1597
1598 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1599 IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
1600 return -ENOENT;
1601 }
1602
Cahill, Ben M6440adb2007-11-29 11:09:55 +08001603 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001604 rc = iwl3945_eeprom_acquire_semaphore(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001605 if (rc < 0) {
Ian Schram91e17472007-10-25 17:15:23 +08001606 IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
Zhu Yib481de92007-09-25 17:54:57 -07001607 return -ENOENT;
1608 }
1609
1610 /* eeprom is an array of 16bit values */
1611 for (addr = 0; addr < sz; addr += sizeof(u16)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001612 _iwl3945_write32(priv, CSR_EEPROM_REG, addr << 1);
1613 _iwl3945_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
Zhu Yib481de92007-09-25 17:54:57 -07001614
1615 for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
1616 i += IWL_EEPROM_ACCESS_DELAY) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001617 r = _iwl3945_read_direct32(priv, CSR_EEPROM_REG);
Zhu Yib481de92007-09-25 17:54:57 -07001618 if (r & CSR_EEPROM_REG_READ_VALID_MSK)
1619 break;
1620 udelay(IWL_EEPROM_ACCESS_DELAY);
1621 }
1622
1623 if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
1624 IWL_ERROR("Time out reading EEPROM[%d]", addr);
1625 return -ETIMEDOUT;
1626 }
Tomas Winkler58ff6d42008-02-13 02:47:54 +02001627 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
Zhu Yib481de92007-09-25 17:54:57 -07001628 }
1629
1630 return 0;
1631}
1632
1633/******************************************************************************
1634 *
1635 * Misc. internal state and helper functions
1636 *
1637 ******************************************************************************/
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08001638#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07001639
1640/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001641 * iwl3945_report_frame - dump frame to syslog during debug sessions
Zhu Yib481de92007-09-25 17:54:57 -07001642 *
Ben Cahill9fbab512007-11-29 11:09:47 +08001643 * You may hack this function to show different aspects of received frames,
Zhu Yib481de92007-09-25 17:54:57 -07001644 * including selective frame dumps.
1645 * group100 parameter selects whether to show 1 out of 100 good frames.
Zhu Yib481de92007-09-25 17:54:57 -07001646 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001647void iwl3945_report_frame(struct iwl3945_priv *priv,
1648 struct iwl3945_rx_packet *pkt,
Zhu Yib481de92007-09-25 17:54:57 -07001649 struct ieee80211_hdr *header, int group100)
1650{
1651 u32 to_us;
1652 u32 print_summary = 0;
1653 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
1654 u32 hundred = 0;
1655 u32 dataframe = 0;
1656 u16 fc;
1657 u16 seq_ctl;
1658 u16 channel;
1659 u16 phy_flags;
1660 int rate_sym;
1661 u16 length;
1662 u16 status;
1663 u16 bcn_tmr;
1664 u32 tsf_low;
1665 u64 tsf;
1666 u8 rssi;
1667 u8 agc;
1668 u16 sig_avg;
1669 u16 noise_diff;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001670 struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
1671 struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
1672 struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
Zhu Yib481de92007-09-25 17:54:57 -07001673 u8 *data = IWL_RX_DATA(pkt);
1674
1675 /* MAC header */
1676 fc = le16_to_cpu(header->frame_control);
1677 seq_ctl = le16_to_cpu(header->seq_ctrl);
1678
1679 /* metadata */
1680 channel = le16_to_cpu(rx_hdr->channel);
1681 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
1682 rate_sym = rx_hdr->rate;
1683 length = le16_to_cpu(rx_hdr->len);
1684
1685 /* end-of-frame status and timestamp */
1686 status = le32_to_cpu(rx_end->status);
1687 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
1688 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
1689 tsf = le64_to_cpu(rx_end->timestamp);
1690
1691 /* signal statistics */
1692 rssi = rx_stats->rssi;
1693 agc = rx_stats->agc;
1694 sig_avg = le16_to_cpu(rx_stats->sig_avg);
1695 noise_diff = le16_to_cpu(rx_stats->noise_diff);
1696
1697 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
1698
1699 /* if data frame is to us and all is good,
1700 * (optionally) print summary for only 1 out of every 100 */
1701 if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
1702 (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
1703 dataframe = 1;
1704 if (!group100)
1705 print_summary = 1; /* print each frame */
1706 else if (priv->framecnt_to_us < 100) {
1707 priv->framecnt_to_us++;
1708 print_summary = 0;
1709 } else {
1710 priv->framecnt_to_us = 0;
1711 print_summary = 1;
1712 hundred = 1;
1713 }
1714 } else {
1715 /* print summary for all other frames */
1716 print_summary = 1;
1717 }
1718
1719 if (print_summary) {
1720 char *title;
1721 u32 rate;
1722
1723 if (hundred)
1724 title = "100Frames";
1725 else if (fc & IEEE80211_FCTL_RETRY)
1726 title = "Retry";
1727 else if (ieee80211_is_assoc_response(fc))
1728 title = "AscRsp";
1729 else if (ieee80211_is_reassoc_response(fc))
1730 title = "RasRsp";
1731 else if (ieee80211_is_probe_response(fc)) {
1732 title = "PrbRsp";
1733 print_dump = 1; /* dump frame contents */
1734 } else if (ieee80211_is_beacon(fc)) {
1735 title = "Beacon";
1736 print_dump = 1; /* dump frame contents */
1737 } else if (ieee80211_is_atim(fc))
1738 title = "ATIM";
1739 else if (ieee80211_is_auth(fc))
1740 title = "Auth";
1741 else if (ieee80211_is_deauth(fc))
1742 title = "DeAuth";
1743 else if (ieee80211_is_disassoc(fc))
1744 title = "DisAssoc";
1745 else
1746 title = "Frame";
1747
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001748 rate = iwl3945_rate_index_from_plcp(rate_sym);
Zhu Yib481de92007-09-25 17:54:57 -07001749 if (rate == -1)
1750 rate = 0;
1751 else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001752 rate = iwl3945_rates[rate].ieee / 2;
Zhu Yib481de92007-09-25 17:54:57 -07001753
1754 /* print frame summary.
1755 * MAC addresses show just the last byte (for brevity),
1756 * but you can hack it to show more, if you'd like to. */
1757 if (dataframe)
1758 IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
1759 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
1760 title, fc, header->addr1[5],
1761 length, rssi, channel, rate);
1762 else {
1763 /* src/dst addresses assume managed mode */
1764 IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
1765 "src=0x%02x, rssi=%u, tim=%lu usec, "
1766 "phy=0x%02x, chnl=%d\n",
1767 title, fc, header->addr1[5],
1768 header->addr3[5], rssi,
1769 tsf_low - priv->scan_start_tsf,
1770 phy_flags, channel);
1771 }
1772 }
1773 if (print_dump)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001774 iwl3945_print_hex_dump(IWL_DL_RX, data, length);
Zhu Yib481de92007-09-25 17:54:57 -07001775}
1776#endif
1777
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001778static void iwl3945_unset_hw_setting(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001779{
1780 if (priv->hw_setting.shared_virt)
1781 pci_free_consistent(priv->pci_dev,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001782 sizeof(struct iwl3945_shared),
Zhu Yib481de92007-09-25 17:54:57 -07001783 priv->hw_setting.shared_virt,
1784 priv->hw_setting.shared_phys);
1785}
1786
1787/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001788 * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
Zhu Yib481de92007-09-25 17:54:57 -07001789 *
1790 * return : set the bit for each supported rate insert in ie
1791 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001792static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001793 u16 basic_rate, int *left)
Zhu Yib481de92007-09-25 17:54:57 -07001794{
1795 u16 ret_rates = 0, bit;
1796 int i;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001797 u8 *cnt = ie;
1798 u8 *rates = ie + 1;
Zhu Yib481de92007-09-25 17:54:57 -07001799
1800 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1801 if (bit & supported_rate) {
1802 ret_rates |= bit;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001803 rates[*cnt] = iwl3945_rates[i].ieee |
Tomas Winklerc7c46672007-10-18 02:04:15 +02001804 ((bit & basic_rate) ? 0x80 : 0x00);
1805 (*cnt)++;
1806 (*left)--;
1807 if ((*left <= 0) ||
1808 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
Zhu Yib481de92007-09-25 17:54:57 -07001809 break;
1810 }
1811 }
1812
1813 return ret_rates;
1814}
1815
1816/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001817 * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
Zhu Yib481de92007-09-25 17:54:57 -07001818 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001819static u16 iwl3945_fill_probe_req(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07001820 struct ieee80211_mgmt *frame,
1821 int left, int is_direct)
1822{
1823 int len = 0;
1824 u8 *pos = NULL;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001825 u16 active_rates, ret_rates, cck_rates;
Zhu Yib481de92007-09-25 17:54:57 -07001826
1827 /* Make sure there is enough space for the probe request,
1828 * two mandatory IEs and the data */
1829 left -= 24;
1830 if (left < 0)
1831 return 0;
1832 len += 24;
1833
1834 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001835 memcpy(frame->da, iwl3945_broadcast_addr, ETH_ALEN);
Zhu Yib481de92007-09-25 17:54:57 -07001836 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001837 memcpy(frame->bssid, iwl3945_broadcast_addr, ETH_ALEN);
Zhu Yib481de92007-09-25 17:54:57 -07001838 frame->seq_ctrl = 0;
1839
1840 /* fill in our indirect SSID IE */
1841 /* ...next IE... */
1842
1843 left -= 2;
1844 if (left < 0)
1845 return 0;
1846 len += 2;
1847 pos = &(frame->u.probe_req.variable[0]);
1848 *pos++ = WLAN_EID_SSID;
1849 *pos++ = 0;
1850
1851 /* fill in our direct SSID IE... */
1852 if (is_direct) {
1853 /* ...next IE... */
1854 left -= 2 + priv->essid_len;
1855 if (left < 0)
1856 return 0;
1857 /* ... fill it in... */
1858 *pos++ = WLAN_EID_SSID;
1859 *pos++ = priv->essid_len;
1860 memcpy(pos, priv->essid, priv->essid_len);
1861 pos += priv->essid_len;
1862 len += 2 + priv->essid_len;
1863 }
1864
1865 /* fill in supported rate */
1866 /* ...next IE... */
1867 left -= 2;
1868 if (left < 0)
1869 return 0;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001870
Zhu Yib481de92007-09-25 17:54:57 -07001871 /* ... fill it in... */
1872 *pos++ = WLAN_EID_SUPP_RATES;
1873 *pos = 0;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001874
1875 priv->active_rate = priv->rates_mask;
1876 active_rates = priv->active_rate;
Zhu Yib481de92007-09-25 17:54:57 -07001877 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1878
Tomas Winklerc7c46672007-10-18 02:04:15 +02001879 cck_rates = IWL_CCK_RATES_MASK & active_rates;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001880 ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001881 priv->active_rate_basic, &left);
1882 active_rates &= ~ret_rates;
1883
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001884 ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001885 priv->active_rate_basic, &left);
1886 active_rates &= ~ret_rates;
1887
Zhu Yib481de92007-09-25 17:54:57 -07001888 len += 2 + *pos;
1889 pos += (*pos) + 1;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001890 if (active_rates == 0)
Zhu Yib481de92007-09-25 17:54:57 -07001891 goto fill_end;
1892
1893 /* fill in supported extended rate */
1894 /* ...next IE... */
1895 left -= 2;
1896 if (left < 0)
1897 return 0;
1898 /* ... fill it in... */
1899 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1900 *pos = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001901 iwl3945_supported_rate_to_ie(pos, active_rates,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001902 priv->active_rate_basic, &left);
Zhu Yib481de92007-09-25 17:54:57 -07001903 if (*pos > 0)
1904 len += 2 + *pos;
1905
1906 fill_end:
1907 return (u16)len;
1908}
1909
1910/*
1911 * QoS support
1912*/
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08001913#ifdef CONFIG_IWL3945_QOS
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001914static int iwl3945_send_qos_params_command(struct iwl3945_priv *priv,
1915 struct iwl3945_qosparam_cmd *qos)
Zhu Yib481de92007-09-25 17:54:57 -07001916{
1917
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001918 return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM,
1919 sizeof(struct iwl3945_qosparam_cmd), qos);
Zhu Yib481de92007-09-25 17:54:57 -07001920}
1921
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001922static void iwl3945_reset_qos(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001923{
1924 u16 cw_min = 15;
1925 u16 cw_max = 1023;
1926 u8 aifs = 2;
1927 u8 is_legacy = 0;
1928 unsigned long flags;
1929 int i;
1930
1931 spin_lock_irqsave(&priv->lock, flags);
1932 priv->qos_data.qos_active = 0;
1933
1934 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
1935 if (priv->qos_data.qos_enable)
1936 priv->qos_data.qos_active = 1;
1937 if (!(priv->active_rate & 0xfff0)) {
1938 cw_min = 31;
1939 is_legacy = 1;
1940 }
1941 } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
1942 if (priv->qos_data.qos_enable)
1943 priv->qos_data.qos_active = 1;
1944 } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
1945 cw_min = 31;
1946 is_legacy = 1;
1947 }
1948
1949 if (priv->qos_data.qos_active)
1950 aifs = 3;
1951
1952 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
1953 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
1954 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
1955 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
1956 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
1957
1958 if (priv->qos_data.qos_active) {
1959 i = 1;
1960 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
1961 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
1962 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
1963 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1964 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1965
1966 i = 2;
1967 priv->qos_data.def_qos_parm.ac[i].cw_min =
1968 cpu_to_le16((cw_min + 1) / 2 - 1);
1969 priv->qos_data.def_qos_parm.ac[i].cw_max =
1970 cpu_to_le16(cw_max);
1971 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1972 if (is_legacy)
1973 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1974 cpu_to_le16(6016);
1975 else
1976 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1977 cpu_to_le16(3008);
1978 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1979
1980 i = 3;
1981 priv->qos_data.def_qos_parm.ac[i].cw_min =
1982 cpu_to_le16((cw_min + 1) / 4 - 1);
1983 priv->qos_data.def_qos_parm.ac[i].cw_max =
1984 cpu_to_le16((cw_max + 1) / 2 - 1);
1985 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1986 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1987 if (is_legacy)
1988 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1989 cpu_to_le16(3264);
1990 else
1991 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1992 cpu_to_le16(1504);
1993 } else {
1994 for (i = 1; i < 4; i++) {
1995 priv->qos_data.def_qos_parm.ac[i].cw_min =
1996 cpu_to_le16(cw_min);
1997 priv->qos_data.def_qos_parm.ac[i].cw_max =
1998 cpu_to_le16(cw_max);
1999 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
2000 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
2001 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2002 }
2003 }
2004 IWL_DEBUG_QOS("set QoS to default \n");
2005
2006 spin_unlock_irqrestore(&priv->lock, flags);
2007}
2008
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002009static void iwl3945_activate_qos(struct iwl3945_priv *priv, u8 force)
Zhu Yib481de92007-09-25 17:54:57 -07002010{
2011 unsigned long flags;
2012
Zhu Yib481de92007-09-25 17:54:57 -07002013 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2014 return;
2015
2016 if (!priv->qos_data.qos_enable)
2017 return;
2018
2019 spin_lock_irqsave(&priv->lock, flags);
2020 priv->qos_data.def_qos_parm.qos_flags = 0;
2021
2022 if (priv->qos_data.qos_cap.q_AP.queue_request &&
2023 !priv->qos_data.qos_cap.q_AP.txop_request)
2024 priv->qos_data.def_qos_parm.qos_flags |=
2025 QOS_PARAM_FLG_TXOP_TYPE_MSK;
2026
2027 if (priv->qos_data.qos_active)
2028 priv->qos_data.def_qos_parm.qos_flags |=
2029 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
2030
2031 spin_unlock_irqrestore(&priv->lock, flags);
2032
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002033 if (force || iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07002034 IWL_DEBUG_QOS("send QoS cmd with Qos active %d \n",
2035 priv->qos_data.qos_active);
2036
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002037 iwl3945_send_qos_params_command(priv,
Zhu Yib481de92007-09-25 17:54:57 -07002038 &(priv->qos_data.def_qos_parm));
2039 }
2040}
2041
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08002042#endif /* CONFIG_IWL3945_QOS */
Zhu Yib481de92007-09-25 17:54:57 -07002043/*
2044 * Power management (not Tx power!) functions
2045 */
2046#define MSEC_TO_USEC 1024
2047
2048#define NOSLP __constant_cpu_to_le32(0)
2049#define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK
2050#define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
2051#define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
2052 __constant_cpu_to_le32(X1), \
2053 __constant_cpu_to_le32(X2), \
2054 __constant_cpu_to_le32(X3), \
2055 __constant_cpu_to_le32(X4)}
2056
2057
2058/* default power management (not Tx power) table values */
2059/* for tim 0-10 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002060static struct iwl3945_power_vec_entry range_0[IWL_POWER_AC] = {
Zhu Yib481de92007-09-25 17:54:57 -07002061 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2062 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
2063 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
2064 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
2065 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
2066 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
2067};
2068
2069/* for tim > 10 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002070static struct iwl3945_power_vec_entry range_1[IWL_POWER_AC] = {
Zhu Yib481de92007-09-25 17:54:57 -07002071 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2072 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
2073 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
2074 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
2075 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
2076 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
2077 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
2078 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
2079 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
2080 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
2081};
2082
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002083int iwl3945_power_init_handle(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002084{
2085 int rc = 0, i;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002086 struct iwl3945_power_mgr *pow_data;
2087 int size = sizeof(struct iwl3945_power_vec_entry) * IWL_POWER_AC;
Zhu Yib481de92007-09-25 17:54:57 -07002088 u16 pci_pm;
2089
2090 IWL_DEBUG_POWER("Initialize power \n");
2091
2092 pow_data = &(priv->power_data);
2093
2094 memset(pow_data, 0, sizeof(*pow_data));
2095
2096 pow_data->active_index = IWL_POWER_RANGE_0;
2097 pow_data->dtim_val = 0xffff;
2098
2099 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
2100 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
2101
2102 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
2103 if (rc != 0)
2104 return 0;
2105 else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002106 struct iwl3945_powertable_cmd *cmd;
Zhu Yib481de92007-09-25 17:54:57 -07002107
2108 IWL_DEBUG_POWER("adjust power command flags\n");
2109
2110 for (i = 0; i < IWL_POWER_AC; i++) {
2111 cmd = &pow_data->pwr_range_0[i].cmd;
2112
2113 if (pci_pm & 0x1)
2114 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
2115 else
2116 cmd->flags |= IWL_POWER_PCI_PM_MSK;
2117 }
2118 }
2119 return rc;
2120}
2121
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002122static int iwl3945_update_power_cmd(struct iwl3945_priv *priv,
2123 struct iwl3945_powertable_cmd *cmd, u32 mode)
Zhu Yib481de92007-09-25 17:54:57 -07002124{
2125 int rc = 0, i;
2126 u8 skip;
2127 u32 max_sleep = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002128 struct iwl3945_power_vec_entry *range;
Zhu Yib481de92007-09-25 17:54:57 -07002129 u8 period = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002130 struct iwl3945_power_mgr *pow_data;
Zhu Yib481de92007-09-25 17:54:57 -07002131
2132 if (mode > IWL_POWER_INDEX_5) {
2133 IWL_DEBUG_POWER("Error invalid power mode \n");
2134 return -1;
2135 }
2136 pow_data = &(priv->power_data);
2137
2138 if (pow_data->active_index == IWL_POWER_RANGE_0)
2139 range = &pow_data->pwr_range_0[0];
2140 else
2141 range = &pow_data->pwr_range_1[1];
2142
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002143 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
Zhu Yib481de92007-09-25 17:54:57 -07002144
2145#ifdef IWL_MAC80211_DISABLE
2146 if (priv->assoc_network != NULL) {
2147 unsigned long flags;
2148
2149 period = priv->assoc_network->tim.tim_period;
2150 }
2151#endif /*IWL_MAC80211_DISABLE */
2152 skip = range[mode].no_dtim;
2153
2154 if (period == 0) {
2155 period = 1;
2156 skip = 0;
2157 }
2158
2159 if (skip == 0) {
2160 max_sleep = period;
2161 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
2162 } else {
2163 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
2164 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
2165 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
2166 }
2167
2168 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
2169 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
2170 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
2171 }
2172
2173 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
2174 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
2175 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
2176 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
2177 le32_to_cpu(cmd->sleep_interval[0]),
2178 le32_to_cpu(cmd->sleep_interval[1]),
2179 le32_to_cpu(cmd->sleep_interval[2]),
2180 le32_to_cpu(cmd->sleep_interval[3]),
2181 le32_to_cpu(cmd->sleep_interval[4]));
2182
2183 return rc;
2184}
2185
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002186static int iwl3945_send_power_mode(struct iwl3945_priv *priv, u32 mode)
Zhu Yib481de92007-09-25 17:54:57 -07002187{
John W. Linville9a62f732007-11-15 16:27:36 -05002188 u32 uninitialized_var(final_mode);
Zhu Yib481de92007-09-25 17:54:57 -07002189 int rc;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002190 struct iwl3945_powertable_cmd cmd;
Zhu Yib481de92007-09-25 17:54:57 -07002191
2192 /* If on battery, set to 3,
Ian Schram01ebd062007-10-25 17:15:22 +08002193 * if plugged into AC power, set to CAM ("continuously aware mode"),
Zhu Yib481de92007-09-25 17:54:57 -07002194 * else user level */
2195 switch (mode) {
2196 case IWL_POWER_BATTERY:
2197 final_mode = IWL_POWER_INDEX_3;
2198 break;
2199 case IWL_POWER_AC:
2200 final_mode = IWL_POWER_MODE_CAM;
2201 break;
2202 default:
2203 final_mode = mode;
2204 break;
2205 }
2206
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002207 iwl3945_update_power_cmd(priv, &cmd, final_mode);
Zhu Yib481de92007-09-25 17:54:57 -07002208
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002209 rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07002210
2211 if (final_mode == IWL_POWER_MODE_CAM)
2212 clear_bit(STATUS_POWER_PMI, &priv->status);
2213 else
2214 set_bit(STATUS_POWER_PMI, &priv->status);
2215
2216 return rc;
2217}
2218
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002219int iwl3945_is_network_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *header)
Zhu Yib481de92007-09-25 17:54:57 -07002220{
2221 /* Filter incoming packets to determine if they are targeted toward
2222 * this network, discarding packets coming from ourselves */
2223 switch (priv->iw_mode) {
2224 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
2225 /* packets from our adapter are dropped (echo) */
2226 if (!compare_ether_addr(header->addr2, priv->mac_addr))
2227 return 0;
2228 /* {broad,multi}cast packets to our IBSS go through */
2229 if (is_multicast_ether_addr(header->addr1))
2230 return !compare_ether_addr(header->addr3, priv->bssid);
2231 /* packets to our adapter go through */
2232 return !compare_ether_addr(header->addr1, priv->mac_addr);
2233 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
2234 /* packets from our adapter are dropped (echo) */
2235 if (!compare_ether_addr(header->addr3, priv->mac_addr))
2236 return 0;
2237 /* {broad,multi}cast packets to our BSS go through */
2238 if (is_multicast_ether_addr(header->addr1))
2239 return !compare_ether_addr(header->addr2, priv->bssid);
2240 /* packets to our adapter go through */
2241 return !compare_ether_addr(header->addr1, priv->mac_addr);
2242 }
2243
2244 return 1;
2245}
2246
2247#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2248
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002249static const char *iwl3945_get_tx_fail_reason(u32 status)
Zhu Yib481de92007-09-25 17:54:57 -07002250{
2251 switch (status & TX_STATUS_MSK) {
2252 case TX_STATUS_SUCCESS:
2253 return "SUCCESS";
2254 TX_STATUS_ENTRY(SHORT_LIMIT);
2255 TX_STATUS_ENTRY(LONG_LIMIT);
2256 TX_STATUS_ENTRY(FIFO_UNDERRUN);
2257 TX_STATUS_ENTRY(MGMNT_ABORT);
2258 TX_STATUS_ENTRY(NEXT_FRAG);
2259 TX_STATUS_ENTRY(LIFE_EXPIRE);
2260 TX_STATUS_ENTRY(DEST_PS);
2261 TX_STATUS_ENTRY(ABORTED);
2262 TX_STATUS_ENTRY(BT_RETRY);
2263 TX_STATUS_ENTRY(STA_INVALID);
2264 TX_STATUS_ENTRY(FRAG_DROPPED);
2265 TX_STATUS_ENTRY(TID_DISABLE);
2266 TX_STATUS_ENTRY(FRAME_FLUSHED);
2267 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
2268 TX_STATUS_ENTRY(TX_LOCKED);
2269 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
2270 }
2271
2272 return "UNKNOWN";
2273}
2274
2275/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002276 * iwl3945_scan_cancel - Cancel any currently executing HW scan
Zhu Yib481de92007-09-25 17:54:57 -07002277 *
2278 * NOTE: priv->mutex is not required before calling this function
2279 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002280static int iwl3945_scan_cancel(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002281{
2282 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
2283 clear_bit(STATUS_SCANNING, &priv->status);
2284 return 0;
2285 }
2286
2287 if (test_bit(STATUS_SCANNING, &priv->status)) {
2288 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2289 IWL_DEBUG_SCAN("Queuing scan abort.\n");
2290 set_bit(STATUS_SCAN_ABORTING, &priv->status);
2291 queue_work(priv->workqueue, &priv->abort_scan);
2292
2293 } else
2294 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
2295
2296 return test_bit(STATUS_SCANNING, &priv->status);
2297 }
2298
2299 return 0;
2300}
2301
2302/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002303 * iwl3945_scan_cancel_timeout - Cancel any currently executing HW scan
Zhu Yib481de92007-09-25 17:54:57 -07002304 * @ms: amount of time to wait (in milliseconds) for scan to abort
2305 *
2306 * NOTE: priv->mutex must be held before calling this function
2307 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002308static int iwl3945_scan_cancel_timeout(struct iwl3945_priv *priv, unsigned long ms)
Zhu Yib481de92007-09-25 17:54:57 -07002309{
2310 unsigned long now = jiffies;
2311 int ret;
2312
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002313 ret = iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002314 if (ret && ms) {
2315 mutex_unlock(&priv->mutex);
2316 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
2317 test_bit(STATUS_SCANNING, &priv->status))
2318 msleep(1);
2319 mutex_lock(&priv->mutex);
2320
2321 return test_bit(STATUS_SCANNING, &priv->status);
2322 }
2323
2324 return ret;
2325}
2326
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002327static void iwl3945_sequence_reset(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002328{
2329 /* Reset ieee stats */
2330
2331 /* We don't reset the net_device_stats (ieee->stats) on
2332 * re-association */
2333
2334 priv->last_seq_num = -1;
2335 priv->last_frag_num = -1;
2336 priv->last_packet_time = 0;
2337
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002338 iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002339}
2340
2341#define MAX_UCODE_BEACON_INTERVAL 1024
2342#define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
2343
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002344static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
Zhu Yib481de92007-09-25 17:54:57 -07002345{
2346 u16 new_val = 0;
2347 u16 beacon_factor = 0;
2348
2349 beacon_factor =
2350 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
2351 / MAX_UCODE_BEACON_INTERVAL;
2352 new_val = beacon_val / beacon_factor;
2353
2354 return cpu_to_le16(new_val);
2355}
2356
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002357static void iwl3945_setup_rxon_timing(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002358{
2359 u64 interval_tm_unit;
2360 u64 tsf, result;
2361 unsigned long flags;
2362 struct ieee80211_conf *conf = NULL;
2363 u16 beacon_int = 0;
2364
2365 conf = ieee80211_get_hw_conf(priv->hw);
2366
2367 spin_lock_irqsave(&priv->lock, flags);
2368 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
2369 priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
2370
2371 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
2372
2373 tsf = priv->timestamp1;
2374 tsf = ((tsf << 32) | priv->timestamp0);
2375
2376 beacon_int = priv->beacon_int;
2377 spin_unlock_irqrestore(&priv->lock, flags);
2378
2379 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
2380 if (beacon_int == 0) {
2381 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
2382 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
2383 } else {
2384 priv->rxon_timing.beacon_interval =
2385 cpu_to_le16(beacon_int);
2386 priv->rxon_timing.beacon_interval =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002387 iwl3945_adjust_beacon_interval(
Zhu Yib481de92007-09-25 17:54:57 -07002388 le16_to_cpu(priv->rxon_timing.beacon_interval));
2389 }
2390
2391 priv->rxon_timing.atim_window = 0;
2392 } else {
2393 priv->rxon_timing.beacon_interval =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002394 iwl3945_adjust_beacon_interval(conf->beacon_int);
Zhu Yib481de92007-09-25 17:54:57 -07002395 /* TODO: we need to get atim_window from upper stack
2396 * for now we set to 0 */
2397 priv->rxon_timing.atim_window = 0;
2398 }
2399
2400 interval_tm_unit =
2401 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2402 result = do_div(tsf, interval_tm_unit);
2403 priv->rxon_timing.beacon_init_val =
2404 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2405
2406 IWL_DEBUG_ASSOC
2407 ("beacon interval %d beacon timer %d beacon tim %d\n",
2408 le16_to_cpu(priv->rxon_timing.beacon_interval),
2409 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2410 le16_to_cpu(priv->rxon_timing.atim_window));
2411}
2412
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002413static int iwl3945_scan_initiate(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002414{
2415 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2416 IWL_ERROR("APs don't scan.\n");
2417 return 0;
2418 }
2419
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002420 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07002421 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2422 return -EIO;
2423 }
2424
2425 if (test_bit(STATUS_SCANNING, &priv->status)) {
2426 IWL_DEBUG_SCAN("Scan already in progress.\n");
2427 return -EAGAIN;
2428 }
2429
2430 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2431 IWL_DEBUG_SCAN("Scan request while abort pending. "
2432 "Queuing.\n");
2433 return -EAGAIN;
2434 }
2435
2436 IWL_DEBUG_INFO("Starting scan...\n");
2437 priv->scan_bands = 2;
2438 set_bit(STATUS_SCANNING, &priv->status);
2439 priv->scan_start = jiffies;
2440 priv->scan_pass_start = priv->scan_start;
2441
2442 queue_work(priv->workqueue, &priv->request_scan);
2443
2444 return 0;
2445}
2446
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002447static int iwl3945_set_rxon_hwcrypto(struct iwl3945_priv *priv, int hw_decrypt)
Zhu Yib481de92007-09-25 17:54:57 -07002448{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002449 struct iwl3945_rxon_cmd *rxon = &priv->staging_rxon;
Zhu Yib481de92007-09-25 17:54:57 -07002450
2451 if (hw_decrypt)
2452 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2453 else
2454 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2455
2456 return 0;
2457}
2458
Johannes Berg8318d782008-01-24 19:38:38 +01002459static void iwl3945_set_flags_for_phymode(struct iwl3945_priv *priv,
2460 enum ieee80211_band band)
Zhu Yib481de92007-09-25 17:54:57 -07002461{
Johannes Berg8318d782008-01-24 19:38:38 +01002462 if (band == IEEE80211_BAND_5GHZ) {
Zhu Yib481de92007-09-25 17:54:57 -07002463 priv->staging_rxon.flags &=
2464 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2465 | RXON_FLG_CCK_MSK);
2466 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2467 } else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002468 /* Copied from iwl3945_bg_post_associate() */
Zhu Yib481de92007-09-25 17:54:57 -07002469 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2470 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2471 else
2472 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2473
2474 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2475 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2476
2477 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2478 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2479 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
2480 }
2481}
2482
2483/*
Ian Schram01ebd062007-10-25 17:15:22 +08002484 * initialize rxon structure with default values from eeprom
Zhu Yib481de92007-09-25 17:54:57 -07002485 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002486static void iwl3945_connection_init_rx_config(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002487{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002488 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07002489
2490 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
2491
2492 switch (priv->iw_mode) {
2493 case IEEE80211_IF_TYPE_AP:
2494 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
2495 break;
2496
2497 case IEEE80211_IF_TYPE_STA:
2498 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2499 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2500 break;
2501
2502 case IEEE80211_IF_TYPE_IBSS:
2503 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2504 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2505 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2506 RXON_FILTER_ACCEPT_GRP_MSK;
2507 break;
2508
2509 case IEEE80211_IF_TYPE_MNTR:
2510 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2511 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2512 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2513 break;
2514 }
2515
2516#if 0
2517 /* TODO: Figure out when short_preamble would be set and cache from
2518 * that */
2519 if (!hw_to_local(priv->hw)->short_preamble)
2520 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2521 else
2522 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2523#endif
2524
Johannes Berg8318d782008-01-24 19:38:38 +01002525 ch_info = iwl3945_get_channel_info(priv, priv->band,
Zhu Yib481de92007-09-25 17:54:57 -07002526 le16_to_cpu(priv->staging_rxon.channel));
2527
2528 if (!ch_info)
2529 ch_info = &priv->channel_info[0];
2530
2531 /*
2532 * in some case A channels are all non IBSS
2533 * in this case force B/G channel
2534 */
2535 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
2536 !(is_channel_ibss(ch_info)))
2537 ch_info = &priv->channel_info[0];
2538
2539 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
2540 if (is_channel_a_band(ch_info))
Johannes Berg8318d782008-01-24 19:38:38 +01002541 priv->band = IEEE80211_BAND_5GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07002542 else
Johannes Berg8318d782008-01-24 19:38:38 +01002543 priv->band = IEEE80211_BAND_2GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07002544
Johannes Berg8318d782008-01-24 19:38:38 +01002545 iwl3945_set_flags_for_phymode(priv, priv->band);
Zhu Yib481de92007-09-25 17:54:57 -07002546
2547 priv->staging_rxon.ofdm_basic_rates =
2548 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2549 priv->staging_rxon.cck_basic_rates =
2550 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2551}
2552
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002553static int iwl3945_set_mode(struct iwl3945_priv *priv, int mode)
Zhu Yib481de92007-09-25 17:54:57 -07002554{
Zhu Yib481de92007-09-25 17:54:57 -07002555 if (mode == IEEE80211_IF_TYPE_IBSS) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002556 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07002557
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002558 ch_info = iwl3945_get_channel_info(priv,
Johannes Berg8318d782008-01-24 19:38:38 +01002559 priv->band,
Zhu Yib481de92007-09-25 17:54:57 -07002560 le16_to_cpu(priv->staging_rxon.channel));
2561
2562 if (!ch_info || !is_channel_ibss(ch_info)) {
2563 IWL_ERROR("channel %d not IBSS channel\n",
2564 le16_to_cpu(priv->staging_rxon.channel));
2565 return -EINVAL;
2566 }
2567 }
2568
Zhu Yib481de92007-09-25 17:54:57 -07002569 priv->iw_mode = mode;
2570
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002571 iwl3945_connection_init_rx_config(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002572 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2573
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002574 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002575
Mohamed Abbasfde35712007-11-29 11:10:15 +08002576 /* dont commit rxon if rf-kill is on*/
2577 if (!iwl3945_is_ready_rf(priv))
2578 return -EAGAIN;
2579
2580 cancel_delayed_work(&priv->scan_check);
2581 if (iwl3945_scan_cancel_timeout(priv, 100)) {
2582 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2583 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2584 return -EAGAIN;
2585 }
2586
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002587 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002588
2589 return 0;
2590}
2591
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002592static void iwl3945_build_tx_cmd_hwcrypto(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07002593 struct ieee80211_tx_control *ctl,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002594 struct iwl3945_cmd *cmd,
Zhu Yib481de92007-09-25 17:54:57 -07002595 struct sk_buff *skb_frag,
2596 int last_frag)
2597{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002598 struct iwl3945_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
Zhu Yib481de92007-09-25 17:54:57 -07002599
2600 switch (keyinfo->alg) {
2601 case ALG_CCMP:
2602 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2603 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2604 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
2605 break;
2606
2607 case ALG_TKIP:
2608#if 0
2609 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2610
2611 if (last_frag)
2612 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2613 8);
2614 else
2615 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2616#endif
2617 break;
2618
2619 case ALG_WEP:
2620 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2621 (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2622
2623 if (keyinfo->keylen == 13)
2624 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2625
2626 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2627
2628 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2629 "with key %d\n", ctl->key_idx);
2630 break;
2631
Zhu Yib481de92007-09-25 17:54:57 -07002632 default:
2633 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2634 break;
2635 }
2636}
2637
2638/*
2639 * handle build REPLY_TX command notification.
2640 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002641static void iwl3945_build_tx_cmd_basic(struct iwl3945_priv *priv,
2642 struct iwl3945_cmd *cmd,
Zhu Yib481de92007-09-25 17:54:57 -07002643 struct ieee80211_tx_control *ctrl,
2644 struct ieee80211_hdr *hdr,
2645 int is_unicast, u8 std_id)
2646{
2647 __le16 *qc;
2648 u16 fc = le16_to_cpu(hdr->frame_control);
2649 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2650
2651 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2652 if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
2653 tx_flags |= TX_CMD_FLG_ACK_MSK;
2654 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
2655 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2656 if (ieee80211_is_probe_response(fc) &&
2657 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2658 tx_flags |= TX_CMD_FLG_TSF_MSK;
2659 } else {
2660 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2661 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2662 }
2663
2664 cmd->cmd.tx.sta_id = std_id;
2665 if (ieee80211_get_morefrag(hdr))
2666 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2667
2668 qc = ieee80211_get_qos_ctrl(hdr);
2669 if (qc) {
2670 cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
2671 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2672 } else
2673 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2674
2675 if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
2676 tx_flags |= TX_CMD_FLG_RTS_MSK;
2677 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2678 } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
2679 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2680 tx_flags |= TX_CMD_FLG_CTS_MSK;
2681 }
2682
2683 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2684 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2685
2686 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2687 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
2688 if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
2689 (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
Ian Schrambc434dd2007-10-25 17:15:29 +08002690 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
Zhu Yib481de92007-09-25 17:54:57 -07002691 else
Ian Schrambc434dd2007-10-25 17:15:29 +08002692 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
Zhu Yib481de92007-09-25 17:54:57 -07002693 } else
2694 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2695
2696 cmd->cmd.tx.driver_txop = 0;
2697 cmd->cmd.tx.tx_flags = tx_flags;
2698 cmd->cmd.tx.next_frame_len = 0;
2699}
2700
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002701/**
2702 * iwl3945_get_sta_id - Find station's index within station table
2703 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002704static int iwl3945_get_sta_id(struct iwl3945_priv *priv, struct ieee80211_hdr *hdr)
Zhu Yib481de92007-09-25 17:54:57 -07002705{
2706 int sta_id;
2707 u16 fc = le16_to_cpu(hdr->frame_control);
2708
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002709 /* If this frame is broadcast or management, use broadcast station id */
Zhu Yib481de92007-09-25 17:54:57 -07002710 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2711 is_multicast_ether_addr(hdr->addr1))
2712 return priv->hw_setting.bcast_sta_id;
2713
2714 switch (priv->iw_mode) {
2715
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002716 /* If we are a client station in a BSS network, use the special
2717 * AP station entry (that's the only station we communicate with) */
Zhu Yib481de92007-09-25 17:54:57 -07002718 case IEEE80211_IF_TYPE_STA:
2719 return IWL_AP_ID;
2720
2721 /* If we are an AP, then find the station, or use BCAST */
2722 case IEEE80211_IF_TYPE_AP:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002723 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
Zhu Yib481de92007-09-25 17:54:57 -07002724 if (sta_id != IWL_INVALID_STATION)
2725 return sta_id;
2726 return priv->hw_setting.bcast_sta_id;
2727
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002728 /* If this frame is going out to an IBSS network, find the station,
2729 * or create a new station table entry */
Joe Perches0795af52007-10-03 17:59:30 -07002730 case IEEE80211_IF_TYPE_IBSS: {
2731 DECLARE_MAC_BUF(mac);
2732
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002733 /* Create new station table entry */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002734 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
Zhu Yib481de92007-09-25 17:54:57 -07002735 if (sta_id != IWL_INVALID_STATION)
2736 return sta_id;
2737
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002738 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
Zhu Yib481de92007-09-25 17:54:57 -07002739
2740 if (sta_id != IWL_INVALID_STATION)
2741 return sta_id;
2742
Joe Perches0795af52007-10-03 17:59:30 -07002743 IWL_DEBUG_DROP("Station %s not in station map. "
Zhu Yib481de92007-09-25 17:54:57 -07002744 "Defaulting to broadcast...\n",
Joe Perches0795af52007-10-03 17:59:30 -07002745 print_mac(mac, hdr->addr1));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002746 iwl3945_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
Zhu Yib481de92007-09-25 17:54:57 -07002747 return priv->hw_setting.bcast_sta_id;
Joe Perches0795af52007-10-03 17:59:30 -07002748 }
Zhu Yib481de92007-09-25 17:54:57 -07002749 default:
Ian Schram01ebd062007-10-25 17:15:22 +08002750 IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
Zhu Yib481de92007-09-25 17:54:57 -07002751 return priv->hw_setting.bcast_sta_id;
2752 }
2753}
2754
2755/*
2756 * start REPLY_TX command process
2757 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002758static int iwl3945_tx_skb(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07002759 struct sk_buff *skb, struct ieee80211_tx_control *ctl)
2760{
2761 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002762 struct iwl3945_tfd_frame *tfd;
Zhu Yib481de92007-09-25 17:54:57 -07002763 u32 *control_flags;
2764 int txq_id = ctl->queue;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002765 struct iwl3945_tx_queue *txq = NULL;
2766 struct iwl3945_queue *q = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002767 dma_addr_t phys_addr;
2768 dma_addr_t txcmd_phys;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002769 struct iwl3945_cmd *out_cmd = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002770 u16 len, idx, len_org;
2771 u8 id, hdr_len, unicast;
2772 u8 sta_id;
2773 u16 seq_number = 0;
2774 u16 fc;
2775 __le16 *qc;
2776 u8 wait_write_ptr = 0;
2777 unsigned long flags;
2778 int rc;
2779
2780 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002781 if (iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07002782 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2783 goto drop_unlock;
2784 }
2785
Johannes Berg32bfd352007-12-19 01:31:26 +01002786 if (!priv->vif) {
2787 IWL_DEBUG_DROP("Dropping - !priv->vif\n");
Zhu Yib481de92007-09-25 17:54:57 -07002788 goto drop_unlock;
2789 }
2790
Johannes Berg8318d782008-01-24 19:38:38 +01002791 if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
Zhu Yib481de92007-09-25 17:54:57 -07002792 IWL_ERROR("ERROR: No TX rate available.\n");
2793 goto drop_unlock;
2794 }
2795
2796 unicast = !is_multicast_ether_addr(hdr->addr1);
2797 id = 0;
2798
2799 fc = le16_to_cpu(hdr->frame_control);
2800
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08002801#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07002802 if (ieee80211_is_auth(fc))
2803 IWL_DEBUG_TX("Sending AUTH frame\n");
2804 else if (ieee80211_is_assoc_request(fc))
2805 IWL_DEBUG_TX("Sending ASSOC frame\n");
2806 else if (ieee80211_is_reassoc_request(fc))
2807 IWL_DEBUG_TX("Sending REASSOC frame\n");
2808#endif
2809
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08002810 /* drop all data frame if we are not associated */
Reinette Chatrea6477242008-02-14 10:40:28 -08002811 if ((!iwl3945_is_associated(priv) ||
2812 ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id)) &&
Zhu Yib481de92007-09-25 17:54:57 -07002813 ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002814 IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
Zhu Yib481de92007-09-25 17:54:57 -07002815 goto drop_unlock;
2816 }
2817
2818 spin_unlock_irqrestore(&priv->lock, flags);
2819
2820 hdr_len = ieee80211_get_hdrlen(fc);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002821
2822 /* Find (or create) index into station table for destination station */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002823 sta_id = iwl3945_get_sta_id(priv, hdr);
Zhu Yib481de92007-09-25 17:54:57 -07002824 if (sta_id == IWL_INVALID_STATION) {
Joe Perches0795af52007-10-03 17:59:30 -07002825 DECLARE_MAC_BUF(mac);
2826
2827 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2828 print_mac(mac, hdr->addr1));
Zhu Yib481de92007-09-25 17:54:57 -07002829 goto drop;
2830 }
2831
2832 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2833
2834 qc = ieee80211_get_qos_ctrl(hdr);
2835 if (qc) {
2836 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2837 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2838 IEEE80211_SCTL_SEQ;
2839 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2840 (hdr->seq_ctrl &
2841 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2842 seq_number += 0x10;
2843 }
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002844
2845 /* Descriptor for chosen Tx queue */
Zhu Yib481de92007-09-25 17:54:57 -07002846 txq = &priv->txq[txq_id];
2847 q = &txq->q;
2848
2849 spin_lock_irqsave(&priv->lock, flags);
2850
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002851 /* Set up first empty TFD within this queue's circular TFD buffer */
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002852 tfd = &txq->bd[q->write_ptr];
Zhu Yib481de92007-09-25 17:54:57 -07002853 memset(tfd, 0, sizeof(*tfd));
2854 control_flags = (u32 *) tfd;
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002855 idx = get_cmd_index(q, q->write_ptr, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002856
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002857 /* Set up driver data for this TFD */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002858 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl3945_tx_info));
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002859 txq->txb[q->write_ptr].skb[0] = skb;
2860 memcpy(&(txq->txb[q->write_ptr].status.control),
Zhu Yib481de92007-09-25 17:54:57 -07002861 ctl, sizeof(struct ieee80211_tx_control));
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002862
2863 /* Init first empty entry in queue's array of Tx/cmd buffers */
Zhu Yib481de92007-09-25 17:54:57 -07002864 out_cmd = &txq->cmd[idx];
2865 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2866 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002867
2868 /*
2869 * Set up the Tx-command (not MAC!) header.
2870 * Store the chosen Tx queue and TFD index within the sequence field;
2871 * after Tx, uCode's Tx response will return this value so driver can
2872 * locate the frame within the tx queue and do post-tx processing.
2873 */
Zhu Yib481de92007-09-25 17:54:57 -07002874 out_cmd->hdr.cmd = REPLY_TX;
2875 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002876 INDEX_TO_SEQ(q->write_ptr)));
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002877
2878 /* Copy MAC header from skb into command buffer */
Zhu Yib481de92007-09-25 17:54:57 -07002879 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2880
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002881 /*
2882 * Use the first empty entry in this queue's command buffer array
2883 * to contain the Tx command and MAC header concatenated together
2884 * (payload data will be in another buffer).
2885 * Size of this varies, due to varying MAC header length.
2886 * If end is not dword aligned, we'll have 2 extra bytes at the end
2887 * of the MAC header (device reads on dword boundaries).
2888 * We'll tell device about this padding later.
2889 */
Zhu Yib481de92007-09-25 17:54:57 -07002890 len = priv->hw_setting.tx_cmd_len +
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002891 sizeof(struct iwl3945_cmd_header) + hdr_len;
Zhu Yib481de92007-09-25 17:54:57 -07002892
2893 len_org = len;
2894 len = (len + 3) & ~3;
2895
2896 if (len_org != len)
2897 len_org = 1;
2898 else
2899 len_org = 0;
2900
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002901 /* Physical address of this Tx command's header (not MAC header!),
2902 * within command buffer array. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002903 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl3945_cmd) * idx +
2904 offsetof(struct iwl3945_cmd, hdr);
Zhu Yib481de92007-09-25 17:54:57 -07002905
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002906 /* Add buffer containing Tx command and MAC(!) header to TFD's
2907 * first entry */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002908 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
Zhu Yib481de92007-09-25 17:54:57 -07002909
2910 if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002911 iwl3945_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002912
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002913 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2914 * if any (802.11 null frames have no payload). */
Zhu Yib481de92007-09-25 17:54:57 -07002915 len = skb->len - hdr_len;
2916 if (len) {
2917 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2918 len, PCI_DMA_TODEVICE);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002919 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
Zhu Yib481de92007-09-25 17:54:57 -07002920 }
2921
Zhu Yib481de92007-09-25 17:54:57 -07002922 if (!len)
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002923 /* If there is no payload, then we use only one Tx buffer */
Zhu Yib481de92007-09-25 17:54:57 -07002924 *control_flags = TFD_CTL_COUNT_SET(1);
2925 else
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002926 /* Else use 2 buffers.
2927 * Tell 3945 about any padding after MAC header */
Zhu Yib481de92007-09-25 17:54:57 -07002928 *control_flags = TFD_CTL_COUNT_SET(2) |
2929 TFD_CTL_PAD_SET(U32_PAD(len));
2930
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002931 /* Total # bytes to be transmitted */
Zhu Yib481de92007-09-25 17:54:57 -07002932 len = (u16)skb->len;
2933 out_cmd->cmd.tx.len = cpu_to_le16(len);
2934
2935 /* TODO need this for burst mode later on */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002936 iwl3945_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
Zhu Yib481de92007-09-25 17:54:57 -07002937
2938 /* set is_hcca to 0; it probably will never be implemented */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002939 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002940
2941 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
2942 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
2943
2944 if (!ieee80211_get_morefrag(hdr)) {
2945 txq->need_update = 1;
2946 if (qc) {
2947 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2948 priv->stations[sta_id].tid[tid].seq_number = seq_number;
2949 }
2950 } else {
2951 wait_write_ptr = 1;
2952 txq->need_update = 0;
2953 }
2954
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002955 iwl3945_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
Zhu Yib481de92007-09-25 17:54:57 -07002956 sizeof(out_cmd->cmd.tx));
2957
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002958 iwl3945_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
Zhu Yib481de92007-09-25 17:54:57 -07002959 ieee80211_get_hdrlen(fc));
2960
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002961 /* Tell device the write index *just past* this latest filled TFD */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002962 q->write_ptr = iwl3945_queue_inc_wrap(q->write_ptr, q->n_bd);
2963 rc = iwl3945_tx_queue_update_write_ptr(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -07002964 spin_unlock_irqrestore(&priv->lock, flags);
2965
2966 if (rc)
2967 return rc;
2968
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002969 if ((iwl3945_queue_space(q) < q->high_mark)
Zhu Yib481de92007-09-25 17:54:57 -07002970 && priv->mac80211_registered) {
2971 if (wait_write_ptr) {
2972 spin_lock_irqsave(&priv->lock, flags);
2973 txq->need_update = 1;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002974 iwl3945_tx_queue_update_write_ptr(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -07002975 spin_unlock_irqrestore(&priv->lock, flags);
2976 }
2977
2978 ieee80211_stop_queue(priv->hw, ctl->queue);
2979 }
2980
2981 return 0;
2982
2983drop_unlock:
2984 spin_unlock_irqrestore(&priv->lock, flags);
2985drop:
2986 return -1;
2987}
2988
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002989static void iwl3945_set_rate(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002990{
Johannes Berg8318d782008-01-24 19:38:38 +01002991 const struct ieee80211_supported_band *sband = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002992 struct ieee80211_rate *rate;
2993 int i;
2994
Johannes Berg8318d782008-01-24 19:38:38 +01002995 sband = iwl3945_get_band(priv, priv->band);
2996 if (!sband) {
Saleem Abdulrasoolc4ba9622007-11-18 23:59:08 -08002997 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
2998 return;
2999 }
Zhu Yib481de92007-09-25 17:54:57 -07003000
3001 priv->active_rate = 0;
3002 priv->active_rate_basic = 0;
3003
Johannes Berg8318d782008-01-24 19:38:38 +01003004 IWL_DEBUG_RATE("Setting rates for %s GHz\n",
3005 sband->band == IEEE80211_BAND_2GHZ ? "2.4" : "5");
Zhu Yib481de92007-09-25 17:54:57 -07003006
Johannes Berg8318d782008-01-24 19:38:38 +01003007 for (i = 0; i < sband->n_bitrates; i++) {
3008 rate = &sband->bitrates[i];
3009 if ((rate->hw_value < IWL_RATE_COUNT) &&
3010 !(rate->flags & IEEE80211_CHAN_DISABLED)) {
3011 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)\n",
3012 rate->hw_value, iwl3945_rates[rate->hw_value].plcp);
3013 priv->active_rate |= (1 << rate->hw_value);
3014 }
Zhu Yib481de92007-09-25 17:54:57 -07003015 }
3016
3017 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
3018 priv->active_rate, priv->active_rate_basic);
3019
3020 /*
3021 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
3022 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
3023 * OFDM
3024 */
3025 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
3026 priv->staging_rxon.cck_basic_rates =
3027 ((priv->active_rate_basic &
3028 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
3029 else
3030 priv->staging_rxon.cck_basic_rates =
3031 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
3032
3033 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
3034 priv->staging_rxon.ofdm_basic_rates =
3035 ((priv->active_rate_basic &
3036 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
3037 IWL_FIRST_OFDM_RATE) & 0xFF;
3038 else
3039 priv->staging_rxon.ofdm_basic_rates =
3040 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
3041}
3042
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003043static void iwl3945_radio_kill_sw(struct iwl3945_priv *priv, int disable_radio)
Zhu Yib481de92007-09-25 17:54:57 -07003044{
3045 unsigned long flags;
3046
3047 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
3048 return;
3049
3050 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
3051 disable_radio ? "OFF" : "ON");
3052
3053 if (disable_radio) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003054 iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003055 /* FIXME: This is a workaround for AP */
3056 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
3057 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003058 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
Zhu Yib481de92007-09-25 17:54:57 -07003059 CSR_UCODE_SW_BIT_RFKILL);
3060 spin_unlock_irqrestore(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003061 iwl3945_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
Zhu Yib481de92007-09-25 17:54:57 -07003062 set_bit(STATUS_RF_KILL_SW, &priv->status);
3063 }
3064 return;
3065 }
3066
3067 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003068 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
Zhu Yib481de92007-09-25 17:54:57 -07003069
3070 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3071 spin_unlock_irqrestore(&priv->lock, flags);
3072
3073 /* wake up ucode */
3074 msleep(10);
3075
3076 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003077 iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
3078 if (!iwl3945_grab_nic_access(priv))
3079 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003080 spin_unlock_irqrestore(&priv->lock, flags);
3081
3082 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
3083 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
3084 "disabled by HW switch\n");
3085 return;
3086 }
3087
3088 queue_work(priv->workqueue, &priv->restart);
3089 return;
3090}
3091
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003092void iwl3945_set_decrypted_flag(struct iwl3945_priv *priv, struct sk_buff *skb,
Zhu Yib481de92007-09-25 17:54:57 -07003093 u32 decrypt_res, struct ieee80211_rx_status *stats)
3094{
3095 u16 fc =
3096 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
3097
3098 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
3099 return;
3100
3101 if (!(fc & IEEE80211_FCTL_PROTECTED))
3102 return;
3103
3104 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
3105 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
3106 case RX_RES_STATUS_SEC_TYPE_TKIP:
3107 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3108 RX_RES_STATUS_BAD_ICV_MIC)
3109 stats->flag |= RX_FLAG_MMIC_ERROR;
3110 case RX_RES_STATUS_SEC_TYPE_WEP:
3111 case RX_RES_STATUS_SEC_TYPE_CCMP:
3112 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3113 RX_RES_STATUS_DECRYPT_OK) {
3114 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
3115 stats->flag |= RX_FLAG_DECRYPTED;
3116 }
3117 break;
3118
3119 default:
3120 break;
3121 }
3122}
3123
Zhu Yib481de92007-09-25 17:54:57 -07003124#define IWL_PACKET_RETRY_TIME HZ
3125
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003126int iwl3945_is_duplicate_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *header)
Zhu Yib481de92007-09-25 17:54:57 -07003127{
3128 u16 sc = le16_to_cpu(header->seq_ctrl);
3129 u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
3130 u16 frag = sc & IEEE80211_SCTL_FRAG;
3131 u16 *last_seq, *last_frag;
3132 unsigned long *last_time;
3133
3134 switch (priv->iw_mode) {
3135 case IEEE80211_IF_TYPE_IBSS:{
3136 struct list_head *p;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003137 struct iwl3945_ibss_seq *entry = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07003138 u8 *mac = header->addr2;
3139 int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
3140
3141 __list_for_each(p, &priv->ibss_mac_hash[index]) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003142 entry = list_entry(p, struct iwl3945_ibss_seq, list);
Zhu Yib481de92007-09-25 17:54:57 -07003143 if (!compare_ether_addr(entry->mac, mac))
3144 break;
3145 }
3146 if (p == &priv->ibss_mac_hash[index]) {
3147 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
3148 if (!entry) {
Ian Schrambc434dd2007-10-25 17:15:29 +08003149 IWL_ERROR("Cannot malloc new mac entry\n");
Zhu Yib481de92007-09-25 17:54:57 -07003150 return 0;
3151 }
3152 memcpy(entry->mac, mac, ETH_ALEN);
3153 entry->seq_num = seq;
3154 entry->frag_num = frag;
3155 entry->packet_time = jiffies;
Ian Schrambc434dd2007-10-25 17:15:29 +08003156 list_add(&entry->list, &priv->ibss_mac_hash[index]);
Zhu Yib481de92007-09-25 17:54:57 -07003157 return 0;
3158 }
3159 last_seq = &entry->seq_num;
3160 last_frag = &entry->frag_num;
3161 last_time = &entry->packet_time;
3162 break;
3163 }
3164 case IEEE80211_IF_TYPE_STA:
3165 last_seq = &priv->last_seq_num;
3166 last_frag = &priv->last_frag_num;
3167 last_time = &priv->last_packet_time;
3168 break;
3169 default:
3170 return 0;
3171 }
3172 if ((*last_seq == seq) &&
3173 time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
3174 if (*last_frag == frag)
3175 goto drop;
3176 if (*last_frag + 1 != frag)
3177 /* out-of-order fragment */
3178 goto drop;
3179 } else
3180 *last_seq = seq;
3181
3182 *last_frag = frag;
3183 *last_time = jiffies;
3184 return 0;
3185
3186 drop:
3187 return 1;
3188}
3189
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003190#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -07003191
3192#include "iwl-spectrum.h"
3193
3194#define BEACON_TIME_MASK_LOW 0x00FFFFFF
3195#define BEACON_TIME_MASK_HIGH 0xFF000000
3196#define TIME_UNIT 1024
3197
3198/*
3199 * extended beacon time format
3200 * time in usec will be changed into a 32-bit value in 8:24 format
3201 * the high 1 byte is the beacon counts
3202 * the lower 3 bytes is the time in usec within one beacon interval
3203 */
3204
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003205static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
Zhu Yib481de92007-09-25 17:54:57 -07003206{
3207 u32 quot;
3208 u32 rem;
3209 u32 interval = beacon_interval * 1024;
3210
3211 if (!interval || !usec)
3212 return 0;
3213
3214 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
3215 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
3216
3217 return (quot << 24) + rem;
3218}
3219
3220/* base is usually what we get from ucode with each received frame,
3221 * the same as HW timer counter counting down
3222 */
3223
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003224static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
Zhu Yib481de92007-09-25 17:54:57 -07003225{
3226 u32 base_low = base & BEACON_TIME_MASK_LOW;
3227 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
3228 u32 interval = beacon_interval * TIME_UNIT;
3229 u32 res = (base & BEACON_TIME_MASK_HIGH) +
3230 (addon & BEACON_TIME_MASK_HIGH);
3231
3232 if (base_low > addon_low)
3233 res += base_low - addon_low;
3234 else if (base_low < addon_low) {
3235 res += interval + base_low - addon_low;
3236 res += (1 << 24);
3237 } else
3238 res += (1 << 24);
3239
3240 return cpu_to_le32(res);
3241}
3242
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003243static int iwl3945_get_measurement(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07003244 struct ieee80211_measurement_params *params,
3245 u8 type)
3246{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003247 struct iwl3945_spectrum_cmd spectrum;
3248 struct iwl3945_rx_packet *res;
3249 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07003250 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
3251 .data = (void *)&spectrum,
3252 .meta.flags = CMD_WANT_SKB,
3253 };
3254 u32 add_time = le64_to_cpu(params->start_time);
3255 int rc;
3256 int spectrum_resp_status;
3257 int duration = le16_to_cpu(params->duration);
3258
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003259 if (iwl3945_is_associated(priv))
Zhu Yib481de92007-09-25 17:54:57 -07003260 add_time =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003261 iwl3945_usecs_to_beacons(
Zhu Yib481de92007-09-25 17:54:57 -07003262 le64_to_cpu(params->start_time) - priv->last_tsf,
3263 le16_to_cpu(priv->rxon_timing.beacon_interval));
3264
3265 memset(&spectrum, 0, sizeof(spectrum));
3266
3267 spectrum.channel_count = cpu_to_le16(1);
3268 spectrum.flags =
3269 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
3270 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
3271 cmd.len = sizeof(spectrum);
3272 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
3273
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003274 if (iwl3945_is_associated(priv))
Zhu Yib481de92007-09-25 17:54:57 -07003275 spectrum.start_time =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003276 iwl3945_add_beacon_time(priv->last_beacon_time,
Zhu Yib481de92007-09-25 17:54:57 -07003277 add_time,
3278 le16_to_cpu(priv->rxon_timing.beacon_interval));
3279 else
3280 spectrum.start_time = 0;
3281
3282 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
3283 spectrum.channels[0].channel = params->channel;
3284 spectrum.channels[0].type = type;
3285 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
3286 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
3287 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
3288
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003289 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07003290 if (rc)
3291 return rc;
3292
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003293 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003294 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
3295 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
3296 rc = -EIO;
3297 }
3298
3299 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
3300 switch (spectrum_resp_status) {
3301 case 0: /* Command will be handled */
3302 if (res->u.spectrum.id != 0xff) {
Ian Schrambc434dd2007-10-25 17:15:29 +08003303 IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
3304 res->u.spectrum.id);
Zhu Yib481de92007-09-25 17:54:57 -07003305 priv->measurement_status &= ~MEASUREMENT_READY;
3306 }
3307 priv->measurement_status |= MEASUREMENT_ACTIVE;
3308 rc = 0;
3309 break;
3310
3311 case 1: /* Command will not be handled */
3312 rc = -EAGAIN;
3313 break;
3314 }
3315
3316 dev_kfree_skb_any(cmd.meta.u.skb);
3317
3318 return rc;
3319}
3320#endif
3321
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003322static void iwl3945_txstatus_to_ieee(struct iwl3945_priv *priv,
3323 struct iwl3945_tx_info *tx_sta)
Zhu Yib481de92007-09-25 17:54:57 -07003324{
3325
3326 tx_sta->status.ack_signal = 0;
3327 tx_sta->status.excessive_retries = 0;
3328 tx_sta->status.queue_length = 0;
3329 tx_sta->status.queue_number = 0;
3330
3331 if (in_interrupt())
3332 ieee80211_tx_status_irqsafe(priv->hw,
3333 tx_sta->skb[0], &(tx_sta->status));
3334 else
3335 ieee80211_tx_status(priv->hw,
3336 tx_sta->skb[0], &(tx_sta->status));
3337
3338 tx_sta->skb[0] = NULL;
3339}
3340
3341/**
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003342 * iwl3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
Zhu Yib481de92007-09-25 17:54:57 -07003343 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003344 * When FW advances 'R' index, all entries between old and new 'R' index
3345 * need to be reclaimed. As result, some free space forms. If there is
3346 * enough free space (> low mark), wake the stack that feeds us.
Zhu Yib481de92007-09-25 17:54:57 -07003347 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003348static int iwl3945_tx_queue_reclaim(struct iwl3945_priv *priv, int txq_id, int index)
Zhu Yib481de92007-09-25 17:54:57 -07003349{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003350 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
3351 struct iwl3945_queue *q = &txq->q;
Zhu Yib481de92007-09-25 17:54:57 -07003352 int nfreed = 0;
3353
3354 if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
3355 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3356 "is out of range [0-%d] %d %d.\n", txq_id,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003357 index, q->n_bd, q->write_ptr, q->read_ptr);
Zhu Yib481de92007-09-25 17:54:57 -07003358 return 0;
3359 }
3360
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003361 for (index = iwl3945_queue_inc_wrap(index, q->n_bd);
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003362 q->read_ptr != index;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003363 q->read_ptr = iwl3945_queue_inc_wrap(q->read_ptr, q->n_bd)) {
Zhu Yib481de92007-09-25 17:54:57 -07003364 if (txq_id != IWL_CMD_QUEUE_NUM) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003365 iwl3945_txstatus_to_ieee(priv,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003366 &(txq->txb[txq->q.read_ptr]));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003367 iwl3945_hw_txq_free_tfd(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -07003368 } else if (nfreed > 1) {
3369 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003370 q->write_ptr, q->read_ptr);
Zhu Yib481de92007-09-25 17:54:57 -07003371 queue_work(priv->workqueue, &priv->restart);
3372 }
3373 nfreed++;
3374 }
3375
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003376 if (iwl3945_queue_space(q) > q->low_mark && (txq_id >= 0) &&
Zhu Yib481de92007-09-25 17:54:57 -07003377 (txq_id != IWL_CMD_QUEUE_NUM) &&
3378 priv->mac80211_registered)
3379 ieee80211_wake_queue(priv->hw, txq_id);
3380
3381
3382 return nfreed;
3383}
3384
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003385static int iwl3945_is_tx_success(u32 status)
Zhu Yib481de92007-09-25 17:54:57 -07003386{
3387 return (status & 0xFF) == 0x1;
3388}
3389
3390/******************************************************************************
3391 *
3392 * Generic RX handler implementations
3393 *
3394 ******************************************************************************/
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003395/**
3396 * iwl3945_rx_reply_tx - Handle Tx response
3397 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003398static void iwl3945_rx_reply_tx(struct iwl3945_priv *priv,
3399 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003400{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003401 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003402 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3403 int txq_id = SEQ_TO_QUEUE(sequence);
3404 int index = SEQ_TO_INDEX(sequence);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003405 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
Zhu Yib481de92007-09-25 17:54:57 -07003406 struct ieee80211_tx_status *tx_status;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003407 struct iwl3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
Zhu Yib481de92007-09-25 17:54:57 -07003408 u32 status = le32_to_cpu(tx_resp->status);
3409
3410 if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
3411 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
3412 "is out of range [0-%d] %d %d\n", txq_id,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003413 index, txq->q.n_bd, txq->q.write_ptr,
3414 txq->q.read_ptr);
Zhu Yib481de92007-09-25 17:54:57 -07003415 return;
3416 }
3417
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003418 tx_status = &(txq->txb[txq->q.read_ptr].status);
Zhu Yib481de92007-09-25 17:54:57 -07003419
3420 tx_status->retry_count = tx_resp->failure_frame;
3421 tx_status->queue_number = status;
3422 tx_status->queue_length = tx_resp->bt_kill_count;
3423 tx_status->queue_length |= tx_resp->failure_rts;
3424
3425 tx_status->flags =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003426 iwl3945_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
Zhu Yib481de92007-09-25 17:54:57 -07003427
Zhu Yib481de92007-09-25 17:54:57 -07003428 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003429 txq_id, iwl3945_get_tx_fail_reason(status), status,
Zhu Yib481de92007-09-25 17:54:57 -07003430 tx_resp->rate, tx_resp->failure_frame);
3431
3432 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
3433 if (index != -1)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003434 iwl3945_tx_queue_reclaim(priv, txq_id, index);
Zhu Yib481de92007-09-25 17:54:57 -07003435
3436 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
3437 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
3438}
3439
3440
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003441static void iwl3945_rx_reply_alive(struct iwl3945_priv *priv,
3442 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003443{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003444 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3445 struct iwl3945_alive_resp *palive;
Zhu Yib481de92007-09-25 17:54:57 -07003446 struct delayed_work *pwork;
3447
3448 palive = &pkt->u.alive_frame;
3449
3450 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
3451 "0x%01X 0x%01X\n",
3452 palive->is_valid, palive->ver_type,
3453 palive->ver_subtype);
3454
3455 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
3456 IWL_DEBUG_INFO("Initialization Alive received.\n");
3457 memcpy(&priv->card_alive_init,
3458 &pkt->u.alive_frame,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003459 sizeof(struct iwl3945_init_alive_resp));
Zhu Yib481de92007-09-25 17:54:57 -07003460 pwork = &priv->init_alive_start;
3461 } else {
3462 IWL_DEBUG_INFO("Runtime Alive received.\n");
3463 memcpy(&priv->card_alive, &pkt->u.alive_frame,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003464 sizeof(struct iwl3945_alive_resp));
Zhu Yib481de92007-09-25 17:54:57 -07003465 pwork = &priv->alive_start;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003466 iwl3945_disable_events(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003467 }
3468
3469 /* We delay the ALIVE response by 5ms to
3470 * give the HW RF Kill time to activate... */
3471 if (palive->is_valid == UCODE_VALID_OK)
3472 queue_delayed_work(priv->workqueue, pwork,
3473 msecs_to_jiffies(5));
3474 else
3475 IWL_WARNING("uCode did not respond OK.\n");
3476}
3477
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003478static void iwl3945_rx_reply_add_sta(struct iwl3945_priv *priv,
3479 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003480{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003481 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003482
3483 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
3484 return;
3485}
3486
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003487static void iwl3945_rx_reply_error(struct iwl3945_priv *priv,
3488 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003489{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003490 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003491
3492 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
3493 "seq 0x%04X ser 0x%08X\n",
3494 le32_to_cpu(pkt->u.err_resp.error_type),
3495 get_cmd_string(pkt->u.err_resp.cmd_id),
3496 pkt->u.err_resp.cmd_id,
3497 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
3498 le32_to_cpu(pkt->u.err_resp.error_info));
3499}
3500
3501#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3502
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003503static void iwl3945_rx_csa(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003504{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003505 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3506 struct iwl3945_rxon_cmd *rxon = (void *)&priv->active_rxon;
3507 struct iwl3945_csa_notification *csa = &(pkt->u.csa_notif);
Zhu Yib481de92007-09-25 17:54:57 -07003508 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3509 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3510 rxon->channel = csa->channel;
3511 priv->staging_rxon.channel = csa->channel;
3512}
3513
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003514static void iwl3945_rx_spectrum_measure_notif(struct iwl3945_priv *priv,
3515 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003516{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003517#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003518 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3519 struct iwl3945_spectrum_notification *report = &(pkt->u.spectrum_notif);
Zhu Yib481de92007-09-25 17:54:57 -07003520
3521 if (!report->state) {
3522 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3523 "Spectrum Measure Notification: Start\n");
3524 return;
3525 }
3526
3527 memcpy(&priv->measure_report, report, sizeof(*report));
3528 priv->measurement_status |= MEASUREMENT_READY;
3529#endif
3530}
3531
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003532static void iwl3945_rx_pm_sleep_notif(struct iwl3945_priv *priv,
3533 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003534{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003535#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003536 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3537 struct iwl3945_sleep_notification *sleep = &(pkt->u.sleep_notif);
Zhu Yib481de92007-09-25 17:54:57 -07003538 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3539 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3540#endif
3541}
3542
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003543static void iwl3945_rx_pm_debug_statistics_notif(struct iwl3945_priv *priv,
3544 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003545{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003546 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003547 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3548 "notification for %s:\n",
3549 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003550 iwl3945_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
Zhu Yib481de92007-09-25 17:54:57 -07003551}
3552
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003553static void iwl3945_bg_beacon_update(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07003554{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003555 struct iwl3945_priv *priv =
3556 container_of(work, struct iwl3945_priv, beacon_update);
Zhu Yib481de92007-09-25 17:54:57 -07003557 struct sk_buff *beacon;
3558
3559 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
Johannes Berg32bfd352007-12-19 01:31:26 +01003560 beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
Zhu Yib481de92007-09-25 17:54:57 -07003561
3562 if (!beacon) {
3563 IWL_ERROR("update beacon failed\n");
3564 return;
3565 }
3566
3567 mutex_lock(&priv->mutex);
3568 /* new beacon skb is allocated every time; dispose previous.*/
3569 if (priv->ibss_beacon)
3570 dev_kfree_skb(priv->ibss_beacon);
3571
3572 priv->ibss_beacon = beacon;
3573 mutex_unlock(&priv->mutex);
3574
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003575 iwl3945_send_beacon_cmd(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003576}
3577
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003578static void iwl3945_rx_beacon_notif(struct iwl3945_priv *priv,
3579 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003580{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003581#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003582 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3583 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
Zhu Yib481de92007-09-25 17:54:57 -07003584 u8 rate = beacon->beacon_notify_hdr.rate;
3585
3586 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3587 "tsf %d %d rate %d\n",
3588 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3589 beacon->beacon_notify_hdr.failure_frame,
3590 le32_to_cpu(beacon->ibss_mgr_status),
3591 le32_to_cpu(beacon->high_tsf),
3592 le32_to_cpu(beacon->low_tsf), rate);
3593#endif
3594
3595 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
3596 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3597 queue_work(priv->workqueue, &priv->beacon_update);
3598}
3599
3600/* Service response to REPLY_SCAN_CMD (0x80) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003601static void iwl3945_rx_reply_scan(struct iwl3945_priv *priv,
3602 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003603{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003604#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003605 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3606 struct iwl3945_scanreq_notification *notif =
3607 (struct iwl3945_scanreq_notification *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003608
3609 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3610#endif
3611}
3612
3613/* Service SCAN_START_NOTIFICATION (0x82) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003614static void iwl3945_rx_scan_start_notif(struct iwl3945_priv *priv,
3615 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003616{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003617 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3618 struct iwl3945_scanstart_notification *notif =
3619 (struct iwl3945_scanstart_notification *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003620 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3621 IWL_DEBUG_SCAN("Scan start: "
3622 "%d [802.11%s] "
3623 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3624 notif->channel,
3625 notif->band ? "bg" : "a",
3626 notif->tsf_high,
3627 notif->tsf_low, notif->status, notif->beacon_timer);
3628}
3629
3630/* Service SCAN_RESULTS_NOTIFICATION (0x83) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003631static void iwl3945_rx_scan_results_notif(struct iwl3945_priv *priv,
3632 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003633{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003634 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3635 struct iwl3945_scanresults_notification *notif =
3636 (struct iwl3945_scanresults_notification *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003637
3638 IWL_DEBUG_SCAN("Scan ch.res: "
3639 "%d [802.11%s] "
3640 "(TSF: 0x%08X:%08X) - %d "
3641 "elapsed=%lu usec (%dms since last)\n",
3642 notif->channel,
3643 notif->band ? "bg" : "a",
3644 le32_to_cpu(notif->tsf_high),
3645 le32_to_cpu(notif->tsf_low),
3646 le32_to_cpu(notif->statistics[0]),
3647 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3648 jiffies_to_msecs(elapsed_jiffies
3649 (priv->last_scan_jiffies, jiffies)));
3650
3651 priv->last_scan_jiffies = jiffies;
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08003652 priv->next_scan_jiffies = 0;
Zhu Yib481de92007-09-25 17:54:57 -07003653}
3654
3655/* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003656static void iwl3945_rx_scan_complete_notif(struct iwl3945_priv *priv,
3657 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003658{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003659 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3660 struct iwl3945_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003661
3662 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3663 scan_notif->scanned_channels,
3664 scan_notif->tsf_low,
3665 scan_notif->tsf_high, scan_notif->status);
3666
3667 /* The HW is no longer scanning */
3668 clear_bit(STATUS_SCAN_HW, &priv->status);
3669
3670 /* The scan completion notification came in, so kill that timer... */
3671 cancel_delayed_work(&priv->scan_check);
3672
3673 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3674 (priv->scan_bands == 2) ? "2.4" : "5.2",
3675 jiffies_to_msecs(elapsed_jiffies
3676 (priv->scan_pass_start, jiffies)));
3677
3678 /* Remove this scanned band from the list
3679 * of pending bands to scan */
3680 priv->scan_bands--;
3681
3682 /* If a request to abort was given, or the scan did not succeed
3683 * then we reset the scan state machine and terminate,
3684 * re-queuing another scan if one has been requested */
3685 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3686 IWL_DEBUG_INFO("Aborted scan completed.\n");
3687 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3688 } else {
3689 /* If there are more bands on this scan pass reschedule */
3690 if (priv->scan_bands > 0)
3691 goto reschedule;
3692 }
3693
3694 priv->last_scan_jiffies = jiffies;
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08003695 priv->next_scan_jiffies = 0;
Zhu Yib481de92007-09-25 17:54:57 -07003696 IWL_DEBUG_INFO("Setting scan to off\n");
3697
3698 clear_bit(STATUS_SCANNING, &priv->status);
3699
3700 IWL_DEBUG_INFO("Scan took %dms\n",
3701 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3702
3703 queue_work(priv->workqueue, &priv->scan_completed);
3704
3705 return;
3706
3707reschedule:
3708 priv->scan_pass_start = jiffies;
3709 queue_work(priv->workqueue, &priv->request_scan);
3710}
3711
3712/* Handle notification from uCode that card's power state is changing
3713 * due to software, hardware, or critical temperature RFKILL */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003714static void iwl3945_rx_card_state_notif(struct iwl3945_priv *priv,
3715 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003716{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003717 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003718 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3719 unsigned long status = priv->status;
3720
3721 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3722 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3723 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3724
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003725 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
Zhu Yib481de92007-09-25 17:54:57 -07003726 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3727
3728 if (flags & HW_CARD_DISABLED)
3729 set_bit(STATUS_RF_KILL_HW, &priv->status);
3730 else
3731 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3732
3733
3734 if (flags & SW_CARD_DISABLED)
3735 set_bit(STATUS_RF_KILL_SW, &priv->status);
3736 else
3737 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3738
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003739 iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003740
3741 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3742 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3743 (test_bit(STATUS_RF_KILL_SW, &status) !=
3744 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3745 queue_work(priv->workqueue, &priv->rf_kill);
3746 else
3747 wake_up_interruptible(&priv->wait_command_queue);
3748}
3749
3750/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003751 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
Zhu Yib481de92007-09-25 17:54:57 -07003752 *
3753 * Setup the RX handlers for each of the reply types sent from the uCode
3754 * to the host.
3755 *
3756 * This function chains into the hardware specific files for them to setup
3757 * any hardware specific handlers as well.
3758 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003759static void iwl3945_setup_rx_handlers(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003760{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003761 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
3762 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
3763 priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
3764 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
Zhu Yib481de92007-09-25 17:54:57 -07003765 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003766 iwl3945_rx_spectrum_measure_notif;
3767 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003768 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003769 iwl3945_rx_pm_debug_statistics_notif;
3770 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003771
Ben Cahill9fbab512007-11-29 11:09:47 +08003772 /*
3773 * The same handler is used for both the REPLY to a discrete
3774 * statistics request from the host as well as for the periodic
3775 * statistics notifications (after received beacons) from the uCode.
Zhu Yib481de92007-09-25 17:54:57 -07003776 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003777 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
3778 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
Zhu Yib481de92007-09-25 17:54:57 -07003779
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003780 priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
3781 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003782 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003783 iwl3945_rx_scan_results_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003784 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003785 iwl3945_rx_scan_complete_notif;
3786 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
3787 priv->rx_handlers[REPLY_TX] = iwl3945_rx_reply_tx;
Zhu Yib481de92007-09-25 17:54:57 -07003788
Ben Cahill9fbab512007-11-29 11:09:47 +08003789 /* Set up hardware specific Rx handlers */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003790 iwl3945_hw_rx_handler_setup(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003791}
3792
3793/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003794 * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
Zhu Yib481de92007-09-25 17:54:57 -07003795 * @rxb: Rx buffer to reclaim
3796 *
3797 * If an Rx buffer has an async callback associated with it the callback
3798 * will be executed. The attached skb (if present) will only be freed
3799 * if the callback returns 1
3800 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003801static void iwl3945_tx_cmd_complete(struct iwl3945_priv *priv,
3802 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003803{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003804 struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003805 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3806 int txq_id = SEQ_TO_QUEUE(sequence);
3807 int index = SEQ_TO_INDEX(sequence);
3808 int huge = sequence & SEQ_HUGE_FRAME;
3809 int cmd_index;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003810 struct iwl3945_cmd *cmd;
Zhu Yib481de92007-09-25 17:54:57 -07003811
3812 /* If a Tx command is being handled and it isn't in the actual
3813 * command queue then there a command routing bug has been introduced
3814 * in the queue management code. */
3815 if (txq_id != IWL_CMD_QUEUE_NUM)
3816 IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
3817 txq_id, pkt->hdr.cmd);
3818 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3819
3820 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3821 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3822
3823 /* Input error checking is done when commands are added to queue. */
3824 if (cmd->meta.flags & CMD_WANT_SKB) {
3825 cmd->meta.source->u.skb = rxb->skb;
3826 rxb->skb = NULL;
3827 } else if (cmd->meta.u.callback &&
3828 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3829 rxb->skb = NULL;
3830
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003831 iwl3945_tx_queue_reclaim(priv, txq_id, index);
Zhu Yib481de92007-09-25 17:54:57 -07003832
3833 if (!(cmd->meta.flags & CMD_ASYNC)) {
3834 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3835 wake_up_interruptible(&priv->wait_command_queue);
3836 }
3837}
3838
3839/************************** RX-FUNCTIONS ****************************/
3840/*
3841 * Rx theory of operation
3842 *
3843 * The host allocates 32 DMA target addresses and passes the host address
3844 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
3845 * 0 to 31
3846 *
3847 * Rx Queue Indexes
3848 * The host/firmware share two index registers for managing the Rx buffers.
3849 *
3850 * The READ index maps to the first position that the firmware may be writing
3851 * to -- the driver can read up to (but not including) this position and get
3852 * good data.
3853 * The READ index is managed by the firmware once the card is enabled.
3854 *
3855 * The WRITE index maps to the last position the driver has read from -- the
3856 * position preceding WRITE is the last slot the firmware can place a packet.
3857 *
3858 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3859 * WRITE = READ.
3860 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003861 * During initialization, the host sets up the READ queue position to the first
Zhu Yib481de92007-09-25 17:54:57 -07003862 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3863 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003864 * When the firmware places a packet in a buffer, it will advance the READ index
Zhu Yib481de92007-09-25 17:54:57 -07003865 * and fire the RX interrupt. The driver can then query the READ index and
3866 * process as many packets as possible, moving the WRITE index forward as it
3867 * resets the Rx queue buffers with new memory.
3868 *
3869 * The management in the driver is as follows:
3870 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3871 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
Ian Schram01ebd062007-10-25 17:15:22 +08003872 * to replenish the iwl->rxq->rx_free.
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003873 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
Zhu Yib481de92007-09-25 17:54:57 -07003874 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3875 * 'processed' and 'read' driver indexes as well)
3876 * + A received packet is processed and handed to the kernel network stack,
3877 * detached from the iwl->rxq. The driver 'processed' index is updated.
3878 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3879 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3880 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3881 * were enough free buffers and RX_STALLED is set it is cleared.
3882 *
3883 *
3884 * Driver sequence:
3885 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003886 * iwl3945_rx_queue_alloc() Allocates rx_free
3887 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003888 * iwl3945_rx_queue_restock
Ben Cahill9fbab512007-11-29 11:09:47 +08003889 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
Zhu Yib481de92007-09-25 17:54:57 -07003890 * queue, updates firmware pointers, and updates
3891 * the WRITE index. If insufficient rx_free buffers
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003892 * are available, schedules iwl3945_rx_replenish
Zhu Yib481de92007-09-25 17:54:57 -07003893 *
3894 * -- enable interrupts --
Ben Cahill9fbab512007-11-29 11:09:47 +08003895 * ISR - iwl3945_rx() Detach iwl3945_rx_mem_buffers from pool up to the
Zhu Yib481de92007-09-25 17:54:57 -07003896 * READ INDEX, detaching the SKB from the pool.
3897 * Moves the packet buffer from queue to rx_used.
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003898 * Calls iwl3945_rx_queue_restock to refill any empty
Zhu Yib481de92007-09-25 17:54:57 -07003899 * slots.
3900 * ...
3901 *
3902 */
3903
3904/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003905 * iwl3945_rx_queue_space - Return number of free slots available in queue.
Zhu Yib481de92007-09-25 17:54:57 -07003906 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003907static int iwl3945_rx_queue_space(const struct iwl3945_rx_queue *q)
Zhu Yib481de92007-09-25 17:54:57 -07003908{
3909 int s = q->read - q->write;
3910 if (s <= 0)
3911 s += RX_QUEUE_SIZE;
3912 /* keep some buffer to not confuse full and empty queue */
3913 s -= 2;
3914 if (s < 0)
3915 s = 0;
3916 return s;
3917}
3918
3919/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003920 * iwl3945_rx_queue_update_write_ptr - Update the write pointer for the RX queue
Zhu Yib481de92007-09-25 17:54:57 -07003921 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003922int iwl3945_rx_queue_update_write_ptr(struct iwl3945_priv *priv, struct iwl3945_rx_queue *q)
Zhu Yib481de92007-09-25 17:54:57 -07003923{
3924 u32 reg = 0;
3925 int rc = 0;
3926 unsigned long flags;
3927
3928 spin_lock_irqsave(&q->lock, flags);
3929
3930 if (q->need_update == 0)
3931 goto exit_unlock;
3932
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003933 /* If power-saving is in use, make sure device is awake */
Zhu Yib481de92007-09-25 17:54:57 -07003934 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003935 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
Zhu Yib481de92007-09-25 17:54:57 -07003936
3937 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003938 iwl3945_set_bit(priv, CSR_GP_CNTRL,
Zhu Yib481de92007-09-25 17:54:57 -07003939 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3940 goto exit_unlock;
3941 }
3942
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003943 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003944 if (rc)
3945 goto exit_unlock;
3946
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003947 /* Device expects a multiple of 8 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003948 iwl3945_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
Zhu Yib481de92007-09-25 17:54:57 -07003949 q->write & ~0x7);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003950 iwl3945_release_nic_access(priv);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003951
3952 /* Else device is assumed to be awake */
Zhu Yib481de92007-09-25 17:54:57 -07003953 } else
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003954 /* Device expects a multiple of 8 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003955 iwl3945_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
Zhu Yib481de92007-09-25 17:54:57 -07003956
3957
3958 q->need_update = 0;
3959
3960 exit_unlock:
3961 spin_unlock_irqrestore(&q->lock, flags);
3962 return rc;
3963}
3964
3965/**
Ben Cahill9fbab512007-11-29 11:09:47 +08003966 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
Zhu Yib481de92007-09-25 17:54:57 -07003967 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003968static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07003969 dma_addr_t dma_addr)
3970{
3971 return cpu_to_le32((u32)dma_addr);
3972}
3973
3974/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003975 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
Zhu Yib481de92007-09-25 17:54:57 -07003976 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003977 * If there are slots in the RX queue that need to be restocked,
Zhu Yib481de92007-09-25 17:54:57 -07003978 * and we have free pre-allocated buffers, fill the ranks as much
Ben Cahill9fbab512007-11-29 11:09:47 +08003979 * as we can, pulling from rx_free.
Zhu Yib481de92007-09-25 17:54:57 -07003980 *
3981 * This moves the 'write' index forward to catch up with 'processed', and
3982 * also updates the memory address in the firmware to reference the new
3983 * target buffer.
3984 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003985static int iwl3945_rx_queue_restock(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003986{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003987 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07003988 struct list_head *element;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003989 struct iwl3945_rx_mem_buffer *rxb;
Zhu Yib481de92007-09-25 17:54:57 -07003990 unsigned long flags;
3991 int write, rc;
3992
3993 spin_lock_irqsave(&rxq->lock, flags);
3994 write = rxq->write & ~0x7;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003995 while ((iwl3945_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003996 /* Get next free Rx buffer, remove from free list */
Zhu Yib481de92007-09-25 17:54:57 -07003997 element = rxq->rx_free.next;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003998 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
Zhu Yib481de92007-09-25 17:54:57 -07003999 list_del(element);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004000
4001 /* Point to Rx buffer via next RBD in circular buffer */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004002 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->dma_addr);
Zhu Yib481de92007-09-25 17:54:57 -07004003 rxq->queue[rxq->write] = rxb;
4004 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
4005 rxq->free_count--;
4006 }
4007 spin_unlock_irqrestore(&rxq->lock, flags);
4008 /* If the pre-allocated buffer pool is dropping low, schedule to
4009 * refill it */
4010 if (rxq->free_count <= RX_LOW_WATERMARK)
4011 queue_work(priv->workqueue, &priv->rx_replenish);
4012
4013
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004014 /* If we've added more space for the firmware to place data, tell it.
4015 * Increment device's write pointer in multiples of 8. */
Zhu Yib481de92007-09-25 17:54:57 -07004016 if ((write != (rxq->write & ~0x7))
4017 || (abs(rxq->write - rxq->read) > 7)) {
4018 spin_lock_irqsave(&rxq->lock, flags);
4019 rxq->need_update = 1;
4020 spin_unlock_irqrestore(&rxq->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004021 rc = iwl3945_rx_queue_update_write_ptr(priv, rxq);
Zhu Yib481de92007-09-25 17:54:57 -07004022 if (rc)
4023 return rc;
4024 }
4025
4026 return 0;
4027}
4028
4029/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004030 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
Zhu Yib481de92007-09-25 17:54:57 -07004031 *
4032 * When moving to rx_free an SKB is allocated for the slot.
4033 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004034 * Also restock the Rx queue via iwl3945_rx_queue_restock.
Ian Schram01ebd062007-10-25 17:15:22 +08004035 * This is called as a scheduled work item (except for during initialization)
Zhu Yib481de92007-09-25 17:54:57 -07004036 */
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08004037static void iwl3945_rx_allocate(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004038{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004039 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07004040 struct list_head *element;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004041 struct iwl3945_rx_mem_buffer *rxb;
Zhu Yib481de92007-09-25 17:54:57 -07004042 unsigned long flags;
4043 spin_lock_irqsave(&rxq->lock, flags);
4044 while (!list_empty(&rxq->rx_used)) {
4045 element = rxq->rx_used.next;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004046 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004047
4048 /* Alloc a new receive buffer */
Zhu Yib481de92007-09-25 17:54:57 -07004049 rxb->skb =
4050 alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
4051 if (!rxb->skb) {
4052 if (net_ratelimit())
4053 printk(KERN_CRIT DRV_NAME
4054 ": Can not allocate SKB buffers\n");
4055 /* We don't reschedule replenish work here -- we will
4056 * call the restock method and if it still needs
4057 * more buffers it will schedule replenish */
4058 break;
4059 }
Zhu Yi12342c42007-12-20 11:27:32 +08004060
4061 /* If radiotap head is required, reserve some headroom here.
4062 * The physical head count is a variable rx_stats->phy_count.
4063 * We reserve 4 bytes here. Plus these extra bytes, the
4064 * headroom of the physical head should be enough for the
4065 * radiotap head that iwl3945 supported. See iwl3945_rt.
4066 */
4067 skb_reserve(rxb->skb, 4);
4068
Zhu Yib481de92007-09-25 17:54:57 -07004069 priv->alloc_rxb_skb++;
4070 list_del(element);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004071
4072 /* Get physical address of RB/SKB */
Zhu Yib481de92007-09-25 17:54:57 -07004073 rxb->dma_addr =
4074 pci_map_single(priv->pci_dev, rxb->skb->data,
4075 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4076 list_add_tail(&rxb->list, &rxq->rx_free);
4077 rxq->free_count++;
4078 }
4079 spin_unlock_irqrestore(&rxq->lock, flags);
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08004080}
4081
4082/*
4083 * this should be called while priv->lock is locked
4084 */
Tomas Winkler4fd1f842007-12-05 20:59:58 +02004085static void __iwl3945_rx_replenish(void *data)
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08004086{
4087 struct iwl3945_priv *priv = data;
4088
4089 iwl3945_rx_allocate(priv);
4090 iwl3945_rx_queue_restock(priv);
4091}
4092
4093
4094void iwl3945_rx_replenish(void *data)
4095{
4096 struct iwl3945_priv *priv = data;
4097 unsigned long flags;
4098
4099 iwl3945_rx_allocate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004100
4101 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004102 iwl3945_rx_queue_restock(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004103 spin_unlock_irqrestore(&priv->lock, flags);
4104}
4105
4106/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
Ben Cahill9fbab512007-11-29 11:09:47 +08004107 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
Zhu Yib481de92007-09-25 17:54:57 -07004108 * This free routine walks the list of POOL entries and if SKB is set to
4109 * non NULL it is unmapped and freed
4110 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004111static void iwl3945_rx_queue_free(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
Zhu Yib481de92007-09-25 17:54:57 -07004112{
4113 int i;
4114 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
4115 if (rxq->pool[i].skb != NULL) {
4116 pci_unmap_single(priv->pci_dev,
4117 rxq->pool[i].dma_addr,
4118 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4119 dev_kfree_skb(rxq->pool[i].skb);
4120 }
4121 }
4122
4123 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
4124 rxq->dma_addr);
4125 rxq->bd = NULL;
4126}
4127
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004128int iwl3945_rx_queue_alloc(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004129{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004130 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07004131 struct pci_dev *dev = priv->pci_dev;
4132 int i;
4133
4134 spin_lock_init(&rxq->lock);
4135 INIT_LIST_HEAD(&rxq->rx_free);
4136 INIT_LIST_HEAD(&rxq->rx_used);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004137
4138 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
Zhu Yib481de92007-09-25 17:54:57 -07004139 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
4140 if (!rxq->bd)
4141 return -ENOMEM;
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004142
Zhu Yib481de92007-09-25 17:54:57 -07004143 /* Fill the rx_used queue with _all_ of the Rx buffers */
4144 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
4145 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004146
Zhu Yib481de92007-09-25 17:54:57 -07004147 /* Set us so that we have processed and used all buffers, but have
4148 * not restocked the Rx queue with fresh buffers */
4149 rxq->read = rxq->write = 0;
4150 rxq->free_count = 0;
4151 rxq->need_update = 0;
4152 return 0;
4153}
4154
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004155void iwl3945_rx_queue_reset(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
Zhu Yib481de92007-09-25 17:54:57 -07004156{
4157 unsigned long flags;
4158 int i;
4159 spin_lock_irqsave(&rxq->lock, flags);
4160 INIT_LIST_HEAD(&rxq->rx_free);
4161 INIT_LIST_HEAD(&rxq->rx_used);
4162 /* Fill the rx_used queue with _all_ of the Rx buffers */
4163 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
4164 /* In the reset function, these buffers may have been allocated
4165 * to an SKB, so we need to unmap and free potential storage */
4166 if (rxq->pool[i].skb != NULL) {
4167 pci_unmap_single(priv->pci_dev,
4168 rxq->pool[i].dma_addr,
4169 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4170 priv->alloc_rxb_skb--;
4171 dev_kfree_skb(rxq->pool[i].skb);
4172 rxq->pool[i].skb = NULL;
4173 }
4174 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
4175 }
4176
4177 /* Set us so that we have processed and used all buffers, but have
4178 * not restocked the Rx queue with fresh buffers */
4179 rxq->read = rxq->write = 0;
4180 rxq->free_count = 0;
4181 spin_unlock_irqrestore(&rxq->lock, flags);
4182}
4183
4184/* Convert linear signal-to-noise ratio into dB */
4185static u8 ratio2dB[100] = {
4186/* 0 1 2 3 4 5 6 7 8 9 */
4187 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
4188 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
4189 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
4190 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
4191 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
4192 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
4193 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
4194 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
4195 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
4196 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
4197};
4198
4199/* Calculates a relative dB value from a ratio of linear
4200 * (i.e. not dB) signal levels.
4201 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004202int iwl3945_calc_db_from_ratio(int sig_ratio)
Zhu Yib481de92007-09-25 17:54:57 -07004203{
Adrian Bunk221c80c2008-02-02 23:19:01 +02004204 /* 1000:1 or higher just report as 60 dB */
4205 if (sig_ratio >= 1000)
Zhu Yib481de92007-09-25 17:54:57 -07004206 return 60;
4207
Adrian Bunk221c80c2008-02-02 23:19:01 +02004208 /* 100:1 or higher, divide by 10 and use table,
Zhu Yib481de92007-09-25 17:54:57 -07004209 * add 20 dB to make up for divide by 10 */
Adrian Bunk221c80c2008-02-02 23:19:01 +02004210 if (sig_ratio >= 100)
Zhu Yib481de92007-09-25 17:54:57 -07004211 return (20 + (int)ratio2dB[sig_ratio/10]);
4212
4213 /* We shouldn't see this */
4214 if (sig_ratio < 1)
4215 return 0;
4216
4217 /* Use table for ratios 1:1 - 99:1 */
4218 return (int)ratio2dB[sig_ratio];
4219}
4220
4221#define PERFECT_RSSI (-20) /* dBm */
4222#define WORST_RSSI (-95) /* dBm */
4223#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
4224
4225/* Calculate an indication of rx signal quality (a percentage, not dBm!).
4226 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
4227 * about formulas used below. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004228int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
Zhu Yib481de92007-09-25 17:54:57 -07004229{
4230 int sig_qual;
4231 int degradation = PERFECT_RSSI - rssi_dbm;
4232
4233 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
4234 * as indicator; formula is (signal dbm - noise dbm).
4235 * SNR at or above 40 is a great signal (100%).
4236 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
4237 * Weakest usable signal is usually 10 - 15 dB SNR. */
4238 if (noise_dbm) {
4239 if (rssi_dbm - noise_dbm >= 40)
4240 return 100;
4241 else if (rssi_dbm < noise_dbm)
4242 return 0;
4243 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
4244
4245 /* Else use just the signal level.
4246 * This formula is a least squares fit of data points collected and
4247 * compared with a reference system that had a percentage (%) display
4248 * for signal quality. */
4249 } else
4250 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
4251 (15 * RSSI_RANGE + 62 * degradation)) /
4252 (RSSI_RANGE * RSSI_RANGE);
4253
4254 if (sig_qual > 100)
4255 sig_qual = 100;
4256 else if (sig_qual < 1)
4257 sig_qual = 0;
4258
4259 return sig_qual;
4260}
4261
4262/**
Ben Cahill9fbab512007-11-29 11:09:47 +08004263 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
Zhu Yib481de92007-09-25 17:54:57 -07004264 *
4265 * Uses the priv->rx_handlers callback function array to invoke
4266 * the appropriate handlers, including command responses,
4267 * frame-received notifications, and other notifications.
4268 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004269static void iwl3945_rx_handle(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004270{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004271 struct iwl3945_rx_mem_buffer *rxb;
4272 struct iwl3945_rx_packet *pkt;
4273 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07004274 u32 r, i;
4275 int reclaim;
4276 unsigned long flags;
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08004277 u8 fill_rx = 0;
Mohamed Abbasd68ab682008-02-07 13:16:33 -08004278 u32 count = 8;
Zhu Yib481de92007-09-25 17:54:57 -07004279
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004280 /* uCode's read index (stored in shared DRAM) indicates the last Rx
4281 * buffer that the driver may process (last buffer filled by ucode). */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004282 r = iwl3945_hw_get_rx_read(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004283 i = rxq->read;
4284
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08004285 if (iwl3945_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
4286 fill_rx = 1;
Zhu Yib481de92007-09-25 17:54:57 -07004287 /* Rx interrupt, but nothing sent from uCode */
4288 if (i == r)
4289 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
4290
4291 while (i != r) {
4292 rxb = rxq->queue[i];
4293
Ben Cahill9fbab512007-11-29 11:09:47 +08004294 /* If an RXB doesn't have a Rx queue slot associated with it,
Zhu Yib481de92007-09-25 17:54:57 -07004295 * then a bug has been introduced in the queue refilling
4296 * routines -- catch it here */
4297 BUG_ON(rxb == NULL);
4298
4299 rxq->queue[i] = NULL;
4300
4301 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
4302 IWL_RX_BUF_SIZE,
4303 PCI_DMA_FROMDEVICE);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004304 pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07004305
4306 /* Reclaim a command buffer only if this packet is a response
4307 * to a (driver-originated) command.
4308 * If the packet (e.g. Rx frame) originated from uCode,
4309 * there is no command buffer to reclaim.
4310 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
4311 * but apparently a few don't get set; catch them here. */
4312 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
4313 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
4314 (pkt->hdr.cmd != REPLY_TX);
4315
4316 /* Based on type of command response or notification,
4317 * handle those that need handling via function in
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004318 * rx_handlers table. See iwl3945_setup_rx_handlers() */
Zhu Yib481de92007-09-25 17:54:57 -07004319 if (priv->rx_handlers[pkt->hdr.cmd]) {
4320 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4321 "r = %d, i = %d, %s, 0x%02x\n", r, i,
4322 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4323 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
4324 } else {
4325 /* No handling needed */
4326 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4327 "r %d i %d No handler needed for %s, 0x%02x\n",
4328 r, i, get_cmd_string(pkt->hdr.cmd),
4329 pkt->hdr.cmd);
4330 }
4331
4332 if (reclaim) {
Ben Cahill9fbab512007-11-29 11:09:47 +08004333 /* Invoke any callbacks, transfer the skb to caller, and
4334 * fire off the (possibly) blocking iwl3945_send_cmd()
Zhu Yib481de92007-09-25 17:54:57 -07004335 * as we reclaim the driver command queue */
4336 if (rxb && rxb->skb)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004337 iwl3945_tx_cmd_complete(priv, rxb);
Zhu Yib481de92007-09-25 17:54:57 -07004338 else
4339 IWL_WARNING("Claim null rxb?\n");
4340 }
4341
4342 /* For now we just don't re-use anything. We can tweak this
4343 * later to try and re-use notification packets and SKBs that
4344 * fail to Rx correctly */
4345 if (rxb->skb != NULL) {
4346 priv->alloc_rxb_skb--;
4347 dev_kfree_skb_any(rxb->skb);
4348 rxb->skb = NULL;
4349 }
4350
4351 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
4352 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4353 spin_lock_irqsave(&rxq->lock, flags);
4354 list_add_tail(&rxb->list, &priv->rxq.rx_used);
4355 spin_unlock_irqrestore(&rxq->lock, flags);
4356 i = (i + 1) & RX_QUEUE_MASK;
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08004357 /* If there are a lot of unused frames,
4358 * restock the Rx queue so ucode won't assert. */
4359 if (fill_rx) {
4360 count++;
4361 if (count >= 8) {
4362 priv->rxq.read = i;
4363 __iwl3945_rx_replenish(priv);
4364 count = 0;
4365 }
4366 }
Zhu Yib481de92007-09-25 17:54:57 -07004367 }
4368
4369 /* Backtrack one entry */
4370 priv->rxq.read = i;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004371 iwl3945_rx_queue_restock(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004372}
4373
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004374/**
4375 * iwl3945_tx_queue_update_write_ptr - Send new write index to hardware
4376 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004377static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
4378 struct iwl3945_tx_queue *txq)
Zhu Yib481de92007-09-25 17:54:57 -07004379{
4380 u32 reg = 0;
4381 int rc = 0;
4382 int txq_id = txq->q.id;
4383
4384 if (txq->need_update == 0)
4385 return rc;
4386
4387 /* if we're trying to save power */
4388 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4389 /* wake up nic if it's powered down ...
4390 * uCode will wake up, and interrupt us again, so next
4391 * time we'll skip this part. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004392 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
Zhu Yib481de92007-09-25 17:54:57 -07004393
4394 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4395 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004396 iwl3945_set_bit(priv, CSR_GP_CNTRL,
Zhu Yib481de92007-09-25 17:54:57 -07004397 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4398 return rc;
4399 }
4400
4401 /* restore this queue's parameters in nic hardware. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004402 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004403 if (rc)
4404 return rc;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004405 iwl3945_write_direct32(priv, HBUS_TARG_WRPTR,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08004406 txq->q.write_ptr | (txq_id << 8));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004407 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004408
4409 /* else not in power-save mode, uCode will never sleep when we're
4410 * trying to tx (during RFKILL, we're not trying to tx). */
4411 } else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004412 iwl3945_write32(priv, HBUS_TARG_WRPTR,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08004413 txq->q.write_ptr | (txq_id << 8));
Zhu Yib481de92007-09-25 17:54:57 -07004414
4415 txq->need_update = 0;
4416
4417 return rc;
4418}
4419
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004420#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004421static void iwl3945_print_rx_config_cmd(struct iwl3945_rxon_cmd *rxon)
Zhu Yib481de92007-09-25 17:54:57 -07004422{
Joe Perches0795af52007-10-03 17:59:30 -07004423 DECLARE_MAC_BUF(mac);
4424
Zhu Yib481de92007-09-25 17:54:57 -07004425 IWL_DEBUG_RADIO("RX CONFIG:\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004426 iwl3945_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
Zhu Yib481de92007-09-25 17:54:57 -07004427 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4428 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4429 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
4430 le32_to_cpu(rxon->filter_flags));
4431 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4432 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
4433 rxon->ofdm_basic_rates);
4434 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
Joe Perches0795af52007-10-03 17:59:30 -07004435 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
4436 print_mac(mac, rxon->node_addr));
4437 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
4438 print_mac(mac, rxon->bssid_addr));
Zhu Yib481de92007-09-25 17:54:57 -07004439 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4440}
4441#endif
4442
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004443static void iwl3945_enable_interrupts(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004444{
4445 IWL_DEBUG_ISR("Enabling interrupts\n");
4446 set_bit(STATUS_INT_ENABLED, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004447 iwl3945_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
Zhu Yib481de92007-09-25 17:54:57 -07004448}
4449
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004450static inline void iwl3945_disable_interrupts(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004451{
4452 clear_bit(STATUS_INT_ENABLED, &priv->status);
4453
4454 /* disable interrupts from uCode/NIC to host */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004455 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
Zhu Yib481de92007-09-25 17:54:57 -07004456
4457 /* acknowledge/clear/reset any interrupts still pending
4458 * from uCode or flow handler (Rx/Tx DMA) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004459 iwl3945_write32(priv, CSR_INT, 0xffffffff);
4460 iwl3945_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
Zhu Yib481de92007-09-25 17:54:57 -07004461 IWL_DEBUG_ISR("Disabled interrupts\n");
4462}
4463
4464static const char *desc_lookup(int i)
4465{
4466 switch (i) {
4467 case 1:
4468 return "FAIL";
4469 case 2:
4470 return "BAD_PARAM";
4471 case 3:
4472 return "BAD_CHECKSUM";
4473 case 4:
4474 return "NMI_INTERRUPT";
4475 case 5:
4476 return "SYSASSERT";
4477 case 6:
4478 return "FATAL_ERROR";
4479 }
4480
4481 return "UNKNOWN";
4482}
4483
4484#define ERROR_START_OFFSET (1 * sizeof(u32))
4485#define ERROR_ELEM_SIZE (7 * sizeof(u32))
4486
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004487static void iwl3945_dump_nic_error_log(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004488{
4489 u32 i;
4490 u32 desc, time, count, base, data1;
4491 u32 blink1, blink2, ilink1, ilink2;
4492 int rc;
4493
4494 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4495
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004496 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
Zhu Yib481de92007-09-25 17:54:57 -07004497 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4498 return;
4499 }
4500
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004501 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004502 if (rc) {
4503 IWL_WARNING("Can not read from adapter at this time.\n");
4504 return;
4505 }
4506
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004507 count = iwl3945_read_targ_mem(priv, base);
Zhu Yib481de92007-09-25 17:54:57 -07004508
4509 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4510 IWL_ERROR("Start IWL Error Log Dump:\n");
4511 IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
4512 priv->status, priv->config, count);
4513 }
4514
4515 IWL_ERROR("Desc Time asrtPC blink2 "
4516 "ilink1 nmiPC Line\n");
4517 for (i = ERROR_START_OFFSET;
4518 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
4519 i += ERROR_ELEM_SIZE) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004520 desc = iwl3945_read_targ_mem(priv, base + i);
Zhu Yib481de92007-09-25 17:54:57 -07004521 time =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004522 iwl3945_read_targ_mem(priv, base + i + 1 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004523 blink1 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004524 iwl3945_read_targ_mem(priv, base + i + 2 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004525 blink2 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004526 iwl3945_read_targ_mem(priv, base + i + 3 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004527 ilink1 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004528 iwl3945_read_targ_mem(priv, base + i + 4 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004529 ilink2 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004530 iwl3945_read_targ_mem(priv, base + i + 5 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004531 data1 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004532 iwl3945_read_targ_mem(priv, base + i + 6 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004533
4534 IWL_ERROR
4535 ("%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
4536 desc_lookup(desc), desc, time, blink1, blink2,
4537 ilink1, ilink2, data1);
4538 }
4539
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004540 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004541
4542}
4543
Ben Cahillf58177b2007-11-29 11:09:43 +08004544#define EVENT_START_OFFSET (6 * sizeof(u32))
Zhu Yib481de92007-09-25 17:54:57 -07004545
4546/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004547 * iwl3945_print_event_log - Dump error event log to syslog
Zhu Yib481de92007-09-25 17:54:57 -07004548 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004549 * NOTE: Must be called with iwl3945_grab_nic_access() already obtained!
Zhu Yib481de92007-09-25 17:54:57 -07004550 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004551static void iwl3945_print_event_log(struct iwl3945_priv *priv, u32 start_idx,
Zhu Yib481de92007-09-25 17:54:57 -07004552 u32 num_events, u32 mode)
4553{
4554 u32 i;
4555 u32 base; /* SRAM byte address of event log header */
4556 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4557 u32 ptr; /* SRAM byte address of log data */
4558 u32 ev, time, data; /* event log data */
4559
4560 if (num_events == 0)
4561 return;
4562
4563 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4564
4565 if (mode == 0)
4566 event_size = 2 * sizeof(u32);
4567 else
4568 event_size = 3 * sizeof(u32);
4569
4570 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4571
4572 /* "time" is actually "data" for mode 0 (no timestamp).
4573 * place event id # at far right for easier visual parsing. */
4574 for (i = 0; i < num_events; i++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004575 ev = iwl3945_read_targ_mem(priv, ptr);
Zhu Yib481de92007-09-25 17:54:57 -07004576 ptr += sizeof(u32);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004577 time = iwl3945_read_targ_mem(priv, ptr);
Zhu Yib481de92007-09-25 17:54:57 -07004578 ptr += sizeof(u32);
4579 if (mode == 0)
4580 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4581 else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004582 data = iwl3945_read_targ_mem(priv, ptr);
Zhu Yib481de92007-09-25 17:54:57 -07004583 ptr += sizeof(u32);
4584 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4585 }
4586 }
4587}
4588
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004589static void iwl3945_dump_nic_event_log(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004590{
4591 int rc;
4592 u32 base; /* SRAM byte address of event log header */
4593 u32 capacity; /* event log capacity in # entries */
4594 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4595 u32 num_wraps; /* # times uCode wrapped to top of log */
4596 u32 next_entry; /* index of next entry to be written by uCode */
4597 u32 size; /* # entries that we'll print */
4598
4599 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004600 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
Zhu Yib481de92007-09-25 17:54:57 -07004601 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4602 return;
4603 }
4604
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004605 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004606 if (rc) {
4607 IWL_WARNING("Can not read from adapter at this time.\n");
4608 return;
4609 }
4610
4611 /* event log header */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004612 capacity = iwl3945_read_targ_mem(priv, base);
4613 mode = iwl3945_read_targ_mem(priv, base + (1 * sizeof(u32)));
4614 num_wraps = iwl3945_read_targ_mem(priv, base + (2 * sizeof(u32)));
4615 next_entry = iwl3945_read_targ_mem(priv, base + (3 * sizeof(u32)));
Zhu Yib481de92007-09-25 17:54:57 -07004616
4617 size = num_wraps ? capacity : next_entry;
4618
4619 /* bail out if nothing in log */
4620 if (size == 0) {
Zhu Yi583fab32007-09-27 11:27:30 +08004621 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004622 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004623 return;
4624 }
4625
Zhu Yi583fab32007-09-27 11:27:30 +08004626 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
Zhu Yib481de92007-09-25 17:54:57 -07004627 size, num_wraps);
4628
4629 /* if uCode has wrapped back to top of log, start at the oldest entry,
4630 * i.e the next one that uCode would fill. */
4631 if (num_wraps)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004632 iwl3945_print_event_log(priv, next_entry,
Zhu Yib481de92007-09-25 17:54:57 -07004633 capacity - next_entry, mode);
4634
4635 /* (then/else) start at top of log */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004636 iwl3945_print_event_log(priv, 0, next_entry, mode);
Zhu Yib481de92007-09-25 17:54:57 -07004637
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004638 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004639}
4640
4641/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004642 * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
Zhu Yib481de92007-09-25 17:54:57 -07004643 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004644static void iwl3945_irq_handle_error(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004645{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004646 /* Set the FW error flag -- cleared on iwl3945_down */
Zhu Yib481de92007-09-25 17:54:57 -07004647 set_bit(STATUS_FW_ERROR, &priv->status);
4648
4649 /* Cancel currently queued command. */
4650 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4651
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004652#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004653 if (iwl3945_debug_level & IWL_DL_FW_ERRORS) {
4654 iwl3945_dump_nic_error_log(priv);
4655 iwl3945_dump_nic_event_log(priv);
4656 iwl3945_print_rx_config_cmd(&priv->staging_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07004657 }
4658#endif
4659
4660 wake_up_interruptible(&priv->wait_command_queue);
4661
4662 /* Keep the restart process from trying to send host
4663 * commands by clearing the INIT status bit */
4664 clear_bit(STATUS_READY, &priv->status);
4665
4666 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4667 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4668 "Restarting adapter due to uCode error.\n");
4669
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004670 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07004671 memcpy(&priv->recovery_rxon, &priv->active_rxon,
4672 sizeof(priv->recovery_rxon));
4673 priv->error_recovering = 1;
4674 }
4675 queue_work(priv->workqueue, &priv->restart);
4676 }
4677}
4678
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004679static void iwl3945_error_recovery(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004680{
4681 unsigned long flags;
4682
4683 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
4684 sizeof(priv->staging_rxon));
4685 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004686 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004687
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004688 iwl3945_add_station(priv, priv->bssid, 1, 0);
Zhu Yib481de92007-09-25 17:54:57 -07004689
4690 spin_lock_irqsave(&priv->lock, flags);
4691 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
4692 priv->error_recovering = 0;
4693 spin_unlock_irqrestore(&priv->lock, flags);
4694}
4695
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004696static void iwl3945_irq_tasklet(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004697{
4698 u32 inta, handled = 0;
4699 u32 inta_fh;
4700 unsigned long flags;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004701#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07004702 u32 inta_mask;
4703#endif
4704
4705 spin_lock_irqsave(&priv->lock, flags);
4706
4707 /* Ack/clear/reset pending uCode interrupts.
4708 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4709 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004710 inta = iwl3945_read32(priv, CSR_INT);
4711 iwl3945_write32(priv, CSR_INT, inta);
Zhu Yib481de92007-09-25 17:54:57 -07004712
4713 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4714 * Any new interrupts that happen after this, either while we're
4715 * in this tasklet, or later, will show up in next ISR/tasklet. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004716 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4717 iwl3945_write32(priv, CSR_FH_INT_STATUS, inta_fh);
Zhu Yib481de92007-09-25 17:54:57 -07004718
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004719#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004720 if (iwl3945_debug_level & IWL_DL_ISR) {
Ben Cahill9fbab512007-11-29 11:09:47 +08004721 /* just for debug */
4722 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
Zhu Yib481de92007-09-25 17:54:57 -07004723 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4724 inta, inta_mask, inta_fh);
4725 }
4726#endif
4727
4728 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4729 * atomic, make sure that inta covers all the interrupts that
4730 * we've discovered, even if FH interrupt came in just after
4731 * reading CSR_INT. */
4732 if (inta_fh & CSR_FH_INT_RX_MASK)
4733 inta |= CSR_INT_BIT_FH_RX;
4734 if (inta_fh & CSR_FH_INT_TX_MASK)
4735 inta |= CSR_INT_BIT_FH_TX;
4736
4737 /* Now service all interrupt bits discovered above. */
4738 if (inta & CSR_INT_BIT_HW_ERR) {
4739 IWL_ERROR("Microcode HW error detected. Restarting.\n");
4740
4741 /* Tell the device to stop sending interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004742 iwl3945_disable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004743
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004744 iwl3945_irq_handle_error(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004745
4746 handled |= CSR_INT_BIT_HW_ERR;
4747
4748 spin_unlock_irqrestore(&priv->lock, flags);
4749
4750 return;
4751 }
4752
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004753#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004754 if (iwl3945_debug_level & (IWL_DL_ISR)) {
Zhu Yib481de92007-09-25 17:54:57 -07004755 /* NIC fires this, but we don't use it, redundant with WAKEUP */
Joonwoo Park25c03d82008-01-23 10:15:20 -08004756 if (inta & CSR_INT_BIT_SCD)
4757 IWL_DEBUG_ISR("Scheduler finished to transmit "
4758 "the frame/frames.\n");
Zhu Yib481de92007-09-25 17:54:57 -07004759
4760 /* Alive notification via Rx interrupt will do the real work */
4761 if (inta & CSR_INT_BIT_ALIVE)
4762 IWL_DEBUG_ISR("Alive interrupt\n");
4763 }
4764#endif
4765 /* Safely ignore these bits for debug checks below */
Joonwoo Park25c03d82008-01-23 10:15:20 -08004766 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
Zhu Yib481de92007-09-25 17:54:57 -07004767
4768 /* HW RF KILL switch toggled (4965 only) */
4769 if (inta & CSR_INT_BIT_RF_KILL) {
4770 int hw_rf_kill = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004771 if (!(iwl3945_read32(priv, CSR_GP_CNTRL) &
Zhu Yib481de92007-09-25 17:54:57 -07004772 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4773 hw_rf_kill = 1;
4774
4775 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
4776 "RF_KILL bit toggled to %s.\n",
4777 hw_rf_kill ? "disable radio":"enable radio");
4778
4779 /* Queue restart only if RF_KILL switch was set to "kill"
4780 * when we loaded driver, and is now set to "enable".
4781 * After we're Alive, RF_KILL gets handled by
4782 * iwl_rx_card_state_notif() */
Zhu Yi53e49092007-12-06 16:08:44 +08004783 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
4784 clear_bit(STATUS_RF_KILL_HW, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -07004785 queue_work(priv->workqueue, &priv->restart);
Zhu Yi53e49092007-12-06 16:08:44 +08004786 }
Zhu Yib481de92007-09-25 17:54:57 -07004787
4788 handled |= CSR_INT_BIT_RF_KILL;
4789 }
4790
4791 /* Chip got too hot and stopped itself (4965 only) */
4792 if (inta & CSR_INT_BIT_CT_KILL) {
4793 IWL_ERROR("Microcode CT kill error detected.\n");
4794 handled |= CSR_INT_BIT_CT_KILL;
4795 }
4796
4797 /* Error detected by uCode */
4798 if (inta & CSR_INT_BIT_SW_ERR) {
4799 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
4800 inta);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004801 iwl3945_irq_handle_error(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004802 handled |= CSR_INT_BIT_SW_ERR;
4803 }
4804
4805 /* uCode wakes up after power-down sleep */
4806 if (inta & CSR_INT_BIT_WAKEUP) {
4807 IWL_DEBUG_ISR("Wakeup interrupt\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004808 iwl3945_rx_queue_update_write_ptr(priv, &priv->rxq);
4809 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[0]);
4810 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[1]);
4811 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[2]);
4812 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[3]);
4813 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[4]);
4814 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[5]);
Zhu Yib481de92007-09-25 17:54:57 -07004815
4816 handled |= CSR_INT_BIT_WAKEUP;
4817 }
4818
4819 /* All uCode command responses, including Tx command responses,
4820 * Rx "responses" (frame-received notification), and other
4821 * notifications from uCode come through here*/
4822 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004823 iwl3945_rx_handle(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004824 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4825 }
4826
4827 if (inta & CSR_INT_BIT_FH_TX) {
4828 IWL_DEBUG_ISR("Tx interrupt\n");
4829
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004830 iwl3945_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
4831 if (!iwl3945_grab_nic_access(priv)) {
4832 iwl3945_write_direct32(priv,
Zhu Yib481de92007-09-25 17:54:57 -07004833 FH_TCSR_CREDIT
4834 (ALM_FH_SRVC_CHNL), 0x0);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004835 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004836 }
4837 handled |= CSR_INT_BIT_FH_TX;
4838 }
4839
4840 if (inta & ~handled)
4841 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4842
4843 if (inta & ~CSR_INI_SET_MASK) {
4844 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
4845 inta & ~CSR_INI_SET_MASK);
4846 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
4847 }
4848
4849 /* Re-enable all interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004850 iwl3945_enable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004851
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004852#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004853 if (iwl3945_debug_level & (IWL_DL_ISR)) {
4854 inta = iwl3945_read32(priv, CSR_INT);
4855 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
4856 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
Zhu Yib481de92007-09-25 17:54:57 -07004857 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4858 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4859 }
4860#endif
4861 spin_unlock_irqrestore(&priv->lock, flags);
4862}
4863
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004864static irqreturn_t iwl3945_isr(int irq, void *data)
Zhu Yib481de92007-09-25 17:54:57 -07004865{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004866 struct iwl3945_priv *priv = data;
Zhu Yib481de92007-09-25 17:54:57 -07004867 u32 inta, inta_mask;
4868 u32 inta_fh;
4869 if (!priv)
4870 return IRQ_NONE;
4871
4872 spin_lock(&priv->lock);
4873
4874 /* Disable (but don't clear!) interrupts here to avoid
4875 * back-to-back ISRs and sporadic interrupts from our NIC.
4876 * If we have something to service, the tasklet will re-enable ints.
4877 * If we *don't* have something, we'll re-enable before leaving here. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004878 inta_mask = iwl3945_read32(priv, CSR_INT_MASK); /* just for debug */
4879 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
Zhu Yib481de92007-09-25 17:54:57 -07004880
4881 /* Discover which interrupts are active/pending */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004882 inta = iwl3945_read32(priv, CSR_INT);
4883 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
Zhu Yib481de92007-09-25 17:54:57 -07004884
4885 /* Ignore interrupt if there's nothing in NIC to service.
4886 * This may be due to IRQ shared with another device,
4887 * or due to sporadic interrupts thrown from our NIC. */
4888 if (!inta && !inta_fh) {
4889 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4890 goto none;
4891 }
4892
4893 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
4894 /* Hardware disappeared */
4895 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
Oliver Neukumcb4da1a2007-11-13 21:10:32 -08004896 goto unplugged;
Zhu Yib481de92007-09-25 17:54:57 -07004897 }
4898
4899 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4900 inta, inta_mask, inta_fh);
4901
Joonwoo Park25c03d82008-01-23 10:15:20 -08004902 inta &= ~CSR_INT_BIT_SCD;
4903
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004904 /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
Joonwoo Park25c03d82008-01-23 10:15:20 -08004905 if (likely(inta || inta_fh))
4906 tasklet_schedule(&priv->irq_tasklet);
Oliver Neukumcb4da1a2007-11-13 21:10:32 -08004907unplugged:
Zhu Yib481de92007-09-25 17:54:57 -07004908 spin_unlock(&priv->lock);
4909
4910 return IRQ_HANDLED;
4911
4912 none:
4913 /* re-enable interrupts here since we don't have anything to service. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004914 iwl3945_enable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004915 spin_unlock(&priv->lock);
4916 return IRQ_NONE;
4917}
4918
4919/************************** EEPROM BANDS ****************************
4920 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004921 * The iwl3945_eeprom_band definitions below provide the mapping from the
Zhu Yib481de92007-09-25 17:54:57 -07004922 * EEPROM contents to the specific channel number supported for each
4923 * band.
4924 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004925 * For example, iwl3945_priv->eeprom.band_3_channels[4] from the band_3
Zhu Yib481de92007-09-25 17:54:57 -07004926 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
4927 * The specific geography and calibration information for that channel
4928 * is contained in the eeprom map itself.
4929 *
4930 * During init, we copy the eeprom information and channel map
4931 * information into priv->channel_info_24/52 and priv->channel_map_24/52
4932 *
4933 * channel_map_24/52 provides the index in the channel_info array for a
4934 * given channel. We have to have two separate maps as there is channel
4935 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
4936 * band_2
4937 *
4938 * A value of 0xff stored in the channel_map indicates that the channel
4939 * is not supported by the hardware at all.
4940 *
4941 * A value of 0xfe in the channel_map indicates that the channel is not
4942 * valid for Tx with the current hardware. This means that
4943 * while the system can tune and receive on a given channel, it may not
4944 * be able to associate or transmit any frames on that
4945 * channel. There is no corresponding channel information for that
4946 * entry.
4947 *
4948 *********************************************************************/
4949
4950/* 2.4 GHz */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004951static const u8 iwl3945_eeprom_band_1[14] = {
Zhu Yib481de92007-09-25 17:54:57 -07004952 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
4953};
4954
4955/* 5.2 GHz bands */
Ben Cahill9fbab512007-11-29 11:09:47 +08004956static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
Zhu Yib481de92007-09-25 17:54:57 -07004957 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
4958};
4959
Ben Cahill9fbab512007-11-29 11:09:47 +08004960static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
Zhu Yib481de92007-09-25 17:54:57 -07004961 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
4962};
4963
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004964static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
Zhu Yib481de92007-09-25 17:54:57 -07004965 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
4966};
4967
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004968static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
Zhu Yib481de92007-09-25 17:54:57 -07004969 145, 149, 153, 157, 161, 165
4970};
4971
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004972static void iwl3945_init_band_reference(const struct iwl3945_priv *priv, int band,
Zhu Yib481de92007-09-25 17:54:57 -07004973 int *eeprom_ch_count,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004974 const struct iwl3945_eeprom_channel
Zhu Yib481de92007-09-25 17:54:57 -07004975 **eeprom_ch_info,
4976 const u8 **eeprom_ch_index)
4977{
4978 switch (band) {
4979 case 1: /* 2.4GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004980 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
Zhu Yib481de92007-09-25 17:54:57 -07004981 *eeprom_ch_info = priv->eeprom.band_1_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004982 *eeprom_ch_index = iwl3945_eeprom_band_1;
Zhu Yib481de92007-09-25 17:54:57 -07004983 break;
Ben Cahill9fbab512007-11-29 11:09:47 +08004984 case 2: /* 4.9GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004985 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
Zhu Yib481de92007-09-25 17:54:57 -07004986 *eeprom_ch_info = priv->eeprom.band_2_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004987 *eeprom_ch_index = iwl3945_eeprom_band_2;
Zhu Yib481de92007-09-25 17:54:57 -07004988 break;
4989 case 3: /* 5.2GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004990 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
Zhu Yib481de92007-09-25 17:54:57 -07004991 *eeprom_ch_info = priv->eeprom.band_3_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004992 *eeprom_ch_index = iwl3945_eeprom_band_3;
Zhu Yib481de92007-09-25 17:54:57 -07004993 break;
Ben Cahill9fbab512007-11-29 11:09:47 +08004994 case 4: /* 5.5GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004995 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
Zhu Yib481de92007-09-25 17:54:57 -07004996 *eeprom_ch_info = priv->eeprom.band_4_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004997 *eeprom_ch_index = iwl3945_eeprom_band_4;
Zhu Yib481de92007-09-25 17:54:57 -07004998 break;
Ben Cahill9fbab512007-11-29 11:09:47 +08004999 case 5: /* 5.7GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005000 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
Zhu Yib481de92007-09-25 17:54:57 -07005001 *eeprom_ch_info = priv->eeprom.band_5_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005002 *eeprom_ch_index = iwl3945_eeprom_band_5;
Zhu Yib481de92007-09-25 17:54:57 -07005003 break;
5004 default:
5005 BUG();
5006 return;
5007 }
5008}
5009
Cahill, Ben M6440adb2007-11-29 11:09:55 +08005010/**
5011 * iwl3945_get_channel_info - Find driver's private channel info
5012 *
5013 * Based on band and channel number.
5014 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005015const struct iwl3945_channel_info *iwl3945_get_channel_info(const struct iwl3945_priv *priv,
Johannes Berg8318d782008-01-24 19:38:38 +01005016 enum ieee80211_band band, u16 channel)
Zhu Yib481de92007-09-25 17:54:57 -07005017{
5018 int i;
5019
Johannes Berg8318d782008-01-24 19:38:38 +01005020 switch (band) {
5021 case IEEE80211_BAND_5GHZ:
Zhu Yib481de92007-09-25 17:54:57 -07005022 for (i = 14; i < priv->channel_count; i++) {
5023 if (priv->channel_info[i].channel == channel)
5024 return &priv->channel_info[i];
5025 }
5026 break;
5027
Johannes Berg8318d782008-01-24 19:38:38 +01005028 case IEEE80211_BAND_2GHZ:
Zhu Yib481de92007-09-25 17:54:57 -07005029 if (channel >= 1 && channel <= 14)
5030 return &priv->channel_info[channel - 1];
5031 break;
Johannes Berg8318d782008-01-24 19:38:38 +01005032 case IEEE80211_NUM_BANDS:
5033 WARN_ON(1);
Zhu Yib481de92007-09-25 17:54:57 -07005034 }
5035
5036 return NULL;
5037}
5038
5039#define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
5040 ? # x " " : "")
5041
Cahill, Ben M6440adb2007-11-29 11:09:55 +08005042/**
5043 * iwl3945_init_channel_map - Set up driver's info for all possible channels
5044 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005045static int iwl3945_init_channel_map(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005046{
5047 int eeprom_ch_count = 0;
5048 const u8 *eeprom_ch_index = NULL;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005049 const struct iwl3945_eeprom_channel *eeprom_ch_info = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07005050 int band, ch;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005051 struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07005052
5053 if (priv->channel_count) {
5054 IWL_DEBUG_INFO("Channel map already initialized.\n");
5055 return 0;
5056 }
5057
5058 if (priv->eeprom.version < 0x2f) {
5059 IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
5060 priv->eeprom.version);
5061 return -EINVAL;
5062 }
5063
5064 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
5065
5066 priv->channel_count =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005067 ARRAY_SIZE(iwl3945_eeprom_band_1) +
5068 ARRAY_SIZE(iwl3945_eeprom_band_2) +
5069 ARRAY_SIZE(iwl3945_eeprom_band_3) +
5070 ARRAY_SIZE(iwl3945_eeprom_band_4) +
5071 ARRAY_SIZE(iwl3945_eeprom_band_5);
Zhu Yib481de92007-09-25 17:54:57 -07005072
5073 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
5074
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005075 priv->channel_info = kzalloc(sizeof(struct iwl3945_channel_info) *
Zhu Yib481de92007-09-25 17:54:57 -07005076 priv->channel_count, GFP_KERNEL);
5077 if (!priv->channel_info) {
5078 IWL_ERROR("Could not allocate channel_info\n");
5079 priv->channel_count = 0;
5080 return -ENOMEM;
5081 }
5082
5083 ch_info = priv->channel_info;
5084
5085 /* Loop through the 5 EEPROM bands adding them in order to the
5086 * channel map we maintain (that contains additional information than
5087 * what just in the EEPROM) */
5088 for (band = 1; band <= 5; band++) {
5089
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005090 iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
Zhu Yib481de92007-09-25 17:54:57 -07005091 &eeprom_ch_info, &eeprom_ch_index);
5092
5093 /* Loop through each band adding each of the channels */
5094 for (ch = 0; ch < eeprom_ch_count; ch++) {
5095 ch_info->channel = eeprom_ch_index[ch];
Johannes Berg8318d782008-01-24 19:38:38 +01005096 ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
5097 IEEE80211_BAND_5GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07005098
5099 /* permanently store EEPROM's channel regulatory flags
5100 * and max power in channel info database. */
5101 ch_info->eeprom = eeprom_ch_info[ch];
5102
5103 /* Copy the run-time flags so they are there even on
5104 * invalid channels */
5105 ch_info->flags = eeprom_ch_info[ch].flags;
5106
5107 if (!(is_channel_valid(ch_info))) {
5108 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
5109 "No traffic\n",
5110 ch_info->channel,
5111 ch_info->flags,
5112 is_channel_a_band(ch_info) ?
5113 "5.2" : "2.4");
5114 ch_info++;
5115 continue;
5116 }
5117
5118 /* Initialize regulatory-based run-time data */
5119 ch_info->max_power_avg = ch_info->curr_txpow =
5120 eeprom_ch_info[ch].max_power_avg;
5121 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
5122 ch_info->min_power = 0;
5123
5124 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
5125 " %ddBm): Ad-Hoc %ssupported\n",
5126 ch_info->channel,
5127 is_channel_a_band(ch_info) ?
5128 "5.2" : "2.4",
5129 CHECK_AND_PRINT(IBSS),
5130 CHECK_AND_PRINT(ACTIVE),
5131 CHECK_AND_PRINT(RADAR),
5132 CHECK_AND_PRINT(WIDE),
5133 CHECK_AND_PRINT(NARROW),
5134 CHECK_AND_PRINT(DFS),
5135 eeprom_ch_info[ch].flags,
5136 eeprom_ch_info[ch].max_power_avg,
5137 ((eeprom_ch_info[ch].
5138 flags & EEPROM_CHANNEL_IBSS)
5139 && !(eeprom_ch_info[ch].
5140 flags & EEPROM_CHANNEL_RADAR))
5141 ? "" : "not ");
5142
5143 /* Set the user_txpower_limit to the highest power
5144 * supported by any channel */
5145 if (eeprom_ch_info[ch].max_power_avg >
5146 priv->user_txpower_limit)
5147 priv->user_txpower_limit =
5148 eeprom_ch_info[ch].max_power_avg;
5149
5150 ch_info++;
5151 }
5152 }
5153
Cahill, Ben M6440adb2007-11-29 11:09:55 +08005154 /* Set up txpower settings in driver for all channels */
Zhu Yib481de92007-09-25 17:54:57 -07005155 if (iwl3945_txpower_set_from_eeprom(priv))
5156 return -EIO;
5157
5158 return 0;
5159}
5160
Reinette Chatre849e0dc2008-01-23 10:15:18 -08005161/*
5162 * iwl3945_free_channel_map - undo allocations in iwl3945_init_channel_map
5163 */
5164static void iwl3945_free_channel_map(struct iwl3945_priv *priv)
5165{
5166 kfree(priv->channel_info);
5167 priv->channel_count = 0;
5168}
5169
Zhu Yib481de92007-09-25 17:54:57 -07005170/* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
5171 * sending probe req. This should be set long enough to hear probe responses
5172 * from more than one AP. */
5173#define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
5174#define IWL_ACTIVE_DWELL_TIME_52 (10)
5175
5176/* For faster active scanning, scan will move to the next channel if fewer than
5177 * PLCP_QUIET_THRESH packets are heard on this channel within
5178 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
5179 * time if it's a quiet channel (nothing responded to our probe, and there's
5180 * no other traffic).
5181 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
5182#define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
5183#define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
5184
5185/* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
5186 * Must be set longer than active dwell time.
5187 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
5188#define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
5189#define IWL_PASSIVE_DWELL_TIME_52 (10)
5190#define IWL_PASSIVE_DWELL_BASE (100)
5191#define IWL_CHANNEL_TUNE_TIME 5
5192
Johannes Berg8318d782008-01-24 19:38:38 +01005193static inline u16 iwl3945_get_active_dwell_time(struct iwl3945_priv *priv,
5194 enum ieee80211_band band)
Zhu Yib481de92007-09-25 17:54:57 -07005195{
Johannes Berg8318d782008-01-24 19:38:38 +01005196 if (band == IEEE80211_BAND_5GHZ)
Zhu Yib481de92007-09-25 17:54:57 -07005197 return IWL_ACTIVE_DWELL_TIME_52;
5198 else
5199 return IWL_ACTIVE_DWELL_TIME_24;
5200}
5201
Johannes Berg8318d782008-01-24 19:38:38 +01005202static u16 iwl3945_get_passive_dwell_time(struct iwl3945_priv *priv,
5203 enum ieee80211_band band)
Zhu Yib481de92007-09-25 17:54:57 -07005204{
Johannes Berg8318d782008-01-24 19:38:38 +01005205 u16 active = iwl3945_get_active_dwell_time(priv, band);
5206 u16 passive = (band == IEEE80211_BAND_2GHZ) ?
Zhu Yib481de92007-09-25 17:54:57 -07005207 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
5208 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
5209
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005210 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07005211 /* If we're associated, we clamp the maximum passive
5212 * dwell time to be 98% of the beacon interval (minus
5213 * 2 * channel tune time) */
5214 passive = priv->beacon_int;
5215 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
5216 passive = IWL_PASSIVE_DWELL_BASE;
5217 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
5218 }
5219
5220 if (passive <= active)
5221 passive = active + 1;
5222
5223 return passive;
5224}
5225
Johannes Berg8318d782008-01-24 19:38:38 +01005226static int iwl3945_get_channels_for_scan(struct iwl3945_priv *priv,
5227 enum ieee80211_band band,
Zhu Yib481de92007-09-25 17:54:57 -07005228 u8 is_active, u8 direct_mask,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005229 struct iwl3945_scan_channel *scan_ch)
Zhu Yib481de92007-09-25 17:54:57 -07005230{
5231 const struct ieee80211_channel *channels = NULL;
Johannes Berg8318d782008-01-24 19:38:38 +01005232 const struct ieee80211_supported_band *sband;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005233 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07005234 u16 passive_dwell = 0;
5235 u16 active_dwell = 0;
5236 int added, i;
5237
Johannes Berg8318d782008-01-24 19:38:38 +01005238 sband = iwl3945_get_band(priv, band);
5239 if (!sband)
Zhu Yib481de92007-09-25 17:54:57 -07005240 return 0;
5241
Johannes Berg8318d782008-01-24 19:38:38 +01005242 channels = sband->channels;
Zhu Yib481de92007-09-25 17:54:57 -07005243
Johannes Berg8318d782008-01-24 19:38:38 +01005244 active_dwell = iwl3945_get_active_dwell_time(priv, band);
5245 passive_dwell = iwl3945_get_passive_dwell_time(priv, band);
Zhu Yib481de92007-09-25 17:54:57 -07005246
Johannes Berg8318d782008-01-24 19:38:38 +01005247 for (i = 0, added = 0; i < sband->n_channels; i++) {
5248 if (channels[i].hw_value ==
Zhu Yib481de92007-09-25 17:54:57 -07005249 le16_to_cpu(priv->active_rxon.channel)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005250 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07005251 IWL_DEBUG_SCAN
5252 ("Skipping current channel %d\n",
5253 le16_to_cpu(priv->active_rxon.channel));
5254 continue;
5255 }
5256 } else if (priv->only_active_channel)
5257 continue;
5258
Johannes Berg8318d782008-01-24 19:38:38 +01005259 scan_ch->channel = channels[i].hw_value;
Zhu Yib481de92007-09-25 17:54:57 -07005260
Johannes Berg8318d782008-01-24 19:38:38 +01005261 ch_info = iwl3945_get_channel_info(priv, band, scan_ch->channel);
Zhu Yib481de92007-09-25 17:54:57 -07005262 if (!is_channel_valid(ch_info)) {
5263 IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
5264 scan_ch->channel);
5265 continue;
5266 }
5267
5268 if (!is_active || is_channel_passive(ch_info) ||
Johannes Berg8318d782008-01-24 19:38:38 +01005269 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
Zhu Yib481de92007-09-25 17:54:57 -07005270 scan_ch->type = 0; /* passive */
5271 else
5272 scan_ch->type = 1; /* active */
5273
5274 if (scan_ch->type & 1)
5275 scan_ch->type |= (direct_mask << 1);
5276
5277 if (is_channel_narrow(ch_info))
5278 scan_ch->type |= (1 << 7);
5279
5280 scan_ch->active_dwell = cpu_to_le16(active_dwell);
5281 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
5282
Ben Cahill9fbab512007-11-29 11:09:47 +08005283 /* Set txpower levels to defaults */
Zhu Yib481de92007-09-25 17:54:57 -07005284 scan_ch->tpc.dsp_atten = 110;
5285 /* scan_pwr_info->tpc.dsp_atten; */
5286
5287 /*scan_pwr_info->tpc.tx_gain; */
Johannes Berg8318d782008-01-24 19:38:38 +01005288 if (band == IEEE80211_BAND_5GHZ)
Zhu Yib481de92007-09-25 17:54:57 -07005289 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
5290 else {
5291 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
5292 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
Ben Cahill9fbab512007-11-29 11:09:47 +08005293 * power level:
Reinette Chatre8a1b0242008-01-14 17:46:25 -08005294 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
Zhu Yib481de92007-09-25 17:54:57 -07005295 */
5296 }
5297
5298 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
5299 scan_ch->channel,
5300 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
5301 (scan_ch->type & 1) ?
5302 active_dwell : passive_dwell);
5303
5304 scan_ch++;
5305 added++;
5306 }
5307
5308 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
5309 return added;
5310}
5311
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005312static void iwl3945_init_hw_rates(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07005313 struct ieee80211_rate *rates)
5314{
5315 int i;
5316
5317 for (i = 0; i < IWL_RATE_COUNT; i++) {
Johannes Berg8318d782008-01-24 19:38:38 +01005318 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
5319 rates[i].hw_value = i; /* Rate scaling will work on indexes */
5320 rates[i].hw_value_short = i;
5321 rates[i].flags = 0;
5322 if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
Zhu Yib481de92007-09-25 17:54:57 -07005323 /*
Johannes Berg8318d782008-01-24 19:38:38 +01005324 * If CCK != 1M then set short preamble rate flag.
Zhu Yib481de92007-09-25 17:54:57 -07005325 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005326 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
Johannes Berg8318d782008-01-24 19:38:38 +01005327 0 : IEEE80211_RATE_SHORT_PREAMBLE;
Zhu Yib481de92007-09-25 17:54:57 -07005328 }
Zhu Yib481de92007-09-25 17:54:57 -07005329 }
5330}
5331
5332/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005333 * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
Zhu Yib481de92007-09-25 17:54:57 -07005334 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005335static int iwl3945_init_geos(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005336{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005337 struct iwl3945_channel_info *ch;
Johannes Berg8318d782008-01-24 19:38:38 +01005338 struct ieee80211_supported_band *band;
Zhu Yib481de92007-09-25 17:54:57 -07005339 struct ieee80211_channel *channels;
5340 struct ieee80211_channel *geo_ch;
5341 struct ieee80211_rate *rates;
5342 int i = 0;
Zhu Yib481de92007-09-25 17:54:57 -07005343
Johannes Berg8318d782008-01-24 19:38:38 +01005344 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
5345 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
Zhu Yib481de92007-09-25 17:54:57 -07005346 IWL_DEBUG_INFO("Geography modes already initialized.\n");
5347 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5348 return 0;
5349 }
5350
Zhu Yib481de92007-09-25 17:54:57 -07005351 channels = kzalloc(sizeof(struct ieee80211_channel) *
5352 priv->channel_count, GFP_KERNEL);
Johannes Berg8318d782008-01-24 19:38:38 +01005353 if (!channels)
Zhu Yib481de92007-09-25 17:54:57 -07005354 return -ENOMEM;
Zhu Yib481de92007-09-25 17:54:57 -07005355
5356 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
5357 GFP_KERNEL);
5358 if (!rates) {
Zhu Yib481de92007-09-25 17:54:57 -07005359 kfree(channels);
5360 return -ENOMEM;
5361 }
5362
Zhu Yib481de92007-09-25 17:54:57 -07005363 /* 5.2GHz channels start after the 2.4GHz channels */
Johannes Berg8318d782008-01-24 19:38:38 +01005364 band = &priv->bands[IEEE80211_BAND_5GHZ];
5365 band->channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
5366 band->bitrates = &rates[4];
5367 band->n_bitrates = 8; /* just OFDM */
Zhu Yib481de92007-09-25 17:54:57 -07005368
Johannes Berg8318d782008-01-24 19:38:38 +01005369 band = &priv->bands[IEEE80211_BAND_2GHZ];
5370 band->channels = channels;
5371 band->bitrates = rates;
5372 band->n_bitrates = 12; /* OFDM & CCK */
Zhu Yib481de92007-09-25 17:54:57 -07005373
5374 priv->ieee_channels = channels;
5375 priv->ieee_rates = rates;
5376
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005377 iwl3945_init_hw_rates(priv, rates);
Zhu Yib481de92007-09-25 17:54:57 -07005378
5379 for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
5380 ch = &priv->channel_info[i];
5381
5382 if (!is_channel_valid(ch)) {
5383 IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
5384 "skipping.\n",
5385 ch->channel, is_channel_a_band(ch) ?
5386 "5.2" : "2.4");
5387 continue;
5388 }
5389
5390 if (is_channel_a_band(ch))
Johannes Berg8318d782008-01-24 19:38:38 +01005391 geo_ch = &priv->bands[IEEE80211_BAND_5GHZ].channels[priv->bands[IEEE80211_BAND_5GHZ].n_channels++];
5392 else
5393 geo_ch = &priv->bands[IEEE80211_BAND_2GHZ].channels[priv->bands[IEEE80211_BAND_2GHZ].n_channels++];
Zhu Yib481de92007-09-25 17:54:57 -07005394
Johannes Berg8318d782008-01-24 19:38:38 +01005395 geo_ch->center_freq = ieee80211chan2mhz(ch->channel);
5396 geo_ch->max_power = ch->max_power_avg;
5397 geo_ch->max_antenna_gain = 0xff;
Zhu Yib481de92007-09-25 17:54:57 -07005398
5399 if (is_channel_valid(ch)) {
Johannes Berg8318d782008-01-24 19:38:38 +01005400 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
5401 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
Zhu Yib481de92007-09-25 17:54:57 -07005402
Johannes Berg8318d782008-01-24 19:38:38 +01005403 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
5404 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
Zhu Yib481de92007-09-25 17:54:57 -07005405
5406 if (ch->flags & EEPROM_CHANNEL_RADAR)
Johannes Berg8318d782008-01-24 19:38:38 +01005407 geo_ch->flags |= IEEE80211_CHAN_RADAR;
Zhu Yib481de92007-09-25 17:54:57 -07005408
5409 if (ch->max_power_avg > priv->max_channel_txpower_limit)
5410 priv->max_channel_txpower_limit =
5411 ch->max_power_avg;
Johannes Berg8318d782008-01-24 19:38:38 +01005412 } else
5413 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
Zhu Yib481de92007-09-25 17:54:57 -07005414 }
5415
Johannes Berg8318d782008-01-24 19:38:38 +01005416 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) && priv->is_abg) {
Zhu Yib481de92007-09-25 17:54:57 -07005417 printk(KERN_INFO DRV_NAME
5418 ": Incorrectly detected BG card as ABG. Please send "
5419 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
5420 priv->pci_dev->device, priv->pci_dev->subsystem_device);
5421 priv->is_abg = 0;
5422 }
5423
5424 printk(KERN_INFO DRV_NAME
5425 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
Johannes Berg8318d782008-01-24 19:38:38 +01005426 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
5427 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
Zhu Yib481de92007-09-25 17:54:57 -07005428
Johannes Berg8318d782008-01-24 19:38:38 +01005429 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->bands[IEEE80211_BAND_2GHZ];
5430 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->bands[IEEE80211_BAND_5GHZ];
Zhu Yib481de92007-09-25 17:54:57 -07005431
Zhu Yib481de92007-09-25 17:54:57 -07005432 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5433
5434 return 0;
5435}
5436
Reinette Chatre849e0dc2008-01-23 10:15:18 -08005437/*
5438 * iwl3945_free_geos - undo allocations in iwl3945_init_geos
5439 */
5440static void iwl3945_free_geos(struct iwl3945_priv *priv)
5441{
Reinette Chatre849e0dc2008-01-23 10:15:18 -08005442 kfree(priv->ieee_channels);
5443 kfree(priv->ieee_rates);
5444 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
5445}
5446
Zhu Yib481de92007-09-25 17:54:57 -07005447/******************************************************************************
5448 *
5449 * uCode download functions
5450 *
5451 ******************************************************************************/
5452
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005453static void iwl3945_dealloc_ucode_pci(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005454{
Tomas Winkler98c92212008-01-14 17:46:20 -08005455 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
5456 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
5457 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5458 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
5459 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5460 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
Zhu Yib481de92007-09-25 17:54:57 -07005461}
5462
5463/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005464 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
Zhu Yib481de92007-09-25 17:54:57 -07005465 * looking at all data.
5466 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005467static int iwl3945_verify_inst_full(struct iwl3945_priv *priv, __le32 * image, u32 len)
Zhu Yib481de92007-09-25 17:54:57 -07005468{
5469 u32 val;
5470 u32 save_len = len;
5471 int rc = 0;
5472 u32 errcnt;
5473
5474 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5475
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005476 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005477 if (rc)
5478 return rc;
5479
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005480 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
Zhu Yib481de92007-09-25 17:54:57 -07005481
5482 errcnt = 0;
5483 for (; len > 0; len -= sizeof(u32), image++) {
5484 /* read data comes through single port, auto-incr addr */
5485 /* NOTE: Use the debugless read so we don't flood kernel log
5486 * if IWL_DL_IO is set */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005487 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
Zhu Yib481de92007-09-25 17:54:57 -07005488 if (val != le32_to_cpu(*image)) {
5489 IWL_ERROR("uCode INST section is invalid at "
5490 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5491 save_len - len, val, le32_to_cpu(*image));
5492 rc = -EIO;
5493 errcnt++;
5494 if (errcnt >= 20)
5495 break;
5496 }
5497 }
5498
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005499 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005500
5501 if (!errcnt)
Ian Schrambc434dd2007-10-25 17:15:29 +08005502 IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
Zhu Yib481de92007-09-25 17:54:57 -07005503
5504 return rc;
5505}
5506
5507
5508/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005509 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
Zhu Yib481de92007-09-25 17:54:57 -07005510 * using sample data 100 bytes apart. If these sample points are good,
5511 * it's a pretty good bet that everything between them is good, too.
5512 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005513static int iwl3945_verify_inst_sparse(struct iwl3945_priv *priv, __le32 *image, u32 len)
Zhu Yib481de92007-09-25 17:54:57 -07005514{
5515 u32 val;
5516 int rc = 0;
5517 u32 errcnt = 0;
5518 u32 i;
5519
5520 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5521
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005522 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005523 if (rc)
5524 return rc;
5525
5526 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
5527 /* read data comes through single port, auto-incr addr */
5528 /* NOTE: Use the debugless read so we don't flood kernel log
5529 * if IWL_DL_IO is set */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005530 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR,
Zhu Yib481de92007-09-25 17:54:57 -07005531 i + RTC_INST_LOWER_BOUND);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005532 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
Zhu Yib481de92007-09-25 17:54:57 -07005533 if (val != le32_to_cpu(*image)) {
5534#if 0 /* Enable this if you want to see details */
5535 IWL_ERROR("uCode INST section is invalid at "
5536 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5537 i, val, *image);
5538#endif
5539 rc = -EIO;
5540 errcnt++;
5541 if (errcnt >= 3)
5542 break;
5543 }
5544 }
5545
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005546 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005547
5548 return rc;
5549}
5550
5551
5552/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005553 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
Zhu Yib481de92007-09-25 17:54:57 -07005554 * and verify its contents
5555 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005556static int iwl3945_verify_ucode(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005557{
5558 __le32 *image;
5559 u32 len;
5560 int rc = 0;
5561
5562 /* Try bootstrap */
5563 image = (__le32 *)priv->ucode_boot.v_addr;
5564 len = priv->ucode_boot.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005565 rc = iwl3945_verify_inst_sparse(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005566 if (rc == 0) {
5567 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
5568 return 0;
5569 }
5570
5571 /* Try initialize */
5572 image = (__le32 *)priv->ucode_init.v_addr;
5573 len = priv->ucode_init.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005574 rc = iwl3945_verify_inst_sparse(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005575 if (rc == 0) {
5576 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
5577 return 0;
5578 }
5579
5580 /* Try runtime/protocol */
5581 image = (__le32 *)priv->ucode_code.v_addr;
5582 len = priv->ucode_code.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005583 rc = iwl3945_verify_inst_sparse(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005584 if (rc == 0) {
5585 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
5586 return 0;
5587 }
5588
5589 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
5590
Ben Cahill9fbab512007-11-29 11:09:47 +08005591 /* Since nothing seems to match, show first several data entries in
5592 * instruction SRAM, so maybe visual inspection will give a clue.
5593 * Selection of bootstrap image (vs. other images) is arbitrary. */
Zhu Yib481de92007-09-25 17:54:57 -07005594 image = (__le32 *)priv->ucode_boot.v_addr;
5595 len = priv->ucode_boot.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005596 rc = iwl3945_verify_inst_full(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005597
5598 return rc;
5599}
5600
5601
5602/* check contents of special bootstrap uCode SRAM */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005603static int iwl3945_verify_bsm(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005604{
5605 __le32 *image = priv->ucode_boot.v_addr;
5606 u32 len = priv->ucode_boot.len;
5607 u32 reg;
5608 u32 val;
5609
5610 IWL_DEBUG_INFO("Begin verify bsm\n");
5611
5612 /* verify BSM SRAM contents */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005613 val = iwl3945_read_prph(priv, BSM_WR_DWCOUNT_REG);
Zhu Yib481de92007-09-25 17:54:57 -07005614 for (reg = BSM_SRAM_LOWER_BOUND;
5615 reg < BSM_SRAM_LOWER_BOUND + len;
5616 reg += sizeof(u32), image ++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005617 val = iwl3945_read_prph(priv, reg);
Zhu Yib481de92007-09-25 17:54:57 -07005618 if (val != le32_to_cpu(*image)) {
5619 IWL_ERROR("BSM uCode verification failed at "
5620 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
5621 BSM_SRAM_LOWER_BOUND,
5622 reg - BSM_SRAM_LOWER_BOUND, len,
5623 val, le32_to_cpu(*image));
5624 return -EIO;
5625 }
5626 }
5627
5628 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
5629
5630 return 0;
5631}
5632
5633/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005634 * iwl3945_load_bsm - Load bootstrap instructions
Zhu Yib481de92007-09-25 17:54:57 -07005635 *
5636 * BSM operation:
5637 *
5638 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
5639 * in special SRAM that does not power down during RFKILL. When powering back
5640 * up after power-saving sleeps (or during initial uCode load), the BSM loads
5641 * the bootstrap program into the on-board processor, and starts it.
5642 *
5643 * The bootstrap program loads (via DMA) instructions and data for a new
5644 * program from host DRAM locations indicated by the host driver in the
5645 * BSM_DRAM_* registers. Once the new program is loaded, it starts
5646 * automatically.
5647 *
5648 * When initializing the NIC, the host driver points the BSM to the
5649 * "initialize" uCode image. This uCode sets up some internal data, then
5650 * notifies host via "initialize alive" that it is complete.
5651 *
5652 * The host then replaces the BSM_DRAM_* pointer values to point to the
5653 * normal runtime uCode instructions and a backup uCode data cache buffer
5654 * (filled initially with starting data values for the on-board processor),
5655 * then triggers the "initialize" uCode to load and launch the runtime uCode,
5656 * which begins normal operation.
5657 *
5658 * When doing a power-save shutdown, runtime uCode saves data SRAM into
5659 * the backup data cache in DRAM before SRAM is powered down.
5660 *
5661 * When powering back up, the BSM loads the bootstrap program. This reloads
5662 * the runtime uCode instructions and the backup data cache into SRAM,
5663 * and re-launches the runtime uCode from where it left off.
5664 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005665static int iwl3945_load_bsm(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005666{
5667 __le32 *image = priv->ucode_boot.v_addr;
5668 u32 len = priv->ucode_boot.len;
5669 dma_addr_t pinst;
5670 dma_addr_t pdata;
5671 u32 inst_len;
5672 u32 data_len;
5673 int rc;
5674 int i;
5675 u32 done;
5676 u32 reg_offset;
5677
5678 IWL_DEBUG_INFO("Begin load bsm\n");
5679
5680 /* make sure bootstrap program is no larger than BSM's SRAM size */
5681 if (len > IWL_MAX_BSM_SIZE)
5682 return -EINVAL;
5683
5684 /* Tell bootstrap uCode where to find the "Initialize" uCode
Ben Cahill9fbab512007-11-29 11:09:47 +08005685 * in host DRAM ... host DRAM physical address bits 31:0 for 3945.
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005686 * NOTE: iwl3945_initialize_alive_start() will replace these values,
Zhu Yib481de92007-09-25 17:54:57 -07005687 * after the "initialize" uCode has run, to point to
5688 * runtime/protocol instructions and backup data cache. */
5689 pinst = priv->ucode_init.p_addr;
5690 pdata = priv->ucode_init_data.p_addr;
5691 inst_len = priv->ucode_init.len;
5692 data_len = priv->ucode_init_data.len;
5693
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005694 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005695 if (rc)
5696 return rc;
5697
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005698 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5699 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5700 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
5701 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
Zhu Yib481de92007-09-25 17:54:57 -07005702
5703 /* Fill BSM memory with bootstrap instructions */
5704 for (reg_offset = BSM_SRAM_LOWER_BOUND;
5705 reg_offset < BSM_SRAM_LOWER_BOUND + len;
5706 reg_offset += sizeof(u32), image++)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005707 _iwl3945_write_prph(priv, reg_offset,
Zhu Yib481de92007-09-25 17:54:57 -07005708 le32_to_cpu(*image));
5709
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005710 rc = iwl3945_verify_bsm(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005711 if (rc) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005712 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005713 return rc;
5714 }
5715
5716 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005717 iwl3945_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
5718 iwl3945_write_prph(priv, BSM_WR_MEM_DST_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005719 RTC_INST_LOWER_BOUND);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005720 iwl3945_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07005721
5722 /* Load bootstrap code into instruction SRAM now,
5723 * to prepare to load "initialize" uCode */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005724 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005725 BSM_WR_CTRL_REG_BIT_START);
5726
5727 /* Wait for load of bootstrap uCode to finish */
5728 for (i = 0; i < 100; i++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005729 done = iwl3945_read_prph(priv, BSM_WR_CTRL_REG);
Zhu Yib481de92007-09-25 17:54:57 -07005730 if (!(done & BSM_WR_CTRL_REG_BIT_START))
5731 break;
5732 udelay(10);
5733 }
5734 if (i < 100)
5735 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
5736 else {
5737 IWL_ERROR("BSM write did not complete!\n");
5738 return -EIO;
5739 }
5740
5741 /* Enable future boot loads whenever power management unit triggers it
5742 * (e.g. when powering back up after power-save shutdown) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005743 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005744 BSM_WR_CTRL_REG_BIT_START_EN);
5745
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005746 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005747
5748 return 0;
5749}
5750
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005751static void iwl3945_nic_start(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005752{
5753 /* Remove all resets to allow NIC to operate */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005754 iwl3945_write32(priv, CSR_RESET, 0);
Zhu Yib481de92007-09-25 17:54:57 -07005755}
5756
5757/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005758 * iwl3945_read_ucode - Read uCode images from disk file.
Zhu Yib481de92007-09-25 17:54:57 -07005759 *
5760 * Copy into buffers for card to fetch via bus-mastering
5761 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005762static int iwl3945_read_ucode(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005763{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005764 struct iwl3945_ucode *ucode;
Tomas Winkler90e759d2007-11-29 11:09:41 +08005765 int ret = 0;
Zhu Yib481de92007-09-25 17:54:57 -07005766 const struct firmware *ucode_raw;
5767 /* firmware file name contains uCode/driver compatibility version */
5768 const char *name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode";
5769 u8 *src;
5770 size_t len;
5771 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
5772
5773 /* Ask kernel firmware_class module to get the boot firmware off disk.
5774 * request_firmware() is synchronous, file is in memory on return. */
Tomas Winkler90e759d2007-11-29 11:09:41 +08005775 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
5776 if (ret < 0) {
5777 IWL_ERROR("%s firmware file req failed: Reason %d\n",
5778 name, ret);
Zhu Yib481de92007-09-25 17:54:57 -07005779 goto error;
5780 }
5781
5782 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
5783 name, ucode_raw->size);
5784
5785 /* Make sure that we got at least our header! */
5786 if (ucode_raw->size < sizeof(*ucode)) {
5787 IWL_ERROR("File size way too small!\n");
Tomas Winkler90e759d2007-11-29 11:09:41 +08005788 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005789 goto err_release;
5790 }
5791
5792 /* Data from ucode file: header followed by uCode images */
5793 ucode = (void *)ucode_raw->data;
5794
5795 ver = le32_to_cpu(ucode->ver);
5796 inst_size = le32_to_cpu(ucode->inst_size);
5797 data_size = le32_to_cpu(ucode->data_size);
5798 init_size = le32_to_cpu(ucode->init_size);
5799 init_data_size = le32_to_cpu(ucode->init_data_size);
5800 boot_size = le32_to_cpu(ucode->boot_size);
5801
5802 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
Ian Schrambc434dd2007-10-25 17:15:29 +08005803 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
5804 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
5805 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
5806 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
5807 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
Zhu Yib481de92007-09-25 17:54:57 -07005808
5809 /* Verify size of file vs. image size info in file's header */
5810 if (ucode_raw->size < sizeof(*ucode) +
5811 inst_size + data_size + init_size +
5812 init_data_size + boot_size) {
5813
5814 IWL_DEBUG_INFO("uCode file size %d too small\n",
5815 (int)ucode_raw->size);
Tomas Winkler90e759d2007-11-29 11:09:41 +08005816 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005817 goto err_release;
5818 }
5819
5820 /* Verify that uCode images will fit in card's SRAM */
5821 if (inst_size > IWL_MAX_INST_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005822 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
5823 inst_size);
5824 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005825 goto err_release;
5826 }
5827
5828 if (data_size > IWL_MAX_DATA_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005829 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
5830 data_size);
5831 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005832 goto err_release;
5833 }
5834 if (init_size > IWL_MAX_INST_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005835 IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
5836 init_size);
5837 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005838 goto err_release;
5839 }
5840 if (init_data_size > IWL_MAX_DATA_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005841 IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
5842 init_data_size);
5843 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005844 goto err_release;
5845 }
5846 if (boot_size > IWL_MAX_BSM_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005847 IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
5848 boot_size);
5849 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005850 goto err_release;
5851 }
5852
5853 /* Allocate ucode buffers for card's bus-master loading ... */
5854
5855 /* Runtime instructions and 2 copies of data:
5856 * 1) unmodified from disk
5857 * 2) backup cache for save/restore during power-downs */
5858 priv->ucode_code.len = inst_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005859 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
Zhu Yib481de92007-09-25 17:54:57 -07005860
5861 priv->ucode_data.len = data_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005862 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
Zhu Yib481de92007-09-25 17:54:57 -07005863
5864 priv->ucode_data_backup.len = data_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005865 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
Zhu Yib481de92007-09-25 17:54:57 -07005866
5867 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
Tomas Winkler90e759d2007-11-29 11:09:41 +08005868 !priv->ucode_data_backup.v_addr)
Zhu Yib481de92007-09-25 17:54:57 -07005869 goto err_pci_alloc;
5870
Tomas Winkler90e759d2007-11-29 11:09:41 +08005871 /* Initialization instructions and data */
5872 if (init_size && init_data_size) {
5873 priv->ucode_init.len = init_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005874 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
Tomas Winkler90e759d2007-11-29 11:09:41 +08005875
5876 priv->ucode_init_data.len = init_data_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005877 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
Tomas Winkler90e759d2007-11-29 11:09:41 +08005878
5879 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
5880 goto err_pci_alloc;
5881 }
5882
5883 /* Bootstrap (instructions only, no data) */
5884 if (boot_size) {
5885 priv->ucode_boot.len = boot_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005886 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
Tomas Winkler90e759d2007-11-29 11:09:41 +08005887
5888 if (!priv->ucode_boot.v_addr)
5889 goto err_pci_alloc;
5890 }
5891
Zhu Yib481de92007-09-25 17:54:57 -07005892 /* Copy images into buffers for card's bus-master reads ... */
5893
5894 /* Runtime instructions (first block of data in file) */
5895 src = &ucode->data[0];
5896 len = priv->ucode_code.len;
Tomas Winkler90e759d2007-11-29 11:09:41 +08005897 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
Zhu Yib481de92007-09-25 17:54:57 -07005898 memcpy(priv->ucode_code.v_addr, src, len);
5899 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
5900 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
5901
5902 /* Runtime data (2nd block)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005903 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
Zhu Yib481de92007-09-25 17:54:57 -07005904 src = &ucode->data[inst_size];
5905 len = priv->ucode_data.len;
Tomas Winkler90e759d2007-11-29 11:09:41 +08005906 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
Zhu Yib481de92007-09-25 17:54:57 -07005907 memcpy(priv->ucode_data.v_addr, src, len);
5908 memcpy(priv->ucode_data_backup.v_addr, src, len);
5909
5910 /* Initialization instructions (3rd block) */
5911 if (init_size) {
5912 src = &ucode->data[inst_size + data_size];
5913 len = priv->ucode_init.len;
Tomas Winkler90e759d2007-11-29 11:09:41 +08005914 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
5915 len);
Zhu Yib481de92007-09-25 17:54:57 -07005916 memcpy(priv->ucode_init.v_addr, src, len);
5917 }
5918
5919 /* Initialization data (4th block) */
5920 if (init_data_size) {
5921 src = &ucode->data[inst_size + data_size + init_size];
5922 len = priv->ucode_init_data.len;
5923 IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
5924 (int)len);
5925 memcpy(priv->ucode_init_data.v_addr, src, len);
5926 }
5927
5928 /* Bootstrap instructions (5th block) */
5929 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
5930 len = priv->ucode_boot.len;
5931 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
5932 (int)len);
5933 memcpy(priv->ucode_boot.v_addr, src, len);
5934
5935 /* We have our copies now, allow OS release its copies */
5936 release_firmware(ucode_raw);
5937 return 0;
5938
5939 err_pci_alloc:
5940 IWL_ERROR("failed to allocate pci memory\n");
Tomas Winkler90e759d2007-11-29 11:09:41 +08005941 ret = -ENOMEM;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005942 iwl3945_dealloc_ucode_pci(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005943
5944 err_release:
5945 release_firmware(ucode_raw);
5946
5947 error:
Tomas Winkler90e759d2007-11-29 11:09:41 +08005948 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07005949}
5950
5951
5952/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005953 * iwl3945_set_ucode_ptrs - Set uCode address location
Zhu Yib481de92007-09-25 17:54:57 -07005954 *
5955 * Tell initialization uCode where to find runtime uCode.
5956 *
5957 * BSM registers initially contain pointers to initialization uCode.
5958 * We need to replace them to load runtime uCode inst and data,
5959 * and to save runtime data when powering down.
5960 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005961static int iwl3945_set_ucode_ptrs(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005962{
5963 dma_addr_t pinst;
5964 dma_addr_t pdata;
5965 int rc = 0;
5966 unsigned long flags;
5967
5968 /* bits 31:0 for 3945 */
5969 pinst = priv->ucode_code.p_addr;
5970 pdata = priv->ucode_data_backup.p_addr;
5971
5972 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005973 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005974 if (rc) {
5975 spin_unlock_irqrestore(&priv->lock, flags);
5976 return rc;
5977 }
5978
5979 /* Tell bootstrap uCode where to find image to load */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005980 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5981 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5982 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005983 priv->ucode_data.len);
5984
5985 /* Inst bytecount must be last to set up, bit 31 signals uCode
5986 * that all new ptr/size info is in place */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005987 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005988 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
5989
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005990 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005991
5992 spin_unlock_irqrestore(&priv->lock, flags);
5993
5994 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
5995
5996 return rc;
5997}
5998
5999/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006000 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
Zhu Yib481de92007-09-25 17:54:57 -07006001 *
6002 * Called after REPLY_ALIVE notification received from "initialize" uCode.
6003 *
Zhu Yib481de92007-09-25 17:54:57 -07006004 * Tell "initialize" uCode to go ahead and load the runtime uCode.
Ben Cahill9fbab512007-11-29 11:09:47 +08006005 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006006static void iwl3945_init_alive_start(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006007{
6008 /* Check alive response for "valid" sign from uCode */
6009 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
6010 /* We had an error bringing up the hardware, so take it
6011 * all the way back down so we can try again */
6012 IWL_DEBUG_INFO("Initialize Alive failed.\n");
6013 goto restart;
6014 }
6015
6016 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
6017 * This is a paranoid check, because we would not have gotten the
6018 * "initialize" alive if code weren't properly loaded. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006019 if (iwl3945_verify_ucode(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006020 /* Runtime instruction load was bad;
6021 * take it all the way back down so we can try again */
6022 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
6023 goto restart;
6024 }
6025
6026 /* Send pointers to protocol/runtime uCode image ... init code will
6027 * load and launch runtime uCode, which will send us another "Alive"
6028 * notification. */
6029 IWL_DEBUG_INFO("Initialization Alive received.\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006030 if (iwl3945_set_ucode_ptrs(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006031 /* Runtime instruction load won't happen;
6032 * take it all the way back down so we can try again */
6033 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
6034 goto restart;
6035 }
6036 return;
6037
6038 restart:
6039 queue_work(priv->workqueue, &priv->restart);
6040}
6041
6042
6043/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006044 * iwl3945_alive_start - called after REPLY_ALIVE notification received
Zhu Yib481de92007-09-25 17:54:57 -07006045 * from protocol/runtime uCode (initialization uCode's
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006046 * Alive gets handled by iwl3945_init_alive_start()).
Zhu Yib481de92007-09-25 17:54:57 -07006047 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006048static void iwl3945_alive_start(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006049{
6050 int rc = 0;
6051 int thermal_spin = 0;
6052 u32 rfkill;
6053
6054 IWL_DEBUG_INFO("Runtime Alive received.\n");
6055
6056 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
6057 /* We had an error bringing up the hardware, so take it
6058 * all the way back down so we can try again */
6059 IWL_DEBUG_INFO("Alive failed.\n");
6060 goto restart;
6061 }
6062
6063 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
6064 * This is a paranoid check, because we would not have gotten the
6065 * "runtime" alive if code weren't properly loaded. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006066 if (iwl3945_verify_ucode(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006067 /* Runtime instruction load was bad;
6068 * take it all the way back down so we can try again */
6069 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
6070 goto restart;
6071 }
6072
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006073 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006074
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006075 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006076 if (rc) {
6077 IWL_WARNING("Can not read rfkill status from adapter\n");
6078 return;
6079 }
6080
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006081 rfkill = iwl3945_read_prph(priv, APMG_RFKILL_REG);
Zhu Yib481de92007-09-25 17:54:57 -07006082 IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006083 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006084
6085 if (rfkill & 0x1) {
6086 clear_bit(STATUS_RF_KILL_HW, &priv->status);
6087 /* if rfkill is not on, then wait for thermal
6088 * sensor in adapter to kick in */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006089 while (iwl3945_hw_get_temperature(priv) == 0) {
Zhu Yib481de92007-09-25 17:54:57 -07006090 thermal_spin++;
6091 udelay(10);
6092 }
6093
6094 if (thermal_spin)
6095 IWL_DEBUG_INFO("Thermal calibration took %dus\n",
6096 thermal_spin * 10);
6097 } else
6098 set_bit(STATUS_RF_KILL_HW, &priv->status);
6099
Ben Cahill9fbab512007-11-29 11:09:47 +08006100 /* After the ALIVE response, we can send commands to 3945 uCode */
Zhu Yib481de92007-09-25 17:54:57 -07006101 set_bit(STATUS_ALIVE, &priv->status);
6102
6103 /* Clear out the uCode error bit if it is set */
6104 clear_bit(STATUS_FW_ERROR, &priv->status);
6105
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006106 if (iwl3945_is_rfkill(priv))
Zhu Yib481de92007-09-25 17:54:57 -07006107 return;
6108
Zhu Yi5a669262008-01-14 17:46:18 -08006109 ieee80211_start_queues(priv->hw);
Zhu Yib481de92007-09-25 17:54:57 -07006110
6111 priv->active_rate = priv->rates_mask;
6112 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
6113
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006114 iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
Zhu Yib481de92007-09-25 17:54:57 -07006115
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006116 if (iwl3945_is_associated(priv)) {
6117 struct iwl3945_rxon_cmd *active_rxon =
6118 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07006119
6120 memcpy(&priv->staging_rxon, &priv->active_rxon,
6121 sizeof(priv->staging_rxon));
6122 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6123 } else {
6124 /* Initialize our rx_config data */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006125 iwl3945_connection_init_rx_config(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006126 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
6127 }
6128
Ben Cahill9fbab512007-11-29 11:09:47 +08006129 /* Configure Bluetooth device coexistence support */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006130 iwl3945_send_bt_config(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006131
6132 /* Configure the adapter for unassociated operation */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006133 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006134
6135 /* At this point, the NIC is initialized and operational */
6136 priv->notif_missed_beacons = 0;
6137 set_bit(STATUS_READY, &priv->status);
6138
6139 iwl3945_reg_txpower_periodic(priv);
6140
6141 IWL_DEBUG_INFO("ALIVE processing complete.\n");
Zhu Yi5a669262008-01-14 17:46:18 -08006142 wake_up_interruptible(&priv->wait_command_queue);
Zhu Yib481de92007-09-25 17:54:57 -07006143
6144 if (priv->error_recovering)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006145 iwl3945_error_recovery(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006146
6147 return;
6148
6149 restart:
6150 queue_work(priv->workqueue, &priv->restart);
6151}
6152
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006153static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv);
Zhu Yib481de92007-09-25 17:54:57 -07006154
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006155static void __iwl3945_down(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006156{
6157 unsigned long flags;
6158 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
6159 struct ieee80211_conf *conf = NULL;
6160
6161 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
6162
6163 conf = ieee80211_get_hw_conf(priv->hw);
6164
6165 if (!exit_pending)
6166 set_bit(STATUS_EXIT_PENDING, &priv->status);
6167
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006168 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006169
6170 /* Unblock any waiting calls */
6171 wake_up_interruptible_all(&priv->wait_command_queue);
6172
Zhu Yib481de92007-09-25 17:54:57 -07006173 /* Wipe out the EXIT_PENDING status bit if we are not actually
6174 * exiting the module */
6175 if (!exit_pending)
6176 clear_bit(STATUS_EXIT_PENDING, &priv->status);
6177
6178 /* stop and reset the on-board processor */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006179 iwl3945_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
Zhu Yib481de92007-09-25 17:54:57 -07006180
6181 /* tell the device to stop sending interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006182 iwl3945_disable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006183
6184 if (priv->mac80211_registered)
6185 ieee80211_stop_queues(priv->hw);
6186
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006187 /* If we have not previously called iwl3945_init() then
Zhu Yib481de92007-09-25 17:54:57 -07006188 * clear all bits but the RF Kill and SUSPEND bits and return */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006189 if (!iwl3945_is_init(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006190 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6191 STATUS_RF_KILL_HW |
6192 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6193 STATUS_RF_KILL_SW |
Reinette Chatre97888642008-02-06 11:20:38 -08006194 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
6195 STATUS_GEO_CONFIGURED |
Zhu Yib481de92007-09-25 17:54:57 -07006196 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6197 STATUS_IN_SUSPEND;
6198 goto exit;
6199 }
6200
6201 /* ...otherwise clear out all the status bits but the RF Kill and
6202 * SUSPEND bits and continue taking the NIC down. */
6203 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6204 STATUS_RF_KILL_HW |
6205 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6206 STATUS_RF_KILL_SW |
Reinette Chatre97888642008-02-06 11:20:38 -08006207 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
6208 STATUS_GEO_CONFIGURED |
Zhu Yib481de92007-09-25 17:54:57 -07006209 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6210 STATUS_IN_SUSPEND |
6211 test_bit(STATUS_FW_ERROR, &priv->status) <<
6212 STATUS_FW_ERROR;
6213
6214 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006215 iwl3945_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
Zhu Yib481de92007-09-25 17:54:57 -07006216 spin_unlock_irqrestore(&priv->lock, flags);
6217
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006218 iwl3945_hw_txq_ctx_stop(priv);
6219 iwl3945_hw_rxq_stop(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006220
6221 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006222 if (!iwl3945_grab_nic_access(priv)) {
6223 iwl3945_write_prph(priv, APMG_CLK_DIS_REG,
Zhu Yib481de92007-09-25 17:54:57 -07006224 APMG_CLK_VAL_DMA_CLK_RQT);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006225 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006226 }
6227 spin_unlock_irqrestore(&priv->lock, flags);
6228
6229 udelay(5);
6230
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006231 iwl3945_hw_nic_stop_master(priv);
6232 iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
6233 iwl3945_hw_nic_reset(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006234
6235 exit:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006236 memset(&priv->card_alive, 0, sizeof(struct iwl3945_alive_resp));
Zhu Yib481de92007-09-25 17:54:57 -07006237
6238 if (priv->ibss_beacon)
6239 dev_kfree_skb(priv->ibss_beacon);
6240 priv->ibss_beacon = NULL;
6241
6242 /* clear out any free frames */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006243 iwl3945_clear_free_frames(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006244}
6245
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006246static void iwl3945_down(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006247{
6248 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006249 __iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006250 mutex_unlock(&priv->mutex);
Zhu Yib24d22b2007-12-19 13:59:52 +08006251
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006252 iwl3945_cancel_deferred_work(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006253}
6254
6255#define MAX_HW_RESTARTS 5
6256
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006257static int __iwl3945_up(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006258{
6259 int rc, i;
6260
6261 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6262 IWL_WARNING("Exit pending; will not bring the NIC up\n");
6263 return -EIO;
6264 }
6265
6266 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
6267 IWL_WARNING("Radio disabled by SW RF kill (module "
6268 "parameter)\n");
Zhu Yie655b9f2008-01-24 02:19:38 -08006269 return -ENODEV;
6270 }
6271
Reinette Chatree903fbd2008-01-30 22:05:15 -08006272 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
6273 IWL_ERROR("ucode not available for device bringup\n");
6274 return -EIO;
6275 }
6276
Zhu Yie655b9f2008-01-24 02:19:38 -08006277 /* If platform's RF_KILL switch is NOT set to KILL */
6278 if (iwl3945_read32(priv, CSR_GP_CNTRL) &
6279 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
6280 clear_bit(STATUS_RF_KILL_HW, &priv->status);
6281 else {
6282 set_bit(STATUS_RF_KILL_HW, &priv->status);
6283 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
6284 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
6285 return -ENODEV;
6286 }
Zhu Yib481de92007-09-25 17:54:57 -07006287 }
6288
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006289 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
Zhu Yib481de92007-09-25 17:54:57 -07006290
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006291 rc = iwl3945_hw_nic_init(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006292 if (rc) {
6293 IWL_ERROR("Unable to int nic\n");
6294 return rc;
6295 }
6296
6297 /* make sure rfkill handshake bits are cleared */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006298 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6299 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR,
Zhu Yib481de92007-09-25 17:54:57 -07006300 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
6301
6302 /* clear (again), then enable host interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006303 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
6304 iwl3945_enable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006305
6306 /* really make sure rfkill handshake bits are cleared */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006307 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6308 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
Zhu Yib481de92007-09-25 17:54:57 -07006309
6310 /* Copy original ucode data image from disk into backup cache.
6311 * This will be used to initialize the on-board processor's
6312 * data SRAM for a clean start when the runtime program first loads. */
6313 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
Zhu Yi5a669262008-01-14 17:46:18 -08006314 priv->ucode_data.len);
Zhu Yib481de92007-09-25 17:54:57 -07006315
Zhu Yie655b9f2008-01-24 02:19:38 -08006316 /* We return success when we resume from suspend and rf_kill is on. */
6317 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
6318 return 0;
6319
Zhu Yib481de92007-09-25 17:54:57 -07006320 for (i = 0; i < MAX_HW_RESTARTS; i++) {
6321
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006322 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006323
6324 /* load bootstrap state machine,
6325 * load bootstrap program into processor's memory,
6326 * prepare to load the "initialize" uCode */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006327 rc = iwl3945_load_bsm(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006328
6329 if (rc) {
6330 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
6331 continue;
6332 }
6333
6334 /* start card; "initialize" will load runtime ucode */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006335 iwl3945_nic_start(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006336
Zhu Yib481de92007-09-25 17:54:57 -07006337 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
6338
6339 return 0;
6340 }
6341
6342 set_bit(STATUS_EXIT_PENDING, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006343 __iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006344
6345 /* tried to restart and config the device for as long as our
6346 * patience could withstand */
6347 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
6348 return -EIO;
6349}
6350
6351
6352/*****************************************************************************
6353 *
6354 * Workqueue callbacks
6355 *
6356 *****************************************************************************/
6357
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006358static void iwl3945_bg_init_alive_start(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006359{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006360 struct iwl3945_priv *priv =
6361 container_of(data, struct iwl3945_priv, init_alive_start.work);
Zhu Yib481de92007-09-25 17:54:57 -07006362
6363 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6364 return;
6365
6366 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006367 iwl3945_init_alive_start(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006368 mutex_unlock(&priv->mutex);
6369}
6370
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006371static void iwl3945_bg_alive_start(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006372{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006373 struct iwl3945_priv *priv =
6374 container_of(data, struct iwl3945_priv, alive_start.work);
Zhu Yib481de92007-09-25 17:54:57 -07006375
6376 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6377 return;
6378
6379 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006380 iwl3945_alive_start(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006381 mutex_unlock(&priv->mutex);
6382}
6383
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006384static void iwl3945_bg_rf_kill(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07006385{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006386 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, rf_kill);
Zhu Yib481de92007-09-25 17:54:57 -07006387
6388 wake_up_interruptible(&priv->wait_command_queue);
6389
6390 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6391 return;
6392
6393 mutex_lock(&priv->mutex);
6394
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006395 if (!iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006396 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
6397 "HW and/or SW RF Kill no longer active, restarting "
6398 "device\n");
6399 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6400 queue_work(priv->workqueue, &priv->restart);
6401 } else {
6402
6403 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
6404 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
6405 "disabled by SW switch\n");
6406 else
6407 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
6408 "Kill switch must be turned off for "
6409 "wireless networking to work.\n");
6410 }
6411 mutex_unlock(&priv->mutex);
6412}
6413
6414#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
6415
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006416static void iwl3945_bg_scan_check(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006417{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006418 struct iwl3945_priv *priv =
6419 container_of(data, struct iwl3945_priv, scan_check.work);
Zhu Yib481de92007-09-25 17:54:57 -07006420
6421 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6422 return;
6423
6424 mutex_lock(&priv->mutex);
6425 if (test_bit(STATUS_SCANNING, &priv->status) ||
6426 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6427 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
6428 "Scan completion watchdog resetting adapter (%dms)\n",
6429 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
Mohamed Abbas15e869d2007-10-25 17:15:46 +08006430
Zhu Yib481de92007-09-25 17:54:57 -07006431 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006432 iwl3945_send_scan_abort(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006433 }
6434 mutex_unlock(&priv->mutex);
6435}
6436
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006437static void iwl3945_bg_request_scan(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006438{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006439 struct iwl3945_priv *priv =
6440 container_of(data, struct iwl3945_priv, request_scan);
6441 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07006442 .id = REPLY_SCAN_CMD,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006443 .len = sizeof(struct iwl3945_scan_cmd),
Zhu Yib481de92007-09-25 17:54:57 -07006444 .meta.flags = CMD_SIZE_HUGE,
6445 };
6446 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006447 struct iwl3945_scan_cmd *scan;
Zhu Yib481de92007-09-25 17:54:57 -07006448 struct ieee80211_conf *conf = NULL;
6449 u8 direct_mask;
Johannes Berg8318d782008-01-24 19:38:38 +01006450 enum ieee80211_band band;
Zhu Yib481de92007-09-25 17:54:57 -07006451
6452 conf = ieee80211_get_hw_conf(priv->hw);
6453
6454 mutex_lock(&priv->mutex);
6455
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006456 if (!iwl3945_is_ready(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006457 IWL_WARNING("request scan called when driver not ready.\n");
6458 goto done;
6459 }
6460
6461 /* Make sure the scan wasn't cancelled before this queued work
6462 * was given the chance to run... */
6463 if (!test_bit(STATUS_SCANNING, &priv->status))
6464 goto done;
6465
6466 /* This should never be called or scheduled if there is currently
6467 * a scan active in the hardware. */
6468 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
6469 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
6470 "Ignoring second request.\n");
6471 rc = -EIO;
6472 goto done;
6473 }
6474
6475 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6476 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6477 goto done;
6478 }
6479
6480 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6481 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6482 goto done;
6483 }
6484
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006485 if (iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006486 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6487 goto done;
6488 }
6489
6490 if (!test_bit(STATUS_READY, &priv->status)) {
6491 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6492 goto done;
6493 }
6494
6495 if (!priv->scan_bands) {
6496 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6497 goto done;
6498 }
6499
6500 if (!priv->scan) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006501 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
Zhu Yib481de92007-09-25 17:54:57 -07006502 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
6503 if (!priv->scan) {
6504 rc = -ENOMEM;
6505 goto done;
6506 }
6507 }
6508 scan = priv->scan;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006509 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
Zhu Yib481de92007-09-25 17:54:57 -07006510
6511 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
6512 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
6513
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006514 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006515 u16 interval = 0;
6516 u32 extra;
6517 u32 suspend_time = 100;
6518 u32 scan_suspend_time = 100;
6519 unsigned long flags;
6520
6521 IWL_DEBUG_INFO("Scanning while associated...\n");
6522
6523 spin_lock_irqsave(&priv->lock, flags);
6524 interval = priv->beacon_int;
6525 spin_unlock_irqrestore(&priv->lock, flags);
6526
6527 scan->suspend_time = 0;
Mohamed Abbas15e869d2007-10-25 17:15:46 +08006528 scan->max_out_time = cpu_to_le32(200 * 1024);
Zhu Yib481de92007-09-25 17:54:57 -07006529 if (!interval)
6530 interval = suspend_time;
6531 /*
6532 * suspend time format:
6533 * 0-19: beacon interval in usec (time before exec.)
6534 * 20-23: 0
6535 * 24-31: number of beacons (suspend between channels)
6536 */
6537
6538 extra = (suspend_time / interval) << 24;
6539 scan_suspend_time = 0xFF0FFFFF &
6540 (extra | ((suspend_time % interval) * 1024));
6541
6542 scan->suspend_time = cpu_to_le32(scan_suspend_time);
6543 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
6544 scan_suspend_time, interval);
6545 }
6546
6547 /* We should add the ability for user to lock to PASSIVE ONLY */
6548 if (priv->one_direct_scan) {
6549 IWL_DEBUG_SCAN
6550 ("Kicking off one direct scan for '%s'\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006551 iwl3945_escape_essid(priv->direct_ssid,
Zhu Yib481de92007-09-25 17:54:57 -07006552 priv->direct_ssid_len));
6553 scan->direct_scan[0].id = WLAN_EID_SSID;
6554 scan->direct_scan[0].len = priv->direct_ssid_len;
6555 memcpy(scan->direct_scan[0].ssid,
6556 priv->direct_ssid, priv->direct_ssid_len);
6557 direct_mask = 1;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006558 } else if (!iwl3945_is_associated(priv) && priv->essid_len) {
Zhu Yib481de92007-09-25 17:54:57 -07006559 scan->direct_scan[0].id = WLAN_EID_SSID;
6560 scan->direct_scan[0].len = priv->essid_len;
6561 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
6562 direct_mask = 1;
6563 } else
6564 direct_mask = 0;
6565
6566 /* We don't build a direct scan probe request; the uCode will do
6567 * that based on the direct_mask added to each channel entry */
6568 scan->tx_cmd.len = cpu_to_le16(
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006569 iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
Cyrill Gorcunov18904f52008-01-26 19:09:36 +03006570 IWL_MAX_SCAN_SIZE - sizeof(*scan), 0));
Zhu Yib481de92007-09-25 17:54:57 -07006571 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
6572 scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
6573 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
6574
6575 /* flags + rate selection */
6576
6577 switch (priv->scan_bands) {
6578 case 2:
6579 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
6580 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
6581 scan->good_CRC_th = 0;
Johannes Berg8318d782008-01-24 19:38:38 +01006582 band = IEEE80211_BAND_2GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07006583 break;
6584
6585 case 1:
6586 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
6587 scan->good_CRC_th = IWL_GOOD_CRC_TH;
Johannes Berg8318d782008-01-24 19:38:38 +01006588 band = IEEE80211_BAND_5GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07006589 break;
6590
6591 default:
6592 IWL_WARNING("Invalid scan band count\n");
6593 goto done;
6594 }
6595
6596 /* select Rx antennas */
6597 scan->flags |= iwl3945_get_antenna_flags(priv);
6598
6599 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
6600 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
6601
6602 if (direct_mask)
6603 IWL_DEBUG_SCAN
6604 ("Initiating direct scan for %s.\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006605 iwl3945_escape_essid(priv->essid, priv->essid_len));
Zhu Yib481de92007-09-25 17:54:57 -07006606 else
6607 IWL_DEBUG_SCAN("Initiating indirect scan.\n");
6608
6609 scan->channel_count =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006610 iwl3945_get_channels_for_scan(
Johannes Berg8318d782008-01-24 19:38:38 +01006611 priv, band, 1, /* active */
Zhu Yib481de92007-09-25 17:54:57 -07006612 direct_mask,
6613 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6614
6615 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006616 scan->channel_count * sizeof(struct iwl3945_scan_channel);
Zhu Yib481de92007-09-25 17:54:57 -07006617 cmd.data = scan;
6618 scan->len = cpu_to_le16(cmd.len);
6619
6620 set_bit(STATUS_SCAN_HW, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006621 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07006622 if (rc)
6623 goto done;
6624
6625 queue_delayed_work(priv->workqueue, &priv->scan_check,
6626 IWL_SCAN_CHECK_WATCHDOG);
6627
6628 mutex_unlock(&priv->mutex);
6629 return;
6630
6631 done:
Ian Schram01ebd062007-10-25 17:15:22 +08006632 /* inform mac80211 scan aborted */
Zhu Yib481de92007-09-25 17:54:57 -07006633 queue_work(priv->workqueue, &priv->scan_completed);
6634 mutex_unlock(&priv->mutex);
6635}
6636
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006637static void iwl3945_bg_up(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006638{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006639 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, up);
Zhu Yib481de92007-09-25 17:54:57 -07006640
6641 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6642 return;
6643
6644 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006645 __iwl3945_up(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006646 mutex_unlock(&priv->mutex);
6647}
6648
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006649static void iwl3945_bg_restart(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006650{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006651 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, restart);
Zhu Yib481de92007-09-25 17:54:57 -07006652
6653 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6654 return;
6655
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006656 iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006657 queue_work(priv->workqueue, &priv->up);
6658}
6659
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006660static void iwl3945_bg_rx_replenish(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006661{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006662 struct iwl3945_priv *priv =
6663 container_of(data, struct iwl3945_priv, rx_replenish);
Zhu Yib481de92007-09-25 17:54:57 -07006664
6665 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6666 return;
6667
6668 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006669 iwl3945_rx_replenish(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006670 mutex_unlock(&priv->mutex);
6671}
6672
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08006673#define IWL_DELAY_NEXT_SCAN (HZ*2)
6674
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006675static void iwl3945_bg_post_associate(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006676{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006677 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv,
Zhu Yib481de92007-09-25 17:54:57 -07006678 post_associate.work);
6679
6680 int rc = 0;
6681 struct ieee80211_conf *conf = NULL;
Joe Perches0795af52007-10-03 17:59:30 -07006682 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07006683
6684 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6685 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
6686 return;
6687 }
6688
6689
Joe Perches0795af52007-10-03 17:59:30 -07006690 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
6691 priv->assoc_id,
6692 print_mac(mac, priv->active_rxon.bssid_addr));
Zhu Yib481de92007-09-25 17:54:57 -07006693
6694 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6695 return;
6696
6697 mutex_lock(&priv->mutex);
6698
Johannes Berg32bfd352007-12-19 01:31:26 +01006699 if (!priv->vif || !priv->is_open) {
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08006700 mutex_unlock(&priv->mutex);
6701 return;
6702 }
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006703 iwl3945_scan_cancel_timeout(priv, 200);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08006704
Zhu Yib481de92007-09-25 17:54:57 -07006705 conf = ieee80211_get_hw_conf(priv->hw);
6706
6707 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006708 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006709
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006710 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
6711 iwl3945_setup_rxon_timing(priv);
6712 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
Zhu Yib481de92007-09-25 17:54:57 -07006713 sizeof(priv->rxon_timing), &priv->rxon_timing);
6714 if (rc)
6715 IWL_WARNING("REPLY_RXON_TIMING failed - "
6716 "Attempting to continue.\n");
6717
6718 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6719
6720 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6721
6722 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
6723 priv->assoc_id, priv->beacon_int);
6724
6725 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6726 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6727 else
6728 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6729
6730 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6731 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
6732 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
6733 else
6734 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6735
6736 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6737 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6738
6739 }
6740
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006741 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006742
6743 switch (priv->iw_mode) {
6744 case IEEE80211_IF_TYPE_STA:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006745 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
Zhu Yib481de92007-09-25 17:54:57 -07006746 break;
6747
6748 case IEEE80211_IF_TYPE_IBSS:
6749
6750 /* clear out the station table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006751 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006752
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006753 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
6754 iwl3945_add_station(priv, priv->bssid, 0, 0);
Zhu Yib481de92007-09-25 17:54:57 -07006755 iwl3945_sync_sta(priv, IWL_STA_ID,
Johannes Berg8318d782008-01-24 19:38:38 +01006756 (priv->band == IEEE80211_BAND_5GHZ) ?
Zhu Yib481de92007-09-25 17:54:57 -07006757 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
6758 CMD_ASYNC);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006759 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
6760 iwl3945_send_beacon_cmd(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006761
6762 break;
6763
6764 default:
6765 IWL_ERROR("%s Should not be called in %d mode\n",
Ian Schrambc434dd2007-10-25 17:15:29 +08006766 __FUNCTION__, priv->iw_mode);
Zhu Yib481de92007-09-25 17:54:57 -07006767 break;
6768 }
6769
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006770 iwl3945_sequence_reset(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006771
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08006772#ifdef CONFIG_IWL3945_QOS
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006773 iwl3945_activate_qos(priv, 0);
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08006774#endif /* CONFIG_IWL3945_QOS */
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08006775 /* we have just associated, don't start scan too early */
6776 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
Zhu Yib481de92007-09-25 17:54:57 -07006777 mutex_unlock(&priv->mutex);
6778}
6779
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006780static void iwl3945_bg_abort_scan(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07006781{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006782 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, abort_scan);
Zhu Yib481de92007-09-25 17:54:57 -07006783
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006784 if (!iwl3945_is_ready(priv))
Zhu Yib481de92007-09-25 17:54:57 -07006785 return;
6786
6787 mutex_lock(&priv->mutex);
6788
6789 set_bit(STATUS_SCAN_ABORTING, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006790 iwl3945_send_scan_abort(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006791
6792 mutex_unlock(&priv->mutex);
6793}
6794
Zhu Yi76bb77e2007-11-22 10:53:22 +08006795static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
6796
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006797static void iwl3945_bg_scan_completed(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07006798{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006799 struct iwl3945_priv *priv =
6800 container_of(work, struct iwl3945_priv, scan_completed);
Zhu Yib481de92007-09-25 17:54:57 -07006801
6802 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6803
6804 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6805 return;
6806
Zhu Yia0646472007-12-20 14:10:01 +08006807 if (test_bit(STATUS_CONF_PENDING, &priv->status))
6808 iwl3945_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
Zhu Yi76bb77e2007-11-22 10:53:22 +08006809
Zhu Yib481de92007-09-25 17:54:57 -07006810 ieee80211_scan_completed(priv->hw);
6811
6812 /* Since setting the TXPOWER may have been deferred while
6813 * performing the scan, fire one off */
6814 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006815 iwl3945_hw_reg_send_txpower(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006816 mutex_unlock(&priv->mutex);
6817}
6818
6819/*****************************************************************************
6820 *
6821 * mac80211 entry point functions
6822 *
6823 *****************************************************************************/
6824
Zhu Yi5a669262008-01-14 17:46:18 -08006825#define UCODE_READY_TIMEOUT (2 * HZ)
6826
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006827static int iwl3945_mac_start(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07006828{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006829 struct iwl3945_priv *priv = hw->priv;
Zhu Yi5a669262008-01-14 17:46:18 -08006830 int ret;
Zhu Yib481de92007-09-25 17:54:57 -07006831
6832 IWL_DEBUG_MAC80211("enter\n");
6833
Zhu Yi5a669262008-01-14 17:46:18 -08006834 if (pci_enable_device(priv->pci_dev)) {
6835 IWL_ERROR("Fail to pci_enable_device\n");
6836 return -ENODEV;
6837 }
6838 pci_restore_state(priv->pci_dev);
6839 pci_enable_msi(priv->pci_dev);
6840
6841 ret = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
6842 DRV_NAME, priv);
6843 if (ret) {
6844 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
6845 goto out_disable_msi;
6846 }
6847
Zhu Yib481de92007-09-25 17:54:57 -07006848 /* we should be verifying the device is ready to be opened */
6849 mutex_lock(&priv->mutex);
6850
Zhu Yi5a669262008-01-14 17:46:18 -08006851 memset(&priv->staging_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
6852 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
6853 * ucode filename and max sizes are card-specific. */
6854
6855 if (!priv->ucode_code.len) {
6856 ret = iwl3945_read_ucode(priv);
6857 if (ret) {
6858 IWL_ERROR("Could not read microcode: %d\n", ret);
6859 mutex_unlock(&priv->mutex);
6860 goto out_release_irq;
6861 }
6862 }
6863
Zhu Yie655b9f2008-01-24 02:19:38 -08006864 ret = __iwl3945_up(priv);
Zhu Yi5a669262008-01-14 17:46:18 -08006865
Zhu Yib481de92007-09-25 17:54:57 -07006866 mutex_unlock(&priv->mutex);
Zhu Yi5a669262008-01-14 17:46:18 -08006867
Zhu Yie655b9f2008-01-24 02:19:38 -08006868 if (ret)
6869 goto out_release_irq;
6870
6871 IWL_DEBUG_INFO("Start UP work.\n");
6872
6873 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
6874 return 0;
6875
Zhu Yi5a669262008-01-14 17:46:18 -08006876 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
6877 * mac80211 will not be run successfully. */
6878 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
6879 test_bit(STATUS_READY, &priv->status),
6880 UCODE_READY_TIMEOUT);
6881 if (!ret) {
6882 if (!test_bit(STATUS_READY, &priv->status)) {
6883 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
6884 jiffies_to_msecs(UCODE_READY_TIMEOUT));
6885 ret = -ETIMEDOUT;
6886 goto out_release_irq;
6887 }
6888 }
6889
Zhu Yie655b9f2008-01-24 02:19:38 -08006890 priv->is_open = 1;
Zhu Yib481de92007-09-25 17:54:57 -07006891 IWL_DEBUG_MAC80211("leave\n");
6892 return 0;
Zhu Yi5a669262008-01-14 17:46:18 -08006893
6894out_release_irq:
6895 free_irq(priv->pci_dev->irq, priv);
6896out_disable_msi:
6897 pci_disable_msi(priv->pci_dev);
Zhu Yie655b9f2008-01-24 02:19:38 -08006898 pci_disable_device(priv->pci_dev);
6899 priv->is_open = 0;
6900 IWL_DEBUG_MAC80211("leave - failed\n");
Zhu Yi5a669262008-01-14 17:46:18 -08006901 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07006902}
6903
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006904static void iwl3945_mac_stop(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07006905{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006906 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07006907
6908 IWL_DEBUG_MAC80211("enter\n");
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08006909
Zhu Yie655b9f2008-01-24 02:19:38 -08006910 if (!priv->is_open) {
6911 IWL_DEBUG_MAC80211("leave - skip\n");
6912 return;
6913 }
6914
Zhu Yib481de92007-09-25 17:54:57 -07006915 priv->is_open = 0;
Zhu Yi5a669262008-01-14 17:46:18 -08006916
6917 if (iwl3945_is_ready_rf(priv)) {
Zhu Yie655b9f2008-01-24 02:19:38 -08006918 /* stop mac, cancel any scan request and clear
6919 * RXON_FILTER_ASSOC_MSK BIT
6920 */
Zhu Yi5a669262008-01-14 17:46:18 -08006921 mutex_lock(&priv->mutex);
6922 iwl3945_scan_cancel_timeout(priv, 100);
6923 cancel_delayed_work(&priv->post_associate);
Mohamed Abbasfde35712007-11-29 11:10:15 +08006924 mutex_unlock(&priv->mutex);
Mohamed Abbasfde35712007-11-29 11:10:15 +08006925 }
6926
Zhu Yi5a669262008-01-14 17:46:18 -08006927 iwl3945_down(priv);
6928
6929 flush_workqueue(priv->workqueue);
6930 free_irq(priv->pci_dev->irq, priv);
6931 pci_disable_msi(priv->pci_dev);
6932 pci_save_state(priv->pci_dev);
6933 pci_disable_device(priv->pci_dev);
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08006934
Zhu Yib481de92007-09-25 17:54:57 -07006935 IWL_DEBUG_MAC80211("leave\n");
Zhu Yib481de92007-09-25 17:54:57 -07006936}
6937
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006938static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
Zhu Yib481de92007-09-25 17:54:57 -07006939 struct ieee80211_tx_control *ctl)
6940{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006941 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07006942
6943 IWL_DEBUG_MAC80211("enter\n");
6944
6945 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
6946 IWL_DEBUG_MAC80211("leave - monitor\n");
6947 return -1;
6948 }
6949
6950 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
Johannes Berg8318d782008-01-24 19:38:38 +01006951 ctl->tx_rate->bitrate);
Zhu Yib481de92007-09-25 17:54:57 -07006952
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006953 if (iwl3945_tx_skb(priv, skb, ctl))
Zhu Yib481de92007-09-25 17:54:57 -07006954 dev_kfree_skb_any(skb);
6955
6956 IWL_DEBUG_MAC80211("leave\n");
6957 return 0;
6958}
6959
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006960static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07006961 struct ieee80211_if_init_conf *conf)
6962{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006963 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07006964 unsigned long flags;
Joe Perches0795af52007-10-03 17:59:30 -07006965 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07006966
Johannes Berg32bfd352007-12-19 01:31:26 +01006967 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
Zhu Yib481de92007-09-25 17:54:57 -07006968
Johannes Berg32bfd352007-12-19 01:31:26 +01006969 if (priv->vif) {
6970 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
Tomas Winkler864792e2007-11-27 21:00:52 +02006971 return -EOPNOTSUPP;
Zhu Yib481de92007-09-25 17:54:57 -07006972 }
6973
6974 spin_lock_irqsave(&priv->lock, flags);
Johannes Berg32bfd352007-12-19 01:31:26 +01006975 priv->vif = conf->vif;
Zhu Yib481de92007-09-25 17:54:57 -07006976
6977 spin_unlock_irqrestore(&priv->lock, flags);
6978
6979 mutex_lock(&priv->mutex);
Tomas Winkler864792e2007-11-27 21:00:52 +02006980
6981 if (conf->mac_addr) {
6982 IWL_DEBUG_MAC80211("Set: %s\n", print_mac(mac, conf->mac_addr));
6983 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
6984 }
6985
Zhu Yi5a669262008-01-14 17:46:18 -08006986 if (iwl3945_is_ready(priv))
6987 iwl3945_set_mode(priv, conf->type);
Zhu Yib481de92007-09-25 17:54:57 -07006988
Zhu Yib481de92007-09-25 17:54:57 -07006989 mutex_unlock(&priv->mutex);
6990
Zhu Yi5a669262008-01-14 17:46:18 -08006991 IWL_DEBUG_MAC80211("leave\n");
Zhu Yib481de92007-09-25 17:54:57 -07006992 return 0;
6993}
6994
6995/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006996 * iwl3945_mac_config - mac80211 config callback
Zhu Yib481de92007-09-25 17:54:57 -07006997 *
6998 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
6999 * be set inappropriately and the driver currently sets the hardware up to
7000 * use it whenever needed.
7001 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007002static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
Zhu Yib481de92007-09-25 17:54:57 -07007003{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007004 struct iwl3945_priv *priv = hw->priv;
7005 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07007006 unsigned long flags;
Zhu Yi76bb77e2007-11-22 10:53:22 +08007007 int ret = 0;
Zhu Yib481de92007-09-25 17:54:57 -07007008
7009 mutex_lock(&priv->mutex);
Johannes Berg8318d782008-01-24 19:38:38 +01007010 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
Zhu Yib481de92007-09-25 17:54:57 -07007011
Zhu Yi12342c42007-12-20 11:27:32 +08007012 priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
7013
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007014 if (!iwl3945_is_ready(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007015 IWL_DEBUG_MAC80211("leave - not ready\n");
Zhu Yi76bb77e2007-11-22 10:53:22 +08007016 ret = -EIO;
7017 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07007018 }
7019
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007020 if (unlikely(!iwl3945_param_disable_hw_scan &&
Zhu Yib481de92007-09-25 17:54:57 -07007021 test_bit(STATUS_SCANNING, &priv->status))) {
Zhu Yia0646472007-12-20 14:10:01 +08007022 IWL_DEBUG_MAC80211("leave - scanning\n");
7023 set_bit(STATUS_CONF_PENDING, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -07007024 mutex_unlock(&priv->mutex);
Zhu Yia0646472007-12-20 14:10:01 +08007025 return 0;
Zhu Yib481de92007-09-25 17:54:57 -07007026 }
7027
7028 spin_lock_irqsave(&priv->lock, flags);
7029
Johannes Berg8318d782008-01-24 19:38:38 +01007030 ch_info = iwl3945_get_channel_info(priv, conf->channel->band,
7031 conf->channel->hw_value);
Zhu Yib481de92007-09-25 17:54:57 -07007032 if (!is_channel_valid(ch_info)) {
7033 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
Johannes Berg8318d782008-01-24 19:38:38 +01007034 conf->channel->hw_value, conf->channel->band);
Zhu Yib481de92007-09-25 17:54:57 -07007035 IWL_DEBUG_MAC80211("leave - invalid channel\n");
7036 spin_unlock_irqrestore(&priv->lock, flags);
Zhu Yi76bb77e2007-11-22 10:53:22 +08007037 ret = -EINVAL;
7038 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07007039 }
7040
Johannes Berg8318d782008-01-24 19:38:38 +01007041 iwl3945_set_rxon_channel(priv, conf->channel->band, conf->channel->hw_value);
Zhu Yib481de92007-09-25 17:54:57 -07007042
Johannes Berg8318d782008-01-24 19:38:38 +01007043 iwl3945_set_flags_for_phymode(priv, conf->channel->band);
Zhu Yib481de92007-09-25 17:54:57 -07007044
7045 /* The list of supported rates and rate mask can be different
7046 * for each phymode; since the phymode may have changed, reset
7047 * the rate mask to what mac80211 lists */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007048 iwl3945_set_rate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007049
7050 spin_unlock_irqrestore(&priv->lock, flags);
7051
7052#ifdef IEEE80211_CONF_CHANNEL_SWITCH
7053 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007054 iwl3945_hw_channel_switch(priv, conf->channel);
Zhu Yi76bb77e2007-11-22 10:53:22 +08007055 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07007056 }
7057#endif
7058
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007059 iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
Zhu Yib481de92007-09-25 17:54:57 -07007060
7061 if (!conf->radio_enabled) {
7062 IWL_DEBUG_MAC80211("leave - radio disabled\n");
Zhu Yi76bb77e2007-11-22 10:53:22 +08007063 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07007064 }
7065
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007066 if (iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007067 IWL_DEBUG_MAC80211("leave - RF kill\n");
Zhu Yi76bb77e2007-11-22 10:53:22 +08007068 ret = -EIO;
7069 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07007070 }
7071
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007072 iwl3945_set_rate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007073
7074 if (memcmp(&priv->active_rxon,
7075 &priv->staging_rxon, sizeof(priv->staging_rxon)))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007076 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007077 else
7078 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
7079
7080 IWL_DEBUG_MAC80211("leave\n");
7081
Zhu Yi76bb77e2007-11-22 10:53:22 +08007082out:
Zhu Yia0646472007-12-20 14:10:01 +08007083 clear_bit(STATUS_CONF_PENDING, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -07007084 mutex_unlock(&priv->mutex);
Zhu Yi76bb77e2007-11-22 10:53:22 +08007085 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07007086}
7087
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007088static void iwl3945_config_ap(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07007089{
7090 int rc = 0;
7091
Maarten Lankhorstd986bcd2008-01-23 10:15:16 -08007092 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
Zhu Yib481de92007-09-25 17:54:57 -07007093 return;
7094
7095 /* The following should be done only at AP bring up */
7096 if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
7097
7098 /* RXON - unassoc (to set timing command) */
7099 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007100 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007101
7102 /* RXON Timing */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007103 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
7104 iwl3945_setup_rxon_timing(priv);
7105 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
Zhu Yib481de92007-09-25 17:54:57 -07007106 sizeof(priv->rxon_timing), &priv->rxon_timing);
7107 if (rc)
7108 IWL_WARNING("REPLY_RXON_TIMING failed - "
7109 "Attempting to continue.\n");
7110
7111 /* FIXME: what should be the assoc_id for AP? */
7112 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
7113 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
7114 priv->staging_rxon.flags |=
7115 RXON_FLG_SHORT_PREAMBLE_MSK;
7116 else
7117 priv->staging_rxon.flags &=
7118 ~RXON_FLG_SHORT_PREAMBLE_MSK;
7119
7120 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
7121 if (priv->assoc_capability &
7122 WLAN_CAPABILITY_SHORT_SLOT_TIME)
7123 priv->staging_rxon.flags |=
7124 RXON_FLG_SHORT_SLOT_MSK;
7125 else
7126 priv->staging_rxon.flags &=
7127 ~RXON_FLG_SHORT_SLOT_MSK;
7128
7129 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7130 priv->staging_rxon.flags &=
7131 ~RXON_FLG_SHORT_SLOT_MSK;
7132 }
7133 /* restore RXON assoc */
7134 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007135 iwl3945_commit_rxon(priv);
7136 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
Zhu Yi556f8db2007-09-27 11:27:33 +08007137 }
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007138 iwl3945_send_beacon_cmd(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007139
7140 /* FIXME - we need to add code here to detect a totally new
7141 * configuration, reset the AP, unassoc, rxon timing, assoc,
7142 * clear sta table, add BCAST sta... */
7143}
7144
Johannes Berg32bfd352007-12-19 01:31:26 +01007145static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
7146 struct ieee80211_vif *vif,
Zhu Yib481de92007-09-25 17:54:57 -07007147 struct ieee80211_if_conf *conf)
7148{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007149 struct iwl3945_priv *priv = hw->priv;
Joe Perches0795af52007-10-03 17:59:30 -07007150 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07007151 unsigned long flags;
7152 int rc;
7153
7154 if (conf == NULL)
7155 return -EIO;
7156
Johannes Berg4150c572007-09-17 01:29:23 -04007157 /* XXX: this MUST use conf->mac_addr */
7158
Zhu Yib481de92007-09-25 17:54:57 -07007159 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
7160 (!conf->beacon || !conf->ssid_len)) {
7161 IWL_DEBUG_MAC80211
7162 ("Leaving in AP mode because HostAPD is not ready.\n");
7163 return 0;
7164 }
7165
Zhu Yi5a669262008-01-14 17:46:18 -08007166 if (!iwl3945_is_alive(priv))
7167 return -EAGAIN;
7168
Zhu Yib481de92007-09-25 17:54:57 -07007169 mutex_lock(&priv->mutex);
7170
Zhu Yib481de92007-09-25 17:54:57 -07007171 if (conf->bssid)
Joe Perches0795af52007-10-03 17:59:30 -07007172 IWL_DEBUG_MAC80211("bssid: %s\n",
7173 print_mac(mac, conf->bssid));
Zhu Yib481de92007-09-25 17:54:57 -07007174
Johannes Berg4150c572007-09-17 01:29:23 -04007175/*
7176 * very dubious code was here; the probe filtering flag is never set:
7177 *
Zhu Yib481de92007-09-25 17:54:57 -07007178 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
7179 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
Johannes Berg4150c572007-09-17 01:29:23 -04007180 */
7181 if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
Zhu Yib481de92007-09-25 17:54:57 -07007182 IWL_DEBUG_MAC80211("leave - scanning\n");
7183 mutex_unlock(&priv->mutex);
7184 return 0;
7185 }
7186
Johannes Berg32bfd352007-12-19 01:31:26 +01007187 if (priv->vif != vif) {
7188 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
Zhu Yib481de92007-09-25 17:54:57 -07007189 mutex_unlock(&priv->mutex);
7190 return 0;
7191 }
7192
7193 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
7194 if (!conf->bssid) {
7195 conf->bssid = priv->mac_addr;
7196 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
Joe Perches0795af52007-10-03 17:59:30 -07007197 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
7198 print_mac(mac, conf->bssid));
Zhu Yib481de92007-09-25 17:54:57 -07007199 }
7200 if (priv->ibss_beacon)
7201 dev_kfree_skb(priv->ibss_beacon);
7202
7203 priv->ibss_beacon = conf->beacon;
7204 }
7205
Mohamed Abbasfde35712007-11-29 11:10:15 +08007206 if (iwl3945_is_rfkill(priv))
7207 goto done;
7208
Zhu Yib481de92007-09-25 17:54:57 -07007209 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
7210 !is_multicast_ether_addr(conf->bssid)) {
7211 /* If there is currently a HW scan going on in the background
7212 * then we need to cancel it else the RXON below will fail. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007213 if (iwl3945_scan_cancel_timeout(priv, 100)) {
Zhu Yib481de92007-09-25 17:54:57 -07007214 IWL_WARNING("Aborted scan still in progress "
7215 "after 100ms\n");
7216 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
7217 mutex_unlock(&priv->mutex);
7218 return -EAGAIN;
7219 }
7220 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
7221
7222 /* TODO: Audit driver for usage of these members and see
7223 * if mac80211 deprecates them (priv->bssid looks like it
7224 * shouldn't be there, but I haven't scanned the IBSS code
7225 * to verify) - jpk */
7226 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
7227
7228 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007229 iwl3945_config_ap(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007230 else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007231 rc = iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007232 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007233 iwl3945_add_station(priv,
Zhu Yi556f8db2007-09-27 11:27:33 +08007234 priv->active_rxon.bssid_addr, 1, 0);
Zhu Yib481de92007-09-25 17:54:57 -07007235 }
7236
7237 } else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007238 iwl3945_scan_cancel_timeout(priv, 100);
Zhu Yib481de92007-09-25 17:54:57 -07007239 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007240 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007241 }
7242
Mohamed Abbasfde35712007-11-29 11:10:15 +08007243 done:
Zhu Yib481de92007-09-25 17:54:57 -07007244 spin_lock_irqsave(&priv->lock, flags);
7245 if (!conf->ssid_len)
7246 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7247 else
7248 memcpy(priv->essid, conf->ssid, conf->ssid_len);
7249
7250 priv->essid_len = conf->ssid_len;
7251 spin_unlock_irqrestore(&priv->lock, flags);
7252
7253 IWL_DEBUG_MAC80211("leave\n");
7254 mutex_unlock(&priv->mutex);
7255
7256 return 0;
7257}
7258
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007259static void iwl3945_configure_filter(struct ieee80211_hw *hw,
Johannes Berg4150c572007-09-17 01:29:23 -04007260 unsigned int changed_flags,
7261 unsigned int *total_flags,
7262 int mc_count, struct dev_addr_list *mc_list)
7263{
7264 /*
7265 * XXX: dummy
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007266 * see also iwl3945_connection_init_rx_config
Johannes Berg4150c572007-09-17 01:29:23 -04007267 */
7268 *total_flags = 0;
7269}
7270
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007271static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07007272 struct ieee80211_if_init_conf *conf)
7273{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007274 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007275
7276 IWL_DEBUG_MAC80211("enter\n");
7277
7278 mutex_lock(&priv->mutex);
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08007279
Mohamed Abbasfde35712007-11-29 11:10:15 +08007280 if (iwl3945_is_ready_rf(priv)) {
7281 iwl3945_scan_cancel_timeout(priv, 100);
7282 cancel_delayed_work(&priv->post_associate);
7283 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7284 iwl3945_commit_rxon(priv);
7285 }
Johannes Berg32bfd352007-12-19 01:31:26 +01007286 if (priv->vif == conf->vif) {
7287 priv->vif = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07007288 memset(priv->bssid, 0, ETH_ALEN);
7289 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7290 priv->essid_len = 0;
7291 }
7292 mutex_unlock(&priv->mutex);
7293
7294 IWL_DEBUG_MAC80211("leave\n");
Zhu Yib481de92007-09-25 17:54:57 -07007295}
7296
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007297static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
Zhu Yib481de92007-09-25 17:54:57 -07007298{
7299 int rc = 0;
7300 unsigned long flags;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007301 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007302
7303 IWL_DEBUG_MAC80211("enter\n");
7304
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007305 mutex_lock(&priv->mutex);
Zhu Yib481de92007-09-25 17:54:57 -07007306 spin_lock_irqsave(&priv->lock, flags);
7307
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007308 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007309 rc = -EIO;
7310 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
7311 goto out_unlock;
7312 }
7313
7314 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
7315 rc = -EIO;
7316 IWL_ERROR("ERROR: APs don't scan\n");
7317 goto out_unlock;
7318 }
7319
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08007320 /* we don't schedule scan within next_scan_jiffies period */
7321 if (priv->next_scan_jiffies &&
7322 time_after(priv->next_scan_jiffies, jiffies)) {
7323 rc = -EAGAIN;
7324 goto out_unlock;
7325 }
Zhu Yib481de92007-09-25 17:54:57 -07007326 /* if we just finished scan ask for delay */
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08007327 if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
7328 IWL_DELAY_NEXT_SCAN, jiffies)) {
Zhu Yib481de92007-09-25 17:54:57 -07007329 rc = -EAGAIN;
7330 goto out_unlock;
7331 }
7332 if (len) {
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08007333 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007334 iwl3945_escape_essid(ssid, len), (int)len);
Zhu Yib481de92007-09-25 17:54:57 -07007335
7336 priv->one_direct_scan = 1;
7337 priv->direct_ssid_len = (u8)
7338 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
7339 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08007340 } else
7341 priv->one_direct_scan = 0;
Zhu Yib481de92007-09-25 17:54:57 -07007342
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007343 rc = iwl3945_scan_initiate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007344
7345 IWL_DEBUG_MAC80211("leave\n");
7346
7347out_unlock:
7348 spin_unlock_irqrestore(&priv->lock, flags);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007349 mutex_unlock(&priv->mutex);
Zhu Yib481de92007-09-25 17:54:57 -07007350
7351 return rc;
7352}
7353
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007354static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
Zhu Yib481de92007-09-25 17:54:57 -07007355 const u8 *local_addr, const u8 *addr,
7356 struct ieee80211_key_conf *key)
7357{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007358 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007359 int rc = 0;
7360 u8 sta_id;
7361
7362 IWL_DEBUG_MAC80211("enter\n");
7363
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007364 if (!iwl3945_param_hwcrypto) {
Zhu Yib481de92007-09-25 17:54:57 -07007365 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7366 return -EOPNOTSUPP;
7367 }
7368
7369 if (is_zero_ether_addr(addr))
7370 /* only support pairwise keys */
7371 return -EOPNOTSUPP;
7372
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007373 sta_id = iwl3945_hw_find_station(priv, addr);
Zhu Yib481de92007-09-25 17:54:57 -07007374 if (sta_id == IWL_INVALID_STATION) {
Joe Perches0795af52007-10-03 17:59:30 -07007375 DECLARE_MAC_BUF(mac);
7376
7377 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
7378 print_mac(mac, addr));
Zhu Yib481de92007-09-25 17:54:57 -07007379 return -EINVAL;
7380 }
7381
7382 mutex_lock(&priv->mutex);
7383
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007384 iwl3945_scan_cancel_timeout(priv, 100);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007385
Zhu Yib481de92007-09-25 17:54:57 -07007386 switch (cmd) {
7387 case SET_KEY:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007388 rc = iwl3945_update_sta_key_info(priv, key, sta_id);
Zhu Yib481de92007-09-25 17:54:57 -07007389 if (!rc) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007390 iwl3945_set_rxon_hwcrypto(priv, 1);
7391 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007392 key->hw_key_idx = sta_id;
7393 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
7394 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
7395 }
7396 break;
7397 case DISABLE_KEY:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007398 rc = iwl3945_clear_sta_key_info(priv, sta_id);
Zhu Yib481de92007-09-25 17:54:57 -07007399 if (!rc) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007400 iwl3945_set_rxon_hwcrypto(priv, 0);
7401 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007402 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
7403 }
7404 break;
7405 default:
7406 rc = -EINVAL;
7407 }
7408
7409 IWL_DEBUG_MAC80211("leave\n");
7410 mutex_unlock(&priv->mutex);
7411
7412 return rc;
7413}
7414
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007415static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, int queue,
Zhu Yib481de92007-09-25 17:54:57 -07007416 const struct ieee80211_tx_queue_params *params)
7417{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007418 struct iwl3945_priv *priv = hw->priv;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007419#ifdef CONFIG_IWL3945_QOS
Zhu Yib481de92007-09-25 17:54:57 -07007420 unsigned long flags;
7421 int q;
Reinette Chatre0054b342007-11-29 11:09:42 +08007422#endif /* CONFIG_IWL3945_QOS */
Zhu Yib481de92007-09-25 17:54:57 -07007423
7424 IWL_DEBUG_MAC80211("enter\n");
7425
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007426 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007427 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7428 return -EIO;
7429 }
7430
7431 if (queue >= AC_NUM) {
7432 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7433 return 0;
7434 }
7435
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007436#ifdef CONFIG_IWL3945_QOS
Zhu Yib481de92007-09-25 17:54:57 -07007437 if (!priv->qos_data.qos_enable) {
7438 priv->qos_data.qos_active = 0;
7439 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
7440 return 0;
7441 }
7442 q = AC_NUM - 1 - queue;
7443
7444 spin_lock_irqsave(&priv->lock, flags);
7445
7446 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7447 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7448 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7449 priv->qos_data.def_qos_parm.ac[q].edca_txop =
7450 cpu_to_le16((params->burst_time * 100));
7451
7452 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7453 priv->qos_data.qos_active = 1;
7454
7455 spin_unlock_irqrestore(&priv->lock, flags);
7456
7457 mutex_lock(&priv->mutex);
7458 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007459 iwl3945_activate_qos(priv, 1);
7460 else if (priv->assoc_id && iwl3945_is_associated(priv))
7461 iwl3945_activate_qos(priv, 0);
Zhu Yib481de92007-09-25 17:54:57 -07007462
7463 mutex_unlock(&priv->mutex);
7464
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007465#endif /*CONFIG_IWL3945_QOS */
Zhu Yib481de92007-09-25 17:54:57 -07007466
7467 IWL_DEBUG_MAC80211("leave\n");
7468 return 0;
7469}
7470
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007471static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07007472 struct ieee80211_tx_queue_stats *stats)
7473{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007474 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007475 int i, avail;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007476 struct iwl3945_tx_queue *txq;
7477 struct iwl3945_queue *q;
Zhu Yib481de92007-09-25 17:54:57 -07007478 unsigned long flags;
7479
7480 IWL_DEBUG_MAC80211("enter\n");
7481
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007482 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007483 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7484 return -EIO;
7485 }
7486
7487 spin_lock_irqsave(&priv->lock, flags);
7488
7489 for (i = 0; i < AC_NUM; i++) {
7490 txq = &priv->txq[i];
7491 q = &txq->q;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007492 avail = iwl3945_queue_space(q);
Zhu Yib481de92007-09-25 17:54:57 -07007493
7494 stats->data[i].len = q->n_window - avail;
7495 stats->data[i].limit = q->n_window - q->high_mark;
7496 stats->data[i].count = q->n_window;
7497
7498 }
7499 spin_unlock_irqrestore(&priv->lock, flags);
7500
7501 IWL_DEBUG_MAC80211("leave\n");
7502
7503 return 0;
7504}
7505
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007506static int iwl3945_mac_get_stats(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07007507 struct ieee80211_low_level_stats *stats)
7508{
7509 IWL_DEBUG_MAC80211("enter\n");
7510 IWL_DEBUG_MAC80211("leave\n");
7511
7512 return 0;
7513}
7514
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007515static u64 iwl3945_mac_get_tsf(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07007516{
7517 IWL_DEBUG_MAC80211("enter\n");
7518 IWL_DEBUG_MAC80211("leave\n");
7519
7520 return 0;
7521}
7522
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007523static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07007524{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007525 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007526 unsigned long flags;
7527
7528 mutex_lock(&priv->mutex);
7529 IWL_DEBUG_MAC80211("enter\n");
7530
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007531#ifdef CONFIG_IWL3945_QOS
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007532 iwl3945_reset_qos(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007533#endif
7534 cancel_delayed_work(&priv->post_associate);
7535
7536 spin_lock_irqsave(&priv->lock, flags);
7537 priv->assoc_id = 0;
7538 priv->assoc_capability = 0;
7539 priv->call_post_assoc_from_beacon = 0;
7540
7541 /* new association get rid of ibss beacon skb */
7542 if (priv->ibss_beacon)
7543 dev_kfree_skb(priv->ibss_beacon);
7544
7545 priv->ibss_beacon = NULL;
7546
7547 priv->beacon_int = priv->hw->conf.beacon_int;
7548 priv->timestamp1 = 0;
7549 priv->timestamp0 = 0;
7550 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
7551 priv->beacon_int = 0;
7552
7553 spin_unlock_irqrestore(&priv->lock, flags);
7554
Mohamed Abbasfde35712007-11-29 11:10:15 +08007555 if (!iwl3945_is_ready_rf(priv)) {
7556 IWL_DEBUG_MAC80211("leave - not ready\n");
7557 mutex_unlock(&priv->mutex);
7558 return;
7559 }
7560
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007561 /* we are restarting association process
7562 * clear RXON_FILTER_ASSOC_MSK bit
7563 */
7564 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007565 iwl3945_scan_cancel_timeout(priv, 100);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007566 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007567 iwl3945_commit_rxon(priv);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007568 }
7569
Zhu Yib481de92007-09-25 17:54:57 -07007570 /* Per mac80211.h: This is only used in IBSS mode... */
7571 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007572
Zhu Yib481de92007-09-25 17:54:57 -07007573 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
7574 mutex_unlock(&priv->mutex);
7575 return;
7576 }
7577
Zhu Yib481de92007-09-25 17:54:57 -07007578 priv->only_active_channel = 0;
7579
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007580 iwl3945_set_rate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007581
7582 mutex_unlock(&priv->mutex);
7583
7584 IWL_DEBUG_MAC80211("leave\n");
7585
7586}
7587
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007588static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
Zhu Yib481de92007-09-25 17:54:57 -07007589 struct ieee80211_tx_control *control)
7590{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007591 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007592 unsigned long flags;
7593
7594 mutex_lock(&priv->mutex);
7595 IWL_DEBUG_MAC80211("enter\n");
7596
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007597 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007598 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7599 mutex_unlock(&priv->mutex);
7600 return -EIO;
7601 }
7602
7603 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
7604 IWL_DEBUG_MAC80211("leave - not IBSS\n");
7605 mutex_unlock(&priv->mutex);
7606 return -EIO;
7607 }
7608
7609 spin_lock_irqsave(&priv->lock, flags);
7610
7611 if (priv->ibss_beacon)
7612 dev_kfree_skb(priv->ibss_beacon);
7613
7614 priv->ibss_beacon = skb;
7615
7616 priv->assoc_id = 0;
7617
7618 IWL_DEBUG_MAC80211("leave\n");
7619 spin_unlock_irqrestore(&priv->lock, flags);
7620
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007621#ifdef CONFIG_IWL3945_QOS
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007622 iwl3945_reset_qos(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007623#endif
7624
7625 queue_work(priv->workqueue, &priv->post_associate.work);
7626
7627 mutex_unlock(&priv->mutex);
7628
7629 return 0;
7630}
7631
7632/*****************************************************************************
7633 *
7634 * sysfs attributes
7635 *
7636 *****************************************************************************/
7637
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007638#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07007639
7640/*
7641 * The following adds a new attribute to the sysfs representation
7642 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
7643 * used for controlling the debug level.
7644 *
7645 * See the level definitions in iwl for details.
7646 */
7647
7648static ssize_t show_debug_level(struct device_driver *d, char *buf)
7649{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007650 return sprintf(buf, "0x%08X\n", iwl3945_debug_level);
Zhu Yib481de92007-09-25 17:54:57 -07007651}
7652static ssize_t store_debug_level(struct device_driver *d,
7653 const char *buf, size_t count)
7654{
7655 char *p = (char *)buf;
7656 u32 val;
7657
7658 val = simple_strtoul(p, &p, 0);
7659 if (p == buf)
7660 printk(KERN_INFO DRV_NAME
7661 ": %s is not in hex or decimal form.\n", buf);
7662 else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007663 iwl3945_debug_level = val;
Zhu Yib481de92007-09-25 17:54:57 -07007664
7665 return strnlen(buf, count);
7666}
7667
7668static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
7669 show_debug_level, store_debug_level);
7670
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007671#endif /* CONFIG_IWL3945_DEBUG */
Zhu Yib481de92007-09-25 17:54:57 -07007672
7673static ssize_t show_rf_kill(struct device *d,
7674 struct device_attribute *attr, char *buf)
7675{
7676 /*
7677 * 0 - RF kill not enabled
7678 * 1 - SW based RF kill active (sysfs)
7679 * 2 - HW based RF kill active
7680 * 3 - Both HW and SW based RF kill active
7681 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007682 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007683 int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
7684 (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
7685
7686 return sprintf(buf, "%i\n", val);
7687}
7688
7689static ssize_t store_rf_kill(struct device *d,
7690 struct device_attribute *attr,
7691 const char *buf, size_t count)
7692{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007693 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007694
7695 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007696 iwl3945_radio_kill_sw(priv, buf[0] == '1');
Zhu Yib481de92007-09-25 17:54:57 -07007697 mutex_unlock(&priv->mutex);
7698
7699 return count;
7700}
7701
7702static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
7703
7704static ssize_t show_temperature(struct device *d,
7705 struct device_attribute *attr, char *buf)
7706{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007707 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007708
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007709 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07007710 return -EAGAIN;
7711
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007712 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
Zhu Yib481de92007-09-25 17:54:57 -07007713}
7714
7715static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
7716
7717static ssize_t show_rs_window(struct device *d,
7718 struct device_attribute *attr,
7719 char *buf)
7720{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007721 struct iwl3945_priv *priv = d->driver_data;
7722 return iwl3945_fill_rs_info(priv->hw, buf, IWL_AP_ID);
Zhu Yib481de92007-09-25 17:54:57 -07007723}
7724static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
7725
7726static ssize_t show_tx_power(struct device *d,
7727 struct device_attribute *attr, char *buf)
7728{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007729 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007730 return sprintf(buf, "%d\n", priv->user_txpower_limit);
7731}
7732
7733static ssize_t store_tx_power(struct device *d,
7734 struct device_attribute *attr,
7735 const char *buf, size_t count)
7736{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007737 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007738 char *p = (char *)buf;
7739 u32 val;
7740
7741 val = simple_strtoul(p, &p, 10);
7742 if (p == buf)
7743 printk(KERN_INFO DRV_NAME
7744 ": %s is not in decimal form.\n", buf);
7745 else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007746 iwl3945_hw_reg_set_txpower(priv, val);
Zhu Yib481de92007-09-25 17:54:57 -07007747
7748 return count;
7749}
7750
7751static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
7752
7753static ssize_t show_flags(struct device *d,
7754 struct device_attribute *attr, char *buf)
7755{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007756 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007757
7758 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
7759}
7760
7761static ssize_t store_flags(struct device *d,
7762 struct device_attribute *attr,
7763 const char *buf, size_t count)
7764{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007765 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007766 u32 flags = simple_strtoul(buf, NULL, 0);
7767
7768 mutex_lock(&priv->mutex);
7769 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
7770 /* Cancel any currently running scans... */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007771 if (iwl3945_scan_cancel_timeout(priv, 100))
Zhu Yib481de92007-09-25 17:54:57 -07007772 IWL_WARNING("Could not cancel scan.\n");
7773 else {
7774 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
7775 flags);
7776 priv->staging_rxon.flags = cpu_to_le32(flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007777 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007778 }
7779 }
7780 mutex_unlock(&priv->mutex);
7781
7782 return count;
7783}
7784
7785static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
7786
7787static ssize_t show_filter_flags(struct device *d,
7788 struct device_attribute *attr, char *buf)
7789{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007790 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007791
7792 return sprintf(buf, "0x%04X\n",
7793 le32_to_cpu(priv->active_rxon.filter_flags));
7794}
7795
7796static ssize_t store_filter_flags(struct device *d,
7797 struct device_attribute *attr,
7798 const char *buf, size_t count)
7799{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007800 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007801 u32 filter_flags = simple_strtoul(buf, NULL, 0);
7802
7803 mutex_lock(&priv->mutex);
7804 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
7805 /* Cancel any currently running scans... */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007806 if (iwl3945_scan_cancel_timeout(priv, 100))
Zhu Yib481de92007-09-25 17:54:57 -07007807 IWL_WARNING("Could not cancel scan.\n");
7808 else {
7809 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
7810 "0x%04X\n", filter_flags);
7811 priv->staging_rxon.filter_flags =
7812 cpu_to_le32(filter_flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007813 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007814 }
7815 }
7816 mutex_unlock(&priv->mutex);
7817
7818 return count;
7819}
7820
7821static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
7822 store_filter_flags);
7823
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007824#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -07007825
7826static ssize_t show_measurement(struct device *d,
7827 struct device_attribute *attr, char *buf)
7828{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007829 struct iwl3945_priv *priv = dev_get_drvdata(d);
7830 struct iwl3945_spectrum_notification measure_report;
Zhu Yib481de92007-09-25 17:54:57 -07007831 u32 size = sizeof(measure_report), len = 0, ofs = 0;
7832 u8 *data = (u8 *) & measure_report;
7833 unsigned long flags;
7834
7835 spin_lock_irqsave(&priv->lock, flags);
7836 if (!(priv->measurement_status & MEASUREMENT_READY)) {
7837 spin_unlock_irqrestore(&priv->lock, flags);
7838 return 0;
7839 }
7840 memcpy(&measure_report, &priv->measure_report, size);
7841 priv->measurement_status = 0;
7842 spin_unlock_irqrestore(&priv->lock, flags);
7843
7844 while (size && (PAGE_SIZE - len)) {
7845 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7846 PAGE_SIZE - len, 1);
7847 len = strlen(buf);
7848 if (PAGE_SIZE - len)
7849 buf[len++] = '\n';
7850
7851 ofs += 16;
7852 size -= min(size, 16U);
7853 }
7854
7855 return len;
7856}
7857
7858static ssize_t store_measurement(struct device *d,
7859 struct device_attribute *attr,
7860 const char *buf, size_t count)
7861{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007862 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007863 struct ieee80211_measurement_params params = {
7864 .channel = le16_to_cpu(priv->active_rxon.channel),
7865 .start_time = cpu_to_le64(priv->last_tsf),
7866 .duration = cpu_to_le16(1),
7867 };
7868 u8 type = IWL_MEASURE_BASIC;
7869 u8 buffer[32];
7870 u8 channel;
7871
7872 if (count) {
7873 char *p = buffer;
7874 strncpy(buffer, buf, min(sizeof(buffer), count));
7875 channel = simple_strtoul(p, NULL, 0);
7876 if (channel)
7877 params.channel = channel;
7878
7879 p = buffer;
7880 while (*p && *p != ' ')
7881 p++;
7882 if (*p)
7883 type = simple_strtoul(p + 1, NULL, 0);
7884 }
7885
7886 IWL_DEBUG_INFO("Invoking measurement of type %d on "
7887 "channel %d (for '%s')\n", type, params.channel, buf);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007888 iwl3945_get_measurement(priv, &params, type);
Zhu Yib481de92007-09-25 17:54:57 -07007889
7890 return count;
7891}
7892
7893static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
7894 show_measurement, store_measurement);
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007895#endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
Zhu Yib481de92007-09-25 17:54:57 -07007896
7897static ssize_t show_rate(struct device *d,
7898 struct device_attribute *attr, char *buf)
7899{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007900 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007901 unsigned long flags;
7902 int i;
7903
7904 spin_lock_irqsave(&priv->sta_lock, flags);
7905 if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
7906 i = priv->stations[IWL_AP_ID].current_rate.s.rate;
7907 else
7908 i = priv->stations[IWL_STA_ID].current_rate.s.rate;
7909 spin_unlock_irqrestore(&priv->sta_lock, flags);
7910
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007911 i = iwl3945_rate_index_from_plcp(i);
Zhu Yib481de92007-09-25 17:54:57 -07007912 if (i == -1)
7913 return sprintf(buf, "0\n");
7914
7915 return sprintf(buf, "%d%s\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007916 (iwl3945_rates[i].ieee >> 1),
7917 (iwl3945_rates[i].ieee & 0x1) ? ".5" : "");
Zhu Yib481de92007-09-25 17:54:57 -07007918}
7919
7920static DEVICE_ATTR(rate, S_IRUSR, show_rate, NULL);
7921
7922static ssize_t store_retry_rate(struct device *d,
7923 struct device_attribute *attr,
7924 const char *buf, size_t count)
7925{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007926 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007927
7928 priv->retry_rate = simple_strtoul(buf, NULL, 0);
7929 if (priv->retry_rate <= 0)
7930 priv->retry_rate = 1;
7931
7932 return count;
7933}
7934
7935static ssize_t show_retry_rate(struct device *d,
7936 struct device_attribute *attr, char *buf)
7937{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007938 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007939 return sprintf(buf, "%d", priv->retry_rate);
7940}
7941
7942static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
7943 store_retry_rate);
7944
7945static ssize_t store_power_level(struct device *d,
7946 struct device_attribute *attr,
7947 const char *buf, size_t count)
7948{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007949 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007950 int rc;
7951 int mode;
7952
7953 mode = simple_strtoul(buf, NULL, 0);
7954 mutex_lock(&priv->mutex);
7955
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007956 if (!iwl3945_is_ready(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007957 rc = -EAGAIN;
7958 goto out;
7959 }
7960
7961 if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
7962 mode = IWL_POWER_AC;
7963 else
7964 mode |= IWL_POWER_ENABLED;
7965
7966 if (mode != priv->power_mode) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007967 rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
Zhu Yib481de92007-09-25 17:54:57 -07007968 if (rc) {
7969 IWL_DEBUG_MAC80211("failed setting power mode.\n");
7970 goto out;
7971 }
7972 priv->power_mode = mode;
7973 }
7974
7975 rc = count;
7976
7977 out:
7978 mutex_unlock(&priv->mutex);
7979 return rc;
7980}
7981
7982#define MAX_WX_STRING 80
7983
7984/* Values are in microsecond */
7985static const s32 timeout_duration[] = {
7986 350000,
7987 250000,
7988 75000,
7989 37000,
7990 25000,
7991};
7992static const s32 period_duration[] = {
7993 400000,
7994 700000,
7995 1000000,
7996 1000000,
7997 1000000
7998};
7999
8000static ssize_t show_power_level(struct device *d,
8001 struct device_attribute *attr, char *buf)
8002{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008003 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008004 int level = IWL_POWER_LEVEL(priv->power_mode);
8005 char *p = buf;
8006
8007 p += sprintf(p, "%d ", level);
8008 switch (level) {
8009 case IWL_POWER_MODE_CAM:
8010 case IWL_POWER_AC:
8011 p += sprintf(p, "(AC)");
8012 break;
8013 case IWL_POWER_BATTERY:
8014 p += sprintf(p, "(BATTERY)");
8015 break;
8016 default:
8017 p += sprintf(p,
8018 "(Timeout %dms, Period %dms)",
8019 timeout_duration[level - 1] / 1000,
8020 period_duration[level - 1] / 1000);
8021 }
8022
8023 if (!(priv->power_mode & IWL_POWER_ENABLED))
8024 p += sprintf(p, " OFF\n");
8025 else
8026 p += sprintf(p, " \n");
8027
8028 return (p - buf + 1);
8029
8030}
8031
8032static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
8033 store_power_level);
8034
8035static ssize_t show_channels(struct device *d,
8036 struct device_attribute *attr, char *buf)
8037{
Johannes Berg8318d782008-01-24 19:38:38 +01008038 /* all this shit doesn't belong into sysfs anyway */
8039 return 0;
Zhu Yib481de92007-09-25 17:54:57 -07008040}
8041
8042static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
8043
8044static ssize_t show_statistics(struct device *d,
8045 struct device_attribute *attr, char *buf)
8046{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008047 struct iwl3945_priv *priv = dev_get_drvdata(d);
8048 u32 size = sizeof(struct iwl3945_notif_statistics);
Zhu Yib481de92007-09-25 17:54:57 -07008049 u32 len = 0, ofs = 0;
8050 u8 *data = (u8 *) & priv->statistics;
8051 int rc = 0;
8052
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008053 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07008054 return -EAGAIN;
8055
8056 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008057 rc = iwl3945_send_statistics_request(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008058 mutex_unlock(&priv->mutex);
8059
8060 if (rc) {
8061 len = sprintf(buf,
8062 "Error sending statistics request: 0x%08X\n", rc);
8063 return len;
8064 }
8065
8066 while (size && (PAGE_SIZE - len)) {
8067 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
8068 PAGE_SIZE - len, 1);
8069 len = strlen(buf);
8070 if (PAGE_SIZE - len)
8071 buf[len++] = '\n';
8072
8073 ofs += 16;
8074 size -= min(size, 16U);
8075 }
8076
8077 return len;
8078}
8079
8080static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
8081
8082static ssize_t show_antenna(struct device *d,
8083 struct device_attribute *attr, char *buf)
8084{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008085 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008086
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008087 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07008088 return -EAGAIN;
8089
8090 return sprintf(buf, "%d\n", priv->antenna);
8091}
8092
8093static ssize_t store_antenna(struct device *d,
8094 struct device_attribute *attr,
8095 const char *buf, size_t count)
8096{
8097 int ant;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008098 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008099
8100 if (count == 0)
8101 return 0;
8102
8103 if (sscanf(buf, "%1i", &ant) != 1) {
8104 IWL_DEBUG_INFO("not in hex or decimal form.\n");
8105 return count;
8106 }
8107
8108 if ((ant >= 0) && (ant <= 2)) {
8109 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008110 priv->antenna = (enum iwl3945_antenna)ant;
Zhu Yib481de92007-09-25 17:54:57 -07008111 } else
8112 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
8113
8114
8115 return count;
8116}
8117
8118static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
8119
8120static ssize_t show_status(struct device *d,
8121 struct device_attribute *attr, char *buf)
8122{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008123 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
8124 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07008125 return -EAGAIN;
8126 return sprintf(buf, "0x%08x\n", (int)priv->status);
8127}
8128
8129static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
8130
8131static ssize_t dump_error_log(struct device *d,
8132 struct device_attribute *attr,
8133 const char *buf, size_t count)
8134{
8135 char *p = (char *)buf;
8136
8137 if (p[0] == '1')
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008138 iwl3945_dump_nic_error_log((struct iwl3945_priv *)d->driver_data);
Zhu Yib481de92007-09-25 17:54:57 -07008139
8140 return strnlen(buf, count);
8141}
8142
8143static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
8144
8145static ssize_t dump_event_log(struct device *d,
8146 struct device_attribute *attr,
8147 const char *buf, size_t count)
8148{
8149 char *p = (char *)buf;
8150
8151 if (p[0] == '1')
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008152 iwl3945_dump_nic_event_log((struct iwl3945_priv *)d->driver_data);
Zhu Yib481de92007-09-25 17:54:57 -07008153
8154 return strnlen(buf, count);
8155}
8156
8157static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
8158
8159/*****************************************************************************
8160 *
8161 * driver setup and teardown
8162 *
8163 *****************************************************************************/
8164
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008165static void iwl3945_setup_deferred_work(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07008166{
8167 priv->workqueue = create_workqueue(DRV_NAME);
8168
8169 init_waitqueue_head(&priv->wait_command_queue);
8170
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008171 INIT_WORK(&priv->up, iwl3945_bg_up);
8172 INIT_WORK(&priv->restart, iwl3945_bg_restart);
8173 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
8174 INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
8175 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
8176 INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
8177 INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill);
8178 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
8179 INIT_DELAYED_WORK(&priv->post_associate, iwl3945_bg_post_associate);
8180 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
8181 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
8182 INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);
Zhu Yib481de92007-09-25 17:54:57 -07008183
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008184 iwl3945_hw_setup_deferred_work(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008185
8186 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008187 iwl3945_irq_tasklet, (unsigned long)priv);
Zhu Yib481de92007-09-25 17:54:57 -07008188}
8189
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008190static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07008191{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008192 iwl3945_hw_cancel_deferred_work(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008193
Joonwoo Parke47eb6a2007-11-29 10:42:49 +09008194 cancel_delayed_work_sync(&priv->init_alive_start);
Zhu Yib481de92007-09-25 17:54:57 -07008195 cancel_delayed_work(&priv->scan_check);
8196 cancel_delayed_work(&priv->alive_start);
8197 cancel_delayed_work(&priv->post_associate);
8198 cancel_work_sync(&priv->beacon_update);
8199}
8200
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008201static struct attribute *iwl3945_sysfs_entries[] = {
Zhu Yib481de92007-09-25 17:54:57 -07008202 &dev_attr_antenna.attr,
8203 &dev_attr_channels.attr,
8204 &dev_attr_dump_errors.attr,
8205 &dev_attr_dump_events.attr,
8206 &dev_attr_flags.attr,
8207 &dev_attr_filter_flags.attr,
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008208#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -07008209 &dev_attr_measurement.attr,
8210#endif
8211 &dev_attr_power_level.attr,
8212 &dev_attr_rate.attr,
8213 &dev_attr_retry_rate.attr,
8214 &dev_attr_rf_kill.attr,
8215 &dev_attr_rs_window.attr,
8216 &dev_attr_statistics.attr,
8217 &dev_attr_status.attr,
8218 &dev_attr_temperature.attr,
Zhu Yib481de92007-09-25 17:54:57 -07008219 &dev_attr_tx_power.attr,
8220
8221 NULL
8222};
8223
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008224static struct attribute_group iwl3945_attribute_group = {
Zhu Yib481de92007-09-25 17:54:57 -07008225 .name = NULL, /* put in device directory */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008226 .attrs = iwl3945_sysfs_entries,
Zhu Yib481de92007-09-25 17:54:57 -07008227};
8228
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008229static struct ieee80211_ops iwl3945_hw_ops = {
8230 .tx = iwl3945_mac_tx,
8231 .start = iwl3945_mac_start,
8232 .stop = iwl3945_mac_stop,
8233 .add_interface = iwl3945_mac_add_interface,
8234 .remove_interface = iwl3945_mac_remove_interface,
8235 .config = iwl3945_mac_config,
8236 .config_interface = iwl3945_mac_config_interface,
8237 .configure_filter = iwl3945_configure_filter,
8238 .set_key = iwl3945_mac_set_key,
8239 .get_stats = iwl3945_mac_get_stats,
8240 .get_tx_stats = iwl3945_mac_get_tx_stats,
8241 .conf_tx = iwl3945_mac_conf_tx,
8242 .get_tsf = iwl3945_mac_get_tsf,
8243 .reset_tsf = iwl3945_mac_reset_tsf,
8244 .beacon_update = iwl3945_mac_beacon_update,
8245 .hw_scan = iwl3945_mac_hw_scan
Zhu Yib481de92007-09-25 17:54:57 -07008246};
8247
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008248static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
Zhu Yib481de92007-09-25 17:54:57 -07008249{
8250 int err = 0;
8251 u32 pci_id;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008252 struct iwl3945_priv *priv;
Zhu Yib481de92007-09-25 17:54:57 -07008253 struct ieee80211_hw *hw;
8254 int i;
Zhu Yi5a669262008-01-14 17:46:18 -08008255 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07008256
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008257 /* Disabling hardware scan means that mac80211 will perform scans
8258 * "the hard way", rather than using device's scan. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008259 if (iwl3945_param_disable_hw_scan) {
Zhu Yib481de92007-09-25 17:54:57 -07008260 IWL_DEBUG_INFO("Disabling hw_scan\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008261 iwl3945_hw_ops.hw_scan = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07008262 }
8263
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008264 if ((iwl3945_param_queues_num > IWL_MAX_NUM_QUEUES) ||
8265 (iwl3945_param_queues_num < IWL_MIN_NUM_QUEUES)) {
Zhu Yib481de92007-09-25 17:54:57 -07008266 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
8267 IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
8268 err = -EINVAL;
8269 goto out;
8270 }
8271
8272 /* mac80211 allocates memory for this device instance, including
8273 * space for this driver's private structure */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008274 hw = ieee80211_alloc_hw(sizeof(struct iwl3945_priv), &iwl3945_hw_ops);
Zhu Yib481de92007-09-25 17:54:57 -07008275 if (hw == NULL) {
8276 IWL_ERROR("Can not allocate network device\n");
8277 err = -ENOMEM;
8278 goto out;
8279 }
8280 SET_IEEE80211_DEV(hw, &pdev->dev);
8281
Johannes Bergf51359a2007-10-28 14:53:36 +01008282 hw->rate_control_algorithm = "iwl-3945-rs";
8283
Zhu Yib481de92007-09-25 17:54:57 -07008284 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
8285 priv = hw->priv;
8286 priv->hw = hw;
8287
8288 priv->pci_dev = pdev;
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008289
8290 /* Select antenna (may be helpful if only one antenna is connected) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008291 priv->antenna = (enum iwl3945_antenna)iwl3945_param_antenna;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008292#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008293 iwl3945_debug_level = iwl3945_param_debug;
Zhu Yib481de92007-09-25 17:54:57 -07008294 atomic_set(&priv->restrict_refcnt, 0);
8295#endif
8296 priv->retry_rate = 1;
8297
8298 priv->ibss_beacon = NULL;
8299
8300 /* Tell mac80211 and its clients (e.g. Wireless Extensions)
8301 * the range of signal quality values that we'll provide.
8302 * Negative values for level/noise indicate that we'll provide dBm.
8303 * For WE, at least, non-0 values here *enable* display of values
8304 * in app (iwconfig). */
8305 hw->max_rssi = -20; /* signal level, negative indicates dBm */
8306 hw->max_noise = -20; /* noise level, negative indicates dBm */
8307 hw->max_signal = 100; /* link quality indication (%) */
8308
8309 /* Tell mac80211 our Tx characteristics */
8310 hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
8311
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008312 /* 4 EDCA QOS priorities */
Zhu Yib481de92007-09-25 17:54:57 -07008313 hw->queues = 4;
8314
8315 spin_lock_init(&priv->lock);
8316 spin_lock_init(&priv->power_data.lock);
8317 spin_lock_init(&priv->sta_lock);
8318 spin_lock_init(&priv->hcmd_lock);
8319
8320 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
8321 INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
8322
8323 INIT_LIST_HEAD(&priv->free_frames);
8324
8325 mutex_init(&priv->mutex);
8326 if (pci_enable_device(pdev)) {
8327 err = -ENODEV;
8328 goto out_ieee80211_free_hw;
8329 }
8330
8331 pci_set_master(pdev);
8332
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008333 /* Clear the driver's (not device's) station table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008334 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008335
8336 priv->data_retry_limit = -1;
8337 priv->ieee_channels = NULL;
8338 priv->ieee_rates = NULL;
Johannes Berg8318d782008-01-24 19:38:38 +01008339 priv->band = IEEE80211_BAND_2GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07008340
8341 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
8342 if (!err)
8343 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
8344 if (err) {
8345 printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
8346 goto out_pci_disable_device;
8347 }
8348
8349 pci_set_drvdata(pdev, priv);
8350 err = pci_request_regions(pdev, DRV_NAME);
8351 if (err)
8352 goto out_pci_disable_device;
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008353
Zhu Yib481de92007-09-25 17:54:57 -07008354 /* We disable the RETRY_TIMEOUT register (0x41) to keep
8355 * PCI Tx retries from interfering with C3 CPU state */
8356 pci_write_config_byte(pdev, 0x41, 0x00);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008357
Zhu Yib481de92007-09-25 17:54:57 -07008358 priv->hw_base = pci_iomap(pdev, 0, 0);
8359 if (!priv->hw_base) {
8360 err = -ENODEV;
8361 goto out_pci_release_regions;
8362 }
8363
8364 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
8365 (unsigned long long) pci_resource_len(pdev, 0));
8366 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
8367
8368 /* Initialize module parameter values here */
8369
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008370 /* Disable radio (SW RF KILL) via parameter when loading driver */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008371 if (iwl3945_param_disable) {
Zhu Yib481de92007-09-25 17:54:57 -07008372 set_bit(STATUS_RF_KILL_SW, &priv->status);
8373 IWL_DEBUG_INFO("Radio disabled.\n");
8374 }
8375
8376 priv->iw_mode = IEEE80211_IF_TYPE_STA;
8377
8378 pci_id =
8379 (priv->pci_dev->device << 16) | priv->pci_dev->subsystem_device;
8380
8381 switch (pci_id) {
8382 case 0x42221005: /* 0x4222 0x8086 0x1005 is BG SKU */
8383 case 0x42221034: /* 0x4222 0x8086 0x1034 is BG SKU */
8384 case 0x42271014: /* 0x4227 0x8086 0x1014 is BG SKU */
8385 case 0x42221044: /* 0x4222 0x8086 0x1044 is BG SKU */
8386 priv->is_abg = 0;
8387 break;
8388
8389 /*
8390 * Rest are assumed ABG SKU -- if this is not the
8391 * case then the card will get the wrong 'Detected'
8392 * line in the kernel log however the code that
8393 * initializes the GEO table will detect no A-band
8394 * channels and remove the is_abg mask.
8395 */
8396 default:
8397 priv->is_abg = 1;
8398 break;
8399 }
8400
8401 printk(KERN_INFO DRV_NAME
8402 ": Detected Intel PRO/Wireless 3945%sBG Network Connection\n",
8403 priv->is_abg ? "A" : "");
8404
8405 /* Device-specific setup */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008406 if (iwl3945_hw_set_hw_setting(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07008407 IWL_ERROR("failed to set hw settings\n");
Zhu Yib481de92007-09-25 17:54:57 -07008408 goto out_iounmap;
8409 }
8410
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008411#ifdef CONFIG_IWL3945_QOS
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008412 if (iwl3945_param_qos_enable)
Zhu Yib481de92007-09-25 17:54:57 -07008413 priv->qos_data.qos_enable = 1;
8414
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008415 iwl3945_reset_qos(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008416
8417 priv->qos_data.qos_active = 0;
8418 priv->qos_data.qos_cap.val = 0;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008419#endif /* CONFIG_IWL3945_QOS */
Zhu Yib481de92007-09-25 17:54:57 -07008420
Johannes Berg8318d782008-01-24 19:38:38 +01008421 iwl3945_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008422 iwl3945_setup_deferred_work(priv);
8423 iwl3945_setup_rx_handlers(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008424
8425 priv->rates_mask = IWL_RATES_MASK;
8426 /* If power management is turned on, default to AC mode */
8427 priv->power_mode = IWL_POWER_AC;
8428 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
8429
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008430 iwl3945_disable_interrupts(priv);
Jes Sorensen49df2b32007-10-26 16:10:39 +02008431
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008432 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
Zhu Yib481de92007-09-25 17:54:57 -07008433 if (err) {
8434 IWL_ERROR("failed to create sysfs device attributes\n");
Zhu Yib481de92007-09-25 17:54:57 -07008435 goto out_release_irq;
8436 }
8437
Zhu Yi5a669262008-01-14 17:46:18 -08008438 /* nic init */
8439 iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
8440 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
8441
8442 iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
8443 err = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
8444 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
8445 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
8446 if (err < 0) {
8447 IWL_DEBUG_INFO("Failed to init the card\n");
8448 goto out_remove_sysfs;
8449 }
8450 /* Read the EEPROM */
8451 err = iwl3945_eeprom_init(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008452 if (err) {
Zhu Yi5a669262008-01-14 17:46:18 -08008453 IWL_ERROR("Unable to init EEPROM\n");
8454 goto out_remove_sysfs;
8455 }
8456 /* MAC Address location in EEPROM same for 3945/4965 */
8457 get_eeprom_mac(priv, priv->mac_addr);
8458 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
8459 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
8460
Reinette Chatre849e0dc2008-01-23 10:15:18 -08008461 err = iwl3945_init_channel_map(priv);
8462 if (err) {
8463 IWL_ERROR("initializing regulatory failed: %d\n", err);
8464 goto out_remove_sysfs;
8465 }
8466
8467 err = iwl3945_init_geos(priv);
8468 if (err) {
8469 IWL_ERROR("initializing geos failed: %d\n", err);
8470 goto out_free_channel_map;
8471 }
Reinette Chatre849e0dc2008-01-23 10:15:18 -08008472
Zhu Yi5a669262008-01-14 17:46:18 -08008473 iwl3945_rate_control_register(priv->hw);
8474 err = ieee80211_register_hw(priv->hw);
8475 if (err) {
8476 IWL_ERROR("Failed to register network device (error %d)\n", err);
Reinette Chatre849e0dc2008-01-23 10:15:18 -08008477 goto out_free_geos;
Zhu Yib481de92007-09-25 17:54:57 -07008478 }
8479
Zhu Yi5a669262008-01-14 17:46:18 -08008480 priv->hw->conf.beacon_int = 100;
8481 priv->mac80211_registered = 1;
8482 pci_save_state(pdev);
8483 pci_disable_device(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008484
8485 return 0;
8486
Reinette Chatre849e0dc2008-01-23 10:15:18 -08008487 out_free_geos:
8488 iwl3945_free_geos(priv);
8489 out_free_channel_map:
8490 iwl3945_free_channel_map(priv);
Zhu Yi5a669262008-01-14 17:46:18 -08008491 out_remove_sysfs:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008492 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
Zhu Yib481de92007-09-25 17:54:57 -07008493
8494 out_release_irq:
Zhu Yib481de92007-09-25 17:54:57 -07008495 destroy_workqueue(priv->workqueue);
8496 priv->workqueue = NULL;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008497 iwl3945_unset_hw_setting(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008498
8499 out_iounmap:
8500 pci_iounmap(pdev, priv->hw_base);
8501 out_pci_release_regions:
8502 pci_release_regions(pdev);
8503 out_pci_disable_device:
8504 pci_disable_device(pdev);
8505 pci_set_drvdata(pdev, NULL);
8506 out_ieee80211_free_hw:
8507 ieee80211_free_hw(priv->hw);
8508 out:
8509 return err;
8510}
8511
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008512static void iwl3945_pci_remove(struct pci_dev *pdev)
Zhu Yib481de92007-09-25 17:54:57 -07008513{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008514 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008515 struct list_head *p, *q;
8516 int i;
8517
8518 if (!priv)
8519 return;
8520
8521 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
8522
Zhu Yib481de92007-09-25 17:54:57 -07008523 set_bit(STATUS_EXIT_PENDING, &priv->status);
Zhu Yib24d22b2007-12-19 13:59:52 +08008524
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008525 iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008526
8527 /* Free MAC hash list for ADHOC */
8528 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
8529 list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
8530 list_del(p);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008531 kfree(list_entry(p, struct iwl3945_ibss_seq, list));
Zhu Yib481de92007-09-25 17:54:57 -07008532 }
8533 }
8534
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008535 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
Zhu Yib481de92007-09-25 17:54:57 -07008536
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008537 iwl3945_dealloc_ucode_pci(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008538
8539 if (priv->rxq.bd)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008540 iwl3945_rx_queue_free(priv, &priv->rxq);
8541 iwl3945_hw_txq_ctx_free(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008542
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008543 iwl3945_unset_hw_setting(priv);
8544 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008545
8546 if (priv->mac80211_registered) {
8547 ieee80211_unregister_hw(priv->hw);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008548 iwl3945_rate_control_unregister(priv->hw);
Zhu Yib481de92007-09-25 17:54:57 -07008549 }
8550
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08008551 /*netif_stop_queue(dev); */
8552 flush_workqueue(priv->workqueue);
8553
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008554 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
Zhu Yib481de92007-09-25 17:54:57 -07008555 * priv->workqueue... so we can't take down the workqueue
8556 * until now... */
8557 destroy_workqueue(priv->workqueue);
8558 priv->workqueue = NULL;
8559
Zhu Yib481de92007-09-25 17:54:57 -07008560 pci_iounmap(pdev, priv->hw_base);
8561 pci_release_regions(pdev);
8562 pci_disable_device(pdev);
8563 pci_set_drvdata(pdev, NULL);
8564
Reinette Chatre849e0dc2008-01-23 10:15:18 -08008565 iwl3945_free_channel_map(priv);
8566 iwl3945_free_geos(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008567
8568 if (priv->ibss_beacon)
8569 dev_kfree_skb(priv->ibss_beacon);
8570
8571 ieee80211_free_hw(priv->hw);
8572}
8573
8574#ifdef CONFIG_PM
8575
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008576static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
Zhu Yib481de92007-09-25 17:54:57 -07008577{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008578 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008579
Zhu Yie655b9f2008-01-24 02:19:38 -08008580 if (priv->is_open) {
8581 set_bit(STATUS_IN_SUSPEND, &priv->status);
8582 iwl3945_mac_stop(priv->hw);
8583 priv->is_open = 1;
8584 }
Zhu Yib481de92007-09-25 17:54:57 -07008585
Zhu Yib481de92007-09-25 17:54:57 -07008586 pci_set_power_state(pdev, PCI_D3hot);
8587
Zhu Yib481de92007-09-25 17:54:57 -07008588 return 0;
8589}
8590
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008591static int iwl3945_pci_resume(struct pci_dev *pdev)
Zhu Yib481de92007-09-25 17:54:57 -07008592{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008593 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008594
Zhu Yib481de92007-09-25 17:54:57 -07008595 pci_set_power_state(pdev, PCI_D0);
Zhu Yib481de92007-09-25 17:54:57 -07008596
Zhu Yie655b9f2008-01-24 02:19:38 -08008597 if (priv->is_open)
8598 iwl3945_mac_start(priv->hw);
Zhu Yib481de92007-09-25 17:54:57 -07008599
Zhu Yie655b9f2008-01-24 02:19:38 -08008600 clear_bit(STATUS_IN_SUSPEND, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -07008601 return 0;
8602}
8603
8604#endif /* CONFIG_PM */
8605
8606/*****************************************************************************
8607 *
8608 * driver and module entry point
8609 *
8610 *****************************************************************************/
8611
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008612static struct pci_driver iwl3945_driver = {
Zhu Yib481de92007-09-25 17:54:57 -07008613 .name = DRV_NAME,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008614 .id_table = iwl3945_hw_card_ids,
8615 .probe = iwl3945_pci_probe,
8616 .remove = __devexit_p(iwl3945_pci_remove),
Zhu Yib481de92007-09-25 17:54:57 -07008617#ifdef CONFIG_PM
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008618 .suspend = iwl3945_pci_suspend,
8619 .resume = iwl3945_pci_resume,
Zhu Yib481de92007-09-25 17:54:57 -07008620#endif
8621};
8622
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008623static int __init iwl3945_init(void)
Zhu Yib481de92007-09-25 17:54:57 -07008624{
8625
8626 int ret;
8627 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
8628 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008629 ret = pci_register_driver(&iwl3945_driver);
Zhu Yib481de92007-09-25 17:54:57 -07008630 if (ret) {
8631 IWL_ERROR("Unable to initialize PCI module\n");
8632 return ret;
8633 }
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008634#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008635 ret = driver_create_file(&iwl3945_driver.driver, &driver_attr_debug_level);
Zhu Yib481de92007-09-25 17:54:57 -07008636 if (ret) {
8637 IWL_ERROR("Unable to create driver sysfs file\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008638 pci_unregister_driver(&iwl3945_driver);
Zhu Yib481de92007-09-25 17:54:57 -07008639 return ret;
8640 }
8641#endif
8642
8643 return ret;
8644}
8645
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008646static void __exit iwl3945_exit(void)
Zhu Yib481de92007-09-25 17:54:57 -07008647{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008648#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008649 driver_remove_file(&iwl3945_driver.driver, &driver_attr_debug_level);
Zhu Yib481de92007-09-25 17:54:57 -07008650#endif
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008651 pci_unregister_driver(&iwl3945_driver);
Zhu Yib481de92007-09-25 17:54:57 -07008652}
8653
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008654module_param_named(antenna, iwl3945_param_antenna, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008655MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008656module_param_named(disable, iwl3945_param_disable, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008657MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008658module_param_named(hwcrypto, iwl3945_param_hwcrypto, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008659MODULE_PARM_DESC(hwcrypto,
8660 "using hardware crypto engine (default 0 [software])\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008661module_param_named(debug, iwl3945_param_debug, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008662MODULE_PARM_DESC(debug, "debug output mask");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008663module_param_named(disable_hw_scan, iwl3945_param_disable_hw_scan, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008664MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
8665
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008666module_param_named(queues_num, iwl3945_param_queues_num, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008667MODULE_PARM_DESC(queues_num, "number of hw queues.");
8668
8669/* QoS */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008670module_param_named(qos_enable, iwl3945_param_qos_enable, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008671MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
8672
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008673module_exit(iwl3945_exit);
8674module_init(iwl3945_init);