blob: 66910121fa6fbb785e28a8a785065c38ffafcdbb [file] [log] [blame]
Mike Frysinger09e1f702008-08-06 17:15:27 +08001/*
2 * Common Blackfin startup code
3 *
4 * Copyright 2004-2008 Analog Devices Inc.
5 *
6 * Enter bugs at http://blackfin.uclinux.org/
7 *
8 * Licensed under the GPL-2 or later.
9 */
10
11#include <linux/linkage.h>
12#include <linux/init.h>
13#include <asm/blackfin.h>
Mike Frysinger67618fd2008-08-06 17:18:31 +080014#include <asm/thread_info.h>
Mike Frysinger09e1f702008-08-06 17:15:27 +080015#include <asm/trace.h>
Graf Yang6b3087c2009-01-07 23:14:39 +080016#include <asm/asm-offsets.h>
Mike Frysinger09e1f702008-08-06 17:15:27 +080017
Mike Frysinger17e89bc2008-08-06 17:23:50 +080018__INIT
19
Graf Yang9960aa62009-02-04 16:49:45 +080020ENTRY(__init_clear_bss)
21 r2 = r2 - r1;
22 cc = r2 == 0;
23 if cc jump .L_bss_done;
24 r2 >>= 2;
25 p1 = r1;
26 p2 = r2;
27 lsetup (1f, 1f) lc0 = p2;
281: [p1++] = r0;
29.L_bss_done:
30 rts;
31ENDPROC(__init_clear_bss)
32
Mike Frysinger17e89bc2008-08-06 17:23:50 +080033ENTRY(__start)
34 /* R0: argument of command line string, passed from uboot, save it */
35 R7 = R0;
36 /* Enable Cycle Counter and Nesting Of Interrupts */
37#ifdef CONFIG_BFIN_SCRATCH_REG_CYCLES
38 R0 = SYSCFG_SNEN;
39#else
40 R0 = SYSCFG_SNEN | SYSCFG_CCEN;
41#endif
42 SYSCFG = R0;
43 R0 = 0;
44
45 /* Clear Out All the data and pointer Registers */
46 R1 = R0;
47 R2 = R0;
48 R3 = R0;
49 R4 = R0;
50 R5 = R0;
51 R6 = R0;
52
53 P0 = R0;
54 P1 = R0;
55 P2 = R0;
56 P3 = R0;
57 P4 = R0;
58 P5 = R0;
59
60 LC0 = r0;
61 LC1 = r0;
62 L0 = r0;
63 L1 = r0;
64 L2 = r0;
65 L3 = r0;
66
67 /* Clear Out All the DAG Registers */
68 B0 = r0;
69 B1 = r0;
70 B2 = r0;
71 B3 = r0;
72
73 I0 = r0;
74 I1 = r0;
75 I2 = r0;
76 I3 = r0;
77
78 M0 = r0;
79 M1 = r0;
80 M2 = r0;
81 M3 = r0;
82
Robin Getz9df10282008-10-08 18:03:33 +080083 /*
84 * Clear ITEST_COMMAND and DTEST_COMMAND registers,
85 * Leaving these as non-zero can confuse the emulator
86 */
87 p0.L = LO(DTEST_COMMAND);
88 p0.H = HI(DTEST_COMMAND);
89 [p0] = R0;
90 [p0 + (ITEST_COMMAND - DTEST_COMMAND)] = R0;
91 CSYNC;
92
Mike Frysinger17e89bc2008-08-06 17:23:50 +080093 trace_buffer_init(p0,r0);
94 P0 = R1;
95 R0 = R1;
96
97 /* Turn off the icache */
98 p0.l = LO(IMEM_CONTROL);
99 p0.h = HI(IMEM_CONTROL);
100 R1 = [p0];
101 R0 = ~ENICPLB;
102 R0 = R0 & R1;
103 [p0] = R0;
104 SSYNC;
105
106 /* Turn off the dcache */
107 p0.l = LO(DMEM_CONTROL);
108 p0.h = HI(DMEM_CONTROL);
109 R1 = [p0];
110 R0 = ~ENDCPLB;
111 R0 = R0 & R1;
112 [p0] = R0;
113 SSYNC;
114
Robin Getz0c7a6b22008-10-08 16:27:12 +0800115 /* in case of double faults, save a few things */
116 p0.l = _init_retx;
117 p0.h = _init_retx;
Robin Getzcd8fb8d2008-08-14 14:44:33 +0800118 R0 = RETX;
119 [P0] = R0;
120
Robin Getz0c7a6b22008-10-08 16:27:12 +0800121#ifdef CONFIG_DEBUG_DOUBLEFAULT
122 /* Only save these if we are storing them,
123 * This happens here, since L1 gets clobbered
124 * below
125 */
Graf Yang6b3087c2009-01-07 23:14:39 +0800126 GET_PDA(p0, r0);
Mike Frysinger37082512009-05-26 21:48:38 +0000127 r6 = [p0 + PDA_RETX];
Robin Getz0c7a6b22008-10-08 16:27:12 +0800128 p1.l = _init_saved_retx;
129 p1.h = _init_saved_retx;
Mike Frysinger37082512009-05-26 21:48:38 +0000130 [p1] = r6;
Robin Getz0c7a6b22008-10-08 16:27:12 +0800131
Mike Frysinger37082512009-05-26 21:48:38 +0000132 r6 = [p0 + PDA_DCPLB];
Robin Getz0c7a6b22008-10-08 16:27:12 +0800133 p1.l = _init_saved_dcplb_fault_addr;
134 p1.h = _init_saved_dcplb_fault_addr;
Mike Frysinger37082512009-05-26 21:48:38 +0000135 [p1] = r6;
Robin Getz0c7a6b22008-10-08 16:27:12 +0800136
Mike Frysinger37082512009-05-26 21:48:38 +0000137 r6 = [p0 + PDA_ICPLB];
Robin Getz0c7a6b22008-10-08 16:27:12 +0800138 p1.l = _init_saved_icplb_fault_addr;
139 p1.h = _init_saved_icplb_fault_addr;
Mike Frysinger37082512009-05-26 21:48:38 +0000140 [p1] = r6;
Robin Getz0c7a6b22008-10-08 16:27:12 +0800141
Mike Frysinger37082512009-05-26 21:48:38 +0000142 r6 = [p0 + PDA_SEQSTAT];
Robin Getz0c7a6b22008-10-08 16:27:12 +0800143 p1.l = _init_saved_seqstat;
144 p1.h = _init_saved_seqstat;
Mike Frysinger37082512009-05-26 21:48:38 +0000145 [p1] = r6;
Robin Getz0c7a6b22008-10-08 16:27:12 +0800146#endif
147
Mike Frysinger17e89bc2008-08-06 17:23:50 +0800148 /* Initialize stack pointer */
Mike Frysinger729a3fa2009-04-24 03:55:41 +0000149 sp.l = _init_thread_union;
150 sp.h = _init_thread_union;
Mike Frysinger17e89bc2008-08-06 17:23:50 +0800151 fp = sp;
152 usp = sp;
153
154#ifdef CONFIG_EARLY_PRINTK
155 call _init_early_exception_vectors;
Robin Getz837ec2d2009-07-07 20:17:09 +0000156 r0 = (EVT_IVHW | EVT_IRPTEN | EVT_EVX | EVT_NMI | EVT_RST | EVT_EMU);
157 sti r0;
Mike Frysinger17e89bc2008-08-06 17:23:50 +0800158#endif
159
Graf Yang9960aa62009-02-04 16:49:45 +0800160 r0 = 0 (x);
161 /* Zero out all of the fun bss regions */
162#if L1_DATA_A_LENGTH > 0
163 r1.l = __sbss_l1;
164 r1.h = __sbss_l1;
165 r2.l = __ebss_l1;
166 r2.h = __ebss_l1;
167 call __init_clear_bss
168#endif
169#if L1_DATA_B_LENGTH > 0
170 r1.l = __sbss_b_l1;
171 r1.h = __sbss_b_l1;
172 r2.l = __ebss_b_l1;
173 r2.h = __ebss_b_l1;
174 call __init_clear_bss
175#endif
176#if L2_LENGTH > 0
177 r1.l = __sbss_l2;
178 r1.h = __sbss_l2;
179 r2.l = __ebss_l2;
180 r2.h = __ebss_l2;
181 call __init_clear_bss
182#endif
183 r1.l = ___bss_start;
184 r1.h = ___bss_start;
185 r2.l = ___bss_stop;
186 r2.h = ___bss_stop;
187 call __init_clear_bss
188
Mike Frysinger17e89bc2008-08-06 17:23:50 +0800189 /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */
Graf Yang5b04f272008-10-08 17:32:57 +0800190 call _bfin_relocate_l1_mem;
Mike Frysinger17e89bc2008-08-06 17:23:50 +0800191#ifdef CONFIG_BFIN_KERNEL_CLOCK
Mike Frysinger729a3fa2009-04-24 03:55:41 +0000192 /* Only use on-chip scratch space for stack when absolutely required
193 * to avoid Anomaly 05000227 ... we know the init_clocks() func only
194 * uses L1 text and stack space and no other memory region.
195 */
196# define KERNEL_CLOCK_STACK (L1_SCRATCH_START + L1_SCRATCH_LENGTH - 12)
197 sp.l = lo(KERNEL_CLOCK_STACK);
198 sp.h = hi(KERNEL_CLOCK_STACK);
Michael Hennerich73feb5c2009-01-07 23:14:39 +0800199 call _init_clocks;
Mike Frysinger729a3fa2009-04-24 03:55:41 +0000200 sp = usp; /* usp hasnt been touched, so restore from there */
Mike Frysinger17e89bc2008-08-06 17:23:50 +0800201#endif
202
203 /* This section keeps the processor in supervisor mode
204 * during kernel boot. Switches to user mode at end of boot.
205 * See page 3-9 of Hardware Reference manual for documentation.
206 */
207
208 /* EVT15 = _real_start */
209
210 p0.l = lo(EVT15);
211 p0.h = hi(EVT15);
212 p1.l = _real_start;
213 p1.h = _real_start;
214 [p0] = p1;
215 csync;
216
Robin Getz837ec2d2009-07-07 20:17:09 +0000217#ifdef CONFIG_EARLY_PRINTK
218 r0 = (EVT_IVG15 | EVT_IVHW | EVT_IRPTEN | EVT_EVX | EVT_NMI | EVT_RST | EVT_EMU) (z);
219#else
Mike Frysingerc2414bd2008-11-18 17:48:22 +0800220 r0 = EVT_IVG15 (z);
Robin Getz837ec2d2009-07-07 20:17:09 +0000221#endif
Mike Frysingerc2414bd2008-11-18 17:48:22 +0800222 sti r0;
Mike Frysinger17e89bc2008-08-06 17:23:50 +0800223
224 raise 15;
Robin Getz837ec2d2009-07-07 20:17:09 +0000225#ifdef CONFIG_EARLY_PRINTK
226 p0.l = _early_trap;
227 p0.h = _early_trap;
228#else
Mike Frysinger17e89bc2008-08-06 17:23:50 +0800229 p0.l = .LWAIT_HERE;
230 p0.h = .LWAIT_HERE;
Robin Getz837ec2d2009-07-07 20:17:09 +0000231#endif
Mike Frysinger17e89bc2008-08-06 17:23:50 +0800232 reti = p0;
233#if ANOMALY_05000281
234 nop; nop; nop;
235#endif
236 rti;
237
238.LWAIT_HERE:
239 jump .LWAIT_HERE;
240ENDPROC(__start)
241
Mike Frysinger09e1f702008-08-06 17:15:27 +0800242/* A little BF561 glue ... */
243#ifndef WDOG_CTL
244# define WDOG_CTL WDOGA_CTL
245#endif
246
Mike Frysinger09e1f702008-08-06 17:15:27 +0800247ENTRY(_real_start)
248 /* Enable nested interrupts */
249 [--sp] = reti;
250
251 /* watchdog off for now */
252 p0.l = lo(WDOG_CTL);
253 p0.h = hi(WDOG_CTL);
254 r0 = 0xAD6(z);
255 w[p0] = r0;
256 ssync;
257
Mike Frysinger09e1f702008-08-06 17:15:27 +0800258 /* Pass the u-boot arguments to the global value command line */
259 R0 = R7;
260 call _cmdline_init;
261
262 /* Load the current thread pointer and stack */
Mike Frysinger729a3fa2009-04-24 03:55:41 +0000263 p1 = THREAD_SIZE + 4 (z); /* +4 is for reti loading */
Mike Frysinger09e1f702008-08-06 17:15:27 +0800264 sp = sp + p1;
265 usp = sp;
266 fp = sp;
Graf Yang6b3087c2009-01-07 23:14:39 +0800267 sp += -12;
268 call _init_pda
269 sp += 12;
Mike Frysinger09e1f702008-08-06 17:15:27 +0800270 jump.l _start_kernel;
271ENDPROC(_real_start)
272
273__FINIT