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Christian Lamparter32ddf072008-08-08 21:17:37 +02001#ifndef P54COMMON_H
2#define P54COMMON_H
Michael Wueff1a592007-09-25 18:11:01 -07003
4/*
5 * Common code specific definitions for mac80211 Prism54 drivers
6 *
7 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
8 * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
9 *
Christian Lamparter0fdd7c52008-10-15 03:55:37 +020010 * Based on:
11 * - the islsm (softmac prism54) driver, which is:
12 * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
13 *
14 * - LMAC API interface header file for STLC4560 (lmac_longbow.h)
15 * Copyright (C) 2007 Conexant Systems, Inc.
Michael Wueff1a592007-09-25 18:11:01 -070016 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
20 */
21
22struct bootrec {
23 __le32 code;
24 __le32 len;
Larry Finger1f1c0e32008-09-25 14:54:28 -050025 u32 data[10];
Michael Wueff1a592007-09-25 18:11:01 -070026} __attribute__((packed));
27
Christian Lamparter9e7f3f82008-10-18 23:18:01 +020028#define PDR_SYNTH_FRONTEND_MASK 0x0007
29#define PDR_SYNTH_IQ_CAL_MASK 0x0018
30#define PDR_SYNTH_IQ_CAL_PA_DETECTOR 0x0000
31#define PDR_SYNTH_IQ_CAL_DISABLED 0x0008
32#define PDR_SYNTH_IQ_CAL_ZIF 0x0010
33#define PDR_SYNTH_FAA_SWITCH_MASK 0x0020
Christian Lamparter78eb7482008-12-30 13:48:19 +010034#define PDR_SYNTH_FAA_SWITCH_ENABLED 0x0020
Christian Lamparter9e7f3f82008-10-18 23:18:01 +020035#define PDR_SYNTH_24_GHZ_MASK 0x0040
36#define PDR_SYNTH_24_GHZ_DISABLED 0x0040
37#define PDR_SYNTH_5_GHZ_MASK 0x0080
38#define PDR_SYNTH_5_GHZ_DISABLED 0x0080
39#define PDR_SYNTH_RX_DIV_MASK 0x0100
40#define PDR_SYNTH_RX_DIV_SUPPORTED 0x0100
41#define PDR_SYNTH_TX_DIV_MASK 0x0200
42#define PDR_SYNTH_TX_DIV_SUPPORTED 0x0200
43
Michael Wueff1a592007-09-25 18:11:01 -070044struct bootrec_exp_if {
45 __le16 role;
46 __le16 if_id;
47 __le16 variant;
48 __le16 btm_compat;
49 __le16 top_compat;
50} __attribute__((packed));
51
John W. Linville27df6052008-10-22 16:41:55 -040052#define BR_DESC_PRIV_CAP_WEP BIT(0)
53#define BR_DESC_PRIV_CAP_TKIP BIT(1)
54#define BR_DESC_PRIV_CAP_MICHAEL BIT(2)
55#define BR_DESC_PRIV_CAP_CCX_CP BIT(3)
56#define BR_DESC_PRIV_CAP_CCX_MIC BIT(4)
57#define BR_DESC_PRIV_CAP_AESCCMP BIT(5)
58
Christian Lamparter4e416a62008-09-01 22:48:41 +020059struct bootrec_desc {
60 __le16 modes;
61 __le16 flags;
62 __le32 rx_start;
63 __le32 rx_end;
64 u8 headroom;
65 u8 tailroom;
John W. Linville27df6052008-10-22 16:41:55 -040066 u8 tx_queues;
67 u8 tx_depth;
68 u8 privacy_caps;
69 u8 rx_keycache_size;
70 u8 time_size;
71 u8 padding;
Christian Lamparter4e416a62008-09-01 22:48:41 +020072 u8 rates[16];
Larry Finger2e20cc32008-10-09 17:38:52 -070073 u8 padding2[4];
74 __le16 rx_mtu;
Christian Lamparter4e416a62008-09-01 22:48:41 +020075} __attribute__((packed));
76
Michael Wueff1a592007-09-25 18:11:01 -070077#define BR_CODE_MIN 0x80000000
78#define BR_CODE_COMPONENT_ID 0x80000001
79#define BR_CODE_COMPONENT_VERSION 0x80000002
80#define BR_CODE_DEPENDENT_IF 0x80000003
81#define BR_CODE_EXPOSED_IF 0x80000004
82#define BR_CODE_DESCR 0x80000101
83#define BR_CODE_MAX 0x8FFFFFFF
84#define BR_CODE_END_OF_BRA 0xFF0000FF
85#define LEGACY_BR_CODE_END_OF_BRA 0xFFFFFFFF
86
John W. Linville27df6052008-10-22 16:41:55 -040087#define P54_HDR_FLAG_DATA_ALIGN BIT(14)
88#define P54_HDR_FLAG_DATA_OUT_PROMISC BIT(0)
89#define P54_HDR_FLAG_DATA_OUT_TIMESTAMP BIT(1)
90#define P54_HDR_FLAG_DATA_OUT_SEQNR BIT(2)
91#define P54_HDR_FLAG_DATA_OUT_BIT3 BIT(3)
92#define P54_HDR_FLAG_DATA_OUT_BURST BIT(4)
93#define P54_HDR_FLAG_DATA_OUT_NOCANCEL BIT(5)
94#define P54_HDR_FLAG_DATA_OUT_CLEARTIM BIT(6)
95#define P54_HDR_FLAG_DATA_OUT_HITCHHIKE BIT(7)
96#define P54_HDR_FLAG_DATA_OUT_COMPRESS BIT(8)
97#define P54_HDR_FLAG_DATA_OUT_CONCAT BIT(9)
98#define P54_HDR_FLAG_DATA_OUT_PCS_ACCEPT BIT(10)
99#define P54_HDR_FLAG_DATA_OUT_WAITEOSP BIT(11)
100
101#define P54_HDR_FLAG_DATA_IN_FCS_GOOD BIT(0)
102#define P54_HDR_FLAG_DATA_IN_MATCH_MAC BIT(1)
103#define P54_HDR_FLAG_DATA_IN_MCBC BIT(2)
104#define P54_HDR_FLAG_DATA_IN_BEACON BIT(3)
105#define P54_HDR_FLAG_DATA_IN_MATCH_BSS BIT(4)
106#define P54_HDR_FLAG_DATA_IN_BCAST_BSS BIT(5)
107#define P54_HDR_FLAG_DATA_IN_DATA BIT(6)
108#define P54_HDR_FLAG_DATA_IN_TRUNCATED BIT(7)
109#define P54_HDR_FLAG_DATA_IN_BIT8 BIT(8)
110#define P54_HDR_FLAG_DATA_IN_TRANSPARENT BIT(9)
111
Michael Wueff1a592007-09-25 18:11:01 -0700112/* PDA defines are Copyright (C) 2005 Nokia Corporation (taken from islsm_pda.h) */
113
114struct pda_entry {
115 __le16 len; /* includes both code and data */
116 __le16 code;
117 u8 data[0];
118} __attribute__ ((packed));
119
120struct eeprom_pda_wrap {
Johannes Berg8c282932008-02-29 13:56:33 +0100121 __le32 magic;
122 __le16 pad;
123 __le16 len;
124 __le32 arm_opcode;
Michael Wueff1a592007-09-25 18:11:01 -0700125 u8 data[0];
126} __attribute__ ((packed));
127
128struct pda_iq_autocal_entry {
129 __le16 freq;
130 __le16 iq_param[4];
131} __attribute__ ((packed));
132
133struct pda_channel_output_limit {
134 __le16 freq;
135 u8 val_bpsk;
136 u8 val_qpsk;
137 u8 val_16qam;
138 u8 val_64qam;
139 u8 rate_set_mask;
140 u8 rate_set_size;
141} __attribute__ ((packed));
142
143struct pda_pa_curve_data_sample_rev0 {
144 u8 rf_power;
145 u8 pa_detector;
146 u8 pcv;
147} __attribute__ ((packed));
148
149struct pda_pa_curve_data_sample_rev1 {
150 u8 rf_power;
151 u8 pa_detector;
152 u8 data_barker;
153 u8 data_bpsk;
154 u8 data_qpsk;
155 u8 data_16qam;
156 u8 data_64qam;
Christian Lamparter154e3af2008-08-23 22:15:25 +0200157} __attribute__ ((packed));
158
159struct p54_pa_curve_data_sample {
160 u8 rf_power;
161 u8 pa_detector;
162 u8 data_barker;
163 u8 data_bpsk;
164 u8 data_qpsk;
165 u8 data_16qam;
166 u8 data_64qam;
Michael Wueff1a592007-09-25 18:11:01 -0700167 u8 padding;
168} __attribute__ ((packed));
169
170struct pda_pa_curve_data {
171 u8 cal_method_rev;
172 u8 channels;
173 u8 points_per_channel;
174 u8 padding;
175 u8 data[0];
176} __attribute__ ((packed));
177
Christian Lamparter69ba3e52008-12-14 14:45:30 +0100178struct pda_rssi_cal_entry {
179 __le16 mul;
180 __le16 add;
181} __attribute__ ((packed));
182
Christian Lamparter98a8d1a2008-12-26 21:50:33 +0100183struct pda_country {
184 u8 regdomain;
185 u8 alpha2[2];
186 u8 flags;
187} __attribute__ ((packed));
188
Christian Lamparter83cf1b62009-01-11 01:10:33 +0100189struct pda_custom_wrapper {
190 __le16 entries;
191 __le16 entry_size;
192 __le16 offset;
193 __le16 len;
194 u8 data[0];
195} __attribute__ ((packed));
196
Michael Wueff1a592007-09-25 18:11:01 -0700197/*
198 * this defines the PDR codes used to build PDAs as defined in document
199 * number 553155. The current implementation mirrors version 1.1 of the
200 * document and lists only PDRs supported by the ARM platform.
201 */
202
203/* common and choice range (0x0000 - 0x0fff) */
204#define PDR_END 0x0000
205#define PDR_MANUFACTURING_PART_NUMBER 0x0001
206#define PDR_PDA_VERSION 0x0002
207#define PDR_NIC_SERIAL_NUMBER 0x0003
208
209#define PDR_MAC_ADDRESS 0x0101
210#define PDR_REGULATORY_DOMAIN_LIST 0x0103
211#define PDR_TEMPERATURE_TYPE 0x0107
212
213#define PDR_PRISM_PCI_IDENTIFIER 0x0402
214
215/* ARM range (0x1000 - 0x1fff) */
216#define PDR_COUNTRY_INFORMATION 0x1000
217#define PDR_INTERFACE_LIST 0x1001
218#define PDR_HARDWARE_PLATFORM_COMPONENT_ID 0x1002
219#define PDR_OEM_NAME 0x1003
220#define PDR_PRODUCT_NAME 0x1004
221#define PDR_UTF8_OEM_NAME 0x1005
222#define PDR_UTF8_PRODUCT_NAME 0x1006
223#define PDR_COUNTRY_LIST 0x1007
224#define PDR_DEFAULT_COUNTRY 0x1008
225
226#define PDR_ANTENNA_GAIN 0x1100
227
228#define PDR_PRISM_INDIGO_PA_CALIBRATION_DATA 0x1901
229#define PDR_RSSI_LINEAR_APPROXIMATION 0x1902
230#define PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS 0x1903
231#define PDR_PRISM_PA_CAL_CURVE_DATA 0x1904
232#define PDR_RSSI_LINEAR_APPROXIMATION_DUAL_BAND 0x1905
233#define PDR_PRISM_ZIF_TX_IQ_CALIBRATION 0x1906
234#define PDR_REGULATORY_POWER_LIMITS 0x1907
235#define PDR_RSSI_LINEAR_APPROXIMATION_EXTENDED 0x1908
236#define PDR_RADIATED_TRANSMISSION_CORRECTION 0x1909
237#define PDR_PRISM_TX_IQ_CALIBRATION 0x190a
238
239/* reserved range (0x2000 - 0x7fff) */
240
241/* customer range (0x8000 - 0xffff) */
Christian Lamparter83cf1b62009-01-11 01:10:33 +0100242#define PDR_BASEBAND_REGISTERS 0x8000
243#define PDR_PER_CHANNEL_BASEBAND_REGISTERS 0x8001
244
245/* used by our modificated eeprom image */
246#define PDR_RSSI_LINEAR_APPROXIMATION_CUSTOM 0xDEAD
247#define PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS_CUSTOM 0xBEEF
248#define PDR_PRISM_PA_CAL_CURVE_DATA_CUSTOM 0xB05D
Michael Wueff1a592007-09-25 18:11:01 -0700249
Christian Lamparter9e7f3f82008-10-18 23:18:01 +0200250/* PDR definitions for default country & country list */
251#define PDR_COUNTRY_CERT_CODE 0x80
252#define PDR_COUNTRY_CERT_CODE_REAL 0x00
253#define PDR_COUNTRY_CERT_CODE_PSEUDO 0x80
254#define PDR_COUNTRY_CERT_BAND 0x40
255#define PDR_COUNTRY_CERT_BAND_2GHZ 0x00
256#define PDR_COUNTRY_CERT_BAND_5GHZ 0x40
257#define PDR_COUNTRY_CERT_IODOOR 0x30
258#define PDR_COUNTRY_CERT_IODOOR_BOTH 0x00
259#define PDR_COUNTRY_CERT_IODOOR_INDOOR 0x20
260#define PDR_COUNTRY_CERT_IODOOR_OUTDOOR 0x30
261#define PDR_COUNTRY_CERT_INDEX 0x0F
262
Michael Wueff1a592007-09-25 18:11:01 -0700263struct p54_eeprom_lm86 {
Christian Lamparter64c354d2008-11-29 22:35:43 +0100264 union {
265 struct {
266 __le16 offset;
267 __le16 len;
268 u8 data[0];
269 } v1;
270 struct {
271 __le32 offset;
272 __le16 len;
273 u8 magic2;
274 u8 pad;
275 u8 magic[4];
276 u8 data[0];
277 } v2;
278 } __attribute__ ((packed));
Michael Wueff1a592007-09-25 18:11:01 -0700279} __attribute__ ((packed));
280
John W. Linville27df6052008-10-22 16:41:55 -0400281enum p54_rx_decrypt_status {
282 P54_DECRYPT_NONE = 0,
283 P54_DECRYPT_OK,
284 P54_DECRYPT_NOKEY,
285 P54_DECRYPT_NOMICHAEL,
286 P54_DECRYPT_NOCKIPMIC,
287 P54_DECRYPT_FAIL_WEP,
288 P54_DECRYPT_FAIL_TKIP,
Christian Lamparterffed7852008-11-14 19:41:22 +0100289 P54_DECRYPT_FAIL_MICHAEL,
John W. Linville27df6052008-10-22 16:41:55 -0400290 P54_DECRYPT_FAIL_CKIPKP,
291 P54_DECRYPT_FAIL_CKIPMIC,
292 P54_DECRYPT_FAIL_AESCCMP
293};
294
295struct p54_rx_data {
296 __le16 flags;
Michael Wueff1a592007-09-25 18:11:01 -0700297 __le16 len;
298 __le16 freq;
299 u8 antenna;
300 u8 rate;
301 u8 rssi;
302 u8 quality;
John W. Linville27df6052008-10-22 16:41:55 -0400303 u8 decrypt_status;
304 u8 rssi_raw;
Christian Lampartera0db6632008-09-06 02:56:04 +0200305 __le32 tsf32;
306 __le32 unalloc0;
Christian Lamparter19c19d52008-09-03 22:25:25 +0200307 u8 align[0];
Michael Wueff1a592007-09-25 18:11:01 -0700308} __attribute__ ((packed));
309
John W. Linville27df6052008-10-22 16:41:55 -0400310enum p54_trap_type {
311 P54_TRAP_SCAN = 0,
312 P54_TRAP_TIMER,
313 P54_TRAP_BEACON_TX,
314 P54_TRAP_FAA_RADIO_ON,
315 P54_TRAP_FAA_RADIO_OFF,
316 P54_TRAP_RADAR,
317 P54_TRAP_NO_BEACON,
318 P54_TRAP_TBTT,
319 P54_TRAP_SCO_ENTER,
320 P54_TRAP_SCO_EXIT
321};
322
323struct p54_trap {
324 __le16 event;
325 __le16 frequency;
Michael Wueff1a592007-09-25 18:11:01 -0700326} __attribute__ ((packed));
327
John W. Linville27df6052008-10-22 16:41:55 -0400328enum p54_frame_sent_status {
329 P54_TX_OK = 0,
330 P54_TX_FAILED,
331 P54_TX_PSM,
Christian Lamparterc772a082008-11-29 22:33:57 +0100332 P54_TX_PSM_CANCELLED = 4
John W. Linville27df6052008-10-22 16:41:55 -0400333};
334
335struct p54_frame_sent {
336 u8 status;
337 u8 tries;
338 u8 ack_rssi;
339 u8 quality;
340 __le16 seq;
341 u8 antenna;
342 u8 padding;
343} __attribute__ ((packed));
344
Christian Lampartera15bd002008-12-21 20:54:34 +0100345enum p54_tx_data_crypt {
John W. Linville27df6052008-10-22 16:41:55 -0400346 P54_CRYPTO_NONE = 0,
347 P54_CRYPTO_WEP,
348 P54_CRYPTO_TKIP,
349 P54_CRYPTO_TKIPMICHAEL,
350 P54_CRYPTO_CCX_WEPMIC,
351 P54_CRYPTO_CCX_KPMIC,
352 P54_CRYPTO_CCX_KP,
353 P54_CRYPTO_AESCCMP
354};
355
Christian Lampartera15bd002008-12-21 20:54:34 +0100356enum p54_tx_data_queue {
357 P54_QUEUE_BEACON = 0,
358 P54_QUEUE_FWSCAN = 1,
359 P54_QUEUE_MGMT = 2,
360 P54_QUEUE_CAB = 3,
361 P54_QUEUE_DATA = 4,
362
363 P54_QUEUE_AC_NUM = 4,
364 P54_QUEUE_AC_VO = 4,
365 P54_QUEUE_AC_VI = 5,
366 P54_QUEUE_AC_BE = 6,
367 P54_QUEUE_AC_BK = 7,
368
369 /* keep last */
370 P54_QUEUE_NUM = 8,
371};
372
John W. Linville27df6052008-10-22 16:41:55 -0400373struct p54_tx_data {
Michael Wueff1a592007-09-25 18:11:01 -0700374 u8 rateset[8];
John W. Linville27df6052008-10-22 16:41:55 -0400375 u8 rts_rate_idx;
376 u8 crypt_offset;
Christian Lamparteraaa15532008-08-09 19:20:47 -0500377 u8 key_type;
378 u8 key_len;
379 u8 key[16];
380 u8 hw_queue;
John W. Linville27df6052008-10-22 16:41:55 -0400381 u8 backlog;
382 __le16 durations[4];
Christian Lamparteraaa15532008-08-09 19:20:47 -0500383 u8 tx_antenna;
Michael Wueff1a592007-09-25 18:11:01 -0700384 u8 output_power;
Christian Lamparteraaa15532008-08-09 19:20:47 -0500385 u8 cts_rate;
386 u8 unalloc2[3];
Michael Wueff1a592007-09-25 18:11:01 -0700387 u8 align[0];
388} __attribute__ ((packed));
389
Christian Lamparter54fdb042008-12-13 14:14:20 +0100390/* unit is ms */
391#define P54_TX_FRAME_LIFETIME 2000
392#define P54_TX_TIMEOUT 4000
393#define P54_STATISTICS_UPDATE 5000
394
John W. Linville27df6052008-10-22 16:41:55 -0400395#define P54_FILTER_TYPE_NONE 0
396#define P54_FILTER_TYPE_STATION BIT(0)
397#define P54_FILTER_TYPE_IBSS BIT(1)
398#define P54_FILTER_TYPE_AP BIT(2)
399#define P54_FILTER_TYPE_TRANSPARENT BIT(3)
400#define P54_FILTER_TYPE_PROMISCUOUS BIT(4)
401#define P54_FILTER_TYPE_HIBERNATE BIT(5)
402#define P54_FILTER_TYPE_NOACK BIT(6)
403#define P54_FILTER_TYPE_RX_DISABLED BIT(7)
404
Christian Lamparter5e734442008-10-15 04:07:56 +0200405struct p54_setup_mac {
406 __le16 mac_mode;
Christian Lampartere0a58ea2008-09-03 22:25:20 +0200407 u8 mac_addr[ETH_ALEN];
408 u8 bssid[ETH_ALEN];
409 u8 rx_antenna;
410 u8 rx_align;
Christian Lamparter19c19d52008-09-03 22:25:25 +0200411 union {
412 struct {
413 __le32 basic_rate_mask;
414 u8 rts_rates[8];
415 __le32 rx_addr;
416 __le16 max_rx;
417 __le16 rxhw;
418 __le16 wakeup_timer;
419 __le16 unalloc0;
420 } v1 __attribute__ ((packed));
421 struct {
422 __le32 rx_addr;
423 __le16 max_rx;
424 __le16 rxhw;
425 __le16 timer;
Christian Lamparter5e734442008-10-15 04:07:56 +0200426 __le16 truncate;
427 __le32 basic_rate_mask;
428 u8 sbss_offset;
429 u8 mcast_window;
430 u8 rx_rssi_threshold;
431 u8 rx_ed_threshold;
432 __le32 ref_clock;
433 __le16 lpf_bandwidth;
434 __le16 osc_start_delay;
Christian Lamparter19c19d52008-09-03 22:25:25 +0200435 } v2 __attribute__ ((packed));
436 } __attribute__ ((packed));
Michael Wueff1a592007-09-25 18:11:01 -0700437} __attribute__ ((packed));
438
John W. Linville27df6052008-10-22 16:41:55 -0400439#define P54_SETUP_V1_LEN 40
440#define P54_SETUP_V2_LEN (sizeof(struct p54_setup_mac))
441
442#define P54_SCAN_EXIT BIT(0)
443#define P54_SCAN_TRAP BIT(1)
444#define P54_SCAN_ACTIVE BIT(2)
445#define P54_SCAN_FILTER BIT(3)
446
447struct p54_scan {
448 __le16 mode;
Christian Lamparter154e3af2008-08-23 22:15:25 +0200449 __le16 dwell;
Christian Lamparter83cf1b62009-01-11 01:10:33 +0100450 u8 scan_params[20];
Michael Wueff1a592007-09-25 18:11:01 -0700451 struct pda_iq_autocal_entry iq_autocal;
452 u8 pa_points_per_curve;
453 u8 val_barker;
454 u8 val_bpsk;
455 u8 val_qpsk;
456 u8 val_16qam;
457 u8 val_64qam;
Christian Lamparter19c19d52008-09-03 22:25:25 +0200458 struct p54_pa_curve_data_sample curve_data[8];
Christian Lamparter154e3af2008-08-23 22:15:25 +0200459 u8 dup_bpsk;
460 u8 dup_qpsk;
461 u8 dup_16qam;
462 u8 dup_64qam;
Christian Lamparter19c19d52008-09-03 22:25:25 +0200463 union {
Christian Lamparter69ba3e52008-12-14 14:45:30 +0100464 struct pda_rssi_cal_entry v1_rssi;
Christian Lamparter19c19d52008-09-03 22:25:25 +0200465
466 struct {
467 __le32 basic_rate_mask;
John W. Linville27df6052008-10-22 16:41:55 -0400468 u8 rts_rates[8];
Christian Lamparter69ba3e52008-12-14 14:45:30 +0100469 struct pda_rssi_cal_entry rssi;
Christian Lamparter19c19d52008-09-03 22:25:25 +0200470 } v2 __attribute__ ((packed));
471 } __attribute__ ((packed));
Michael Wueff1a592007-09-25 18:11:01 -0700472} __attribute__ ((packed));
473
Christian Lamparter69ba3e52008-12-14 14:45:30 +0100474#define P54_SCAN_V1_LEN 0x70
475#define P54_SCAN_V2_LEN 0x7c
Christian Lamparter19c19d52008-09-03 22:25:25 +0200476
John W. Linville27df6052008-10-22 16:41:55 -0400477struct p54_led {
Michael Wueff1a592007-09-25 18:11:01 -0700478 __le16 mode;
479 __le16 led_temporary;
480 __le16 led_permanent;
481 __le16 duration;
482} __attribute__ ((packed));
483
Christian Lamparter0fdd7c52008-10-15 03:55:37 +0200484struct p54_edcf {
485 u8 flags;
Michael Wueff1a592007-09-25 18:11:01 -0700486 u8 slottime;
Christian Lamparter0fdd7c52008-10-15 03:55:37 +0200487 u8 sifs;
488 u8 eofpad;
489 struct p54_edcf_queue_param queue[8];
490 u8 mapping[4];
Michael Wueff1a592007-09-25 18:11:01 -0700491 __le16 frameburst;
Christian Lamparter0fdd7c52008-10-15 03:55:37 +0200492 __le16 round_trip_delay;
Michael Wueff1a592007-09-25 18:11:01 -0700493} __attribute__ ((packed));
494
Christian Lampartercc6de662008-09-06 02:56:23 +0200495struct p54_statistics {
496 __le32 rx_success;
497 __le32 rx_bad_fcs;
498 __le32 rx_abort;
499 __le32 rx_abort_phy;
500 __le32 rts_success;
501 __le32 rts_fail;
502 __le32 tsf32;
503 __le32 airtime;
504 __le32 noise;
John W. Linville27df6052008-10-22 16:41:55 -0400505 __le32 sample_noise[8];
506 __le32 sample_cca;
507 __le32 sample_tx;
Christian Lampartercc6de662008-09-06 02:56:23 +0200508} __attribute__ ((packed));
509
John W. Linville27df6052008-10-22 16:41:55 -0400510struct p54_xbow_synth {
Christian Lamparter1b997532008-09-06 14:25:58 +0200511 __le16 magic1;
512 __le16 magic2;
513 __le16 freq;
514 u32 padding[5];
515} __attribute__ ((packed));
516
John W. Linville27df6052008-10-22 16:41:55 -0400517struct p54_timer {
518 __le32 interval;
519} __attribute__ ((packed));
520
521struct p54_keycache {
522 u8 entry;
523 u8 key_id;
524 u8 mac[ETH_ALEN];
525 u8 padding[2];
526 u8 key_type;
527 u8 key_len;
528 u8 key[24];
529} __attribute__ ((packed));
530
531struct p54_burst {
532 u8 flags;
533 u8 queue;
534 u8 backlog;
535 u8 pad;
536 __le16 durations[32];
537} __attribute__ ((packed));
538
539struct p54_psm_interval {
540 __le16 interval;
541 __le16 periods;
542} __attribute__ ((packed));
543
Christian Lamparter2b8d4e22008-12-30 13:48:41 +0100544#define P54_PSM_CAM 0
John W. Linville27df6052008-10-22 16:41:55 -0400545#define P54_PSM BIT(0)
546#define P54_PSM_DTIM BIT(1)
547#define P54_PSM_MCBC BIT(2)
548#define P54_PSM_CHECKSUM BIT(3)
549#define P54_PSM_SKIP_MORE_DATA BIT(4)
550#define P54_PSM_BEACON_TIMEOUT BIT(5)
551#define P54_PSM_HFOSLEEP BIT(6)
552#define P54_PSM_AUTOSWITCH_SLEEP BIT(7)
553#define P54_PSM_LPIT BIT(8)
554#define P54_PSM_BF_UCAST_SKIP BIT(9)
555#define P54_PSM_BF_MCAST_SKIP BIT(10)
556
557struct p54_psm {
558 __le16 mode;
559 __le16 aid;
560 struct p54_psm_interval intervals[4];
561 u8 beacon_rssi_skip_max;
562 u8 rssi_delta_threshold;
563 u8 nr;
564 u8 exclude[1];
565} __attribute__ ((packed));
566
567#define MC_FILTER_ADDRESS_NUM 4
568
569struct p54_group_address_table {
570 __le16 filter_enable;
571 __le16 num_address;
572 u8 mac_list[MC_FILTER_ADDRESS_NUM][ETH_ALEN];
573} __attribute__ ((packed));
574
575struct p54_txcancel {
576 __le32 req_id;
577} __attribute__ ((packed));
578
579struct p54_sta_unlock {
580 u8 addr[ETH_ALEN];
581 u16 padding;
582} __attribute__ ((packed));
583
584#define P54_TIM_CLEAR BIT(15)
Christian Lamparter9e7f3f82008-10-18 23:18:01 +0200585struct p54_tim {
John W. Linville27df6052008-10-22 16:41:55 -0400586 u8 count;
587 u8 padding[3];
588 __le16 entry[8];
589} __attribute__ ((packed));
590
591struct p54_cce_quiet {
592 __le32 period;
593} __attribute__ ((packed));
594
595struct p54_bt_balancer {
596 __le16 prio_thresh;
597 __le16 acl_thresh;
598} __attribute__ ((packed));
599
600struct p54_arp_table {
601 __le16 filter_enable;
602 u8 ipv4_addr[4];
603} __attribute__ ((packed));
604
Christian Lamparter32ddf072008-08-08 21:17:37 +0200605#endif /* P54COMMON_H */