blob: 9e4dd48899b6fe416cc4f1c975a23592aeddd910 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/************************************************************************
2 * Linux driver for *
3 * ICP vortex GmbH: GDT ISA/EISA/PCI Disk Array Controllers *
4 * Intel Corporation: Storage RAID Controllers *
5 * *
6 * gdth.c *
Leubner, Achimcbd5f692006-06-09 11:34:29 -07007 * Copyright (C) 1995-06 ICP vortex GmbH, Achim Leubner *
Linus Torvalds1da177e2005-04-16 15:20:36 -07008 * Copyright (C) 2002-04 Intel Corporation *
Leubner, Achimcbd5f692006-06-09 11:34:29 -07009 * Copyright (C) 2003-06 Adaptec Inc. *
Linus Torvalds1da177e2005-04-16 15:20:36 -070010 * <achim_leubner@adaptec.com> *
11 * *
12 * Additions/Fixes: *
13 * Boji Tony Kannanthanam <boji.t.kannanthanam@intel.com> *
14 * Johannes Dinner <johannes_dinner@adaptec.com> *
15 * *
16 * This program is free software; you can redistribute it and/or modify *
17 * it under the terms of the GNU General Public License as published *
18 * by the Free Software Foundation; either version 2 of the License, *
19 * or (at your option) any later version. *
20 * *
21 * This program is distributed in the hope that it will be useful, *
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
24 * GNU General Public License for more details. *
25 * *
26 * You should have received a copy of the GNU General Public License *
27 * along with this kernel; if not, write to the Free Software *
28 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. *
29 * *
Leubner, Achimcbd5f692006-06-09 11:34:29 -070030 * Linux kernel 2.4.x, 2.6.x supported *
Linus Torvalds1da177e2005-04-16 15:20:36 -070031 * *
32 * $Log: gdth.c,v $
Leubner, Achimcbd5f692006-06-09 11:34:29 -070033 * Revision 1.74 2006/04/10 13:44:47 achim
34 * Community changes for 2.6.x
35 * Kernel 2.2.x no longer supported
36 * scsi_request interface removed, thanks to Christoph Hellwig
37 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070038 * Revision 1.73 2004/03/31 13:33:03 achim
39 * Special command 0xfd implemented to detect 64-bit DMA support
40 *
41 * Revision 1.72 2004/03/17 08:56:04 achim
42 * 64-bit DMA only enabled if FW >= x.43
43 *
44 * Revision 1.71 2004/03/05 15:51:29 achim
45 * Screen service: separate message buffer, bugfixes
46 *
47 * Revision 1.70 2004/02/27 12:19:07 achim
48 * Bugfix: Reset bit in config (0xfe) call removed
49 *
50 * Revision 1.69 2004/02/20 09:50:24 achim
51 * Compatibility changes for kernels < 2.4.20
52 * Bugfix screen service command size
53 * pci_set_dma_mask() error handling added
54 *
55 * Revision 1.68 2004/02/19 15:46:54 achim
56 * 64-bit DMA bugfixes
57 * Drive size bugfix for drives > 1TB
58 *
59 * Revision 1.67 2004/01/14 13:11:57 achim
60 * Tool access over /proc no longer supported
61 * Bugfixes IOCTLs
62 *
63 * Revision 1.66 2003/12/19 15:04:06 achim
64 * Bugfixes support for drives > 2TB
65 *
66 * Revision 1.65 2003/12/15 11:21:56 achim
67 * 64-bit DMA support added
68 * Support for drives > 2 TB implemented
69 * Kernels 2.2.x, 2.4.x, 2.6.x supported
70 *
71 * Revision 1.64 2003/09/17 08:30:26 achim
72 * EISA/ISA controller scan disabled
73 * Command line switch probe_eisa_isa added
74 *
75 * Revision 1.63 2003/07/12 14:01:00 Daniele Bellucci <bellucda@tiscali.it>
76 * Minor cleanups in gdth_ioctl.
77 *
78 * Revision 1.62 2003/02/27 15:01:59 achim
79 * Dynamic DMA mapping implemented
80 * New (character device) IOCTL interface added
81 * Other controller related changes made
82 *
83 * Revision 1.61 2002/11/08 13:09:52 boji
84 * Added support for XSCALE based RAID Controllers
85 * Fixed SCREENSERVICE initialization in SMP cases
86 * Added checks for gdth_polling before GDTH_HA_LOCK
87 *
88 * Revision 1.60 2002/02/05 09:35:22 achim
89 * MODULE_LICENSE only if kernel >= 2.4.11
90 *
91 * Revision 1.59 2002/01/30 09:46:33 achim
92 * Small changes
93 *
94 * Revision 1.58 2002/01/29 15:30:02 achim
95 * Set default value of shared_access to Y
96 * New status S_CACHE_RESERV for clustering added
97 *
98 * Revision 1.57 2001/08/21 11:16:35 achim
99 * Bugfix free_irq()
100 *
101 * Revision 1.56 2001/08/09 11:19:39 achim
Leubner, Achimcbd5f692006-06-09 11:34:29 -0700102 * Scsi_Host_Template changes
Linus Torvalds1da177e2005-04-16 15:20:36 -0700103 *
104 * Revision 1.55 2001/08/09 10:11:28 achim
105 * Command HOST_UNFREEZE_IO before cache service init.
106 *
107 * Revision 1.54 2001/07/20 13:48:12 achim
108 * Expand: gdth_analyse_hdrive() removed
109 *
110 * Revision 1.53 2001/07/17 09:52:49 achim
111 * Small OEM related change
112 *
113 * Revision 1.52 2001/06/19 15:06:20 achim
114 * New host command GDT_UNFREEZE_IO added
115 *
116 * Revision 1.51 2001/05/22 06:42:37 achim
117 * PCI: Subdevice ID added
118 *
119 * Revision 1.50 2001/05/17 13:42:16 achim
120 * Support for Intel Storage RAID Controllers added
121 *
122 * Revision 1.50 2001/05/17 12:12:34 achim
123 * Support for Intel Storage RAID Controllers added
124 *
125 * Revision 1.49 2001/03/15 15:07:17 achim
126 * New __setup interface for boot command line options added
127 *
128 * Revision 1.48 2001/02/06 12:36:28 achim
129 * Bugfix Cluster protocol
130 *
131 * Revision 1.47 2001/01/10 14:42:06 achim
132 * New switch shared_access added
133 *
134 * Revision 1.46 2001/01/09 08:11:35 achim
135 * gdth_command() removed
136 * meaning of Scsi_Pointer members changed
137 *
138 * Revision 1.45 2000/11/16 12:02:24 achim
139 * Changes for kernel 2.4
140 *
141 * Revision 1.44 2000/10/11 08:44:10 achim
142 * Clustering changes: New flag media_changed added
143 *
144 * Revision 1.43 2000/09/20 12:59:01 achim
145 * DPMEM remap functions for all PCI controller types implemented
146 * Small changes for ia64 platform
147 *
148 * Revision 1.42 2000/07/20 09:04:50 achim
149 * Small changes for kernel 2.4
150 *
151 * Revision 1.41 2000/07/04 14:11:11 achim
152 * gdth_analyse_hdrive() added to rescan drives after online expansion
153 *
154 * Revision 1.40 2000/06/27 11:24:16 achim
155 * Changes Clustering, Screenservice
156 *
157 * Revision 1.39 2000/06/15 13:09:04 achim
158 * Changes for gdth_do_cmd()
159 *
160 * Revision 1.38 2000/06/15 12:08:43 achim
161 * Bugfix gdth_sync_event(), service SCREENSERVICE
162 * Data direction for command 0xc2 changed to DOU
163 *
164 * Revision 1.37 2000/05/25 13:50:10 achim
165 * New driver parameter virt_ctr added
166 *
167 * Revision 1.36 2000/05/04 08:50:46 achim
168 * Event buffer now in gdth_ha_str
169 *
170 * Revision 1.35 2000/03/03 10:44:08 achim
171 * New event_string only valid for the RP controller family
172 *
173 * Revision 1.34 2000/03/02 14:55:29 achim
174 * New mechanism for async. event handling implemented
175 *
176 * Revision 1.33 2000/02/21 15:37:37 achim
177 * Bugfix Alpha platform + DPMEM above 4GB
178 *
179 * Revision 1.32 2000/02/14 16:17:37 achim
180 * Bugfix sense_buffer[] + raw devices
181 *
182 * Revision 1.31 2000/02/10 10:29:00 achim
183 * Delete sense_buffer[0], if command OK
184 *
185 * Revision 1.30 1999/11/02 13:42:39 achim
186 * ARRAY_DRV_LIST2 implemented
187 * Now 255 log. and 100 host drives supported
188 *
189 * Revision 1.29 1999/10/05 13:28:47 achim
190 * GDT_CLUST_RESET added
191 *
192 * Revision 1.28 1999/08/12 13:44:54 achim
193 * MOUNTALL removed
194 * Cluster drives -> removeable drives
195 *
196 * Revision 1.27 1999/06/22 07:22:38 achim
197 * Small changes
198 *
199 * Revision 1.26 1999/06/10 16:09:12 achim
200 * Cluster Host Drive support: Bugfixes
201 *
202 * Revision 1.25 1999/06/01 16:03:56 achim
203 * gdth_init_pci(): Manipulate config. space to start RP controller
204 *
205 * Revision 1.24 1999/05/26 11:53:06 achim
206 * Cluster Host Drive support added
207 *
208 * Revision 1.23 1999/03/26 09:12:31 achim
209 * Default value for hdr_channel set to 0
210 *
211 * Revision 1.22 1999/03/22 16:27:16 achim
212 * Bugfix: gdth_store_event() must not be locked with GDTH_LOCK_HA()
213 *
214 * Revision 1.21 1999/03/16 13:40:34 achim
215 * Problems with reserved drives solved
216 * gdth_eh_bus_reset() implemented
217 *
218 * Revision 1.20 1999/03/10 09:08:13 achim
219 * Bugfix: Corrections in gdth_direction_tab[] made
220 * Bugfix: Increase command timeout (gdth_update_timeout()) NOT in gdth_putq()
221 *
222 * Revision 1.19 1999/03/05 14:38:16 achim
223 * Bugfix: Heads/Sectors mapping for reserved devices possibly wrong
224 * -> gdth_eval_mapping() implemented, changes in gdth_bios_param()
225 * INIT_RETRIES set to 100s to avoid DEINIT-Timeout for controllers
226 * with BIOS disabled and memory test set to Intensive
227 * Enhanced /proc support
228 *
229 * Revision 1.18 1999/02/24 09:54:33 achim
230 * Command line parameter hdr_channel implemented
231 * Bugfix for EISA controllers + Linux 2.2.x
232 *
233 * Revision 1.17 1998/12/17 15:58:11 achim
234 * Command line parameters implemented
235 * Changes for Alpha platforms
236 * PCI controller scan changed
237 * SMP support improved (spin_lock_irqsave(),...)
238 * New async. events, new scan/reserve commands included
239 *
240 * Revision 1.16 1998/09/28 16:08:46 achim
241 * GDT_PCIMPR: DPMEM remapping, if required
242 * mdelay() added
243 *
244 * Revision 1.15 1998/06/03 14:54:06 achim
245 * gdth_delay(), gdth_flush() implemented
246 * Bugfix: gdth_release() changed
247 *
248 * Revision 1.14 1998/05/22 10:01:17 achim
249 * mj: pcibios_strerror() removed
250 * Improved SMP support (if version >= 2.1.95)
251 * gdth_halt(): halt_called flag added (if version < 2.1)
252 *
253 * Revision 1.13 1998/04/16 09:14:57 achim
254 * Reserve drives (for raw service) implemented
255 * New error handling code enabled
256 * Get controller name from board_info() IOCTL
257 * Final round of PCI device driver patches by Martin Mares
258 *
259 * Revision 1.12 1998/03/03 09:32:37 achim
260 * Fibre channel controller support added
261 *
262 * Revision 1.11 1998/01/27 16:19:14 achim
263 * SA_SHIRQ added
264 * add_timer()/del_timer() instead of GDTH_TIMER
265 * scsi_add_timer()/scsi_del_timer() instead of SCSI_TIMER
266 * New error handling included
267 *
268 * Revision 1.10 1997/10/31 12:29:57 achim
269 * Read heads/sectors from host drive
270 *
271 * Revision 1.9 1997/09/04 10:07:25 achim
272 * IO-mapping with virt_to_bus(), gdth_readb(), gdth_writeb(), ...
273 * register_reboot_notifier() to get a notify on shutown used
274 *
275 * Revision 1.8 1997/04/02 12:14:30 achim
276 * Version 1.00 (see gdth.h), tested with kernel 2.0.29
277 *
278 * Revision 1.7 1997/03/12 13:33:37 achim
279 * gdth_reset() changed, new async. events
280 *
281 * Revision 1.6 1997/03/04 14:01:11 achim
282 * Shutdown routine gdth_halt() implemented
283 *
284 * Revision 1.5 1997/02/21 09:08:36 achim
285 * New controller included (RP, RP1, RP2 series)
286 * IOCTL interface implemented
287 *
288 * Revision 1.4 1996/07/05 12:48:55 achim
289 * Function gdth_bios_param() implemented
290 * New constant GDTH_MAXC_P_L inserted
291 * GDT_WRITE_THR, GDT_EXT_INFO implemented
292 * Function gdth_reset() changed
293 *
294 * Revision 1.3 1996/05/10 09:04:41 achim
295 * Small changes for Linux 1.2.13
296 *
297 * Revision 1.2 1996/05/09 12:45:27 achim
298 * Loadable module support implemented
299 * /proc support corrections made
300 *
301 * Revision 1.1 1996/04/11 07:35:57 achim
302 * Initial revision
303 *
304 ************************************************************************/
305
306/* All GDT Disk Array Controllers are fully supported by this driver.
307 * This includes the PCI/EISA/ISA SCSI Disk Array Controllers and the
308 * PCI Fibre Channel Disk Array Controllers. See gdth.h for a complete
309 * list of all controller types.
310 *
311 * If you have one or more GDT3000/3020 EISA controllers with
312 * controller BIOS disabled, you have to set the IRQ values with the
313 * command line option "gdth=irq1,irq2,...", where the irq1,irq2,... are
314 * the IRQ values for the EISA controllers.
315 *
316 * After the optional list of IRQ values, other possible
317 * command line options are:
318 * disable:Y disable driver
319 * disable:N enable driver
320 * reserve_mode:0 reserve no drives for the raw service
321 * reserve_mode:1 reserve all not init., removable drives
322 * reserve_mode:2 reserve all not init. drives
323 * reserve_list:h,b,t,l,h,b,t,l,... reserve particular drive(s) with
324 * h- controller no., b- channel no.,
325 * t- target ID, l- LUN
326 * reverse_scan:Y reverse scan order for PCI controllers
327 * reverse_scan:N scan PCI controllers like BIOS
328 * max_ids:x x - target ID count per channel (1..MAXID)
329 * rescan:Y rescan all channels/IDs
330 * rescan:N use all devices found until now
331 * virt_ctr:Y map every channel to a virtual controller
332 * virt_ctr:N use multi channel support
333 * hdr_channel:x x - number of virtual bus for host drives
334 * shared_access:Y disable driver reserve/release protocol to
335 * access a shared resource from several nodes,
Adrian Bunk575c9682006-01-15 02:00:17 +0100336 * appropriate controller firmware required
Linus Torvalds1da177e2005-04-16 15:20:36 -0700337 * shared_access:N enable driver reserve/release protocol
338 * probe_eisa_isa:Y scan for EISA/ISA controllers
339 * probe_eisa_isa:N do not scan for EISA/ISA controllers
340 * force_dma32:Y use only 32 bit DMA mode
341 * force_dma32:N use 64 bit DMA mode, if supported
342 *
343 * The default values are: "gdth=disable:N,reserve_mode:1,reverse_scan:N,
344 * max_ids:127,rescan:N,virt_ctr:N,hdr_channel:0,
345 * shared_access:Y,probe_eisa_isa:N,force_dma32:N".
346 * Here is another example: "gdth=reserve_list:0,1,2,0,0,1,3,0,rescan:Y".
347 *
348 * When loading the gdth driver as a module, the same options are available.
349 * You can set the IRQs with "IRQ=...". However, the syntax to specify the
350 * options changes slightly. You must replace all ',' between options
351 * with ' ' and all ':' with '=' and you must use
352 * '1' in place of 'Y' and '0' in place of 'N'.
353 *
354 * Default: "modprobe gdth disable=0 reserve_mode=1 reverse_scan=0
355 * max_ids=127 rescan=0 virt_ctr=0 hdr_channel=0 shared_access=0
356 * probe_eisa_isa=0 force_dma32=0"
357 * The other example: "modprobe gdth reserve_list=0,1,2,0,0,1,3,0 rescan=1".
358 */
359
360/* The meaning of the Scsi_Pointer members in this driver is as follows:
361 * ptr: Chaining
362 * this_residual: Command priority
363 * buffer: phys. DMA sense buffer
364 * dma_handle: phys. DMA buffer (kernel >= 2.4.0)
365 * buffers_residual: Timeout value
366 * Status: Command status (gdth_do_cmd()), DMA mem. mappings
367 * Message: Additional info (gdth_do_cmd()), DMA direction
368 * have_data_in: Flag for gdth_wait_completion()
369 * sent_command: Opcode special command
370 * phase: Service/parameter/return code special command
371 */
372
373
374/* interrupt coalescing */
375/* #define INT_COAL */
376
377/* statistics */
378#define GDTH_STATISTICS
379
380#include <linux/module.h>
381
382#include <linux/version.h>
383#include <linux/kernel.h>
384#include <linux/types.h>
385#include <linux/pci.h>
386#include <linux/string.h>
387#include <linux/ctype.h>
388#include <linux/ioport.h>
389#include <linux/delay.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -0700390#include <linux/interrupt.h>
391#include <linux/in.h>
392#include <linux/proc_fs.h>
393#include <linux/time.h>
394#include <linux/timer.h>
Leubner, Achimcbd5f692006-06-09 11:34:29 -0700395#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,6)
Matthias Gehre910638a2006-03-28 01:56:48 -0800396#include <linux/dma-mapping.h>
Leubner, Achimcbd5f692006-06-09 11:34:29 -0700397#else
398#define DMA_32BIT_MASK 0x00000000ffffffffULL
399#define DMA_64BIT_MASK 0xffffffffffffffffULL
400#endif
401
Linus Torvalds1da177e2005-04-16 15:20:36 -0700402#ifdef GDTH_RTC
403#include <linux/mc146818rtc.h>
404#endif
405#include <linux/reboot.h>
406
407#include <asm/dma.h>
408#include <asm/system.h>
409#include <asm/io.h>
410#include <asm/uaccess.h>
411#include <linux/spinlock.h>
412#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
413#include <linux/blkdev.h>
414#else
415#include <linux/blk.h>
416#include "sd.h"
417#endif
418
419#include "scsi.h"
420#include <scsi/scsi_host.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -0700421#include "gdth_kcompat.h"
Leubner, Achimcbd5f692006-06-09 11:34:29 -0700422#include "gdth.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700423
424static void gdth_delay(int milliseconds);
425static void gdth_eval_mapping(ulong32 size, ulong32 *cyls, int *heads, int *secs);
David Howells7d12e782006-10-05 14:55:46 +0100426static irqreturn_t gdth_interrupt(int irq, void *dev_id);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700427static int gdth_sync_event(int hanum,int service,unchar index,Scsi_Cmnd *scp);
428static int gdth_async_event(int hanum);
429static void gdth_log_event(gdth_evt_data *dvr, char *buffer);
430
431static void gdth_putq(int hanum,Scsi_Cmnd *scp,unchar priority);
432static void gdth_next(int hanum);
433static int gdth_fill_raw_cmd(int hanum,Scsi_Cmnd *scp,unchar b);
434static int gdth_special_cmd(int hanum,Scsi_Cmnd *scp);
435static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, ushort source,
436 ushort idx, gdth_evt_data *evt);
437static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr);
438static void gdth_readapp_event(gdth_ha_str *ha, unchar application,
439 gdth_evt_str *estr);
440static void gdth_clear_events(void);
441
442static void gdth_copy_internal_data(int hanum,Scsi_Cmnd *scp,
443 char *buffer,ushort count);
444static int gdth_internal_cache_cmd(int hanum,Scsi_Cmnd *scp);
445static int gdth_fill_cache_cmd(int hanum,Scsi_Cmnd *scp,ushort hdrive);
446
Linus Torvalds1da177e2005-04-16 15:20:36 -0700447static void gdth_enable_int(int hanum);
448static int gdth_get_status(unchar *pIStatus,int irq);
449static int gdth_test_busy(int hanum);
450static int gdth_get_cmd_index(int hanum);
451static void gdth_release_event(int hanum);
452static int gdth_wait(int hanum,int index,ulong32 time);
453static int gdth_internal_cmd(int hanum,unchar service,ushort opcode,ulong32 p1,
454 ulong64 p2,ulong64 p3);
455static int gdth_search_drives(int hanum);
456static int gdth_analyse_hdrive(int hanum, ushort hdrive);
457
458static const char *gdth_ctr_name(int hanum);
459
460static int gdth_open(struct inode *inode, struct file *filep);
461static int gdth_close(struct inode *inode, struct file *filep);
462static int gdth_ioctl(struct inode *inode, struct file *filep,
463 unsigned int cmd, unsigned long arg);
464
465static void gdth_flush(int hanum);
466static int gdth_halt(struct notifier_block *nb, ulong event, void *buf);
Leubner, Achimcbd5f692006-06-09 11:34:29 -0700467static int gdth_queuecommand(Scsi_Cmnd *scp,void (*done)(Scsi_Cmnd *));
468static void gdth_scsi_done(struct scsi_cmnd *scp);
Christoph Hellwigaed91cb2007-10-02 22:48:16 +0200469#ifdef CONFIG_ISA
470static int gdth_isa_probe_one(struct scsi_host_template *, ulong32);
471#endif
Christoph Hellwig706a5d42007-10-02 22:49:35 +0200472#ifdef CONFIG_EISA
473static int gdth_eisa_probe_one(struct scsi_host_template *, ushort);
474#endif
Christoph Hellwig8514ef22007-10-02 22:51:06 +0200475#ifdef CONFIG_PCI
476static int gdth_pci_probe_one(struct scsi_host_template *, gdth_pci_str *, int);
477#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700478
479#ifdef DEBUG_GDTH
480static unchar DebugState = DEBUG_GDTH;
481
482#ifdef __SERIAL__
483#define MAX_SERBUF 160
484static void ser_init(void);
485static void ser_puts(char *str);
486static void ser_putc(char c);
487static int ser_printk(const char *fmt, ...);
488static char strbuf[MAX_SERBUF+1];
489#ifdef __COM2__
490#define COM_BASE 0x2f8
491#else
492#define COM_BASE 0x3f8
493#endif
494static void ser_init()
495{
496 unsigned port=COM_BASE;
497
498 outb(0x80,port+3);
499 outb(0,port+1);
500 /* 19200 Baud, if 9600: outb(12,port) */
501 outb(6, port);
502 outb(3,port+3);
503 outb(0,port+1);
504 /*
505 ser_putc('I');
506 ser_putc(' ');
507 */
508}
509
510static void ser_puts(char *str)
511{
512 char *ptr;
513
514 ser_init();
515 for (ptr=str;*ptr;++ptr)
516 ser_putc(*ptr);
517}
518
519static void ser_putc(char c)
520{
521 unsigned port=COM_BASE;
522
523 while ((inb(port+5) & 0x20)==0);
524 outb(c,port);
525 if (c==0x0a)
526 {
527 while ((inb(port+5) & 0x20)==0);
528 outb(0x0d,port);
529 }
530}
531
532static int ser_printk(const char *fmt, ...)
533{
534 va_list args;
535 int i;
536
537 va_start(args,fmt);
538 i = vsprintf(strbuf,fmt,args);
539 ser_puts(strbuf);
540 va_end(args);
541 return i;
542}
543
544#define TRACE(a) {if (DebugState==1) {ser_printk a;}}
545#define TRACE2(a) {if (DebugState==1 || DebugState==2) {ser_printk a;}}
546#define TRACE3(a) {if (DebugState!=0) {ser_printk a;}}
547
548#else /* !__SERIAL__ */
549#define TRACE(a) {if (DebugState==1) {printk a;}}
550#define TRACE2(a) {if (DebugState==1 || DebugState==2) {printk a;}}
551#define TRACE3(a) {if (DebugState!=0) {printk a;}}
552#endif
553
554#else /* !DEBUG */
555#define TRACE(a)
556#define TRACE2(a)
557#define TRACE3(a)
558#endif
559
560#ifdef GDTH_STATISTICS
561static ulong32 max_rq=0, max_index=0, max_sg=0;
562#ifdef INT_COAL
563static ulong32 max_int_coal=0;
564#endif
565static ulong32 act_ints=0, act_ios=0, act_stats=0, act_rq=0;
566static struct timer_list gdth_timer;
567#endif
568
569#define PTR2USHORT(a) (ushort)(ulong)(a)
Tobias Klauser6391a112006-06-08 22:23:48 -0700570#define GDTOFFSOF(a,b) (size_t)&(((a*)0)->b)
571#define INDEX_OK(i,t) ((i)<ARRAY_SIZE(t))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700572
573#define NUMDATA(a) ( (gdth_num_str *)((a)->hostdata))
574#define HADATA(a) (&((gdth_ext_str *)((a)->hostdata))->haext)
575#define CMDDATA(a) (&((gdth_ext_str *)((a)->hostdata))->cmdext)
576
577#define BUS_L2P(a,b) ((b)>(a)->virt_bus ? (b-1):(b))
578
579#define gdth_readb(addr) readb(addr)
580#define gdth_readw(addr) readw(addr)
581#define gdth_readl(addr) readl(addr)
582#define gdth_writeb(b,addr) writeb((b),(addr))
583#define gdth_writew(b,addr) writew((b),(addr))
584#define gdth_writel(b,addr) writel((b),(addr))
585
Christoph Hellwigaed91cb2007-10-02 22:48:16 +0200586#ifdef CONFIG_ISA
Linus Torvalds1da177e2005-04-16 15:20:36 -0700587static unchar gdth_drq_tab[4] = {5,6,7,7}; /* DRQ table */
Christoph Hellwigaed91cb2007-10-02 22:48:16 +0200588#endif
Christoph Hellwig706a5d42007-10-02 22:49:35 +0200589#ifdef CONFIG_EISA
Linus Torvalds1da177e2005-04-16 15:20:36 -0700590static unchar gdth_irq_tab[6] = {0,10,11,12,14,0}; /* IRQ table */
Christoph Hellwig706a5d42007-10-02 22:49:35 +0200591#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700592static unchar gdth_polling; /* polling if TRUE */
593static unchar gdth_from_wait = FALSE; /* gdth_wait() */
594static int wait_index,wait_hanum; /* gdth_wait() */
595static int gdth_ctr_count = 0; /* controller count */
596static int gdth_ctr_vcount = 0; /* virt. ctr. count */
597static int gdth_ctr_released = 0; /* gdth_release() */
598static struct Scsi_Host *gdth_ctr_tab[MAXHA]; /* controller table */
599static struct Scsi_Host *gdth_ctr_vtab[MAXHA*MAXBUS]; /* virt. ctr. table */
600static unchar gdth_write_through = FALSE; /* write through */
601static gdth_evt_str ebuffer[MAX_EVENTS]; /* event buffer */
602static int elastidx;
603static int eoldidx;
604static int major;
605
606#define DIN 1 /* IN data direction */
607#define DOU 2 /* OUT data direction */
608#define DNO DIN /* no data transfer */
609#define DUN DIN /* unknown data direction */
610static unchar gdth_direction_tab[0x100] = {
611 DNO,DNO,DIN,DIN,DOU,DIN,DIN,DOU,DIN,DUN,DOU,DOU,DUN,DUN,DUN,DIN,
612 DNO,DIN,DIN,DOU,DIN,DOU,DNO,DNO,DOU,DNO,DIN,DNO,DIN,DOU,DNO,DUN,
613 DIN,DUN,DIN,DUN,DOU,DIN,DUN,DUN,DIN,DIN,DOU,DNO,DUN,DIN,DOU,DOU,
614 DOU,DOU,DOU,DNO,DIN,DNO,DNO,DIN,DOU,DOU,DOU,DOU,DIN,DOU,DIN,DOU,
615 DOU,DOU,DIN,DIN,DIN,DNO,DUN,DNO,DNO,DNO,DUN,DNO,DOU,DIN,DUN,DUN,
616 DUN,DUN,DUN,DUN,DUN,DOU,DUN,DUN,DUN,DUN,DIN,DUN,DUN,DUN,DUN,DUN,
617 DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
618 DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
619 DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DIN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,
620 DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DIN,DUN,
621 DUN,DUN,DUN,DUN,DUN,DNO,DNO,DUN,DIN,DNO,DOU,DUN,DNO,DUN,DOU,DOU,
622 DOU,DOU,DOU,DNO,DUN,DIN,DOU,DIN,DIN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
623 DUN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
624 DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
625 DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,
626 DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN
627};
628
629/* LILO and modprobe/insmod parameters */
630/* IRQ list for GDT3000/3020 EISA controllers */
631static int irq[MAXHA] __initdata =
632{0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
633 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff};
634/* disable driver flag */
635static int disable __initdata = 0;
636/* reserve flag */
637static int reserve_mode = 1;
638/* reserve list */
639static int reserve_list[MAX_RES_ARGS] =
640{0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
641 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
642 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff};
643/* scan order for PCI controllers */
644static int reverse_scan = 0;
645/* virtual channel for the host drives */
646static int hdr_channel = 0;
647/* max. IDs per channel */
648static int max_ids = MAXID;
649/* rescan all IDs */
650static int rescan = 0;
651/* map channels to virtual controllers */
652static int virt_ctr = 0;
653/* shared access */
654static int shared_access = 1;
655/* enable support for EISA and ISA controllers */
656static int probe_eisa_isa = 0;
657/* 64 bit DMA mode, support for drives > 2 TB, if force_dma32 = 0 */
658static int force_dma32 = 0;
659
660/* parameters for modprobe/insmod */
Leubner, Achimcbd5f692006-06-09 11:34:29 -0700661#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,11)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700662module_param_array(irq, int, NULL, 0);
663module_param(disable, int, 0);
664module_param(reserve_mode, int, 0);
665module_param_array(reserve_list, int, NULL, 0);
666module_param(reverse_scan, int, 0);
667module_param(hdr_channel, int, 0);
668module_param(max_ids, int, 0);
669module_param(rescan, int, 0);
670module_param(virt_ctr, int, 0);
671module_param(shared_access, int, 0);
672module_param(probe_eisa_isa, int, 0);
673module_param(force_dma32, int, 0);
Leubner, Achimcbd5f692006-06-09 11:34:29 -0700674#else
675MODULE_PARM(irq, "i");
676MODULE_PARM(disable, "i");
677MODULE_PARM(reserve_mode, "i");
678MODULE_PARM(reserve_list, "4-" __MODULE_STRING(MAX_RES_ARGS) "i");
679MODULE_PARM(reverse_scan, "i");
680MODULE_PARM(hdr_channel, "i");
681MODULE_PARM(max_ids, "i");
682MODULE_PARM(rescan, "i");
683MODULE_PARM(virt_ctr, "i");
684MODULE_PARM(shared_access, "i");
685MODULE_PARM(probe_eisa_isa, "i");
686MODULE_PARM(force_dma32, "i");
687#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700688MODULE_AUTHOR("Achim Leubner");
689MODULE_LICENSE("GPL");
690
691/* ioctl interface */
Arjan van de Ven00977a52007-02-12 00:55:34 -0800692static const struct file_operations gdth_fops = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700693 .ioctl = gdth_ioctl,
694 .open = gdth_open,
695 .release = gdth_close,
696};
697
Matthew Wilcox687d2bc2007-09-25 12:42:03 -0400698#define GDTH_MAGIC 0xc2e7c389 /* I got it from /dev/urandom */
699#define IS_GDTH_INTERNAL_CMD(scp) (scp->underflow == GDTH_MAGIC)
700
Linus Torvalds1da177e2005-04-16 15:20:36 -0700701#include "gdth_proc.h"
702#include "gdth_proc.c"
703
704/* notifier block to get a notify on system shutdown/halt/reboot */
705static struct notifier_block gdth_notifier = {
706 gdth_halt, NULL, 0
707};
Alan Sterne041c682006-03-27 01:16:30 -0800708static int notifier_disabled = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700709
710static void gdth_delay(int milliseconds)
711{
712 if (milliseconds == 0) {
713 udelay(1);
714 } else {
715 mdelay(milliseconds);
716 }
717}
718
Leubner, Achimcbd5f692006-06-09 11:34:29 -0700719#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
720static void gdth_scsi_done(struct scsi_cmnd *scp)
721{
Matthew Wilcoxb8bff2a2007-10-02 22:40:22 +0200722 TRACE2(("gdth_scsi_done()\n"));
Leubner, Achimcbd5f692006-06-09 11:34:29 -0700723
Matthew Wilcoxb8bff2a2007-10-02 22:40:22 +0200724 if (IS_GDTH_INTERNAL_CMD(scp))
725 complete((struct completion *)scp->request);
726 else
727 scp->scsi_done(scp);
Leubner, Achimcbd5f692006-06-09 11:34:29 -0700728}
729
730int __gdth_execute(struct scsi_device *sdev, gdth_cmd_str *gdtcmd, char *cmnd,
731 int timeout, u32 *info)
732{
733 Scsi_Cmnd *scp;
Peter Zijlstra6e9a4732006-09-30 23:28:10 -0700734 DECLARE_COMPLETION_ONSTACK(wait);
Leubner, Achimcbd5f692006-06-09 11:34:29 -0700735 int rval;
736
Mariusz Kozlowskibbfbbbc2007-08-11 10:13:24 +0200737 scp = kzalloc(sizeof(*scp), GFP_KERNEL);
Leubner, Achimcbd5f692006-06-09 11:34:29 -0700738 if (!scp)
739 return -ENOMEM;
Mariusz Kozlowskibbfbbbc2007-08-11 10:13:24 +0200740
Leubner, Achimcbd5f692006-06-09 11:34:29 -0700741 scp->device = sdev;
Christoph Hellwigbeb40482006-06-10 18:01:03 +0200742 /* use request field to save the ptr. to completion struct. */
743 scp->request = (struct request *)&wait;
Leubner, Achimcbd5f692006-06-09 11:34:29 -0700744 scp->timeout_per_command = timeout*HZ;
745 scp->request_buffer = gdtcmd;
746 scp->cmd_len = 12;
747 memcpy(scp->cmnd, cmnd, 12);
748 scp->SCp.this_residual = IOCTL_PRI; /* priority */
Matthew Wilcox687d2bc2007-09-25 12:42:03 -0400749 scp->underflow = GDTH_MAGIC;
Matthew Wilcoxb8bff2a2007-10-02 22:40:22 +0200750 gdth_queuecommand(scp, NULL);
Leubner, Achimcbd5f692006-06-09 11:34:29 -0700751 wait_for_completion(&wait);
752
753 rval = scp->SCp.Status;
754 if (info)
755 *info = scp->SCp.Message;
756 kfree(scp);
757 return rval;
758}
759#else
760static void gdth_scsi_done(Scsi_Cmnd *scp)
761{
762 TRACE2(("gdth_scsi_done()\n"));
763
764 scp->request.rq_status = RQ_SCSI_DONE;
765 if (scp->request.waiting)
766 complete(scp->request.waiting);
767}
768
769int __gdth_execute(struct scsi_device *sdev, gdth_cmd_str *gdtcmd, char *cmnd,
770 int timeout, u32 *info)
771{
772 Scsi_Cmnd *scp = scsi_allocate_device(sdev, 1, FALSE);
773 unsigned bufflen = gdtcmd ? sizeof(gdth_cmd_str) : 0;
Peter Zijlstra6e9a4732006-09-30 23:28:10 -0700774 DECLARE_COMPLETION_ONSTACK(wait);
Leubner, Achimcbd5f692006-06-09 11:34:29 -0700775 int rval;
776
777 if (!scp)
778 return -ENOMEM;
779 scp->cmd_len = 12;
780 scp->use_sg = 0;
781 scp->SCp.this_residual = IOCTL_PRI; /* priority */
782 scp->request.rq_status = RQ_SCSI_BUSY;
783 scp->request.waiting = &wait;
784 scsi_do_cmd(scp, cmnd, gdtcmd, bufflen, gdth_scsi_done, timeout*HZ, 1);
785 wait_for_completion(&wait);
786
787 rval = scp->SCp.Status;
788 if (info)
789 *info = scp->SCp.Message;
790
791 scsi_release_command(scp);
792 return rval;
793}
794#endif
795
796int gdth_execute(struct Scsi_Host *shost, gdth_cmd_str *gdtcmd, char *cmnd,
797 int timeout, u32 *info)
798{
799 struct scsi_device *sdev = scsi_get_host_dev(shost);
800 int rval = __gdth_execute(sdev, gdtcmd, cmnd, timeout, info);
801
802 scsi_free_host_dev(sdev);
803 return rval;
804}
805
Linus Torvalds1da177e2005-04-16 15:20:36 -0700806static void gdth_eval_mapping(ulong32 size, ulong32 *cyls, int *heads, int *secs)
807{
808 *cyls = size /HEADS/SECS;
809 if (*cyls <= MAXCYLS) {
810 *heads = HEADS;
811 *secs = SECS;
812 } else { /* too high for 64*32 */
813 *cyls = size /MEDHEADS/MEDSECS;
814 if (*cyls <= MAXCYLS) {
815 *heads = MEDHEADS;
816 *secs = MEDSECS;
817 } else { /* too high for 127*63 */
818 *cyls = size /BIGHEADS/BIGSECS;
819 *heads = BIGHEADS;
820 *secs = BIGSECS;
821 }
822 }
823}
824
825/* controller search and initialization functions */
Christoph Hellwig706a5d42007-10-02 22:49:35 +0200826#ifdef CONFIG_EISA
Linus Torvalds1da177e2005-04-16 15:20:36 -0700827static int __init gdth_search_eisa(ushort eisa_adr)
828{
829 ulong32 id;
830
831 TRACE(("gdth_search_eisa() adr. %x\n",eisa_adr));
832 id = inl(eisa_adr+ID0REG);
833 if (id == GDT3A_ID || id == GDT3B_ID) { /* GDT3000A or GDT3000B */
834 if ((inb(eisa_adr+EISAREG) & 8) == 0)
835 return 0; /* not EISA configured */
836 return 1;
837 }
838 if (id == GDT3_ID) /* GDT3000 */
839 return 1;
840
841 return 0;
842}
Christoph Hellwig706a5d42007-10-02 22:49:35 +0200843#endif /* CONFIG_EISA */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700844
Christoph Hellwigaed91cb2007-10-02 22:48:16 +0200845#ifdef CONFIG_ISA
Linus Torvalds1da177e2005-04-16 15:20:36 -0700846static int __init gdth_search_isa(ulong32 bios_adr)
847{
848 void __iomem *addr;
849 ulong32 id;
850
851 TRACE(("gdth_search_isa() bios adr. %x\n",bios_adr));
852 if ((addr = ioremap(bios_adr+BIOS_ID_OFFS, sizeof(ulong32))) != NULL) {
853 id = gdth_readl(addr);
854 iounmap(addr);
855 if (id == GDT2_ID) /* GDT2000 */
856 return 1;
857 }
858 return 0;
859}
Christoph Hellwigaed91cb2007-10-02 22:48:16 +0200860#endif /* CONFIG_ISA */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700861
Christoph Hellwig8514ef22007-10-02 22:51:06 +0200862#ifdef CONFIG_PCI
863static void gdth_search_dev(gdth_pci_str *pcistr, ushort *cnt,
864 ushort vendor, ushort dev);
865
Linus Torvalds1da177e2005-04-16 15:20:36 -0700866static int __init gdth_search_pci(gdth_pci_str *pcistr)
867{
868 ushort device, cnt;
869
870 TRACE(("gdth_search_pci()\n"));
871
872 cnt = 0;
873 for (device = 0; device <= PCI_DEVICE_ID_VORTEX_GDT6555; ++device)
874 gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX, device);
875 for (device = PCI_DEVICE_ID_VORTEX_GDT6x17RP;
876 device <= PCI_DEVICE_ID_VORTEX_GDTMAXRP; ++device)
877 gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX, device);
878 gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX,
879 PCI_DEVICE_ID_VORTEX_GDTNEWRX);
880 gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX,
881 PCI_DEVICE_ID_VORTEX_GDTNEWRX2);
882 gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_INTEL,
883 PCI_DEVICE_ID_INTEL_SRC);
884 gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_INTEL,
885 PCI_DEVICE_ID_INTEL_SRC_XSCALE);
886 return cnt;
887}
888
889/* Vortex only makes RAID controllers.
890 * We do not really want to specify all 550 ids here, so wildcard match.
891 */
David Rientjes6c4b7e42007-05-23 14:41:52 -0700892static struct pci_device_id gdthtable[] __maybe_unused = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700893 {PCI_VENDOR_ID_VORTEX,PCI_ANY_ID,PCI_ANY_ID, PCI_ANY_ID},
894 {PCI_VENDOR_ID_INTEL,PCI_DEVICE_ID_INTEL_SRC,PCI_ANY_ID,PCI_ANY_ID},
895 {PCI_VENDOR_ID_INTEL,PCI_DEVICE_ID_INTEL_SRC_XSCALE,PCI_ANY_ID,PCI_ANY_ID},
896 {0}
897};
898MODULE_DEVICE_TABLE(pci,gdthtable);
899
900static void __init gdth_search_dev(gdth_pci_str *pcistr, ushort *cnt,
Leubner, Achimcbd5f692006-06-09 11:34:29 -0700901 ushort vendor, ushort device)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700902{
903 ulong base0, base1, base2;
904 struct pci_dev *pdev;
905
906 TRACE(("gdth_search_dev() cnt %d vendor %x device %x\n",
907 *cnt, vendor, device));
908
909 pdev = NULL;
910 while ((pdev = pci_find_device(vendor, device, pdev))
911 != NULL) {
912 if (pci_enable_device(pdev))
913 continue;
914 if (*cnt >= MAXHA)
915 return;
916 /* GDT PCI controller found, resources are already in pdev */
917 pcistr[*cnt].pdev = pdev;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700918 pcistr[*cnt].irq = pdev->irq;
919 base0 = pci_resource_flags(pdev, 0);
920 base1 = pci_resource_flags(pdev, 1);
921 base2 = pci_resource_flags(pdev, 2);
922 if (device <= PCI_DEVICE_ID_VORTEX_GDT6000B || /* GDT6000/B */
923 device >= PCI_DEVICE_ID_VORTEX_GDT6x17RP) { /* MPR */
924 if (!(base0 & IORESOURCE_MEM))
925 continue;
926 pcistr[*cnt].dpmem = pci_resource_start(pdev, 0);
927 } else { /* GDT6110, GDT6120, .. */
928 if (!(base0 & IORESOURCE_MEM) ||
929 !(base2 & IORESOURCE_MEM) ||
930 !(base1 & IORESOURCE_IO))
931 continue;
932 pcistr[*cnt].dpmem = pci_resource_start(pdev, 2);
933 pcistr[*cnt].io_mm = pci_resource_start(pdev, 0);
934 pcistr[*cnt].io = pci_resource_start(pdev, 1);
935 }
936 TRACE2(("Controller found at %d/%d, irq %d, dpmem 0x%lx\n",
Jeff Garzik8e9a8a02007-07-17 05:25:17 -0400937 pcistr[*cnt].pdev->bus->number,
938 PCI_SLOT(pcistr[*cnt].pdev->devfn),
Linus Torvalds1da177e2005-04-16 15:20:36 -0700939 pcistr[*cnt].irq, pcistr[*cnt].dpmem));
940 (*cnt)++;
941 }
942}
943
Linus Torvalds1da177e2005-04-16 15:20:36 -0700944static void __init gdth_sort_pci(gdth_pci_str *pcistr, int cnt)
945{
946 gdth_pci_str temp;
947 int i, changed;
948
949 TRACE(("gdth_sort_pci() cnt %d\n",cnt));
950 if (cnt == 0)
951 return;
952
953 do {
954 changed = FALSE;
955 for (i = 0; i < cnt-1; ++i) {
956 if (!reverse_scan) {
Jeff Garzik8e9a8a02007-07-17 05:25:17 -0400957 if ((pcistr[i].pdev->bus->number > pcistr[i+1].pdev->bus->number) ||
958 (pcistr[i].pdev->bus->number == pcistr[i+1].pdev->bus->number &&
959 PCI_SLOT(pcistr[i].pdev->devfn) >
960 PCI_SLOT(pcistr[i+1].pdev->devfn))) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700961 temp = pcistr[i];
962 pcistr[i] = pcistr[i+1];
963 pcistr[i+1] = temp;
964 changed = TRUE;
965 }
966 } else {
Jeff Garzik8e9a8a02007-07-17 05:25:17 -0400967 if ((pcistr[i].pdev->bus->number < pcistr[i+1].pdev->bus->number) ||
968 (pcistr[i].pdev->bus->number == pcistr[i+1].pdev->bus->number &&
969 PCI_SLOT(pcistr[i].pdev->devfn) <
970 PCI_SLOT(pcistr[i+1].pdev->devfn))) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700971 temp = pcistr[i];
972 pcistr[i] = pcistr[i+1];
973 pcistr[i+1] = temp;
974 changed = TRUE;
975 }
976 }
977 }
978 } while (changed);
979}
Christoph Hellwig8514ef22007-10-02 22:51:06 +0200980#endif /* CONFIG_PCI */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700981
Christoph Hellwig706a5d42007-10-02 22:49:35 +0200982#ifdef CONFIG_EISA
Linus Torvalds1da177e2005-04-16 15:20:36 -0700983static int __init gdth_init_eisa(ushort eisa_adr,gdth_ha_str *ha)
984{
985 ulong32 retries,id;
986 unchar prot_ver,eisacf,i,irq_found;
987
988 TRACE(("gdth_init_eisa() adr. %x\n",eisa_adr));
989
990 /* disable board interrupts, deinitialize services */
991 outb(0xff,eisa_adr+EDOORREG);
992 outb(0x00,eisa_adr+EDENABREG);
993 outb(0x00,eisa_adr+EINTENABREG);
994
995 outb(0xff,eisa_adr+LDOORREG);
996 retries = INIT_RETRIES;
997 gdth_delay(20);
998 while (inb(eisa_adr+EDOORREG) != 0xff) {
999 if (--retries == 0) {
1000 printk("GDT-EISA: Initialization error (DEINIT failed)\n");
1001 return 0;
1002 }
1003 gdth_delay(1);
1004 TRACE2(("wait for DEINIT: retries=%d\n",retries));
1005 }
1006 prot_ver = inb(eisa_adr+MAILBOXREG);
1007 outb(0xff,eisa_adr+EDOORREG);
1008 if (prot_ver != PROTOCOL_VERSION) {
1009 printk("GDT-EISA: Illegal protocol version\n");
1010 return 0;
1011 }
1012 ha->bmic = eisa_adr;
1013 ha->brd_phys = (ulong32)eisa_adr >> 12;
1014
1015 outl(0,eisa_adr+MAILBOXREG);
1016 outl(0,eisa_adr+MAILBOXREG+4);
1017 outl(0,eisa_adr+MAILBOXREG+8);
1018 outl(0,eisa_adr+MAILBOXREG+12);
1019
1020 /* detect IRQ */
1021 if ((id = inl(eisa_adr+ID0REG)) == GDT3_ID) {
1022 ha->oem_id = OEM_ID_ICP;
1023 ha->type = GDT_EISA;
1024 ha->stype = id;
1025 outl(1,eisa_adr+MAILBOXREG+8);
1026 outb(0xfe,eisa_adr+LDOORREG);
1027 retries = INIT_RETRIES;
1028 gdth_delay(20);
1029 while (inb(eisa_adr+EDOORREG) != 0xfe) {
1030 if (--retries == 0) {
1031 printk("GDT-EISA: Initialization error (get IRQ failed)\n");
1032 return 0;
1033 }
1034 gdth_delay(1);
1035 }
1036 ha->irq = inb(eisa_adr+MAILBOXREG);
1037 outb(0xff,eisa_adr+EDOORREG);
1038 TRACE2(("GDT3000/3020: IRQ=%d\n",ha->irq));
1039 /* check the result */
1040 if (ha->irq == 0) {
1041 TRACE2(("Unknown IRQ, use IRQ table from cmd line !\n"));
1042 for (i = 0, irq_found = FALSE;
1043 i < MAXHA && irq[i] != 0xff; ++i) {
1044 if (irq[i]==10 || irq[i]==11 || irq[i]==12 || irq[i]==14) {
1045 irq_found = TRUE;
1046 break;
1047 }
1048 }
1049 if (irq_found) {
1050 ha->irq = irq[i];
1051 irq[i] = 0;
1052 printk("GDT-EISA: Can not detect controller IRQ,\n");
1053 printk("Use IRQ setting from command line (IRQ = %d)\n",
1054 ha->irq);
1055 } else {
1056 printk("GDT-EISA: Initialization error (unknown IRQ), Enable\n");
1057 printk("the controller BIOS or use command line parameters\n");
1058 return 0;
1059 }
1060 }
1061 } else {
1062 eisacf = inb(eisa_adr+EISAREG) & 7;
1063 if (eisacf > 4) /* level triggered */
1064 eisacf -= 4;
1065 ha->irq = gdth_irq_tab[eisacf];
1066 ha->oem_id = OEM_ID_ICP;
1067 ha->type = GDT_EISA;
1068 ha->stype = id;
1069 }
1070
1071 ha->dma64_support = 0;
1072 return 1;
1073}
Christoph Hellwig706a5d42007-10-02 22:49:35 +02001074#endif /* CONFIG_EISA */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001075
Christoph Hellwigaed91cb2007-10-02 22:48:16 +02001076#ifdef CONFIG_ISA
Linus Torvalds1da177e2005-04-16 15:20:36 -07001077static int __init gdth_init_isa(ulong32 bios_adr,gdth_ha_str *ha)
1078{
1079 register gdt2_dpram_str __iomem *dp2_ptr;
1080 int i;
1081 unchar irq_drq,prot_ver;
1082 ulong32 retries;
1083
1084 TRACE(("gdth_init_isa() bios adr. %x\n",bios_adr));
1085
1086 ha->brd = ioremap(bios_adr, sizeof(gdt2_dpram_str));
1087 if (ha->brd == NULL) {
1088 printk("GDT-ISA: Initialization error (DPMEM remap error)\n");
1089 return 0;
1090 }
1091 dp2_ptr = ha->brd;
1092 gdth_writeb(1, &dp2_ptr->io.memlock); /* switch off write protection */
1093 /* reset interface area */
1094 memset_io(&dp2_ptr->u, 0, sizeof(dp2_ptr->u));
1095 if (gdth_readl(&dp2_ptr->u) != 0) {
1096 printk("GDT-ISA: Initialization error (DPMEM write error)\n");
1097 iounmap(ha->brd);
1098 return 0;
1099 }
1100
1101 /* disable board interrupts, read DRQ and IRQ */
1102 gdth_writeb(0xff, &dp2_ptr->io.irqdel);
1103 gdth_writeb(0x00, &dp2_ptr->io.irqen);
1104 gdth_writeb(0x00, &dp2_ptr->u.ic.S_Status);
1105 gdth_writeb(0x00, &dp2_ptr->u.ic.Cmd_Index);
1106
1107 irq_drq = gdth_readb(&dp2_ptr->io.rq);
1108 for (i=0; i<3; ++i) {
1109 if ((irq_drq & 1)==0)
1110 break;
1111 irq_drq >>= 1;
1112 }
1113 ha->drq = gdth_drq_tab[i];
1114
1115 irq_drq = gdth_readb(&dp2_ptr->io.rq) >> 3;
1116 for (i=1; i<5; ++i) {
1117 if ((irq_drq & 1)==0)
1118 break;
1119 irq_drq >>= 1;
1120 }
1121 ha->irq = gdth_irq_tab[i];
1122
1123 /* deinitialize services */
1124 gdth_writel(bios_adr, &dp2_ptr->u.ic.S_Info[0]);
1125 gdth_writeb(0xff, &dp2_ptr->u.ic.S_Cmd_Indx);
1126 gdth_writeb(0, &dp2_ptr->io.event);
1127 retries = INIT_RETRIES;
1128 gdth_delay(20);
1129 while (gdth_readb(&dp2_ptr->u.ic.S_Status) != 0xff) {
1130 if (--retries == 0) {
1131 printk("GDT-ISA: Initialization error (DEINIT failed)\n");
1132 iounmap(ha->brd);
1133 return 0;
1134 }
1135 gdth_delay(1);
1136 }
1137 prot_ver = (unchar)gdth_readl(&dp2_ptr->u.ic.S_Info[0]);
1138 gdth_writeb(0, &dp2_ptr->u.ic.Status);
1139 gdth_writeb(0xff, &dp2_ptr->io.irqdel);
1140 if (prot_ver != PROTOCOL_VERSION) {
1141 printk("GDT-ISA: Illegal protocol version\n");
1142 iounmap(ha->brd);
1143 return 0;
1144 }
1145
1146 ha->oem_id = OEM_ID_ICP;
1147 ha->type = GDT_ISA;
1148 ha->ic_all_size = sizeof(dp2_ptr->u);
1149 ha->stype= GDT2_ID;
1150 ha->brd_phys = bios_adr >> 4;
1151
1152 /* special request to controller BIOS */
1153 gdth_writel(0x00, &dp2_ptr->u.ic.S_Info[0]);
1154 gdth_writel(0x00, &dp2_ptr->u.ic.S_Info[1]);
1155 gdth_writel(0x01, &dp2_ptr->u.ic.S_Info[2]);
1156 gdth_writel(0x00, &dp2_ptr->u.ic.S_Info[3]);
1157 gdth_writeb(0xfe, &dp2_ptr->u.ic.S_Cmd_Indx);
1158 gdth_writeb(0, &dp2_ptr->io.event);
1159 retries = INIT_RETRIES;
1160 gdth_delay(20);
1161 while (gdth_readb(&dp2_ptr->u.ic.S_Status) != 0xfe) {
1162 if (--retries == 0) {
1163 printk("GDT-ISA: Initialization error\n");
1164 iounmap(ha->brd);
1165 return 0;
1166 }
1167 gdth_delay(1);
1168 }
1169 gdth_writeb(0, &dp2_ptr->u.ic.Status);
1170 gdth_writeb(0xff, &dp2_ptr->io.irqdel);
1171
1172 ha->dma64_support = 0;
1173 return 1;
1174}
Christoph Hellwigaed91cb2007-10-02 22:48:16 +02001175#endif /* CONFIG_ISA */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001176
Christoph Hellwig8514ef22007-10-02 22:51:06 +02001177#ifdef CONFIG_PCI
Linus Torvalds1da177e2005-04-16 15:20:36 -07001178static int __init gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha)
1179{
1180 register gdt6_dpram_str __iomem *dp6_ptr;
1181 register gdt6c_dpram_str __iomem *dp6c_ptr;
1182 register gdt6m_dpram_str __iomem *dp6m_ptr;
1183 ulong32 retries;
1184 unchar prot_ver;
1185 ushort command;
1186 int i, found = FALSE;
1187
1188 TRACE(("gdth_init_pci()\n"));
1189
Jeff Garzik8e9a8a02007-07-17 05:25:17 -04001190 if (pcistr->pdev->vendor == PCI_VENDOR_ID_INTEL)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001191 ha->oem_id = OEM_ID_INTEL;
1192 else
1193 ha->oem_id = OEM_ID_ICP;
Jeff Garzik8e9a8a02007-07-17 05:25:17 -04001194 ha->brd_phys = (pcistr->pdev->bus->number << 8) | (pcistr->pdev->devfn & 0xf8);
1195 ha->stype = (ulong32)pcistr->pdev->device;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001196 ha->irq = pcistr->irq;
1197 ha->pdev = pcistr->pdev;
1198
Jeff Garzik8e9a8a02007-07-17 05:25:17 -04001199 if (ha->pdev->device <= PCI_DEVICE_ID_VORTEX_GDT6000B) { /* GDT6000/B */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001200 TRACE2(("init_pci() dpmem %lx irq %d\n",pcistr->dpmem,ha->irq));
1201 ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6_dpram_str));
1202 if (ha->brd == NULL) {
1203 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1204 return 0;
1205 }
1206 /* check and reset interface area */
1207 dp6_ptr = ha->brd;
1208 gdth_writel(DPMEM_MAGIC, &dp6_ptr->u);
1209 if (gdth_readl(&dp6_ptr->u) != DPMEM_MAGIC) {
1210 printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
1211 pcistr->dpmem);
1212 found = FALSE;
1213 for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
1214 iounmap(ha->brd);
1215 ha->brd = ioremap(i, sizeof(ushort));
1216 if (ha->brd == NULL) {
1217 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1218 return 0;
1219 }
1220 if (gdth_readw(ha->brd) != 0xffff) {
1221 TRACE2(("init_pci_old() address 0x%x busy\n", i));
1222 continue;
1223 }
1224 iounmap(ha->brd);
1225 pci_write_config_dword(pcistr->pdev,
1226 PCI_BASE_ADDRESS_0, i);
1227 ha->brd = ioremap(i, sizeof(gdt6_dpram_str));
1228 if (ha->brd == NULL) {
1229 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1230 return 0;
1231 }
1232 dp6_ptr = ha->brd;
1233 gdth_writel(DPMEM_MAGIC, &dp6_ptr->u);
1234 if (gdth_readl(&dp6_ptr->u) == DPMEM_MAGIC) {
1235 printk("GDT-PCI: Use free address at 0x%x\n", i);
1236 found = TRUE;
1237 break;
1238 }
1239 }
1240 if (!found) {
1241 printk("GDT-PCI: No free address found!\n");
1242 iounmap(ha->brd);
1243 return 0;
1244 }
1245 }
1246 memset_io(&dp6_ptr->u, 0, sizeof(dp6_ptr->u));
1247 if (gdth_readl(&dp6_ptr->u) != 0) {
1248 printk("GDT-PCI: Initialization error (DPMEM write error)\n");
1249 iounmap(ha->brd);
1250 return 0;
1251 }
1252
1253 /* disable board interrupts, deinit services */
1254 gdth_writeb(0xff, &dp6_ptr->io.irqdel);
1255 gdth_writeb(0x00, &dp6_ptr->io.irqen);
1256 gdth_writeb(0x00, &dp6_ptr->u.ic.S_Status);
1257 gdth_writeb(0x00, &dp6_ptr->u.ic.Cmd_Index);
1258
1259 gdth_writel(pcistr->dpmem, &dp6_ptr->u.ic.S_Info[0]);
1260 gdth_writeb(0xff, &dp6_ptr->u.ic.S_Cmd_Indx);
1261 gdth_writeb(0, &dp6_ptr->io.event);
1262 retries = INIT_RETRIES;
1263 gdth_delay(20);
1264 while (gdth_readb(&dp6_ptr->u.ic.S_Status) != 0xff) {
1265 if (--retries == 0) {
1266 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1267 iounmap(ha->brd);
1268 return 0;
1269 }
1270 gdth_delay(1);
1271 }
1272 prot_ver = (unchar)gdth_readl(&dp6_ptr->u.ic.S_Info[0]);
1273 gdth_writeb(0, &dp6_ptr->u.ic.S_Status);
1274 gdth_writeb(0xff, &dp6_ptr->io.irqdel);
1275 if (prot_ver != PROTOCOL_VERSION) {
1276 printk("GDT-PCI: Illegal protocol version\n");
1277 iounmap(ha->brd);
1278 return 0;
1279 }
1280
1281 ha->type = GDT_PCI;
1282 ha->ic_all_size = sizeof(dp6_ptr->u);
1283
1284 /* special command to controller BIOS */
1285 gdth_writel(0x00, &dp6_ptr->u.ic.S_Info[0]);
1286 gdth_writel(0x00, &dp6_ptr->u.ic.S_Info[1]);
1287 gdth_writel(0x00, &dp6_ptr->u.ic.S_Info[2]);
1288 gdth_writel(0x00, &dp6_ptr->u.ic.S_Info[3]);
1289 gdth_writeb(0xfe, &dp6_ptr->u.ic.S_Cmd_Indx);
1290 gdth_writeb(0, &dp6_ptr->io.event);
1291 retries = INIT_RETRIES;
1292 gdth_delay(20);
1293 while (gdth_readb(&dp6_ptr->u.ic.S_Status) != 0xfe) {
1294 if (--retries == 0) {
1295 printk("GDT-PCI: Initialization error\n");
1296 iounmap(ha->brd);
1297 return 0;
1298 }
1299 gdth_delay(1);
1300 }
1301 gdth_writeb(0, &dp6_ptr->u.ic.S_Status);
1302 gdth_writeb(0xff, &dp6_ptr->io.irqdel);
1303
1304 ha->dma64_support = 0;
1305
Jeff Garzik8e9a8a02007-07-17 05:25:17 -04001306 } else if (ha->pdev->device <= PCI_DEVICE_ID_VORTEX_GDT6555) { /* GDT6110, ... */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001307 ha->plx = (gdt6c_plx_regs *)pcistr->io;
1308 TRACE2(("init_pci_new() dpmem %lx irq %d\n",
1309 pcistr->dpmem,ha->irq));
1310 ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6c_dpram_str));
1311 if (ha->brd == NULL) {
1312 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1313 iounmap(ha->brd);
1314 return 0;
1315 }
1316 /* check and reset interface area */
1317 dp6c_ptr = ha->brd;
1318 gdth_writel(DPMEM_MAGIC, &dp6c_ptr->u);
1319 if (gdth_readl(&dp6c_ptr->u) != DPMEM_MAGIC) {
1320 printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
1321 pcistr->dpmem);
1322 found = FALSE;
1323 for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
1324 iounmap(ha->brd);
1325 ha->brd = ioremap(i, sizeof(ushort));
1326 if (ha->brd == NULL) {
1327 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1328 return 0;
1329 }
1330 if (gdth_readw(ha->brd) != 0xffff) {
1331 TRACE2(("init_pci_plx() address 0x%x busy\n", i));
1332 continue;
1333 }
1334 iounmap(ha->brd);
1335 pci_write_config_dword(pcistr->pdev,
1336 PCI_BASE_ADDRESS_2, i);
1337 ha->brd = ioremap(i, sizeof(gdt6c_dpram_str));
1338 if (ha->brd == NULL) {
1339 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1340 return 0;
1341 }
1342 dp6c_ptr = ha->brd;
1343 gdth_writel(DPMEM_MAGIC, &dp6c_ptr->u);
1344 if (gdth_readl(&dp6c_ptr->u) == DPMEM_MAGIC) {
1345 printk("GDT-PCI: Use free address at 0x%x\n", i);
1346 found = TRUE;
1347 break;
1348 }
1349 }
1350 if (!found) {
1351 printk("GDT-PCI: No free address found!\n");
1352 iounmap(ha->brd);
1353 return 0;
1354 }
1355 }
1356 memset_io(&dp6c_ptr->u, 0, sizeof(dp6c_ptr->u));
1357 if (gdth_readl(&dp6c_ptr->u) != 0) {
1358 printk("GDT-PCI: Initialization error (DPMEM write error)\n");
1359 iounmap(ha->brd);
1360 return 0;
1361 }
1362
1363 /* disable board interrupts, deinit services */
1364 outb(0x00,PTR2USHORT(&ha->plx->control1));
1365 outb(0xff,PTR2USHORT(&ha->plx->edoor_reg));
1366
1367 gdth_writeb(0x00, &dp6c_ptr->u.ic.S_Status);
1368 gdth_writeb(0x00, &dp6c_ptr->u.ic.Cmd_Index);
1369
1370 gdth_writel(pcistr->dpmem, &dp6c_ptr->u.ic.S_Info[0]);
1371 gdth_writeb(0xff, &dp6c_ptr->u.ic.S_Cmd_Indx);
1372
1373 outb(1,PTR2USHORT(&ha->plx->ldoor_reg));
1374
1375 retries = INIT_RETRIES;
1376 gdth_delay(20);
1377 while (gdth_readb(&dp6c_ptr->u.ic.S_Status) != 0xff) {
1378 if (--retries == 0) {
1379 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1380 iounmap(ha->brd);
1381 return 0;
1382 }
1383 gdth_delay(1);
1384 }
1385 prot_ver = (unchar)gdth_readl(&dp6c_ptr->u.ic.S_Info[0]);
1386 gdth_writeb(0, &dp6c_ptr->u.ic.Status);
1387 if (prot_ver != PROTOCOL_VERSION) {
1388 printk("GDT-PCI: Illegal protocol version\n");
1389 iounmap(ha->brd);
1390 return 0;
1391 }
1392
1393 ha->type = GDT_PCINEW;
1394 ha->ic_all_size = sizeof(dp6c_ptr->u);
1395
1396 /* special command to controller BIOS */
1397 gdth_writel(0x00, &dp6c_ptr->u.ic.S_Info[0]);
1398 gdth_writel(0x00, &dp6c_ptr->u.ic.S_Info[1]);
1399 gdth_writel(0x00, &dp6c_ptr->u.ic.S_Info[2]);
1400 gdth_writel(0x00, &dp6c_ptr->u.ic.S_Info[3]);
1401 gdth_writeb(0xfe, &dp6c_ptr->u.ic.S_Cmd_Indx);
1402
1403 outb(1,PTR2USHORT(&ha->plx->ldoor_reg));
1404
1405 retries = INIT_RETRIES;
1406 gdth_delay(20);
1407 while (gdth_readb(&dp6c_ptr->u.ic.S_Status) != 0xfe) {
1408 if (--retries == 0) {
1409 printk("GDT-PCI: Initialization error\n");
1410 iounmap(ha->brd);
1411 return 0;
1412 }
1413 gdth_delay(1);
1414 }
1415 gdth_writeb(0, &dp6c_ptr->u.ic.S_Status);
1416
1417 ha->dma64_support = 0;
1418
1419 } else { /* MPR */
1420 TRACE2(("init_pci_mpr() dpmem %lx irq %d\n",pcistr->dpmem,ha->irq));
1421 ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6m_dpram_str));
1422 if (ha->brd == NULL) {
1423 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1424 return 0;
1425 }
1426
1427 /* manipulate config. space to enable DPMEM, start RP controller */
1428 pci_read_config_word(pcistr->pdev, PCI_COMMAND, &command);
1429 command |= 6;
1430 pci_write_config_word(pcistr->pdev, PCI_COMMAND, command);
1431 if (pci_resource_start(pcistr->pdev, 8) == 1UL)
1432 pci_resource_start(pcistr->pdev, 8) = 0UL;
1433 i = 0xFEFF0001UL;
1434 pci_write_config_dword(pcistr->pdev, PCI_ROM_ADDRESS, i);
1435 gdth_delay(1);
1436 pci_write_config_dword(pcistr->pdev, PCI_ROM_ADDRESS,
1437 pci_resource_start(pcistr->pdev, 8));
1438
1439 dp6m_ptr = ha->brd;
1440
1441 /* Ensure that it is safe to access the non HW portions of DPMEM.
1442 * Aditional check needed for Xscale based RAID controllers */
1443 while( ((int)gdth_readb(&dp6m_ptr->i960r.sema0_reg) ) & 3 )
1444 gdth_delay(1);
1445
1446 /* check and reset interface area */
1447 gdth_writel(DPMEM_MAGIC, &dp6m_ptr->u);
1448 if (gdth_readl(&dp6m_ptr->u) != DPMEM_MAGIC) {
1449 printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
1450 pcistr->dpmem);
1451 found = FALSE;
1452 for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
1453 iounmap(ha->brd);
1454 ha->brd = ioremap(i, sizeof(ushort));
1455 if (ha->brd == NULL) {
1456 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1457 return 0;
1458 }
1459 if (gdth_readw(ha->brd) != 0xffff) {
1460 TRACE2(("init_pci_mpr() address 0x%x busy\n", i));
1461 continue;
1462 }
1463 iounmap(ha->brd);
1464 pci_write_config_dword(pcistr->pdev,
1465 PCI_BASE_ADDRESS_0, i);
1466 ha->brd = ioremap(i, sizeof(gdt6m_dpram_str));
1467 if (ha->brd == NULL) {
1468 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1469 return 0;
1470 }
1471 dp6m_ptr = ha->brd;
1472 gdth_writel(DPMEM_MAGIC, &dp6m_ptr->u);
1473 if (gdth_readl(&dp6m_ptr->u) == DPMEM_MAGIC) {
1474 printk("GDT-PCI: Use free address at 0x%x\n", i);
1475 found = TRUE;
1476 break;
1477 }
1478 }
1479 if (!found) {
1480 printk("GDT-PCI: No free address found!\n");
1481 iounmap(ha->brd);
1482 return 0;
1483 }
1484 }
1485 memset_io(&dp6m_ptr->u, 0, sizeof(dp6m_ptr->u));
1486
1487 /* disable board interrupts, deinit services */
1488 gdth_writeb(gdth_readb(&dp6m_ptr->i960r.edoor_en_reg) | 4,
1489 &dp6m_ptr->i960r.edoor_en_reg);
1490 gdth_writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
1491 gdth_writeb(0x00, &dp6m_ptr->u.ic.S_Status);
1492 gdth_writeb(0x00, &dp6m_ptr->u.ic.Cmd_Index);
1493
1494 gdth_writel(pcistr->dpmem, &dp6m_ptr->u.ic.S_Info[0]);
1495 gdth_writeb(0xff, &dp6m_ptr->u.ic.S_Cmd_Indx);
1496 gdth_writeb(1, &dp6m_ptr->i960r.ldoor_reg);
1497 retries = INIT_RETRIES;
1498 gdth_delay(20);
1499 while (gdth_readb(&dp6m_ptr->u.ic.S_Status) != 0xff) {
1500 if (--retries == 0) {
1501 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1502 iounmap(ha->brd);
1503 return 0;
1504 }
1505 gdth_delay(1);
1506 }
1507 prot_ver = (unchar)gdth_readl(&dp6m_ptr->u.ic.S_Info[0]);
1508 gdth_writeb(0, &dp6m_ptr->u.ic.S_Status);
1509 if (prot_ver != PROTOCOL_VERSION) {
1510 printk("GDT-PCI: Illegal protocol version\n");
1511 iounmap(ha->brd);
1512 return 0;
1513 }
1514
1515 ha->type = GDT_PCIMPR;
1516 ha->ic_all_size = sizeof(dp6m_ptr->u);
1517
1518 /* special command to controller BIOS */
1519 gdth_writel(0x00, &dp6m_ptr->u.ic.S_Info[0]);
1520 gdth_writel(0x00, &dp6m_ptr->u.ic.S_Info[1]);
1521 gdth_writel(0x00, &dp6m_ptr->u.ic.S_Info[2]);
1522 gdth_writel(0x00, &dp6m_ptr->u.ic.S_Info[3]);
1523 gdth_writeb(0xfe, &dp6m_ptr->u.ic.S_Cmd_Indx);
1524 gdth_writeb(1, &dp6m_ptr->i960r.ldoor_reg);
1525 retries = INIT_RETRIES;
1526 gdth_delay(20);
1527 while (gdth_readb(&dp6m_ptr->u.ic.S_Status) != 0xfe) {
1528 if (--retries == 0) {
1529 printk("GDT-PCI: Initialization error\n");
1530 iounmap(ha->brd);
1531 return 0;
1532 }
1533 gdth_delay(1);
1534 }
1535 gdth_writeb(0, &dp6m_ptr->u.ic.S_Status);
1536
1537 /* read FW version to detect 64-bit DMA support */
1538 gdth_writeb(0xfd, &dp6m_ptr->u.ic.S_Cmd_Indx);
1539 gdth_writeb(1, &dp6m_ptr->i960r.ldoor_reg);
1540 retries = INIT_RETRIES;
1541 gdth_delay(20);
1542 while (gdth_readb(&dp6m_ptr->u.ic.S_Status) != 0xfd) {
1543 if (--retries == 0) {
1544 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1545 iounmap(ha->brd);
1546 return 0;
1547 }
1548 gdth_delay(1);
1549 }
1550 prot_ver = (unchar)(gdth_readl(&dp6m_ptr->u.ic.S_Info[0]) >> 16);
1551 gdth_writeb(0, &dp6m_ptr->u.ic.S_Status);
1552 if (prot_ver < 0x2b) /* FW < x.43: no 64-bit DMA support */
1553 ha->dma64_support = 0;
1554 else
1555 ha->dma64_support = 1;
1556 }
1557
1558 return 1;
1559}
Christoph Hellwig8514ef22007-10-02 22:51:06 +02001560#endif /* CONFIG_PCI */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001561
1562/* controller protocol functions */
1563
1564static void __init gdth_enable_int(int hanum)
1565{
1566 gdth_ha_str *ha;
1567 ulong flags;
1568 gdt2_dpram_str __iomem *dp2_ptr;
1569 gdt6_dpram_str __iomem *dp6_ptr;
1570 gdt6m_dpram_str __iomem *dp6m_ptr;
1571
1572 TRACE(("gdth_enable_int() hanum %d\n",hanum));
1573 ha = HADATA(gdth_ctr_tab[hanum]);
1574 spin_lock_irqsave(&ha->smp_lock, flags);
1575
1576 if (ha->type == GDT_EISA) {
1577 outb(0xff, ha->bmic + EDOORREG);
1578 outb(0xff, ha->bmic + EDENABREG);
1579 outb(0x01, ha->bmic + EINTENABREG);
1580 } else if (ha->type == GDT_ISA) {
1581 dp2_ptr = ha->brd;
1582 gdth_writeb(1, &dp2_ptr->io.irqdel);
1583 gdth_writeb(0, &dp2_ptr->u.ic.Cmd_Index);
1584 gdth_writeb(1, &dp2_ptr->io.irqen);
1585 } else if (ha->type == GDT_PCI) {
1586 dp6_ptr = ha->brd;
1587 gdth_writeb(1, &dp6_ptr->io.irqdel);
1588 gdth_writeb(0, &dp6_ptr->u.ic.Cmd_Index);
1589 gdth_writeb(1, &dp6_ptr->io.irqen);
1590 } else if (ha->type == GDT_PCINEW) {
1591 outb(0xff, PTR2USHORT(&ha->plx->edoor_reg));
1592 outb(0x03, PTR2USHORT(&ha->plx->control1));
1593 } else if (ha->type == GDT_PCIMPR) {
1594 dp6m_ptr = ha->brd;
1595 gdth_writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
1596 gdth_writeb(gdth_readb(&dp6m_ptr->i960r.edoor_en_reg) & ~4,
1597 &dp6m_ptr->i960r.edoor_en_reg);
1598 }
1599 spin_unlock_irqrestore(&ha->smp_lock, flags);
1600}
1601
1602
1603static int gdth_get_status(unchar *pIStatus,int irq)
1604{
1605 register gdth_ha_str *ha;
1606 int i;
1607
1608 TRACE(("gdth_get_status() irq %d ctr_count %d\n",
1609 irq,gdth_ctr_count));
1610
1611 *pIStatus = 0;
1612 for (i=0; i<gdth_ctr_count; ++i) {
1613 ha = HADATA(gdth_ctr_tab[i]);
1614 if (ha->irq != (unchar)irq) /* check IRQ */
1615 continue;
1616 if (ha->type == GDT_EISA)
1617 *pIStatus = inb((ushort)ha->bmic + EDOORREG);
1618 else if (ha->type == GDT_ISA)
1619 *pIStatus =
1620 gdth_readb(&((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Cmd_Index);
1621 else if (ha->type == GDT_PCI)
1622 *pIStatus =
1623 gdth_readb(&((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Cmd_Index);
1624 else if (ha->type == GDT_PCINEW)
1625 *pIStatus = inb(PTR2USHORT(&ha->plx->edoor_reg));
1626 else if (ha->type == GDT_PCIMPR)
1627 *pIStatus =
1628 gdth_readb(&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.edoor_reg);
1629
1630 if (*pIStatus)
1631 return i; /* board found */
1632 }
1633 return -1;
1634}
1635
1636
1637static int gdth_test_busy(int hanum)
1638{
1639 register gdth_ha_str *ha;
1640 register int gdtsema0 = 0;
1641
1642 TRACE(("gdth_test_busy() hanum %d\n",hanum));
1643
1644 ha = HADATA(gdth_ctr_tab[hanum]);
1645 if (ha->type == GDT_EISA)
1646 gdtsema0 = (int)inb(ha->bmic + SEMA0REG);
1647 else if (ha->type == GDT_ISA)
1648 gdtsema0 = (int)gdth_readb(&((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1649 else if (ha->type == GDT_PCI)
1650 gdtsema0 = (int)gdth_readb(&((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1651 else if (ha->type == GDT_PCINEW)
1652 gdtsema0 = (int)inb(PTR2USHORT(&ha->plx->sema0_reg));
1653 else if (ha->type == GDT_PCIMPR)
1654 gdtsema0 =
1655 (int)gdth_readb(&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.sema0_reg);
1656
1657 return (gdtsema0 & 1);
1658}
1659
1660
1661static int gdth_get_cmd_index(int hanum)
1662{
1663 register gdth_ha_str *ha;
1664 int i;
1665
1666 TRACE(("gdth_get_cmd_index() hanum %d\n",hanum));
1667
1668 ha = HADATA(gdth_ctr_tab[hanum]);
1669 for (i=0; i<GDTH_MAXCMDS; ++i) {
1670 if (ha->cmd_tab[i].cmnd == UNUSED_CMND) {
1671 ha->cmd_tab[i].cmnd = ha->pccb->RequestBuffer;
1672 ha->cmd_tab[i].service = ha->pccb->Service;
1673 ha->pccb->CommandIndex = (ulong32)i+2;
1674 return (i+2);
1675 }
1676 }
1677 return 0;
1678}
1679
1680
1681static void gdth_set_sema0(int hanum)
1682{
1683 register gdth_ha_str *ha;
1684
1685 TRACE(("gdth_set_sema0() hanum %d\n",hanum));
1686
1687 ha = HADATA(gdth_ctr_tab[hanum]);
1688 if (ha->type == GDT_EISA) {
1689 outb(1, ha->bmic + SEMA0REG);
1690 } else if (ha->type == GDT_ISA) {
1691 gdth_writeb(1, &((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1692 } else if (ha->type == GDT_PCI) {
1693 gdth_writeb(1, &((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1694 } else if (ha->type == GDT_PCINEW) {
1695 outb(1, PTR2USHORT(&ha->plx->sema0_reg));
1696 } else if (ha->type == GDT_PCIMPR) {
1697 gdth_writeb(1, &((gdt6m_dpram_str __iomem *)ha->brd)->i960r.sema0_reg);
1698 }
1699}
1700
1701
1702static void gdth_copy_command(int hanum)
1703{
1704 register gdth_ha_str *ha;
1705 register gdth_cmd_str *cmd_ptr;
1706 register gdt6m_dpram_str __iomem *dp6m_ptr;
1707 register gdt6c_dpram_str __iomem *dp6c_ptr;
1708 gdt6_dpram_str __iomem *dp6_ptr;
1709 gdt2_dpram_str __iomem *dp2_ptr;
1710 ushort cp_count,dp_offset,cmd_no;
1711
1712 TRACE(("gdth_copy_command() hanum %d\n",hanum));
1713
1714 ha = HADATA(gdth_ctr_tab[hanum]);
1715 cp_count = ha->cmd_len;
1716 dp_offset= ha->cmd_offs_dpmem;
1717 cmd_no = ha->cmd_cnt;
1718 cmd_ptr = ha->pccb;
1719
1720 ++ha->cmd_cnt;
1721 if (ha->type == GDT_EISA)
1722 return; /* no DPMEM, no copy */
1723
1724 /* set cpcount dword aligned */
1725 if (cp_count & 3)
1726 cp_count += (4 - (cp_count & 3));
1727
1728 ha->cmd_offs_dpmem += cp_count;
1729
1730 /* set offset and service, copy command to DPMEM */
1731 if (ha->type == GDT_ISA) {
1732 dp2_ptr = ha->brd;
1733 gdth_writew(dp_offset + DPMEM_COMMAND_OFFSET,
1734 &dp2_ptr->u.ic.comm_queue[cmd_no].offset);
1735 gdth_writew((ushort)cmd_ptr->Service,
1736 &dp2_ptr->u.ic.comm_queue[cmd_no].serv_id);
1737 memcpy_toio(&dp2_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1738 } else if (ha->type == GDT_PCI) {
1739 dp6_ptr = ha->brd;
1740 gdth_writew(dp_offset + DPMEM_COMMAND_OFFSET,
1741 &dp6_ptr->u.ic.comm_queue[cmd_no].offset);
1742 gdth_writew((ushort)cmd_ptr->Service,
1743 &dp6_ptr->u.ic.comm_queue[cmd_no].serv_id);
1744 memcpy_toio(&dp6_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1745 } else if (ha->type == GDT_PCINEW) {
1746 dp6c_ptr = ha->brd;
1747 gdth_writew(dp_offset + DPMEM_COMMAND_OFFSET,
1748 &dp6c_ptr->u.ic.comm_queue[cmd_no].offset);
1749 gdth_writew((ushort)cmd_ptr->Service,
1750 &dp6c_ptr->u.ic.comm_queue[cmd_no].serv_id);
1751 memcpy_toio(&dp6c_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1752 } else if (ha->type == GDT_PCIMPR) {
1753 dp6m_ptr = ha->brd;
1754 gdth_writew(dp_offset + DPMEM_COMMAND_OFFSET,
1755 &dp6m_ptr->u.ic.comm_queue[cmd_no].offset);
1756 gdth_writew((ushort)cmd_ptr->Service,
1757 &dp6m_ptr->u.ic.comm_queue[cmd_no].serv_id);
1758 memcpy_toio(&dp6m_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1759 }
1760}
1761
1762
1763static void gdth_release_event(int hanum)
1764{
1765 register gdth_ha_str *ha;
1766
1767 TRACE(("gdth_release_event() hanum %d\n",hanum));
1768 ha = HADATA(gdth_ctr_tab[hanum]);
1769
1770#ifdef GDTH_STATISTICS
1771 {
1772 ulong32 i,j;
1773 for (i=0,j=0; j<GDTH_MAXCMDS; ++j) {
1774 if (ha->cmd_tab[j].cmnd != UNUSED_CMND)
1775 ++i;
1776 }
1777 if (max_index < i) {
1778 max_index = i;
1779 TRACE3(("GDT: max_index = %d\n",(ushort)i));
1780 }
1781 }
1782#endif
1783
1784 if (ha->pccb->OpCode == GDT_INIT)
1785 ha->pccb->Service |= 0x80;
1786
1787 if (ha->type == GDT_EISA) {
1788 if (ha->pccb->OpCode == GDT_INIT) /* store DMA buffer */
1789 outl(ha->ccb_phys, ha->bmic + MAILBOXREG);
1790 outb(ha->pccb->Service, ha->bmic + LDOORREG);
1791 } else if (ha->type == GDT_ISA) {
1792 gdth_writeb(0, &((gdt2_dpram_str __iomem *)ha->brd)->io.event);
1793 } else if (ha->type == GDT_PCI) {
1794 gdth_writeb(0, &((gdt6_dpram_str __iomem *)ha->brd)->io.event);
1795 } else if (ha->type == GDT_PCINEW) {
1796 outb(1, PTR2USHORT(&ha->plx->ldoor_reg));
1797 } else if (ha->type == GDT_PCIMPR) {
1798 gdth_writeb(1, &((gdt6m_dpram_str __iomem *)ha->brd)->i960r.ldoor_reg);
1799 }
1800}
1801
1802
1803static int gdth_wait(int hanum,int index,ulong32 time)
1804{
1805 gdth_ha_str *ha;
1806 int answer_found = FALSE;
1807
1808 TRACE(("gdth_wait() hanum %d index %d time %d\n",hanum,index,time));
1809
1810 ha = HADATA(gdth_ctr_tab[hanum]);
1811 if (index == 0)
1812 return 1; /* no wait required */
1813
1814 gdth_from_wait = TRUE;
1815 do {
David Howells7d12e782006-10-05 14:55:46 +01001816 gdth_interrupt((int)ha->irq,ha);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001817 if (wait_hanum==hanum && wait_index==index) {
1818 answer_found = TRUE;
1819 break;
1820 }
1821 gdth_delay(1);
1822 } while (--time);
1823 gdth_from_wait = FALSE;
1824
1825 while (gdth_test_busy(hanum))
1826 gdth_delay(0);
1827
1828 return (answer_found);
1829}
1830
1831
1832static int gdth_internal_cmd(int hanum,unchar service,ushort opcode,ulong32 p1,
1833 ulong64 p2,ulong64 p3)
1834{
1835 register gdth_ha_str *ha;
1836 register gdth_cmd_str *cmd_ptr;
1837 int retries,index;
1838
1839 TRACE2(("gdth_internal_cmd() service %d opcode %d\n",service,opcode));
1840
1841 ha = HADATA(gdth_ctr_tab[hanum]);
1842 cmd_ptr = ha->pccb;
1843 memset((char*)cmd_ptr,0,sizeof(gdth_cmd_str));
1844
1845 /* make command */
1846 for (retries = INIT_RETRIES;;) {
1847 cmd_ptr->Service = service;
1848 cmd_ptr->RequestBuffer = INTERNAL_CMND;
1849 if (!(index=gdth_get_cmd_index(hanum))) {
1850 TRACE(("GDT: No free command index found\n"));
1851 return 0;
1852 }
1853 gdth_set_sema0(hanum);
1854 cmd_ptr->OpCode = opcode;
1855 cmd_ptr->BoardNode = LOCALBOARD;
1856 if (service == CACHESERVICE) {
1857 if (opcode == GDT_IOCTL) {
1858 cmd_ptr->u.ioctl.subfunc = p1;
1859 cmd_ptr->u.ioctl.channel = (ulong32)p2;
1860 cmd_ptr->u.ioctl.param_size = (ushort)p3;
1861 cmd_ptr->u.ioctl.p_param = ha->scratch_phys;
1862 } else {
1863 if (ha->cache_feat & GDT_64BIT) {
1864 cmd_ptr->u.cache64.DeviceNo = (ushort)p1;
1865 cmd_ptr->u.cache64.BlockNo = p2;
1866 } else {
1867 cmd_ptr->u.cache.DeviceNo = (ushort)p1;
1868 cmd_ptr->u.cache.BlockNo = (ulong32)p2;
1869 }
1870 }
1871 } else if (service == SCSIRAWSERVICE) {
1872 if (ha->raw_feat & GDT_64BIT) {
1873 cmd_ptr->u.raw64.direction = p1;
1874 cmd_ptr->u.raw64.bus = (unchar)p2;
1875 cmd_ptr->u.raw64.target = (unchar)p3;
1876 cmd_ptr->u.raw64.lun = (unchar)(p3 >> 8);
1877 } else {
1878 cmd_ptr->u.raw.direction = p1;
1879 cmd_ptr->u.raw.bus = (unchar)p2;
1880 cmd_ptr->u.raw.target = (unchar)p3;
1881 cmd_ptr->u.raw.lun = (unchar)(p3 >> 8);
1882 }
1883 } else if (service == SCREENSERVICE) {
1884 if (opcode == GDT_REALTIME) {
1885 *(ulong32 *)&cmd_ptr->u.screen.su.data[0] = p1;
1886 *(ulong32 *)&cmd_ptr->u.screen.su.data[4] = (ulong32)p2;
1887 *(ulong32 *)&cmd_ptr->u.screen.su.data[8] = (ulong32)p3;
1888 }
1889 }
1890 ha->cmd_len = sizeof(gdth_cmd_str);
1891 ha->cmd_offs_dpmem = 0;
1892 ha->cmd_cnt = 0;
1893 gdth_copy_command(hanum);
1894 gdth_release_event(hanum);
1895 gdth_delay(20);
1896 if (!gdth_wait(hanum,index,INIT_TIMEOUT)) {
1897 printk("GDT: Initialization error (timeout service %d)\n",service);
1898 return 0;
1899 }
1900 if (ha->status != S_BSY || --retries == 0)
1901 break;
1902 gdth_delay(1);
1903 }
1904
1905 return (ha->status != S_OK ? 0:1);
1906}
1907
1908
1909/* search for devices */
1910
1911static int __init gdth_search_drives(int hanum)
1912{
1913 register gdth_ha_str *ha;
1914 ushort cdev_cnt, i;
1915 int ok;
1916 ulong32 bus_no, drv_cnt, drv_no, j;
1917 gdth_getch_str *chn;
1918 gdth_drlist_str *drl;
1919 gdth_iochan_str *ioc;
1920 gdth_raw_iochan_str *iocr;
1921 gdth_arcdl_str *alst;
1922 gdth_alist_str *alst2;
1923 gdth_oem_str_ioctl *oemstr;
1924#ifdef INT_COAL
1925 gdth_perf_modes *pmod;
1926#endif
1927
1928#ifdef GDTH_RTC
1929 unchar rtc[12];
1930 ulong flags;
1931#endif
1932
1933 TRACE(("gdth_search_drives() hanum %d\n",hanum));
1934 ha = HADATA(gdth_ctr_tab[hanum]);
1935 ok = 0;
1936
1937 /* initialize controller services, at first: screen service */
1938 ha->screen_feat = 0;
1939 if (!force_dma32) {
1940 ok = gdth_internal_cmd(hanum,SCREENSERVICE,GDT_X_INIT_SCR,0,0,0);
1941 if (ok)
1942 ha->screen_feat = GDT_64BIT;
1943 }
1944 if (force_dma32 || (!ok && ha->status == (ushort)S_NOFUNC))
1945 ok = gdth_internal_cmd(hanum,SCREENSERVICE,GDT_INIT,0,0,0);
1946 if (!ok) {
1947 printk("GDT-HA %d: Initialization error screen service (code %d)\n",
1948 hanum, ha->status);
1949 return 0;
1950 }
1951 TRACE2(("gdth_search_drives(): SCREENSERVICE initialized\n"));
1952
1953#ifdef GDTH_RTC
1954 /* read realtime clock info, send to controller */
1955 /* 1. wait for the falling edge of update flag */
1956 spin_lock_irqsave(&rtc_lock, flags);
1957 for (j = 0; j < 1000000; ++j)
1958 if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP)
1959 break;
1960 for (j = 0; j < 1000000; ++j)
1961 if (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
1962 break;
1963 /* 2. read info */
1964 do {
1965 for (j = 0; j < 12; ++j)
1966 rtc[j] = CMOS_READ(j);
1967 } while (rtc[0] != CMOS_READ(0));
Robert P. J. Day7a960b72007-05-23 14:41:40 -07001968 spin_unlock_irqrestore(&rtc_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001969 TRACE2(("gdth_search_drives(): RTC: %x/%x/%x\n",*(ulong32 *)&rtc[0],
1970 *(ulong32 *)&rtc[4], *(ulong32 *)&rtc[8]));
1971 /* 3. send to controller firmware */
1972 gdth_internal_cmd(hanum,SCREENSERVICE,GDT_REALTIME, *(ulong32 *)&rtc[0],
1973 *(ulong32 *)&rtc[4], *(ulong32 *)&rtc[8]);
1974#endif
1975
1976 /* unfreeze all IOs */
1977 gdth_internal_cmd(hanum,CACHESERVICE,GDT_UNFREEZE_IO,0,0,0);
1978
1979 /* initialize cache service */
1980 ha->cache_feat = 0;
1981 if (!force_dma32) {
1982 ok = gdth_internal_cmd(hanum,CACHESERVICE,GDT_X_INIT_HOST,LINUX_OS,0,0);
1983 if (ok)
1984 ha->cache_feat = GDT_64BIT;
1985 }
1986 if (force_dma32 || (!ok && ha->status == (ushort)S_NOFUNC))
1987 ok = gdth_internal_cmd(hanum,CACHESERVICE,GDT_INIT,LINUX_OS,0,0);
1988 if (!ok) {
1989 printk("GDT-HA %d: Initialization error cache service (code %d)\n",
1990 hanum, ha->status);
1991 return 0;
1992 }
1993 TRACE2(("gdth_search_drives(): CACHESERVICE initialized\n"));
1994 cdev_cnt = (ushort)ha->info;
1995 ha->fw_vers = ha->service;
1996
1997#ifdef INT_COAL
1998 if (ha->type == GDT_PCIMPR) {
1999 /* set perf. modes */
2000 pmod = (gdth_perf_modes *)ha->pscratch;
2001 pmod->version = 1;
2002 pmod->st_mode = 1; /* enable one status buffer */
2003 *((ulong64 *)&pmod->st_buff_addr1) = ha->coal_stat_phys;
2004 pmod->st_buff_indx1 = COALINDEX;
2005 pmod->st_buff_addr2 = 0;
2006 pmod->st_buff_u_addr2 = 0;
2007 pmod->st_buff_indx2 = 0;
2008 pmod->st_buff_size = sizeof(gdth_coal_status) * MAXOFFSETS;
2009 pmod->cmd_mode = 0; // disable all cmd buffers
2010 pmod->cmd_buff_addr1 = 0;
2011 pmod->cmd_buff_u_addr1 = 0;
2012 pmod->cmd_buff_indx1 = 0;
2013 pmod->cmd_buff_addr2 = 0;
2014 pmod->cmd_buff_u_addr2 = 0;
2015 pmod->cmd_buff_indx2 = 0;
2016 pmod->cmd_buff_size = 0;
2017 pmod->reserved1 = 0;
2018 pmod->reserved2 = 0;
2019 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,SET_PERF_MODES,
2020 INVALID_CHANNEL,sizeof(gdth_perf_modes))) {
2021 printk("GDT-HA %d: Interrupt coalescing activated\n", hanum);
2022 }
2023 }
2024#endif
2025
2026 /* detect number of buses - try new IOCTL */
2027 iocr = (gdth_raw_iochan_str *)ha->pscratch;
2028 iocr->hdr.version = 0xffffffff;
2029 iocr->hdr.list_entries = MAXBUS;
2030 iocr->hdr.first_chan = 0;
2031 iocr->hdr.last_chan = MAXBUS-1;
2032 iocr->hdr.list_offset = GDTOFFSOF(gdth_raw_iochan_str, list[0]);
2033 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,IOCHAN_RAW_DESC,
2034 INVALID_CHANNEL,sizeof(gdth_raw_iochan_str))) {
2035 TRACE2(("IOCHAN_RAW_DESC supported!\n"));
2036 ha->bus_cnt = iocr->hdr.chan_count;
2037 for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
2038 if (iocr->list[bus_no].proc_id < MAXID)
2039 ha->bus_id[bus_no] = iocr->list[bus_no].proc_id;
2040 else
2041 ha->bus_id[bus_no] = 0xff;
2042 }
2043 } else {
2044 /* old method */
2045 chn = (gdth_getch_str *)ha->pscratch;
2046 for (bus_no = 0; bus_no < MAXBUS; ++bus_no) {
2047 chn->channel_no = bus_no;
2048 if (!gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
2049 SCSI_CHAN_CNT | L_CTRL_PATTERN,
2050 IO_CHANNEL | INVALID_CHANNEL,
2051 sizeof(gdth_getch_str))) {
2052 if (bus_no == 0) {
2053 printk("GDT-HA %d: Error detecting channel count (0x%x)\n",
2054 hanum, ha->status);
2055 return 0;
2056 }
2057 break;
2058 }
2059 if (chn->siop_id < MAXID)
2060 ha->bus_id[bus_no] = chn->siop_id;
2061 else
2062 ha->bus_id[bus_no] = 0xff;
2063 }
2064 ha->bus_cnt = (unchar)bus_no;
2065 }
2066 TRACE2(("gdth_search_drives() %d channels\n",ha->bus_cnt));
2067
2068 /* read cache configuration */
2069 if (!gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,CACHE_INFO,
2070 INVALID_CHANNEL,sizeof(gdth_cinfo_str))) {
2071 printk("GDT-HA %d: Initialization error cache service (code %d)\n",
2072 hanum, ha->status);
2073 return 0;
2074 }
2075 ha->cpar = ((gdth_cinfo_str *)ha->pscratch)->cpar;
2076 TRACE2(("gdth_search_drives() cinfo: vs %x sta %d str %d dw %d b %d\n",
2077 ha->cpar.version,ha->cpar.state,ha->cpar.strategy,
2078 ha->cpar.write_back,ha->cpar.block_size));
2079
2080 /* read board info and features */
2081 ha->more_proc = FALSE;
2082 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,BOARD_INFO,
2083 INVALID_CHANNEL,sizeof(gdth_binfo_str))) {
2084 memcpy(&ha->binfo, (gdth_binfo_str *)ha->pscratch,
2085 sizeof(gdth_binfo_str));
2086 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,BOARD_FEATURES,
2087 INVALID_CHANNEL,sizeof(gdth_bfeat_str))) {
2088 TRACE2(("BOARD_INFO/BOARD_FEATURES supported\n"));
2089 ha->bfeat = *(gdth_bfeat_str *)ha->pscratch;
2090 ha->more_proc = TRUE;
2091 }
2092 } else {
2093 TRACE2(("BOARD_INFO requires firmware >= 1.10/2.08\n"));
2094 strcpy(ha->binfo.type_string, gdth_ctr_name(hanum));
2095 }
2096 TRACE2(("Controller name: %s\n",ha->binfo.type_string));
2097
2098 /* read more informations */
2099 if (ha->more_proc) {
2100 /* physical drives, channel addresses */
2101 ioc = (gdth_iochan_str *)ha->pscratch;
2102 ioc->hdr.version = 0xffffffff;
2103 ioc->hdr.list_entries = MAXBUS;
2104 ioc->hdr.first_chan = 0;
2105 ioc->hdr.last_chan = MAXBUS-1;
2106 ioc->hdr.list_offset = GDTOFFSOF(gdth_iochan_str, list[0]);
2107 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,IOCHAN_DESC,
2108 INVALID_CHANNEL,sizeof(gdth_iochan_str))) {
2109 for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
2110 ha->raw[bus_no].address = ioc->list[bus_no].address;
2111 ha->raw[bus_no].local_no = ioc->list[bus_no].local_no;
2112 }
2113 } else {
2114 for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
2115 ha->raw[bus_no].address = IO_CHANNEL;
2116 ha->raw[bus_no].local_no = bus_no;
2117 }
2118 }
2119 for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
2120 chn = (gdth_getch_str *)ha->pscratch;
2121 chn->channel_no = ha->raw[bus_no].local_no;
2122 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
2123 SCSI_CHAN_CNT | L_CTRL_PATTERN,
2124 ha->raw[bus_no].address | INVALID_CHANNEL,
2125 sizeof(gdth_getch_str))) {
2126 ha->raw[bus_no].pdev_cnt = chn->drive_cnt;
2127 TRACE2(("Channel %d: %d phys. drives\n",
2128 bus_no,chn->drive_cnt));
2129 }
2130 if (ha->raw[bus_no].pdev_cnt > 0) {
2131 drl = (gdth_drlist_str *)ha->pscratch;
2132 drl->sc_no = ha->raw[bus_no].local_no;
2133 drl->sc_cnt = ha->raw[bus_no].pdev_cnt;
2134 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
2135 SCSI_DR_LIST | L_CTRL_PATTERN,
2136 ha->raw[bus_no].address | INVALID_CHANNEL,
2137 sizeof(gdth_drlist_str))) {
2138 for (j = 0; j < ha->raw[bus_no].pdev_cnt; ++j)
2139 ha->raw[bus_no].id_list[j] = drl->sc_list[j];
2140 } else {
2141 ha->raw[bus_no].pdev_cnt = 0;
2142 }
2143 }
2144 }
2145
2146 /* logical drives */
2147 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,CACHE_DRV_CNT,
2148 INVALID_CHANNEL,sizeof(ulong32))) {
2149 drv_cnt = *(ulong32 *)ha->pscratch;
2150 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,CACHE_DRV_LIST,
2151 INVALID_CHANNEL,drv_cnt * sizeof(ulong32))) {
2152 for (j = 0; j < drv_cnt; ++j) {
2153 drv_no = ((ulong32 *)ha->pscratch)[j];
2154 if (drv_no < MAX_LDRIVES) {
2155 ha->hdr[drv_no].is_logdrv = TRUE;
2156 TRACE2(("Drive %d is log. drive\n",drv_no));
2157 }
2158 }
2159 }
2160 alst = (gdth_arcdl_str *)ha->pscratch;
2161 alst->entries_avail = MAX_LDRIVES;
2162 alst->first_entry = 0;
2163 alst->list_offset = GDTOFFSOF(gdth_arcdl_str, list[0]);
2164 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
2165 ARRAY_DRV_LIST2 | LA_CTRL_PATTERN,
2166 INVALID_CHANNEL, sizeof(gdth_arcdl_str) +
2167 (alst->entries_avail-1) * sizeof(gdth_alist_str))) {
2168 for (j = 0; j < alst->entries_init; ++j) {
2169 ha->hdr[j].is_arraydrv = alst->list[j].is_arrayd;
2170 ha->hdr[j].is_master = alst->list[j].is_master;
2171 ha->hdr[j].is_parity = alst->list[j].is_parity;
2172 ha->hdr[j].is_hotfix = alst->list[j].is_hotfix;
2173 ha->hdr[j].master_no = alst->list[j].cd_handle;
2174 }
2175 } else if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
2176 ARRAY_DRV_LIST | LA_CTRL_PATTERN,
2177 0, 35 * sizeof(gdth_alist_str))) {
2178 for (j = 0; j < 35; ++j) {
2179 alst2 = &((gdth_alist_str *)ha->pscratch)[j];
2180 ha->hdr[j].is_arraydrv = alst2->is_arrayd;
2181 ha->hdr[j].is_master = alst2->is_master;
2182 ha->hdr[j].is_parity = alst2->is_parity;
2183 ha->hdr[j].is_hotfix = alst2->is_hotfix;
2184 ha->hdr[j].master_no = alst2->cd_handle;
2185 }
2186 }
2187 }
2188 }
2189
2190 /* initialize raw service */
2191 ha->raw_feat = 0;
2192 if (!force_dma32) {
2193 ok = gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_X_INIT_RAW,0,0,0);
2194 if (ok)
2195 ha->raw_feat = GDT_64BIT;
2196 }
2197 if (force_dma32 || (!ok && ha->status == (ushort)S_NOFUNC))
2198 ok = gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_INIT,0,0,0);
2199 if (!ok) {
2200 printk("GDT-HA %d: Initialization error raw service (code %d)\n",
2201 hanum, ha->status);
2202 return 0;
2203 }
2204 TRACE2(("gdth_search_drives(): RAWSERVICE initialized\n"));
2205
2206 /* set/get features raw service (scatter/gather) */
2207 if (gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_SET_FEAT,SCATTER_GATHER,
2208 0,0)) {
2209 TRACE2(("gdth_search_drives(): set features RAWSERVICE OK\n"));
2210 if (gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_GET_FEAT,0,0,0)) {
2211 TRACE2(("gdth_search_dr(): get feat RAWSERVICE %d\n",
2212 ha->info));
2213 ha->raw_feat |= (ushort)ha->info;
2214 }
2215 }
2216
2217 /* set/get features cache service (equal to raw service) */
2218 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_SET_FEAT,0,
2219 SCATTER_GATHER,0)) {
2220 TRACE2(("gdth_search_drives(): set features CACHESERVICE OK\n"));
2221 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_GET_FEAT,0,0,0)) {
2222 TRACE2(("gdth_search_dr(): get feat CACHESERV. %d\n",
2223 ha->info));
2224 ha->cache_feat |= (ushort)ha->info;
2225 }
2226 }
2227
2228 /* reserve drives for raw service */
2229 if (reserve_mode != 0) {
2230 gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_RESERVE_ALL,
2231 reserve_mode == 1 ? 1 : 3, 0, 0);
2232 TRACE2(("gdth_search_drives(): RESERVE_ALL code %d\n",
2233 ha->status));
2234 }
2235 for (i = 0; i < MAX_RES_ARGS; i += 4) {
2236 if (reserve_list[i] == hanum && reserve_list[i+1] < ha->bus_cnt &&
2237 reserve_list[i+2] < ha->tid_cnt && reserve_list[i+3] < MAXLUN) {
2238 TRACE2(("gdth_search_drives(): reserve ha %d bus %d id %d lun %d\n",
2239 reserve_list[i], reserve_list[i+1],
2240 reserve_list[i+2], reserve_list[i+3]));
2241 if (!gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_RESERVE,0,
2242 reserve_list[i+1], reserve_list[i+2] |
2243 (reserve_list[i+3] << 8))) {
2244 printk("GDT-HA %d: Error raw service (RESERVE, code %d)\n",
2245 hanum, ha->status);
2246 }
2247 }
2248 }
2249
2250 /* Determine OEM string using IOCTL */
2251 oemstr = (gdth_oem_str_ioctl *)ha->pscratch;
2252 oemstr->params.ctl_version = 0x01;
2253 oemstr->params.buffer_size = sizeof(oemstr->text);
2254 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
2255 CACHE_READ_OEM_STRING_RECORD,INVALID_CHANNEL,
2256 sizeof(gdth_oem_str_ioctl))) {
2257 TRACE2(("gdth_search_drives(): CACHE_READ_OEM_STRING_RECORD OK\n"));
2258 printk("GDT-HA %d: Vendor: %s Name: %s\n",
2259 hanum,oemstr->text.oem_company_name,ha->binfo.type_string);
2260 /* Save the Host Drive inquiry data */
2261#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
2262 strlcpy(ha->oem_name,oemstr->text.scsi_host_drive_inquiry_vendor_id,
2263 sizeof(ha->oem_name));
2264#else
2265 strncpy(ha->oem_name,oemstr->text.scsi_host_drive_inquiry_vendor_id,7);
2266 ha->oem_name[7] = '\0';
2267#endif
2268 } else {
2269 /* Old method, based on PCI ID */
2270 TRACE2(("gdth_search_drives(): CACHE_READ_OEM_STRING_RECORD failed\n"));
2271 printk("GDT-HA %d: Name: %s\n",
2272 hanum,ha->binfo.type_string);
2273#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
2274 if (ha->oem_id == OEM_ID_INTEL)
2275 strlcpy(ha->oem_name,"Intel ", sizeof(ha->oem_name));
2276 else
2277 strlcpy(ha->oem_name,"ICP ", sizeof(ha->oem_name));
2278#else
2279 if (ha->oem_id == OEM_ID_INTEL)
2280 strcpy(ha->oem_name,"Intel ");
2281 else
2282 strcpy(ha->oem_name,"ICP ");
2283#endif
2284 }
2285
2286 /* scanning for host drives */
2287 for (i = 0; i < cdev_cnt; ++i)
2288 gdth_analyse_hdrive(hanum,i);
2289
2290 TRACE(("gdth_search_drives() OK\n"));
2291 return 1;
2292}
2293
2294static int gdth_analyse_hdrive(int hanum,ushort hdrive)
2295{
2296 register gdth_ha_str *ha;
2297 ulong32 drv_cyls;
2298 int drv_hds, drv_secs;
2299
2300 TRACE(("gdth_analyse_hdrive() hanum %d drive %d\n",hanum,hdrive));
2301 if (hdrive >= MAX_HDRIVES)
2302 return 0;
2303 ha = HADATA(gdth_ctr_tab[hanum]);
2304
2305 if (!gdth_internal_cmd(hanum,CACHESERVICE,GDT_INFO,hdrive,0,0))
2306 return 0;
2307 ha->hdr[hdrive].present = TRUE;
2308 ha->hdr[hdrive].size = ha->info;
2309
2310 /* evaluate mapping (sectors per head, heads per cylinder) */
2311 ha->hdr[hdrive].size &= ~SECS32;
2312 if (ha->info2 == 0) {
2313 gdth_eval_mapping(ha->hdr[hdrive].size,&drv_cyls,&drv_hds,&drv_secs);
2314 } else {
2315 drv_hds = ha->info2 & 0xff;
2316 drv_secs = (ha->info2 >> 8) & 0xff;
2317 drv_cyls = (ulong32)ha->hdr[hdrive].size / drv_hds / drv_secs;
2318 }
2319 ha->hdr[hdrive].heads = (unchar)drv_hds;
2320 ha->hdr[hdrive].secs = (unchar)drv_secs;
2321 /* round size */
2322 ha->hdr[hdrive].size = drv_cyls * drv_hds * drv_secs;
2323
2324 if (ha->cache_feat & GDT_64BIT) {
2325 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_X_INFO,hdrive,0,0)
2326 && ha->info2 != 0) {
2327 ha->hdr[hdrive].size = ((ulong64)ha->info2 << 32) | ha->info;
2328 }
2329 }
2330 TRACE2(("gdth_search_dr() cdr. %d size %d hds %d scs %d\n",
2331 hdrive,ha->hdr[hdrive].size,drv_hds,drv_secs));
2332
2333 /* get informations about device */
2334 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_DEVTYPE,hdrive,0,0)) {
2335 TRACE2(("gdth_search_dr() cache drive %d devtype %d\n",
2336 hdrive,ha->info));
2337 ha->hdr[hdrive].devtype = (ushort)ha->info;
2338 }
2339
2340 /* cluster info */
2341 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_CLUST_INFO,hdrive,0,0)) {
2342 TRACE2(("gdth_search_dr() cache drive %d cluster info %d\n",
2343 hdrive,ha->info));
2344 if (!shared_access)
2345 ha->hdr[hdrive].cluster_type = (unchar)ha->info;
2346 }
2347
2348 /* R/W attributes */
2349 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_RW_ATTRIBS,hdrive,0,0)) {
2350 TRACE2(("gdth_search_dr() cache drive %d r/w attrib. %d\n",
2351 hdrive,ha->info));
2352 ha->hdr[hdrive].rw_attribs = (unchar)ha->info;
2353 }
2354
2355 return 1;
2356}
2357
2358
2359/* command queueing/sending functions */
2360
2361static void gdth_putq(int hanum,Scsi_Cmnd *scp,unchar priority)
2362{
2363 register gdth_ha_str *ha;
2364 register Scsi_Cmnd *pscp;
2365 register Scsi_Cmnd *nscp;
2366 ulong flags;
2367 unchar b, t;
2368
2369 TRACE(("gdth_putq() priority %d\n",priority));
2370 ha = HADATA(gdth_ctr_tab[hanum]);
2371 spin_lock_irqsave(&ha->smp_lock, flags);
2372
Matthew Wilcox687d2bc2007-09-25 12:42:03 -04002373 if (!IS_GDTH_INTERNAL_CMD(scp)) {
Leubner, Achimcbd5f692006-06-09 11:34:29 -07002374 scp->SCp.this_residual = (int)priority;
2375 b = virt_ctr ? NUMDATA(scp->device->host)->busnum:scp->device->channel;
2376 t = scp->device->id;
2377 if (priority >= DEFAULT_PRI) {
2378 if ((b != ha->virt_bus && ha->raw[BUS_L2P(ha,b)].lock) ||
2379 (b==ha->virt_bus && t<MAX_HDRIVES && ha->hdr[t].lock)) {
2380 TRACE2(("gdth_putq(): locked IO ->update_timeout()\n"));
2381 scp->SCp.buffers_residual = gdth_update_timeout(hanum, scp, 0);
2382 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07002383 }
2384 }
2385
2386 if (ha->req_first==NULL) {
2387 ha->req_first = scp; /* queue was empty */
2388 scp->SCp.ptr = NULL;
2389 } else { /* queue not empty */
2390 pscp = ha->req_first;
2391 nscp = (Scsi_Cmnd *)pscp->SCp.ptr;
2392 /* priority: 0-highest,..,0xff-lowest */
2393 while (nscp && (unchar)nscp->SCp.this_residual <= priority) {
2394 pscp = nscp;
2395 nscp = (Scsi_Cmnd *)pscp->SCp.ptr;
2396 }
2397 pscp->SCp.ptr = (char *)scp;
2398 scp->SCp.ptr = (char *)nscp;
2399 }
2400 spin_unlock_irqrestore(&ha->smp_lock, flags);
2401
2402#ifdef GDTH_STATISTICS
2403 flags = 0;
2404 for (nscp=ha->req_first; nscp; nscp=(Scsi_Cmnd*)nscp->SCp.ptr)
2405 ++flags;
2406 if (max_rq < flags) {
2407 max_rq = flags;
2408 TRACE3(("GDT: max_rq = %d\n",(ushort)max_rq));
2409 }
2410#endif
2411}
2412
2413static void gdth_next(int hanum)
2414{
2415 register gdth_ha_str *ha;
2416 register Scsi_Cmnd *pscp;
2417 register Scsi_Cmnd *nscp;
2418 unchar b, t, l, firsttime;
2419 unchar this_cmd, next_cmd;
2420 ulong flags = 0;
2421 int cmd_index;
2422
2423 TRACE(("gdth_next() hanum %d\n",hanum));
2424 ha = HADATA(gdth_ctr_tab[hanum]);
2425 if (!gdth_polling)
2426 spin_lock_irqsave(&ha->smp_lock, flags);
2427
2428 ha->cmd_cnt = ha->cmd_offs_dpmem = 0;
2429 this_cmd = firsttime = TRUE;
2430 next_cmd = gdth_polling ? FALSE:TRUE;
2431 cmd_index = 0;
2432
2433 for (nscp = pscp = ha->req_first; nscp; nscp = (Scsi_Cmnd *)nscp->SCp.ptr) {
2434 if (nscp != pscp && nscp != (Scsi_Cmnd *)pscp->SCp.ptr)
2435 pscp = (Scsi_Cmnd *)pscp->SCp.ptr;
Matthew Wilcox687d2bc2007-09-25 12:42:03 -04002436 if (!IS_GDTH_INTERNAL_CMD(nscp)) {
Leubner, Achimcbd5f692006-06-09 11:34:29 -07002437 b = virt_ctr ?
2438 NUMDATA(nscp->device->host)->busnum : nscp->device->channel;
2439 t = nscp->device->id;
2440 l = nscp->device->lun;
2441 if (nscp->SCp.this_residual >= DEFAULT_PRI) {
2442 if ((b != ha->virt_bus && ha->raw[BUS_L2P(ha,b)].lock) ||
2443 (b == ha->virt_bus && t < MAX_HDRIVES && ha->hdr[t].lock))
2444 continue;
2445 }
2446 } else
2447 b = t = l = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002448
2449 if (firsttime) {
2450 if (gdth_test_busy(hanum)) { /* controller busy ? */
2451 TRACE(("gdth_next() controller %d busy !\n",hanum));
2452 if (!gdth_polling) {
2453 spin_unlock_irqrestore(&ha->smp_lock, flags);
2454 return;
2455 }
2456 while (gdth_test_busy(hanum))
2457 gdth_delay(1);
2458 }
2459 firsttime = FALSE;
2460 }
2461
Matthew Wilcox687d2bc2007-09-25 12:42:03 -04002462 if (!IS_GDTH_INTERNAL_CMD(nscp)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002463 if (nscp->SCp.phase == -1) {
2464 nscp->SCp.phase = CACHESERVICE; /* default: cache svc. */
2465 if (nscp->cmnd[0] == TEST_UNIT_READY) {
2466 TRACE2(("TEST_UNIT_READY Bus %d Id %d LUN %d\n",
2467 b, t, l));
2468 /* TEST_UNIT_READY -> set scan mode */
2469 if ((ha->scan_mode & 0x0f) == 0) {
2470 if (b == 0 && t == 0 && l == 0) {
2471 ha->scan_mode |= 1;
2472 TRACE2(("Scan mode: 0x%x\n", ha->scan_mode));
2473 }
2474 } else if ((ha->scan_mode & 0x0f) == 1) {
2475 if (b == 0 && ((t == 0 && l == 1) ||
2476 (t == 1 && l == 0))) {
2477 nscp->SCp.sent_command = GDT_SCAN_START;
2478 nscp->SCp.phase = ((ha->scan_mode & 0x10 ? 1:0) << 8)
2479 | SCSIRAWSERVICE;
2480 ha->scan_mode = 0x12;
2481 TRACE2(("Scan mode: 0x%x (SCAN_START)\n",
2482 ha->scan_mode));
2483 } else {
2484 ha->scan_mode &= 0x10;
2485 TRACE2(("Scan mode: 0x%x\n", ha->scan_mode));
2486 }
2487 } else if (ha->scan_mode == 0x12) {
2488 if (b == ha->bus_cnt && t == ha->tid_cnt-1) {
2489 nscp->SCp.phase = SCSIRAWSERVICE;
2490 nscp->SCp.sent_command = GDT_SCAN_END;
2491 ha->scan_mode &= 0x10;
2492 TRACE2(("Scan mode: 0x%x (SCAN_END)\n",
2493 ha->scan_mode));
2494 }
2495 }
2496 }
2497 if (b == ha->virt_bus && nscp->cmnd[0] != INQUIRY &&
2498 nscp->cmnd[0] != READ_CAPACITY && nscp->cmnd[0] != MODE_SENSE &&
2499 (ha->hdr[t].cluster_type & CLUSTER_DRIVE)) {
2500 /* always GDT_CLUST_INFO! */
2501 nscp->SCp.sent_command = GDT_CLUST_INFO;
2502 }
2503 }
2504 }
2505
2506 if (nscp->SCp.sent_command != -1) {
2507 if ((nscp->SCp.phase & 0xff) == CACHESERVICE) {
2508 if (!(cmd_index=gdth_fill_cache_cmd(hanum,nscp,t)))
2509 this_cmd = FALSE;
2510 next_cmd = FALSE;
2511 } else if ((nscp->SCp.phase & 0xff) == SCSIRAWSERVICE) {
2512 if (!(cmd_index=gdth_fill_raw_cmd(hanum,nscp,BUS_L2P(ha,b))))
2513 this_cmd = FALSE;
2514 next_cmd = FALSE;
2515 } else {
2516 memset((char*)nscp->sense_buffer,0,16);
2517 nscp->sense_buffer[0] = 0x70;
2518 nscp->sense_buffer[2] = NOT_READY;
2519 nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
2520 if (!nscp->SCp.have_data_in)
2521 nscp->SCp.have_data_in++;
2522 else
Matthew Wilcoxb8bff2a2007-10-02 22:40:22 +02002523 gdth_scsi_done(nscp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002524 }
Matthew Wilcox687d2bc2007-09-25 12:42:03 -04002525 } else if (IS_GDTH_INTERNAL_CMD(nscp)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002526 if (!(cmd_index=gdth_special_cmd(hanum,nscp)))
2527 this_cmd = FALSE;
2528 next_cmd = FALSE;
2529 } else if (b != ha->virt_bus) {
2530 if (ha->raw[BUS_L2P(ha,b)].io_cnt[t] >= GDTH_MAX_RAW ||
2531 !(cmd_index=gdth_fill_raw_cmd(hanum,nscp,BUS_L2P(ha,b))))
2532 this_cmd = FALSE;
2533 else
2534 ha->raw[BUS_L2P(ha,b)].io_cnt[t]++;
2535 } else if (t >= MAX_HDRIVES || !ha->hdr[t].present || l != 0) {
2536 TRACE2(("Command 0x%x to bus %d id %d lun %d -> IGNORE\n",
2537 nscp->cmnd[0], b, t, l));
2538 nscp->result = DID_BAD_TARGET << 16;
2539 if (!nscp->SCp.have_data_in)
2540 nscp->SCp.have_data_in++;
2541 else
Matthew Wilcoxb8bff2a2007-10-02 22:40:22 +02002542 gdth_scsi_done(nscp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002543 } else {
2544 switch (nscp->cmnd[0]) {
2545 case TEST_UNIT_READY:
2546 case INQUIRY:
2547 case REQUEST_SENSE:
2548 case READ_CAPACITY:
2549 case VERIFY:
2550 case START_STOP:
2551 case MODE_SENSE:
2552 case SERVICE_ACTION_IN:
2553 TRACE(("cache cmd %x/%x/%x/%x/%x/%x\n",nscp->cmnd[0],
2554 nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3],
2555 nscp->cmnd[4],nscp->cmnd[5]));
2556 if (ha->hdr[t].media_changed && nscp->cmnd[0] != INQUIRY) {
2557 /* return UNIT_ATTENTION */
2558 TRACE2(("cmd 0x%x target %d: UNIT_ATTENTION\n",
2559 nscp->cmnd[0], t));
2560 ha->hdr[t].media_changed = FALSE;
2561 memset((char*)nscp->sense_buffer,0,16);
2562 nscp->sense_buffer[0] = 0x70;
2563 nscp->sense_buffer[2] = UNIT_ATTENTION;
2564 nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
2565 if (!nscp->SCp.have_data_in)
2566 nscp->SCp.have_data_in++;
2567 else
Matthew Wilcoxb8bff2a2007-10-02 22:40:22 +02002568 gdth_scsi_done(nscp);
2569 } else if (gdth_internal_cache_cmd(hanum, nscp))
2570 gdth_scsi_done(nscp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002571 break;
2572
2573 case ALLOW_MEDIUM_REMOVAL:
2574 TRACE(("cache cmd %x/%x/%x/%x/%x/%x\n",nscp->cmnd[0],
2575 nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3],
2576 nscp->cmnd[4],nscp->cmnd[5]));
2577 if ( (nscp->cmnd[4]&1) && !(ha->hdr[t].devtype&1) ) {
2578 TRACE(("Prevent r. nonremov. drive->do nothing\n"));
2579 nscp->result = DID_OK << 16;
2580 nscp->sense_buffer[0] = 0;
2581 if (!nscp->SCp.have_data_in)
2582 nscp->SCp.have_data_in++;
2583 else
Matthew Wilcoxb8bff2a2007-10-02 22:40:22 +02002584 gdth_scsi_done(nscp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002585 } else {
2586 nscp->cmnd[3] = (ha->hdr[t].devtype&1) ? 1:0;
2587 TRACE(("Prevent/allow r. %d rem. drive %d\n",
2588 nscp->cmnd[4],nscp->cmnd[3]));
2589 if (!(cmd_index=gdth_fill_cache_cmd(hanum,nscp,t)))
2590 this_cmd = FALSE;
2591 }
2592 break;
2593
2594 case RESERVE:
2595 case RELEASE:
2596 TRACE2(("cache cmd %s\n",nscp->cmnd[0] == RESERVE ?
2597 "RESERVE" : "RELEASE"));
2598 if (!(cmd_index=gdth_fill_cache_cmd(hanum,nscp,t)))
2599 this_cmd = FALSE;
2600 break;
2601
2602 case READ_6:
2603 case WRITE_6:
2604 case READ_10:
2605 case WRITE_10:
2606 case READ_16:
2607 case WRITE_16:
2608 if (ha->hdr[t].media_changed) {
2609 /* return UNIT_ATTENTION */
2610 TRACE2(("cmd 0x%x target %d: UNIT_ATTENTION\n",
2611 nscp->cmnd[0], t));
2612 ha->hdr[t].media_changed = FALSE;
2613 memset((char*)nscp->sense_buffer,0,16);
2614 nscp->sense_buffer[0] = 0x70;
2615 nscp->sense_buffer[2] = UNIT_ATTENTION;
2616 nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
2617 if (!nscp->SCp.have_data_in)
2618 nscp->SCp.have_data_in++;
2619 else
Matthew Wilcoxb8bff2a2007-10-02 22:40:22 +02002620 gdth_scsi_done(nscp);
2621 } else if (!(cmd_index=gdth_fill_cache_cmd(hanum, nscp, t)))
Linus Torvalds1da177e2005-04-16 15:20:36 -07002622 this_cmd = FALSE;
2623 break;
2624
2625 default:
2626 TRACE2(("cache cmd %x/%x/%x/%x/%x/%x unknown\n",nscp->cmnd[0],
2627 nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3],
2628 nscp->cmnd[4],nscp->cmnd[5]));
2629 printk("GDT-HA %d: Unknown SCSI command 0x%x to cache service !\n",
2630 hanum, nscp->cmnd[0]);
2631 nscp->result = DID_ABORT << 16;
2632 if (!nscp->SCp.have_data_in)
2633 nscp->SCp.have_data_in++;
2634 else
Matthew Wilcoxb8bff2a2007-10-02 22:40:22 +02002635 gdth_scsi_done(nscp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002636 break;
2637 }
2638 }
2639
2640 if (!this_cmd)
2641 break;
2642 if (nscp == ha->req_first)
2643 ha->req_first = pscp = (Scsi_Cmnd *)nscp->SCp.ptr;
2644 else
2645 pscp->SCp.ptr = nscp->SCp.ptr;
2646 if (!next_cmd)
2647 break;
2648 }
2649
2650 if (ha->cmd_cnt > 0) {
2651 gdth_release_event(hanum);
2652 }
2653
2654 if (!gdth_polling)
2655 spin_unlock_irqrestore(&ha->smp_lock, flags);
2656
2657 if (gdth_polling && ha->cmd_cnt > 0) {
2658 if (!gdth_wait(hanum,cmd_index,POLL_TIMEOUT))
2659 printk("GDT-HA %d: Command %d timed out !\n",
2660 hanum,cmd_index);
2661 }
2662}
2663
2664static void gdth_copy_internal_data(int hanum,Scsi_Cmnd *scp,
2665 char *buffer,ushort count)
2666{
2667 ushort cpcount,i;
2668 ushort cpsum,cpnow;
2669 struct scatterlist *sl;
2670 gdth_ha_str *ha;
2671 char *address;
2672
Christoph Hellwig5d5ff442006-06-03 13:21:13 +02002673 cpcount = count<=(ushort)scp->request_bufflen ? count:(ushort)scp->request_bufflen;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002674 ha = HADATA(gdth_ctr_tab[hanum]);
2675
2676 if (scp->use_sg) {
2677 sl = (struct scatterlist *)scp->request_buffer;
2678 for (i=0,cpsum=0; i<scp->use_sg; ++i,++sl) {
Leubner, Achimcbd5f692006-06-09 11:34:29 -07002679 unsigned long flags;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002680 cpnow = (ushort)sl->length;
2681 TRACE(("copy_internal() now %d sum %d count %d %d\n",
2682 cpnow,cpsum,cpcount,(ushort)scp->bufflen));
2683 if (cpsum+cpnow > cpcount)
2684 cpnow = cpcount - cpsum;
2685 cpsum += cpnow;
2686 if (!sl->page) {
2687 printk("GDT-HA %d: invalid sc/gt element in gdth_copy_internal_data()\n",
2688 hanum);
2689 return;
2690 }
Leubner, Achimcbd5f692006-06-09 11:34:29 -07002691 local_irq_save(flags);
2692#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
2693 address = kmap_atomic(sl->page, KM_BIO_SRC_IRQ) + sl->offset;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002694 memcpy(address,buffer,cpnow);
Leubner, Achimcbd5f692006-06-09 11:34:29 -07002695 flush_dcache_page(sl->page);
2696 kunmap_atomic(address, KM_BIO_SRC_IRQ);
2697#else
2698 address = kmap_atomic(sl->page, KM_BH_IRQ) + sl->offset;
2699 memcpy(address,buffer,cpnow);
2700 flush_dcache_page(sl->page);
2701 kunmap_atomic(address, KM_BH_IRQ);
2702#endif
2703 local_irq_restore(flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002704 if (cpsum == cpcount)
2705 break;
2706 buffer += cpnow;
2707 }
2708 } else {
2709 TRACE(("copy_internal() count %d\n",cpcount));
2710 memcpy((char*)scp->request_buffer,buffer,cpcount);
2711 }
2712}
2713
2714static int gdth_internal_cache_cmd(int hanum,Scsi_Cmnd *scp)
2715{
2716 register gdth_ha_str *ha;
2717 unchar t;
2718 gdth_inq_data inq;
2719 gdth_rdcap_data rdc;
2720 gdth_sense_data sd;
2721 gdth_modep_data mpd;
2722
2723 ha = HADATA(gdth_ctr_tab[hanum]);
2724 t = scp->device->id;
2725 TRACE(("gdth_internal_cache_cmd() cmd 0x%x hdrive %d\n",
2726 scp->cmnd[0],t));
2727
2728 scp->result = DID_OK << 16;
2729 scp->sense_buffer[0] = 0;
2730
2731 switch (scp->cmnd[0]) {
2732 case TEST_UNIT_READY:
2733 case VERIFY:
2734 case START_STOP:
2735 TRACE2(("Test/Verify/Start hdrive %d\n",t));
2736 break;
2737
2738 case INQUIRY:
2739 TRACE2(("Inquiry hdrive %d devtype %d\n",
2740 t,ha->hdr[t].devtype));
2741 inq.type_qual = (ha->hdr[t].devtype&4) ? TYPE_ROM:TYPE_DISK;
2742 /* you can here set all disks to removable, if you want to do
2743 a flush using the ALLOW_MEDIUM_REMOVAL command */
2744 inq.modif_rmb = 0x00;
2745 if ((ha->hdr[t].devtype & 1) ||
2746 (ha->hdr[t].cluster_type & CLUSTER_DRIVE))
2747 inq.modif_rmb = 0x80;
2748 inq.version = 2;
2749 inq.resp_aenc = 2;
2750 inq.add_length= 32;
2751 strcpy(inq.vendor,ha->oem_name);
2752 sprintf(inq.product,"Host Drive #%02d",t);
2753 strcpy(inq.revision," ");
2754 gdth_copy_internal_data(hanum,scp,(char*)&inq,sizeof(gdth_inq_data));
2755 break;
2756
2757 case REQUEST_SENSE:
2758 TRACE2(("Request sense hdrive %d\n",t));
2759 sd.errorcode = 0x70;
2760 sd.segno = 0x00;
2761 sd.key = NO_SENSE;
2762 sd.info = 0;
2763 sd.add_length= 0;
2764 gdth_copy_internal_data(hanum,scp,(char*)&sd,sizeof(gdth_sense_data));
2765 break;
2766
2767 case MODE_SENSE:
2768 TRACE2(("Mode sense hdrive %d\n",t));
2769 memset((char*)&mpd,0,sizeof(gdth_modep_data));
2770 mpd.hd.data_length = sizeof(gdth_modep_data);
2771 mpd.hd.dev_par = (ha->hdr[t].devtype&2) ? 0x80:0;
2772 mpd.hd.bd_length = sizeof(mpd.bd);
2773 mpd.bd.block_length[0] = (SECTOR_SIZE & 0x00ff0000) >> 16;
2774 mpd.bd.block_length[1] = (SECTOR_SIZE & 0x0000ff00) >> 8;
2775 mpd.bd.block_length[2] = (SECTOR_SIZE & 0x000000ff);
2776 gdth_copy_internal_data(hanum,scp,(char*)&mpd,sizeof(gdth_modep_data));
2777 break;
2778
2779 case READ_CAPACITY:
2780 TRACE2(("Read capacity hdrive %d\n",t));
2781 if (ha->hdr[t].size > (ulong64)0xffffffff)
2782 rdc.last_block_no = 0xffffffff;
2783 else
2784 rdc.last_block_no = cpu_to_be32(ha->hdr[t].size-1);
2785 rdc.block_length = cpu_to_be32(SECTOR_SIZE);
2786 gdth_copy_internal_data(hanum,scp,(char*)&rdc,sizeof(gdth_rdcap_data));
2787 break;
2788
2789 case SERVICE_ACTION_IN:
2790 if ((scp->cmnd[1] & 0x1f) == SAI_READ_CAPACITY_16 &&
2791 (ha->cache_feat & GDT_64BIT)) {
2792 gdth_rdcap16_data rdc16;
2793
2794 TRACE2(("Read capacity (16) hdrive %d\n",t));
2795 rdc16.last_block_no = cpu_to_be64(ha->hdr[t].size-1);
2796 rdc16.block_length = cpu_to_be32(SECTOR_SIZE);
2797 gdth_copy_internal_data(hanum,scp,(char*)&rdc16,sizeof(gdth_rdcap16_data));
2798 } else {
2799 scp->result = DID_ABORT << 16;
2800 }
2801 break;
2802
2803 default:
2804 TRACE2(("Internal cache cmd 0x%x unknown\n",scp->cmnd[0]));
2805 break;
2806 }
2807
2808 if (!scp->SCp.have_data_in)
2809 scp->SCp.have_data_in++;
2810 else
2811 return 1;
2812
2813 return 0;
2814}
2815
2816static int gdth_fill_cache_cmd(int hanum,Scsi_Cmnd *scp,ushort hdrive)
2817{
2818 register gdth_ha_str *ha;
2819 register gdth_cmd_str *cmdp;
2820 struct scatterlist *sl;
2821 ulong32 cnt, blockcnt;
2822 ulong64 no, blockno;
2823 dma_addr_t phys_addr;
2824 int i, cmd_index, read_write, sgcnt, mode64;
2825 struct page *page;
2826 ulong offset;
2827
2828 ha = HADATA(gdth_ctr_tab[hanum]);
2829 cmdp = ha->pccb;
2830 TRACE(("gdth_fill_cache_cmd() cmd 0x%x cmdsize %d hdrive %d\n",
2831 scp->cmnd[0],scp->cmd_len,hdrive));
2832
2833 if (ha->type==GDT_EISA && ha->cmd_cnt>0)
2834 return 0;
2835
2836 mode64 = (ha->cache_feat & GDT_64BIT) ? TRUE : FALSE;
2837 /* test for READ_16, WRITE_16 if !mode64 ? ---
2838 not required, should not occur due to error return on
2839 READ_CAPACITY_16 */
2840
2841 cmdp->Service = CACHESERVICE;
2842 cmdp->RequestBuffer = scp;
2843 /* search free command index */
2844 if (!(cmd_index=gdth_get_cmd_index(hanum))) {
2845 TRACE(("GDT: No free command index found\n"));
2846 return 0;
2847 }
2848 /* if it's the first command, set command semaphore */
2849 if (ha->cmd_cnt == 0)
2850 gdth_set_sema0(hanum);
2851
2852 /* fill command */
2853 read_write = 0;
2854 if (scp->SCp.sent_command != -1)
2855 cmdp->OpCode = scp->SCp.sent_command; /* special cache cmd. */
2856 else if (scp->cmnd[0] == RESERVE)
2857 cmdp->OpCode = GDT_RESERVE_DRV;
2858 else if (scp->cmnd[0] == RELEASE)
2859 cmdp->OpCode = GDT_RELEASE_DRV;
2860 else if (scp->cmnd[0] == ALLOW_MEDIUM_REMOVAL) {
2861 if (scp->cmnd[4] & 1) /* prevent ? */
2862 cmdp->OpCode = GDT_MOUNT;
2863 else if (scp->cmnd[3] & 1) /* removable drive ? */
2864 cmdp->OpCode = GDT_UNMOUNT;
2865 else
2866 cmdp->OpCode = GDT_FLUSH;
2867 } else if (scp->cmnd[0] == WRITE_6 || scp->cmnd[0] == WRITE_10 ||
2868 scp->cmnd[0] == WRITE_12 || scp->cmnd[0] == WRITE_16
2869 ) {
2870 read_write = 1;
2871 if (gdth_write_through || ((ha->hdr[hdrive].rw_attribs & 1) &&
2872 (ha->cache_feat & GDT_WR_THROUGH)))
2873 cmdp->OpCode = GDT_WRITE_THR;
2874 else
2875 cmdp->OpCode = GDT_WRITE;
2876 } else {
2877 read_write = 2;
2878 cmdp->OpCode = GDT_READ;
2879 }
2880
2881 cmdp->BoardNode = LOCALBOARD;
2882 if (mode64) {
2883 cmdp->u.cache64.DeviceNo = hdrive;
2884 cmdp->u.cache64.BlockNo = 1;
2885 cmdp->u.cache64.sg_canz = 0;
2886 } else {
2887 cmdp->u.cache.DeviceNo = hdrive;
2888 cmdp->u.cache.BlockNo = 1;
2889 cmdp->u.cache.sg_canz = 0;
2890 }
2891
2892 if (read_write) {
2893 if (scp->cmd_len == 16) {
2894 memcpy(&no, &scp->cmnd[2], sizeof(ulong64));
2895 blockno = be64_to_cpu(no);
2896 memcpy(&cnt, &scp->cmnd[10], sizeof(ulong32));
2897 blockcnt = be32_to_cpu(cnt);
2898 } else if (scp->cmd_len == 10) {
2899 memcpy(&no, &scp->cmnd[2], sizeof(ulong32));
2900 blockno = be32_to_cpu(no);
2901 memcpy(&cnt, &scp->cmnd[7], sizeof(ushort));
2902 blockcnt = be16_to_cpu(cnt);
2903 } else {
2904 memcpy(&no, &scp->cmnd[0], sizeof(ulong32));
2905 blockno = be32_to_cpu(no) & 0x001fffffUL;
2906 blockcnt= scp->cmnd[4]==0 ? 0x100 : scp->cmnd[4];
2907 }
2908 if (mode64) {
2909 cmdp->u.cache64.BlockNo = blockno;
2910 cmdp->u.cache64.BlockCnt = blockcnt;
2911 } else {
2912 cmdp->u.cache.BlockNo = (ulong32)blockno;
2913 cmdp->u.cache.BlockCnt = blockcnt;
2914 }
2915
2916 if (scp->use_sg) {
2917 sl = (struct scatterlist *)scp->request_buffer;
2918 sgcnt = scp->use_sg;
2919 scp->SCp.Status = GDTH_MAP_SG;
2920 scp->SCp.Message = (read_write == 1 ?
2921 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
2922 sgcnt = pci_map_sg(ha->pdev,sl,scp->use_sg,scp->SCp.Message);
2923 if (mode64) {
2924 cmdp->u.cache64.DestAddr= (ulong64)-1;
2925 cmdp->u.cache64.sg_canz = sgcnt;
2926 for (i=0; i<sgcnt; ++i,++sl) {
2927 cmdp->u.cache64.sg_lst[i].sg_ptr = sg_dma_address(sl);
2928#ifdef GDTH_DMA_STATISTICS
2929 if (cmdp->u.cache64.sg_lst[i].sg_ptr > (ulong64)0xffffffff)
2930 ha->dma64_cnt++;
2931 else
2932 ha->dma32_cnt++;
2933#endif
2934 cmdp->u.cache64.sg_lst[i].sg_len = sg_dma_len(sl);
2935 }
2936 } else {
2937 cmdp->u.cache.DestAddr= 0xffffffff;
2938 cmdp->u.cache.sg_canz = sgcnt;
2939 for (i=0; i<sgcnt; ++i,++sl) {
2940 cmdp->u.cache.sg_lst[i].sg_ptr = sg_dma_address(sl);
2941#ifdef GDTH_DMA_STATISTICS
2942 ha->dma32_cnt++;
2943#endif
2944 cmdp->u.cache.sg_lst[i].sg_len = sg_dma_len(sl);
2945 }
2946 }
2947
2948#ifdef GDTH_STATISTICS
2949 if (max_sg < (ulong32)sgcnt) {
2950 max_sg = (ulong32)sgcnt;
2951 TRACE3(("GDT: max_sg = %d\n",max_sg));
2952 }
2953#endif
2954
Jenx Axboe40cdc842006-02-05 16:36:23 +01002955 } else if (scp->request_bufflen) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002956 scp->SCp.Status = GDTH_MAP_SINGLE;
2957 scp->SCp.Message = (read_write == 1 ?
2958 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
2959 page = virt_to_page(scp->request_buffer);
2960 offset = (ulong)scp->request_buffer & ~PAGE_MASK;
2961 phys_addr = pci_map_page(ha->pdev,page,offset,
2962 scp->request_bufflen,scp->SCp.Message);
2963 scp->SCp.dma_handle = phys_addr;
2964 if (mode64) {
2965 if (ha->cache_feat & SCATTER_GATHER) {
2966 cmdp->u.cache64.DestAddr = (ulong64)-1;
2967 cmdp->u.cache64.sg_canz = 1;
2968 cmdp->u.cache64.sg_lst[0].sg_ptr = phys_addr;
2969 cmdp->u.cache64.sg_lst[0].sg_len = scp->request_bufflen;
2970 cmdp->u.cache64.sg_lst[1].sg_len = 0;
2971 } else {
2972 cmdp->u.cache64.DestAddr = phys_addr;
2973 cmdp->u.cache64.sg_canz= 0;
2974 }
2975 } else {
2976 if (ha->cache_feat & SCATTER_GATHER) {
2977 cmdp->u.cache.DestAddr = 0xffffffff;
2978 cmdp->u.cache.sg_canz = 1;
2979 cmdp->u.cache.sg_lst[0].sg_ptr = phys_addr;
2980 cmdp->u.cache.sg_lst[0].sg_len = scp->request_bufflen;
2981 cmdp->u.cache.sg_lst[1].sg_len = 0;
2982 } else {
2983 cmdp->u.cache.DestAddr = phys_addr;
2984 cmdp->u.cache.sg_canz= 0;
2985 }
2986 }
2987 }
2988 }
2989 /* evaluate command size, check space */
2990 if (mode64) {
2991 TRACE(("cache cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2992 cmdp->u.cache64.DestAddr,cmdp->u.cache64.sg_canz,
2993 cmdp->u.cache64.sg_lst[0].sg_ptr,
2994 cmdp->u.cache64.sg_lst[0].sg_len));
2995 TRACE(("cache cmd: cmd %d blockno. %d, blockcnt %d\n",
2996 cmdp->OpCode,cmdp->u.cache64.BlockNo,cmdp->u.cache64.BlockCnt));
2997 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.cache64.sg_lst) +
2998 (ushort)cmdp->u.cache64.sg_canz * sizeof(gdth_sg64_str);
2999 } else {
3000 TRACE(("cache cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
3001 cmdp->u.cache.DestAddr,cmdp->u.cache.sg_canz,
3002 cmdp->u.cache.sg_lst[0].sg_ptr,
3003 cmdp->u.cache.sg_lst[0].sg_len));
3004 TRACE(("cache cmd: cmd %d blockno. %d, blockcnt %d\n",
3005 cmdp->OpCode,cmdp->u.cache.BlockNo,cmdp->u.cache.BlockCnt));
3006 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.cache.sg_lst) +
3007 (ushort)cmdp->u.cache.sg_canz * sizeof(gdth_sg_str);
3008 }
3009 if (ha->cmd_len & 3)
3010 ha->cmd_len += (4 - (ha->cmd_len & 3));
3011
3012 if (ha->cmd_cnt > 0) {
3013 if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
3014 ha->ic_all_size) {
3015 TRACE2(("gdth_fill_cache() DPMEM overflow\n"));
3016 ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
3017 return 0;
3018 }
3019 }
3020
3021 /* copy command */
3022 gdth_copy_command(hanum);
3023 return cmd_index;
3024}
3025
3026static int gdth_fill_raw_cmd(int hanum,Scsi_Cmnd *scp,unchar b)
3027{
3028 register gdth_ha_str *ha;
3029 register gdth_cmd_str *cmdp;
3030 struct scatterlist *sl;
3031 ushort i;
3032 dma_addr_t phys_addr, sense_paddr;
3033 int cmd_index, sgcnt, mode64;
3034 unchar t,l;
3035 struct page *page;
3036 ulong offset;
3037
3038 ha = HADATA(gdth_ctr_tab[hanum]);
3039 t = scp->device->id;
3040 l = scp->device->lun;
3041 cmdp = ha->pccb;
3042 TRACE(("gdth_fill_raw_cmd() cmd 0x%x bus %d ID %d LUN %d\n",
3043 scp->cmnd[0],b,t,l));
3044
3045 if (ha->type==GDT_EISA && ha->cmd_cnt>0)
3046 return 0;
3047
3048 mode64 = (ha->raw_feat & GDT_64BIT) ? TRUE : FALSE;
3049
3050 cmdp->Service = SCSIRAWSERVICE;
3051 cmdp->RequestBuffer = scp;
3052 /* search free command index */
3053 if (!(cmd_index=gdth_get_cmd_index(hanum))) {
3054 TRACE(("GDT: No free command index found\n"));
3055 return 0;
3056 }
3057 /* if it's the first command, set command semaphore */
3058 if (ha->cmd_cnt == 0)
3059 gdth_set_sema0(hanum);
3060
3061 /* fill command */
3062 if (scp->SCp.sent_command != -1) {
3063 cmdp->OpCode = scp->SCp.sent_command; /* special raw cmd. */
3064 cmdp->BoardNode = LOCALBOARD;
3065 if (mode64) {
3066 cmdp->u.raw64.direction = (scp->SCp.phase >> 8);
3067 TRACE2(("special raw cmd 0x%x param 0x%x\n",
3068 cmdp->OpCode, cmdp->u.raw64.direction));
3069 /* evaluate command size */
3070 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst);
3071 } else {
3072 cmdp->u.raw.direction = (scp->SCp.phase >> 8);
3073 TRACE2(("special raw cmd 0x%x param 0x%x\n",
3074 cmdp->OpCode, cmdp->u.raw.direction));
3075 /* evaluate command size */
3076 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst);
3077 }
3078
3079 } else {
3080 page = virt_to_page(scp->sense_buffer);
3081 offset = (ulong)scp->sense_buffer & ~PAGE_MASK;
3082 sense_paddr = pci_map_page(ha->pdev,page,offset,
3083 16,PCI_DMA_FROMDEVICE);
Leubner, Achimcbd5f692006-06-09 11:34:29 -07003084 *(ulong32 *)&scp->SCp.buffer = (ulong32)sense_paddr;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003085 /* high part, if 64bit */
Leubner, Achimcbd5f692006-06-09 11:34:29 -07003086 *(ulong32 *)&scp->host_scribble = (ulong32)((ulong64)sense_paddr >> 32);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003087 cmdp->OpCode = GDT_WRITE; /* always */
3088 cmdp->BoardNode = LOCALBOARD;
3089 if (mode64) {
3090 cmdp->u.raw64.reserved = 0;
3091 cmdp->u.raw64.mdisc_time = 0;
3092 cmdp->u.raw64.mcon_time = 0;
3093 cmdp->u.raw64.clen = scp->cmd_len;
3094 cmdp->u.raw64.target = t;
3095 cmdp->u.raw64.lun = l;
3096 cmdp->u.raw64.bus = b;
3097 cmdp->u.raw64.priority = 0;
3098 cmdp->u.raw64.sdlen = scp->request_bufflen;
3099 cmdp->u.raw64.sense_len = 16;
3100 cmdp->u.raw64.sense_data = sense_paddr;
3101 cmdp->u.raw64.direction =
3102 gdth_direction_tab[scp->cmnd[0]]==DOU ? GDTH_DATA_OUT:GDTH_DATA_IN;
3103 memcpy(cmdp->u.raw64.cmd,scp->cmnd,16);
Joerg Dorchainbb9ba312007-03-06 02:46:54 -08003104 cmdp->u.raw64.sg_ranz = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003105 } else {
3106 cmdp->u.raw.reserved = 0;
3107 cmdp->u.raw.mdisc_time = 0;
3108 cmdp->u.raw.mcon_time = 0;
3109 cmdp->u.raw.clen = scp->cmd_len;
3110 cmdp->u.raw.target = t;
3111 cmdp->u.raw.lun = l;
3112 cmdp->u.raw.bus = b;
3113 cmdp->u.raw.priority = 0;
3114 cmdp->u.raw.link_p = 0;
3115 cmdp->u.raw.sdlen = scp->request_bufflen;
3116 cmdp->u.raw.sense_len = 16;
3117 cmdp->u.raw.sense_data = sense_paddr;
3118 cmdp->u.raw.direction =
3119 gdth_direction_tab[scp->cmnd[0]]==DOU ? GDTH_DATA_OUT:GDTH_DATA_IN;
3120 memcpy(cmdp->u.raw.cmd,scp->cmnd,12);
Joerg Dorchainbb9ba312007-03-06 02:46:54 -08003121 cmdp->u.raw.sg_ranz = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003122 }
3123
3124 if (scp->use_sg) {
3125 sl = (struct scatterlist *)scp->request_buffer;
3126 sgcnt = scp->use_sg;
3127 scp->SCp.Status = GDTH_MAP_SG;
3128 scp->SCp.Message = PCI_DMA_BIDIRECTIONAL;
3129 sgcnt = pci_map_sg(ha->pdev,sl,scp->use_sg,scp->SCp.Message);
3130 if (mode64) {
3131 cmdp->u.raw64.sdata = (ulong64)-1;
3132 cmdp->u.raw64.sg_ranz = sgcnt;
3133 for (i=0; i<sgcnt; ++i,++sl) {
3134 cmdp->u.raw64.sg_lst[i].sg_ptr = sg_dma_address(sl);
3135#ifdef GDTH_DMA_STATISTICS
3136 if (cmdp->u.raw64.sg_lst[i].sg_ptr > (ulong64)0xffffffff)
3137 ha->dma64_cnt++;
3138 else
3139 ha->dma32_cnt++;
3140#endif
3141 cmdp->u.raw64.sg_lst[i].sg_len = sg_dma_len(sl);
3142 }
3143 } else {
3144 cmdp->u.raw.sdata = 0xffffffff;
3145 cmdp->u.raw.sg_ranz = sgcnt;
3146 for (i=0; i<sgcnt; ++i,++sl) {
3147 cmdp->u.raw.sg_lst[i].sg_ptr = sg_dma_address(sl);
3148#ifdef GDTH_DMA_STATISTICS
3149 ha->dma32_cnt++;
3150#endif
3151 cmdp->u.raw.sg_lst[i].sg_len = sg_dma_len(sl);
3152 }
3153 }
3154
3155#ifdef GDTH_STATISTICS
3156 if (max_sg < sgcnt) {
3157 max_sg = sgcnt;
3158 TRACE3(("GDT: max_sg = %d\n",sgcnt));
3159 }
3160#endif
3161
Leubner, Achimcbd5f692006-06-09 11:34:29 -07003162 } else if (scp->request_bufflen) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07003163 scp->SCp.Status = GDTH_MAP_SINGLE;
3164 scp->SCp.Message = PCI_DMA_BIDIRECTIONAL;
3165 page = virt_to_page(scp->request_buffer);
3166 offset = (ulong)scp->request_buffer & ~PAGE_MASK;
3167 phys_addr = pci_map_page(ha->pdev,page,offset,
3168 scp->request_bufflen,scp->SCp.Message);
3169 scp->SCp.dma_handle = phys_addr;
3170
3171 if (mode64) {
3172 if (ha->raw_feat & SCATTER_GATHER) {
3173 cmdp->u.raw64.sdata = (ulong64)-1;
3174 cmdp->u.raw64.sg_ranz= 1;
3175 cmdp->u.raw64.sg_lst[0].sg_ptr = phys_addr;
3176 cmdp->u.raw64.sg_lst[0].sg_len = scp->request_bufflen;
3177 cmdp->u.raw64.sg_lst[1].sg_len = 0;
3178 } else {
3179 cmdp->u.raw64.sdata = phys_addr;
3180 cmdp->u.raw64.sg_ranz= 0;
3181 }
3182 } else {
3183 if (ha->raw_feat & SCATTER_GATHER) {
3184 cmdp->u.raw.sdata = 0xffffffff;
3185 cmdp->u.raw.sg_ranz= 1;
3186 cmdp->u.raw.sg_lst[0].sg_ptr = phys_addr;
3187 cmdp->u.raw.sg_lst[0].sg_len = scp->request_bufflen;
3188 cmdp->u.raw.sg_lst[1].sg_len = 0;
3189 } else {
3190 cmdp->u.raw.sdata = phys_addr;
3191 cmdp->u.raw.sg_ranz= 0;
3192 }
3193 }
3194 }
3195 if (mode64) {
3196 TRACE(("raw cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
3197 cmdp->u.raw64.sdata,cmdp->u.raw64.sg_ranz,
3198 cmdp->u.raw64.sg_lst[0].sg_ptr,
3199 cmdp->u.raw64.sg_lst[0].sg_len));
3200 /* evaluate command size */
3201 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst) +
3202 (ushort)cmdp->u.raw64.sg_ranz * sizeof(gdth_sg64_str);
3203 } else {
3204 TRACE(("raw cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
3205 cmdp->u.raw.sdata,cmdp->u.raw.sg_ranz,
3206 cmdp->u.raw.sg_lst[0].sg_ptr,
3207 cmdp->u.raw.sg_lst[0].sg_len));
3208 /* evaluate command size */
3209 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst) +
3210 (ushort)cmdp->u.raw.sg_ranz * sizeof(gdth_sg_str);
3211 }
3212 }
3213 /* check space */
3214 if (ha->cmd_len & 3)
3215 ha->cmd_len += (4 - (ha->cmd_len & 3));
3216
3217 if (ha->cmd_cnt > 0) {
3218 if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
3219 ha->ic_all_size) {
3220 TRACE2(("gdth_fill_raw() DPMEM overflow\n"));
3221 ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
3222 return 0;
3223 }
3224 }
3225
3226 /* copy command */
3227 gdth_copy_command(hanum);
3228 return cmd_index;
3229}
3230
3231static int gdth_special_cmd(int hanum,Scsi_Cmnd *scp)
3232{
3233 register gdth_ha_str *ha;
3234 register gdth_cmd_str *cmdp;
3235 int cmd_index;
3236
3237 ha = HADATA(gdth_ctr_tab[hanum]);
3238 cmdp= ha->pccb;
3239 TRACE2(("gdth_special_cmd(): "));
3240
3241 if (ha->type==GDT_EISA && ha->cmd_cnt>0)
3242 return 0;
3243
3244 memcpy( cmdp, scp->request_buffer, sizeof(gdth_cmd_str));
3245 cmdp->RequestBuffer = scp;
3246
3247 /* search free command index */
3248 if (!(cmd_index=gdth_get_cmd_index(hanum))) {
3249 TRACE(("GDT: No free command index found\n"));
3250 return 0;
3251 }
3252
3253 /* if it's the first command, set command semaphore */
3254 if (ha->cmd_cnt == 0)
3255 gdth_set_sema0(hanum);
3256
3257 /* evaluate command size, check space */
3258 if (cmdp->OpCode == GDT_IOCTL) {
3259 TRACE2(("IOCTL\n"));
3260 ha->cmd_len =
3261 GDTOFFSOF(gdth_cmd_str,u.ioctl.p_param) + sizeof(ulong64);
3262 } else if (cmdp->Service == CACHESERVICE) {
3263 TRACE2(("cache command %d\n",cmdp->OpCode));
3264 if (ha->cache_feat & GDT_64BIT)
3265 ha->cmd_len =
3266 GDTOFFSOF(gdth_cmd_str,u.cache64.sg_lst) + sizeof(gdth_sg64_str);
3267 else
3268 ha->cmd_len =
3269 GDTOFFSOF(gdth_cmd_str,u.cache.sg_lst) + sizeof(gdth_sg_str);
3270 } else if (cmdp->Service == SCSIRAWSERVICE) {
3271 TRACE2(("raw command %d\n",cmdp->OpCode));
3272 if (ha->raw_feat & GDT_64BIT)
3273 ha->cmd_len =
3274 GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst) + sizeof(gdth_sg64_str);
3275 else
3276 ha->cmd_len =
3277 GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst) + sizeof(gdth_sg_str);
3278 }
3279
3280 if (ha->cmd_len & 3)
3281 ha->cmd_len += (4 - (ha->cmd_len & 3));
3282
3283 if (ha->cmd_cnt > 0) {
3284 if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
3285 ha->ic_all_size) {
3286 TRACE2(("gdth_special_cmd() DPMEM overflow\n"));
3287 ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
3288 return 0;
3289 }
3290 }
3291
3292 /* copy command */
3293 gdth_copy_command(hanum);
3294 return cmd_index;
3295}
3296
3297
3298/* Controller event handling functions */
3299static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, ushort source,
3300 ushort idx, gdth_evt_data *evt)
3301{
3302 gdth_evt_str *e;
3303 struct timeval tv;
3304
3305 /* no GDTH_LOCK_HA() ! */
3306 TRACE2(("gdth_store_event() source %d idx %d\n", source, idx));
3307 if (source == 0) /* no source -> no event */
3308 return NULL;
3309
3310 if (ebuffer[elastidx].event_source == source &&
3311 ebuffer[elastidx].event_idx == idx &&
3312 ((evt->size != 0 && ebuffer[elastidx].event_data.size != 0 &&
3313 !memcmp((char *)&ebuffer[elastidx].event_data.eu,
3314 (char *)&evt->eu, evt->size)) ||
3315 (evt->size == 0 && ebuffer[elastidx].event_data.size == 0 &&
3316 !strcmp((char *)&ebuffer[elastidx].event_data.event_string,
3317 (char *)&evt->event_string)))) {
3318 e = &ebuffer[elastidx];
3319 do_gettimeofday(&tv);
3320 e->last_stamp = tv.tv_sec;
3321 ++e->same_count;
3322 } else {
3323 if (ebuffer[elastidx].event_source != 0) { /* entry not free ? */
3324 ++elastidx;
3325 if (elastidx == MAX_EVENTS)
3326 elastidx = 0;
3327 if (elastidx == eoldidx) { /* reached mark ? */
3328 ++eoldidx;
3329 if (eoldidx == MAX_EVENTS)
3330 eoldidx = 0;
3331 }
3332 }
3333 e = &ebuffer[elastidx];
3334 e->event_source = source;
3335 e->event_idx = idx;
3336 do_gettimeofday(&tv);
3337 e->first_stamp = e->last_stamp = tv.tv_sec;
3338 e->same_count = 1;
3339 e->event_data = *evt;
3340 e->application = 0;
3341 }
3342 return e;
3343}
3344
3345static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr)
3346{
3347 gdth_evt_str *e;
3348 int eindex;
3349 ulong flags;
3350
3351 TRACE2(("gdth_read_event() handle %d\n", handle));
3352 spin_lock_irqsave(&ha->smp_lock, flags);
3353 if (handle == -1)
3354 eindex = eoldidx;
3355 else
3356 eindex = handle;
3357 estr->event_source = 0;
3358
3359 if (eindex >= MAX_EVENTS) {
3360 spin_unlock_irqrestore(&ha->smp_lock, flags);
3361 return eindex;
3362 }
3363 e = &ebuffer[eindex];
3364 if (e->event_source != 0) {
3365 if (eindex != elastidx) {
3366 if (++eindex == MAX_EVENTS)
3367 eindex = 0;
3368 } else {
3369 eindex = -1;
3370 }
3371 memcpy(estr, e, sizeof(gdth_evt_str));
3372 }
3373 spin_unlock_irqrestore(&ha->smp_lock, flags);
3374 return eindex;
3375}
3376
3377static void gdth_readapp_event(gdth_ha_str *ha,
3378 unchar application, gdth_evt_str *estr)
3379{
3380 gdth_evt_str *e;
3381 int eindex;
3382 ulong flags;
3383 unchar found = FALSE;
3384
3385 TRACE2(("gdth_readapp_event() app. %d\n", application));
3386 spin_lock_irqsave(&ha->smp_lock, flags);
3387 eindex = eoldidx;
3388 for (;;) {
3389 e = &ebuffer[eindex];
3390 if (e->event_source == 0)
3391 break;
3392 if ((e->application & application) == 0) {
3393 e->application |= application;
3394 found = TRUE;
3395 break;
3396 }
3397 if (eindex == elastidx)
3398 break;
3399 if (++eindex == MAX_EVENTS)
3400 eindex = 0;
3401 }
3402 if (found)
3403 memcpy(estr, e, sizeof(gdth_evt_str));
3404 else
3405 estr->event_source = 0;
3406 spin_unlock_irqrestore(&ha->smp_lock, flags);
3407}
3408
3409static void gdth_clear_events(void)
3410{
3411 TRACE(("gdth_clear_events()"));
3412
3413 eoldidx = elastidx = 0;
3414 ebuffer[0].event_source = 0;
3415}
3416
3417
3418/* SCSI interface functions */
3419
David Howells7d12e782006-10-05 14:55:46 +01003420static irqreturn_t gdth_interrupt(int irq,void *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003421{
3422 gdth_ha_str *ha2 = (gdth_ha_str *)dev_id;
3423 register gdth_ha_str *ha;
3424 gdt6m_dpram_str __iomem *dp6m_ptr = NULL;
3425 gdt6_dpram_str __iomem *dp6_ptr;
3426 gdt2_dpram_str __iomem *dp2_ptr;
3427 Scsi_Cmnd *scp;
3428 int hanum, rval, i;
3429 unchar IStatus;
3430 ushort Service;
3431 ulong flags = 0;
3432#ifdef INT_COAL
3433 int coalesced = FALSE;
3434 int next = FALSE;
3435 gdth_coal_status *pcs = NULL;
3436 int act_int_coal = 0;
3437#endif
3438
3439 TRACE(("gdth_interrupt() IRQ %d\n",irq));
3440
3441 /* if polling and not from gdth_wait() -> return */
3442 if (gdth_polling) {
3443 if (!gdth_from_wait) {
3444 return IRQ_HANDLED;
3445 }
3446 }
3447
3448 if (!gdth_polling)
Leubner, Achimcbd5f692006-06-09 11:34:29 -07003449 spin_lock_irqsave(&ha2->smp_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003450 wait_index = 0;
3451
3452 /* search controller */
3453 if ((hanum = gdth_get_status(&IStatus,irq)) == -1) {
3454 /* spurious interrupt */
3455 if (!gdth_polling)
3456 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3457 return IRQ_HANDLED;
3458 }
3459 ha = HADATA(gdth_ctr_tab[hanum]);
3460
3461#ifdef GDTH_STATISTICS
3462 ++act_ints;
3463#endif
3464
3465#ifdef INT_COAL
3466 /* See if the fw is returning coalesced status */
3467 if (IStatus == COALINDEX) {
3468 /* Coalesced status. Setup the initial status
3469 buffer pointer and flags */
3470 pcs = ha->coal_stat;
3471 coalesced = TRUE;
3472 next = TRUE;
3473 }
3474
3475 do {
3476 if (coalesced) {
3477 /* For coalesced requests all status
3478 information is found in the status buffer */
3479 IStatus = (unchar)(pcs->status & 0xff);
3480 }
3481#endif
3482
3483 if (ha->type == GDT_EISA) {
3484 if (IStatus & 0x80) { /* error flag */
3485 IStatus &= ~0x80;
3486 ha->status = inw(ha->bmic + MAILBOXREG+8);
3487 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3488 } else /* no error */
3489 ha->status = S_OK;
3490 ha->info = inl(ha->bmic + MAILBOXREG+12);
3491 ha->service = inw(ha->bmic + MAILBOXREG+10);
3492 ha->info2 = inl(ha->bmic + MAILBOXREG+4);
3493
3494 outb(0xff, ha->bmic + EDOORREG); /* acknowledge interrupt */
3495 outb(0x00, ha->bmic + SEMA1REG); /* reset status semaphore */
3496 } else if (ha->type == GDT_ISA) {
3497 dp2_ptr = ha->brd;
3498 if (IStatus & 0x80) { /* error flag */
3499 IStatus &= ~0x80;
3500 ha->status = gdth_readw(&dp2_ptr->u.ic.Status);
3501 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3502 } else /* no error */
3503 ha->status = S_OK;
3504 ha->info = gdth_readl(&dp2_ptr->u.ic.Info[0]);
3505 ha->service = gdth_readw(&dp2_ptr->u.ic.Service);
3506 ha->info2 = gdth_readl(&dp2_ptr->u.ic.Info[1]);
3507
3508 gdth_writeb(0xff, &dp2_ptr->io.irqdel); /* acknowledge interrupt */
3509 gdth_writeb(0, &dp2_ptr->u.ic.Cmd_Index);/* reset command index */
3510 gdth_writeb(0, &dp2_ptr->io.Sema1); /* reset status semaphore */
3511 } else if (ha->type == GDT_PCI) {
3512 dp6_ptr = ha->brd;
3513 if (IStatus & 0x80) { /* error flag */
3514 IStatus &= ~0x80;
3515 ha->status = gdth_readw(&dp6_ptr->u.ic.Status);
3516 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3517 } else /* no error */
3518 ha->status = S_OK;
3519 ha->info = gdth_readl(&dp6_ptr->u.ic.Info[0]);
3520 ha->service = gdth_readw(&dp6_ptr->u.ic.Service);
3521 ha->info2 = gdth_readl(&dp6_ptr->u.ic.Info[1]);
3522
3523 gdth_writeb(0xff, &dp6_ptr->io.irqdel); /* acknowledge interrupt */
3524 gdth_writeb(0, &dp6_ptr->u.ic.Cmd_Index);/* reset command index */
3525 gdth_writeb(0, &dp6_ptr->io.Sema1); /* reset status semaphore */
3526 } else if (ha->type == GDT_PCINEW) {
3527 if (IStatus & 0x80) { /* error flag */
3528 IStatus &= ~0x80;
3529 ha->status = inw(PTR2USHORT(&ha->plx->status));
3530 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3531 } else
3532 ha->status = S_OK;
3533 ha->info = inl(PTR2USHORT(&ha->plx->info[0]));
3534 ha->service = inw(PTR2USHORT(&ha->plx->service));
3535 ha->info2 = inl(PTR2USHORT(&ha->plx->info[1]));
3536
3537 outb(0xff, PTR2USHORT(&ha->plx->edoor_reg));
3538 outb(0x00, PTR2USHORT(&ha->plx->sema1_reg));
3539 } else if (ha->type == GDT_PCIMPR) {
3540 dp6m_ptr = ha->brd;
3541 if (IStatus & 0x80) { /* error flag */
3542 IStatus &= ~0x80;
3543#ifdef INT_COAL
3544 if (coalesced)
Jean Delvare107e7162006-11-09 21:45:09 +01003545 ha->status = pcs->ext_status & 0xffff;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003546 else
3547#endif
3548 ha->status = gdth_readw(&dp6m_ptr->i960r.status);
3549 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3550 } else /* no error */
3551 ha->status = S_OK;
3552#ifdef INT_COAL
3553 /* get information */
3554 if (coalesced) {
3555 ha->info = pcs->info0;
3556 ha->info2 = pcs->info1;
Jean Delvare107e7162006-11-09 21:45:09 +01003557 ha->service = (pcs->ext_status >> 16) & 0xffff;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003558 } else
3559#endif
3560 {
3561 ha->info = gdth_readl(&dp6m_ptr->i960r.info[0]);
3562 ha->service = gdth_readw(&dp6m_ptr->i960r.service);
3563 ha->info2 = gdth_readl(&dp6m_ptr->i960r.info[1]);
3564 }
3565 /* event string */
3566 if (IStatus == ASYNCINDEX) {
3567 if (ha->service != SCREENSERVICE &&
3568 (ha->fw_vers & 0xff) >= 0x1a) {
3569 ha->dvr.severity = gdth_readb
3570 (&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.severity);
3571 for (i = 0; i < 256; ++i) {
3572 ha->dvr.event_string[i] = gdth_readb
3573 (&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.evt_str[i]);
3574 if (ha->dvr.event_string[i] == 0)
3575 break;
3576 }
3577 }
3578 }
3579#ifdef INT_COAL
3580 /* Make sure that non coalesced interrupts get cleared
3581 before being handled by gdth_async_event/gdth_sync_event */
3582 if (!coalesced)
3583#endif
3584 {
3585 gdth_writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
3586 gdth_writeb(0, &dp6m_ptr->i960r.sema1_reg);
3587 }
3588 } else {
3589 TRACE2(("gdth_interrupt() unknown controller type\n"));
3590 if (!gdth_polling)
3591 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3592 return IRQ_HANDLED;
3593 }
3594
3595 TRACE(("gdth_interrupt() index %d stat %d info %d\n",
3596 IStatus,ha->status,ha->info));
3597
3598 if (gdth_from_wait) {
3599 wait_hanum = hanum;
3600 wait_index = (int)IStatus;
3601 }
3602
3603 if (IStatus == ASYNCINDEX) {
3604 TRACE2(("gdth_interrupt() async. event\n"));
3605 gdth_async_event(hanum);
3606 if (!gdth_polling)
3607 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3608 gdth_next(hanum);
3609 return IRQ_HANDLED;
3610 }
3611
3612 if (IStatus == SPEZINDEX) {
3613 TRACE2(("Service unknown or not initialized !\n"));
3614 ha->dvr.size = sizeof(ha->dvr.eu.driver);
3615 ha->dvr.eu.driver.ionode = hanum;
3616 gdth_store_event(ha, ES_DRIVER, 4, &ha->dvr);
3617 if (!gdth_polling)
3618 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3619 return IRQ_HANDLED;
3620 }
3621 scp = ha->cmd_tab[IStatus-2].cmnd;
3622 Service = ha->cmd_tab[IStatus-2].service;
3623 ha->cmd_tab[IStatus-2].cmnd = UNUSED_CMND;
3624 if (scp == UNUSED_CMND) {
3625 TRACE2(("gdth_interrupt() index to unused command (%d)\n",IStatus));
3626 ha->dvr.size = sizeof(ha->dvr.eu.driver);
3627 ha->dvr.eu.driver.ionode = hanum;
3628 ha->dvr.eu.driver.index = IStatus;
3629 gdth_store_event(ha, ES_DRIVER, 1, &ha->dvr);
3630 if (!gdth_polling)
3631 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3632 return IRQ_HANDLED;
3633 }
3634 if (scp == INTERNAL_CMND) {
3635 TRACE(("gdth_interrupt() answer to internal command\n"));
3636 if (!gdth_polling)
3637 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3638 return IRQ_HANDLED;
3639 }
3640
3641 TRACE(("gdth_interrupt() sync. status\n"));
3642 rval = gdth_sync_event(hanum,Service,IStatus,scp);
3643 if (!gdth_polling)
3644 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3645 if (rval == 2) {
3646 gdth_putq(hanum,scp,scp->SCp.this_residual);
3647 } else if (rval == 1) {
Matthew Wilcoxb8bff2a2007-10-02 22:40:22 +02003648 gdth_scsi_done(scp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003649 }
3650
3651#ifdef INT_COAL
3652 if (coalesced) {
3653 /* go to the next status in the status buffer */
3654 ++pcs;
3655#ifdef GDTH_STATISTICS
3656 ++act_int_coal;
3657 if (act_int_coal > max_int_coal) {
3658 max_int_coal = act_int_coal;
3659 printk("GDT: max_int_coal = %d\n",(ushort)max_int_coal);
3660 }
3661#endif
3662 /* see if there is another status */
3663 if (pcs->status == 0)
3664 /* Stop the coalesce loop */
3665 next = FALSE;
3666 }
3667 } while (next);
3668
3669 /* coalescing only for new GDT_PCIMPR controllers available */
3670 if (ha->type == GDT_PCIMPR && coalesced) {
3671 gdth_writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
3672 gdth_writeb(0, &dp6m_ptr->i960r.sema1_reg);
3673 }
3674#endif
3675
3676 gdth_next(hanum);
3677 return IRQ_HANDLED;
3678}
3679
3680static int gdth_sync_event(int hanum,int service,unchar index,Scsi_Cmnd *scp)
3681{
3682 register gdth_ha_str *ha;
3683 gdth_msg_str *msg;
3684 gdth_cmd_str *cmdp;
3685 unchar b, t;
3686
3687 ha = HADATA(gdth_ctr_tab[hanum]);
3688 cmdp = ha->pccb;
3689 TRACE(("gdth_sync_event() serv %d status %d\n",
3690 service,ha->status));
3691
3692 if (service == SCREENSERVICE) {
3693 msg = ha->pmsg;
3694 TRACE(("len: %d, answer: %d, ext: %d, alen: %d\n",
3695 msg->msg_len,msg->msg_answer,msg->msg_ext,msg->msg_alen));
3696 if (msg->msg_len > MSGLEN+1)
3697 msg->msg_len = MSGLEN+1;
3698 if (msg->msg_len)
3699 if (!(msg->msg_answer && msg->msg_ext)) {
3700 msg->msg_text[msg->msg_len] = '\0';
3701 printk("%s",msg->msg_text);
3702 }
3703
3704 if (msg->msg_ext && !msg->msg_answer) {
3705 while (gdth_test_busy(hanum))
3706 gdth_delay(0);
3707 cmdp->Service = SCREENSERVICE;
3708 cmdp->RequestBuffer = SCREEN_CMND;
3709 gdth_get_cmd_index(hanum);
3710 gdth_set_sema0(hanum);
3711 cmdp->OpCode = GDT_READ;
3712 cmdp->BoardNode = LOCALBOARD;
3713 cmdp->u.screen.reserved = 0;
3714 cmdp->u.screen.su.msg.msg_handle= msg->msg_handle;
3715 cmdp->u.screen.su.msg.msg_addr = ha->msg_phys;
3716 ha->cmd_offs_dpmem = 0;
3717 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3718 + sizeof(ulong64);
3719 ha->cmd_cnt = 0;
3720 gdth_copy_command(hanum);
3721 gdth_release_event(hanum);
3722 return 0;
3723 }
3724
3725 if (msg->msg_answer && msg->msg_alen) {
3726 /* default answers (getchar() not possible) */
3727 if (msg->msg_alen == 1) {
3728 msg->msg_alen = 0;
3729 msg->msg_len = 1;
3730 msg->msg_text[0] = 0;
3731 } else {
3732 msg->msg_alen -= 2;
3733 msg->msg_len = 2;
3734 msg->msg_text[0] = 1;
3735 msg->msg_text[1] = 0;
3736 }
3737 msg->msg_ext = 0;
3738 msg->msg_answer = 0;
3739 while (gdth_test_busy(hanum))
3740 gdth_delay(0);
3741 cmdp->Service = SCREENSERVICE;
3742 cmdp->RequestBuffer = SCREEN_CMND;
3743 gdth_get_cmd_index(hanum);
3744 gdth_set_sema0(hanum);
3745 cmdp->OpCode = GDT_WRITE;
3746 cmdp->BoardNode = LOCALBOARD;
3747 cmdp->u.screen.reserved = 0;
3748 cmdp->u.screen.su.msg.msg_handle= msg->msg_handle;
3749 cmdp->u.screen.su.msg.msg_addr = ha->msg_phys;
3750 ha->cmd_offs_dpmem = 0;
3751 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3752 + sizeof(ulong64);
3753 ha->cmd_cnt = 0;
3754 gdth_copy_command(hanum);
3755 gdth_release_event(hanum);
3756 return 0;
3757 }
3758 printk("\n");
3759
3760 } else {
3761 b = virt_ctr ? NUMDATA(scp->device->host)->busnum : scp->device->channel;
3762 t = scp->device->id;
3763 if (scp->SCp.sent_command == -1 && b != ha->virt_bus) {
3764 ha->raw[BUS_L2P(ha,b)].io_cnt[t]--;
3765 }
3766 /* cache or raw service */
3767 if (ha->status == S_BSY) {
3768 TRACE2(("Controller busy -> retry !\n"));
3769 if (scp->SCp.sent_command == GDT_MOUNT)
3770 scp->SCp.sent_command = GDT_CLUST_INFO;
3771 /* retry */
3772 return 2;
3773 }
3774 if (scp->SCp.Status == GDTH_MAP_SG)
3775 pci_unmap_sg(ha->pdev,scp->request_buffer,
3776 scp->use_sg,scp->SCp.Message);
3777 else if (scp->SCp.Status == GDTH_MAP_SINGLE)
3778 pci_unmap_page(ha->pdev,scp->SCp.dma_handle,
3779 scp->request_bufflen,scp->SCp.Message);
3780 if (scp->SCp.buffer) {
3781 dma_addr_t addr;
Leubner, Achimcbd5f692006-06-09 11:34:29 -07003782 addr = (dma_addr_t)*(ulong32 *)&scp->SCp.buffer;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003783 if (scp->host_scribble)
Leubner, Achimcbd5f692006-06-09 11:34:29 -07003784 addr += (dma_addr_t)
3785 ((ulong64)(*(ulong32 *)&scp->host_scribble) << 32);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003786 pci_unmap_page(ha->pdev,addr,16,PCI_DMA_FROMDEVICE);
3787 }
3788
3789 if (ha->status == S_OK) {
3790 scp->SCp.Status = S_OK;
3791 scp->SCp.Message = ha->info;
3792 if (scp->SCp.sent_command != -1) {
3793 TRACE2(("gdth_sync_event(): special cmd 0x%x OK\n",
3794 scp->SCp.sent_command));
3795 /* special commands GDT_CLUST_INFO/GDT_MOUNT ? */
3796 if (scp->SCp.sent_command == GDT_CLUST_INFO) {
3797 ha->hdr[t].cluster_type = (unchar)ha->info;
3798 if (!(ha->hdr[t].cluster_type &
3799 CLUSTER_MOUNTED)) {
3800 /* NOT MOUNTED -> MOUNT */
3801 scp->SCp.sent_command = GDT_MOUNT;
3802 if (ha->hdr[t].cluster_type &
3803 CLUSTER_RESERVED) {
3804 /* cluster drive RESERVED (on the other node) */
3805 scp->SCp.phase = -2; /* reservation conflict */
3806 }
3807 } else {
3808 scp->SCp.sent_command = -1;
3809 }
3810 } else {
3811 if (scp->SCp.sent_command == GDT_MOUNT) {
3812 ha->hdr[t].cluster_type |= CLUSTER_MOUNTED;
3813 ha->hdr[t].media_changed = TRUE;
3814 } else if (scp->SCp.sent_command == GDT_UNMOUNT) {
3815 ha->hdr[t].cluster_type &= ~CLUSTER_MOUNTED;
3816 ha->hdr[t].media_changed = TRUE;
3817 }
3818 scp->SCp.sent_command = -1;
3819 }
3820 /* retry */
3821 scp->SCp.this_residual = HIGH_PRI;
3822 return 2;
3823 } else {
3824 /* RESERVE/RELEASE ? */
3825 if (scp->cmnd[0] == RESERVE) {
3826 ha->hdr[t].cluster_type |= CLUSTER_RESERVED;
3827 } else if (scp->cmnd[0] == RELEASE) {
3828 ha->hdr[t].cluster_type &= ~CLUSTER_RESERVED;
3829 }
3830 scp->result = DID_OK << 16;
3831 scp->sense_buffer[0] = 0;
3832 }
3833 } else {
3834 scp->SCp.Status = ha->status;
3835 scp->SCp.Message = ha->info;
3836
3837 if (scp->SCp.sent_command != -1) {
3838 TRACE2(("gdth_sync_event(): special cmd 0x%x error 0x%x\n",
3839 scp->SCp.sent_command, ha->status));
3840 if (scp->SCp.sent_command == GDT_SCAN_START ||
3841 scp->SCp.sent_command == GDT_SCAN_END) {
3842 scp->SCp.sent_command = -1;
3843 /* retry */
3844 scp->SCp.this_residual = HIGH_PRI;
3845 return 2;
3846 }
3847 memset((char*)scp->sense_buffer,0,16);
3848 scp->sense_buffer[0] = 0x70;
3849 scp->sense_buffer[2] = NOT_READY;
3850 scp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
3851 } else if (service == CACHESERVICE) {
3852 if (ha->status == S_CACHE_UNKNOWN &&
3853 (ha->hdr[t].cluster_type &
3854 CLUSTER_RESERVE_STATE) == CLUSTER_RESERVE_STATE) {
3855 /* bus reset -> force GDT_CLUST_INFO */
3856 ha->hdr[t].cluster_type &= ~CLUSTER_RESERVED;
3857 }
3858 memset((char*)scp->sense_buffer,0,16);
3859 if (ha->status == (ushort)S_CACHE_RESERV) {
3860 scp->result = (DID_OK << 16) | (RESERVATION_CONFLICT << 1);
3861 } else {
3862 scp->sense_buffer[0] = 0x70;
3863 scp->sense_buffer[2] = NOT_READY;
3864 scp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
3865 }
Matthew Wilcox687d2bc2007-09-25 12:42:03 -04003866 if (!IS_GDTH_INTERNAL_CMD(scp)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07003867 ha->dvr.size = sizeof(ha->dvr.eu.sync);
3868 ha->dvr.eu.sync.ionode = hanum;
3869 ha->dvr.eu.sync.service = service;
3870 ha->dvr.eu.sync.status = ha->status;
3871 ha->dvr.eu.sync.info = ha->info;
3872 ha->dvr.eu.sync.hostdrive = t;
3873 if (ha->status >= 0x8000)
3874 gdth_store_event(ha, ES_SYNC, 0, &ha->dvr);
3875 else
3876 gdth_store_event(ha, ES_SYNC, service, &ha->dvr);
3877 }
3878 } else {
3879 /* sense buffer filled from controller firmware (DMA) */
3880 if (ha->status != S_RAW_SCSI || ha->info >= 0x100) {
3881 scp->result = DID_BAD_TARGET << 16;
3882 } else {
3883 scp->result = (DID_OK << 16) | ha->info;
3884 }
3885 }
3886 }
3887 if (!scp->SCp.have_data_in)
3888 scp->SCp.have_data_in++;
3889 else
3890 return 1;
3891 }
3892
3893 return 0;
3894}
3895
3896static char *async_cache_tab[] = {
3897/* 0*/ "\011\000\002\002\002\004\002\006\004"
3898 "GDT HA %u, service %u, async. status %u/%lu unknown",
3899/* 1*/ "\011\000\002\002\002\004\002\006\004"
3900 "GDT HA %u, service %u, async. status %u/%lu unknown",
3901/* 2*/ "\005\000\002\006\004"
3902 "GDT HA %u, Host Drive %lu not ready",
3903/* 3*/ "\005\000\002\006\004"
3904 "GDT HA %u, Host Drive %lu: REASSIGN not successful and/or data error on reassigned blocks. Drive may crash in the future and should be replaced",
3905/* 4*/ "\005\000\002\006\004"
3906 "GDT HA %u, mirror update on Host Drive %lu failed",
3907/* 5*/ "\005\000\002\006\004"
3908 "GDT HA %u, Mirror Drive %lu failed",
3909/* 6*/ "\005\000\002\006\004"
3910 "GDT HA %u, Mirror Drive %lu: REASSIGN not successful and/or data error on reassigned blocks. Drive may crash in the future and should be replaced",
3911/* 7*/ "\005\000\002\006\004"
3912 "GDT HA %u, Host Drive %lu write protected",
3913/* 8*/ "\005\000\002\006\004"
3914 "GDT HA %u, media changed in Host Drive %lu",
3915/* 9*/ "\005\000\002\006\004"
3916 "GDT HA %u, Host Drive %lu is offline",
3917/*10*/ "\005\000\002\006\004"
3918 "GDT HA %u, media change of Mirror Drive %lu",
3919/*11*/ "\005\000\002\006\004"
3920 "GDT HA %u, Mirror Drive %lu is write protected",
3921/*12*/ "\005\000\002\006\004"
3922 "GDT HA %u, general error on Host Drive %lu. Please check the devices of this drive!",
3923/*13*/ "\007\000\002\006\002\010\002"
3924 "GDT HA %u, Array Drive %u: Cache Drive %u failed",
3925/*14*/ "\005\000\002\006\002"
3926 "GDT HA %u, Array Drive %u: FAIL state entered",
3927/*15*/ "\005\000\002\006\002"
3928 "GDT HA %u, Array Drive %u: error",
3929/*16*/ "\007\000\002\006\002\010\002"
3930 "GDT HA %u, Array Drive %u: failed drive replaced by Cache Drive %u",
3931/*17*/ "\005\000\002\006\002"
3932 "GDT HA %u, Array Drive %u: parity build failed",
3933/*18*/ "\005\000\002\006\002"
3934 "GDT HA %u, Array Drive %u: drive rebuild failed",
3935/*19*/ "\005\000\002\010\002"
3936 "GDT HA %u, Test of Hot Fix %u failed",
3937/*20*/ "\005\000\002\006\002"
3938 "GDT HA %u, Array Drive %u: drive build finished successfully",
3939/*21*/ "\005\000\002\006\002"
3940 "GDT HA %u, Array Drive %u: drive rebuild finished successfully",
3941/*22*/ "\007\000\002\006\002\010\002"
3942 "GDT HA %u, Array Drive %u: Hot Fix %u activated",
3943/*23*/ "\005\000\002\006\002"
3944 "GDT HA %u, Host Drive %u: processing of i/o aborted due to serious drive error",
3945/*24*/ "\005\000\002\010\002"
3946 "GDT HA %u, mirror update on Cache Drive %u completed",
3947/*25*/ "\005\000\002\010\002"
3948 "GDT HA %u, mirror update on Cache Drive %lu failed",
3949/*26*/ "\005\000\002\006\002"
3950 "GDT HA %u, Array Drive %u: drive rebuild started",
3951/*27*/ "\005\000\002\012\001"
3952 "GDT HA %u, Fault bus %u: SHELF OK detected",
3953/*28*/ "\005\000\002\012\001"
3954 "GDT HA %u, Fault bus %u: SHELF not OK detected",
3955/*29*/ "\007\000\002\012\001\013\001"
3956 "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug started",
3957/*30*/ "\007\000\002\012\001\013\001"
3958 "GDT HA %u, Fault bus %u, ID %u: new disk detected",
3959/*31*/ "\007\000\002\012\001\013\001"
3960 "GDT HA %u, Fault bus %u, ID %u: old disk detected",
3961/*32*/ "\007\000\002\012\001\013\001"
3962 "GDT HA %u, Fault bus %u, ID %u: plugging an active disk is invalid",
3963/*33*/ "\007\000\002\012\001\013\001"
3964 "GDT HA %u, Fault bus %u, ID %u: invalid device detected",
3965/*34*/ "\011\000\002\012\001\013\001\006\004"
3966 "GDT HA %u, Fault bus %u, ID %u: insufficient disk capacity (%lu MB required)",
3967/*35*/ "\007\000\002\012\001\013\001"
3968 "GDT HA %u, Fault bus %u, ID %u: disk write protected",
3969/*36*/ "\007\000\002\012\001\013\001"
3970 "GDT HA %u, Fault bus %u, ID %u: disk not available",
3971/*37*/ "\007\000\002\012\001\006\004"
3972 "GDT HA %u, Fault bus %u: swap detected (%lu)",
3973/*38*/ "\007\000\002\012\001\013\001"
3974 "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug finished successfully",
3975/*39*/ "\007\000\002\012\001\013\001"
3976 "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug aborted due to user Hot Plug",
3977/*40*/ "\007\000\002\012\001\013\001"
3978 "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug aborted",
3979/*41*/ "\007\000\002\012\001\013\001"
3980 "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug for Hot Fix started",
3981/*42*/ "\005\000\002\006\002"
3982 "GDT HA %u, Array Drive %u: drive build started",
3983/*43*/ "\003\000\002"
3984 "GDT HA %u, DRAM parity error detected",
3985/*44*/ "\005\000\002\006\002"
3986 "GDT HA %u, Mirror Drive %u: update started",
3987/*45*/ "\007\000\002\006\002\010\002"
3988 "GDT HA %u, Mirror Drive %u: Hot Fix %u activated",
3989/*46*/ "\005\000\002\006\002"
3990 "GDT HA %u, Array Drive %u: no matching Pool Hot Fix Drive available",
3991/*47*/ "\005\000\002\006\002"
3992 "GDT HA %u, Array Drive %u: Pool Hot Fix Drive available",
3993/*48*/ "\005\000\002\006\002"
3994 "GDT HA %u, Mirror Drive %u: no matching Pool Hot Fix Drive available",
3995/*49*/ "\005\000\002\006\002"
3996 "GDT HA %u, Mirror Drive %u: Pool Hot Fix Drive available",
3997/*50*/ "\007\000\002\012\001\013\001"
3998 "GDT HA %u, SCSI bus %u, ID %u: IGNORE_WIDE_RESIDUE message received",
3999/*51*/ "\005\000\002\006\002"
4000 "GDT HA %u, Array Drive %u: expand started",
4001/*52*/ "\005\000\002\006\002"
4002 "GDT HA %u, Array Drive %u: expand finished successfully",
4003/*53*/ "\005\000\002\006\002"
4004 "GDT HA %u, Array Drive %u: expand failed",
4005/*54*/ "\003\000\002"
4006 "GDT HA %u, CPU temperature critical",
4007/*55*/ "\003\000\002"
4008 "GDT HA %u, CPU temperature OK",
4009/*56*/ "\005\000\002\006\004"
4010 "GDT HA %u, Host drive %lu created",
4011/*57*/ "\005\000\002\006\002"
4012 "GDT HA %u, Array Drive %u: expand restarted",
4013/*58*/ "\005\000\002\006\002"
4014 "GDT HA %u, Array Drive %u: expand stopped",
4015/*59*/ "\005\000\002\010\002"
4016 "GDT HA %u, Mirror Drive %u: drive build quited",
4017/*60*/ "\005\000\002\006\002"
4018 "GDT HA %u, Array Drive %u: parity build quited",
4019/*61*/ "\005\000\002\006\002"
4020 "GDT HA %u, Array Drive %u: drive rebuild quited",
4021/*62*/ "\005\000\002\006\002"
4022 "GDT HA %u, Array Drive %u: parity verify started",
4023/*63*/ "\005\000\002\006\002"
4024 "GDT HA %u, Array Drive %u: parity verify done",
4025/*64*/ "\005\000\002\006\002"
4026 "GDT HA %u, Array Drive %u: parity verify failed",
4027/*65*/ "\005\000\002\006\002"
4028 "GDT HA %u, Array Drive %u: parity error detected",
4029/*66*/ "\005\000\002\006\002"
4030 "GDT HA %u, Array Drive %u: parity verify quited",
4031/*67*/ "\005\000\002\006\002"
4032 "GDT HA %u, Host Drive %u reserved",
4033/*68*/ "\005\000\002\006\002"
4034 "GDT HA %u, Host Drive %u mounted and released",
4035/*69*/ "\005\000\002\006\002"
4036 "GDT HA %u, Host Drive %u released",
4037/*70*/ "\003\000\002"
4038 "GDT HA %u, DRAM error detected and corrected with ECC",
4039/*71*/ "\003\000\002"
4040 "GDT HA %u, Uncorrectable DRAM error detected with ECC",
4041/*72*/ "\011\000\002\012\001\013\001\014\001"
4042 "GDT HA %u, SCSI bus %u, ID %u, LUN %u: reassigning block",
4043/*73*/ "\005\000\002\006\002"
4044 "GDT HA %u, Host drive %u resetted locally",
4045/*74*/ "\005\000\002\006\002"
4046 "GDT HA %u, Host drive %u resetted remotely",
4047/*75*/ "\003\000\002"
4048 "GDT HA %u, async. status 75 unknown",
4049};
4050
4051
4052static int gdth_async_event(int hanum)
4053{
4054 gdth_ha_str *ha;
4055 gdth_cmd_str *cmdp;
4056 int cmd_index;
4057
4058 ha = HADATA(gdth_ctr_tab[hanum]);
4059 cmdp= ha->pccb;
4060 TRACE2(("gdth_async_event() ha %d serv %d\n",
4061 hanum,ha->service));
4062
4063 if (ha->service == SCREENSERVICE) {
4064 if (ha->status == MSG_REQUEST) {
4065 while (gdth_test_busy(hanum))
4066 gdth_delay(0);
4067 cmdp->Service = SCREENSERVICE;
4068 cmdp->RequestBuffer = SCREEN_CMND;
4069 cmd_index = gdth_get_cmd_index(hanum);
4070 gdth_set_sema0(hanum);
4071 cmdp->OpCode = GDT_READ;
4072 cmdp->BoardNode = LOCALBOARD;
4073 cmdp->u.screen.reserved = 0;
4074 cmdp->u.screen.su.msg.msg_handle= MSG_INV_HANDLE;
4075 cmdp->u.screen.su.msg.msg_addr = ha->msg_phys;
4076 ha->cmd_offs_dpmem = 0;
4077 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
4078 + sizeof(ulong64);
4079 ha->cmd_cnt = 0;
4080 gdth_copy_command(hanum);
4081 if (ha->type == GDT_EISA)
4082 printk("[EISA slot %d] ",(ushort)ha->brd_phys);
4083 else if (ha->type == GDT_ISA)
4084 printk("[DPMEM 0x%4X] ",(ushort)ha->brd_phys);
4085 else
4086 printk("[PCI %d/%d] ",(ushort)(ha->brd_phys>>8),
4087 (ushort)((ha->brd_phys>>3)&0x1f));
4088 gdth_release_event(hanum);
4089 }
4090
4091 } else {
4092 if (ha->type == GDT_PCIMPR &&
4093 (ha->fw_vers & 0xff) >= 0x1a) {
4094 ha->dvr.size = 0;
4095 ha->dvr.eu.async.ionode = hanum;
4096 ha->dvr.eu.async.status = ha->status;
4097 /* severity and event_string already set! */
4098 } else {
4099 ha->dvr.size = sizeof(ha->dvr.eu.async);
4100 ha->dvr.eu.async.ionode = hanum;
4101 ha->dvr.eu.async.service = ha->service;
4102 ha->dvr.eu.async.status = ha->status;
4103 ha->dvr.eu.async.info = ha->info;
4104 *(ulong32 *)ha->dvr.eu.async.scsi_coord = ha->info2;
4105 }
4106 gdth_store_event( ha, ES_ASYNC, ha->service, &ha->dvr );
4107 gdth_log_event( &ha->dvr, NULL );
4108
4109 /* new host drive from expand? */
4110 if (ha->service == CACHESERVICE && ha->status == 56) {
4111 TRACE2(("gdth_async_event(): new host drive %d created\n",
4112 (ushort)ha->info));
4113 /* gdth_analyse_hdrive(hanum, (ushort)ha->info); */
4114 }
4115 }
4116 return 1;
4117}
4118
4119static void gdth_log_event(gdth_evt_data *dvr, char *buffer)
4120{
4121 gdth_stackframe stack;
4122 char *f = NULL;
4123 int i,j;
4124
4125 TRACE2(("gdth_log_event()\n"));
4126 if (dvr->size == 0) {
4127 if (buffer == NULL) {
4128 printk("Adapter %d: %s\n",dvr->eu.async.ionode,dvr->event_string);
4129 } else {
4130 sprintf(buffer,"Adapter %d: %s\n",
4131 dvr->eu.async.ionode,dvr->event_string);
4132 }
4133 } else if (dvr->eu.async.service == CACHESERVICE &&
4134 INDEX_OK(dvr->eu.async.status, async_cache_tab)) {
4135 TRACE2(("GDT: Async. event cache service, event no.: %d\n",
4136 dvr->eu.async.status));
4137
4138 f = async_cache_tab[dvr->eu.async.status];
4139
4140 /* i: parameter to push, j: stack element to fill */
4141 for (j=0,i=1; i < f[0]; i+=2) {
4142 switch (f[i+1]) {
4143 case 4:
4144 stack.b[j++] = *(ulong32*)&dvr->eu.stream[(int)f[i]];
4145 break;
4146 case 2:
4147 stack.b[j++] = *(ushort*)&dvr->eu.stream[(int)f[i]];
4148 break;
4149 case 1:
4150 stack.b[j++] = *(unchar*)&dvr->eu.stream[(int)f[i]];
4151 break;
4152 default:
4153 break;
4154 }
4155 }
4156
4157 if (buffer == NULL) {
4158 printk(&f[(int)f[0]],stack);
4159 printk("\n");
4160 } else {
4161 sprintf(buffer,&f[(int)f[0]],stack);
4162 }
4163
4164 } else {
4165 if (buffer == NULL) {
4166 printk("GDT HA %u, Unknown async. event service %d event no. %d\n",
4167 dvr->eu.async.ionode,dvr->eu.async.service,dvr->eu.async.status);
4168 } else {
4169 sprintf(buffer,"GDT HA %u, Unknown async. event service %d event no. %d",
4170 dvr->eu.async.ionode,dvr->eu.async.service,dvr->eu.async.status);
4171 }
4172 }
4173}
4174
4175#ifdef GDTH_STATISTICS
8e879042005-04-17 15:28:39 -05004176static void gdth_timeout(ulong data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07004177{
4178 ulong32 i;
4179 Scsi_Cmnd *nscp;
4180 gdth_ha_str *ha;
4181 ulong flags;
4182 int hanum = 0;
4183
4184 ha = HADATA(gdth_ctr_tab[hanum]);
4185 spin_lock_irqsave(&ha->smp_lock, flags);
4186
4187 for (act_stats=0,i=0; i<GDTH_MAXCMDS; ++i)
4188 if (ha->cmd_tab[i].cmnd != UNUSED_CMND)
4189 ++act_stats;
4190
4191 for (act_rq=0,nscp=ha->req_first; nscp; nscp=(Scsi_Cmnd*)nscp->SCp.ptr)
4192 ++act_rq;
4193
4194 TRACE2(("gdth_to(): ints %d, ios %d, act_stats %d, act_rq %d\n",
4195 act_ints, act_ios, act_stats, act_rq));
4196 act_ints = act_ios = 0;
4197
4198 gdth_timer.expires = jiffies + 30 * HZ;
4199 add_timer(&gdth_timer);
4200 spin_unlock_irqrestore(&ha->smp_lock, flags);
4201}
4202#endif
4203
8e879042005-04-17 15:28:39 -05004204static void __init internal_setup(char *str,int *ints)
Linus Torvalds1da177e2005-04-16 15:20:36 -07004205{
4206 int i, argc;
4207 char *cur_str, *argv;
4208
4209 TRACE2(("internal_setup() str %s ints[0] %d\n",
4210 str ? str:"NULL", ints ? ints[0]:0));
4211
4212 /* read irq[] from ints[] */
4213 if (ints) {
4214 argc = ints[0];
4215 if (argc > 0) {
4216 if (argc > MAXHA)
4217 argc = MAXHA;
4218 for (i = 0; i < argc; ++i)
4219 irq[i] = ints[i+1];
4220 }
4221 }
4222
4223 /* analyse string */
4224 argv = str;
4225 while (argv && (cur_str = strchr(argv, ':'))) {
4226 int val = 0, c = *++cur_str;
4227
4228 if (c == 'n' || c == 'N')
4229 val = 0;
4230 else if (c == 'y' || c == 'Y')
4231 val = 1;
4232 else
4233 val = (int)simple_strtoul(cur_str, NULL, 0);
4234
4235 if (!strncmp(argv, "disable:", 8))
4236 disable = val;
4237 else if (!strncmp(argv, "reserve_mode:", 13))
4238 reserve_mode = val;
4239 else if (!strncmp(argv, "reverse_scan:", 13))
4240 reverse_scan = val;
4241 else if (!strncmp(argv, "hdr_channel:", 12))
4242 hdr_channel = val;
4243 else if (!strncmp(argv, "max_ids:", 8))
4244 max_ids = val;
4245 else if (!strncmp(argv, "rescan:", 7))
4246 rescan = val;
4247 else if (!strncmp(argv, "virt_ctr:", 9))
4248 virt_ctr = val;
4249 else if (!strncmp(argv, "shared_access:", 14))
4250 shared_access = val;
4251 else if (!strncmp(argv, "probe_eisa_isa:", 15))
4252 probe_eisa_isa = val;
4253 else if (!strncmp(argv, "reserve_list:", 13)) {
4254 reserve_list[0] = val;
4255 for (i = 1; i < MAX_RES_ARGS; i++) {
4256 cur_str = strchr(cur_str, ',');
4257 if (!cur_str)
4258 break;
4259 if (!isdigit((int)*++cur_str)) {
4260 --cur_str;
4261 break;
4262 }
4263 reserve_list[i] =
4264 (int)simple_strtoul(cur_str, NULL, 0);
4265 }
4266 if (!cur_str)
4267 break;
4268 argv = ++cur_str;
4269 continue;
4270 }
4271
4272 if ((argv = strchr(argv, ',')))
4273 ++argv;
4274 }
4275}
4276
4277int __init option_setup(char *str)
4278{
4279 int ints[MAXHA];
4280 char *cur = str;
4281 int i = 1;
4282
4283 TRACE2(("option_setup() str %s\n", str ? str:"NULL"));
4284
4285 while (cur && isdigit(*cur) && i <= MAXHA) {
4286 ints[i++] = simple_strtoul(cur, NULL, 0);
4287 if ((cur = strchr(cur, ',')) != NULL) cur++;
4288 }
4289
4290 ints[0] = i - 1;
4291 internal_setup(cur, ints);
4292 return 1;
4293}
4294
Christoph Hellwigaed91cb2007-10-02 22:48:16 +02004295
Leubner, Achimcbd5f692006-06-09 11:34:29 -07004296#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
Christoph Hellwigd0be4a7d2005-10-31 18:31:40 +01004297static int __init gdth_detect(struct scsi_host_template *shtp)
Leubner, Achimcbd5f692006-06-09 11:34:29 -07004298#else
4299static int __init gdth_detect(Scsi_Host_Template *shtp)
4300#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07004301{
Linus Torvalds1da177e2005-04-16 15:20:36 -07004302#ifdef DEBUG_GDTH
4303 printk("GDT: This driver contains debugging information !! Trace level = %d\n",
4304 DebugState);
4305 printk(" Destination of debugging information: ");
4306#ifdef __SERIAL__
4307#ifdef __COM2__
4308 printk("Serial port COM2\n");
4309#else
4310 printk("Serial port COM1\n");
4311#endif
4312#else
4313 printk("Console\n");
4314#endif
4315 gdth_delay(3000);
4316#endif
4317
4318 TRACE(("gdth_detect()\n"));
4319
4320 if (disable) {
4321 printk("GDT-HA: Controller driver disabled from command line !\n");
4322 return 0;
4323 }
4324
Leubner, Achimcbd5f692006-06-09 11:34:29 -07004325 printk("GDT-HA: Storage RAID Controller Driver. Version: %s\n",GDTH_VERSION_STR);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004326 /* initializations */
Christoph Hellwig8514ef22007-10-02 22:51:06 +02004327 gdth_polling = TRUE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004328 gdth_clear_events();
4329
4330 /* As default we do not probe for EISA or ISA controllers */
4331 if (probe_eisa_isa) {
4332 /* scanning for controllers, at first: ISA controller */
Christoph Hellwigaed91cb2007-10-02 22:48:16 +02004333#ifdef CONFIG_ISA
4334 ulong32 isa_bios;
4335 for (isa_bios = 0xc8000UL; isa_bios <= 0xd8000UL;
4336 isa_bios += 0x8000UL) {
4337 if (gdth_ctr_count >= MAXHA)
Linus Torvalds1da177e2005-04-16 15:20:36 -07004338 break;
Christoph Hellwigaed91cb2007-10-02 22:48:16 +02004339 gdth_isa_probe_one(shtp, isa_bios);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004340 }
Christoph Hellwigaed91cb2007-10-02 22:48:16 +02004341#endif
Christoph Hellwig706a5d42007-10-02 22:49:35 +02004342#ifdef CONFIG_EISA
4343 {
4344 ushort eisa_slot;
4345 for (eisa_slot = 0x1000; eisa_slot <= 0x8000; eisa_slot += 0x1000) {
4346 if (gdth_ctr_count >= MAXHA)
Linus Torvalds1da177e2005-04-16 15:20:36 -07004347 break;
Christoph Hellwig706a5d42007-10-02 22:49:35 +02004348 gdth_eisa_probe_one(shtp, eisa_slot);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004349 }
Christoph Hellwig706a5d42007-10-02 22:49:35 +02004350 }
4351#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07004352 }
4353
Christoph Hellwig8514ef22007-10-02 22:51:06 +02004354#ifdef CONFIG_PCI
Linus Torvalds1da177e2005-04-16 15:20:36 -07004355 /* scanning for PCI controllers */
Christoph Hellwig8514ef22007-10-02 22:51:06 +02004356 {
4357 gdth_pci_str pcistr[MAXHA];
4358 int cnt,ctr;
4359
Linus Torvalds1da177e2005-04-16 15:20:36 -07004360 cnt = gdth_search_pci(pcistr);
4361 printk("GDT-HA: Found %d PCI Storage RAID Controllers\n",cnt);
4362 gdth_sort_pci(pcistr,cnt);
4363 for (ctr = 0; ctr < cnt; ++ctr) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07004364 if (gdth_ctr_count >= MAXHA)
4365 break;
Christoph Hellwig8514ef22007-10-02 22:51:06 +02004366 gdth_pci_probe_one(shtp, pcistr, ctr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004367 }
Christoph Hellwig8514ef22007-10-02 22:51:06 +02004368 }
4369#endif /* CONFIG_PCI */
Linus Torvalds1da177e2005-04-16 15:20:36 -07004370
4371 TRACE2(("gdth_detect() %d controller detected\n",gdth_ctr_count));
4372 if (gdth_ctr_count > 0) {
4373#ifdef GDTH_STATISTICS
4374 TRACE2(("gdth_detect(): Initializing timer !\n"));
4375 init_timer(&gdth_timer);
4376 gdth_timer.expires = jiffies + HZ;
4377 gdth_timer.data = 0L;
4378 gdth_timer.function = gdth_timeout;
4379 add_timer(&gdth_timer);
4380#endif
4381 major = register_chrdev(0,"gdth",&gdth_fops);
Alan Sterne041c682006-03-27 01:16:30 -08004382 notifier_disabled = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004383 register_reboot_notifier(&gdth_notifier);
4384 }
4385 gdth_polling = FALSE;
4386 return gdth_ctr_vcount;
4387}
4388
8e879042005-04-17 15:28:39 -05004389static int gdth_release(struct Scsi_Host *shp)
Linus Torvalds1da177e2005-04-16 15:20:36 -07004390{
4391 int hanum;
4392 gdth_ha_str *ha;
4393
4394 TRACE2(("gdth_release()\n"));
4395 if (NUMDATA(shp)->busnum == 0) {
4396 hanum = NUMDATA(shp)->hanum;
4397 ha = HADATA(gdth_ctr_tab[hanum]);
4398 if (ha->sdev) {
4399 scsi_free_host_dev(ha->sdev);
4400 ha->sdev = NULL;
4401 }
4402 gdth_flush(hanum);
4403
4404 if (shp->irq) {
4405 free_irq(shp->irq,ha);
4406 }
Christoph Hellwigaed91cb2007-10-02 22:48:16 +02004407#ifdef CONFIG_ISA
Linus Torvalds1da177e2005-04-16 15:20:36 -07004408 if (shp->dma_channel != 0xff) {
4409 free_dma(shp->dma_channel);
4410 }
4411#endif
4412#ifdef INT_COAL
4413 if (ha->coal_stat)
4414 pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) *
4415 MAXOFFSETS, ha->coal_stat, ha->coal_stat_phys);
4416#endif
4417 if (ha->pscratch)
4418 pci_free_consistent(ha->pdev, GDTH_SCRATCH,
4419 ha->pscratch, ha->scratch_phys);
4420 if (ha->pmsg)
4421 pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
4422 ha->pmsg, ha->msg_phys);
4423 if (ha->ccb_phys)
4424 pci_unmap_single(ha->pdev,ha->ccb_phys,
4425 sizeof(gdth_cmd_str),PCI_DMA_BIDIRECTIONAL);
4426 gdth_ctr_released++;
4427 TRACE2(("gdth_release(): HA %d of %d\n",
4428 gdth_ctr_released, gdth_ctr_count));
4429
4430 if (gdth_ctr_released == gdth_ctr_count) {
4431#ifdef GDTH_STATISTICS
4432 del_timer(&gdth_timer);
4433#endif
4434 unregister_chrdev(major,"gdth");
4435 unregister_reboot_notifier(&gdth_notifier);
4436 }
4437 }
4438
4439 scsi_unregister(shp);
4440 return 0;
4441}
4442
4443
4444static const char *gdth_ctr_name(int hanum)
4445{
4446 gdth_ha_str *ha;
4447
4448 TRACE2(("gdth_ctr_name()\n"));
4449
4450 ha = HADATA(gdth_ctr_tab[hanum]);
4451
4452 if (ha->type == GDT_EISA) {
4453 switch (ha->stype) {
4454 case GDT3_ID:
4455 return("GDT3000/3020");
4456 case GDT3A_ID:
4457 return("GDT3000A/3020A/3050A");
4458 case GDT3B_ID:
4459 return("GDT3000B/3010A");
4460 }
4461 } else if (ha->type == GDT_ISA) {
4462 return("GDT2000/2020");
4463 } else if (ha->type == GDT_PCI) {
Jeff Garzik8e9a8a02007-07-17 05:25:17 -04004464 switch (ha->pdev->device) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07004465 case PCI_DEVICE_ID_VORTEX_GDT60x0:
4466 return("GDT6000/6020/6050");
4467 case PCI_DEVICE_ID_VORTEX_GDT6000B:
4468 return("GDT6000B/6010");
4469 }
4470 }
4471 /* new controllers (GDT_PCINEW, GDT_PCIMPR, ..) use board_info IOCTL! */
4472
4473 return("");
4474}
4475
8e879042005-04-17 15:28:39 -05004476static const char *gdth_info(struct Scsi_Host *shp)
Linus Torvalds1da177e2005-04-16 15:20:36 -07004477{
4478 int hanum;
4479 gdth_ha_str *ha;
4480
4481 TRACE2(("gdth_info()\n"));
4482 hanum = NUMDATA(shp)->hanum;
4483 ha = HADATA(gdth_ctr_tab[hanum]);
4484
4485 return ((const char *)ha->binfo.type_string);
4486}
4487
8e879042005-04-17 15:28:39 -05004488static int gdth_eh_bus_reset(Scsi_Cmnd *scp)
Linus Torvalds1da177e2005-04-16 15:20:36 -07004489{
4490 int i, hanum;
4491 gdth_ha_str *ha;
4492 ulong flags;
4493 Scsi_Cmnd *cmnd;
4494 unchar b;
4495
4496 TRACE2(("gdth_eh_bus_reset()\n"));
4497
4498 hanum = NUMDATA(scp->device->host)->hanum;
4499 b = virt_ctr ? NUMDATA(scp->device->host)->busnum : scp->device->channel;
4500 ha = HADATA(gdth_ctr_tab[hanum]);
4501
4502 /* clear command tab */
4503 spin_lock_irqsave(&ha->smp_lock, flags);
4504 for (i = 0; i < GDTH_MAXCMDS; ++i) {
4505 cmnd = ha->cmd_tab[i].cmnd;
4506 if (!SPECIAL_SCP(cmnd) && cmnd->device->channel == b)
4507 ha->cmd_tab[i].cmnd = UNUSED_CMND;
4508 }
4509 spin_unlock_irqrestore(&ha->smp_lock, flags);
4510
4511 if (b == ha->virt_bus) {
4512 /* host drives */
4513 for (i = 0; i < MAX_HDRIVES; ++i) {
4514 if (ha->hdr[i].present) {
4515 spin_lock_irqsave(&ha->smp_lock, flags);
4516 gdth_polling = TRUE;
4517 while (gdth_test_busy(hanum))
4518 gdth_delay(0);
4519 if (gdth_internal_cmd(hanum, CACHESERVICE,
4520 GDT_CLUST_RESET, i, 0, 0))
4521 ha->hdr[i].cluster_type &= ~CLUSTER_RESERVED;
4522 gdth_polling = FALSE;
4523 spin_unlock_irqrestore(&ha->smp_lock, flags);
4524 }
4525 }
4526 } else {
4527 /* raw devices */
4528 spin_lock_irqsave(&ha->smp_lock, flags);
4529 for (i = 0; i < MAXID; ++i)
4530 ha->raw[BUS_L2P(ha,b)].io_cnt[i] = 0;
4531 gdth_polling = TRUE;
4532 while (gdth_test_busy(hanum))
4533 gdth_delay(0);
4534 gdth_internal_cmd(hanum, SCSIRAWSERVICE, GDT_RESET_BUS,
4535 BUS_L2P(ha,b), 0, 0);
4536 gdth_polling = FALSE;
Leubner, Achimcbd5f692006-06-09 11:34:29 -07004537 spin_unlock_irqrestore(&ha->smp_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004538 }
4539 return SUCCESS;
4540}
4541
Linus Torvalds1da177e2005-04-16 15:20:36 -07004542#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
8e879042005-04-17 15:28:39 -05004543static int gdth_bios_param(struct scsi_device *sdev,struct block_device *bdev,sector_t cap,int *ip)
Linus Torvalds1da177e2005-04-16 15:20:36 -07004544#else
8e879042005-04-17 15:28:39 -05004545static int gdth_bios_param(Disk *disk,kdev_t dev,int *ip)
Linus Torvalds1da177e2005-04-16 15:20:36 -07004546#endif
4547{
4548 unchar b, t;
4549 int hanum;
4550 gdth_ha_str *ha;
4551 struct scsi_device *sd;
4552 unsigned capacity;
4553
4554#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
4555 sd = sdev;
4556 capacity = cap;
4557#else
4558 sd = disk->device;
4559 capacity = disk->capacity;
4560#endif
4561 hanum = NUMDATA(sd->host)->hanum;
4562 b = virt_ctr ? NUMDATA(sd->host)->busnum : sd->channel;
4563 t = sd->id;
4564 TRACE2(("gdth_bios_param() ha %d bus %d target %d\n", hanum, b, t));
4565 ha = HADATA(gdth_ctr_tab[hanum]);
4566
4567 if (b != ha->virt_bus || ha->hdr[t].heads == 0) {
4568 /* raw device or host drive without mapping information */
4569 TRACE2(("Evaluate mapping\n"));
4570 gdth_eval_mapping(capacity,&ip[2],&ip[0],&ip[1]);
4571 } else {
4572 ip[0] = ha->hdr[t].heads;
4573 ip[1] = ha->hdr[t].secs;
4574 ip[2] = capacity / ip[0] / ip[1];
4575 }
4576
4577 TRACE2(("gdth_bios_param(): %d heads, %d secs, %d cyls\n",
4578 ip[0],ip[1],ip[2]));
4579 return 0;
4580}
4581
4582
Matthew Wilcoxb8bff2a2007-10-02 22:40:22 +02004583static int gdth_queuecommand(struct scsi_cmnd *scp,
4584 void (*done)(struct scsi_cmnd *))
Linus Torvalds1da177e2005-04-16 15:20:36 -07004585{
4586 int hanum;
4587 int priority;
4588
4589 TRACE(("gdth_queuecommand() cmd 0x%x\n", scp->cmnd[0]));
4590
Matthew Wilcoxb8bff2a2007-10-02 22:40:22 +02004591 scp->scsi_done = done;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004592 scp->SCp.have_data_in = 1;
4593 scp->SCp.phase = -1;
4594 scp->SCp.sent_command = -1;
4595 scp->SCp.Status = GDTH_MAP_NONE;
4596 scp->SCp.buffer = (struct scatterlist *)NULL;
4597
4598 hanum = NUMDATA(scp->device->host)->hanum;
4599#ifdef GDTH_STATISTICS
4600 ++act_ios;
4601#endif
4602
4603 priority = DEFAULT_PRI;
Matthew Wilcox687d2bc2007-09-25 12:42:03 -04004604 if (IS_GDTH_INTERNAL_CMD(scp))
Linus Torvalds1da177e2005-04-16 15:20:36 -07004605 priority = scp->SCp.this_residual;
Leubner, Achimcbd5f692006-06-09 11:34:29 -07004606 else
4607 gdth_update_timeout(hanum, scp, scp->timeout_per_command * 6);
4608
Linus Torvalds1da177e2005-04-16 15:20:36 -07004609 gdth_putq( hanum, scp, priority );
4610 gdth_next( hanum );
4611 return 0;
4612}
4613
4614
4615static int gdth_open(struct inode *inode, struct file *filep)
4616{
4617 gdth_ha_str *ha;
4618 int i;
4619
4620 for (i = 0; i < gdth_ctr_count; i++) {
4621 ha = HADATA(gdth_ctr_tab[i]);
4622 if (!ha->sdev)
4623 ha->sdev = scsi_get_host_dev(gdth_ctr_tab[i]);
4624 }
4625
4626 TRACE(("gdth_open()\n"));
4627 return 0;
4628}
4629
4630static int gdth_close(struct inode *inode, struct file *filep)
4631{
4632 TRACE(("gdth_close()\n"));
4633 return 0;
4634}
4635
4636static int ioc_event(void __user *arg)
4637{
4638 gdth_ioctl_event evt;
4639 gdth_ha_str *ha;
4640 ulong flags;
4641
4642 if (copy_from_user(&evt, arg, sizeof(gdth_ioctl_event)) ||
4643 evt.ionode >= gdth_ctr_count)
4644 return -EFAULT;
4645 ha = HADATA(gdth_ctr_tab[evt.ionode]);
4646
4647 if (evt.erase == 0xff) {
4648 if (evt.event.event_source == ES_TEST)
4649 evt.event.event_data.size=sizeof(evt.event.event_data.eu.test);
4650 else if (evt.event.event_source == ES_DRIVER)
4651 evt.event.event_data.size=sizeof(evt.event.event_data.eu.driver);
4652 else if (evt.event.event_source == ES_SYNC)
4653 evt.event.event_data.size=sizeof(evt.event.event_data.eu.sync);
4654 else
4655 evt.event.event_data.size=sizeof(evt.event.event_data.eu.async);
4656 spin_lock_irqsave(&ha->smp_lock, flags);
4657 gdth_store_event(ha, evt.event.event_source, evt.event.event_idx,
4658 &evt.event.event_data);
4659 spin_unlock_irqrestore(&ha->smp_lock, flags);
4660 } else if (evt.erase == 0xfe) {
4661 gdth_clear_events();
4662 } else if (evt.erase == 0) {
4663 evt.handle = gdth_read_event(ha, evt.handle, &evt.event);
4664 } else {
4665 gdth_readapp_event(ha, evt.erase, &evt.event);
4666 }
4667 if (copy_to_user(arg, &evt, sizeof(gdth_ioctl_event)))
4668 return -EFAULT;
4669 return 0;
4670}
4671
4672static int ioc_lockdrv(void __user *arg)
4673{
4674 gdth_ioctl_lockdrv ldrv;
4675 unchar i, j;
4676 ulong flags;
4677 gdth_ha_str *ha;
4678
4679 if (copy_from_user(&ldrv, arg, sizeof(gdth_ioctl_lockdrv)) ||
4680 ldrv.ionode >= gdth_ctr_count)
4681 return -EFAULT;
4682 ha = HADATA(gdth_ctr_tab[ldrv.ionode]);
4683
4684 for (i = 0; i < ldrv.drive_cnt && i < MAX_HDRIVES; ++i) {
4685 j = ldrv.drives[i];
4686 if (j >= MAX_HDRIVES || !ha->hdr[j].present)
4687 continue;
4688 if (ldrv.lock) {
4689 spin_lock_irqsave(&ha->smp_lock, flags);
4690 ha->hdr[j].lock = 1;
4691 spin_unlock_irqrestore(&ha->smp_lock, flags);
4692 gdth_wait_completion(ldrv.ionode, ha->bus_cnt, j);
4693 gdth_stop_timeout(ldrv.ionode, ha->bus_cnt, j);
4694 } else {
4695 spin_lock_irqsave(&ha->smp_lock, flags);
4696 ha->hdr[j].lock = 0;
4697 spin_unlock_irqrestore(&ha->smp_lock, flags);
4698 gdth_start_timeout(ldrv.ionode, ha->bus_cnt, j);
4699 gdth_next(ldrv.ionode);
4700 }
4701 }
4702 return 0;
4703}
4704
4705static int ioc_resetdrv(void __user *arg, char *cmnd)
4706{
4707 gdth_ioctl_reset res;
4708 gdth_cmd_str cmd;
4709 int hanum;
4710 gdth_ha_str *ha;
Leubner, Achimcbd5f692006-06-09 11:34:29 -07004711 int rval;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004712
4713 if (copy_from_user(&res, arg, sizeof(gdth_ioctl_reset)) ||
4714 res.ionode >= gdth_ctr_count || res.number >= MAX_HDRIVES)
4715 return -EFAULT;
4716 hanum = res.ionode;
4717 ha = HADATA(gdth_ctr_tab[hanum]);
4718
4719 if (!ha->hdr[res.number].present)
4720 return 0;
4721 memset(&cmd, 0, sizeof(gdth_cmd_str));
4722 cmd.Service = CACHESERVICE;
4723 cmd.OpCode = GDT_CLUST_RESET;
4724 if (ha->cache_feat & GDT_64BIT)
4725 cmd.u.cache64.DeviceNo = res.number;
4726 else
4727 cmd.u.cache.DeviceNo = res.number;
Leubner, Achimcbd5f692006-06-09 11:34:29 -07004728
4729 rval = __gdth_execute(ha->sdev, &cmd, cmnd, 30, NULL);
4730 if (rval < 0)
4731 return rval;
4732 res.status = rval;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004733
4734 if (copy_to_user(arg, &res, sizeof(gdth_ioctl_reset)))
4735 return -EFAULT;
4736 return 0;
4737}
4738
4739static int ioc_general(void __user *arg, char *cmnd)
4740{
4741 gdth_ioctl_general gen;
4742 char *buf = NULL;
4743 ulong64 paddr;
4744 int hanum;
Leubner, Achimcbd5f692006-06-09 11:34:29 -07004745 gdth_ha_str *ha;
4746 int rval;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004747
4748 if (copy_from_user(&gen, arg, sizeof(gdth_ioctl_general)) ||
4749 gen.ionode >= gdth_ctr_count)
4750 return -EFAULT;
4751 hanum = gen.ionode;
4752 ha = HADATA(gdth_ctr_tab[hanum]);
4753 if (gen.data_len + gen.sense_len != 0) {
4754 if (!(buf = gdth_ioctl_alloc(hanum, gen.data_len + gen.sense_len,
4755 FALSE, &paddr)))
4756 return -EFAULT;
4757 if (copy_from_user(buf, arg + sizeof(gdth_ioctl_general),
4758 gen.data_len + gen.sense_len)) {
4759 gdth_ioctl_free(hanum, gen.data_len+gen.sense_len, buf, paddr);
4760 return -EFAULT;
4761 }
4762
4763 if (gen.command.OpCode == GDT_IOCTL) {
4764 gen.command.u.ioctl.p_param = paddr;
4765 } else if (gen.command.Service == CACHESERVICE) {
4766 if (ha->cache_feat & GDT_64BIT) {
4767 /* copy elements from 32-bit IOCTL structure */
4768 gen.command.u.cache64.BlockCnt = gen.command.u.cache.BlockCnt;
4769 gen.command.u.cache64.BlockNo = gen.command.u.cache.BlockNo;
4770 gen.command.u.cache64.DeviceNo = gen.command.u.cache.DeviceNo;
4771 /* addresses */
4772 if (ha->cache_feat & SCATTER_GATHER) {
4773 gen.command.u.cache64.DestAddr = (ulong64)-1;
4774 gen.command.u.cache64.sg_canz = 1;
4775 gen.command.u.cache64.sg_lst[0].sg_ptr = paddr;
4776 gen.command.u.cache64.sg_lst[0].sg_len = gen.data_len;
4777 gen.command.u.cache64.sg_lst[1].sg_len = 0;
4778 } else {
4779 gen.command.u.cache64.DestAddr = paddr;
4780 gen.command.u.cache64.sg_canz = 0;
4781 }
4782 } else {
4783 if (ha->cache_feat & SCATTER_GATHER) {
4784 gen.command.u.cache.DestAddr = 0xffffffff;
4785 gen.command.u.cache.sg_canz = 1;
4786 gen.command.u.cache.sg_lst[0].sg_ptr = (ulong32)paddr;
4787 gen.command.u.cache.sg_lst[0].sg_len = gen.data_len;
4788 gen.command.u.cache.sg_lst[1].sg_len = 0;
4789 } else {
4790 gen.command.u.cache.DestAddr = paddr;
4791 gen.command.u.cache.sg_canz = 0;
4792 }
4793 }
4794 } else if (gen.command.Service == SCSIRAWSERVICE) {
4795 if (ha->raw_feat & GDT_64BIT) {
4796 /* copy elements from 32-bit IOCTL structure */
4797 char cmd[16];
4798 gen.command.u.raw64.sense_len = gen.command.u.raw.sense_len;
4799 gen.command.u.raw64.bus = gen.command.u.raw.bus;
4800 gen.command.u.raw64.lun = gen.command.u.raw.lun;
4801 gen.command.u.raw64.target = gen.command.u.raw.target;
4802 memcpy(cmd, gen.command.u.raw.cmd, 16);
4803 memcpy(gen.command.u.raw64.cmd, cmd, 16);
4804 gen.command.u.raw64.clen = gen.command.u.raw.clen;
4805 gen.command.u.raw64.sdlen = gen.command.u.raw.sdlen;
4806 gen.command.u.raw64.direction = gen.command.u.raw.direction;
4807 /* addresses */
4808 if (ha->raw_feat & SCATTER_GATHER) {
4809 gen.command.u.raw64.sdata = (ulong64)-1;
4810 gen.command.u.raw64.sg_ranz = 1;
4811 gen.command.u.raw64.sg_lst[0].sg_ptr = paddr;
4812 gen.command.u.raw64.sg_lst[0].sg_len = gen.data_len;
4813 gen.command.u.raw64.sg_lst[1].sg_len = 0;
4814 } else {
4815 gen.command.u.raw64.sdata = paddr;
4816 gen.command.u.raw64.sg_ranz = 0;
4817 }
4818 gen.command.u.raw64.sense_data = paddr + gen.data_len;
4819 } else {
4820 if (ha->raw_feat & SCATTER_GATHER) {
4821 gen.command.u.raw.sdata = 0xffffffff;
4822 gen.command.u.raw.sg_ranz = 1;
4823 gen.command.u.raw.sg_lst[0].sg_ptr = (ulong32)paddr;
4824 gen.command.u.raw.sg_lst[0].sg_len = gen.data_len;
4825 gen.command.u.raw.sg_lst[1].sg_len = 0;
4826 } else {
4827 gen.command.u.raw.sdata = paddr;
4828 gen.command.u.raw.sg_ranz = 0;
4829 }
4830 gen.command.u.raw.sense_data = (ulong32)paddr + gen.data_len;
4831 }
4832 } else {
4833 gdth_ioctl_free(hanum, gen.data_len+gen.sense_len, buf, paddr);
4834 return -EFAULT;
4835 }
4836 }
4837
Leubner, Achimcbd5f692006-06-09 11:34:29 -07004838 rval = __gdth_execute(ha->sdev, &gen.command, cmnd, gen.timeout, &gen.info);
4839 if (rval < 0)
4840 return rval;
4841 gen.status = rval;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004842
4843 if (copy_to_user(arg + sizeof(gdth_ioctl_general), buf,
4844 gen.data_len + gen.sense_len)) {
4845 gdth_ioctl_free(hanum, gen.data_len+gen.sense_len, buf, paddr);
4846 return -EFAULT;
4847 }
4848 if (copy_to_user(arg, &gen,
4849 sizeof(gdth_ioctl_general) - sizeof(gdth_cmd_str))) {
4850 gdth_ioctl_free(hanum, gen.data_len+gen.sense_len, buf, paddr);
4851 return -EFAULT;
4852 }
4853 gdth_ioctl_free(hanum, gen.data_len+gen.sense_len, buf, paddr);
4854 return 0;
4855}
4856
4857static int ioc_hdrlist(void __user *arg, char *cmnd)
4858{
4859 gdth_ioctl_rescan *rsc;
4860 gdth_cmd_str *cmd;
4861 gdth_ha_str *ha;
4862 unchar i;
4863 int hanum, rc = -ENOMEM;
Leubner, Achimcbd5f692006-06-09 11:34:29 -07004864 u32 cluster_type = 0;
4865
Linus Torvalds1da177e2005-04-16 15:20:36 -07004866 rsc = kmalloc(sizeof(*rsc), GFP_KERNEL);
4867 cmd = kmalloc(sizeof(*cmd), GFP_KERNEL);
4868 if (!rsc || !cmd)
Leubner, Achimcbd5f692006-06-09 11:34:29 -07004869 goto free_fail;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004870
4871 if (copy_from_user(rsc, arg, sizeof(gdth_ioctl_rescan)) ||
4872 rsc->ionode >= gdth_ctr_count) {
4873 rc = -EFAULT;
Leubner, Achimcbd5f692006-06-09 11:34:29 -07004874 goto free_fail;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004875 }
4876 hanum = rsc->ionode;
4877 ha = HADATA(gdth_ctr_tab[hanum]);
4878 memset(cmd, 0, sizeof(gdth_cmd_str));
4879
Linus Torvalds1da177e2005-04-16 15:20:36 -07004880 for (i = 0; i < MAX_HDRIVES; ++i) {
4881 if (!ha->hdr[i].present) {
4882 rsc->hdr_list[i].bus = 0xff;
4883 continue;
4884 }
4885 rsc->hdr_list[i].bus = ha->virt_bus;
4886 rsc->hdr_list[i].target = i;
4887 rsc->hdr_list[i].lun = 0;
4888 rsc->hdr_list[i].cluster_type = ha->hdr[i].cluster_type;
4889 if (ha->hdr[i].cluster_type & CLUSTER_DRIVE) {
4890 cmd->Service = CACHESERVICE;
4891 cmd->OpCode = GDT_CLUST_INFO;
4892 if (ha->cache_feat & GDT_64BIT)
4893 cmd->u.cache64.DeviceNo = i;
4894 else
4895 cmd->u.cache.DeviceNo = i;
Leubner, Achimcbd5f692006-06-09 11:34:29 -07004896 if (__gdth_execute(ha->sdev, cmd, cmnd, 30, &cluster_type) == S_OK)
4897 rsc->hdr_list[i].cluster_type = cluster_type;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004898 }
4899 }
Leubner, Achimcbd5f692006-06-09 11:34:29 -07004900
Linus Torvalds1da177e2005-04-16 15:20:36 -07004901 if (copy_to_user(arg, rsc, sizeof(gdth_ioctl_rescan)))
4902 rc = -EFAULT;
4903 else
Leubner, Achimcbd5f692006-06-09 11:34:29 -07004904 rc = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004905
4906free_fail:
4907 kfree(rsc);
4908 kfree(cmd);
4909 return rc;
4910}
4911
4912static int ioc_rescan(void __user *arg, char *cmnd)
4913{
4914 gdth_ioctl_rescan *rsc;
4915 gdth_cmd_str *cmd;
4916 ushort i, status, hdr_cnt;
4917 ulong32 info;
4918 int hanum, cyls, hds, secs;
4919 int rc = -ENOMEM;
4920 ulong flags;
4921 gdth_ha_str *ha;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004922
4923 rsc = kmalloc(sizeof(*rsc), GFP_KERNEL);
4924 cmd = kmalloc(sizeof(*cmd), GFP_KERNEL);
4925 if (!cmd || !rsc)
Leubner, Achimcbd5f692006-06-09 11:34:29 -07004926 goto free_fail;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004927
4928 if (copy_from_user(rsc, arg, sizeof(gdth_ioctl_rescan)) ||
4929 rsc->ionode >= gdth_ctr_count) {
Leubner, Achimcbd5f692006-06-09 11:34:29 -07004930 rc = -EFAULT;
4931 goto free_fail;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004932 }
4933 hanum = rsc->ionode;
4934 ha = HADATA(gdth_ctr_tab[hanum]);
4935 memset(cmd, 0, sizeof(gdth_cmd_str));
4936
Linus Torvalds1da177e2005-04-16 15:20:36 -07004937 if (rsc->flag == 0) {
4938 /* old method: re-init. cache service */
4939 cmd->Service = CACHESERVICE;
4940 if (ha->cache_feat & GDT_64BIT) {
4941 cmd->OpCode = GDT_X_INIT_HOST;
4942 cmd->u.cache64.DeviceNo = LINUX_OS;
4943 } else {
4944 cmd->OpCode = GDT_INIT;
4945 cmd->u.cache.DeviceNo = LINUX_OS;
4946 }
Leubner, Achimcbd5f692006-06-09 11:34:29 -07004947
4948 status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004949 i = 0;
4950 hdr_cnt = (status == S_OK ? (ushort)info : 0);
4951 } else {
4952 i = rsc->hdr_no;
4953 hdr_cnt = i + 1;
4954 }
4955
4956 for (; i < hdr_cnt && i < MAX_HDRIVES; ++i) {
4957 cmd->Service = CACHESERVICE;
4958 cmd->OpCode = GDT_INFO;
4959 if (ha->cache_feat & GDT_64BIT)
4960 cmd->u.cache64.DeviceNo = i;
4961 else
4962 cmd->u.cache.DeviceNo = i;
Leubner, Achimcbd5f692006-06-09 11:34:29 -07004963
4964 status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4965
Linus Torvalds1da177e2005-04-16 15:20:36 -07004966 spin_lock_irqsave(&ha->smp_lock, flags);
4967 rsc->hdr_list[i].bus = ha->virt_bus;
4968 rsc->hdr_list[i].target = i;
4969 rsc->hdr_list[i].lun = 0;
4970 if (status != S_OK) {
4971 ha->hdr[i].present = FALSE;
4972 } else {
4973 ha->hdr[i].present = TRUE;
4974 ha->hdr[i].size = info;
4975 /* evaluate mapping */
4976 ha->hdr[i].size &= ~SECS32;
4977 gdth_eval_mapping(ha->hdr[i].size,&cyls,&hds,&secs);
4978 ha->hdr[i].heads = hds;
4979 ha->hdr[i].secs = secs;
4980 /* round size */
4981 ha->hdr[i].size = cyls * hds * secs;
4982 }
4983 spin_unlock_irqrestore(&ha->smp_lock, flags);
4984 if (status != S_OK)
4985 continue;
4986
4987 /* extended info, if GDT_64BIT, for drives > 2 TB */
4988 /* but we need ha->info2, not yet stored in scp->SCp */
4989
4990 /* devtype, cluster info, R/W attribs */
4991 cmd->Service = CACHESERVICE;
4992 cmd->OpCode = GDT_DEVTYPE;
4993 if (ha->cache_feat & GDT_64BIT)
4994 cmd->u.cache64.DeviceNo = i;
4995 else
4996 cmd->u.cache.DeviceNo = i;
Leubner, Achimcbd5f692006-06-09 11:34:29 -07004997
4998 status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4999
Linus Torvalds1da177e2005-04-16 15:20:36 -07005000 spin_lock_irqsave(&ha->smp_lock, flags);
5001 ha->hdr[i].devtype = (status == S_OK ? (ushort)info : 0);
5002 spin_unlock_irqrestore(&ha->smp_lock, flags);
5003
5004 cmd->Service = CACHESERVICE;
5005 cmd->OpCode = GDT_CLUST_INFO;
5006 if (ha->cache_feat & GDT_64BIT)
5007 cmd->u.cache64.DeviceNo = i;
5008 else
5009 cmd->u.cache.DeviceNo = i;
Leubner, Achimcbd5f692006-06-09 11:34:29 -07005010
5011 status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
5012
Linus Torvalds1da177e2005-04-16 15:20:36 -07005013 spin_lock_irqsave(&ha->smp_lock, flags);
5014 ha->hdr[i].cluster_type =
5015 ((status == S_OK && !shared_access) ? (ushort)info : 0);
5016 spin_unlock_irqrestore(&ha->smp_lock, flags);
5017 rsc->hdr_list[i].cluster_type = ha->hdr[i].cluster_type;
5018
5019 cmd->Service = CACHESERVICE;
5020 cmd->OpCode = GDT_RW_ATTRIBS;
5021 if (ha->cache_feat & GDT_64BIT)
5022 cmd->u.cache64.DeviceNo = i;
5023 else
5024 cmd->u.cache.DeviceNo = i;
Leubner, Achimcbd5f692006-06-09 11:34:29 -07005025
5026 status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
5027
Linus Torvalds1da177e2005-04-16 15:20:36 -07005028 spin_lock_irqsave(&ha->smp_lock, flags);
5029 ha->hdr[i].rw_attribs = (status == S_OK ? (ushort)info : 0);
5030 spin_unlock_irqrestore(&ha->smp_lock, flags);
5031 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07005032
5033 if (copy_to_user(arg, rsc, sizeof(gdth_ioctl_rescan)))
5034 rc = -EFAULT;
5035 else
Leubner, Achimcbd5f692006-06-09 11:34:29 -07005036 rc = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005037
5038free_fail:
5039 kfree(rsc);
5040 kfree(cmd);
5041 return rc;
5042}
5043
5044static int gdth_ioctl(struct inode *inode, struct file *filep,
5045 unsigned int cmd, unsigned long arg)
5046{
5047 gdth_ha_str *ha;
5048 Scsi_Cmnd *scp;
5049 ulong flags;
5050 char cmnd[MAX_COMMAND_SIZE];
5051 void __user *argp = (void __user *)arg;
5052
5053 memset(cmnd, 0xff, 12);
5054
5055 TRACE(("gdth_ioctl() cmd 0x%x\n", cmd));
5056
5057 switch (cmd) {
5058 case GDTIOCTL_CTRCNT:
5059 {
5060 int cnt = gdth_ctr_count;
5061 if (put_user(cnt, (int __user *)argp))
5062 return -EFAULT;
5063 break;
5064 }
5065
5066 case GDTIOCTL_DRVERS:
5067 {
5068 int ver = (GDTH_VERSION<<8) | GDTH_SUBVERSION;
5069 if (put_user(ver, (int __user *)argp))
5070 return -EFAULT;
5071 break;
5072 }
5073
5074 case GDTIOCTL_OSVERS:
5075 {
5076 gdth_ioctl_osvers osv;
5077
5078 osv.version = (unchar)(LINUX_VERSION_CODE >> 16);
5079 osv.subversion = (unchar)(LINUX_VERSION_CODE >> 8);
5080 osv.revision = (ushort)(LINUX_VERSION_CODE & 0xff);
5081 if (copy_to_user(argp, &osv, sizeof(gdth_ioctl_osvers)))
5082 return -EFAULT;
5083 break;
5084 }
5085
5086 case GDTIOCTL_CTRTYPE:
5087 {
5088 gdth_ioctl_ctrtype ctrt;
5089
5090 if (copy_from_user(&ctrt, argp, sizeof(gdth_ioctl_ctrtype)) ||
5091 ctrt.ionode >= gdth_ctr_count)
5092 return -EFAULT;
5093 ha = HADATA(gdth_ctr_tab[ctrt.ionode]);
5094 if (ha->type == GDT_ISA || ha->type == GDT_EISA) {
5095 ctrt.type = (unchar)((ha->stype>>20) - 0x10);
5096 } else {
5097 if (ha->type != GDT_PCIMPR) {
5098 ctrt.type = (unchar)((ha->stype<<4) + 6);
5099 } else {
5100 ctrt.type =
5101 (ha->oem_id == OEM_ID_INTEL ? 0xfd : 0xfe);
5102 if (ha->stype >= 0x300)
Jeff Garzik8e9a8a02007-07-17 05:25:17 -04005103 ctrt.ext_type = 0x6000 | ha->pdev->subsystem_device;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005104 else
5105 ctrt.ext_type = 0x6000 | ha->stype;
5106 }
Jeff Garzik8e9a8a02007-07-17 05:25:17 -04005107 ctrt.device_id = ha->pdev->device;
5108 ctrt.sub_device_id = ha->pdev->subsystem_device;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005109 }
5110 ctrt.info = ha->brd_phys;
5111 ctrt.oem_id = ha->oem_id;
5112 if (copy_to_user(argp, &ctrt, sizeof(gdth_ioctl_ctrtype)))
5113 return -EFAULT;
5114 break;
5115 }
5116
5117 case GDTIOCTL_GENERAL:
5118 return ioc_general(argp, cmnd);
5119
5120 case GDTIOCTL_EVENT:
5121 return ioc_event(argp);
5122
5123 case GDTIOCTL_LOCKDRV:
5124 return ioc_lockdrv(argp);
5125
5126 case GDTIOCTL_LOCKCHN:
5127 {
5128 gdth_ioctl_lockchn lchn;
5129 unchar i, j;
5130
5131 if (copy_from_user(&lchn, argp, sizeof(gdth_ioctl_lockchn)) ||
5132 lchn.ionode >= gdth_ctr_count)
5133 return -EFAULT;
5134 ha = HADATA(gdth_ctr_tab[lchn.ionode]);
5135
5136 i = lchn.channel;
5137 if (i < ha->bus_cnt) {
5138 if (lchn.lock) {
5139 spin_lock_irqsave(&ha->smp_lock, flags);
5140 ha->raw[i].lock = 1;
5141 spin_unlock_irqrestore(&ha->smp_lock, flags);
5142 for (j = 0; j < ha->tid_cnt; ++j) {
5143 gdth_wait_completion(lchn.ionode, i, j);
5144 gdth_stop_timeout(lchn.ionode, i, j);
5145 }
5146 } else {
5147 spin_lock_irqsave(&ha->smp_lock, flags);
5148 ha->raw[i].lock = 0;
5149 spin_unlock_irqrestore(&ha->smp_lock, flags);
5150 for (j = 0; j < ha->tid_cnt; ++j) {
5151 gdth_start_timeout(lchn.ionode, i, j);
5152 gdth_next(lchn.ionode);
5153 }
5154 }
5155 }
5156 break;
5157 }
5158
5159 case GDTIOCTL_RESCAN:
5160 return ioc_rescan(argp, cmnd);
5161
5162 case GDTIOCTL_HDRLIST:
5163 return ioc_hdrlist(argp, cmnd);
5164
5165 case GDTIOCTL_RESET_BUS:
5166 {
5167 gdth_ioctl_reset res;
5168 int hanum, rval;
5169
5170 if (copy_from_user(&res, argp, sizeof(gdth_ioctl_reset)) ||
5171 res.ionode >= gdth_ctr_count)
5172 return -EFAULT;
5173 hanum = res.ionode;
5174 ha = HADATA(gdth_ctr_tab[hanum]);
5175
Linus Torvalds1da177e2005-04-16 15:20:36 -07005176#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
Mariusz Kozlowskibbfbbbc2007-08-11 10:13:24 +02005177 scp = kzalloc(sizeof(*scp), GFP_KERNEL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005178 if (!scp)
5179 return -ENOMEM;
Leubner, Achimcbd5f692006-06-09 11:34:29 -07005180 scp->device = ha->sdev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005181 scp->cmd_len = 12;
5182 scp->use_sg = 0;
5183 scp->device->channel = virt_ctr ? 0 : res.number;
5184 rval = gdth_eh_bus_reset(scp);
5185 res.status = (rval == SUCCESS ? S_OK : S_GENERR);
Leubner, Achimcbd5f692006-06-09 11:34:29 -07005186 kfree(scp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005187#else
5188 scp = scsi_allocate_device(ha->sdev, 1, FALSE);
5189 if (!scp)
5190 return -ENOMEM;
5191 scp->cmd_len = 12;
5192 scp->use_sg = 0;
5193 scp->channel = virt_ctr ? 0 : res.number;
5194 rval = gdth_eh_bus_reset(scp);
5195 res.status = (rval == SUCCESS ? S_OK : S_GENERR);
5196 scsi_release_command(scp);
5197#endif
5198 if (copy_to_user(argp, &res, sizeof(gdth_ioctl_reset)))
5199 return -EFAULT;
5200 break;
5201 }
5202
5203 case GDTIOCTL_RESET_DRV:
5204 return ioc_resetdrv(argp, cmnd);
5205
5206 default:
5207 break;
5208 }
5209 return 0;
5210}
5211
5212
5213/* flush routine */
5214static void gdth_flush(int hanum)
5215{
5216 int i;
5217 gdth_ha_str *ha;
5218 gdth_cmd_str gdtcmd;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005219 char cmnd[MAX_COMMAND_SIZE];
5220 memset(cmnd, 0xff, MAX_COMMAND_SIZE);
5221
5222 TRACE2(("gdth_flush() hanum %d\n",hanum));
5223 ha = HADATA(gdth_ctr_tab[hanum]);
5224
Linus Torvalds1da177e2005-04-16 15:20:36 -07005225 for (i = 0; i < MAX_HDRIVES; ++i) {
5226 if (ha->hdr[i].present) {
5227 gdtcmd.BoardNode = LOCALBOARD;
5228 gdtcmd.Service = CACHESERVICE;
5229 gdtcmd.OpCode = GDT_FLUSH;
5230 if (ha->cache_feat & GDT_64BIT) {
5231 gdtcmd.u.cache64.DeviceNo = i;
5232 gdtcmd.u.cache64.BlockNo = 1;
5233 gdtcmd.u.cache64.sg_canz = 0;
5234 } else {
5235 gdtcmd.u.cache.DeviceNo = i;
5236 gdtcmd.u.cache.BlockNo = 1;
5237 gdtcmd.u.cache.sg_canz = 0;
5238 }
5239 TRACE2(("gdth_flush(): flush ha %d drive %d\n", hanum, i));
Leubner, Achimcbd5f692006-06-09 11:34:29 -07005240
5241 gdth_execute(gdth_ctr_tab[hanum], &gdtcmd, cmnd, 30, NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005242 }
5243 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07005244}
5245
5246/* shutdown routine */
5247static int gdth_halt(struct notifier_block *nb, ulong event, void *buf)
5248{
5249 int hanum;
5250#ifndef __alpha__
5251 gdth_cmd_str gdtcmd;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005252 char cmnd[MAX_COMMAND_SIZE];
5253#endif
5254
Alan Sterne041c682006-03-27 01:16:30 -08005255 if (notifier_disabled)
Leubner, Achimcbd5f692006-06-09 11:34:29 -07005256 return NOTIFY_OK;
Alan Sterne041c682006-03-27 01:16:30 -08005257
Linus Torvalds1da177e2005-04-16 15:20:36 -07005258 TRACE2(("gdth_halt() event %d\n",(int)event));
5259 if (event != SYS_RESTART && event != SYS_HALT && event != SYS_POWER_OFF)
5260 return NOTIFY_DONE;
5261
Alan Sterne041c682006-03-27 01:16:30 -08005262 notifier_disabled = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005263 printk("GDT-HA: Flushing all host drives .. ");
5264 for (hanum = 0; hanum < gdth_ctr_count; ++hanum) {
5265 gdth_flush(hanum);
5266
5267#ifndef __alpha__
5268 /* controller reset */
5269 memset(cmnd, 0xff, MAX_COMMAND_SIZE);
5270 gdtcmd.BoardNode = LOCALBOARD;
5271 gdtcmd.Service = CACHESERVICE;
5272 gdtcmd.OpCode = GDT_RESET;
5273 TRACE2(("gdth_halt(): reset controller %d\n", hanum));
Leubner, Achimcbd5f692006-06-09 11:34:29 -07005274 gdth_execute(gdth_ctr_tab[hanum], &gdtcmd, cmnd, 10, NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005275#endif
5276 }
5277 printk("Done.\n");
5278
5279#ifdef GDTH_STATISTICS
5280 del_timer(&gdth_timer);
5281#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07005282 return NOTIFY_OK;
5283}
5284
Leubner, Achimcbd5f692006-06-09 11:34:29 -07005285#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
5286/* configure lun */
5287static int gdth_slave_configure(struct scsi_device *sdev)
5288{
5289 scsi_adjust_queue_depth(sdev, 0, sdev->host->cmd_per_lun);
5290 sdev->skip_ms_page_3f = 1;
5291 sdev->skip_ms_page_8 = 1;
5292 return 0;
5293}
5294#endif
5295
5296#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
Christoph Hellwigd0be4a7d2005-10-31 18:31:40 +01005297static struct scsi_host_template driver_template = {
Leubner, Achimcbd5f692006-06-09 11:34:29 -07005298#else
5299static Scsi_Host_Template driver_template = {
5300#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07005301 .proc_name = "gdth",
5302 .proc_info = gdth_proc_info,
5303 .name = "GDT SCSI Disk Array Controller",
5304 .detect = gdth_detect,
5305 .release = gdth_release,
5306 .info = gdth_info,
5307 .queuecommand = gdth_queuecommand,
Linus Torvalds1da177e2005-04-16 15:20:36 -07005308 .eh_bus_reset_handler = gdth_eh_bus_reset,
Linus Torvalds1da177e2005-04-16 15:20:36 -07005309 .bios_param = gdth_bios_param,
5310 .can_queue = GDTH_MAXCMDS,
Leubner, Achimcbd5f692006-06-09 11:34:29 -07005311#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
5312 .slave_configure = gdth_slave_configure,
5313#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07005314 .this_id = -1,
5315 .sg_tablesize = GDTH_MAXSG,
5316 .cmd_per_lun = GDTH_MAXC_P_L,
5317 .unchecked_isa_dma = 1,
5318 .use_clustering = ENABLE_CLUSTERING,
5319#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
5320 .use_new_eh_code = 1,
5321#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,20)
5322 .highmem_io = 1,
5323#endif
5324#endif
5325};
5326
Christoph Hellwigaed91cb2007-10-02 22:48:16 +02005327#ifdef CONFIG_ISA
5328static int gdth_isa_probe_one(struct scsi_host_template *shtp, ulong32 isa_bios)
5329{
5330 struct Scsi_Host *shp;
5331 gdth_ha_str *ha;
5332 dma_addr_t scratch_dma_handle = 0;
5333 int error, hanum, i;
5334 u8 b;
5335
5336 if (!gdth_search_isa(isa_bios))
5337 return -ENXIO;
5338
5339 shp = scsi_register(shtp, sizeof(gdth_ext_str));
5340 if (!shp)
5341 return -ENOMEM;
5342 ha = HADATA(shp);
5343
5344 error = -ENODEV;
5345 if (!gdth_init_isa(isa_bios,ha))
5346 goto out_host_put;
5347
5348 /* controller found and initialized */
5349 printk("Configuring GDT-ISA HA at BIOS 0x%05X IRQ %u DRQ %u\n",
5350 isa_bios, ha->irq, ha->drq);
5351
5352 error = request_irq(ha->irq, gdth_interrupt, IRQF_DISABLED, "gdth", ha);
5353 if (error) {
5354 printk("GDT-ISA: Unable to allocate IRQ\n");
5355 goto out_host_put;
5356 }
5357
5358 error = request_dma(ha->drq, "gdth");
5359 if (error) {
5360 printk("GDT-ISA: Unable to allocate DMA channel\n");
5361 goto out_free_irq;
5362 }
5363
5364 set_dma_mode(ha->drq,DMA_MODE_CASCADE);
5365 enable_dma(ha->drq);
5366 shp->unchecked_isa_dma = 1;
5367 shp->irq = ha->irq;
5368 shp->dma_channel = ha->drq;
5369 hanum = gdth_ctr_count;
5370 gdth_ctr_tab[gdth_ctr_count++] = shp;
5371 gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
5372
5373 NUMDATA(shp)->hanum = (ushort)hanum;
5374 NUMDATA(shp)->busnum= 0;
5375
5376 ha->pccb = CMDDATA(shp);
5377 ha->ccb_phys = 0L;
5378 ha->pdev = NULL;
5379
5380 error = -ENOMEM;
5381
5382 ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH,
5383 &scratch_dma_handle);
5384 if (!ha->pscratch)
5385 goto out_dec_counters;
5386 ha->scratch_phys = scratch_dma_handle;
5387
5388 ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str),
5389 &scratch_dma_handle);
5390 if (!ha->pmsg)
5391 goto out_free_pscratch;
5392 ha->msg_phys = scratch_dma_handle;
5393
5394#ifdef INT_COAL
5395 ha->coal_stat = pci_alloc_consistent(ha->pdev,
5396 sizeof(gdth_coal_status) * MAXOFFSETS,
5397 &scratch_dma_handle);
5398 if (!ha->coal_stat)
5399 goto out_free_pmsg;
5400 ha->coal_stat_phys = scratch_dma_handle;
5401#endif
5402
5403 ha->scratch_busy = FALSE;
5404 ha->req_first = NULL;
5405 ha->tid_cnt = MAX_HDRIVES;
5406 if (max_ids > 0 && max_ids < ha->tid_cnt)
5407 ha->tid_cnt = max_ids;
5408 for (i = 0; i < GDTH_MAXCMDS; ++i)
5409 ha->cmd_tab[i].cmnd = UNUSED_CMND;
5410 ha->scan_mode = rescan ? 0x10 : 0;
5411
5412 error = -ENODEV;
5413 if (!gdth_search_drives(hanum)) {
5414 printk("GDT-ISA: Error during device scan\n");
5415 goto out_free_coal_stat;
5416 }
5417
5418 if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
5419 hdr_channel = ha->bus_cnt;
5420 ha->virt_bus = hdr_channel;
5421
5422 if (ha->cache_feat & ha->raw_feat & ha->screen_feat & GDT_64BIT)
5423 shp->max_cmd_len = 16;
5424
5425 shp->max_id = ha->tid_cnt;
5426 shp->max_lun = MAXLUN;
5427 shp->max_channel = virt_ctr ? 0 : ha->bus_cnt;
5428 if (virt_ctr) {
5429 virt_ctr = 1;
5430 /* register addit. SCSI channels as virtual controllers */
5431 for (b = 1; b < ha->bus_cnt + 1; ++b) {
5432 shp = scsi_register(shtp,sizeof(gdth_num_str));
5433 shp->unchecked_isa_dma = 1;
5434 shp->irq = ha->irq;
5435 shp->dma_channel = ha->drq;
5436 gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
5437 NUMDATA(shp)->hanum = (ushort)hanum;
5438 NUMDATA(shp)->busnum = b;
5439 }
5440 }
5441
5442 spin_lock_init(&ha->smp_lock);
5443 gdth_enable_int(hanum);
5444
5445 return 0;
5446
5447 out_free_coal_stat:
5448#ifdef INT_COAL
5449 pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) * MAXOFFSETS,
5450 ha->coal_stat, ha->coal_stat_phys);
5451 out_free_pmsg:
5452#endif
5453 pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
5454 ha->pmsg, ha->msg_phys);
5455 out_free_pscratch:
5456 pci_free_consistent(ha->pdev, GDTH_SCRATCH,
5457 ha->pscratch, ha->scratch_phys);
5458 out_dec_counters:
5459 gdth_ctr_count--;
5460 gdth_ctr_vcount--;
5461 out_free_irq:
5462 free_irq(ha->irq, ha);
5463 out_host_put:
5464 scsi_unregister(shp);
5465 return error;
5466}
5467#endif /* CONFIG_ISA */
5468
Christoph Hellwig706a5d42007-10-02 22:49:35 +02005469#ifdef CONFIG_EISA
5470static int gdth_eisa_probe_one(struct scsi_host_template *shtp,
5471 ushort eisa_slot)
5472{
5473 struct Scsi_Host *shp;
5474 gdth_ha_str *ha;
5475 dma_addr_t scratch_dma_handle = 0;
5476 int error, hanum, i;
5477 u8 b;
5478
5479 if (!gdth_search_eisa(eisa_slot))
5480 return -ENXIO;
5481
5482 shp = scsi_register(shtp,sizeof(gdth_ext_str));
5483 if (!shp)
5484 return -ENOMEM;
5485 ha = HADATA(shp);
5486
5487 error = -ENODEV;
5488 if (!gdth_init_eisa(eisa_slot,ha))
5489 goto out_host_put;
5490
5491 /* controller found and initialized */
5492 printk("Configuring GDT-EISA HA at Slot %d IRQ %u\n",
5493 eisa_slot >> 12, ha->irq);
5494
5495 error = request_irq(ha->irq, gdth_interrupt, IRQF_DISABLED, "gdth", ha);
5496 if (error) {
5497 printk("GDT-EISA: Unable to allocate IRQ\n");
5498 goto out_host_put;
5499 }
5500
5501 shp->unchecked_isa_dma = 0;
5502 shp->irq = ha->irq;
5503 shp->dma_channel = 0xff;
5504 hanum = gdth_ctr_count;
5505 gdth_ctr_tab[gdth_ctr_count++] = shp;
5506 gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
5507
5508 NUMDATA(shp)->hanum = (ushort)hanum;
5509 NUMDATA(shp)->busnum= 0;
5510 TRACE2(("EISA detect Bus 0: hanum %d\n",
5511 NUMDATA(shp)->hanum));
5512
5513 ha->pccb = CMDDATA(shp);
5514 ha->ccb_phys = 0L;
5515
5516 error = -ENOMEM;
5517
5518 ha->pdev = NULL;
5519 ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH,
5520 &scratch_dma_handle);
5521 if (!ha->pscratch)
5522 goto out_free_irq;
5523 ha->scratch_phys = scratch_dma_handle;
5524
5525 ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str),
5526 &scratch_dma_handle);
5527 if (!ha->pmsg)
5528 goto out_free_pscratch;
5529 ha->msg_phys = scratch_dma_handle;
5530
5531#ifdef INT_COAL
5532 ha->coal_stat = pci_alloc_consistent(ha->pdev,
5533 sizeof(gdth_coal_status) * MAXOFFSETS,
5534 &scratch_dma_handle);
5535 if (!ha->coal_stat)
5536 goto out_free_pmsg;
5537 ha->coal_stat_phys = scratch_dma_handle;
5538#endif
5539
5540 ha->ccb_phys = pci_map_single(ha->pdev,ha->pccb,
5541 sizeof(gdth_cmd_str), PCI_DMA_BIDIRECTIONAL);
5542 if (!ha->ccb_phys)
5543 goto out_free_coal_stat;
5544
5545 ha->scratch_busy = FALSE;
5546 ha->req_first = NULL;
5547 ha->tid_cnt = MAX_HDRIVES;
5548 if (max_ids > 0 && max_ids < ha->tid_cnt)
5549 ha->tid_cnt = max_ids;
5550 for (i = 0; i < GDTH_MAXCMDS; ++i)
5551 ha->cmd_tab[i].cmnd = UNUSED_CMND;
5552 ha->scan_mode = rescan ? 0x10 : 0;
5553
5554 if (!gdth_search_drives(hanum)) {
5555 printk("GDT-EISA: Error during device scan\n");
5556 error = -ENODEV;
5557 goto out_free_ccb_phys;
5558 }
5559
5560 if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
5561 hdr_channel = ha->bus_cnt;
5562 ha->virt_bus = hdr_channel;
5563
5564 if (ha->cache_feat & ha->raw_feat & ha->screen_feat & GDT_64BIT)
5565 shp->max_cmd_len = 16;
5566
5567 shp->max_id = ha->tid_cnt;
5568 shp->max_lun = MAXLUN;
5569 shp->max_channel = virt_ctr ? 0 : ha->bus_cnt;
5570 if (virt_ctr) {
5571 virt_ctr = 1;
5572 /* register addit. SCSI channels as virtual controllers */
5573 for (b = 1; b < ha->bus_cnt + 1; ++b) {
5574 shp = scsi_register(shtp,sizeof(gdth_num_str));
5575 shp->unchecked_isa_dma = 0;
5576 shp->irq = ha->irq;
5577 shp->dma_channel = 0xff;
5578 gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
5579 NUMDATA(shp)->hanum = (ushort)hanum;
5580 NUMDATA(shp)->busnum = b;
5581 }
5582 }
5583
5584 spin_lock_init(&ha->smp_lock);
5585 gdth_enable_int(hanum);
5586 return 0;
5587
5588 out_free_ccb_phys:
5589 pci_unmap_single(ha->pdev,ha->ccb_phys, sizeof(gdth_cmd_str),
5590 PCI_DMA_BIDIRECTIONAL);
5591 out_free_coal_stat:
5592#ifdef INT_COAL
5593 pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) * MAXOFFSETS,
5594 ha->coal_stat, ha->coal_stat_phys);
5595 out_free_pmsg:
5596#endif
5597 pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
5598 ha->pmsg, ha->msg_phys);
5599 out_free_pscratch:
5600 pci_free_consistent(ha->pdev, GDTH_SCRATCH,
5601 ha->pscratch, ha->scratch_phys);
5602 out_free_irq:
5603 free_irq(ha->irq, ha);
5604 gdth_ctr_count--;
5605 gdth_ctr_vcount--;
5606 out_host_put:
5607 scsi_unregister(shp);
5608 return error;
5609}
5610#endif /* CONFIG_EISA */
Christoph Hellwigaed91cb2007-10-02 22:48:16 +02005611
Christoph Hellwig8514ef22007-10-02 22:51:06 +02005612#ifdef CONFIG_PCI
5613static int gdth_pci_probe_one(struct scsi_host_template *shtp,
5614 gdth_pci_str *pcistr, int ctr)
5615{
5616 struct Scsi_Host *shp;
5617 gdth_ha_str *ha;
5618 dma_addr_t scratch_dma_handle = 0;
5619 int error, hanum, i;
5620 u8 b;
5621
5622 shp = scsi_register(shtp,sizeof(gdth_ext_str));
5623 if (!shp)
5624 return -ENOMEM;
5625 ha = HADATA(shp);
5626
5627 error = -ENODEV;
5628 if (!gdth_init_pci(&pcistr[ctr],ha))
5629 goto out_host_put;
5630
5631 /* controller found and initialized */
5632 printk("Configuring GDT-PCI HA at %d/%d IRQ %u\n",
5633 pcistr[ctr].pdev->bus->number,
5634 PCI_SLOT(pcistr[ctr].pdev->devfn),
5635 ha->irq);
5636
5637 error = request_irq(ha->irq, gdth_interrupt,
5638 IRQF_DISABLED|IRQF_SHARED, "gdth", ha);
5639 if (error) {
5640 printk("GDT-PCI: Unable to allocate IRQ\n");
5641 goto out_host_put;
5642 }
5643
5644 shp->unchecked_isa_dma = 0;
5645 shp->irq = ha->irq;
5646 shp->dma_channel = 0xff;
5647 hanum = gdth_ctr_count;
5648 gdth_ctr_tab[gdth_ctr_count++] = shp;
5649 gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
5650
5651 NUMDATA(shp)->hanum = (ushort)hanum;
5652 NUMDATA(shp)->busnum= 0;
5653
5654 ha->pccb = CMDDATA(shp);
5655 ha->ccb_phys = 0L;
5656
5657 error = -ENOMEM;
5658
5659 ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH,
5660 &scratch_dma_handle);
5661 if (!ha->pscratch)
5662 goto out_free_irq;
5663 ha->scratch_phys = scratch_dma_handle;
5664
5665 ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str),
5666 &scratch_dma_handle);
5667 if (!ha->pmsg)
5668 goto out_free_pscratch;
5669 ha->msg_phys = scratch_dma_handle;
5670
5671#ifdef INT_COAL
5672 ha->coal_stat = pci_alloc_consistent(ha->pdev,
5673 sizeof(gdth_coal_status) * MAXOFFSETS,
5674 &scratch_dma_handle);
5675 if (!ha->coal_stat)
5676 goto out_free_pmsg;
5677 ha->coal_stat_phys = scratch_dma_handle;
5678#endif
5679
5680 ha->scratch_busy = FALSE;
5681 ha->req_first = NULL;
5682 ha->tid_cnt = pcistr[ctr].pdev->device >= 0x200 ? MAXID : MAX_HDRIVES;
5683 if (max_ids > 0 && max_ids < ha->tid_cnt)
5684 ha->tid_cnt = max_ids;
5685 for (i = 0; i < GDTH_MAXCMDS; ++i)
5686 ha->cmd_tab[i].cmnd = UNUSED_CMND;
5687 ha->scan_mode = rescan ? 0x10 : 0;
5688
5689 error = -ENODEV;
5690 if (!gdth_search_drives(hanum)) {
5691 printk("GDT-PCI %d: Error during device scan\n", hanum);
5692 goto out_free_coal_stat;
5693 }
5694
5695 if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
5696 hdr_channel = ha->bus_cnt;
5697 ha->virt_bus = hdr_channel;
5698
5699 /* 64-bit DMA only supported from FW >= x.43 */
5700 if (!(ha->cache_feat & ha->raw_feat & ha->screen_feat & GDT_64BIT) ||
5701 !ha->dma64_support) {
5702 if (pci_set_dma_mask(pcistr[ctr].pdev, DMA_32BIT_MASK)) {
5703 printk(KERN_WARNING "GDT-PCI %d: "
5704 "Unable to set 32-bit DMA\n", hanum);
5705 goto out_free_coal_stat;
5706 }
5707 } else {
5708 shp->max_cmd_len = 16;
5709 if (!pci_set_dma_mask(pcistr[ctr].pdev, DMA_64BIT_MASK)) {
5710 printk("GDT-PCI %d: 64-bit DMA enabled\n", hanum);
5711 } else if (pci_set_dma_mask(pcistr[ctr].pdev, DMA_32BIT_MASK)) {
5712 printk(KERN_WARNING "GDT-PCI %d: "
5713 "Unable to set 64/32-bit DMA\n", hanum);
5714 goto out_free_coal_stat;
5715 }
5716 }
5717
5718 shp->max_id = ha->tid_cnt;
5719 shp->max_lun = MAXLUN;
5720 shp->max_channel = virt_ctr ? 0 : ha->bus_cnt;
5721 if (virt_ctr) {
5722 virt_ctr = 1;
5723 /* register addit. SCSI channels as virtual controllers */
5724 for (b = 1; b < ha->bus_cnt + 1; ++b) {
5725 shp = scsi_register(shtp,sizeof(gdth_num_str));
5726 shp->unchecked_isa_dma = 0;
5727 shp->irq = ha->irq;
5728 shp->dma_channel = 0xff;
5729 gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
5730 NUMDATA(shp)->hanum = (ushort)hanum;
5731 NUMDATA(shp)->busnum = b;
5732 }
5733 }
5734
5735 spin_lock_init(&ha->smp_lock);
5736 gdth_enable_int(hanum);
5737 return 0;
5738
5739 out_free_coal_stat:
5740#ifdef INT_COAL
5741 pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) * MAXOFFSETS,
5742 ha->coal_stat, ha->coal_stat_phys);
5743 out_free_pmsg:
5744#endif
5745 pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
5746 ha->pmsg, ha->msg_phys);
5747 out_free_pscratch:
5748 pci_free_consistent(ha->pdev, GDTH_SCRATCH,
5749 ha->pscratch, ha->scratch_phys);
5750 out_free_irq:
5751 free_irq(ha->irq, ha);
5752 gdth_ctr_count--;
5753 gdth_ctr_vcount--;
5754 out_host_put:
5755 scsi_unregister(shp);
5756 return error;
5757}
5758#endif /* CONFIG_PCI */
5759
Linus Torvalds1da177e2005-04-16 15:20:36 -07005760#include "scsi_module.c"
5761#ifndef MODULE
5762__setup("gdth=", option_setup);
5763#endif