| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 |  | 
|  | 2 | /* | 
|  | 3 | * Linux driver for Disk-On-Chip Millennium | 
|  | 4 | * (c) 1999 Machine Vision Holdings, Inc. | 
|  | 5 | * (c) 1999, 2000 David Woodhouse <dwmw2@infradead.org> | 
|  | 6 | * | 
|  | 7 | * $Id: doc2001.c,v 1.48 2005/01/05 18:05:12 dwmw2 Exp $ | 
|  | 8 | */ | 
|  | 9 |  | 
|  | 10 | #include <linux/kernel.h> | 
|  | 11 | #include <linux/module.h> | 
|  | 12 | #include <asm/errno.h> | 
|  | 13 | #include <asm/io.h> | 
|  | 14 | #include <asm/uaccess.h> | 
|  | 15 | #include <linux/miscdevice.h> | 
|  | 16 | #include <linux/pci.h> | 
|  | 17 | #include <linux/delay.h> | 
|  | 18 | #include <linux/slab.h> | 
|  | 19 | #include <linux/sched.h> | 
|  | 20 | #include <linux/init.h> | 
|  | 21 | #include <linux/types.h> | 
|  | 22 | #include <linux/bitops.h> | 
|  | 23 |  | 
|  | 24 | #include <linux/mtd/mtd.h> | 
|  | 25 | #include <linux/mtd/nand.h> | 
|  | 26 | #include <linux/mtd/doc2000.h> | 
|  | 27 |  | 
|  | 28 | /* #define ECC_DEBUG */ | 
|  | 29 |  | 
|  | 30 | /* I have no idea why some DoC chips can not use memcop_form|to_io(). | 
|  | 31 | * This may be due to the different revisions of the ASIC controller built-in or | 
|  | 32 | * simplily a QA/Bug issue. Who knows ?? If you have trouble, please uncomment | 
|  | 33 | * this:*/ | 
|  | 34 | #undef USE_MEMCPY | 
|  | 35 |  | 
|  | 36 | static int doc_read(struct mtd_info *mtd, loff_t from, size_t len, | 
|  | 37 | size_t *retlen, u_char *buf); | 
|  | 38 | static int doc_write(struct mtd_info *mtd, loff_t to, size_t len, | 
|  | 39 | size_t *retlen, const u_char *buf); | 
|  | 40 | static int doc_read_ecc(struct mtd_info *mtd, loff_t from, size_t len, | 
|  | 41 | size_t *retlen, u_char *buf, u_char *eccbuf, | 
|  | 42 | struct nand_oobinfo *oobsel); | 
|  | 43 | static int doc_write_ecc(struct mtd_info *mtd, loff_t to, size_t len, | 
|  | 44 | size_t *retlen, const u_char *buf, u_char *eccbuf, | 
|  | 45 | struct nand_oobinfo *oobsel); | 
|  | 46 | static int doc_read_oob(struct mtd_info *mtd, loff_t ofs, size_t len, | 
|  | 47 | size_t *retlen, u_char *buf); | 
|  | 48 | static int doc_write_oob(struct mtd_info *mtd, loff_t ofs, size_t len, | 
|  | 49 | size_t *retlen, const u_char *buf); | 
|  | 50 | static int doc_erase (struct mtd_info *mtd, struct erase_info *instr); | 
|  | 51 |  | 
|  | 52 | static struct mtd_info *docmillist = NULL; | 
|  | 53 |  | 
|  | 54 | /* Perform the required delay cycles by reading from the NOP register */ | 
|  | 55 | static void DoC_Delay(void __iomem * docptr, unsigned short cycles) | 
|  | 56 | { | 
|  | 57 | volatile char dummy; | 
|  | 58 | int i; | 
|  | 59 |  | 
|  | 60 | for (i = 0; i < cycles; i++) | 
|  | 61 | dummy = ReadDOC(docptr, NOP); | 
|  | 62 | } | 
|  | 63 |  | 
|  | 64 | /* DOC_WaitReady: Wait for RDY line to be asserted by the flash chip */ | 
|  | 65 | static int _DoC_WaitReady(void __iomem * docptr) | 
|  | 66 | { | 
|  | 67 | unsigned short c = 0xffff; | 
|  | 68 |  | 
|  | 69 | DEBUG(MTD_DEBUG_LEVEL3, | 
|  | 70 | "_DoC_WaitReady called for out-of-line wait\n"); | 
|  | 71 |  | 
|  | 72 | /* Out-of-line routine to wait for chip response */ | 
|  | 73 | while (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B) && --c) | 
|  | 74 | ; | 
|  | 75 |  | 
|  | 76 | if (c == 0) | 
|  | 77 | DEBUG(MTD_DEBUG_LEVEL2, "_DoC_WaitReady timed out.\n"); | 
|  | 78 |  | 
|  | 79 | return (c == 0); | 
|  | 80 | } | 
|  | 81 |  | 
|  | 82 | static inline int DoC_WaitReady(void __iomem * docptr) | 
|  | 83 | { | 
|  | 84 | /* This is inline, to optimise the common case, where it's ready instantly */ | 
|  | 85 | int ret = 0; | 
|  | 86 |  | 
|  | 87 | /* 4 read form NOP register should be issued in prior to the read from CDSNControl | 
|  | 88 | see Software Requirement 11.4 item 2. */ | 
|  | 89 | DoC_Delay(docptr, 4); | 
|  | 90 |  | 
|  | 91 | if (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B)) | 
|  | 92 | /* Call the out-of-line routine to wait */ | 
|  | 93 | ret = _DoC_WaitReady(docptr); | 
|  | 94 |  | 
|  | 95 | /* issue 2 read from NOP register after reading from CDSNControl register | 
|  | 96 | see Software Requirement 11.4 item 2. */ | 
|  | 97 | DoC_Delay(docptr, 2); | 
|  | 98 |  | 
|  | 99 | return ret; | 
|  | 100 | } | 
|  | 101 |  | 
|  | 102 | /* DoC_Command: Send a flash command to the flash chip through the CDSN IO register | 
|  | 103 | with the internal pipeline. Each of 4 delay cycles (read from the NOP register) is | 
|  | 104 | required after writing to CDSN Control register, see Software Requirement 11.4 item 3. */ | 
|  | 105 |  | 
|  | 106 | static inline void DoC_Command(void __iomem * docptr, unsigned char command, | 
|  | 107 | unsigned char xtraflags) | 
|  | 108 | { | 
|  | 109 | /* Assert the CLE (Command Latch Enable) line to the flash chip */ | 
|  | 110 | WriteDOC(xtraflags | CDSN_CTRL_CLE | CDSN_CTRL_CE, docptr, CDSNControl); | 
|  | 111 | DoC_Delay(docptr, 4); | 
|  | 112 |  | 
|  | 113 | /* Send the command */ | 
|  | 114 | WriteDOC(command, docptr, Mil_CDSN_IO); | 
|  | 115 | WriteDOC(0x00, docptr, WritePipeTerm); | 
|  | 116 |  | 
|  | 117 | /* Lower the CLE line */ | 
|  | 118 | WriteDOC(xtraflags | CDSN_CTRL_CE, docptr, CDSNControl); | 
|  | 119 | DoC_Delay(docptr, 4); | 
|  | 120 | } | 
|  | 121 |  | 
|  | 122 | /* DoC_Address: Set the current address for the flash chip through the CDSN IO register | 
|  | 123 | with the internal pipeline. Each of 4 delay cycles (read from the NOP register) is | 
|  | 124 | required after writing to CDSN Control register, see Software Requirement 11.4 item 3. */ | 
|  | 125 |  | 
|  | 126 | static inline void DoC_Address(void __iomem * docptr, int numbytes, unsigned long ofs, | 
|  | 127 | unsigned char xtraflags1, unsigned char xtraflags2) | 
|  | 128 | { | 
|  | 129 | /* Assert the ALE (Address Latch Enable) line to the flash chip */ | 
|  | 130 | WriteDOC(xtraflags1 | CDSN_CTRL_ALE | CDSN_CTRL_CE, docptr, CDSNControl); | 
|  | 131 | DoC_Delay(docptr, 4); | 
|  | 132 |  | 
|  | 133 | /* Send the address */ | 
|  | 134 | switch (numbytes) | 
|  | 135 | { | 
|  | 136 | case 1: | 
|  | 137 | /* Send single byte, bits 0-7. */ | 
|  | 138 | WriteDOC(ofs & 0xff, docptr, Mil_CDSN_IO); | 
|  | 139 | WriteDOC(0x00, docptr, WritePipeTerm); | 
|  | 140 | break; | 
|  | 141 | case 2: | 
|  | 142 | /* Send bits 9-16 followed by 17-23 */ | 
|  | 143 | WriteDOC((ofs >> 9)  & 0xff, docptr, Mil_CDSN_IO); | 
|  | 144 | WriteDOC((ofs >> 17) & 0xff, docptr, Mil_CDSN_IO); | 
|  | 145 | WriteDOC(0x00, docptr, WritePipeTerm); | 
|  | 146 | break; | 
|  | 147 | case 3: | 
|  | 148 | /* Send 0-7, 9-16, then 17-23 */ | 
|  | 149 | WriteDOC(ofs & 0xff, docptr, Mil_CDSN_IO); | 
|  | 150 | WriteDOC((ofs >> 9)  & 0xff, docptr, Mil_CDSN_IO); | 
|  | 151 | WriteDOC((ofs >> 17) & 0xff, docptr, Mil_CDSN_IO); | 
|  | 152 | WriteDOC(0x00, docptr, WritePipeTerm); | 
|  | 153 | break; | 
|  | 154 | default: | 
|  | 155 | return; | 
|  | 156 | } | 
|  | 157 |  | 
|  | 158 | /* Lower the ALE line */ | 
|  | 159 | WriteDOC(xtraflags1 | xtraflags2 | CDSN_CTRL_CE, docptr, CDSNControl); | 
|  | 160 | DoC_Delay(docptr, 4); | 
|  | 161 | } | 
|  | 162 |  | 
|  | 163 | /* DoC_SelectChip: Select a given flash chip within the current floor */ | 
|  | 164 | static int DoC_SelectChip(void __iomem * docptr, int chip) | 
|  | 165 | { | 
|  | 166 | /* Select the individual flash chip requested */ | 
|  | 167 | WriteDOC(chip, docptr, CDSNDeviceSelect); | 
|  | 168 | DoC_Delay(docptr, 4); | 
|  | 169 |  | 
|  | 170 | /* Wait for it to be ready */ | 
|  | 171 | return DoC_WaitReady(docptr); | 
|  | 172 | } | 
|  | 173 |  | 
|  | 174 | /* DoC_SelectFloor: Select a given floor (bank of flash chips) */ | 
|  | 175 | static int DoC_SelectFloor(void __iomem * docptr, int floor) | 
|  | 176 | { | 
|  | 177 | /* Select the floor (bank) of chips required */ | 
|  | 178 | WriteDOC(floor, docptr, FloorSelect); | 
|  | 179 |  | 
|  | 180 | /* Wait for the chip to be ready */ | 
|  | 181 | return DoC_WaitReady(docptr); | 
|  | 182 | } | 
|  | 183 |  | 
|  | 184 | /* DoC_IdentChip: Identify a given NAND chip given {floor,chip} */ | 
|  | 185 | static int DoC_IdentChip(struct DiskOnChip *doc, int floor, int chip) | 
|  | 186 | { | 
|  | 187 | int mfr, id, i, j; | 
|  | 188 | volatile char dummy; | 
|  | 189 |  | 
|  | 190 | /* Page in the required floor/chip | 
|  | 191 | FIXME: is this supported by Millennium ?? */ | 
|  | 192 | DoC_SelectFloor(doc->virtadr, floor); | 
|  | 193 | DoC_SelectChip(doc->virtadr, chip); | 
|  | 194 |  | 
|  | 195 | /* Reset the chip, see Software Requirement 11.4 item 1. */ | 
|  | 196 | DoC_Command(doc->virtadr, NAND_CMD_RESET, CDSN_CTRL_WP); | 
|  | 197 | DoC_WaitReady(doc->virtadr); | 
|  | 198 |  | 
|  | 199 | /* Read the NAND chip ID: 1. Send ReadID command */ | 
|  | 200 | DoC_Command(doc->virtadr, NAND_CMD_READID, CDSN_CTRL_WP); | 
|  | 201 |  | 
|  | 202 | /* Read the NAND chip ID: 2. Send address byte zero */ | 
|  | 203 | DoC_Address(doc->virtadr, 1, 0x00, CDSN_CTRL_WP, 0x00); | 
|  | 204 |  | 
|  | 205 | /* Read the manufacturer and device id codes of the flash device through | 
|  | 206 | CDSN IO register see Software Requirement 11.4 item 5.*/ | 
|  | 207 | dummy = ReadDOC(doc->virtadr, ReadPipeInit); | 
|  | 208 | DoC_Delay(doc->virtadr, 2); | 
|  | 209 | mfr = ReadDOC(doc->virtadr, Mil_CDSN_IO); | 
|  | 210 |  | 
|  | 211 | DoC_Delay(doc->virtadr, 2); | 
|  | 212 | id  = ReadDOC(doc->virtadr, Mil_CDSN_IO); | 
|  | 213 | dummy = ReadDOC(doc->virtadr, LastDataRead); | 
|  | 214 |  | 
|  | 215 | /* No response - return failure */ | 
|  | 216 | if (mfr == 0xff || mfr == 0) | 
|  | 217 | return 0; | 
|  | 218 |  | 
|  | 219 | /* FIXME: to deal with multi-flash on multi-Millennium case more carefully */ | 
|  | 220 | for (i = 0; nand_flash_ids[i].name != NULL; i++) { | 
|  | 221 | if ( id == nand_flash_ids[i].id) { | 
|  | 222 | /* Try to identify manufacturer */ | 
|  | 223 | for (j = 0; nand_manuf_ids[j].id != 0x0; j++) { | 
|  | 224 | if (nand_manuf_ids[j].id == mfr) | 
|  | 225 | break; | 
|  | 226 | } | 
|  | 227 | printk(KERN_INFO "Flash chip found: Manufacturer ID: %2.2X, " | 
|  | 228 | "Chip ID: %2.2X (%s:%s)\n", | 
|  | 229 | mfr, id, nand_manuf_ids[j].name, nand_flash_ids[i].name); | 
|  | 230 | doc->mfr = mfr; | 
|  | 231 | doc->id = id; | 
|  | 232 | doc->chipshift = ffs((nand_flash_ids[i].chipsize << 20)) - 1; | 
|  | 233 | break; | 
|  | 234 | } | 
|  | 235 | } | 
|  | 236 |  | 
|  | 237 | if (nand_flash_ids[i].name == NULL) | 
|  | 238 | return 0; | 
|  | 239 | else | 
|  | 240 | return 1; | 
|  | 241 | } | 
|  | 242 |  | 
|  | 243 | /* DoC_ScanChips: Find all NAND chips present in a DiskOnChip, and identify them */ | 
|  | 244 | static void DoC_ScanChips(struct DiskOnChip *this) | 
|  | 245 | { | 
|  | 246 | int floor, chip; | 
|  | 247 | int numchips[MAX_FLOORS_MIL]; | 
|  | 248 | int ret; | 
|  | 249 |  | 
|  | 250 | this->numchips = 0; | 
|  | 251 | this->mfr = 0; | 
|  | 252 | this->id = 0; | 
|  | 253 |  | 
|  | 254 | /* For each floor, find the number of valid chips it contains */ | 
|  | 255 | for (floor = 0,ret = 1; floor < MAX_FLOORS_MIL; floor++) { | 
|  | 256 | numchips[floor] = 0; | 
|  | 257 | for (chip = 0; chip < MAX_CHIPS_MIL && ret != 0; chip++) { | 
|  | 258 | ret = DoC_IdentChip(this, floor, chip); | 
|  | 259 | if (ret) { | 
|  | 260 | numchips[floor]++; | 
|  | 261 | this->numchips++; | 
|  | 262 | } | 
|  | 263 | } | 
|  | 264 | } | 
|  | 265 | /* If there are none at all that we recognise, bail */ | 
|  | 266 | if (!this->numchips) { | 
|  | 267 | printk("No flash chips recognised.\n"); | 
|  | 268 | return; | 
|  | 269 | } | 
|  | 270 |  | 
|  | 271 | /* Allocate an array to hold the information for each chip */ | 
|  | 272 | this->chips = kmalloc(sizeof(struct Nand) * this->numchips, GFP_KERNEL); | 
|  | 273 | if (!this->chips){ | 
|  | 274 | printk("No memory for allocating chip info structures\n"); | 
|  | 275 | return; | 
|  | 276 | } | 
|  | 277 |  | 
|  | 278 | /* Fill out the chip array with {floor, chipno} for each | 
|  | 279 | * detected chip in the device. */ | 
|  | 280 | for (floor = 0, ret = 0; floor < MAX_FLOORS_MIL; floor++) { | 
|  | 281 | for (chip = 0 ; chip < numchips[floor] ; chip++) { | 
|  | 282 | this->chips[ret].floor = floor; | 
|  | 283 | this->chips[ret].chip = chip; | 
|  | 284 | this->chips[ret].curadr = 0; | 
|  | 285 | this->chips[ret].curmode = 0x50; | 
|  | 286 | ret++; | 
|  | 287 | } | 
|  | 288 | } | 
|  | 289 |  | 
|  | 290 | /* Calculate and print the total size of the device */ | 
|  | 291 | this->totlen = this->numchips * (1 << this->chipshift); | 
|  | 292 | printk(KERN_INFO "%d flash chips found. Total DiskOnChip size: %ld MiB\n", | 
|  | 293 | this->numchips ,this->totlen >> 20); | 
|  | 294 | } | 
|  | 295 |  | 
|  | 296 | static int DoCMil_is_alias(struct DiskOnChip *doc1, struct DiskOnChip *doc2) | 
|  | 297 | { | 
|  | 298 | int tmp1, tmp2, retval; | 
|  | 299 |  | 
|  | 300 | if (doc1->physadr == doc2->physadr) | 
|  | 301 | return 1; | 
|  | 302 |  | 
|  | 303 | /* Use the alias resolution register which was set aside for this | 
|  | 304 | * purpose. If it's value is the same on both chips, they might | 
|  | 305 | * be the same chip, and we write to one and check for a change in | 
|  | 306 | * the other. It's unclear if this register is usuable in the | 
|  | 307 | * DoC 2000 (it's in the Millenium docs), but it seems to work. */ | 
|  | 308 | tmp1 = ReadDOC(doc1->virtadr, AliasResolution); | 
|  | 309 | tmp2 = ReadDOC(doc2->virtadr, AliasResolution); | 
|  | 310 | if (tmp1 != tmp2) | 
|  | 311 | return 0; | 
|  | 312 |  | 
|  | 313 | WriteDOC((tmp1+1) % 0xff, doc1->virtadr, AliasResolution); | 
|  | 314 | tmp2 = ReadDOC(doc2->virtadr, AliasResolution); | 
|  | 315 | if (tmp2 == (tmp1+1) % 0xff) | 
|  | 316 | retval = 1; | 
|  | 317 | else | 
|  | 318 | retval = 0; | 
|  | 319 |  | 
|  | 320 | /* Restore register contents.  May not be necessary, but do it just to | 
|  | 321 | * be safe. */ | 
|  | 322 | WriteDOC(tmp1, doc1->virtadr, AliasResolution); | 
|  | 323 |  | 
|  | 324 | return retval; | 
|  | 325 | } | 
|  | 326 |  | 
|  | 327 | static const char im_name[] = "DoCMil_init"; | 
|  | 328 |  | 
|  | 329 | /* This routine is made available to other mtd code via | 
|  | 330 | * inter_module_register.  It must only be accessed through | 
|  | 331 | * inter_module_get which will bump the use count of this module.  The | 
|  | 332 | * addresses passed back in mtd are valid as long as the use count of | 
|  | 333 | * this module is non-zero, i.e. between inter_module_get and | 
|  | 334 | * inter_module_put.  Keith Owens <kaos@ocs.com.au> 29 Oct 2000. | 
|  | 335 | */ | 
|  | 336 | static void DoCMil_init(struct mtd_info *mtd) | 
|  | 337 | { | 
|  | 338 | struct DiskOnChip *this = mtd->priv; | 
|  | 339 | struct DiskOnChip *old = NULL; | 
|  | 340 |  | 
|  | 341 | /* We must avoid being called twice for the same device. */ | 
|  | 342 | if (docmillist) | 
|  | 343 | old = docmillist->priv; | 
|  | 344 |  | 
|  | 345 | while (old) { | 
|  | 346 | if (DoCMil_is_alias(this, old)) { | 
|  | 347 | printk(KERN_NOTICE "Ignoring DiskOnChip Millennium at " | 
|  | 348 | "0x%lX - already configured\n", this->physadr); | 
|  | 349 | iounmap(this->virtadr); | 
|  | 350 | kfree(mtd); | 
|  | 351 | return; | 
|  | 352 | } | 
|  | 353 | if (old->nextdoc) | 
|  | 354 | old = old->nextdoc->priv; | 
|  | 355 | else | 
|  | 356 | old = NULL; | 
|  | 357 | } | 
|  | 358 |  | 
|  | 359 | mtd->name = "DiskOnChip Millennium"; | 
|  | 360 | printk(KERN_NOTICE "DiskOnChip Millennium found at address 0x%lX\n", | 
|  | 361 | this->physadr); | 
|  | 362 |  | 
|  | 363 | mtd->type = MTD_NANDFLASH; | 
|  | 364 | mtd->flags = MTD_CAP_NANDFLASH; | 
|  | 365 | mtd->ecctype = MTD_ECC_RS_DiskOnChip; | 
|  | 366 | mtd->size = 0; | 
|  | 367 |  | 
|  | 368 | /* FIXME: erase size is not always 8KiB */ | 
|  | 369 | mtd->erasesize = 0x2000; | 
|  | 370 |  | 
|  | 371 | mtd->oobblock = 512; | 
|  | 372 | mtd->oobsize = 16; | 
|  | 373 | mtd->owner = THIS_MODULE; | 
|  | 374 | mtd->erase = doc_erase; | 
|  | 375 | mtd->point = NULL; | 
|  | 376 | mtd->unpoint = NULL; | 
|  | 377 | mtd->read = doc_read; | 
|  | 378 | mtd->write = doc_write; | 
|  | 379 | mtd->read_ecc = doc_read_ecc; | 
|  | 380 | mtd->write_ecc = doc_write_ecc; | 
|  | 381 | mtd->read_oob = doc_read_oob; | 
|  | 382 | mtd->write_oob = doc_write_oob; | 
|  | 383 | mtd->sync = NULL; | 
|  | 384 |  | 
|  | 385 | this->totlen = 0; | 
|  | 386 | this->numchips = 0; | 
|  | 387 | this->curfloor = -1; | 
|  | 388 | this->curchip = -1; | 
|  | 389 |  | 
|  | 390 | /* Ident all the chips present. */ | 
|  | 391 | DoC_ScanChips(this); | 
|  | 392 |  | 
|  | 393 | if (!this->totlen) { | 
|  | 394 | kfree(mtd); | 
|  | 395 | iounmap(this->virtadr); | 
|  | 396 | } else { | 
|  | 397 | this->nextdoc = docmillist; | 
|  | 398 | docmillist = mtd; | 
|  | 399 | mtd->size  = this->totlen; | 
|  | 400 | add_mtd_device(mtd); | 
|  | 401 | return; | 
|  | 402 | } | 
|  | 403 | } | 
|  | 404 |  | 
|  | 405 | static int doc_read (struct mtd_info *mtd, loff_t from, size_t len, | 
|  | 406 | size_t *retlen, u_char *buf) | 
|  | 407 | { | 
|  | 408 | /* Just a special case of doc_read_ecc */ | 
|  | 409 | return doc_read_ecc(mtd, from, len, retlen, buf, NULL, NULL); | 
|  | 410 | } | 
|  | 411 |  | 
|  | 412 | static int doc_read_ecc (struct mtd_info *mtd, loff_t from, size_t len, | 
|  | 413 | size_t *retlen, u_char *buf, u_char *eccbuf, | 
|  | 414 | struct nand_oobinfo *oobsel) | 
|  | 415 | { | 
|  | 416 | int i, ret; | 
|  | 417 | volatile char dummy; | 
|  | 418 | unsigned char syndrome[6]; | 
|  | 419 | struct DiskOnChip *this = mtd->priv; | 
|  | 420 | void __iomem *docptr = this->virtadr; | 
|  | 421 | struct Nand *mychip = &this->chips[from >> (this->chipshift)]; | 
|  | 422 |  | 
|  | 423 | /* Don't allow read past end of device */ | 
|  | 424 | if (from >= this->totlen) | 
|  | 425 | return -EINVAL; | 
|  | 426 |  | 
|  | 427 | /* Don't allow a single read to cross a 512-byte block boundary */ | 
|  | 428 | if (from + len > ((from | 0x1ff) + 1)) | 
|  | 429 | len = ((from | 0x1ff) + 1) - from; | 
|  | 430 |  | 
|  | 431 | /* Find the chip which is to be used and select it */ | 
|  | 432 | if (this->curfloor != mychip->floor) { | 
|  | 433 | DoC_SelectFloor(docptr, mychip->floor); | 
|  | 434 | DoC_SelectChip(docptr, mychip->chip); | 
|  | 435 | } else if (this->curchip != mychip->chip) { | 
|  | 436 | DoC_SelectChip(docptr, mychip->chip); | 
|  | 437 | } | 
|  | 438 | this->curfloor = mychip->floor; | 
|  | 439 | this->curchip = mychip->chip; | 
|  | 440 |  | 
|  | 441 | /* issue the Read0 or Read1 command depend on which half of the page | 
|  | 442 | we are accessing. Polling the Flash Ready bit after issue 3 bytes | 
|  | 443 | address in Sequence Read Mode, see Software Requirement 11.4 item 1.*/ | 
|  | 444 | DoC_Command(docptr, (from >> 8) & 1, CDSN_CTRL_WP); | 
|  | 445 | DoC_Address(docptr, 3, from, CDSN_CTRL_WP, 0x00); | 
|  | 446 | DoC_WaitReady(docptr); | 
|  | 447 |  | 
|  | 448 | if (eccbuf) { | 
|  | 449 | /* init the ECC engine, see Reed-Solomon EDC/ECC 11.1 .*/ | 
|  | 450 | WriteDOC (DOC_ECC_RESET, docptr, ECCConf); | 
|  | 451 | WriteDOC (DOC_ECC_EN, docptr, ECCConf); | 
|  | 452 | } else { | 
|  | 453 | /* disable the ECC engine */ | 
|  | 454 | WriteDOC (DOC_ECC_RESET, docptr, ECCConf); | 
|  | 455 | WriteDOC (DOC_ECC_DIS, docptr, ECCConf); | 
|  | 456 | } | 
|  | 457 |  | 
|  | 458 | /* Read the data via the internal pipeline through CDSN IO register, | 
|  | 459 | see Pipelined Read Operations 11.3 */ | 
|  | 460 | dummy = ReadDOC(docptr, ReadPipeInit); | 
|  | 461 | #ifndef USE_MEMCPY | 
|  | 462 | for (i = 0; i < len-1; i++) { | 
|  | 463 | /* N.B. you have to increase the source address in this way or the | 
|  | 464 | ECC logic will not work properly */ | 
|  | 465 | buf[i] = ReadDOC(docptr, Mil_CDSN_IO + (i & 0xff)); | 
|  | 466 | } | 
|  | 467 | #else | 
|  | 468 | memcpy_fromio(buf, docptr + DoC_Mil_CDSN_IO, len - 1); | 
|  | 469 | #endif | 
|  | 470 | buf[len - 1] = ReadDOC(docptr, LastDataRead); | 
|  | 471 |  | 
|  | 472 | /* Let the caller know we completed it */ | 
|  | 473 | *retlen = len; | 
|  | 474 | ret = 0; | 
|  | 475 |  | 
|  | 476 | if (eccbuf) { | 
|  | 477 | /* Read the ECC data from Spare Data Area, | 
|  | 478 | see Reed-Solomon EDC/ECC 11.1 */ | 
|  | 479 | dummy = ReadDOC(docptr, ReadPipeInit); | 
|  | 480 | #ifndef USE_MEMCPY | 
|  | 481 | for (i = 0; i < 5; i++) { | 
|  | 482 | /* N.B. you have to increase the source address in this way or the | 
|  | 483 | ECC logic will not work properly */ | 
|  | 484 | eccbuf[i] = ReadDOC(docptr, Mil_CDSN_IO + i); | 
|  | 485 | } | 
|  | 486 | #else | 
|  | 487 | memcpy_fromio(eccbuf, docptr + DoC_Mil_CDSN_IO, 5); | 
|  | 488 | #endif | 
|  | 489 | eccbuf[5] = ReadDOC(docptr, LastDataRead); | 
|  | 490 |  | 
|  | 491 | /* Flush the pipeline */ | 
|  | 492 | dummy = ReadDOC(docptr, ECCConf); | 
|  | 493 | dummy = ReadDOC(docptr, ECCConf); | 
|  | 494 |  | 
|  | 495 | /* Check the ECC Status */ | 
|  | 496 | if (ReadDOC(docptr, ECCConf) & 0x80) { | 
|  | 497 | int nb_errors; | 
|  | 498 | /* There was an ECC error */ | 
|  | 499 | #ifdef ECC_DEBUG | 
|  | 500 | printk("DiskOnChip ECC Error: Read at %lx\n", (long)from); | 
|  | 501 | #endif | 
|  | 502 | /* Read the ECC syndrom through the DiskOnChip ECC logic. | 
|  | 503 | These syndrome will be all ZERO when there is no error */ | 
|  | 504 | for (i = 0; i < 6; i++) { | 
|  | 505 | syndrome[i] = ReadDOC(docptr, ECCSyndrome0 + i); | 
|  | 506 | } | 
|  | 507 | nb_errors = doc_decode_ecc(buf, syndrome); | 
|  | 508 | #ifdef ECC_DEBUG | 
|  | 509 | printk("ECC Errors corrected: %x\n", nb_errors); | 
|  | 510 | #endif | 
|  | 511 | if (nb_errors < 0) { | 
|  | 512 | /* We return error, but have actually done the read. Not that | 
|  | 513 | this can be told to user-space, via sys_read(), but at least | 
|  | 514 | MTD-aware stuff can know about it by checking *retlen */ | 
|  | 515 | ret = -EIO; | 
|  | 516 | } | 
|  | 517 | } | 
|  | 518 |  | 
|  | 519 | #ifdef PSYCHO_DEBUG | 
|  | 520 | printk("ECC DATA at %lx: %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n", | 
|  | 521 | (long)from, eccbuf[0], eccbuf[1], eccbuf[2], eccbuf[3], | 
|  | 522 | eccbuf[4], eccbuf[5]); | 
|  | 523 | #endif | 
|  | 524 |  | 
|  | 525 | /* disable the ECC engine */ | 
|  | 526 | WriteDOC(DOC_ECC_DIS, docptr , ECCConf); | 
|  | 527 | } | 
|  | 528 |  | 
|  | 529 | return ret; | 
|  | 530 | } | 
|  | 531 |  | 
|  | 532 | static int doc_write (struct mtd_info *mtd, loff_t to, size_t len, | 
|  | 533 | size_t *retlen, const u_char *buf) | 
|  | 534 | { | 
|  | 535 | char eccbuf[6]; | 
|  | 536 | return doc_write_ecc(mtd, to, len, retlen, buf, eccbuf, NULL); | 
|  | 537 | } | 
|  | 538 |  | 
|  | 539 | static int doc_write_ecc (struct mtd_info *mtd, loff_t to, size_t len, | 
|  | 540 | size_t *retlen, const u_char *buf, u_char *eccbuf, | 
|  | 541 | struct nand_oobinfo *oobsel) | 
|  | 542 | { | 
|  | 543 | int i,ret = 0; | 
|  | 544 | volatile char dummy; | 
|  | 545 | struct DiskOnChip *this = mtd->priv; | 
|  | 546 | void __iomem *docptr = this->virtadr; | 
|  | 547 | struct Nand *mychip = &this->chips[to >> (this->chipshift)]; | 
|  | 548 |  | 
|  | 549 | /* Don't allow write past end of device */ | 
|  | 550 | if (to >= this->totlen) | 
|  | 551 | return -EINVAL; | 
|  | 552 |  | 
|  | 553 | #if 0 | 
|  | 554 | /* Don't allow a single write to cross a 512-byte block boundary */ | 
|  | 555 | if (to + len > ( (to | 0x1ff) + 1)) | 
|  | 556 | len = ((to | 0x1ff) + 1) - to; | 
|  | 557 | #else | 
|  | 558 | /* Don't allow writes which aren't exactly one block */ | 
|  | 559 | if (to & 0x1ff || len != 0x200) | 
|  | 560 | return -EINVAL; | 
|  | 561 | #endif | 
|  | 562 |  | 
|  | 563 | /* Find the chip which is to be used and select it */ | 
|  | 564 | if (this->curfloor != mychip->floor) { | 
|  | 565 | DoC_SelectFloor(docptr, mychip->floor); | 
|  | 566 | DoC_SelectChip(docptr, mychip->chip); | 
|  | 567 | } else if (this->curchip != mychip->chip) { | 
|  | 568 | DoC_SelectChip(docptr, mychip->chip); | 
|  | 569 | } | 
|  | 570 | this->curfloor = mychip->floor; | 
|  | 571 | this->curchip = mychip->chip; | 
|  | 572 |  | 
|  | 573 | /* Reset the chip, see Software Requirement 11.4 item 1. */ | 
|  | 574 | DoC_Command(docptr, NAND_CMD_RESET, 0x00); | 
|  | 575 | DoC_WaitReady(docptr); | 
|  | 576 | /* Set device to main plane of flash */ | 
|  | 577 | DoC_Command(docptr, NAND_CMD_READ0, 0x00); | 
|  | 578 |  | 
|  | 579 | /* issue the Serial Data In command to initial the Page Program process */ | 
|  | 580 | DoC_Command(docptr, NAND_CMD_SEQIN, 0x00); | 
|  | 581 | DoC_Address(docptr, 3, to, 0x00, 0x00); | 
|  | 582 | DoC_WaitReady(docptr); | 
|  | 583 |  | 
|  | 584 | if (eccbuf) { | 
|  | 585 | /* init the ECC engine, see Reed-Solomon EDC/ECC 11.1 .*/ | 
|  | 586 | WriteDOC (DOC_ECC_RESET, docptr, ECCConf); | 
|  | 587 | WriteDOC (DOC_ECC_EN | DOC_ECC_RW, docptr, ECCConf); | 
|  | 588 | } else { | 
|  | 589 | /* disable the ECC engine */ | 
|  | 590 | WriteDOC (DOC_ECC_RESET, docptr, ECCConf); | 
|  | 591 | WriteDOC (DOC_ECC_DIS, docptr, ECCConf); | 
|  | 592 | } | 
|  | 593 |  | 
|  | 594 | /* Write the data via the internal pipeline through CDSN IO register, | 
|  | 595 | see Pipelined Write Operations 11.2 */ | 
|  | 596 | #ifndef USE_MEMCPY | 
|  | 597 | for (i = 0; i < len; i++) { | 
|  | 598 | /* N.B. you have to increase the source address in this way or the | 
|  | 599 | ECC logic will not work properly */ | 
|  | 600 | WriteDOC(buf[i], docptr, Mil_CDSN_IO + i); | 
|  | 601 | } | 
|  | 602 | #else | 
|  | 603 | memcpy_toio(docptr + DoC_Mil_CDSN_IO, buf, len); | 
|  | 604 | #endif | 
|  | 605 | WriteDOC(0x00, docptr, WritePipeTerm); | 
|  | 606 |  | 
|  | 607 | if (eccbuf) { | 
|  | 608 | /* Write ECC data to flash, the ECC info is generated by the DiskOnChip ECC logic | 
|  | 609 | see Reed-Solomon EDC/ECC 11.1 */ | 
|  | 610 | WriteDOC(0, docptr, NOP); | 
|  | 611 | WriteDOC(0, docptr, NOP); | 
|  | 612 | WriteDOC(0, docptr, NOP); | 
|  | 613 |  | 
|  | 614 | /* Read the ECC data through the DiskOnChip ECC logic */ | 
|  | 615 | for (i = 0; i < 6; i++) { | 
|  | 616 | eccbuf[i] = ReadDOC(docptr, ECCSyndrome0 + i); | 
|  | 617 | } | 
|  | 618 |  | 
|  | 619 | /* ignore the ECC engine */ | 
|  | 620 | WriteDOC(DOC_ECC_DIS, docptr , ECCConf); | 
|  | 621 |  | 
|  | 622 | #ifndef USE_MEMCPY | 
|  | 623 | /* Write the ECC data to flash */ | 
|  | 624 | for (i = 0; i < 6; i++) { | 
|  | 625 | /* N.B. you have to increase the source address in this way or the | 
|  | 626 | ECC logic will not work properly */ | 
|  | 627 | WriteDOC(eccbuf[i], docptr, Mil_CDSN_IO + i); | 
|  | 628 | } | 
|  | 629 | #else | 
|  | 630 | memcpy_toio(docptr + DoC_Mil_CDSN_IO, eccbuf, 6); | 
|  | 631 | #endif | 
|  | 632 |  | 
|  | 633 | /* write the block status BLOCK_USED (0x5555) at the end of ECC data | 
|  | 634 | FIXME: this is only a hack for programming the IPL area for LinuxBIOS | 
|  | 635 | and should be replace with proper codes in user space utilities */ | 
|  | 636 | WriteDOC(0x55, docptr, Mil_CDSN_IO); | 
|  | 637 | WriteDOC(0x55, docptr, Mil_CDSN_IO + 1); | 
|  | 638 |  | 
|  | 639 | WriteDOC(0x00, docptr, WritePipeTerm); | 
|  | 640 |  | 
|  | 641 | #ifdef PSYCHO_DEBUG | 
|  | 642 | printk("OOB data at %lx is %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n", | 
|  | 643 | (long) to, eccbuf[0], eccbuf[1], eccbuf[2], eccbuf[3], | 
|  | 644 | eccbuf[4], eccbuf[5]); | 
|  | 645 | #endif | 
|  | 646 | } | 
|  | 647 |  | 
|  | 648 | /* Commit the Page Program command and wait for ready | 
|  | 649 | see Software Requirement 11.4 item 1.*/ | 
|  | 650 | DoC_Command(docptr, NAND_CMD_PAGEPROG, 0x00); | 
|  | 651 | DoC_WaitReady(docptr); | 
|  | 652 |  | 
|  | 653 | /* Read the status of the flash device through CDSN IO register | 
|  | 654 | see Software Requirement 11.4 item 5.*/ | 
|  | 655 | DoC_Command(docptr, NAND_CMD_STATUS, CDSN_CTRL_WP); | 
|  | 656 | dummy = ReadDOC(docptr, ReadPipeInit); | 
|  | 657 | DoC_Delay(docptr, 2); | 
|  | 658 | if (ReadDOC(docptr, Mil_CDSN_IO) & 1) { | 
|  | 659 | printk("Error programming flash\n"); | 
|  | 660 | /* Error in programming | 
|  | 661 | FIXME: implement Bad Block Replacement (in nftl.c ??) */ | 
|  | 662 | *retlen = 0; | 
|  | 663 | ret = -EIO; | 
|  | 664 | } | 
|  | 665 | dummy = ReadDOC(docptr, LastDataRead); | 
|  | 666 |  | 
|  | 667 | /* Let the caller know we completed it */ | 
|  | 668 | *retlen = len; | 
|  | 669 |  | 
|  | 670 | return ret; | 
|  | 671 | } | 
|  | 672 |  | 
|  | 673 | static int doc_read_oob(struct mtd_info *mtd, loff_t ofs, size_t len, | 
|  | 674 | size_t *retlen, u_char *buf) | 
|  | 675 | { | 
|  | 676 | #ifndef USE_MEMCPY | 
|  | 677 | int i; | 
|  | 678 | #endif | 
|  | 679 | volatile char dummy; | 
|  | 680 | struct DiskOnChip *this = mtd->priv; | 
|  | 681 | void __iomem *docptr = this->virtadr; | 
|  | 682 | struct Nand *mychip = &this->chips[ofs >> this->chipshift]; | 
|  | 683 |  | 
|  | 684 | /* Find the chip which is to be used and select it */ | 
|  | 685 | if (this->curfloor != mychip->floor) { | 
|  | 686 | DoC_SelectFloor(docptr, mychip->floor); | 
|  | 687 | DoC_SelectChip(docptr, mychip->chip); | 
|  | 688 | } else if (this->curchip != mychip->chip) { | 
|  | 689 | DoC_SelectChip(docptr, mychip->chip); | 
|  | 690 | } | 
|  | 691 | this->curfloor = mychip->floor; | 
|  | 692 | this->curchip = mychip->chip; | 
|  | 693 |  | 
|  | 694 | /* disable the ECC engine */ | 
|  | 695 | WriteDOC (DOC_ECC_RESET, docptr, ECCConf); | 
|  | 696 | WriteDOC (DOC_ECC_DIS, docptr, ECCConf); | 
|  | 697 |  | 
|  | 698 | /* issue the Read2 command to set the pointer to the Spare Data Area. | 
|  | 699 | Polling the Flash Ready bit after issue 3 bytes address in | 
|  | 700 | Sequence Read Mode, see Software Requirement 11.4 item 1.*/ | 
|  | 701 | DoC_Command(docptr, NAND_CMD_READOOB, CDSN_CTRL_WP); | 
|  | 702 | DoC_Address(docptr, 3, ofs, CDSN_CTRL_WP, 0x00); | 
|  | 703 | DoC_WaitReady(docptr); | 
|  | 704 |  | 
|  | 705 | /* Read the data out via the internal pipeline through CDSN IO register, | 
|  | 706 | see Pipelined Read Operations 11.3 */ | 
|  | 707 | dummy = ReadDOC(docptr, ReadPipeInit); | 
|  | 708 | #ifndef USE_MEMCPY | 
|  | 709 | for (i = 0; i < len-1; i++) { | 
|  | 710 | /* N.B. you have to increase the source address in this way or the | 
|  | 711 | ECC logic will not work properly */ | 
|  | 712 | buf[i] = ReadDOC(docptr, Mil_CDSN_IO + i); | 
|  | 713 | } | 
|  | 714 | #else | 
|  | 715 | memcpy_fromio(buf, docptr + DoC_Mil_CDSN_IO, len - 1); | 
|  | 716 | #endif | 
|  | 717 | buf[len - 1] = ReadDOC(docptr, LastDataRead); | 
|  | 718 |  | 
|  | 719 | *retlen = len; | 
|  | 720 |  | 
|  | 721 | return 0; | 
|  | 722 | } | 
|  | 723 |  | 
|  | 724 | static int doc_write_oob(struct mtd_info *mtd, loff_t ofs, size_t len, | 
|  | 725 | size_t *retlen, const u_char *buf) | 
|  | 726 | { | 
|  | 727 | #ifndef USE_MEMCPY | 
|  | 728 | int i; | 
|  | 729 | #endif | 
|  | 730 | volatile char dummy; | 
|  | 731 | int ret = 0; | 
|  | 732 | struct DiskOnChip *this = mtd->priv; | 
|  | 733 | void __iomem *docptr = this->virtadr; | 
|  | 734 | struct Nand *mychip = &this->chips[ofs >> this->chipshift]; | 
|  | 735 |  | 
|  | 736 | /* Find the chip which is to be used and select it */ | 
|  | 737 | if (this->curfloor != mychip->floor) { | 
|  | 738 | DoC_SelectFloor(docptr, mychip->floor); | 
|  | 739 | DoC_SelectChip(docptr, mychip->chip); | 
|  | 740 | } else if (this->curchip != mychip->chip) { | 
|  | 741 | DoC_SelectChip(docptr, mychip->chip); | 
|  | 742 | } | 
|  | 743 | this->curfloor = mychip->floor; | 
|  | 744 | this->curchip = mychip->chip; | 
|  | 745 |  | 
|  | 746 | /* disable the ECC engine */ | 
|  | 747 | WriteDOC (DOC_ECC_RESET, docptr, ECCConf); | 
|  | 748 | WriteDOC (DOC_ECC_DIS, docptr, ECCConf); | 
|  | 749 |  | 
|  | 750 | /* Reset the chip, see Software Requirement 11.4 item 1. */ | 
|  | 751 | DoC_Command(docptr, NAND_CMD_RESET, CDSN_CTRL_WP); | 
|  | 752 | DoC_WaitReady(docptr); | 
|  | 753 | /* issue the Read2 command to set the pointer to the Spare Data Area. */ | 
|  | 754 | DoC_Command(docptr, NAND_CMD_READOOB, CDSN_CTRL_WP); | 
|  | 755 |  | 
|  | 756 | /* issue the Serial Data In command to initial the Page Program process */ | 
|  | 757 | DoC_Command(docptr, NAND_CMD_SEQIN, 0x00); | 
|  | 758 | DoC_Address(docptr, 3, ofs, 0x00, 0x00); | 
|  | 759 |  | 
|  | 760 | /* Write the data via the internal pipeline through CDSN IO register, | 
|  | 761 | see Pipelined Write Operations 11.2 */ | 
|  | 762 | #ifndef USE_MEMCPY | 
|  | 763 | for (i = 0; i < len; i++) { | 
|  | 764 | /* N.B. you have to increase the source address in this way or the | 
|  | 765 | ECC logic will not work properly */ | 
|  | 766 | WriteDOC(buf[i], docptr, Mil_CDSN_IO + i); | 
|  | 767 | } | 
|  | 768 | #else | 
|  | 769 | memcpy_toio(docptr + DoC_Mil_CDSN_IO, buf, len); | 
|  | 770 | #endif | 
|  | 771 | WriteDOC(0x00, docptr, WritePipeTerm); | 
|  | 772 |  | 
|  | 773 | /* Commit the Page Program command and wait for ready | 
|  | 774 | see Software Requirement 11.4 item 1.*/ | 
|  | 775 | DoC_Command(docptr, NAND_CMD_PAGEPROG, 0x00); | 
|  | 776 | DoC_WaitReady(docptr); | 
|  | 777 |  | 
|  | 778 | /* Read the status of the flash device through CDSN IO register | 
|  | 779 | see Software Requirement 11.4 item 5.*/ | 
|  | 780 | DoC_Command(docptr, NAND_CMD_STATUS, 0x00); | 
|  | 781 | dummy = ReadDOC(docptr, ReadPipeInit); | 
|  | 782 | DoC_Delay(docptr, 2); | 
|  | 783 | if (ReadDOC(docptr, Mil_CDSN_IO) & 1) { | 
|  | 784 | printk("Error programming oob data\n"); | 
|  | 785 | /* FIXME: implement Bad Block Replacement (in nftl.c ??) */ | 
|  | 786 | *retlen = 0; | 
|  | 787 | ret = -EIO; | 
|  | 788 | } | 
|  | 789 | dummy = ReadDOC(docptr, LastDataRead); | 
|  | 790 |  | 
|  | 791 | *retlen = len; | 
|  | 792 |  | 
|  | 793 | return ret; | 
|  | 794 | } | 
|  | 795 |  | 
|  | 796 | int doc_erase (struct mtd_info *mtd, struct erase_info *instr) | 
|  | 797 | { | 
|  | 798 | volatile char dummy; | 
|  | 799 | struct DiskOnChip *this = mtd->priv; | 
|  | 800 | __u32 ofs = instr->addr; | 
|  | 801 | __u32 len = instr->len; | 
|  | 802 | void __iomem *docptr = this->virtadr; | 
|  | 803 | struct Nand *mychip = &this->chips[ofs >> this->chipshift]; | 
|  | 804 |  | 
|  | 805 | if (len != mtd->erasesize) | 
|  | 806 | printk(KERN_WARNING "Erase not right size (%x != %x)n", | 
|  | 807 | len, mtd->erasesize); | 
|  | 808 |  | 
|  | 809 | /* Find the chip which is to be used and select it */ | 
|  | 810 | if (this->curfloor != mychip->floor) { | 
|  | 811 | DoC_SelectFloor(docptr, mychip->floor); | 
|  | 812 | DoC_SelectChip(docptr, mychip->chip); | 
|  | 813 | } else if (this->curchip != mychip->chip) { | 
|  | 814 | DoC_SelectChip(docptr, mychip->chip); | 
|  | 815 | } | 
|  | 816 | this->curfloor = mychip->floor; | 
|  | 817 | this->curchip = mychip->chip; | 
|  | 818 |  | 
|  | 819 | instr->state = MTD_ERASE_PENDING; | 
|  | 820 |  | 
|  | 821 | /* issue the Erase Setup command */ | 
|  | 822 | DoC_Command(docptr, NAND_CMD_ERASE1, 0x00); | 
|  | 823 | DoC_Address(docptr, 2, ofs, 0x00, 0x00); | 
|  | 824 |  | 
|  | 825 | /* Commit the Erase Start command and wait for ready | 
|  | 826 | see Software Requirement 11.4 item 1.*/ | 
|  | 827 | DoC_Command(docptr, NAND_CMD_ERASE2, 0x00); | 
|  | 828 | DoC_WaitReady(docptr); | 
|  | 829 |  | 
|  | 830 | instr->state = MTD_ERASING; | 
|  | 831 |  | 
|  | 832 | /* Read the status of the flash device through CDSN IO register | 
|  | 833 | see Software Requirement 11.4 item 5. | 
|  | 834 | FIXME: it seems that we are not wait long enough, some blocks are not | 
|  | 835 | erased fully */ | 
|  | 836 | DoC_Command(docptr, NAND_CMD_STATUS, CDSN_CTRL_WP); | 
|  | 837 | dummy = ReadDOC(docptr, ReadPipeInit); | 
|  | 838 | DoC_Delay(docptr, 2); | 
|  | 839 | if (ReadDOC(docptr, Mil_CDSN_IO) & 1) { | 
|  | 840 | printk("Error Erasing at 0x%x\n", ofs); | 
|  | 841 | /* There was an error | 
|  | 842 | FIXME: implement Bad Block Replacement (in nftl.c ??) */ | 
|  | 843 | instr->state = MTD_ERASE_FAILED; | 
|  | 844 | } else | 
|  | 845 | instr->state = MTD_ERASE_DONE; | 
|  | 846 | dummy = ReadDOC(docptr, LastDataRead); | 
|  | 847 |  | 
|  | 848 | mtd_erase_callback(instr); | 
|  | 849 |  | 
|  | 850 | return 0; | 
|  | 851 | } | 
|  | 852 |  | 
|  | 853 | /**************************************************************************** | 
|  | 854 | * | 
|  | 855 | * Module stuff | 
|  | 856 | * | 
|  | 857 | ****************************************************************************/ | 
|  | 858 |  | 
|  | 859 | static int __init init_doc2001(void) | 
|  | 860 | { | 
|  | 861 | inter_module_register(im_name, THIS_MODULE, &DoCMil_init); | 
|  | 862 | return 0; | 
|  | 863 | } | 
|  | 864 |  | 
|  | 865 | static void __exit cleanup_doc2001(void) | 
|  | 866 | { | 
|  | 867 | struct mtd_info *mtd; | 
|  | 868 | struct DiskOnChip *this; | 
|  | 869 |  | 
|  | 870 | while ((mtd=docmillist)) { | 
|  | 871 | this = mtd->priv; | 
|  | 872 | docmillist = this->nextdoc; | 
|  | 873 |  | 
|  | 874 | del_mtd_device(mtd); | 
|  | 875 |  | 
|  | 876 | iounmap(this->virtadr); | 
|  | 877 | kfree(this->chips); | 
|  | 878 | kfree(mtd); | 
|  | 879 | } | 
|  | 880 | inter_module_unregister(im_name); | 
|  | 881 | } | 
|  | 882 |  | 
|  | 883 | module_exit(cleanup_doc2001); | 
|  | 884 | module_init(init_doc2001); | 
|  | 885 |  | 
|  | 886 | MODULE_LICENSE("GPL"); | 
|  | 887 | MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org> et al."); | 
|  | 888 | MODULE_DESCRIPTION("Alternative driver for DiskOnChip Millennium"); |