| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* | 
|  | 2 | * SHPCHPRM Legacy: PHP Resource Manager for Non-ACPI/Legacy platform using HRT | 
|  | 3 | * | 
|  | 4 | * Copyright (C) 1995,2001 Compaq Computer Corporation | 
|  | 5 | * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com) | 
|  | 6 | * Copyright (C) 2001 IBM Corp. | 
|  | 7 | * Copyright (C) 2003-2004 Intel Corporation | 
|  | 8 | * | 
|  | 9 | * All rights reserved. | 
|  | 10 | * | 
|  | 11 | * This program is free software; you can redistribute it and/or modify | 
|  | 12 | * it under the terms of the GNU General Public License as published by | 
|  | 13 | * the Free Software Foundation; either version 2 of the License, or (at | 
|  | 14 | * your option) any later version. | 
|  | 15 | * | 
|  | 16 | * This program is distributed in the hope that it will be useful, but | 
|  | 17 | * WITHOUT ANY WARRANTY; without even the implied warranty of | 
|  | 18 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | 
|  | 19 | * NON INFRINGEMENT.  See the GNU General Public License for more | 
|  | 20 | * details. | 
|  | 21 | * | 
|  | 22 | * You should have received a copy of the GNU General Public License | 
|  | 23 | * along with this program; if not, write to the Free Software | 
|  | 24 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | 
|  | 25 | * | 
|  | 26 | * Send feedback to <greg@kroah.com>, <dely.l.sy@intel.com> | 
|  | 27 | * | 
|  | 28 | */ | 
|  | 29 |  | 
|  | 30 | #ifndef _SHPCHPRM_LEGACY_H_ | 
|  | 31 | #define _SHPCHPRM_LEGACY_H_ | 
|  | 32 |  | 
|  | 33 | #define ROM_PHY_ADDR	0x0F0000 | 
|  | 34 | #define ROM_PHY_LEN	0x00FFFF | 
|  | 35 |  | 
|  | 36 | struct slot_rt { | 
|  | 37 | u8 dev_func; | 
|  | 38 | u8 primary_bus; | 
|  | 39 | u8 secondary_bus; | 
|  | 40 | u8 max_bus; | 
|  | 41 | u16 io_base; | 
|  | 42 | u16 io_length; | 
|  | 43 | u16 mem_base; | 
|  | 44 | u16 mem_length; | 
|  | 45 | u16 pre_mem_base; | 
|  | 46 | u16 pre_mem_length; | 
|  | 47 | } __attribute__ ((packed)); | 
|  | 48 |  | 
|  | 49 | /* offsets to the hotplug slot resource table registers based on the above structure layout */ | 
|  | 50 | enum slot_rt_offsets { | 
|  | 51 | DEV_FUNC = offsetof(struct slot_rt, dev_func), | 
|  | 52 | PRIMARY_BUS = offsetof(struct slot_rt, primary_bus), | 
|  | 53 | SECONDARY_BUS = offsetof(struct slot_rt, secondary_bus), | 
|  | 54 | MAX_BUS = offsetof(struct slot_rt, max_bus), | 
|  | 55 | IO_BASE = offsetof(struct slot_rt, io_base), | 
|  | 56 | IO_LENGTH = offsetof(struct slot_rt, io_length), | 
|  | 57 | MEM_BASE = offsetof(struct slot_rt, mem_base), | 
|  | 58 | MEM_LENGTH = offsetof(struct slot_rt, mem_length), | 
|  | 59 | PRE_MEM_BASE = offsetof(struct slot_rt, pre_mem_base), | 
|  | 60 | PRE_MEM_LENGTH = offsetof(struct slot_rt, pre_mem_length), | 
|  | 61 | }; | 
|  | 62 |  | 
|  | 63 | struct hrt { | 
|  | 64 | char sig0; | 
|  | 65 | char sig1; | 
|  | 66 | char sig2; | 
|  | 67 | char sig3; | 
|  | 68 | u16 unused_IRQ; | 
|  | 69 | u16 PCIIRQ; | 
|  | 70 | u8 number_of_entries; | 
|  | 71 | u8 revision; | 
|  | 72 | u16 reserved1; | 
|  | 73 | u32 reserved2; | 
|  | 74 | } __attribute__ ((packed)); | 
|  | 75 |  | 
|  | 76 | /* offsets to the hotplug resource table registers based on the above structure layout */ | 
|  | 77 | enum hrt_offsets { | 
|  | 78 | SIG0 = offsetof(struct hrt, sig0), | 
|  | 79 | SIG1 = offsetof(struct hrt, sig1), | 
|  | 80 | SIG2 = offsetof(struct hrt, sig2), | 
|  | 81 | SIG3 = offsetof(struct hrt, sig3), | 
|  | 82 | UNUSED_IRQ = offsetof(struct hrt, unused_IRQ), | 
|  | 83 | PCIIRQ = offsetof(struct hrt, PCIIRQ), | 
|  | 84 | NUMBER_OF_ENTRIES = offsetof(struct hrt, number_of_entries), | 
|  | 85 | REVISION = offsetof(struct hrt, revision), | 
|  | 86 | HRT_RESERVED1 = offsetof(struct hrt, reserved1), | 
|  | 87 | HRT_RESERVED2 = offsetof(struct hrt, reserved2), | 
|  | 88 | }; | 
|  | 89 |  | 
|  | 90 | struct irq_info { | 
|  | 91 | u8 bus, devfn;		/* bus, device and function */ | 
|  | 92 | struct { | 
|  | 93 | u8 link;	/* IRQ line ID, chipset dependent, 0=not routed */ | 
|  | 94 | u16 bitmap;	/* Available IRQs */ | 
|  | 95 | } __attribute__ ((packed)) irq[4]; | 
|  | 96 | u8 slot;		/* slot number, 0=onboard */ | 
|  | 97 | u8 rfu; | 
|  | 98 | } __attribute__ ((packed)); | 
|  | 99 |  | 
|  | 100 | struct irq_routing_table { | 
|  | 101 | u32 signature;		/* PIRQ_SIGNATURE should be here */ | 
|  | 102 | u16 version;		/* PIRQ_VERSION */ | 
|  | 103 | u16 size;			/* Table size in bytes */ | 
|  | 104 | u8 rtr_bus, rtr_devfn;	/* Where the interrupt router lies */ | 
|  | 105 | u16 exclusive_irqs;	/* IRQs devoted exclusively to PCI usage */ | 
|  | 106 | u16 rtr_vendor, rtr_device;	/* Vendor and device ID of interrupt router */ | 
|  | 107 | u32 miniport_data;	/* Crap */ | 
|  | 108 | u8 rfu[11]; | 
|  | 109 | u8 checksum;		/* Modulo 256 checksum must give zero */ | 
|  | 110 | struct irq_info slots[0]; | 
|  | 111 | } __attribute__ ((packed)); | 
|  | 112 |  | 
|  | 113 | #endif				/* _SHPCHPRM_LEGACY_H_ */ |