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review.evervolv.com / android_kernel_htc_msm8960 / 854af9578cb84e4ca3cb1551a6be40c4e81bb455 / . / include / asm-sh / dma.h
blob: 8e9436093ca826adb2bf7db5df254d8413c0f7cc [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]1/*
2 * include/asm-sh/dma.h
3 *
4 * Copyright (C) 2003, 2004 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#ifndef __ASM_SH_DMA_H
11#define __ASM_SH_DMA_H
12#ifdef __KERNEL__
13
14#include <linux/config.h>
15#include <linux/spinlock.h>
16#include <linux/wait.h>
17#include <linux/sysdev.h>
18#include <asm/cpu/dma.h>
19#include <asm/semaphore.h>
20
21/* The maximum address that we can perform a DMA transfer to on this platform */
22/* Don't define MAX_DMA_ADDRESS; it's useless on the SuperH and any
23 occurrence should be flagged as an error. */
24/* But... */
25/* XXX: This is not applicable to SuperH, just needed for alloc_bootmem */
26#define MAX_DMA_ADDRESS (PAGE_OFFSET+0x10000000)
27
28#ifdef CONFIG_NR_DMA_CHANNELS
29# define MAX_DMA_CHANNELS (CONFIG_NR_DMA_CHANNELS)
30#else
31# define MAX_DMA_CHANNELS (CONFIG_NR_ONCHIP_DMA_CHANNELS)
32#endif
33
34/*
35 * Read and write modes can mean drastically different things depending on the
36 * channel configuration. Consult your DMAC documentation and module
37 * implementation for further clues.
38 */
39#define DMA_MODE_READ 0x00
40#define DMA_MODE_WRITE 0x01
41#define DMA_MODE_MASK 0x01
42
43#define DMA_AUTOINIT 0x10
44
45/*
46 * DMAC (dma_info) flags
47 */
48enum {
49 DMAC_CHANNELS_CONFIGURED = 0x00,
50 DMAC_CHANNELS_TEI_CAPABLE = 0x01,
51};
52
53/*
54 * DMA channel capabilities / flags
55 */
56enum {
57 DMA_CONFIGURED = 0x00,
58 DMA_TEI_CAPABLE = 0x01,
59};
60
61extern spinlock_t dma_spin_lock;
62
63struct dma_channel;
64
65struct dma_ops {
66 int (*request)(struct dma_channel *chan);
67 void (*free)(struct dma_channel *chan);
68
69 int (*get_residue)(struct dma_channel *chan);
70 int (*xfer)(struct dma_channel *chan);
71 void (*configure)(struct dma_channel *chan, unsigned long flags);
72};
73
74struct dma_channel {
75 char dev_id[16];
76
77 unsigned int chan;
78 unsigned int mode;
79 unsigned int count;
80
81 unsigned long sar;
82 unsigned long dar;
83
84 unsigned long flags;
85 atomic_t busy;
86
87 struct semaphore sem;
88 wait_queue_head_t wait_queue;
89
90 struct sys_device dev;
91};
92
93struct dma_info {
94 const char *name;
95 unsigned int nr_channels;
96 unsigned long flags;
97
98 struct dma_ops *ops;
99 struct dma_channel *channels;
100
101 struct list_head list;
102};
103
104#define to_dma_channel(channel) container_of(channel, struct dma_channel, dev)
105
106/* arch/sh/drivers/dma/dma-api.c */
107extern int dma_xfer(unsigned int chan, unsigned long from,
108 unsigned long to, size_t size, unsigned int mode);
109
110#define dma_write(chan, from, to, size) \
111 dma_xfer(chan, from, to, size, DMA_MODE_WRITE)
112#define dma_write_page(chan, from, to) \
113 dma_write(chan, from, to, PAGE_SIZE)
114
115#define dma_read(chan, from, to, size) \
116 dma_xfer(chan, from, to, size, DMA_MODE_READ)
117#define dma_read_page(chan, from, to) \
118 dma_read(chan, from, to, PAGE_SIZE)
119
120extern int request_dma(unsigned int chan, const char *dev_id);
121extern void free_dma(unsigned int chan);
122extern int get_dma_residue(unsigned int chan);
123extern struct dma_info *get_dma_info(unsigned int chan);
124extern struct dma_channel *get_dma_channel(unsigned int chan);
125extern void dma_wait_for_completion(unsigned int chan);
126extern void dma_configure_channel(unsigned int chan, unsigned long flags);
127
128extern int register_dmac(struct dma_info *info);
129extern void unregister_dmac(struct dma_info *info);
130
131#ifdef CONFIG_SYSFS
132/* arch/sh/drivers/dma/dma-sysfs.c */
133extern int dma_create_sysfs_files(struct dma_channel *);
134#endif
135
136#ifdef CONFIG_PCI
137extern int isa_dma_bridge_buggy;
138#else
139#define isa_dma_bridge_buggy (0)
140#endif
141
142#endif /* __KERNEL__ */
143#endif /* __ASM_SH_DMA_H */