blob: 04f596eab749920387a3effaf12459e508d8444b [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* -*- mode: c; c-basic-offset: 8 -*- */
2
3/* Copyright (C) 1999,2001
4 *
5 * Author: J.E.J.Bottomley@HansenPartnership.com
6 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07007 * This file provides all the same external entries as smp.c but uses
8 * the voyager hal to provide the functionality
9 */
James Bottomley153f8052005-07-13 09:38:05 -040010#include <linux/module.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070011#include <linux/mm.h>
12#include <linux/kernel_stat.h>
13#include <linux/delay.h>
14#include <linux/mc146818rtc.h>
15#include <linux/cache.h>
16#include <linux/interrupt.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070017#include <linux/init.h>
18#include <linux/kernel.h>
19#include <linux/bootmem.h>
20#include <linux/completion.h>
21#include <asm/desc.h>
22#include <asm/voyager.h>
23#include <asm/vic.h>
24#include <asm/mtrr.h>
25#include <asm/pgalloc.h>
26#include <asm/tlbflush.h>
27#include <asm/arch_hooks.h>
Pavel Macheke44b7b72008-04-10 23:28:10 +020028#include <asm/trampoline.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070029
Linus Torvalds1da177e2005-04-16 15:20:36 -070030/* TLB state -- visible externally, indexed physically */
James Bottomley0cca1ca2007-10-26 12:17:19 -050031DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate) = { &init_mm, 0 };
Linus Torvalds1da177e2005-04-16 15:20:36 -070032
33/* CPU IRQ affinity -- set to all ones initially */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +010034static unsigned long cpu_irq_affinity[NR_CPUS] __cacheline_aligned =
35 {[0 ... NR_CPUS-1] = ~0UL };
Linus Torvalds1da177e2005-04-16 15:20:36 -070036
37/* per CPU data structure (for /proc/cpuinfo et al), visible externally
38 * indexed physically */
James Bottomley0cca1ca2007-10-26 12:17:19 -050039DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info);
Mike Travis92cb7612007-10-19 20:35:04 +020040EXPORT_PER_CPU_SYMBOL(cpu_info);
Linus Torvalds1da177e2005-04-16 15:20:36 -070041
42/* physical ID of the CPU used to boot the system */
43unsigned char boot_cpu_id;
44
45/* The memory line addresses for the Quad CPIs */
46struct voyager_qic_cpi *voyager_quad_cpi_addr[NR_CPUS] __cacheline_aligned;
47
48/* The masks for the Extended VIC processors, filled in by cat_init */
49__u32 voyager_extended_vic_processors = 0;
50
51/* Masks for the extended Quad processors which cannot be VIC booted */
52__u32 voyager_allowed_boot_processors = 0;
53
54/* The mask for the Quad Processors (both extended and non-extended) */
55__u32 voyager_quad_processors = 0;
56
57/* Total count of live CPUs, used in process.c to display
58 * the CPU information and in irq.c for the per CPU irq
59 * activity count. Finally exported by i386_ksyms.c */
60static int voyager_extended_cpus = 1;
61
62/* Have we found an SMP box - used by time.c to do the profiling
63 interrupt for timeslicing; do not set to 1 until the per CPU timer
64 interrupt is active */
65int smp_found_config = 0;
66
67/* Used for the invalidate map that's also checked in the spinlock */
68static volatile unsigned long smp_invalidate_needed;
69
70/* Bitmask of currently online CPUs - used by setup.c for
71 /proc/cpuinfo, visible externally but still physical */
72cpumask_t cpu_online_map = CPU_MASK_NONE;
James Bottomley153f8052005-07-13 09:38:05 -040073EXPORT_SYMBOL(cpu_online_map);
Linus Torvalds1da177e2005-04-16 15:20:36 -070074
75/* Bitmask of CPUs present in the system - exported by i386_syms.c, used
76 * by scheduler but indexed physically */
77cpumask_t phys_cpu_present_map = CPU_MASK_NONE;
78
Linus Torvalds1da177e2005-04-16 15:20:36 -070079/* The internal functions */
80static void send_CPI(__u32 cpuset, __u8 cpi);
81static void ack_CPI(__u8 cpi);
82static int ack_QIC_CPI(__u8 cpi);
83static void ack_special_QIC_CPI(__u8 cpi);
84static void ack_VIC_CPI(__u8 cpi);
85static void send_CPI_allbutself(__u8 cpi);
James Bottomleyc7717462006-10-12 22:21:16 -050086static void mask_vic_irq(unsigned int irq);
87static void unmask_vic_irq(unsigned int irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -070088static unsigned int startup_vic_irq(unsigned int irq);
89static void enable_local_vic_irq(unsigned int irq);
90static void disable_local_vic_irq(unsigned int irq);
91static void before_handle_vic_irq(unsigned int irq);
92static void after_handle_vic_irq(unsigned int irq);
93static void set_vic_irq_affinity(unsigned int irq, cpumask_t mask);
94static void ack_vic_irq(unsigned int irq);
95static void vic_enable_cpi(void);
96static void do_boot_cpu(__u8 cpuid);
97static void do_quad_bootstrap(void);
Linus Torvalds1da177e2005-04-16 15:20:36 -070098
99int hard_smp_processor_id(void);
Fernando Vazquez2654c082006-09-30 23:29:08 -0700100int safe_smp_processor_id(void);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700101
102/* Inline functions */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100103static inline void send_one_QIC_CPI(__u8 cpu, __u8 cpi)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700104{
105 voyager_quad_cpi_addr[cpu]->qic_cpi[cpi].cpi =
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100106 (smp_processor_id() << 16) + cpi;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700107}
108
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100109static inline void send_QIC_CPI(__u32 cpuset, __u8 cpi)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700110{
111 int cpu;
112
113 for_each_online_cpu(cpu) {
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100114 if (cpuset & (1 << cpu)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700115#ifdef VOYAGER_DEBUG
Akinobu Mita7c04e642008-04-19 23:55:17 +0900116 if (!cpu_online(cpu))
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100117 VDEBUG(("CPU%d sending cpi %d to CPU%d not in "
118 "cpu_online_map\n",
119 hard_smp_processor_id(), cpi, cpu));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700120#endif
121 send_one_QIC_CPI(cpu, cpi - QIC_CPI_OFFSET);
122 }
123 }
124}
125
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100126static inline void wrapper_smp_local_timer_interrupt(void)
Dominik Hackl6431e6a2005-05-24 19:29:46 -0700127{
128 irq_enter();
David Howells7d12e782006-10-05 14:55:46 +0100129 smp_local_timer_interrupt();
Dominik Hackl6431e6a2005-05-24 19:29:46 -0700130 irq_exit();
131}
132
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100133static inline void send_one_CPI(__u8 cpu, __u8 cpi)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700134{
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100135 if (voyager_quad_processors & (1 << cpu))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700136 send_one_QIC_CPI(cpu, cpi - QIC_CPI_OFFSET);
137 else
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100138 send_CPI(1 << cpu, cpi);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700139}
140
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100141static inline void send_CPI_allbutself(__u8 cpi)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700142{
143 __u8 cpu = smp_processor_id();
144 __u32 mask = cpus_addr(cpu_online_map)[0] & ~(1 << cpu);
145 send_CPI(mask, cpi);
146}
147
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100148static inline int is_cpu_quad(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700149{
150 __u8 cpumask = inb(VIC_PROC_WHO_AM_I);
151 return ((cpumask & QUAD_IDENTIFIER) == QUAD_IDENTIFIER);
152}
153
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100154static inline int is_cpu_extended(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700155{
156 __u8 cpu = hard_smp_processor_id();
157
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100158 return (voyager_extended_vic_processors & (1 << cpu));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700159}
160
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100161static inline int is_cpu_vic_boot(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700162{
163 __u8 cpu = hard_smp_processor_id();
164
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100165 return (voyager_extended_vic_processors
166 & voyager_allowed_boot_processors & (1 << cpu));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700167}
168
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100169static inline void ack_CPI(__u8 cpi)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700170{
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100171 switch (cpi) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700172 case VIC_CPU_BOOT_CPI:
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100173 if (is_cpu_quad() && !is_cpu_vic_boot())
Linus Torvalds1da177e2005-04-16 15:20:36 -0700174 ack_QIC_CPI(cpi);
175 else
176 ack_VIC_CPI(cpi);
177 break;
178 case VIC_SYS_INT:
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100179 case VIC_CMN_INT:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700180 /* These are slightly strange. Even on the Quad card,
181 * They are vectored as VIC CPIs */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100182 if (is_cpu_quad())
Linus Torvalds1da177e2005-04-16 15:20:36 -0700183 ack_special_QIC_CPI(cpi);
184 else
185 ack_VIC_CPI(cpi);
186 break;
187 default:
188 printk("VOYAGER ERROR: CPI%d is in common CPI code\n", cpi);
189 break;
190 }
191}
192
193/* local variables */
194
195/* The VIC IRQ descriptors -- these look almost identical to the
196 * 8259 IRQs except that masks and things must be kept per processor
197 */
James Bottomleyc7717462006-10-12 22:21:16 -0500198static struct irq_chip vic_chip = {
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100199 .name = "VIC",
200 .startup = startup_vic_irq,
201 .mask = mask_vic_irq,
202 .unmask = unmask_vic_irq,
203 .set_affinity = set_vic_irq_affinity,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700204};
205
206/* used to count up as CPUs are brought on line (starts at 0) */
207static int cpucount = 0;
208
Linus Torvalds1da177e2005-04-16 15:20:36 -0700209/* The per cpu profile stuff - used in smp_local_timer_interrupt */
210static DEFINE_PER_CPU(int, prof_multiplier) = 1;
211static DEFINE_PER_CPU(int, prof_old_multiplier) = 1;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100212static DEFINE_PER_CPU(int, prof_counter) = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700213
214/* the map used to check if a CPU has booted */
215static __u32 cpu_booted_map;
216
217/* the synchronize flag used to hold all secondary CPUs spinning in
218 * a tight loop until the boot sequence is ready for them */
219static cpumask_t smp_commenced_mask = CPU_MASK_NONE;
220
221/* This is for the new dynamic CPU boot code */
222cpumask_t cpu_callin_map = CPU_MASK_NONE;
223cpumask_t cpu_callout_map = CPU_MASK_NONE;
Andrew Morton7a8ef1c2006-02-10 01:51:08 -0800224cpumask_t cpu_possible_map = CPU_MASK_NONE;
Zwane Mwaikambo4ad8d382005-09-03 15:56:51 -0700225EXPORT_SYMBOL(cpu_possible_map);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700226
227/* The per processor IRQ masks (these are usually kept in sync) */
228static __u16 vic_irq_mask[NR_CPUS] __cacheline_aligned;
229
230/* the list of IRQs to be enabled by the VIC_ENABLE_IRQ_CPI */
231static __u16 vic_irq_enable_mask[NR_CPUS] __cacheline_aligned = { 0 };
232
233/* Lock for enable/disable of VIC interrupts */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100234static __cacheline_aligned DEFINE_SPINLOCK(vic_irq_lock);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700235
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100236/* The boot processor is correctly set up in PC mode when it
Linus Torvalds1da177e2005-04-16 15:20:36 -0700237 * comes up, but the secondaries need their master/slave 8259
238 * pairs initializing correctly */
239
240/* Interrupt counters (per cpu) and total - used to try to
241 * even up the interrupt handling routines */
242static long vic_intr_total = 0;
243static long vic_intr_count[NR_CPUS] __cacheline_aligned = { 0 };
244static unsigned long vic_tick[NR_CPUS] __cacheline_aligned = { 0 };
245
246/* Since we can only use CPI0, we fake all the other CPIs */
247static unsigned long vic_cpi_mailbox[NR_CPUS] __cacheline_aligned;
248
249/* debugging routine to read the isr of the cpu's pic */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100250static inline __u16 vic_read_isr(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700251{
252 __u16 isr;
253
254 outb(0x0b, 0xa0);
255 isr = inb(0xa0) << 8;
256 outb(0x0b, 0x20);
257 isr |= inb(0x20);
258
259 return isr;
260}
261
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100262static __init void qic_setup(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700263{
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100264 if (!is_cpu_quad()) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700265 /* not a quad, no setup */
266 return;
267 }
268 outb(QIC_DEFAULT_MASK0, QIC_MASK_REGISTER0);
269 outb(QIC_CPI_ENABLE, QIC_MASK_REGISTER1);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100270
271 if (is_cpu_extended()) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700272 /* the QIC duplicate of the VIC base register */
273 outb(VIC_DEFAULT_CPI_BASE, QIC_VIC_CPI_BASE_REGISTER);
274 outb(QIC_DEFAULT_CPI_BASE, QIC_CPI_BASE_REGISTER);
275
276 /* FIXME: should set up the QIC timer and memory parity
277 * error vectors here */
278 }
279}
280
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100281static __init void vic_setup_pic(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700282{
283 outb(1, VIC_REDIRECT_REGISTER_1);
284 /* clear the claim registers for dynamic routing */
285 outb(0, VIC_CLAIM_REGISTER_0);
286 outb(0, VIC_CLAIM_REGISTER_1);
287
288 outb(0, VIC_PRIORITY_REGISTER);
289 /* Set the Primary and Secondary Microchannel vector
290 * bases to be the same as the ordinary interrupts
291 *
292 * FIXME: This would be more efficient using separate
293 * vectors. */
294 outb(FIRST_EXTERNAL_VECTOR, VIC_PRIMARY_MC_BASE);
295 outb(FIRST_EXTERNAL_VECTOR, VIC_SECONDARY_MC_BASE);
296 /* Now initiallise the master PIC belonging to this CPU by
297 * sending the four ICWs */
298
299 /* ICW1: level triggered, ICW4 needed */
300 outb(0x19, 0x20);
301
302 /* ICW2: vector base */
303 outb(FIRST_EXTERNAL_VECTOR, 0x21);
304
305 /* ICW3: slave at line 2 */
306 outb(0x04, 0x21);
307
308 /* ICW4: 8086 mode */
309 outb(0x01, 0x21);
310
311 /* now the same for the slave PIC */
312
313 /* ICW1: level trigger, ICW4 needed */
314 outb(0x19, 0xA0);
315
316 /* ICW2: slave vector base */
317 outb(FIRST_EXTERNAL_VECTOR + 8, 0xA1);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100318
Linus Torvalds1da177e2005-04-16 15:20:36 -0700319 /* ICW3: slave ID */
320 outb(0x02, 0xA1);
321
322 /* ICW4: 8086 mode */
323 outb(0x01, 0xA1);
324}
325
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100326static void do_quad_bootstrap(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700327{
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100328 if (is_cpu_quad() && is_cpu_vic_boot()) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700329 int i;
330 unsigned long flags;
331 __u8 cpuid = hard_smp_processor_id();
332
333 local_irq_save(flags);
334
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100335 for (i = 0; i < 4; i++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700336 /* FIXME: this would be >>3 &0x7 on the 32 way */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100337 if (((cpuid >> 2) & 0x03) == i)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700338 /* don't lower our own mask! */
339 continue;
340
341 /* masquerade as local Quad CPU */
342 outb(QIC_CPUID_ENABLE | i, QIC_PROCESSOR_ID);
343 /* enable the startup CPI */
344 outb(QIC_BOOT_CPI_MASK, QIC_MASK_REGISTER1);
345 /* restore cpu id */
346 outb(0, QIC_PROCESSOR_ID);
347 }
348 local_irq_restore(flags);
349 }
350}
351
Linus Torvalds1da177e2005-04-16 15:20:36 -0700352/* Set up all the basic stuff: read the SMP config and make all the
353 * SMP information reflect only the boot cpu. All others will be
354 * brought on-line later. */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100355void __init find_smp_config(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700356{
357 int i;
358
359 boot_cpu_id = hard_smp_processor_id();
360
361 printk("VOYAGER SMP: Boot cpu is %d\n", boot_cpu_id);
362
363 /* initialize the CPU structures (moved from smp_boot_cpus) */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100364 for (i = 0; i < NR_CPUS; i++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700365 cpu_irq_affinity[i] = ~0;
366 }
367 cpu_online_map = cpumask_of_cpu(boot_cpu_id);
368
369 /* The boot CPU must be extended */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100370 voyager_extended_vic_processors = 1 << boot_cpu_id;
Simon Arlott27b46d72007-10-20 01:13:56 +0200371 /* initially, all of the first 8 CPUs can boot */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700372 voyager_allowed_boot_processors = 0xff;
373 /* set up everything for just this CPU, we can alter
374 * this as we start the other CPUs later */
375 /* now get the CPU disposition from the extended CMOS */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100376 cpus_addr(phys_cpu_present_map)[0] =
377 voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK);
378 cpus_addr(phys_cpu_present_map)[0] |=
379 voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK + 1) << 8;
380 cpus_addr(phys_cpu_present_map)[0] |=
381 voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK +
382 2) << 16;
383 cpus_addr(phys_cpu_present_map)[0] |=
384 voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK +
385 3) << 24;
James Bottomleyf68a1062006-02-24 13:04:11 -0800386 cpu_possible_map = phys_cpu_present_map;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100387 printk("VOYAGER SMP: phys_cpu_present_map = 0x%lx\n",
388 cpus_addr(phys_cpu_present_map)[0]);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700389 /* Here we set up the VIC to enable SMP */
390 /* enable the CPIs by writing the base vector to their register */
391 outb(VIC_DEFAULT_CPI_BASE, VIC_CPI_BASE_REGISTER);
392 outb(1, VIC_REDIRECT_REGISTER_1);
393 /* set the claim registers for static routing --- Boot CPU gets
394 * all interrupts untill all other CPUs started */
395 outb(0xff, VIC_CLAIM_REGISTER_0);
396 outb(0xff, VIC_CLAIM_REGISTER_1);
397 /* Set the Primary and Secondary Microchannel vector
398 * bases to be the same as the ordinary interrupts
399 *
400 * FIXME: This would be more efficient using separate
401 * vectors. */
402 outb(FIRST_EXTERNAL_VECTOR, VIC_PRIMARY_MC_BASE);
403 outb(FIRST_EXTERNAL_VECTOR, VIC_SECONDARY_MC_BASE);
404
405 /* Finally tell the firmware that we're driving */
406 outb(inb(VOYAGER_SUS_IN_CONTROL_PORT) | VOYAGER_IN_CONTROL_FLAG,
407 VOYAGER_SUS_IN_CONTROL_PORT);
408
409 current_thread_info()->cpu = boot_cpu_id;
Jeremy Fitzhardinge6a3ee3d2007-05-15 01:41:59 -0700410 x86_write_percpu(cpu_number, boot_cpu_id);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700411}
412
413/*
414 * The bootstrap kernel entry code has set these up. Save them
415 * for a given CPU, id is physical */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100416void __init smp_store_cpu_info(int id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700417{
Mike Travis92cb7612007-10-19 20:35:04 +0200418 struct cpuinfo_x86 *c = &cpu_data(id);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700419
420 *c = boot_cpu_data;
421
Jeremy Fitzhardinge6a3ee3d2007-05-15 01:41:59 -0700422 identify_secondary_cpu(c);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700423}
424
Linus Torvalds1da177e2005-04-16 15:20:36 -0700425/* Routine initially called when a non-boot CPU is brought online */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100426static void __init start_secondary(void *unused)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700427{
428 __u8 cpuid = hard_smp_processor_id();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700429
Jeremy Fitzhardinge6a3ee3d2007-05-15 01:41:59 -0700430 cpu_init();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700431
432 /* OK, we're in the routine */
433 ack_CPI(VIC_CPU_BOOT_CPI);
434
435 /* setup the 8259 master slave pair belonging to this CPU ---
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100436 * we won't actually receive any until the boot CPU
437 * relinquishes it's static routing mask */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700438 vic_setup_pic();
439
440 qic_setup();
441
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100442 if (is_cpu_quad() && !is_cpu_vic_boot()) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700443 /* clear the boot CPI */
444 __u8 dummy;
445
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100446 dummy =
447 voyager_quad_cpi_addr[cpuid]->qic_cpi[VIC_CPU_BOOT_CPI].cpi;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700448 printk("read dummy %d\n", dummy);
449 }
450
451 /* lower the mask to receive CPIs */
452 vic_enable_cpi();
453
454 VDEBUG(("VOYAGER SMP: CPU%d, stack at about %p\n", cpuid, &cpuid));
455
456 /* enable interrupts */
457 local_irq_enable();
458
459 /* get our bogomips */
460 calibrate_delay();
461
462 /* save our processor parameters */
463 smp_store_cpu_info(cpuid);
464
465 /* if we're a quad, we may need to bootstrap other CPUs */
466 do_quad_bootstrap();
467
468 /* FIXME: this is rather a poor hack to prevent the CPU
469 * activating softirqs while it's supposed to be waiting for
470 * permission to proceed. Without this, the new per CPU stuff
471 * in the softirqs will fail */
472 local_irq_disable();
473 cpu_set(cpuid, cpu_callin_map);
474
475 /* signal that we're done */
476 cpu_booted_map = 1;
477
478 while (!cpu_isset(cpuid, smp_commenced_mask))
479 rep_nop();
480 local_irq_enable();
481
482 local_flush_tlb();
483
484 cpu_set(cpuid, cpu_online_map);
485 wmb();
486 cpu_idle();
487}
488
Linus Torvalds1da177e2005-04-16 15:20:36 -0700489/* Routine to kick start the given CPU and wait for it to report ready
490 * (or timeout in startup). When this routine returns, the requested
491 * CPU is either fully running and configured or known to be dead.
492 *
493 * We call this routine sequentially 1 CPU at a time, so no need for
494 * locking */
495
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100496static void __init do_boot_cpu(__u8 cpu)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700497{
498 struct task_struct *idle;
499 int timeout;
500 unsigned long flags;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100501 int quad_boot = (1 << cpu) & voyager_quad_processors
502 & ~(voyager_extended_vic_processors
503 & voyager_allowed_boot_processors);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700504
Linus Torvalds1da177e2005-04-16 15:20:36 -0700505 /* This is the format of the CPI IDT gate (in real mode) which
506 * we're hijacking to boot the CPU */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100507 union IDTFormat {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700508 struct seg {
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100509 __u16 Offset;
510 __u16 Segment;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700511 } idt;
512 __u32 val;
513 } hijack_source;
514
515 __u32 *hijack_vector;
516 __u32 start_phys_address = setup_trampoline();
517
518 /* There's a clever trick to this: The linux trampoline is
519 * compiled to begin at absolute location zero, so make the
520 * address zero but have the data segment selector compensate
521 * for the actual address */
522 hijack_source.idt.Offset = start_phys_address & 0x000F;
523 hijack_source.idt.Segment = (start_phys_address >> 4) & 0xFFFF;
524
525 cpucount++;
James Bottomleyd6444512007-05-01 10:13:46 -0500526 alternatives_smp_switch(1);
527
Linus Torvalds1da177e2005-04-16 15:20:36 -0700528 idle = fork_idle(cpu);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100529 if (IS_ERR(idle))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700530 panic("failed fork for CPU%d", cpu);
H. Peter Anvin65ea5b02008-01-30 13:30:56 +0100531 idle->thread.ip = (unsigned long)start_secondary;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700532 /* init_tasks (in sched.c) is indexed logically */
H. Peter Anvin65ea5b02008-01-30 13:30:56 +0100533 stack_start.sp = (void *)idle->thread.sp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700534
Jeremy Fitzhardinge6a3ee3d2007-05-15 01:41:59 -0700535 init_gdt(cpu);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100536 per_cpu(current_task, cpu) = idle;
Jeremy Fitzhardinge6a3ee3d2007-05-15 01:41:59 -0700537 early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700538 irq_ctx_init(cpu);
539
540 /* Note: Don't modify initial ss override */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100541 VDEBUG(("VOYAGER SMP: Booting CPU%d at 0x%lx[%x:%x], stack %p\n", cpu,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700542 (unsigned long)hijack_source.val, hijack_source.idt.Segment,
H. Peter Anvin65ea5b02008-01-30 13:30:56 +0100543 hijack_source.idt.Offset, stack_start.sp));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700544
Eric W. Biederman9d0e59a2007-04-30 09:57:40 -0600545 /* init lowmem identity mapping */
Jeremy Fitzhardinge68db0652008-03-17 16:37:13 -0700546 clone_pgd_range(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY,
547 min_t(unsigned long, KERNEL_PGD_PTRS, KERNEL_PGD_BOUNDARY));
Eric W. Biederman9d0e59a2007-04-30 09:57:40 -0600548 flush_tlb_all();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700549
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100550 if (quad_boot) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700551 printk("CPU %d: non extended Quad boot\n", cpu);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100552 hijack_vector =
553 (__u32 *)
554 phys_to_virt((VIC_CPU_BOOT_CPI + QIC_DEFAULT_CPI_BASE) * 4);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700555 *hijack_vector = hijack_source.val;
556 } else {
557 printk("CPU%d: extended VIC boot\n", cpu);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100558 hijack_vector =
559 (__u32 *)
560 phys_to_virt((VIC_CPU_BOOT_CPI + VIC_DEFAULT_CPI_BASE) * 4);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700561 *hijack_vector = hijack_source.val;
562 /* VIC errata, may also receive interrupt at this address */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100563 hijack_vector =
564 (__u32 *)
565 phys_to_virt((VIC_CPU_BOOT_ERRATA_CPI +
566 VIC_DEFAULT_CPI_BASE) * 4);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700567 *hijack_vector = hijack_source.val;
568 }
569 /* All non-boot CPUs start with interrupts fully masked. Need
570 * to lower the mask of the CPI we're about to send. We do
571 * this in the VIC by masquerading as the processor we're
572 * about to boot and lowering its interrupt mask */
573 local_irq_save(flags);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100574 if (quad_boot) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700575 send_one_QIC_CPI(cpu, VIC_CPU_BOOT_CPI);
576 } else {
577 outb(VIC_CPU_MASQUERADE_ENABLE | cpu, VIC_PROCESSOR_ID);
578 /* here we're altering registers belonging to `cpu' */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100579
Linus Torvalds1da177e2005-04-16 15:20:36 -0700580 outb(VIC_BOOT_INTERRUPT_MASK, 0x21);
581 /* now go back to our original identity */
582 outb(boot_cpu_id, VIC_PROCESSOR_ID);
583
584 /* and boot the CPU */
585
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100586 send_CPI((1 << cpu), VIC_CPU_BOOT_CPI);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700587 }
588 cpu_booted_map = 0;
589 local_irq_restore(flags);
590
591 /* now wait for it to become ready (or timeout) */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100592 for (timeout = 0; timeout < 50000; timeout++) {
593 if (cpu_booted_map)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700594 break;
595 udelay(100);
596 }
597 /* reset the page table */
Eric W. Biederman9d0e59a2007-04-30 09:57:40 -0600598 zap_low_mappings();
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100599
Linus Torvalds1da177e2005-04-16 15:20:36 -0700600 if (cpu_booted_map) {
601 VDEBUG(("CPU%d: Booted successfully, back in CPU %d\n",
602 cpu, smp_processor_id()));
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100603
Linus Torvalds1da177e2005-04-16 15:20:36 -0700604 printk("CPU%d: ", cpu);
Mike Travis92cb7612007-10-19 20:35:04 +0200605 print_cpu_info(&cpu_data(cpu));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700606 wmb();
607 cpu_set(cpu, cpu_callout_map);
James Bottomley3c101cf2006-06-26 21:33:09 -0500608 cpu_set(cpu, cpu_present_map);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100609 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700610 printk("CPU%d FAILED TO BOOT: ", cpu);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100611 if (*
612 ((volatile unsigned char *)phys_to_virt(start_phys_address))
613 == 0xA5)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700614 printk("Stuck.\n");
615 else
616 printk("Not responding.\n");
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100617
Linus Torvalds1da177e2005-04-16 15:20:36 -0700618 cpucount--;
619 }
620}
621
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100622void __init smp_boot_cpus(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700623{
624 int i;
625
626 /* CAT BUS initialisation must be done after the memory */
627 /* FIXME: The L4 has a catbus too, it just needs to be
628 * accessed in a totally different way */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100629 if (voyager_level == 5) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700630 voyager_cat_init();
631
632 /* now that the cat has probed the Voyager System Bus, sanity
633 * check the cpu map */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100634 if (((voyager_quad_processors | voyager_extended_vic_processors)
635 & cpus_addr(phys_cpu_present_map)[0]) !=
636 cpus_addr(phys_cpu_present_map)[0]) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700637 /* should panic */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100638 printk("\n\n***WARNING*** "
639 "Sanity check of CPU present map FAILED\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700640 }
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100641 } else if (voyager_level == 4)
642 voyager_extended_vic_processors =
643 cpus_addr(phys_cpu_present_map)[0];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700644
645 /* this sets up the idle task to run on the current cpu */
646 voyager_extended_cpus = 1;
647 /* Remove the global_irq_holder setting, it triggers a BUG() on
648 * schedule at the moment */
649 //global_irq_holder = boot_cpu_id;
650
651 /* FIXME: Need to do something about this but currently only works
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100652 * on CPUs with a tsc which none of mine have.
653 smp_tune_scheduling();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700654 */
655 smp_store_cpu_info(boot_cpu_id);
656 printk("CPU%d: ", boot_cpu_id);
Mike Travis92cb7612007-10-19 20:35:04 +0200657 print_cpu_info(&cpu_data(boot_cpu_id));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700658
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100659 if (is_cpu_quad()) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700660 /* booting on a Quad CPU */
661 printk("VOYAGER SMP: Boot CPU is Quad\n");
662 qic_setup();
663 do_quad_bootstrap();
664 }
665
666 /* enable our own CPIs */
667 vic_enable_cpi();
668
669 cpu_set(boot_cpu_id, cpu_online_map);
670 cpu_set(boot_cpu_id, cpu_callout_map);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100671
672 /* loop over all the extended VIC CPUs and boot them. The
Linus Torvalds1da177e2005-04-16 15:20:36 -0700673 * Quad CPUs must be bootstrapped by their extended VIC cpu */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100674 for (i = 0; i < NR_CPUS; i++) {
675 if (i == boot_cpu_id || !cpu_isset(i, phys_cpu_present_map))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700676 continue;
677 do_boot_cpu(i);
678 /* This udelay seems to be needed for the Quad boots
679 * don't remove unless you know what you're doing */
680 udelay(1000);
681 }
682 /* we could compute the total bogomips here, but why bother?,
683 * Code added from smpboot.c */
684 {
685 unsigned long bogosum = 0;
Akinobu Mita7c04e642008-04-19 23:55:17 +0900686
687 for_each_online_cpu(i)
688 bogosum += cpu_data(i).loops_per_jiffy;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100689 printk(KERN_INFO "Total of %d processors activated "
690 "(%lu.%02lu BogoMIPS).\n",
691 cpucount + 1, bogosum / (500000 / HZ),
692 (bogosum / (5000 / HZ)) % 100);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700693 }
694 voyager_extended_cpus = hweight32(voyager_extended_vic_processors);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100695 printk("VOYAGER: Extended (interrupt handling CPUs): "
696 "%d, non-extended: %d\n", voyager_extended_cpus,
697 num_booting_cpus() - voyager_extended_cpus);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700698 /* that's it, switch to symmetric mode */
699 outb(0, VIC_PRIORITY_REGISTER);
700 outb(0, VIC_CLAIM_REGISTER_0);
701 outb(0, VIC_CLAIM_REGISTER_1);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100702
Linus Torvalds1da177e2005-04-16 15:20:36 -0700703 VDEBUG(("VOYAGER SMP: Booted with %d CPUs\n", num_booting_cpus()));
704}
705
706/* Reload the secondary CPUs task structure (this function does not
707 * return ) */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100708void __init initialize_secondary(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700709{
710#if 0
711 // AC kernels only
712 set_current(hard_get_current());
713#endif
714
715 /*
716 * We don't actually need to load the full TSS,
717 * basically just the stack pointer and the eip.
718 */
719
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100720 asm volatile ("movl %0,%%esp\n\t"
H. Peter Anvin65ea5b02008-01-30 13:30:56 +0100721 "jmp *%1"::"r" (current->thread.sp),
722 "r"(current->thread.ip));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700723}
724
725/* handle a Voyager SYS_INT -- If we don't, the base board will
726 * panic the system.
727 *
728 * System interrupts occur because some problem was detected on the
729 * various busses. To find out what you have to probe all the
730 * hardware via the CAT bus. FIXME: At the moment we do nothing. */
Harvey Harrison75604d72008-01-30 13:31:17 +0100731void smp_vic_sys_interrupt(struct pt_regs *regs)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700732{
733 ack_CPI(VIC_SYS_INT);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100734 printk("Voyager SYSTEM INTERRUPT\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700735}
736
737/* Handle a voyager CMN_INT; These interrupts occur either because of
738 * a system status change or because a single bit memory error
739 * occurred. FIXME: At the moment, ignore all this. */
Harvey Harrison75604d72008-01-30 13:31:17 +0100740void smp_vic_cmn_interrupt(struct pt_regs *regs)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700741{
742 static __u8 in_cmn_int = 0;
743 static DEFINE_SPINLOCK(cmn_int_lock);
744
745 /* common ints are broadcast, so make sure we only do this once */
746 _raw_spin_lock(&cmn_int_lock);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100747 if (in_cmn_int)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700748 goto unlock_end;
749
750 in_cmn_int++;
751 _raw_spin_unlock(&cmn_int_lock);
752
753 VDEBUG(("Voyager COMMON INTERRUPT\n"));
754
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100755 if (voyager_level == 5)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700756 voyager_cat_do_common_interrupt();
757
758 _raw_spin_lock(&cmn_int_lock);
759 in_cmn_int = 0;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100760 unlock_end:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700761 _raw_spin_unlock(&cmn_int_lock);
762 ack_CPI(VIC_CMN_INT);
763}
764
765/*
766 * Reschedule call back. Nothing to do, all the work is done
767 * automatically when we return from the interrupt. */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100768static void smp_reschedule_interrupt(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700769{
770 /* do nothing */
771}
772
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100773static struct mm_struct *flush_mm;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700774static unsigned long flush_va;
775static DEFINE_SPINLOCK(tlbstate_lock);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700776
777/*
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100778 * We cannot call mmdrop() because we are in interrupt context,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700779 * instead update mm->cpu_vm_mask.
780 *
781 * We need to reload %cr3 since the page tables may be going
782 * away from under us..
783 */
Jeremy Fitzhardinge925596a2008-01-30 13:32:55 +0100784static inline void voyager_leave_mm(unsigned long cpu)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700785{
786 if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_OK)
787 BUG();
788 cpu_clear(cpu, per_cpu(cpu_tlbstate, cpu).active_mm->cpu_vm_mask);
789 load_cr3(swapper_pg_dir);
790}
791
Linus Torvalds1da177e2005-04-16 15:20:36 -0700792/*
793 * Invalidate call-back
794 */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100795static void smp_invalidate_interrupt(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700796{
797 __u8 cpu = smp_processor_id();
798
799 if (!test_bit(cpu, &smp_invalidate_needed))
800 return;
801 /* This will flood messages. Don't uncomment unless you see
802 * Problems with cross cpu invalidation
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100803 VDEBUG(("VOYAGER SMP: CPU%d received INVALIDATE_CPI\n",
804 smp_processor_id()));
805 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700806
807 if (flush_mm == per_cpu(cpu_tlbstate, cpu).active_mm) {
808 if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_OK) {
Thomas Gleixner0b9c99b2008-01-30 13:30:35 +0100809 if (flush_va == TLB_FLUSH_ALL)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700810 local_flush_tlb();
811 else
812 __flush_tlb_one(flush_va);
813 } else
Jeremy Fitzhardinge925596a2008-01-30 13:32:55 +0100814 voyager_leave_mm(cpu);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700815 }
816 smp_mb__before_clear_bit();
817 clear_bit(cpu, &smp_invalidate_needed);
818 smp_mb__after_clear_bit();
819}
820
821/* All the new flush operations for 2.4 */
822
Linus Torvalds1da177e2005-04-16 15:20:36 -0700823/* This routine is called with a physical cpu mask */
824static void
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100825voyager_flush_tlb_others(unsigned long cpumask, struct mm_struct *mm,
826 unsigned long va)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700827{
828 int stuck = 50000;
829
830 if (!cpumask)
831 BUG();
832 if ((cpumask & cpus_addr(cpu_online_map)[0]) != cpumask)
833 BUG();
834 if (cpumask & (1 << smp_processor_id()))
835 BUG();
836 if (!mm)
837 BUG();
838
839 spin_lock(&tlbstate_lock);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100840
Linus Torvalds1da177e2005-04-16 15:20:36 -0700841 flush_mm = mm;
842 flush_va = va;
843 atomic_set_mask(cpumask, &smp_invalidate_needed);
844 /*
845 * We have to send the CPI only to
846 * CPUs affected.
847 */
848 send_CPI(cpumask, VIC_INVALIDATE_CPI);
849
850 while (smp_invalidate_needed) {
851 mb();
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100852 if (--stuck == 0) {
853 printk("***WARNING*** Stuck doing invalidate CPI "
854 "(CPU%d)\n", smp_processor_id());
Linus Torvalds1da177e2005-04-16 15:20:36 -0700855 break;
856 }
857 }
858
859 /* Uncomment only to debug invalidation problems
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100860 VDEBUG(("VOYAGER SMP: Completed invalidate CPI (CPU%d)\n", cpu));
861 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700862
863 flush_mm = NULL;
864 flush_va = 0;
865 spin_unlock(&tlbstate_lock);
866}
867
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100868void flush_tlb_current_task(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700869{
870 struct mm_struct *mm = current->mm;
871 unsigned long cpu_mask;
872
873 preempt_disable();
874
875 cpu_mask = cpus_addr(mm->cpu_vm_mask)[0] & ~(1 << smp_processor_id());
876 local_flush_tlb();
877 if (cpu_mask)
Thomas Gleixner0b9c99b2008-01-30 13:30:35 +0100878 voyager_flush_tlb_others(cpu_mask, mm, TLB_FLUSH_ALL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700879
880 preempt_enable();
881}
882
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100883void flush_tlb_mm(struct mm_struct *mm)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700884{
885 unsigned long cpu_mask;
886
887 preempt_disable();
888
889 cpu_mask = cpus_addr(mm->cpu_vm_mask)[0] & ~(1 << smp_processor_id());
890
891 if (current->active_mm == mm) {
892 if (current->mm)
893 local_flush_tlb();
894 else
Jeremy Fitzhardinge925596a2008-01-30 13:32:55 +0100895 voyager_leave_mm(smp_processor_id());
Linus Torvalds1da177e2005-04-16 15:20:36 -0700896 }
897 if (cpu_mask)
Thomas Gleixner0b9c99b2008-01-30 13:30:35 +0100898 voyager_flush_tlb_others(cpu_mask, mm, TLB_FLUSH_ALL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700899
900 preempt_enable();
901}
902
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100903void flush_tlb_page(struct vm_area_struct *vma, unsigned long va)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700904{
905 struct mm_struct *mm = vma->vm_mm;
906 unsigned long cpu_mask;
907
908 preempt_disable();
909
910 cpu_mask = cpus_addr(mm->cpu_vm_mask)[0] & ~(1 << smp_processor_id());
911 if (current->active_mm == mm) {
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100912 if (current->mm)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700913 __flush_tlb_one(va);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100914 else
Jeremy Fitzhardinge925596a2008-01-30 13:32:55 +0100915 voyager_leave_mm(smp_processor_id());
Linus Torvalds1da177e2005-04-16 15:20:36 -0700916 }
917
918 if (cpu_mask)
Jeremy Fitzhardinge6a3ee3d2007-05-15 01:41:59 -0700919 voyager_flush_tlb_others(cpu_mask, mm, va);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700920
921 preempt_enable();
922}
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100923
James Bottomley153f8052005-07-13 09:38:05 -0400924EXPORT_SYMBOL(flush_tlb_page);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700925
926/* enable the requested IRQs */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100927static void smp_enable_irq_interrupt(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700928{
929 __u8 irq;
930 __u8 cpu = get_cpu();
931
932 VDEBUG(("VOYAGER SMP: CPU%d enabling irq mask 0x%x\n", cpu,
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100933 vic_irq_enable_mask[cpu]));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700934
935 spin_lock(&vic_irq_lock);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100936 for (irq = 0; irq < 16; irq++) {
937 if (vic_irq_enable_mask[cpu] & (1 << irq))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700938 enable_local_vic_irq(irq);
939 }
940 vic_irq_enable_mask[cpu] = 0;
941 spin_unlock(&vic_irq_lock);
942
943 put_cpu_no_resched();
944}
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100945
Linus Torvalds1da177e2005-04-16 15:20:36 -0700946/*
947 * CPU halt call-back
948 */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100949static void smp_stop_cpu_function(void *dummy)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700950{
951 VDEBUG(("VOYAGER SMP: CPU%d is STOPPING\n", smp_processor_id()));
952 cpu_clear(smp_processor_id(), cpu_online_map);
953 local_irq_disable();
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100954 for (;;)
Zachary Amsdenf2ab4462005-09-03 15:56:42 -0700955 halt();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700956}
957
Linus Torvalds1da177e2005-04-16 15:20:36 -0700958/* execute a thread on a new CPU. The function to be called must be
959 * previously set up. This is used to schedule a function for
Simon Arlott27b46d72007-10-20 01:13:56 +0200960 * execution on all CPUs - set up the function then broadcast a
Linus Torvalds1da177e2005-04-16 15:20:36 -0700961 * function_interrupt CPI to come here on each CPU */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100962static void smp_call_function_interrupt(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700963{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700964 irq_enter();
Jens Axboe3b16cf82008-06-26 11:21:54 +0200965 generic_smp_call_function_interrupt();
Joe Korty38e760a2007-10-17 18:04:40 +0200966 __get_cpu_var(irq_stat).irq_call_count++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700967 irq_exit();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700968}
969
Jens Axboe3b16cf82008-06-26 11:21:54 +0200970static void smp_call_function_single_interrupt(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700971{
Jens Axboe3b16cf82008-06-26 11:21:54 +0200972 irq_enter();
973 generic_smp_call_function_single_interrupt();
974 __get_cpu_var(irq_stat).irq_call_count++;
975 irq_exit();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700976}
James Bottomley0293ca82007-04-30 11:24:05 -0500977
Linus Torvalds1da177e2005-04-16 15:20:36 -0700978/* Sorry about the name. In an APIC based system, the APICs
979 * themselves are programmed to send a timer interrupt. This is used
980 * by linux to reschedule the processor. Voyager doesn't have this,
981 * so we use the system clock to interrupt one processor, which in
982 * turn, broadcasts a timer CPI to all the others --- we receive that
983 * CPI here. We don't use this actually for counting so losing
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100984 * ticks doesn't matter
Linus Torvalds1da177e2005-04-16 15:20:36 -0700985 *
Simon Arlott27b46d72007-10-20 01:13:56 +0200986 * FIXME: For those CPUs which actually have a local APIC, we could
Linus Torvalds1da177e2005-04-16 15:20:36 -0700987 * try to use it to trigger this interrupt instead of having to
988 * broadcast the timer tick. Unfortunately, all my pentium DYADs have
989 * no local APIC, so I can't do this
990 *
991 * This function is currently a placeholder and is unused in the code */
Harvey Harrison75604d72008-01-30 13:31:17 +0100992void smp_apic_timer_interrupt(struct pt_regs *regs)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700993{
David Howells7d12e782006-10-05 14:55:46 +0100994 struct pt_regs *old_regs = set_irq_regs(regs);
995 wrapper_smp_local_timer_interrupt();
996 set_irq_regs(old_regs);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700997}
998
999/* All of the QUAD interrupt GATES */
Harvey Harrison75604d72008-01-30 13:31:17 +01001000void smp_qic_timer_interrupt(struct pt_regs *regs)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001001{
David Howells7d12e782006-10-05 14:55:46 +01001002 struct pt_regs *old_regs = set_irq_regs(regs);
James Bottomley81c06b12006-10-12 22:25:03 -05001003 ack_QIC_CPI(QIC_TIMER_CPI);
1004 wrapper_smp_local_timer_interrupt();
David Howells7d12e782006-10-05 14:55:46 +01001005 set_irq_regs(old_regs);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001006}
1007
Harvey Harrison75604d72008-01-30 13:31:17 +01001008void smp_qic_invalidate_interrupt(struct pt_regs *regs)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001009{
1010 ack_QIC_CPI(QIC_INVALIDATE_CPI);
1011 smp_invalidate_interrupt();
1012}
1013
Harvey Harrison75604d72008-01-30 13:31:17 +01001014void smp_qic_reschedule_interrupt(struct pt_regs *regs)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001015{
1016 ack_QIC_CPI(QIC_RESCHEDULE_CPI);
1017 smp_reschedule_interrupt();
1018}
1019
Harvey Harrison75604d72008-01-30 13:31:17 +01001020void smp_qic_enable_irq_interrupt(struct pt_regs *regs)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001021{
1022 ack_QIC_CPI(QIC_ENABLE_IRQ_CPI);
1023 smp_enable_irq_interrupt();
1024}
1025
Harvey Harrison75604d72008-01-30 13:31:17 +01001026void smp_qic_call_function_interrupt(struct pt_regs *regs)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001027{
1028 ack_QIC_CPI(QIC_CALL_FUNCTION_CPI);
1029 smp_call_function_interrupt();
1030}
1031
Jens Axboe3b16cf82008-06-26 11:21:54 +02001032void smp_qic_call_function_single_interrupt(struct pt_regs *regs)
1033{
1034 ack_QIC_CPI(QIC_CALL_FUNCTION_SINGLE_CPI);
1035 smp_call_function_single_interrupt();
1036}
1037
Harvey Harrison75604d72008-01-30 13:31:17 +01001038void smp_vic_cpi_interrupt(struct pt_regs *regs)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001039{
David Howells7d12e782006-10-05 14:55:46 +01001040 struct pt_regs *old_regs = set_irq_regs(regs);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001041 __u8 cpu = smp_processor_id();
1042
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001043 if (is_cpu_quad())
Linus Torvalds1da177e2005-04-16 15:20:36 -07001044 ack_QIC_CPI(VIC_CPI_LEVEL0);
1045 else
1046 ack_VIC_CPI(VIC_CPI_LEVEL0);
1047
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001048 if (test_and_clear_bit(VIC_TIMER_CPI, &vic_cpi_mailbox[cpu]))
David Howells7d12e782006-10-05 14:55:46 +01001049 wrapper_smp_local_timer_interrupt();
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001050 if (test_and_clear_bit(VIC_INVALIDATE_CPI, &vic_cpi_mailbox[cpu]))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001051 smp_invalidate_interrupt();
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001052 if (test_and_clear_bit(VIC_RESCHEDULE_CPI, &vic_cpi_mailbox[cpu]))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001053 smp_reschedule_interrupt();
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001054 if (test_and_clear_bit(VIC_ENABLE_IRQ_CPI, &vic_cpi_mailbox[cpu]))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001055 smp_enable_irq_interrupt();
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001056 if (test_and_clear_bit(VIC_CALL_FUNCTION_CPI, &vic_cpi_mailbox[cpu]))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001057 smp_call_function_interrupt();
Jens Axboe3b16cf82008-06-26 11:21:54 +02001058 if (test_and_clear_bit(VIC_CALL_FUNCTION_SINGLE_CPI, &vic_cpi_mailbox[cpu]))
1059 smp_call_function_single_interrupt();
David Howells7d12e782006-10-05 14:55:46 +01001060 set_irq_regs(old_regs);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001061}
1062
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001063static void do_flush_tlb_all(void *info)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001064{
1065 unsigned long cpu = smp_processor_id();
1066
1067 __flush_tlb_all();
1068 if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_LAZY)
Jeremy Fitzhardinge925596a2008-01-30 13:32:55 +01001069 voyager_leave_mm(cpu);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001070}
1071
Linus Torvalds1da177e2005-04-16 15:20:36 -07001072/* flush the TLB of every active CPU in the system */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001073void flush_tlb_all(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001074{
1075 on_each_cpu(do_flush_tlb_all, 0, 1, 1);
1076}
1077
1078/* used to set up the trampoline for other CPUs when the memory manager
1079 * is sorted out */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001080void __init smp_alloc_memory(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001081{
Glauber Costad5078972008-03-03 14:13:10 -03001082 trampoline_base = alloc_bootmem_low_pages(PAGE_SIZE);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001083 if (__pa(trampoline_base) >= 0x93000)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001084 BUG();
1085}
1086
1087/* send a reschedule CPI to one CPU by physical CPU number*/
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001088static void voyager_smp_send_reschedule(int cpu)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001089{
1090 send_one_CPI(cpu, VIC_RESCHEDULE_CPI);
1091}
1092
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001093int hard_smp_processor_id(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001094{
1095 __u8 i;
1096 __u8 cpumask = inb(VIC_PROC_WHO_AM_I);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001097 if ((cpumask & QUAD_IDENTIFIER) == QUAD_IDENTIFIER)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001098 return cpumask & 0x1F;
1099
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001100 for (i = 0; i < 8; i++) {
1101 if (cpumask & (1 << i))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001102 return i;
1103 }
1104 printk("** WARNING ** Illegal cpuid returned by VIC: %d", cpumask);
1105 return 0;
1106}
1107
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001108int safe_smp_processor_id(void)
Fernando Vazquez2654c082006-09-30 23:29:08 -07001109{
1110 return hard_smp_processor_id();
1111}
1112
Linus Torvalds1da177e2005-04-16 15:20:36 -07001113/* broadcast a halt to all other CPUs */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001114static void voyager_smp_send_stop(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001115{
Jens Axboe8691e5a2008-06-06 11:18:06 +02001116 smp_call_function(smp_stop_cpu_function, NULL, 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001117}
1118
1119/* this function is triggered in time.c when a clock tick fires
1120 * we need to re-broadcast the tick to all CPUs */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001121void smp_vic_timer_interrupt(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001122{
1123 send_CPI_allbutself(VIC_TIMER_CPI);
David Howells7d12e782006-10-05 14:55:46 +01001124 smp_local_timer_interrupt();
Linus Torvalds1da177e2005-04-16 15:20:36 -07001125}
1126
Linus Torvalds1da177e2005-04-16 15:20:36 -07001127/* local (per CPU) timer interrupt. It does both profiling and
1128 * process statistics/rescheduling.
1129 *
1130 * We do profiling in every local tick, statistics/rescheduling
1131 * happen only every 'profiling multiplier' ticks. The default
1132 * multiplier is 1 and it can be changed by writing the new multiplier
1133 * value into /proc/profile.
1134 */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001135void smp_local_timer_interrupt(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001136{
1137 int cpu = smp_processor_id();
1138 long weight;
1139
David Howells7d12e782006-10-05 14:55:46 +01001140 profile_tick(CPU_PROFILING);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001141 if (--per_cpu(prof_counter, cpu) <= 0) {
1142 /*
1143 * The multiplier may have changed since the last time we got
1144 * to this point as a result of the user writing to
1145 * /proc/profile. In this case we need to adjust the APIC
1146 * timer accordingly.
1147 *
1148 * Interrupts are already masked off at this point.
1149 */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001150 per_cpu(prof_counter, cpu) = per_cpu(prof_multiplier, cpu);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001151 if (per_cpu(prof_counter, cpu) !=
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001152 per_cpu(prof_old_multiplier, cpu)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001153 /* FIXME: need to update the vic timer tick here */
1154 per_cpu(prof_old_multiplier, cpu) =
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001155 per_cpu(prof_counter, cpu);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001156 }
1157
James Bottomley81c06b12006-10-12 22:25:03 -05001158 update_process_times(user_mode_vm(get_irq_regs()));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001159 }
1160
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001161 if (((1 << cpu) & voyager_extended_vic_processors) == 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001162 /* only extended VIC processors participate in
1163 * interrupt distribution */
1164 return;
1165
1166 /*
1167 * We take the 'long' return path, and there every subsystem
Simon Arlott27b46d72007-10-20 01:13:56 +02001168 * grabs the appropriate locks (kernel lock/ irq lock).
Linus Torvalds1da177e2005-04-16 15:20:36 -07001169 *
1170 * we might want to decouple profiling from the 'long path',
1171 * and do the profiling totally in assembly.
1172 *
1173 * Currently this isn't too much of an issue (performance wise),
1174 * we can take more than 100K local irqs per second on a 100 MHz P5.
1175 */
1176
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001177 if ((++vic_tick[cpu] & 0x7) != 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001178 return;
1179 /* get here every 16 ticks (about every 1/6 of a second) */
1180
1181 /* Change our priority to give someone else a chance at getting
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001182 * the IRQ. The algorithm goes like this:
Linus Torvalds1da177e2005-04-16 15:20:36 -07001183 *
1184 * In the VIC, the dynamically routed interrupt is always
1185 * handled by the lowest priority eligible (i.e. receiving
1186 * interrupts) CPU. If >1 eligible CPUs are equal lowest, the
1187 * lowest processor number gets it.
1188 *
1189 * The priority of a CPU is controlled by a special per-CPU
1190 * VIC priority register which is 3 bits wide 0 being lowest
1191 * and 7 highest priority..
1192 *
1193 * Therefore we subtract the average number of interrupts from
1194 * the number we've fielded. If this number is negative, we
1195 * lower the activity count and if it is positive, we raise
1196 * it.
1197 *
1198 * I'm afraid this still leads to odd looking interrupt counts:
1199 * the totals are all roughly equal, but the individual ones
1200 * look rather skewed.
1201 *
1202 * FIXME: This algorithm is total crap when mixed with SMP
1203 * affinity code since we now try to even up the interrupt
1204 * counts when an affinity binding is keeping them on a
1205 * particular CPU*/
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001206 weight = (vic_intr_count[cpu] * voyager_extended_cpus
Linus Torvalds1da177e2005-04-16 15:20:36 -07001207 - vic_intr_total) >> 4;
1208 weight += 4;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001209 if (weight > 7)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001210 weight = 7;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001211 if (weight < 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001212 weight = 0;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001213
1214 outb((__u8) weight, VIC_PRIORITY_REGISTER);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001215
1216#ifdef VOYAGER_DEBUG
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001217 if ((vic_tick[cpu] & 0xFFF) == 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001218 /* print this message roughly every 25 secs */
1219 printk("VOYAGER SMP: vic_tick[%d] = %lu, weight = %ld\n",
1220 cpu, vic_tick[cpu], weight);
1221 }
1222#endif
1223}
1224
1225/* setup the profiling timer */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001226int setup_profiling_timer(unsigned int multiplier)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001227{
1228 int i;
1229
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001230 if ((!multiplier))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001231 return -EINVAL;
1232
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001233 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07001234 * Set the new multiplier for each CPU. CPUs don't start using the
1235 * new values until the next timer interrupt in which they do process
1236 * accounting.
1237 */
1238 for (i = 0; i < NR_CPUS; ++i)
1239 per_cpu(prof_multiplier, i) = multiplier;
1240
1241 return 0;
1242}
1243
James Bottomleyc7717462006-10-12 22:21:16 -05001244/* This is a bit of a mess, but forced on us by the genirq changes
1245 * there's no genirq handler that really does what voyager wants
1246 * so hack it up with the simple IRQ handler */
Harvey Harrison75604d72008-01-30 13:31:17 +01001247static void handle_vic_irq(unsigned int irq, struct irq_desc *desc)
James Bottomleyc7717462006-10-12 22:21:16 -05001248{
1249 before_handle_vic_irq(irq);
1250 handle_simple_irq(irq, desc);
1251 after_handle_vic_irq(irq);
1252}
1253
Linus Torvalds1da177e2005-04-16 15:20:36 -07001254/* The CPIs are handled in the per cpu 8259s, so they must be
1255 * enabled to be received: FIX: enabling the CPIs in the early
1256 * boot sequence interferes with bug checking; enable them later
1257 * on in smp_init */
1258#define VIC_SET_GATE(cpi, vector) \
1259 set_intr_gate((cpi) + VIC_DEFAULT_CPI_BASE, (vector))
1260#define QIC_SET_GATE(cpi, vector) \
1261 set_intr_gate((cpi) + QIC_DEFAULT_CPI_BASE, (vector))
1262
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001263void __init smp_intr_init(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001264{
1265 int i;
1266
1267 /* initialize the per cpu irq mask to all disabled */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001268 for (i = 0; i < NR_CPUS; i++)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001269 vic_irq_mask[i] = 0xFFFF;
1270
1271 VIC_SET_GATE(VIC_CPI_LEVEL0, vic_cpi_interrupt);
1272
1273 VIC_SET_GATE(VIC_SYS_INT, vic_sys_interrupt);
1274 VIC_SET_GATE(VIC_CMN_INT, vic_cmn_interrupt);
1275
1276 QIC_SET_GATE(QIC_TIMER_CPI, qic_timer_interrupt);
1277 QIC_SET_GATE(QIC_INVALIDATE_CPI, qic_invalidate_interrupt);
1278 QIC_SET_GATE(QIC_RESCHEDULE_CPI, qic_reschedule_interrupt);
1279 QIC_SET_GATE(QIC_ENABLE_IRQ_CPI, qic_enable_irq_interrupt);
1280 QIC_SET_GATE(QIC_CALL_FUNCTION_CPI, qic_call_function_interrupt);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001281
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001282 /* now put the VIC descriptor into the first 48 IRQs
Linus Torvalds1da177e2005-04-16 15:20:36 -07001283 *
1284 * This is for later: first 16 correspond to PC IRQs; next 16
1285 * are Primary MC IRQs and final 16 are Secondary MC IRQs */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001286 for (i = 0; i < 48; i++)
James Bottomleyc7717462006-10-12 22:21:16 -05001287 set_irq_chip_and_handler(i, &vic_chip, handle_vic_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001288}
1289
1290/* send a CPI at level cpi to a set of cpus in cpuset (set 1 bit per
1291 * processor to receive CPI */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001292static void send_CPI(__u32 cpuset, __u8 cpi)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001293{
1294 int cpu;
1295 __u32 quad_cpuset = (cpuset & voyager_quad_processors);
1296
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001297 if (cpi < VIC_START_FAKE_CPI) {
1298 /* fake CPI are only used for booting, so send to the
Linus Torvalds1da177e2005-04-16 15:20:36 -07001299 * extended quads as well---Quads must be VIC booted */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001300 outb((__u8) (cpuset), VIC_CPI_Registers[cpi]);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001301 return;
1302 }
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001303 if (quad_cpuset)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001304 send_QIC_CPI(quad_cpuset, cpi);
1305 cpuset &= ~quad_cpuset;
1306 cpuset &= 0xff; /* only first 8 CPUs vaild for VIC CPI */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001307 if (cpuset == 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001308 return;
1309 for_each_online_cpu(cpu) {
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001310 if (cpuset & (1 << cpu))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001311 set_bit(cpi, &vic_cpi_mailbox[cpu]);
1312 }
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001313 if (cpuset)
1314 outb((__u8) cpuset, VIC_CPI_Registers[VIC_CPI_LEVEL0]);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001315}
1316
1317/* Acknowledge receipt of CPI in the QIC, clear in QIC hardware and
1318 * set the cache line to shared by reading it.
1319 *
1320 * DON'T make this inline otherwise the cache line read will be
1321 * optimised away
1322 * */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001323static int ack_QIC_CPI(__u8 cpi)
1324{
Linus Torvalds1da177e2005-04-16 15:20:36 -07001325 __u8 cpu = hard_smp_processor_id();
1326
1327 cpi &= 7;
1328
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001329 outb(1 << cpi, QIC_INTERRUPT_CLEAR1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001330 return voyager_quad_cpi_addr[cpu]->qic_cpi[cpi].cpi;
1331}
1332
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001333static void ack_special_QIC_CPI(__u8 cpi)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001334{
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001335 switch (cpi) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001336 case VIC_CMN_INT:
1337 outb(QIC_CMN_INT, QIC_INTERRUPT_CLEAR0);
1338 break;
1339 case VIC_SYS_INT:
1340 outb(QIC_SYS_INT, QIC_INTERRUPT_CLEAR0);
1341 break;
1342 }
1343 /* also clear at the VIC, just in case (nop for non-extended proc) */
1344 ack_VIC_CPI(cpi);
1345}
1346
1347/* Acknowledge receipt of CPI in the VIC (essentially an EOI) */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001348static void ack_VIC_CPI(__u8 cpi)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001349{
1350#ifdef VOYAGER_DEBUG
1351 unsigned long flags;
1352 __u16 isr;
1353 __u8 cpu = smp_processor_id();
1354
1355 local_irq_save(flags);
1356 isr = vic_read_isr();
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001357 if ((isr & (1 << (cpi & 7))) == 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001358 printk("VOYAGER SMP: CPU%d lost CPI%d\n", cpu, cpi);
1359 }
1360#endif
1361 /* send specific EOI; the two system interrupts have
1362 * bit 4 set for a separate vector but behave as the
1363 * corresponding 3 bit intr */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001364 outb_p(0x60 | (cpi & 7), 0x20);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001365
1366#ifdef VOYAGER_DEBUG
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001367 if ((vic_read_isr() & (1 << (cpi & 7))) != 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001368 printk("VOYAGER SMP: CPU%d still asserting CPI%d\n", cpu, cpi);
1369 }
1370 local_irq_restore(flags);
1371#endif
1372}
1373
1374/* cribbed with thanks from irq.c */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001375#define __byte(x,y) (((unsigned char *)&(y))[x])
Linus Torvalds1da177e2005-04-16 15:20:36 -07001376#define cached_21(cpu) (__byte(0,vic_irq_mask[cpu]))
1377#define cached_A1(cpu) (__byte(1,vic_irq_mask[cpu]))
1378
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001379static unsigned int startup_vic_irq(unsigned int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001380{
James Bottomleyc7717462006-10-12 22:21:16 -05001381 unmask_vic_irq(irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001382
1383 return 0;
1384}
1385
1386/* The enable and disable routines. This is where we run into
1387 * conflicting architectural philosophy. Fundamentally, the voyager
1388 * architecture does not expect to have to disable interrupts globally
1389 * (the IRQ controllers belong to each CPU). The processor masquerade
1390 * which is used to start the system shouldn't be used in a running OS
1391 * since it will cause great confusion if two separate CPUs drive to
1392 * the same IRQ controller (I know, I've tried it).
1393 *
1394 * The solution is a variant on the NCR lazy SPL design:
1395 *
1396 * 1) To disable an interrupt, do nothing (other than set the
1397 * IRQ_DISABLED flag). This dares the interrupt actually to arrive.
1398 *
1399 * 2) If the interrupt dares to come in, raise the local mask against
1400 * it (this will result in all the CPU masks being raised
1401 * eventually).
1402 *
1403 * 3) To enable the interrupt, lower the mask on the local CPU and
1404 * broadcast an Interrupt enable CPI which causes all other CPUs to
1405 * adjust their masks accordingly. */
1406
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001407static void unmask_vic_irq(unsigned int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001408{
1409 /* linux doesn't to processor-irq affinity, so enable on
1410 * all CPUs we know about */
1411 int cpu = smp_processor_id(), real_cpu;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001412 __u16 mask = (1 << irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001413 __u32 processorList = 0;
1414 unsigned long flags;
1415
James Bottomleyc7717462006-10-12 22:21:16 -05001416 VDEBUG(("VOYAGER: unmask_vic_irq(%d) CPU%d affinity 0x%lx\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -07001417 irq, cpu, cpu_irq_affinity[cpu]));
1418 spin_lock_irqsave(&vic_irq_lock, flags);
1419 for_each_online_cpu(real_cpu) {
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001420 if (!(voyager_extended_vic_processors & (1 << real_cpu)))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001421 continue;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001422 if (!(cpu_irq_affinity[real_cpu] & mask)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001423 /* irq has no affinity for this CPU, ignore */
1424 continue;
1425 }
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001426 if (real_cpu == cpu) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001427 enable_local_vic_irq(irq);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001428 } else if (vic_irq_mask[real_cpu] & mask) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001429 vic_irq_enable_mask[real_cpu] |= mask;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001430 processorList |= (1 << real_cpu);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001431 }
1432 }
1433 spin_unlock_irqrestore(&vic_irq_lock, flags);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001434 if (processorList)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001435 send_CPI(processorList, VIC_ENABLE_IRQ_CPI);
1436}
1437
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001438static void mask_vic_irq(unsigned int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001439{
1440 /* lazy disable, do nothing */
1441}
1442
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001443static void enable_local_vic_irq(unsigned int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001444{
1445 __u8 cpu = smp_processor_id();
1446 __u16 mask = ~(1 << irq);
1447 __u16 old_mask = vic_irq_mask[cpu];
1448
1449 vic_irq_mask[cpu] &= mask;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001450 if (vic_irq_mask[cpu] == old_mask)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001451 return;
1452
1453 VDEBUG(("VOYAGER DEBUG: Enabling irq %d in hardware on CPU %d\n",
1454 irq, cpu));
1455
1456 if (irq & 8) {
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001457 outb_p(cached_A1(cpu), 0xA1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001458 (void)inb_p(0xA1);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001459 } else {
1460 outb_p(cached_21(cpu), 0x21);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001461 (void)inb_p(0x21);
1462 }
1463}
1464
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001465static void disable_local_vic_irq(unsigned int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001466{
1467 __u8 cpu = smp_processor_id();
1468 __u16 mask = (1 << irq);
1469 __u16 old_mask = vic_irq_mask[cpu];
1470
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001471 if (irq == 7)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001472 return;
1473
1474 vic_irq_mask[cpu] |= mask;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001475 if (old_mask == vic_irq_mask[cpu])
Linus Torvalds1da177e2005-04-16 15:20:36 -07001476 return;
1477
1478 VDEBUG(("VOYAGER DEBUG: Disabling irq %d in hardware on CPU %d\n",
1479 irq, cpu));
1480
1481 if (irq & 8) {
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001482 outb_p(cached_A1(cpu), 0xA1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001483 (void)inb_p(0xA1);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001484 } else {
1485 outb_p(cached_21(cpu), 0x21);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001486 (void)inb_p(0x21);
1487 }
1488}
1489
1490/* The VIC is level triggered, so the ack can only be issued after the
1491 * interrupt completes. However, we do Voyager lazy interrupt
1492 * handling here: It is an extremely expensive operation to mask an
1493 * interrupt in the vic, so we merely set a flag (IRQ_DISABLED). If
1494 * this interrupt actually comes in, then we mask and ack here to push
1495 * the interrupt off to another CPU */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001496static void before_handle_vic_irq(unsigned int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001497{
1498 irq_desc_t *desc = irq_desc + irq;
1499 __u8 cpu = smp_processor_id();
1500
1501 _raw_spin_lock(&vic_irq_lock);
1502 vic_intr_total++;
1503 vic_intr_count[cpu]++;
1504
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001505 if (!(cpu_irq_affinity[cpu] & (1 << irq))) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001506 /* The irq is not in our affinity mask, push it off
1507 * onto another CPU */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001508 VDEBUG(("VOYAGER DEBUG: affinity triggered disable of irq %d "
1509 "on cpu %d\n", irq, cpu));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001510 disable_local_vic_irq(irq);
1511 /* set IRQ_INPROGRESS to prevent the handler in irq.c from
1512 * actually calling the interrupt routine */
1513 desc->status |= IRQ_REPLAY | IRQ_INPROGRESS;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001514 } else if (desc->status & IRQ_DISABLED) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001515 /* Damn, the interrupt actually arrived, do the lazy
1516 * disable thing. The interrupt routine in irq.c will
1517 * not handle a IRQ_DISABLED interrupt, so nothing more
1518 * need be done here */
1519 VDEBUG(("VOYAGER DEBUG: lazy disable of irq %d on CPU %d\n",
1520 irq, cpu));
1521 disable_local_vic_irq(irq);
1522 desc->status |= IRQ_REPLAY;
1523 } else {
1524 desc->status &= ~IRQ_REPLAY;
1525 }
1526
1527 _raw_spin_unlock(&vic_irq_lock);
1528}
1529
1530/* Finish the VIC interrupt: basically mask */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001531static void after_handle_vic_irq(unsigned int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001532{
1533 irq_desc_t *desc = irq_desc + irq;
1534
1535 _raw_spin_lock(&vic_irq_lock);
1536 {
1537 unsigned int status = desc->status & ~IRQ_INPROGRESS;
1538#ifdef VOYAGER_DEBUG
1539 __u16 isr;
1540#endif
1541
1542 desc->status = status;
1543 if ((status & IRQ_DISABLED))
1544 disable_local_vic_irq(irq);
1545#ifdef VOYAGER_DEBUG
1546 /* DEBUG: before we ack, check what's in progress */
1547 isr = vic_read_isr();
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001548 if ((isr & (1 << irq) && !(status & IRQ_REPLAY)) == 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001549 int i;
1550 __u8 cpu = smp_processor_id();
1551 __u8 real_cpu;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001552 int mask; /* Um... initialize me??? --RR */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001553
1554 printk("VOYAGER SMP: CPU%d lost interrupt %d\n",
1555 cpu, irq);
KAMEZAWA Hiroyukic8912592006-03-28 01:56:39 -08001556 for_each_possible_cpu(real_cpu, mask) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001557
1558 outb(VIC_CPU_MASQUERADE_ENABLE | real_cpu,
1559 VIC_PROCESSOR_ID);
1560 isr = vic_read_isr();
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001561 if (isr & (1 << irq)) {
1562 printk
1563 ("VOYAGER SMP: CPU%d ack irq %d\n",
1564 real_cpu, irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001565 ack_vic_irq(irq);
1566 }
1567 outb(cpu, VIC_PROCESSOR_ID);
1568 }
1569 }
1570#endif /* VOYAGER_DEBUG */
1571 /* as soon as we ack, the interrupt is eligible for
1572 * receipt by another CPU so everything must be in
1573 * order here */
1574 ack_vic_irq(irq);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001575 if (status & IRQ_REPLAY) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001576 /* replay is set if we disable the interrupt
1577 * in the before_handle_vic_irq() routine, so
1578 * clear the in progress bit here to allow the
1579 * next CPU to handle this correctly */
1580 desc->status &= ~(IRQ_REPLAY | IRQ_INPROGRESS);
1581 }
1582#ifdef VOYAGER_DEBUG
1583 isr = vic_read_isr();
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001584 if ((isr & (1 << irq)) != 0)
1585 printk("VOYAGER SMP: after_handle_vic_irq() after "
1586 "ack irq=%d, isr=0x%x\n", irq, isr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001587#endif /* VOYAGER_DEBUG */
1588 }
1589 _raw_spin_unlock(&vic_irq_lock);
1590
1591 /* All code after this point is out of the main path - the IRQ
1592 * may be intercepted by another CPU if reasserted */
1593}
1594
Linus Torvalds1da177e2005-04-16 15:20:36 -07001595/* Linux processor - interrupt affinity manipulations.
1596 *
1597 * For each processor, we maintain a 32 bit irq affinity mask.
1598 * Initially it is set to all 1's so every processor accepts every
1599 * interrupt. In this call, we change the processor's affinity mask:
1600 *
1601 * Change from enable to disable:
1602 *
1603 * If the interrupt ever comes in to the processor, we will disable it
1604 * and ack it to push it off to another CPU, so just accept the mask here.
1605 *
1606 * Change from disable to enable:
1607 *
1608 * change the mask and then do an interrupt enable CPI to re-enable on
1609 * the selected processors */
1610
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001611void set_vic_irq_affinity(unsigned int irq, cpumask_t mask)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001612{
1613 /* Only extended processors handle interrupts */
1614 unsigned long real_mask;
1615 unsigned long irq_mask = 1 << irq;
1616 int cpu;
1617
1618 real_mask = cpus_addr(mask)[0] & voyager_extended_vic_processors;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001619
1620 if (cpus_addr(mask)[0] == 0)
Simon Arlott27b46d72007-10-20 01:13:56 +02001621 /* can't have no CPUs to accept the interrupt -- extremely
Linus Torvalds1da177e2005-04-16 15:20:36 -07001622 * bad things will happen */
1623 return;
1624
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001625 if (irq == 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001626 /* can't change the affinity of the timer IRQ. This
1627 * is due to the constraint in the voyager
1628 * architecture that the CPI also comes in on and IRQ
1629 * line and we have chosen IRQ0 for this. If you
1630 * raise the mask on this interrupt, the processor
1631 * will no-longer be able to accept VIC CPIs */
1632 return;
1633
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001634 if (irq >= 32)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001635 /* You can only have 32 interrupts in a voyager system
1636 * (and 32 only if you have a secondary microchannel
1637 * bus) */
1638 return;
1639
1640 for_each_online_cpu(cpu) {
1641 unsigned long cpu_mask = 1 << cpu;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001642
1643 if (cpu_mask & real_mask) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001644 /* enable the interrupt for this cpu */
1645 cpu_irq_affinity[cpu] |= irq_mask;
1646 } else {
1647 /* disable the interrupt for this cpu */
1648 cpu_irq_affinity[cpu] &= ~irq_mask;
1649 }
1650 }
1651 /* this is magic, we now have the correct affinity maps, so
1652 * enable the interrupt. This will send an enable CPI to
Simon Arlott27b46d72007-10-20 01:13:56 +02001653 * those CPUs who need to enable it in their local masks,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001654 * causing them to correct for the new affinity . If the
1655 * interrupt is currently globally disabled, it will simply be
1656 * disabled again as it comes in (voyager lazy disable). If
1657 * the affinity map is tightened to disable the interrupt on a
1658 * cpu, it will be pushed off when it comes in */
James Bottomleyc7717462006-10-12 22:21:16 -05001659 unmask_vic_irq(irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001660}
1661
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001662static void ack_vic_irq(unsigned int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001663{
1664 if (irq & 8) {
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001665 outb(0x62, 0x20); /* Specific EOI to cascade */
1666 outb(0x60 | (irq & 7), 0xA0);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001667 } else {
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001668 outb(0x60 | (irq & 7), 0x20);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001669 }
1670}
1671
1672/* enable the CPIs. In the VIC, the CPIs are delivered by the 8259
1673 * but are not vectored by it. This means that the 8259 mask must be
1674 * lowered to receive them */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001675static __init void vic_enable_cpi(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001676{
1677 __u8 cpu = smp_processor_id();
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001678
Linus Torvalds1da177e2005-04-16 15:20:36 -07001679 /* just take a copy of the current mask (nop for boot cpu) */
1680 vic_irq_mask[cpu] = vic_irq_mask[boot_cpu_id];
1681
1682 enable_local_vic_irq(VIC_CPI_LEVEL0);
1683 enable_local_vic_irq(VIC_CPI_LEVEL1);
1684 /* for sys int and cmn int */
1685 enable_local_vic_irq(7);
1686
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001687 if (is_cpu_quad()) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001688 outb(QIC_DEFAULT_MASK0, QIC_MASK_REGISTER0);
1689 outb(QIC_CPI_ENABLE, QIC_MASK_REGISTER1);
1690 VDEBUG(("VOYAGER SMP: QIC ENABLE CPI: CPU%d: MASK 0x%x\n",
1691 cpu, QIC_CPI_ENABLE));
1692 }
1693
1694 VDEBUG(("VOYAGER SMP: ENABLE CPI: CPU%d: MASK 0x%x\n",
1695 cpu, vic_irq_mask[cpu]));
1696}
1697
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001698void voyager_smp_dump()
Linus Torvalds1da177e2005-04-16 15:20:36 -07001699{
1700 int old_cpu = smp_processor_id(), cpu;
1701
1702 /* dump the interrupt masks of each processor */
1703 for_each_online_cpu(cpu) {
1704 __u16 imr, isr, irr;
1705 unsigned long flags;
1706
1707 local_irq_save(flags);
1708 outb(VIC_CPU_MASQUERADE_ENABLE | cpu, VIC_PROCESSOR_ID);
1709 imr = (inb(0xa1) << 8) | inb(0x21);
1710 outb(0x0a, 0xa0);
1711 irr = inb(0xa0) << 8;
1712 outb(0x0a, 0x20);
1713 irr |= inb(0x20);
1714 outb(0x0b, 0xa0);
1715 isr = inb(0xa0) << 8;
1716 outb(0x0b, 0x20);
1717 isr |= inb(0x20);
1718 outb(old_cpu, VIC_PROCESSOR_ID);
1719 local_irq_restore(flags);
1720 printk("\tCPU%d: mask=0x%x, IMR=0x%x, IRR=0x%x, ISR=0x%x\n",
1721 cpu, vic_irq_mask[cpu], imr, irr, isr);
1722#if 0
1723 /* These lines are put in to try to unstick an un ack'd irq */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001724 if (isr != 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001725 int irq;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001726 for (irq = 0; irq < 16; irq++) {
1727 if (isr & (1 << irq)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001728 printk("\tCPU%d: ack irq %d\n",
1729 cpu, irq);
1730 local_irq_save(flags);
1731 outb(VIC_CPU_MASQUERADE_ENABLE | cpu,
1732 VIC_PROCESSOR_ID);
1733 ack_vic_irq(irq);
1734 outb(old_cpu, VIC_PROCESSOR_ID);
1735 local_irq_restore(flags);
1736 }
1737 }
1738 }
1739#endif
1740 }
1741}
1742
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001743void smp_voyager_power_off(void *dummy)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001744{
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001745 if (smp_processor_id() == boot_cpu_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001746 voyager_power_off();
1747 else
1748 smp_stop_cpu_function(NULL);
1749}
1750
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001751static void __init voyager_smp_prepare_cpus(unsigned int max_cpus)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001752{
1753 /* FIXME: ignore max_cpus for now */
1754 smp_boot_cpus();
1755}
1756
Randy Dunlap8f818212007-11-11 21:06:45 -08001757static void __cpuinit voyager_smp_prepare_boot_cpu(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001758{
Jeremy Fitzhardinge6a3ee3d2007-05-15 01:41:59 -07001759 init_gdt(smp_processor_id());
1760 switch_to_new_gdt();
1761
Linus Torvalds1da177e2005-04-16 15:20:36 -07001762 cpu_set(smp_processor_id(), cpu_online_map);
1763 cpu_set(smp_processor_id(), cpu_callout_map);
Zwane Mwaikambo4ad8d382005-09-03 15:56:51 -07001764 cpu_set(smp_processor_id(), cpu_possible_map);
James Bottomley3c101cf2006-06-26 21:33:09 -05001765 cpu_set(smp_processor_id(), cpu_present_map);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001766}
1767
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001768static int __cpuinit voyager_cpu_up(unsigned int cpu)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001769{
1770 /* This only works at boot for x86. See "rewrite" above. */
1771 if (cpu_isset(cpu, smp_commenced_mask))
1772 return -ENOSYS;
1773
1774 /* In case one didn't come up */
1775 if (!cpu_isset(cpu, cpu_callin_map))
1776 return -EIO;
1777 /* Unleash the CPU! */
1778 cpu_set(cpu, smp_commenced_mask);
Akinobu Mita7c04e642008-04-19 23:55:17 +09001779 while (!cpu_online(cpu))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001780 mb();
1781 return 0;
1782}
1783
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001784static void __init voyager_smp_cpus_done(unsigned int max_cpus)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001785{
1786 zap_low_mappings();
1787}
Andrew Morton033ab7f2006-06-30 01:55:50 -07001788
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001789void __init smp_setup_processor_id(void)
Andrew Morton033ab7f2006-06-30 01:55:50 -07001790{
1791 current_thread_info()->cpu = hard_smp_processor_id();
Jeremy Fitzhardinge6a3ee3d2007-05-15 01:41:59 -07001792 x86_write_percpu(cpu_number, hard_smp_processor_id());
Andrew Morton033ab7f2006-06-30 01:55:50 -07001793}
Jeremy Fitzhardinge6a3ee3d2007-05-15 01:41:59 -07001794
1795struct smp_ops smp_ops = {
1796 .smp_prepare_boot_cpu = voyager_smp_prepare_boot_cpu,
1797 .smp_prepare_cpus = voyager_smp_prepare_cpus,
1798 .cpu_up = voyager_cpu_up,
1799 .smp_cpus_done = voyager_smp_cpus_done,
1800
1801 .smp_send_stop = voyager_smp_send_stop,
1802 .smp_send_reschedule = voyager_smp_send_reschedule,
Jens Axboe3b16cf82008-06-26 11:21:54 +02001803
1804 .send_call_func_ipi = native_send_call_func_ipi,
1805 .send_call_func_single_ipi = native_send_call_func_single_ipi,
Jeremy Fitzhardinge6a3ee3d2007-05-15 01:41:59 -07001806};