blob: 2201f2aaa9a05208d1e765bf437138691cf0c077 [file] [log] [blame]
Thomas Gleixnere6bea9c2011-02-09 13:16:52 +01001/*
2 * Internal header to deal with irq_desc->status which will be renamed
3 * to irq_desc->settings.
4 */
5enum {
6 _IRQ_DEFAULT_INIT_FLAGS = IRQ_DEFAULT_INIT_FLAGS,
Thomas Gleixnera0056772011-02-08 17:11:03 +01007 _IRQ_PER_CPU = IRQ_PER_CPU,
Thomas Gleixner876dbd42011-02-08 17:28:12 +01008 _IRQ_LEVEL = IRQ_LEVEL,
Thomas Gleixnera0056772011-02-08 17:11:03 +01009 _IRQ_NO_BALANCING = IRQ_NO_BALANCING,
10 _IRQF_MODIFY_MASK = IRQF_MODIFY_MASK,
Thomas Gleixnere6bea9c2011-02-09 13:16:52 +010011};
Thomas Gleixner009b4c32011-02-07 21:48:49 +010012
13#undef IRQ_INPROGRESS
14#define IRQ_INPROGRESS GOT_YOU_MORON
Thomas Gleixner163ef302011-02-08 11:39:15 +010015#undef IRQ_REPLAY
16#define IRQ_REPLAY GOT_YOU_MORON
17#undef IRQ_WAITING
18#define IRQ_WAITING GOT_YOU_MORON
Thomas Gleixnerc1594b72011-02-07 22:11:30 +010019#undef IRQ_DISABLED
20#define IRQ_DISABLED GOT_YOU_MORON
Thomas Gleixner2a0d6fb2011-02-08 12:17:57 +010021#undef IRQ_PENDING
22#define IRQ_PENDING GOT_YOU_MORON
Thomas Gleixner6e402622011-02-08 12:36:06 +010023#undef IRQ_MASKED
24#define IRQ_MASKED GOT_YOU_MORON
Thomas Gleixner6d2cd172011-02-08 14:34:18 +010025#undef IRQ_WAKEUP
26#define IRQ_WAKEUP GOT_YOU_MORON
Thomas Gleixnerf230b6d2011-02-05 15:20:04 +010027#undef IRQ_MOVE_PENDING
28#define IRQ_MOVE_PENDING GOT_YOU_MORON
Thomas Gleixnera0056772011-02-08 17:11:03 +010029#undef IRQ_PER_CPU
30#define IRQ_PER_CPU GOT_YOU_MORON
31#undef IRQ_NO_BALANCING
32#define IRQ_NO_BALANCING GOT_YOU_MORON
Thomas Gleixner2bdd1052011-02-08 17:22:00 +010033#undef IRQ_AFFINITY_SET
34#define IRQ_AFFINITY_SET GOT_YOU_MORON
Thomas Gleixner876dbd42011-02-08 17:28:12 +010035#undef IRQ_LEVEL
36#define IRQ_LEVEL GOT_YOU_MORON
Thomas Gleixnera0056772011-02-08 17:11:03 +010037#undef IRQF_MODIFY_MASK
38#define IRQF_MODIFY_MASK GOT_YOU_MORON
39
40static inline void
41irq_settings_clr_and_set(struct irq_desc *desc, u32 clr, u32 set)
42{
43 desc->status &= ~(clr & _IRQF_MODIFY_MASK);
44 desc->status |= (set & _IRQF_MODIFY_MASK);
45}
46
47static inline bool irq_settings_is_per_cpu(struct irq_desc *desc)
48{
49 return desc->status & _IRQ_PER_CPU;
50}
51
52static inline void irq_settings_set_per_cpu(struct irq_desc *desc)
53{
54 desc->status |= _IRQ_PER_CPU;
55}
56
57static inline void irq_settings_set_no_balancing(struct irq_desc *desc)
58{
59 desc->status |= _IRQ_NO_BALANCING;
60}
61
62static inline bool irq_settings_has_no_balance_set(struct irq_desc *desc)
63{
64 return desc->status & _IRQ_NO_BALANCING;
65}
Thomas Gleixner876dbd42011-02-08 17:28:12 +010066
67static inline u32 irq_settings_get_trigger_mask(struct irq_desc *desc)
68{
69 return desc->status & IRQ_TYPE_SENSE_MASK;
70}
71
72static inline void
73irq_settings_set_trigger_mask(struct irq_desc *desc, u32 mask)
74{
75 desc->status &= ~IRQ_TYPE_SENSE_MASK;
76 desc->status |= mask & IRQ_TYPE_SENSE_MASK;
77}
78
79static inline bool irq_settings_is_level(struct irq_desc *desc)
80{
81 return desc->status & _IRQ_LEVEL;
82}
83
84static inline void irq_settings_clr_level(struct irq_desc *desc)
85{
86 desc->status &= ~_IRQ_LEVEL;
87}
88
89static inline void irq_settings_set_level(struct irq_desc *desc)
90{
91 desc->status |= _IRQ_LEVEL;
92}