blob: 66ecf2f105cea99c1db83909b1d6e30fdc080556 [file] [log] [blame]
Jeyaprakash Soundrapandiana7203372013-01-21 17:57:41 -08001/* Copyright (c) 2009-2013, The Linux Foundation. All rights reserved.
Lokesh Kumar Aakulu893778c2013-03-02 05:29:44 +05302*
Kiran Kumar H Ndd128472011-12-01 09:35:34 -08003 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070013#ifndef __LINUX_MSM_CAMERA_H
14#define __LINUX_MSM_CAMERA_H
15
16#ifdef MSM_CAMERA_BIONIC
17#include <sys/types.h>
18#endif
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -080019#include <linux/videodev2.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070020#include <linux/types.h>
21#include <linux/ioctl.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070022#ifdef __KERNEL__
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070023#include <linux/cdev.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070024#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070025#ifdef MSM_CAMERA_GCC
26#include <time.h>
27#else
28#include <linux/time.h>
29#endif
30
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -080031#include <linux/msm_ion.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070032
Nishant Pandit5dd54422012-06-26 22:52:44 +053033#define BIT(nr) (1UL << (nr))
34
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070035#define MSM_CAM_IOCTL_MAGIC 'm'
36
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -080037#define MAX_SERVER_PAYLOAD_LENGTH 8192
38
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070039#define MSM_CAM_IOCTL_GET_SENSOR_INFO \
40 _IOR(MSM_CAM_IOCTL_MAGIC, 1, struct msm_camsensor_info *)
41
42#define MSM_CAM_IOCTL_REGISTER_PMEM \
43 _IOW(MSM_CAM_IOCTL_MAGIC, 2, struct msm_pmem_info *)
44
45#define MSM_CAM_IOCTL_UNREGISTER_PMEM \
46 _IOW(MSM_CAM_IOCTL_MAGIC, 3, unsigned)
47
48#define MSM_CAM_IOCTL_CTRL_COMMAND \
49 _IOW(MSM_CAM_IOCTL_MAGIC, 4, struct msm_ctrl_cmd *)
50
51#define MSM_CAM_IOCTL_CONFIG_VFE \
52 _IOW(MSM_CAM_IOCTL_MAGIC, 5, struct msm_camera_vfe_cfg_cmd *)
53
54#define MSM_CAM_IOCTL_GET_STATS \
55 _IOR(MSM_CAM_IOCTL_MAGIC, 6, struct msm_camera_stats_event_ctrl *)
56
57#define MSM_CAM_IOCTL_GETFRAME \
58 _IOR(MSM_CAM_IOCTL_MAGIC, 7, struct msm_camera_get_frame *)
59
60#define MSM_CAM_IOCTL_ENABLE_VFE \
61 _IOW(MSM_CAM_IOCTL_MAGIC, 8, struct camera_enable_cmd *)
62
63#define MSM_CAM_IOCTL_CTRL_CMD_DONE \
64 _IOW(MSM_CAM_IOCTL_MAGIC, 9, struct camera_cmd *)
65
66#define MSM_CAM_IOCTL_CONFIG_CMD \
67 _IOW(MSM_CAM_IOCTL_MAGIC, 10, struct camera_cmd *)
68
69#define MSM_CAM_IOCTL_DISABLE_VFE \
70 _IOW(MSM_CAM_IOCTL_MAGIC, 11, struct camera_enable_cmd *)
71
72#define MSM_CAM_IOCTL_PAD_REG_RESET2 \
73 _IOW(MSM_CAM_IOCTL_MAGIC, 12, struct camera_enable_cmd *)
74
75#define MSM_CAM_IOCTL_VFE_APPS_RESET \
76 _IOW(MSM_CAM_IOCTL_MAGIC, 13, struct camera_enable_cmd *)
77
78#define MSM_CAM_IOCTL_RELEASE_FRAME_BUFFER \
79 _IOW(MSM_CAM_IOCTL_MAGIC, 14, struct camera_enable_cmd *)
80
81#define MSM_CAM_IOCTL_RELEASE_STATS_BUFFER \
82 _IOW(MSM_CAM_IOCTL_MAGIC, 15, struct msm_stats_buf *)
83
84#define MSM_CAM_IOCTL_AXI_CONFIG \
85 _IOW(MSM_CAM_IOCTL_MAGIC, 16, struct msm_camera_vfe_cfg_cmd *)
86
87#define MSM_CAM_IOCTL_GET_PICTURE \
88 _IOW(MSM_CAM_IOCTL_MAGIC, 17, struct msm_frame *)
89
90#define MSM_CAM_IOCTL_SET_CROP \
91 _IOW(MSM_CAM_IOCTL_MAGIC, 18, struct crop_info *)
92
93#define MSM_CAM_IOCTL_PICT_PP \
94 _IOW(MSM_CAM_IOCTL_MAGIC, 19, uint8_t *)
95
96#define MSM_CAM_IOCTL_PICT_PP_DONE \
97 _IOW(MSM_CAM_IOCTL_MAGIC, 20, struct msm_snapshot_pp_status *)
98
99#define MSM_CAM_IOCTL_SENSOR_IO_CFG \
100 _IOW(MSM_CAM_IOCTL_MAGIC, 21, struct sensor_cfg_data *)
101
102#define MSM_CAM_IOCTL_FLASH_LED_CFG \
103 _IOW(MSM_CAM_IOCTL_MAGIC, 22, unsigned *)
104
105#define MSM_CAM_IOCTL_UNBLOCK_POLL_FRAME \
106 _IO(MSM_CAM_IOCTL_MAGIC, 23)
107
108#define MSM_CAM_IOCTL_CTRL_COMMAND_2 \
109 _IOW(MSM_CAM_IOCTL_MAGIC, 24, struct msm_ctrl_cmd *)
110
111#define MSM_CAM_IOCTL_AF_CTRL \
112 _IOR(MSM_CAM_IOCTL_MAGIC, 25, struct msm_ctrl_cmt_t *)
113
114#define MSM_CAM_IOCTL_AF_CTRL_DONE \
115 _IOW(MSM_CAM_IOCTL_MAGIC, 26, struct msm_ctrl_cmt_t *)
116
117#define MSM_CAM_IOCTL_CONFIG_VPE \
118 _IOW(MSM_CAM_IOCTL_MAGIC, 27, struct msm_camera_vpe_cfg_cmd *)
119
120#define MSM_CAM_IOCTL_AXI_VPE_CONFIG \
121 _IOW(MSM_CAM_IOCTL_MAGIC, 28, struct msm_camera_vpe_cfg_cmd *)
122
123#define MSM_CAM_IOCTL_STROBE_FLASH_CFG \
124 _IOW(MSM_CAM_IOCTL_MAGIC, 29, uint32_t *)
125
126#define MSM_CAM_IOCTL_STROBE_FLASH_CHARGE \
127 _IOW(MSM_CAM_IOCTL_MAGIC, 30, uint32_t *)
128
129#define MSM_CAM_IOCTL_STROBE_FLASH_RELEASE \
130 _IO(MSM_CAM_IOCTL_MAGIC, 31)
131
132#define MSM_CAM_IOCTL_FLASH_CTRL \
133 _IOW(MSM_CAM_IOCTL_MAGIC, 32, struct flash_ctrl_data *)
134
135#define MSM_CAM_IOCTL_ERROR_CONFIG \
136 _IOW(MSM_CAM_IOCTL_MAGIC, 33, uint32_t *)
137
138#define MSM_CAM_IOCTL_ABORT_CAPTURE \
139 _IO(MSM_CAM_IOCTL_MAGIC, 34)
140
141#define MSM_CAM_IOCTL_SET_FD_ROI \
142 _IOW(MSM_CAM_IOCTL_MAGIC, 35, struct fd_roi_info *)
143
144#define MSM_CAM_IOCTL_GET_CAMERA_INFO \
145 _IOR(MSM_CAM_IOCTL_MAGIC, 36, struct msm_camera_info *)
146
147#define MSM_CAM_IOCTL_UNBLOCK_POLL_PIC_FRAME \
148 _IO(MSM_CAM_IOCTL_MAGIC, 37)
149
150#define MSM_CAM_IOCTL_RELEASE_PIC_BUFFER \
151 _IOW(MSM_CAM_IOCTL_MAGIC, 38, struct camera_enable_cmd *)
152
153#define MSM_CAM_IOCTL_PUT_ST_FRAME \
154 _IOW(MSM_CAM_IOCTL_MAGIC, 39, struct msm_camera_st_frame *)
155
Mansoor Aftab5d418372011-07-26 17:01:26 -0700156#define MSM_CAM_IOCTL_V4L2_EVT_NOTIFY \
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800157 _IOW(MSM_CAM_IOCTL_MAGIC, 40, struct v4l2_event_and_payload)
Mansoor Aftab5d418372011-07-26 17:01:26 -0700158
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700159#define MSM_CAM_IOCTL_SET_MEM_MAP_INFO \
Kevin Chan94b4c832012-03-02 21:27:16 -0800160 _IOR(MSM_CAM_IOCTL_MAGIC, 41, struct msm_mem_map_info *)
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700161
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -0700162#define MSM_CAM_IOCTL_ACTUATOR_IO_CFG \
Kevin Chan94b4c832012-03-02 21:27:16 -0800163 _IOW(MSM_CAM_IOCTL_MAGIC, 42, struct msm_actuator_cfg_data *)
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -0700164
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700165#define MSM_CAM_IOCTL_MCTL_POST_PROC \
Kevin Chan94b4c832012-03-02 21:27:16 -0800166 _IOW(MSM_CAM_IOCTL_MAGIC, 43, struct msm_mctl_post_proc_cmd *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700167
168#define MSM_CAM_IOCTL_RESERVE_FREE_FRAME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800169 _IOW(MSM_CAM_IOCTL_MAGIC, 44, struct msm_cam_evt_divert_frame *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700170
171#define MSM_CAM_IOCTL_RELEASE_FREE_FRAME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800172 _IOR(MSM_CAM_IOCTL_MAGIC, 45, struct msm_cam_evt_divert_frame *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700173
Mingcheng Zhu8feaa3f2011-11-23 11:33:52 -0800174#define MSM_CAM_IOCTL_PICT_PP_DIVERT_DONE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800175 _IOR(MSM_CAM_IOCTL_MAGIC, 46, struct msm_pp_frame *)
Mingcheng Zhu8feaa3f2011-11-23 11:33:52 -0800176
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800177#define MSM_CAM_IOCTL_SENSOR_V4l2_S_CTRL \
Kevin Chan94b4c832012-03-02 21:27:16 -0800178 _IOR(MSM_CAM_IOCTL_MAGIC, 47, struct v4l2_control)
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800179
180#define MSM_CAM_IOCTL_SENSOR_V4l2_QUERY_CTRL \
Kevin Chan94b4c832012-03-02 21:27:16 -0800181 _IOR(MSM_CAM_IOCTL_MAGIC, 48, struct v4l2_queryctrl)
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800182
Guruprasad Gaonkar4c7758f2011-12-16 17:30:00 -0800183#define MSM_CAM_IOCTL_GET_KERNEL_SYSTEM_TIME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800184 _IOW(MSM_CAM_IOCTL_MAGIC, 49, struct timeval *)
Guruprasad Gaonkar4c7758f2011-12-16 17:30:00 -0800185
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800186#define MSM_CAM_IOCTL_SET_VFE_OUTPUT_TYPE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800187 _IOW(MSM_CAM_IOCTL_MAGIC, 50, uint32_t *)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800188
189#define MSM_CAM_IOCTL_MCTL_DIVERT_DONE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800190 _IOR(MSM_CAM_IOCTL_MAGIC, 51, struct msm_cam_evt_divert_frame *)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800191
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800192#define MSM_CAM_IOCTL_GET_ACTUATOR_INFO \
Kevin Chan94b4c832012-03-02 21:27:16 -0800193 _IOW(MSM_CAM_IOCTL_MAGIC, 52, struct msm_actuator_cfg_data *)
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800194
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700195#define MSM_CAM_IOCTL_EEPROM_IO_CFG \
196 _IOW(MSM_CAM_IOCTL_MAGIC, 53, struct msm_eeprom_cfg_data *)
197
Nishant Panditb2157c92012-04-25 01:09:28 +0530198#define MSM_CAM_IOCTL_ISPIF_IO_CFG \
199 _IOR(MSM_CAM_IOCTL_MAGIC, 54, struct ispif_cfg_data *)
200
Brian Muramatsu6d869492012-08-01 22:46:50 -0700201#define MSM_CAM_IOCTL_STATS_REQBUF \
202 _IOR(MSM_CAM_IOCTL_MAGIC, 55, struct msm_stats_reqbuf *)
203
204#define MSM_CAM_IOCTL_STATS_ENQUEUEBUF \
205 _IOR(MSM_CAM_IOCTL_MAGIC, 56, struct msm_stats_buf_info *)
206
207#define MSM_CAM_IOCTL_STATS_FLUSH_BUFQ \
208 _IOR(MSM_CAM_IOCTL_MAGIC, 57, struct msm_stats_flush_bufq *)
209
Ankit Premrajka4b3443f2012-06-11 14:06:31 -0700210#define MSM_CAM_IOCTL_SET_MCTL_SDEV \
211 _IOW(MSM_CAM_IOCTL_MAGIC, 58, struct msm_mctl_set_sdev_data *)
212
213#define MSM_CAM_IOCTL_UNSET_MCTL_SDEV \
214 _IOW(MSM_CAM_IOCTL_MAGIC, 59, struct msm_mctl_set_sdev_data *)
215
Kiran Kumar H N90785902012-07-05 13:59:38 -0700216#define MSM_CAM_IOCTL_GET_INST_HANDLE \
217 _IOR(MSM_CAM_IOCTL_MAGIC, 60, uint32_t *)
218
Lakshmi Narayana Kalavala58243db2012-07-24 00:06:27 -0700219#define MSM_CAM_IOCTL_STATS_UNREG_BUF \
220 _IOR(MSM_CAM_IOCTL_MAGIC, 61, struct msm_stats_flush_bufq *)
221
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800222#define MSM_CAM_IOCTL_CSIC_IO_CFG \
223 _IOWR(MSM_CAM_IOCTL_MAGIC, 62, struct csic_cfg_data *)
224
225#define MSM_CAM_IOCTL_CSID_IO_CFG \
226 _IOWR(MSM_CAM_IOCTL_MAGIC, 63, struct csid_cfg_data *)
227
228#define MSM_CAM_IOCTL_CSIPHY_IO_CFG \
229 _IOR(MSM_CAM_IOCTL_MAGIC, 64, struct csiphy_cfg_data *)
230
231#define MSM_CAM_IOCTL_OEM \
232 _IOW(MSM_CAM_IOCTL_MAGIC, 65, struct sensor_cfg_data *)
233
234#define MSM_CAM_IOCTL_AXI_INIT \
235 _IOWR(MSM_CAM_IOCTL_MAGIC, 66, uint8_t *)
236
237#define MSM_CAM_IOCTL_AXI_RELEASE \
238 _IO(MSM_CAM_IOCTL_MAGIC, 67)
239
240#define MSM_CAM_IOCTL_V4L2_EVT_NATIVE_CMD \
241 _IOWR(MSM_CAM_IOCTL_MAGIC, 68, struct msm_camera_v4l2_ioctl_t)
242
243#define MSM_CAM_IOCTL_V4L2_EVT_NATIVE_FRONT_CMD \
244 _IOWR(MSM_CAM_IOCTL_MAGIC, 69, struct msm_camera_v4l2_ioctl_t)
245
Nishant Panditd74a62d2012-12-13 14:22:31 +0530246#define MSM_CAM_IOCTL_AXI_LOW_POWER_MODE \
247 _IOWR(MSM_CAM_IOCTL_MAGIC, 70, uint8_t *)
248
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800249#define MSM_CAM_IOCTL_INTF_MCTL_MAPPING_CFG \
Nishant Panditd74a62d2012-12-13 14:22:31 +0530250 _IOR(MSM_CAM_IOCTL_MAGIC, 71, struct intf_mctl_mapping_cfg *)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800251
252struct ioctl_native_cmd {
253 unsigned short mode;
254 unsigned short address;
255 unsigned short value_1;
256 unsigned short value_2;
257 unsigned short value_3;
258};
259
260struct v4l2_event_and_payload {
261 struct v4l2_event evt;
262 uint32_t payload_length;
263 uint32_t transaction_id;
264 void *payload;
265};
Lakshmi Narayana Kalavala58243db2012-07-24 00:06:27 -0700266
Brian Muramatsu6d869492012-08-01 22:46:50 -0700267struct msm_stats_reqbuf {
268 int num_buf; /* how many buffers requested */
269 int stats_type; /* stats type */
270};
271
272struct msm_stats_flush_bufq {
273 int stats_type; /* enum msm_stats_enum_type */
274};
275
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700276struct msm_mctl_pp_cmd {
277 int32_t id;
278 uint16_t length;
279 void *value;
280};
281
282struct msm_mctl_post_proc_cmd {
283 int32_t type;
284 struct msm_mctl_pp_cmd cmd;
285};
286
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700287#define MSM_CAMERA_LED_OFF 0
288#define MSM_CAMERA_LED_LOW 1
289#define MSM_CAMERA_LED_HIGH 2
Nishant Pandit474f2252011-07-23 23:17:56 +0530290#define MSM_CAMERA_LED_INIT 3
291#define MSM_CAMERA_LED_RELEASE 4
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700292
293#define MSM_CAMERA_STROBE_FLASH_NONE 0
294#define MSM_CAMERA_STROBE_FLASH_XENON 1
295
296#define MSM_MAX_CAMERA_SENSORS 5
297#define MAX_SENSOR_NAME 32
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800298#define MAX_CAM_NAME_SIZE 32
299#define MAX_ACT_MOD_NAME_SIZE 32
300#define MAX_ACT_NAME_SIZE 32
301#define NUM_ACTUATOR_DIR 2
302#define MAX_ACTUATOR_SCENARIO 8
303#define MAX_ACTUATOR_REGION 5
304#define MAX_ACTUATOR_INIT_SET 12
305#define MAX_ACTUATOR_TYPE_SIZE 32
306#define MAX_ACTUATOR_REG_TBL_SIZE 8
307
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700308
309#define MSM_MAX_CAMERA_CONFIGS 2
310
Jeyaprakash Soundrapandian253dd0a2013-02-05 21:52:52 -0800311#define PP_SNAP BIT(0)
312#define PP_RAW_SNAP BIT(1)
313#define PP_PREV BIT(2)
314#define PP_THUMB BIT(3)
315#define PP_RDI BIT(4)
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800316#define PP_MASK (PP_SNAP|PP_RAW_SNAP|PP_PREV|PP_THUMB)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700317
318#define MSM_CAM_CTRL_CMD_DONE 0
319#define MSM_CAM_SENSOR_VFE_CMD 1
320
Kiran Kumar H Nceea7622011-08-23 14:01:03 -0700321/* Should be same as VIDEO_MAX_PLANES in videodev2.h */
322#define MAX_PLANES 8
323
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700324/*****************************************************
325 * structure
326 *****************************************************/
327
328/* define five type of structures for userspace <==> kernel
329 * space communication:
330 * command 1 - 2 are from userspace ==> kernel
331 * command 3 - 4 are from kernel ==> userspace
332 *
333 * 1. control command: control command(from control thread),
334 * control status (from config thread);
335 */
336struct msm_ctrl_cmd {
337 uint16_t type;
338 uint16_t length;
339 void *value;
340 uint16_t status;
341 uint32_t timeout_ms;
342 int resp_fd; /* FIXME: to be used by the kernel, pass-through for now */
343 int vnode_id; /* video dev id. Can we overload resp_fd? */
Kevin Chan94b4c832012-03-02 21:27:16 -0800344 int queue_idx;
345 uint32_t evt_id;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700346 uint32_t stream_type; /* used to pass value to qcamera server */
Ankit Premrajkaf94bcc62011-08-22 15:23:53 -0700347 int config_ident; /*used as identifier for config node*/
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700348};
349
350struct msm_cam_evt_msg {
351 unsigned short type; /* 1 == event (RPC), 0 == message (adsp) */
352 unsigned short msg_id;
353 unsigned int len; /* size in, number of bytes out */
354 uint32_t frame_id;
355 void *data;
Ninad Mahimkaree55c192012-04-25 14:36:17 -0700356 struct timespec timestamp;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700357};
358
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700359struct msm_pp_frame_sp {
360 /* phy addr of the buffer */
361 unsigned long phy_addr;
362 uint32_t y_off;
363 uint32_t cbcr_off;
364 /* buffer length */
365 uint32_t length;
366 int32_t fd;
367 uint32_t addr_offset;
368 /* mapped addr */
369 unsigned long vaddr;
370};
371
372struct msm_pp_frame_mp {
373 /* phy addr of the plane */
374 unsigned long phy_addr;
375 /* offset of plane data */
376 uint32_t data_offset;
377 /* plane length */
378 uint32_t length;
379 int32_t fd;
380 uint32_t addr_offset;
381 /* mapped addr */
382 unsigned long vaddr;
383};
384
385struct msm_pp_frame {
386 uint32_t handle; /* stores vb cookie */
387 uint32_t frame_id;
Kevin Chan318d7cb2011-11-29 14:24:26 -0800388 unsigned short buf_idx;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700389 int path;
390 unsigned short image_type;
391 unsigned short num_planes; /* 1 for sp */
392 struct timeval timestamp;
393 union {
394 struct msm_pp_frame_sp sp;
395 struct msm_pp_frame_mp mp[MAX_PLANES];
396 };
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800397 int node_type;
Kiran Kumar H N90785902012-07-05 13:59:38 -0700398 uint32_t inst_handle;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700399};
400
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800401struct msm_pp_crop {
402 uint32_t src_x;
403 uint32_t src_y;
404 uint32_t src_w;
405 uint32_t src_h;
406 uint32_t dst_x;
407 uint32_t dst_y;
408 uint32_t dst_w;
409 uint32_t dst_h;
410 uint8_t update_flag;
411};
412
413struct msm_mctl_pp_frame_cmd {
414 uint32_t cookie;
415 uint8_t vpe_output_action;
416 struct msm_pp_frame src_frame;
417 struct msm_pp_frame dest_frame;
418 struct msm_pp_crop crop;
419 int path;
420};
421
Mingcheng Zhu49505502011-07-19 20:44:36 -0700422struct msm_cam_evt_divert_frame {
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700423 unsigned short image_mode;
424 unsigned short op_mode;
Mingcheng Zhu49505502011-07-19 20:44:36 -0700425 unsigned short inst_idx;
426 unsigned short node_idx;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700427 struct msm_pp_frame frame;
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700428 int do_pp;
Mingcheng Zhu49505502011-07-19 20:44:36 -0700429};
430
Kiran Kumar H N0b517802011-10-05 09:49:51 -0700431struct msm_mctl_pp_cmd_ack_event {
432 uint32_t cmd; /* VPE_CMD_ZOOM? */
433 int status; /* 0 done, < 0 err */
434 uint32_t cookie; /* daemon's cookie */
435};
436
437struct msm_mctl_pp_event_info {
438 int32_t event;
439 union {
440 struct msm_mctl_pp_cmd_ack_event ack;
441 };
442};
443
444struct msm_isp_event_ctrl {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700445 unsigned short resptype;
446 union {
447 struct msm_cam_evt_msg isp_msg;
448 struct msm_ctrl_cmd ctrl;
Kiran Kumar H N0b517802011-10-05 09:49:51 -0700449 struct msm_cam_evt_divert_frame div_frame;
450 struct msm_mctl_pp_event_info pp_event_info;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700451 } isp_data;
452};
453
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700454#define MSM_CAM_RESP_CTRL 0
455#define MSM_CAM_RESP_STAT_EVT_MSG 1
456#define MSM_CAM_RESP_STEREO_OP_1 2
457#define MSM_CAM_RESP_STEREO_OP_2 3
458#define MSM_CAM_RESP_V4L2 4
Mingcheng Zhu49505502011-07-19 20:44:36 -0700459#define MSM_CAM_RESP_DIV_FRAME_EVT_MSG 5
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700460#define MSM_CAM_RESP_DONE_EVENT 6
461#define MSM_CAM_RESP_MCTL_PP_EVENT 7
462#define MSM_CAM_RESP_MAX 8
Mingcheng Zhu49505502011-07-19 20:44:36 -0700463
Mingcheng Zhu270813a2011-08-10 17:23:18 -0700464#define MSM_CAM_APP_NOTIFY_EVENT 0
Kevin Chan4bb6ead2012-02-29 01:01:41 -0800465#define MSM_CAM_APP_NOTIFY_ERROR_EVENT 1
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700466
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700467/* this one is used to send ctrl/status up to config thread */
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700468
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700469struct msm_stats_event_ctrl {
470 /* 0 - ctrl_cmd from control thread,
471 * 1 - stats/event kernel,
472 * 2 - V4L control or read request */
473 int resptype;
474 int timeout_ms;
475 struct msm_ctrl_cmd ctrl_cmd;
476 /* struct vfe_event_t stats_event; */
477 struct msm_cam_evt_msg stats_event;
478};
479
480/* 2. config command: config command(from config thread); */
481struct msm_camera_cfg_cmd {
482 /* what to config:
483 * 1 - sensor config, 2 - vfe config */
484 uint16_t cfg_type;
485
486 /* sensor config type */
487 uint16_t cmd_type;
488 uint16_t queue;
489 uint16_t length;
490 void *value;
491};
492
493#define CMD_GENERAL 0
494#define CMD_AXI_CFG_OUT1 1
495#define CMD_AXI_CFG_SNAP_O1_AND_O2 2
496#define CMD_AXI_CFG_OUT2 3
497#define CMD_PICT_T_AXI_CFG 4
498#define CMD_PICT_M_AXI_CFG 5
499#define CMD_RAW_PICT_AXI_CFG 6
500
501#define CMD_FRAME_BUF_RELEASE 7
502#define CMD_PREV_BUF_CFG 8
503#define CMD_SNAP_BUF_RELEASE 9
504#define CMD_SNAP_BUF_CFG 10
505#define CMD_STATS_DISABLE 11
506#define CMD_STATS_AEC_AWB_ENABLE 12
507#define CMD_STATS_AF_ENABLE 13
508#define CMD_STATS_AEC_ENABLE 14
509#define CMD_STATS_AWB_ENABLE 15
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800510#define CMD_STATS_ENABLE 16
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700511
512#define CMD_STATS_AXI_CFG 17
513#define CMD_STATS_AEC_AXI_CFG 18
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800514#define CMD_STATS_AF_AXI_CFG 19
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700515#define CMD_STATS_AWB_AXI_CFG 20
516#define CMD_STATS_RS_AXI_CFG 21
517#define CMD_STATS_CS_AXI_CFG 22
518#define CMD_STATS_IHIST_AXI_CFG 23
519#define CMD_STATS_SKIN_AXI_CFG 24
520
521#define CMD_STATS_BUF_RELEASE 25
522#define CMD_STATS_AEC_BUF_RELEASE 26
523#define CMD_STATS_AF_BUF_RELEASE 27
524#define CMD_STATS_AWB_BUF_RELEASE 28
525#define CMD_STATS_RS_BUF_RELEASE 29
526#define CMD_STATS_CS_BUF_RELEASE 30
527#define CMD_STATS_IHIST_BUF_RELEASE 31
528#define CMD_STATS_SKIN_BUF_RELEASE 32
529
530#define UPDATE_STATS_INVALID 33
531#define CMD_AXI_CFG_SNAP_GEMINI 34
532#define CMD_AXI_CFG_SNAP 35
533#define CMD_AXI_CFG_PREVIEW 36
534#define CMD_AXI_CFG_VIDEO 37
535
536#define CMD_STATS_IHIST_ENABLE 38
537#define CMD_STATS_RS_ENABLE 39
538#define CMD_STATS_CS_ENABLE 40
539#define CMD_VPE 41
540#define CMD_AXI_CFG_VPE 42
541#define CMD_AXI_CFG_ZSL 43
542#define CMD_AXI_CFG_SNAP_VPE 44
543#define CMD_AXI_CFG_SNAP_THUMB_VPE 45
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -0700544
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530545#define CMD_CONFIG_PING_ADDR 46
546#define CMD_CONFIG_PONG_ADDR 47
547#define CMD_CONFIG_FREE_BUF_ADDR 48
548#define CMD_AXI_CFG_ZSL_ALL_CHNLS 49
549#define CMD_AXI_CFG_VIDEO_ALL_CHNLS 50
Suresh Vankadara055cb8e2012-01-18 00:50:04 +0530550#define CMD_VFE_BUFFER_RELEASE 51
Kevin Chancf264862012-04-19 19:10:38 -0700551#define CMD_VFE_PROCESS_IRQ 52
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -0700552#define CMD_STATS_BG_ENABLE 53
553#define CMD_STATS_BF_ENABLE 54
554#define CMD_STATS_BHIST_ENABLE 55
555#define CMD_STATS_BG_BUF_RELEASE 56
556#define CMD_STATS_BF_BUF_RELEASE 57
557#define CMD_STATS_BHIST_BUF_RELEASE 58
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800558#define CMD_VFE_PIX_SOF_COUNT_UPDATE 59
559#define CMD_VFE_COUNT_PIX_SOF_ENABLE 60
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700560
Nishant Pandit5dd54422012-06-26 22:52:44 +0530561#define CMD_AXI_CFG_PRIM BIT(8)
562#define CMD_AXI_CFG_PRIM_ALL_CHNLS BIT(9)
563#define CMD_AXI_CFG_SEC BIT(10)
564#define CMD_AXI_CFG_SEC_ALL_CHNLS BIT(11)
565#define CMD_AXI_CFG_TERT1 BIT(12)
566#define CMD_AXI_CFG_TERT2 BIT(13)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800567#define CMD_AXI_CFG_TERT3 BIT(14)
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800568
Azam Sadiq Pasha Kapatrala Syed7c815182012-05-31 19:28:09 -0700569#define CMD_AXI_START 0xE1
570#define CMD_AXI_STOP 0xE2
Shuzhen Wang109c2112012-07-23 17:28:11 -0700571#define CMD_AXI_RESET 0xE3
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800572#define CMD_AXI_ABORT 0xE4
573
Azam Sadiq Pasha Kapatrala Syed7c815182012-05-31 19:28:09 -0700574
Lakshmi Narayana Kalavalacd3d81e2012-07-31 13:04:03 -0700575
576#define AXI_CMD_PREVIEW BIT(0)
577#define AXI_CMD_CAPTURE BIT(1)
578#define AXI_CMD_RECORD BIT(2)
579#define AXI_CMD_ZSL BIT(3)
580#define AXI_CMD_RAW_CAPTURE BIT(4)
Lakshmi Narayana Kalavala3e8a1d12012-07-31 15:00:09 -0700581#define AXI_CMD_LIVESHOT BIT(5)
Lakshmi Narayana Kalavalacd3d81e2012-07-31 13:04:03 -0700582
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700583/* vfe config command: config command(from config thread)*/
584struct msm_vfe_cfg_cmd {
585 int cmd_type;
586 uint16_t length;
587 void *value;
588};
589
590struct msm_vpe_cfg_cmd {
591 int cmd_type;
592 uint16_t length;
593 void *value;
594};
595
596#define MAX_CAMERA_ENABLE_NAME_LEN 32
597struct camera_enable_cmd {
598 char name[MAX_CAMERA_ENABLE_NAME_LEN];
599};
600
601#define MSM_PMEM_OUTPUT1 0
602#define MSM_PMEM_OUTPUT2 1
603#define MSM_PMEM_OUTPUT1_OUTPUT2 2
604#define MSM_PMEM_THUMBNAIL 3
605#define MSM_PMEM_MAINIMG 4
606#define MSM_PMEM_RAW_MAINIMG 5
607#define MSM_PMEM_AEC_AWB 6
608#define MSM_PMEM_AF 7
609#define MSM_PMEM_AEC 8
610#define MSM_PMEM_AWB 9
611#define MSM_PMEM_RS 10
612#define MSM_PMEM_CS 11
613#define MSM_PMEM_IHIST 12
614#define MSM_PMEM_SKIN 13
615#define MSM_PMEM_VIDEO 14
616#define MSM_PMEM_PREVIEW 15
617#define MSM_PMEM_VIDEO_VPE 16
618#define MSM_PMEM_C2D 17
619#define MSM_PMEM_MAINIMG_VPE 18
620#define MSM_PMEM_THUMBNAIL_VPE 19
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -0700621#define MSM_PMEM_BAYER_GRID 20
622#define MSM_PMEM_BAYER_FOCUS 21
623#define MSM_PMEM_BAYER_HIST 22
624#define MSM_PMEM_MAX 23
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700625
626#define STAT_AEAW 0
627#define STAT_AEC 1
628#define STAT_AF 2
629#define STAT_AWB 3
630#define STAT_RS 4
631#define STAT_CS 5
632#define STAT_IHIST 6
633#define STAT_SKIN 7
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -0700634#define STAT_BG 8
635#define STAT_BF 9
636#define STAT_BHIST 10
637#define STAT_MAX 11
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700638
639#define FRAME_PREVIEW_OUTPUT1 0
640#define FRAME_PREVIEW_OUTPUT2 1
641#define FRAME_SNAPSHOT 2
642#define FRAME_THUMBNAIL 3
643#define FRAME_RAW_SNAPSHOT 4
644#define FRAME_MAX 5
645
Brian Muramatsu6d869492012-08-01 22:46:50 -0700646enum msm_stats_enum_type {
647 MSM_STATS_TYPE_AEC, /* legacy based AEC */
648 MSM_STATS_TYPE_AF, /* legacy based AF */
649 MSM_STATS_TYPE_AWB, /* legacy based AWB */
650 MSM_STATS_TYPE_RS, /* legacy based RS */
651 MSM_STATS_TYPE_CS, /* legacy based CS */
652 MSM_STATS_TYPE_IHIST, /* legacy based HIST */
653 MSM_STATS_TYPE_SKIN, /* legacy based SKIN */
654 MSM_STATS_TYPE_BG, /* Bayer Grids */
655 MSM_STATS_TYPE_BF, /* Bayer Focus */
656 MSM_STATS_TYPE_BHIST, /* Bayer Hist */
657 MSM_STATS_TYPE_AE_AW, /* legacy stats for vfe 2.x*/
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800658 MSM_STATS_TYPE_COMP, /* Composite stats */
Brian Muramatsu6d869492012-08-01 22:46:50 -0700659 MSM_STATS_TYPE_MAX /* MAX */
660};
661
662struct msm_stats_buf_info {
663 int type; /* msm_stats_enum_type */
664 int fd;
665 void *vaddr;
666 uint32_t offset;
667 uint32_t len;
668 uint32_t y_off;
669 uint32_t cbcr_off;
670 uint32_t planar0_off;
671 uint32_t planar1_off;
672 uint32_t planar2_off;
673 uint8_t active;
674 int buf_idx;
675};
676
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700677struct msm_pmem_info {
678 int type;
679 int fd;
680 void *vaddr;
681 uint32_t offset;
682 uint32_t len;
Kiran Kumar H N5a19c682011-07-23 11:34:34 -0700683 uint32_t y_off;
684 uint32_t cbcr_off;
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530685 uint32_t planar0_off;
686 uint32_t planar1_off;
687 uint32_t planar2_off;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700688 uint8_t active;
689};
690
691struct outputCfg {
692 uint32_t height;
693 uint32_t width;
694
695 uint32_t window_height_firstline;
696 uint32_t window_height_lastline;
697};
698
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800699#define VIDEO_NODE 0
700#define MCTL_NODE 1
701
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700702#define OUTPUT_1 0
703#define OUTPUT_2 1
704#define OUTPUT_1_AND_2 2 /* snapshot only */
705#define OUTPUT_1_AND_3 3 /* video */
706#define CAMIF_TO_AXI_VIA_OUTPUT_2 4
707#define OUTPUT_1_AND_CAMIF_TO_AXI_VIA_OUTPUT_2 5
708#define OUTPUT_2_AND_CAMIF_TO_AXI_VIA_OUTPUT_1 6
709#define OUTPUT_1_2_AND_3 7
Kiran Kumar H N4cff94a2011-10-17 11:37:33 -0700710#define OUTPUT_ALL_CHNLS 8
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530711#define OUTPUT_VIDEO_ALL_CHNLS 9
712#define OUTPUT_ZSL_ALL_CHNLS 10
713#define LAST_AXI_OUTPUT_MODE_ENUM = OUTPUT_ZSL_ALL_CHNLS
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700714
Nishant Pandit5dd54422012-06-26 22:52:44 +0530715#define OUTPUT_PRIM BIT(8)
716#define OUTPUT_PRIM_ALL_CHNLS BIT(9)
717#define OUTPUT_SEC BIT(10)
718#define OUTPUT_SEC_ALL_CHNLS BIT(11)
719#define OUTPUT_TERT1 BIT(12)
720#define OUTPUT_TERT2 BIT(13)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800721#define OUTPUT_TERT3 BIT(14)
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800722
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700723#define MSM_FRAME_PREV_1 0
724#define MSM_FRAME_PREV_2 1
725#define MSM_FRAME_ENC 2
726
Nishant Pandit5dd54422012-06-26 22:52:44 +0530727#define OUTPUT_TYPE_P BIT(0)
728#define OUTPUT_TYPE_T BIT(1)
729#define OUTPUT_TYPE_S BIT(2)
730#define OUTPUT_TYPE_V BIT(3)
731#define OUTPUT_TYPE_L BIT(4)
732#define OUTPUT_TYPE_ST_L BIT(5)
733#define OUTPUT_TYPE_ST_R BIT(6)
734#define OUTPUT_TYPE_ST_D BIT(7)
735#define OUTPUT_TYPE_R BIT(8)
736#define OUTPUT_TYPE_R1 BIT(9)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800737#define OUTPUT_TYPE_SAEC BIT(10)
738#define OUTPUT_TYPE_SAFC BIT(11)
739#define OUTPUT_TYPE_SAWB BIT(12)
740#define OUTPUT_TYPE_IHST BIT(13)
741#define OUTPUT_TYPE_CSTA BIT(14)
742#define OUTPUT_TYPE_R2 BIT(15)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700743
744struct fd_roi_info {
745 void *info;
746 int info_len;
747};
748
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700749struct msm_mem_map_info {
750 uint32_t cookie;
751 uint32_t length;
Mingcheng Zhufe7abc02011-08-09 13:27:39 -0700752 uint32_t mem_type;
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700753};
754
Mingcheng Zhu49505502011-07-19 20:44:36 -0700755#define MSM_MEM_MMAP 0
756#define MSM_MEM_USERPTR 1
757#define MSM_PLANE_MAX 8
758#define MSM_PLANE_Y 0
759#define MSM_PLANE_UV 1
760
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700761struct msm_frame {
762 struct timespec ts;
763 int path;
764 int type;
765 unsigned long buffer;
766 uint32_t phy_offset;
Kiran Kumar H N5a19c682011-07-23 11:34:34 -0700767 uint32_t y_off;
768 uint32_t cbcr_off;
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530769 uint32_t planar0_off;
770 uint32_t planar1_off;
771 uint32_t planar2_off;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700772 int fd;
773
774 void *cropinfo;
775 int croplen;
776 uint32_t error_code;
777 struct fd_roi_info roi_info;
778 uint32_t frame_id;
779 int stcam_quality_ind;
780 uint32_t stcam_conv_value;
Ankit Premrajka3e90b9f2011-11-01 18:48:45 -0700781
782 struct ion_allocation_data ion_alloc;
783 struct ion_fd_data fd_data;
Ankit Premrajkae2c9c0b2012-06-07 17:18:25 -0700784 int ion_dev_fd;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700785};
786
787enum msm_st_frame_packing {
788 SIDE_BY_SIDE_HALF,
789 SIDE_BY_SIDE_FULL,
790 TOP_DOWN_HALF,
791 TOP_DOWN_FULL,
792};
793
794struct msm_st_crop {
795 uint32_t in_w;
796 uint32_t in_h;
797 uint32_t out_w;
798 uint32_t out_h;
799};
800
801struct msm_st_half {
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530802 uint32_t buf_p0_off;
803 uint32_t buf_p1_off;
804 uint32_t buf_p0_stride;
805 uint32_t buf_p1_stride;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700806 uint32_t pix_x_off;
807 uint32_t pix_y_off;
808 struct msm_st_crop stCropInfo;
809};
810
811struct msm_st_frame {
812 struct msm_frame buf_info;
813 int type;
814 enum msm_st_frame_packing packing;
815 struct msm_st_half L;
816 struct msm_st_half R;
817 int frame_id;
818};
819
820#define MSM_CAMERA_ERR_MASK (0xFFFFFFFF & 1)
821
822struct stats_buff {
823 unsigned long buff;
824 int fd;
825};
826
827struct msm_stats_buf {
Lakshmi Narayana Kalavala4ab97a92011-07-26 15:30:14 -0700828 uint8_t awb_ymin;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700829 struct stats_buff aec;
830 struct stats_buff awb;
831 struct stats_buff af;
832 struct stats_buff ihist;
833 struct stats_buff rs;
834 struct stats_buff cs;
835 struct stats_buff skin;
836 int type;
837 uint32_t status_bits;
838 unsigned long buffer;
839 int fd;
Ankit Premrajka073e0ca2012-03-06 12:26:08 -0800840 int length;
841 struct ion_handle *handle;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700842 uint32_t frame_id;
Brian Muramatsu6d869492012-08-01 22:46:50 -0700843 int buf_idx;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700844};
845#define MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT 0
846/* video capture mode in VIDIOC_S_PARM */
847#define MSM_V4L2_EXT_CAPTURE_MODE_PREVIEW \
848 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+1)
849/* extendedmode for video recording in VIDIOC_S_PARM */
850#define MSM_V4L2_EXT_CAPTURE_MODE_VIDEO \
851 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+2)
852/* extendedmode for the full size main image in VIDIOC_S_PARM */
853#define MSM_V4L2_EXT_CAPTURE_MODE_MAIN (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+3)
854/* extendedmode for the thumb nail image in VIDIOC_S_PARM */
855#define MSM_V4L2_EXT_CAPTURE_MODE_THUMBNAIL \
856 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+4)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800857/* ISP_PIX_OUTPUT1: no pp, directly send output1 buf to user */
858#define MSM_V4L2_EXT_CAPTURE_MODE_ISP_PIX_OUTPUT1 \
Sudhir Sharma4472ce52012-12-01 14:00:27 -0800859 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+5)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800860/* ISP_PIX_OUTPUT2: no pp, directly send output2 buf to user */
861#define MSM_V4L2_EXT_CAPTURE_MODE_ISP_PIX_OUTPUT2 \
Sudhir Sharma4472ce52012-12-01 14:00:27 -0800862 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+6)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800863/* raw image type */
864#define MSM_V4L2_EXT_CAPTURE_MODE_RAW \
Sudhir Sharma4472ce52012-12-01 14:00:27 -0800865 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+7)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800866/* RDI dump */
867#define MSM_V4L2_EXT_CAPTURE_MODE_RDI \
Sudhir Sharma4472ce52012-12-01 14:00:27 -0800868 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+8)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800869/* RDI dump 1 */
870#define MSM_V4L2_EXT_CAPTURE_MODE_RDI1 \
Sudhir Sharma4472ce52012-12-01 14:00:27 -0800871 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+9)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800872/* RDI dump 2 */
873#define MSM_V4L2_EXT_CAPTURE_MODE_RDI2 \
Sudhir Sharma4472ce52012-12-01 14:00:27 -0800874 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+10)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800875#define MSM_V4L2_EXT_CAPTURE_MODE_AEC \
Sudhir Sharma4472ce52012-12-01 14:00:27 -0800876 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+11)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800877#define MSM_V4L2_EXT_CAPTURE_MODE_AWB \
Sudhir Sharma4472ce52012-12-01 14:00:27 -0800878 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+12)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800879#define MSM_V4L2_EXT_CAPTURE_MODE_AF \
Sudhir Sharma4472ce52012-12-01 14:00:27 -0800880 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+13)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800881#define MSM_V4L2_EXT_CAPTURE_MODE_IHIST \
Sudhir Sharma4472ce52012-12-01 14:00:27 -0800882 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+14)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800883#define MSM_V4L2_EXT_CAPTURE_MODE_CS \
884 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+15)
885#define MSM_V4L2_EXT_CAPTURE_MODE_RS \
886 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+16)
887#define MSM_V4L2_EXT_CAPTURE_MODE_CSTA \
888 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+17)
889#define MSM_V4L2_EXT_CAPTURE_MODE_MAX (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+18)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700890
891#define MSM_V4L2_PID_MOTION_ISO V4L2_CID_PRIVATE_BASE
892#define MSM_V4L2_PID_EFFECT (V4L2_CID_PRIVATE_BASE+1)
893#define MSM_V4L2_PID_HJR (V4L2_CID_PRIVATE_BASE+2)
894#define MSM_V4L2_PID_LED_MODE (V4L2_CID_PRIVATE_BASE+3)
895#define MSM_V4L2_PID_PREP_SNAPSHOT (V4L2_CID_PRIVATE_BASE+4)
896#define MSM_V4L2_PID_EXP_METERING (V4L2_CID_PRIVATE_BASE+5)
897#define MSM_V4L2_PID_ISO (V4L2_CID_PRIVATE_BASE+6)
898#define MSM_V4L2_PID_CAM_MODE (V4L2_CID_PRIVATE_BASE+7)
899#define MSM_V4L2_PID_LUMA_ADAPTATION (V4L2_CID_PRIVATE_BASE+8)
900#define MSM_V4L2_PID_BEST_SHOT (V4L2_CID_PRIVATE_BASE+9)
901#define MSM_V4L2_PID_FOCUS_MODE (V4L2_CID_PRIVATE_BASE+10)
902#define MSM_V4L2_PID_BL_DETECTION (V4L2_CID_PRIVATE_BASE+11)
903#define MSM_V4L2_PID_SNOW_DETECTION (V4L2_CID_PRIVATE_BASE+12)
904#define MSM_V4L2_PID_CTRL_CMD (V4L2_CID_PRIVATE_BASE+13)
905#define MSM_V4L2_PID_EVT_SUB_INFO (V4L2_CID_PRIVATE_BASE+14)
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700906#define MSM_V4L2_PID_STROBE_FLASH (V4L2_CID_PRIVATE_BASE+15)
Kiran Kumar H N90785902012-07-05 13:59:38 -0700907#define MSM_V4L2_PID_INST_HANDLE (V4L2_CID_PRIVATE_BASE+16)
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700908#define MSM_V4L2_PID_MMAP_INST (V4L2_CID_PRIVATE_BASE+17)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800909#define MSM_V4L2_PID_PP_PLANE_INFO (V4L2_CID_PRIVATE_BASE+18)
910#define MSM_V4L2_PID_MAX MSM_V4L2_PID_PP_PLANE_INFO
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700911
912/* camera operation mode for video recording - two frame output queues */
913#define MSM_V4L2_CAM_OP_DEFAULT 0
914/* camera operation mode for video recording - two frame output queues */
915#define MSM_V4L2_CAM_OP_PREVIEW (MSM_V4L2_CAM_OP_DEFAULT+1)
916/* camera operation mode for video recording - two frame output queues */
917#define MSM_V4L2_CAM_OP_VIDEO (MSM_V4L2_CAM_OP_DEFAULT+2)
918/* camera operation mode for standard shapshot - two frame output queues */
919#define MSM_V4L2_CAM_OP_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT+3)
920/* camera operation mode for zsl shapshot - three output queues */
921#define MSM_V4L2_CAM_OP_ZSL (MSM_V4L2_CAM_OP_DEFAULT+4)
922/* camera operation mode for raw snapshot - one frame output queue */
923#define MSM_V4L2_CAM_OP_RAW (MSM_V4L2_CAM_OP_DEFAULT+5)
Jignesh Mehta6cf8a742012-02-04 23:40:50 -0800924/* camera operation mode for jpeg snapshot - one frame output queue */
925#define MSM_V4L2_CAM_OP_JPEG_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT+6)
926
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700927
928#define MSM_V4L2_VID_CAP_TYPE 0
929#define MSM_V4L2_STREAM_ON 1
930#define MSM_V4L2_STREAM_OFF 2
931#define MSM_V4L2_SNAPSHOT 3
932#define MSM_V4L2_QUERY_CTRL 4
933#define MSM_V4L2_GET_CTRL 5
934#define MSM_V4L2_SET_CTRL 6
935#define MSM_V4L2_QUERY 7
936#define MSM_V4L2_GET_CROP 8
937#define MSM_V4L2_SET_CROP 9
938#define MSM_V4L2_OPEN 10
939#define MSM_V4L2_CLOSE 11
940#define MSM_V4L2_SET_CTRL_CMD 12
941#define MSM_V4L2_EVT_SUB_MASK 13
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800942#define MSM_V4L2_PRIVATE_CMD 14
943#define MSM_V4L2_MAX 15
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700944#define V4L2_CAMERA_EXIT 43
945
946struct crop_info {
947 void *info;
948 int len;
949};
950
951struct msm_postproc {
952 int ftnum;
953 struct msm_frame fthumnail;
954 int fmnum;
955 struct msm_frame fmain;
956};
957
958struct msm_snapshot_pp_status {
959 void *status;
960};
961
962#define CFG_SET_MODE 0
963#define CFG_SET_EFFECT 1
964#define CFG_START 2
965#define CFG_PWR_UP 3
966#define CFG_PWR_DOWN 4
967#define CFG_WRITE_EXPOSURE_GAIN 5
968#define CFG_SET_DEFAULT_FOCUS 6
969#define CFG_MOVE_FOCUS 7
970#define CFG_REGISTER_TO_REAL_GAIN 8
971#define CFG_REAL_TO_REGISTER_GAIN 9
972#define CFG_SET_FPS 10
973#define CFG_SET_PICT_FPS 11
974#define CFG_SET_BRIGHTNESS 12
975#define CFG_SET_CONTRAST 13
976#define CFG_SET_ZOOM 14
977#define CFG_SET_EXPOSURE_MODE 15
978#define CFG_SET_WB 16
979#define CFG_SET_ANTIBANDING 17
980#define CFG_SET_EXP_GAIN 18
981#define CFG_SET_PICT_EXP_GAIN 19
982#define CFG_SET_LENS_SHADING 20
983#define CFG_GET_PICT_FPS 21
984#define CFG_GET_PREV_L_PF 22
985#define CFG_GET_PREV_P_PL 23
986#define CFG_GET_PICT_L_PF 24
987#define CFG_GET_PICT_P_PL 25
988#define CFG_GET_AF_MAX_STEPS 26
989#define CFG_GET_PICT_MAX_EXP_LC 27
990#define CFG_SEND_WB_INFO 28
991#define CFG_SENSOR_INIT 29
992#define CFG_GET_3D_CALI_DATA 30
993#define CFG_GET_CALIB_DATA 31
Kevin Chana980f392011-08-01 20:55:00 -0700994#define CFG_GET_OUTPUT_INFO 32
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700995#define CFG_GET_EEPROM_INFO 33
996#define CFG_GET_EEPROM_DATA 34
997#define CFG_SET_ACTUATOR_INFO 35
998#define CFG_GET_ACTUATOR_INFO 36
Su Liu6c3bb322012-02-14 02:15:05 +0530999/* TBD: QRD */
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001000#define CFG_SET_SATURATION 37
1001#define CFG_SET_SHARPNESS 38
1002#define CFG_SET_TOUCHAEC 39
1003#define CFG_SET_AUTO_FOCUS 40
1004#define CFG_SET_AUTOFLASH 41
1005#define CFG_SET_EXPOSURE_COMPENSATION 42
1006#define CFG_SET_ISO 43
Nishant Panditb2157c92012-04-25 01:09:28 +05301007#define CFG_START_STREAM 44
1008#define CFG_STOP_STREAM 45
1009#define CFG_GET_CSI_PARAMS 46
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001010#define CFG_POWER_UP 47
1011#define CFG_POWER_DOWN 48
1012#define CFG_WRITE_I2C_ARRAY 49
1013#define CFG_READ_I2C_ARRAY 50
1014#define CFG_PCLK_CHANGE 51
1015#define CFG_CONFIG_VREG_ARRAY 52
1016#define CFG_CONFIG_CLK_ARRAY 53
1017#define CFG_GPIO_OP 54
Punit Soniedeca652013-01-24 13:36:26 -08001018#define CFG_SET_VISION_MODE 55
1019#define CFG_SET_VISION_AE 56
Jeyaprakash Soundrapandiana7203372013-01-21 17:57:41 -08001020#define CFG_HDR_UPDATE 57
Lokesh Kumar Aakulu893778c2013-03-02 05:29:44 +05301021#define CFG_ACTUAOTOR_REG_INIT 58
1022#define CFG_MAX 59
1023
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001024
1025#define MOVE_NEAR 0
1026#define MOVE_FAR 1
1027
1028#define SENSOR_PREVIEW_MODE 0
1029#define SENSOR_SNAPSHOT_MODE 1
1030#define SENSOR_RAW_SNAPSHOT_MODE 2
1031#define SENSOR_HFR_60FPS_MODE 3
1032#define SENSOR_HFR_90FPS_MODE 4
1033#define SENSOR_HFR_120FPS_MODE 5
1034
1035#define SENSOR_QTR_SIZE 0
1036#define SENSOR_FULL_SIZE 1
1037#define SENSOR_QVGA_SIZE 2
1038#define SENSOR_INVALID_SIZE 3
1039
Taniya Dasa9bdb012011-09-08 11:21:33 +05301040/* QRD */
1041#define CAMERA_EFFECT_BW 10
1042#define CAMERA_EFFECT_BLUISH 12
1043#define CAMERA_EFFECT_REDDISH 13
1044#define CAMERA_EFFECT_GREENISH 14
1045
1046/* QRD */
1047#define CAMERA_ANTIBANDING_OFF 0
1048#define CAMERA_ANTIBANDING_50HZ 2
1049#define CAMERA_ANTIBANDING_60HZ 1
1050#define CAMERA_ANTIBANDING_AUTO 3
1051
1052#define CAMERA_CONTRAST_LV0 0
1053#define CAMERA_CONTRAST_LV1 1
1054#define CAMERA_CONTRAST_LV2 2
1055#define CAMERA_CONTRAST_LV3 3
1056#define CAMERA_CONTRAST_LV4 4
1057#define CAMERA_CONTRAST_LV5 5
1058#define CAMERA_CONTRAST_LV6 6
1059#define CAMERA_CONTRAST_LV7 7
1060#define CAMERA_CONTRAST_LV8 8
1061#define CAMERA_CONTRAST_LV9 9
1062
1063#define CAMERA_BRIGHTNESS_LV0 0
1064#define CAMERA_BRIGHTNESS_LV1 1
1065#define CAMERA_BRIGHTNESS_LV2 2
1066#define CAMERA_BRIGHTNESS_LV3 3
1067#define CAMERA_BRIGHTNESS_LV4 4
1068#define CAMERA_BRIGHTNESS_LV5 5
1069#define CAMERA_BRIGHTNESS_LV6 6
1070#define CAMERA_BRIGHTNESS_LV7 7
1071#define CAMERA_BRIGHTNESS_LV8 8
1072
1073
1074#define CAMERA_SATURATION_LV0 0
1075#define CAMERA_SATURATION_LV1 1
1076#define CAMERA_SATURATION_LV2 2
1077#define CAMERA_SATURATION_LV3 3
1078#define CAMERA_SATURATION_LV4 4
1079#define CAMERA_SATURATION_LV5 5
1080#define CAMERA_SATURATION_LV6 6
1081#define CAMERA_SATURATION_LV7 7
1082#define CAMERA_SATURATION_LV8 8
1083
1084#define CAMERA_SHARPNESS_LV0 0
1085#define CAMERA_SHARPNESS_LV1 3
1086#define CAMERA_SHARPNESS_LV2 6
1087#define CAMERA_SHARPNESS_LV3 9
1088#define CAMERA_SHARPNESS_LV4 12
1089#define CAMERA_SHARPNESS_LV5 15
1090#define CAMERA_SHARPNESS_LV6 18
1091#define CAMERA_SHARPNESS_LV7 21
1092#define CAMERA_SHARPNESS_LV8 24
1093#define CAMERA_SHARPNESS_LV9 27
1094#define CAMERA_SHARPNESS_LV10 30
1095
1096#define CAMERA_SETAE_AVERAGE 0
1097#define CAMERA_SETAE_CENWEIGHT 1
1098
Taniya Dasa9bdb012011-09-08 11:21:33 +05301099#define CAMERA_WB_AUTO 1 /* This list must match aeecamera.h */
1100#define CAMERA_WB_CUSTOM 2
1101#define CAMERA_WB_INCANDESCENT 3
1102#define CAMERA_WB_FLUORESCENT 4
1103#define CAMERA_WB_DAYLIGHT 5
1104#define CAMERA_WB_CLOUDY_DAYLIGHT 6
1105#define CAMERA_WB_TWILIGHT 7
1106#define CAMERA_WB_SHADE 8
1107
1108#define CAMERA_EXPOSURE_COMPENSATION_LV0 12
1109#define CAMERA_EXPOSURE_COMPENSATION_LV1 6
1110#define CAMERA_EXPOSURE_COMPENSATION_LV2 0
1111#define CAMERA_EXPOSURE_COMPENSATION_LV3 -6
1112#define CAMERA_EXPOSURE_COMPENSATION_LV4 -12
1113
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001114enum msm_v4l2_saturation_level {
1115 MSM_V4L2_SATURATION_L0,
1116 MSM_V4L2_SATURATION_L1,
1117 MSM_V4L2_SATURATION_L2,
1118 MSM_V4L2_SATURATION_L3,
1119 MSM_V4L2_SATURATION_L4,
1120 MSM_V4L2_SATURATION_L5,
1121 MSM_V4L2_SATURATION_L6,
1122 MSM_V4L2_SATURATION_L7,
1123 MSM_V4L2_SATURATION_L8,
1124 MSM_V4L2_SATURATION_L9,
1125 MSM_V4L2_SATURATION_L10,
1126};
1127
Suresh Vankadara212d9722012-05-30 15:51:20 +05301128enum msm_v4l2_contrast_level {
1129 MSM_V4L2_CONTRAST_L0,
1130 MSM_V4L2_CONTRAST_L1,
1131 MSM_V4L2_CONTRAST_L2,
1132 MSM_V4L2_CONTRAST_L3,
1133 MSM_V4L2_CONTRAST_L4,
1134 MSM_V4L2_CONTRAST_L5,
1135 MSM_V4L2_CONTRAST_L6,
1136 MSM_V4L2_CONTRAST_L7,
1137 MSM_V4L2_CONTRAST_L8,
1138 MSM_V4L2_CONTRAST_L9,
1139 MSM_V4L2_CONTRAST_L10,
1140};
1141
1142
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001143enum msm_v4l2_exposure_level {
1144 MSM_V4L2_EXPOSURE_N2,
1145 MSM_V4L2_EXPOSURE_N1,
1146 MSM_V4L2_EXPOSURE_D,
1147 MSM_V4L2_EXPOSURE_P1,
1148 MSM_V4L2_EXPOSURE_P2,
1149};
1150
1151enum msm_v4l2_sharpness_level {
1152 MSM_V4L2_SHARPNESS_L0,
1153 MSM_V4L2_SHARPNESS_L1,
1154 MSM_V4L2_SHARPNESS_L2,
1155 MSM_V4L2_SHARPNESS_L3,
1156 MSM_V4L2_SHARPNESS_L4,
1157 MSM_V4L2_SHARPNESS_L5,
1158 MSM_V4L2_SHARPNESS_L6,
1159};
1160
1161enum msm_v4l2_expo_metering_mode {
1162 MSM_V4L2_EXP_FRAME_AVERAGE,
1163 MSM_V4L2_EXP_CENTER_WEIGHTED,
1164 MSM_V4L2_EXP_SPOT_METERING,
1165};
1166
1167enum msm_v4l2_iso_mode {
1168 MSM_V4L2_ISO_AUTO = 0,
1169 MSM_V4L2_ISO_DEBLUR,
1170 MSM_V4L2_ISO_100,
1171 MSM_V4L2_ISO_200,
1172 MSM_V4L2_ISO_400,
1173 MSM_V4L2_ISO_800,
1174 MSM_V4L2_ISO_1600,
1175};
1176
1177enum msm_v4l2_wb_mode {
Suresh Vankadara212d9722012-05-30 15:51:20 +05301178 MSM_V4L2_WB_OFF,
1179 MSM_V4L2_WB_AUTO ,
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001180 MSM_V4L2_WB_CUSTOM,
1181 MSM_V4L2_WB_INCANDESCENT,
1182 MSM_V4L2_WB_FLUORESCENT,
1183 MSM_V4L2_WB_DAYLIGHT,
1184 MSM_V4L2_WB_CLOUDY_DAYLIGHT,
Suresh Vankadara212d9722012-05-30 15:51:20 +05301185};
1186
1187enum msm_v4l2_special_effect {
1188 MSM_V4L2_EFFECT_OFF,
1189 MSM_V4L2_EFFECT_MONO,
1190 MSM_V4L2_EFFECT_NEGATIVE,
1191 MSM_V4L2_EFFECT_SOLARIZE,
1192 MSM_V4L2_EFFECT_SEPIA,
1193 MSM_V4L2_EFFECT_POSTERAIZE,
1194 MSM_V4L2_EFFECT_WHITEBOARD,
1195 MSM_V4L2_EFFECT_BLACKBOARD,
1196 MSM_V4L2_EFFECT_AQUA,
1197 MSM_V4L2_EFFECT_EMBOSS,
1198 MSM_V4L2_EFFECT_SKETCH,
1199 MSM_V4L2_EFFECT_NEON,
1200 MSM_V4L2_EFFECT_MAX,
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001201};
1202
1203enum msm_v4l2_power_line_frequency {
1204 MSM_V4L2_POWER_LINE_OFF,
1205 MSM_V4L2_POWER_LINE_60HZ,
1206 MSM_V4L2_POWER_LINE_50HZ,
1207 MSM_V4L2_POWER_LINE_AUTO,
1208};
Taniya Dasa9bdb012011-09-08 11:21:33 +05301209
Su Liu6c3bb322012-02-14 02:15:05 +05301210#define CAMERA_ISO_TYPE_AUTO 0
1211#define CAMEAR_ISO_TYPE_HJR 1
1212#define CAMEAR_ISO_TYPE_100 2
1213#define CAMERA_ISO_TYPE_200 3
1214#define CAMERA_ISO_TYPE_400 4
1215#define CAMEAR_ISO_TYPE_800 5
1216#define CAMERA_ISO_TYPE_1600 6
1217
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001218struct sensor_pict_fps {
1219 uint16_t prevfps;
1220 uint16_t pictfps;
1221};
1222
1223struct exp_gain_cfg {
1224 uint16_t gain;
1225 uint32_t line;
Jeyaprakash Soundrapandiana7203372013-01-21 17:57:41 -08001226 int32_t luma_avg;
1227 uint16_t fgain;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001228};
1229
1230struct focus_cfg {
1231 int32_t steps;
1232 int dir;
1233};
1234
1235struct fps_cfg {
1236 uint16_t f_mult;
1237 uint16_t fps_div;
1238 uint32_t pict_fps_div;
1239};
1240struct wb_info_cfg {
1241 uint16_t red_gain;
1242 uint16_t green_gain;
1243 uint16_t blue_gain;
1244};
1245struct sensor_3d_exp_cfg {
1246 uint16_t gain;
1247 uint32_t line;
1248 uint16_t r_gain;
1249 uint16_t b_gain;
1250 uint16_t gr_gain;
1251 uint16_t gb_gain;
1252 uint16_t gain_adjust;
1253};
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001254struct sensor_3d_cali_data_t {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001255 unsigned char left_p_matrix[3][4][8];
1256 unsigned char right_p_matrix[3][4][8];
1257 unsigned char square_len[8];
1258 unsigned char focal_len[8];
1259 unsigned char pixel_pitch[8];
1260 uint16_t left_r;
1261 uint16_t left_b;
1262 uint16_t left_gb;
1263 uint16_t left_af_far;
1264 uint16_t left_af_mid;
1265 uint16_t left_af_short;
1266 uint16_t left_af_5um;
1267 uint16_t left_af_50up;
1268 uint16_t left_af_50down;
1269 uint16_t right_r;
1270 uint16_t right_b;
1271 uint16_t right_gb;
1272 uint16_t right_af_far;
1273 uint16_t right_af_mid;
1274 uint16_t right_af_short;
1275 uint16_t right_af_5um;
1276 uint16_t right_af_50up;
1277 uint16_t right_af_50down;
1278};
1279struct sensor_init_cfg {
1280 uint8_t prev_res;
1281 uint8_t pict_res;
1282};
1283
1284struct sensor_calib_data {
1285 /* Color Related Measurements */
1286 uint16_t r_over_g;
1287 uint16_t b_over_g;
1288 uint16_t gr_over_gb;
1289
1290 /* Lens Related Measurements */
1291 uint16_t macro_2_inf;
1292 uint16_t inf_2_macro;
1293 uint16_t stroke_amt;
1294 uint16_t af_pos_1m;
1295 uint16_t af_pos_inf;
1296};
1297
Kevin Chana980f392011-08-01 20:55:00 -07001298enum msm_sensor_resolution_t {
Kevin Chan36e2bdc2011-08-30 17:21:21 -07001299 MSM_SENSOR_RES_FULL,
1300 MSM_SENSOR_RES_QTR,
Kevin Chana980f392011-08-01 20:55:00 -07001301 MSM_SENSOR_RES_2,
1302 MSM_SENSOR_RES_3,
1303 MSM_SENSOR_RES_4,
1304 MSM_SENSOR_RES_5,
1305 MSM_SENSOR_RES_6,
1306 MSM_SENSOR_RES_7,
1307 MSM_SENSOR_INVALID_RES,
1308};
1309
1310struct msm_sensor_output_info_t {
1311 uint16_t x_output;
1312 uint16_t y_output;
1313 uint16_t line_length_pclk;
1314 uint16_t frame_length_lines;
Kevin Chane30d3692011-10-14 16:11:01 -07001315 uint32_t vt_pixel_clk;
1316 uint32_t op_pixel_clk;
Kevin Chan272f6602011-10-18 14:20:03 -07001317 uint16_t binning_factor;
Kevin Chana980f392011-08-01 20:55:00 -07001318};
1319
1320struct sensor_output_info_t {
1321 struct msm_sensor_output_info_t *output_info;
1322 uint16_t num_info;
1323};
1324
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001325struct msm_sensor_exp_gain_info_t {
1326 uint16_t coarse_int_time_addr;
1327 uint16_t global_gain_addr;
1328 uint16_t vert_offset;
1329};
1330
1331struct msm_sensor_output_reg_addr_t {
1332 uint16_t x_output;
1333 uint16_t y_output;
1334 uint16_t line_length_pclk;
1335 uint16_t frame_length_lines;
1336};
1337
Jeyaprakash Soundrapandiana7203372013-01-21 17:57:41 -08001338enum sensor_hdr_update_t {
1339 SENSOR_HDR_UPDATE_AWB,
1340 SENSOR_HDR_UPDATE_LSC,
1341};
1342
1343struct sensor_hdr_update_parm_t {
1344 enum sensor_hdr_update_t type;
1345 uint16_t awb_gain_r, awb_gain_b;
1346 uint8_t lsc_table[504];
1347};
1348
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001349struct sensor_driver_params_type {
1350 struct msm_camera_i2c_reg_setting *init_settings;
1351 uint16_t init_settings_size;
1352 struct msm_camera_i2c_reg_setting *mode_settings;
1353 uint16_t mode_settings_size;
1354 struct msm_sensor_output_reg_addr_t *sensor_output_reg_addr;
1355 struct msm_camera_i2c_reg_setting *start_settings;
1356 struct msm_camera_i2c_reg_setting *stop_settings;
1357 struct msm_camera_i2c_reg_setting *groupon_settings;
1358 struct msm_camera_i2c_reg_setting *groupoff_settings;
1359 struct msm_sensor_exp_gain_info_t *sensor_exp_gain_info;
1360 struct msm_sensor_output_info_t *output_info;
1361};
1362
Taniya Dasa9bdb012011-09-08 11:21:33 +05301363struct mirror_flip {
1364 int32_t x_mirror;
1365 int32_t y_flip;
1366};
1367
1368struct cord {
1369 uint32_t x;
1370 uint32_t y;
1371};
1372
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001373struct msm_eeprom_data_t {
1374 void *eeprom_data;
1375 uint16_t index;
1376};
1377
Nishant Panditb2157c92012-04-25 01:09:28 +05301378struct msm_camera_csid_vc_cfg {
1379 uint8_t cid;
1380 uint8_t dt;
1381 uint8_t decode_format;
1382};
1383
1384struct csi_lane_params_t {
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001385 uint16_t csi_lane_assign;
Nishant Panditb2157c92012-04-25 01:09:28 +05301386 uint8_t csi_lane_mask;
1387 uint8_t csi_if;
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001388 uint8_t csid_core[2];
1389 uint8_t csi_phy_sel;
1390};
1391
1392struct msm_camera_csid_lut_params {
1393 uint8_t num_cid;
1394 struct msm_camera_csid_vc_cfg *vc_cfg;
1395};
1396
1397struct msm_camera_csid_params {
1398 uint8_t lane_cnt;
1399 uint16_t lane_assign;
1400 uint8_t phy_sel;
1401 struct msm_camera_csid_lut_params lut_params;
1402};
1403
1404struct msm_camera_csiphy_params {
1405 uint8_t lane_cnt;
1406 uint8_t settle_cnt;
1407 uint16_t lane_mask;
1408 uint8_t combo_mode;
1409};
1410
1411struct msm_camera_csi2_params {
1412 struct msm_camera_csid_params csid_params;
1413 struct msm_camera_csiphy_params csiphy_params;
1414};
1415
1416enum msm_camera_csi_data_format {
1417 CSI_8BIT,
1418 CSI_10BIT,
1419 CSI_12BIT,
1420};
1421
1422struct msm_camera_csi_params {
1423 enum msm_camera_csi_data_format data_format;
1424 uint8_t lane_cnt;
1425 uint8_t lane_assign;
1426 uint8_t settle_cnt;
1427 uint8_t dpcm_scheme;
1428};
1429
1430enum csic_cfg_type_t {
1431 CSIC_INIT,
1432 CSIC_CFG,
1433};
1434
1435struct csic_cfg_data {
1436 enum csic_cfg_type_t cfgtype;
1437 struct msm_camera_csi_params *csic_params;
1438};
1439
1440enum csid_cfg_type_t {
1441 CSID_INIT,
1442 CSID_CFG,
1443};
1444
1445struct csid_cfg_data {
1446 enum csid_cfg_type_t cfgtype;
1447 union {
1448 uint32_t csid_version;
1449 struct msm_camera_csid_params *csid_params;
1450 } cfg;
1451};
1452
1453enum csiphy_cfg_type_t {
1454 CSIPHY_INIT,
1455 CSIPHY_CFG,
1456};
1457
1458struct csiphy_cfg_data {
1459 enum csiphy_cfg_type_t cfgtype;
1460 struct msm_camera_csiphy_params *csiphy_params;
Nishant Panditb2157c92012-04-25 01:09:28 +05301461};
1462
1463#define CSI_EMBED_DATA 0x12
1464#define CSI_RESERVED_DATA_0 0x13
1465#define CSI_YUV422_8 0x1E
1466#define CSI_RAW8 0x2A
1467#define CSI_RAW10 0x2B
1468#define CSI_RAW12 0x2C
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001469#define CSI_YUV420_Y_8 0x30
1470#define CSI_YUV420_UV_8 0x31
1471#define CSI_YUV420_JM_8 0x32
Nishant Panditb2157c92012-04-25 01:09:28 +05301472
1473#define CSI_DECODE_6BIT 0
1474#define CSI_DECODE_8BIT 1
1475#define CSI_DECODE_10BIT 2
1476#define CSI_DECODE_DPCM_10_8_10 5
1477
Sreesudhan Ramakrish Ramkumard8123212012-06-30 13:15:27 -07001478#define ISPIF_STREAM(intf, action, vfe) (((intf)<<ISPIF_S_STREAM_SHIFT)+\
1479 (action)+((vfe)<<ISPIF_VFE_INTF_SHIFT))
1480#define ISPIF_ON_FRAME_BOUNDARY (0x01 << 0)
1481#define ISPIF_OFF_FRAME_BOUNDARY (0x01 << 1)
1482#define ISPIF_OFF_IMMEDIATELY (0x01 << 2)
1483#define ISPIF_S_STREAM_SHIFT 4
1484#define ISPIF_VFE_INTF_SHIFT 12
Nishant Panditb2157c92012-04-25 01:09:28 +05301485
1486#define PIX_0 (0x01 << 0)
1487#define RDI_0 (0x01 << 1)
1488#define PIX_1 (0x01 << 2)
1489#define RDI_1 (0x01 << 3)
Sreesudhan Ramakrish Ramkumard8123212012-06-30 13:15:27 -07001490#define RDI_2 (0x01 << 4)
Nishant Panditb2157c92012-04-25 01:09:28 +05301491
Sreesudhan Ramakrish Ramkumard8123212012-06-30 13:15:27 -07001492enum msm_ispif_vfe_intf {
1493 VFE0,
1494 VFE1,
1495 VFE_MAX,
1496};
Nishant Panditb2157c92012-04-25 01:09:28 +05301497
1498enum msm_ispif_intftype {
1499 PIX0,
1500 RDI0,
1501 PIX1,
1502 RDI1,
Nishant Panditb2157c92012-04-25 01:09:28 +05301503 RDI2,
1504 INTF_MAX,
1505};
1506
1507enum msm_ispif_vc {
1508 VC0,
1509 VC1,
1510 VC2,
1511 VC3,
1512};
1513
1514enum msm_ispif_cid {
1515 CID0,
1516 CID1,
1517 CID2,
1518 CID3,
1519 CID4,
1520 CID5,
1521 CID6,
1522 CID7,
1523 CID8,
1524 CID9,
1525 CID10,
1526 CID11,
1527 CID12,
1528 CID13,
1529 CID14,
1530 CID15,
1531};
1532
1533struct msm_ispif_params {
1534 uint8_t intftype;
1535 uint16_t cid_mask;
1536 uint8_t csid;
Sreesudhan Ramakrish Ramkumard8123212012-06-30 13:15:27 -07001537 uint8_t vfe_intf;
Nishant Panditb2157c92012-04-25 01:09:28 +05301538};
1539
1540struct msm_ispif_params_list {
1541 uint32_t len;
1542 struct msm_ispif_params params[4];
1543};
1544
1545enum ispif_cfg_type_t {
1546 ISPIF_INIT,
1547 ISPIF_SET_CFG,
1548 ISPIF_SET_ON_FRAME_BOUNDARY,
1549 ISPIF_SET_OFF_FRAME_BOUNDARY,
1550 ISPIF_SET_OFF_IMMEDIATELY,
1551 ISPIF_RELEASE,
1552};
1553
1554struct ispif_cfg_data {
1555 enum ispif_cfg_type_t cfgtype;
1556 union {
1557 uint32_t csid_version;
1558 int cmd;
1559 struct msm_ispif_params_list ispif_params;
1560 } cfg;
1561};
1562
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001563enum msm_camera_i2c_reg_addr_type {
1564 MSM_CAMERA_I2C_BYTE_ADDR = 1,
1565 MSM_CAMERA_I2C_WORD_ADDR,
1566};
1567
1568struct msm_camera_i2c_reg_array {
1569 uint16_t reg_addr;
1570 uint16_t reg_data;
1571};
1572
1573enum msm_camera_i2c_data_type {
1574 MSM_CAMERA_I2C_BYTE_DATA = 1,
1575 MSM_CAMERA_I2C_WORD_DATA,
1576 MSM_CAMERA_I2C_SET_BYTE_MASK,
1577 MSM_CAMERA_I2C_UNSET_BYTE_MASK,
1578 MSM_CAMERA_I2C_SET_WORD_MASK,
1579 MSM_CAMERA_I2C_UNSET_WORD_MASK,
1580 MSM_CAMERA_I2C_SET_BYTE_WRITE_MASK_DATA,
1581};
1582
1583struct msm_camera_i2c_reg_setting {
1584 struct msm_camera_i2c_reg_array *reg_setting;
1585 uint16_t size;
1586 enum msm_camera_i2c_reg_addr_type addr_type;
1587 enum msm_camera_i2c_data_type data_type;
1588 uint16_t delay;
1589};
1590
1591enum oem_setting_type {
1592 I2C_READ = 1,
1593 I2C_WRITE,
1594 GPIO_OP,
1595 EEPROM_READ,
1596 VREG_SET,
1597 CLK_SET,
1598};
1599
1600struct sensor_oem_setting {
1601 enum oem_setting_type type;
1602 void *data;
1603};
1604
1605enum camera_vreg_type {
1606 REG_LDO,
1607 REG_VS,
1608 REG_GPIO,
1609};
1610
1611struct camera_vreg_t {
1612 const char *reg_name;
1613 enum camera_vreg_type type;
1614 int min_voltage;
1615 int max_voltage;
1616 int op_mode;
1617 uint32_t delay;
1618};
1619
1620struct msm_camera_vreg_setting {
1621 struct camera_vreg_t *cam_vreg;
1622 uint16_t num_vreg;
1623 uint8_t enable;
1624};
1625
1626struct msm_cam_clk_info {
1627 const char *clk_name;
1628 long clk_rate;
1629 uint32_t delay;
1630};
1631
1632struct msm_cam_clk_setting {
1633 struct msm_cam_clk_info *clk_info;
1634 uint16_t num_clk_info;
1635 uint8_t enable;
1636};
1637
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001638struct sensor_cfg_data {
1639 int cfgtype;
1640 int mode;
1641 int rs;
1642 uint8_t max_steps;
1643
1644 union {
1645 int8_t effect;
1646 uint8_t lens_shading;
1647 uint16_t prevl_pf;
1648 uint16_t prevp_pl;
1649 uint16_t pictl_pf;
1650 uint16_t pictp_pl;
1651 uint32_t pict_max_exp_lc;
1652 uint16_t p_fps;
Su Liu6c3bb322012-02-14 02:15:05 +05301653 uint8_t iso_type;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001654 struct sensor_init_cfg init_info;
1655 struct sensor_pict_fps gfps;
1656 struct exp_gain_cfg exp_gain;
1657 struct focus_cfg focus;
1658 struct fps_cfg fps;
1659 struct wb_info_cfg wb_info;
1660 struct sensor_3d_exp_cfg sensor_3d_exp;
1661 struct sensor_calib_data calib_info;
Kevin Chana980f392011-08-01 20:55:00 -07001662 struct sensor_output_info_t output_info;
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001663 struct msm_eeprom_data_t eeprom_data;
Nishant Panditb2157c92012-04-25 01:09:28 +05301664 struct csi_lane_params_t csi_lane_params;
Jeyaprakash Soundrapandiana7203372013-01-21 17:57:41 -08001665 struct sensor_hdr_update_parm_t hdr_update_parm;
Taniya Dasa9bdb012011-09-08 11:21:33 +05301666 /* QRD */
1667 uint16_t antibanding;
1668 uint8_t contrast;
1669 uint8_t saturation;
1670 uint8_t sharpness;
1671 int8_t brightness;
1672 int ae_mode;
1673 uint8_t wb_val;
1674 int8_t exp_compensation;
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001675 uint32_t pclk;
Taniya Dasa9bdb012011-09-08 11:21:33 +05301676 struct cord aec_cord;
1677 int is_autoflash;
1678 struct mirror_flip mirror_flip;
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001679 void *setting;
Punit Soniedeca652013-01-24 13:36:26 -08001680 int32_t vision_mode_enable;
1681 int32_t vision_ae;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001682 } cfg;
1683};
1684
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001685enum gpio_operation_type {
1686 GPIO_REQUEST,
1687 GPIO_FREE,
1688 GPIO_SET_DIRECTION_OUTPUT,
1689 GPIO_SET_DIRECTION_INPUT,
1690 GPIO_GET_VALUE,
1691 GPIO_SET_VALUE,
1692};
1693
1694struct msm_cam_gpio_operation {
1695 enum gpio_operation_type op_type;
1696 unsigned address;
1697 int value;
1698 const char *tag;
1699};
1700
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001701struct damping_params_t {
1702 uint32_t damping_step;
1703 uint32_t damping_delay;
1704 uint32_t hw_params;
1705};
1706
1707enum actuator_type {
1708 ACTUATOR_VCM,
1709 ACTUATOR_PIEZO,
Lokesh Kumar Aakulu893778c2013-03-02 05:29:44 +05301710 ACTUATOR_HALL_EFFECT,
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001711};
1712
1713enum msm_actuator_data_type {
1714 MSM_ACTUATOR_BYTE_DATA = 1,
1715 MSM_ACTUATOR_WORD_DATA,
1716};
1717
1718enum msm_actuator_addr_type {
1719 MSM_ACTUATOR_BYTE_ADDR = 1,
1720 MSM_ACTUATOR_WORD_ADDR,
1721};
1722
1723enum msm_actuator_write_type {
1724 MSM_ACTUATOR_WRITE_HW_DAMP,
1725 MSM_ACTUATOR_WRITE_DAC,
1726};
1727
1728struct msm_actuator_reg_params_t {
1729 enum msm_actuator_write_type reg_write_type;
1730 uint32_t hw_mask;
1731 uint16_t reg_addr;
1732 uint16_t hw_shift;
1733 uint16_t data_shift;
1734};
1735
1736struct reg_settings_t {
1737 uint16_t reg_addr;
1738 uint16_t reg_data;
1739};
1740
1741struct region_params_t {
1742 /* [0] = ForwardDirection Macro boundary
1743 [1] = ReverseDirection Inf boundary
1744 */
1745 uint16_t step_bound[2];
1746 uint16_t code_per_step;
1747};
1748
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001749struct msm_actuator_move_params_t {
1750 int8_t dir;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001751 int8_t sign_dir;
1752 int16_t dest_step_pos;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001753 int32_t num_steps;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001754 struct damping_params_t *ringing_params;
1755};
1756
1757struct msm_actuator_tuning_params_t {
1758 int16_t initial_code;
1759 uint16_t pwd_step;
1760 uint16_t region_size;
1761 uint32_t total_steps;
1762 struct region_params_t *region_params;
1763};
1764
1765struct msm_actuator_params_t {
1766 enum actuator_type act_type;
1767 uint8_t reg_tbl_size;
1768 uint16_t data_size;
1769 uint16_t init_setting_size;
1770 uint32_t i2c_addr;
1771 enum msm_actuator_addr_type i2c_addr_type;
1772 enum msm_actuator_data_type i2c_data_type;
1773 struct msm_actuator_reg_params_t *reg_tbl_params;
1774 struct reg_settings_t *init_settings;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001775};
1776
1777struct msm_actuator_set_info_t {
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001778 struct msm_actuator_params_t actuator_params;
1779 struct msm_actuator_tuning_params_t af_tuning_params;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001780};
1781
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001782struct msm_actuator_get_info_t {
1783 uint32_t focal_length_num;
1784 uint32_t focal_length_den;
1785 uint32_t f_number_num;
1786 uint32_t f_number_den;
1787 uint32_t f_pix_num;
1788 uint32_t f_pix_den;
1789 uint32_t total_f_dist_num;
1790 uint32_t total_f_dist_den;
Jeyaprakash Soundrapandian04592002012-02-08 10:29:50 -08001791 uint32_t hor_view_angle_num;
1792 uint32_t hor_view_angle_den;
1793 uint32_t ver_view_angle_num;
1794 uint32_t ver_view_angle_den;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001795};
1796
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001797enum af_camera_name {
1798 ACTUATOR_MAIN_CAM_0,
1799 ACTUATOR_MAIN_CAM_1,
1800 ACTUATOR_MAIN_CAM_2,
1801 ACTUATOR_MAIN_CAM_3,
1802 ACTUATOR_MAIN_CAM_4,
1803 ACTUATOR_MAIN_CAM_5,
1804 ACTUATOR_WEB_CAM_0,
1805 ACTUATOR_WEB_CAM_1,
1806 ACTUATOR_WEB_CAM_2,
1807};
1808
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001809struct msm_actuator_cfg_data {
1810 int cfgtype;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001811 uint8_t is_af_supported;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001812 union {
1813 struct msm_actuator_move_params_t move;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001814 struct msm_actuator_set_info_t set_info;
1815 struct msm_actuator_get_info_t get_info;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001816 enum af_camera_name cam_name;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001817 } cfg;
1818};
1819
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001820struct msm_eeprom_support {
1821 uint16_t is_supported;
1822 uint16_t size;
1823 uint16_t index;
1824 uint16_t qvalue;
1825};
1826
1827struct msm_calib_wb {
1828 uint16_t r_over_g;
1829 uint16_t b_over_g;
1830 uint16_t gr_over_gb;
1831};
1832
1833struct msm_calib_af {
1834 uint16_t macro_dac;
1835 uint16_t inf_dac;
1836 uint16_t start_dac;
1837};
1838
1839struct msm_calib_lsc {
1840 uint16_t r_gain[221];
1841 uint16_t b_gain[221];
1842 uint16_t gr_gain[221];
1843 uint16_t gb_gain[221];
1844};
1845
1846struct pixel_t {
1847 int x;
1848 int y;
1849};
1850
1851struct msm_calib_dpc {
1852 uint16_t validcount;
1853 struct pixel_t snapshot_coord[128];
1854 struct pixel_t preview_coord[128];
1855 struct pixel_t video_coord[128];
1856};
1857
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001858struct msm_calib_raw {
1859 uint8_t *data;
1860 uint32_t size;
1861};
1862
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001863struct msm_camera_eeprom_info_t {
1864 struct msm_eeprom_support af;
1865 struct msm_eeprom_support wb;
1866 struct msm_eeprom_support lsc;
1867 struct msm_eeprom_support dpc;
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001868 struct msm_eeprom_support raw;
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001869};
1870
1871struct msm_eeprom_cfg_data {
1872 int cfgtype;
1873 uint8_t is_eeprom_supported;
1874 union {
1875 struct msm_eeprom_data_t get_data;
1876 struct msm_camera_eeprom_info_t get_info;
1877 } cfg;
1878};
1879
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001880struct sensor_large_data {
1881 int cfgtype;
1882 union {
1883 struct sensor_3d_cali_data_t sensor_3d_cali_data;
1884 } data;
1885};
1886
1887enum sensor_type_t {
1888 BAYER,
1889 YUV,
1890 JPEG_SOC,
1891};
1892
1893enum flash_type {
1894 LED_FLASH,
1895 STROBE_FLASH,
1896};
1897
1898enum strobe_flash_ctrl_type {
1899 STROBE_FLASH_CTRL_INIT,
1900 STROBE_FLASH_CTRL_CHARGE,
1901 STROBE_FLASH_CTRL_RELEASE
1902};
1903
1904struct strobe_flash_ctrl_data {
1905 enum strobe_flash_ctrl_type type;
1906 int charge_en;
1907};
1908
1909struct msm_camera_info {
1910 int num_cameras;
1911 uint8_t has_3d_support[MSM_MAX_CAMERA_SENSORS];
1912 uint8_t is_internal_cam[MSM_MAX_CAMERA_SENSORS];
1913 uint32_t s_mount_angle[MSM_MAX_CAMERA_SENSORS];
1914 const char *video_dev_name[MSM_MAX_CAMERA_SENSORS];
1915 enum sensor_type_t sensor_type[MSM_MAX_CAMERA_SENSORS];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001916};
1917
1918struct msm_cam_config_dev_info {
1919 int num_config_nodes;
1920 const char *config_dev_name[MSM_MAX_CAMERA_CONFIGS];
Ankit Premrajkaf94bcc62011-08-22 15:23:53 -07001921 int config_dev_id[MSM_MAX_CAMERA_CONFIGS];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001922};
1923
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -08001924struct msm_mctl_node_info {
1925 int num_mctl_nodes;
1926 const char *mctl_node_name[MSM_MAX_CAMERA_SENSORS];
1927};
1928
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001929struct flash_ctrl_data {
1930 int flashtype;
1931 union {
1932 int led_state;
1933 struct strobe_flash_ctrl_data strobe_ctrl;
1934 } ctrl_data;
1935};
1936
1937#define GET_NAME 0
1938#define GET_PREVIEW_LINE_PER_FRAME 1
1939#define GET_PREVIEW_PIXELS_PER_LINE 2
1940#define GET_SNAPSHOT_LINE_PER_FRAME 3
1941#define GET_SNAPSHOT_PIXELS_PER_LINE 4
1942#define GET_SNAPSHOT_FPS 5
1943#define GET_SNAPSHOT_MAX_EP_LINE_CNT 6
1944
1945struct msm_camsensor_info {
1946 char name[MAX_SENSOR_NAME];
1947 uint8_t flash_enabled;
Sreesudhan Ramakrish Ramkumara2688822012-04-05 20:22:50 -07001948 uint8_t strobe_flash_enabled;
1949 uint8_t actuator_enabled;
Nishant Panditb2157c92012-04-25 01:09:28 +05301950 uint8_t ispif_supported;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001951 int8_t total_steps;
1952 uint8_t support_3d;
Mingcheng Zhuc85b8ad2012-03-08 17:47:17 -08001953 enum flash_type flashtype;
1954 enum sensor_type_t sensor_type;
1955 uint32_t pxlcode; /* enum v4l2_mbus_pixelcode */
1956 uint32_t camera_type; /* msm_camera_type */
1957 int mount_angle;
1958 uint32_t max_width;
1959 uint32_t max_height;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001960};
Kiran Kumar H Nceea7622011-08-23 14:01:03 -07001961
1962#define V4L2_SINGLE_PLANE 0
1963#define V4L2_MULTI_PLANE_Y 0
1964#define V4L2_MULTI_PLANE_CBCR 1
1965#define V4L2_MULTI_PLANE_CB 1
1966#define V4L2_MULTI_PLANE_CR 2
1967
1968struct plane_data {
1969 int plane_id;
1970 uint32_t offset;
1971 unsigned long size;
1972};
1973
1974struct img_plane_info {
1975 uint32_t width;
1976 uint32_t height;
1977 uint32_t pixelformat;
1978 uint8_t buffer_type; /*Single/Multi planar*/
1979 uint8_t output_port;
1980 uint32_t ext_mode;
1981 uint8_t num_planes;
1982 struct plane_data plane[MAX_PLANES];
Mingcheng Zhu996be182011-10-16 16:04:23 -07001983 uint32_t sp_y_offset;
Kiran Kumar H N90785902012-07-05 13:59:38 -07001984 uint32_t inst_handle;
Kiran Kumar H Nceea7622011-08-23 14:01:03 -07001985};
1986
Kevin Chan210061f2012-02-14 20:56:16 -08001987#define QCAMERA_NAME "qcamera"
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07001988#define QCAMERA_SERVER_NAME "qcamera_server"
Kevin Chan210061f2012-02-14 20:56:16 -08001989#define QCAMERA_DEVICE_GROUP_ID 1
1990#define QCAMERA_VNODE_GROUP_ID 2
1991
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07001992enum msm_cam_subdev_type {
1993 CSIPHY_DEV,
1994 CSID_DEV,
1995 CSIC_DEV,
1996 ISPIF_DEV,
1997 VFE_DEV,
1998 AXI_DEV,
1999 VPE_DEV,
2000 SENSOR_DEV,
2001 ACTUATOR_DEV,
2002 EEPROM_DEV,
2003 GESTURE_DEV,
2004 IRQ_ROUTER_DEV,
2005 CPP_DEV,
Sreesudhan Ramakrish Ramkumarc842b612012-05-21 17:23:24 -07002006 CCI_DEV,
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07002007};
2008
2009struct msm_mctl_set_sdev_data {
2010 uint32_t revision;
2011 enum msm_cam_subdev_type sdev_type;
2012};
2013
Kevin Chan94b4c832012-03-02 21:27:16 -08002014#define MSM_CAM_V4L2_IOCTL_GET_CAMERA_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07002015 _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08002016
2017#define MSM_CAM_V4L2_IOCTL_GET_CONFIG_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07002018 _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08002019
2020#define MSM_CAM_V4L2_IOCTL_GET_MCTL_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07002021 _IOWR('V', BASE_VIDIOC_PRIVATE + 3, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08002022
2023#define MSM_CAM_V4L2_IOCTL_CTRL_CMD_DONE \
Kevin Chan41a38702012-06-06 22:25:41 -07002024 _IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08002025
2026#define MSM_CAM_V4L2_IOCTL_GET_EVENT_PAYLOAD \
Kevin Chan41a38702012-06-06 22:25:41 -07002027 _IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08002028
Sunid Wilson4584b5f2012-04-13 12:48:25 -07002029#define MSM_CAM_IOCTL_SEND_EVENT \
2030 _IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct v4l2_event)
2031
Kiran Kumar H N64bd23c2012-05-25 12:06:21 -07002032#define MSM_CAM_V4L2_IOCTL_CFG_VPE \
2033 _IOWR('V', BASE_VIDIOC_PRIVATE + 7, struct msm_vpe_cfg_cmd)
2034
Kevin Chan41a38702012-06-06 22:25:41 -07002035#define MSM_CAM_V4L2_IOCTL_PRIVATE_S_CTRL \
2036 _IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct msm_camera_v4l2_ioctl_t)
2037
Kiran Kumar H N90785902012-07-05 13:59:38 -07002038#define MSM_CAM_V4L2_IOCTL_PRIVATE_G_CTRL \
2039 _IOWR('V', BASE_VIDIOC_PRIVATE + 9, struct msm_camera_v4l2_ioctl_t)
2040
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08002041#define MSM_CAM_V4L2_IOCTL_PRIVATE_GENERAL \
2042 _IOW('V', BASE_VIDIOC_PRIVATE + 10, struct msm_camera_v4l2_ioctl_t)
2043
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07002044#define VIDIOC_MSM_VPE_INIT \
2045 _IO('V', BASE_VIDIOC_PRIVATE + 15)
2046
2047#define VIDIOC_MSM_VPE_RELEASE \
2048 _IO('V', BASE_VIDIOC_PRIVATE + 16)
2049
2050#define VIDIOC_MSM_VPE_CFG \
2051 _IOWR('V', BASE_VIDIOC_PRIVATE + 17, struct msm_mctl_pp_params *)
2052
2053#define VIDIOC_MSM_AXI_INIT \
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08002054 _IOWR('V', BASE_VIDIOC_PRIVATE + 18, uint8_t *)
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07002055
2056#define VIDIOC_MSM_AXI_RELEASE \
2057 _IO('V', BASE_VIDIOC_PRIVATE + 19)
2058
2059#define VIDIOC_MSM_AXI_CFG \
2060 _IOWR('V', BASE_VIDIOC_PRIVATE + 20, void *)
2061
2062#define VIDIOC_MSM_AXI_IRQ \
2063 _IOWR('V', BASE_VIDIOC_PRIVATE + 21, void *)
2064
2065#define VIDIOC_MSM_AXI_BUF_CFG \
2066 _IOWR('V', BASE_VIDIOC_PRIVATE + 22, void *)
2067
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08002068#define VIDIOC_MSM_AXI_RDI_COUNT_UPDATE \
2069 _IOWR('V', BASE_VIDIOC_PRIVATE + 23, struct rdi_count_msg)
2070
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07002071#define VIDIOC_MSM_VFE_INIT \
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08002072 _IO('V', BASE_VIDIOC_PRIVATE + 24)
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07002073
2074#define VIDIOC_MSM_VFE_RELEASE \
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08002075 _IO('V', BASE_VIDIOC_PRIVATE + 25)
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07002076
Nishant Panditd74a62d2012-12-13 14:22:31 +05302077#define VIDIOC_MSM_AXI_LOW_POWER_MODE \
2078 _IO('V', BASE_VIDIOC_PRIVATE + 26)
2079
2080
Kevin Chan94b4c832012-03-02 21:27:16 -08002081struct msm_camera_v4l2_ioctl_t {
Kevin Chan41a38702012-06-06 22:25:41 -07002082 uint32_t id;
Sudhir Sharma4472ce52012-12-01 14:00:27 -08002083 uint32_t len;
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08002084 uint32_t trans_code;
2085 void __user *ioctl_ptr;
Kevin Chan94b4c832012-03-02 21:27:16 -08002086};
2087
Lakshmi Narayana Kalavalacd3d81e2012-07-31 13:04:03 -07002088struct msm_camera_vfe_params_t {
2089 uint32_t operation_mode;
2090 uint32_t capture_count;
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08002091 uint8_t skip_reset;
2092 uint8_t stop_immediately;
Lakshmi Narayana Kalavalacd3d81e2012-07-31 13:04:03 -07002093 uint16_t port_info;
Lakshmi Narayana Kalavala3e8a1d12012-07-31 15:00:09 -07002094 uint32_t inst_handle;
Lakshmi Narayana Kalavalacd3d81e2012-07-31 13:04:03 -07002095 uint16_t cmd_type;
Azam Sadiq Pasha Kapatrala Syed99861662012-12-02 22:05:25 -08002096 uint8_t stream_error;
Lakshmi Narayana Kalavalacd3d81e2012-07-31 13:04:03 -07002097};
2098
Kiran Kumar H Nb4a278e2012-06-18 19:25:47 -07002099enum msm_camss_irq_idx {
2100 CAMERA_SS_IRQ_0,
2101 CAMERA_SS_IRQ_1,
2102 CAMERA_SS_IRQ_2,
2103 CAMERA_SS_IRQ_3,
2104 CAMERA_SS_IRQ_4,
2105 CAMERA_SS_IRQ_5,
2106 CAMERA_SS_IRQ_6,
2107 CAMERA_SS_IRQ_7,
2108 CAMERA_SS_IRQ_8,
2109 CAMERA_SS_IRQ_9,
2110 CAMERA_SS_IRQ_10,
2111 CAMERA_SS_IRQ_11,
2112 CAMERA_SS_IRQ_12,
2113 CAMERA_SS_IRQ_MAX
2114};
2115
2116enum msm_cam_hw_idx {
2117 MSM_CAM_HW_MICRO,
2118 MSM_CAM_HW_CCI,
2119 MSM_CAM_HW_CSI0,
2120 MSM_CAM_HW_CSI1,
2121 MSM_CAM_HW_CSI2,
2122 MSM_CAM_HW_CSI3,
2123 MSM_CAM_HW_ISPIF,
2124 MSM_CAM_HW_CPP,
2125 MSM_CAM_HW_VFE0,
2126 MSM_CAM_HW_VFE1,
2127 MSM_CAM_HW_JPEG0,
2128 MSM_CAM_HW_JPEG1,
2129 MSM_CAM_HW_JPEG2,
2130 MSM_CAM_HW_MAX
2131};
2132
2133struct msm_camera_irq_cfg {
2134 /* Bit mask of all the camera hardwares that needs to
2135 * be composited into a single IRQ to the MSM.
2136 * Current usage: (may be updated based on hw changes)
2137 * Bits 31:13 - Reserved.
2138 * Bits 12:0
2139 * 12 - MSM_CAM_HW_JPEG2
2140 * 11 - MSM_CAM_HW_JPEG1
2141 * 10 - MSM_CAM_HW_JPEG0
2142 * 9 - MSM_CAM_HW_VFE1
2143 * 8 - MSM_CAM_HW_VFE0
2144 * 7 - MSM_CAM_HW_CPP
2145 * 6 - MSM_CAM_HW_ISPIF
2146 * 5 - MSM_CAM_HW_CSI3
2147 * 4 - MSM_CAM_HW_CSI2
2148 * 3 - MSM_CAM_HW_CSI1
2149 * 2 - MSM_CAM_HW_CSI0
2150 * 1 - MSM_CAM_HW_CCI
2151 * 0 - MSM_CAM_HW_MICRO
2152 */
2153 uint32_t cam_hw_mask;
2154 uint8_t irq_idx;
2155 uint8_t num_hwcore;
2156};
2157
2158#define MSM_IRQROUTER_CFG_COMPIRQ \
2159 _IOWR('V', BASE_VIDIOC_PRIVATE, void __user *)
2160
Kevin Chan73ec7282012-06-07 01:32:00 -07002161#define MAX_NUM_CPP_STRIPS 8
2162
2163enum msm_cpp_frame_type {
2164 MSM_CPP_OFFLINE_FRAME,
2165 MSM_CPP_REALTIME_FRAME,
2166};
2167
2168struct msm_cpp_frame_strip_info {
2169 int scale_v_en;
2170 int scale_h_en;
2171
2172 int upscale_v_en;
2173 int upscale_h_en;
2174
2175 int src_start_x;
2176 int src_end_x;
2177 int src_start_y;
2178 int src_end_y;
2179
2180 /* Padding is required for upscaler because it does not
2181 * pad internally like other blocks, also needed for rotation
2182 * rotation expects all the blocks in the stripe to be the same size
2183 * Padding is done such that all the extra padded pixels
2184 * are on the right and bottom
2185 */
2186 int pad_bottom;
2187 int pad_top;
2188 int pad_right;
2189 int pad_left;
2190
2191 int v_init_phase;
2192 int h_init_phase;
2193 int h_phase_step;
2194 int v_phase_step;
2195
2196 int prescale_crop_width_first_pixel;
2197 int prescale_crop_width_last_pixel;
2198 int prescale_crop_height_first_line;
2199 int prescale_crop_height_last_line;
2200
2201 int postscale_crop_height_first_line;
2202 int postscale_crop_height_last_line;
2203 int postscale_crop_width_first_pixel;
2204 int postscale_crop_width_last_pixel;
2205
2206 int dst_start_x;
2207 int dst_end_x;
2208 int dst_start_y;
2209 int dst_end_y;
2210
2211 int bytes_per_pixel;
2212 unsigned int source_address;
2213 unsigned int destination_address;
2214 unsigned int src_stride;
2215 unsigned int dst_stride;
2216 int rotate_270;
2217 int horizontal_flip;
2218 int vertical_flip;
2219 int scale_output_width;
2220 int scale_output_height;
2221};
2222
2223struct msm_cpp_frame_info_t {
2224 int32_t frame_id;
2225 uint32_t inst_id;
2226 uint32_t client_id;
2227 enum msm_cpp_frame_type frame_type;
2228 uint32_t num_strips;
2229 struct msm_cpp_frame_strip_info *strip_info;
2230};
2231
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -07002232struct msm_ver_num_info {
2233 uint32_t main;
2234 uint32_t minor;
2235 uint32_t rev;
2236};
2237
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08002238struct intf_mctl_mapping_cfg {
2239 int is_bayer_sensor;
2240 int vnode_id;
2241 int num_entries;
2242 uint32_t image_modes[MSM_V4L2_EXT_CAPTURE_MODE_MAX];
2243};
2244
Kevin Chan73ec7282012-06-07 01:32:00 -07002245#define VIDIOC_MSM_CPP_CFG \
2246 _IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_camera_v4l2_ioctl_t)
2247
2248#define VIDIOC_MSM_CPP_GET_EVENTPAYLOAD \
2249 _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t)
2250
2251#define VIDIOC_MSM_CPP_GET_INST_INFO \
2252 _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
2253
2254#define V4L2_EVENT_CPP_FRAME_DONE (V4L2_EVENT_PRIVATE_START + 0)
2255
Kiran Kumar H N90785902012-07-05 13:59:38 -07002256/* Instance Handle - inst_handle
2257 * Data bundle containing the information about where
2258 * to get a buffer for a particular camera instance.
2259 * This is a bitmask containing the following data:
2260 * Buffer Handle Bitmask:
2261 * ------------------------------------
2262 * Bits : Purpose
2263 * ------------------------------------
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08002264 * 31 : is Dev ID valid?
2265 * 30 - 24 : Dev ID.
Kiran Kumar H N90785902012-07-05 13:59:38 -07002266 * 23 : is Image mode valid?
2267 * 22 - 16 : Image mode.
2268 * 15 : is MCTL PP inst idx valid?
2269 * 14 - 8 : MCTL PP inst idx.
2270 * 7 : is Video inst idx valid?
2271 * 6 - 0 : Video inst idx.
2272 */
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08002273#define CLR_DEVID_MODE(handle) (handle &= 0x00FFFFFF)
2274#define SET_DEVID_MODE(handle, data) \
2275 (handle |= ((0x1 << 31) | ((data & 0x7F) << 24)))
2276#define GET_DEVID_MODE(handle) \
2277 ((handle & 0x80000000) ? ((handle & 0x7F000000) >> 24) : 0xFF)
2278
Kiran Kumar H N90785902012-07-05 13:59:38 -07002279#define CLR_IMG_MODE(handle) (handle &= 0xFF00FFFF)
2280#define SET_IMG_MODE(handle, data) \
2281 (handle |= ((0x1 << 23) | ((data & 0x7F) << 16)))
2282#define GET_IMG_MODE(handle) \
2283 ((handle & 0x800000) ? ((handle & 0x7F0000) >> 16) : 0xFF)
2284
2285#define CLR_MCTLPP_INST_IDX(handle) (handle &= 0xFFFF00FF)
2286#define SET_MCTLPP_INST_IDX(handle, data) \
2287 (handle |= ((0x1 << 15) | ((data & 0x7F) << 8)))
2288#define GET_MCTLPP_INST_IDX(handle) \
2289 ((handle & 0x8000) ? ((handle & 0x7F00) >> 8) : 0xFF)
2290
2291#define CLR_VIDEO_INST_IDX(handle) (handle &= 0xFFFFFF00)
2292#define GET_VIDEO_INST_IDX(handle) \
2293 ((handle & 0x80) ? (handle & 0x7F) : 0xFF)
2294#define SET_VIDEO_INST_IDX(handle, data) \
2295 (handle |= (0x1 << 7) | (data & 0x7F))
2296
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002297#endif /* __LINUX_MSM_CAMERA_H */