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Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
Steve Mucklea55df6e2010-01-07 12:43:24 -08002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
Steve Mucklea55df6e2010-01-07 12:43:24 -080012 */
13
14#include <linux/kernel.h>
15#include <linux/platform_device.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070016#include <linux/gpio.h>
Steve Muckle9161d302010-02-11 11:50:40 -080017#include <linux/irq.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018#include <linux/io.h>
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +053019#include <linux/msm_ssbi.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070020#include <linux/mfd/pmic8058.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080021
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070022#include <linux/leds.h>
23#include <linux/pmic8058-othc.h>
24#include <linux/mfd/pmic8901.h>
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053025#include <linux/regulator/gpio-regulator.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070026#include <linux/regulator/pmic8901-regulator.h>
27#include <linux/bootmem.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070028#include <linux/msm_adc.h>
29#include <linux/m_adcproc.h>
30#include <linux/mfd/marimba.h>
31#include <linux/msm-charger.h>
32#include <linux/i2c.h>
33#include <linux/i2c/sx150x.h>
34#include <linux/smsc911x.h>
35#include <linux/spi/spi.h>
36#include <linux/input/tdisc_shinetsu.h>
37#include <linux/input/cy8c_ts.h>
38#include <linux/cyttsp.h>
39#include <linux/i2c/isa1200.h>
40#include <linux/dma-mapping.h>
41#include <linux/i2c/bq27520.h>
42
43#ifdef CONFIG_ANDROID_PMEM
44#include <linux/android_pmem.h>
45#endif
46
47#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
48#include <linux/i2c/smb137b.h>
49#endif
Lei Zhou338cab82011-08-19 13:38:17 -040050#ifdef CONFIG_SND_SOC_WM8903
51#include <sound/wm8903.h>
52#endif
Steve Mucklea55df6e2010-01-07 12:43:24 -080053#include <asm/mach-types.h>
54#include <asm/mach/arch.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070055#include <asm/setup.h>
Marc Zyngier89bdafd12011-12-22 11:39:20 +053056#include <asm/hardware/gic.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080057
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070058#include <mach/dma.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080059#include <mach/board.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070060#include <mach/irqs.h>
61#include <mach/msm_spi.h>
62#include <mach/msm_serial_hs.h>
63#include <mach/msm_serial_hs_lite.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080064#include <mach/msm_iomap.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070065#include <mach/msm_memtypes.h>
66#include <asm/mach/mmc.h>
67#include <mach/msm_battery.h>
68#include <mach/msm_hsusb.h>
Rohit Vaswania513aa8d2011-07-18 15:14:28 -070069#include <mach/gpiomux.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070070#ifdef CONFIG_MSM_DSPS
71#include <mach/msm_dsps.h>
72#endif
73#include <mach/msm_xo.h>
74#include <mach/msm_bus_board.h>
75#include <mach/socinfo.h>
76#include <linux/i2c/isl9519.h>
77#ifdef CONFIG_USB_G_ANDROID
78#include <linux/usb/android.h>
79#include <mach/usbdiag.h>
80#endif
81#include <linux/regulator/consumer.h>
82#include <linux/regulator/machine.h>
83#include <mach/sdio_al.h>
84#include <mach/rpm.h>
85#include <mach/rpm-regulator.h>
Abhijeet Dharmapurikar6d565fd2011-09-15 18:49:56 -070086#include <mach/restart.h>
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053087#include <mach/board-msm8660.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080088
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070089#include "devices.h"
90#include "devices-msm8x60.h"
91#include "cpuidle.h"
92#include "pm.h"
93#include "mpm.h"
94#include "spm.h"
95#include "rpm_log.h"
96#include "timer.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070097#include "gpiomux-8x60.h"
98#include "rpm_stats.h"
99#include "peripheral-loader.h"
100#include <linux/platform_data/qcom_crypto_device.h>
101#include "rpm_resources.h"
Matt Wagantall6d9ebee2011-08-26 12:15:24 -0700102#include "acpuclock.h"
Maheshkumar Sivasubramanian8ccc16e2011-10-25 15:59:57 -0600103#include "pm-boot.h"
Laura Abbott63cfd7e2011-10-10 18:21:01 -0700104
105#include <linux/ion.h>
106#include <mach/ion.h>
107
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700108#define MSM_SHARED_RAM_PHYS 0x40000000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700109#define MDM2AP_SYNC 129
110
Terence Hampson1c73fef2011-07-19 17:10:49 -0400111#define GPIO_ETHERNET_RESET_N_DRAGON 30
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700112#define LCDC_SPI_GPIO_CLK 73
113#define LCDC_SPI_GPIO_CS 72
114#define LCDC_SPI_GPIO_MOSI 70
115#define LCDC_AUO_PANEL_NAME "lcdc_auo_wvga"
116#define LCDC_SAMSUNG_OLED_PANEL_NAME "lcdc_samsung_oled"
117#define LCDC_SAMSUNG_WSVGA_PANEL_NAME "lcdc_samsung_wsvga"
118#define LCDC_SAMSUNG_SPI_DEVICE_NAME "lcdc_samsung_ams367pe02"
119#define LCDC_AUO_SPI_DEVICE_NAME "lcdc_auo_nt35582"
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -0400120#define LCDC_NT35582_PANEL_NAME "lcdc_nt35582_wvga"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700121
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -0700122#define PANEL_NAME_MAX_LEN 30
123#define MIPI_CMD_NOVATEK_QHD_PANEL_NAME "mipi_cmd_novatek_qhd"
124#define MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME "mipi_video_novatek_qhd"
125#define MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME "mipi_video_toshiba_wvga"
126#define HDMI_PANEL_NAME "hdmi_msm"
127#define TVOUT_PANEL_NAME "tvout_msm"
128
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700129#define DSPS_PIL_GENERIC_NAME "dsps"
130#define DSPS_PIL_FLUID_NAME "dsps_fluid"
131
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -0800132#ifdef CONFIG_ION_MSM
133static struct platform_device ion_dev;
134#endif
135
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700136enum {
137 GPIO_EXPANDER_IRQ_BASE = PM8901_IRQ_BASE + NR_PMIC8901_IRQS,
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530138 GPIO_EXPANDER_GPIO_BASE = PM8901_MPP_BASE + PM8901_MPPS,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700139 /* CORE expander */
140 GPIO_CORE_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE,
141 GPIO_CLASS_D1_EN = GPIO_CORE_EXPANDER_BASE,
142 GPIO_WLAN_DEEP_SLEEP_N,
143 GPIO_LVDS_SHUTDOWN_N,
144 GPIO_DISP_RESX_N = GPIO_LVDS_SHUTDOWN_N,
145 GPIO_MS_SYS_RESET_N,
146 GPIO_CAP_TS_RESOUT_N,
147 GPIO_CAP_GAUGE_BI_TOUT,
148 GPIO_ETHERNET_PME,
149 GPIO_EXT_GPS_LNA_EN,
150 GPIO_MSM_WAKES_BT,
151 GPIO_ETHERNET_RESET_N,
152 GPIO_HEADSET_DET_N,
153 GPIO_USB_UICC_EN,
154 GPIO_BACKLIGHT_EN,
155 GPIO_EXT_CAMIF_PWR_EN,
156 GPIO_BATT_GAUGE_INT_N,
157 GPIO_BATT_GAUGE_EN,
158 /* DOCKING expander */
159 GPIO_DOCKING_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + 16,
160 GPIO_MIPI_DSI_RST_N = GPIO_DOCKING_EXPANDER_BASE,
161 GPIO_AUX_JTAG_DET_N,
162 GPIO_DONGLE_DET_N,
163 GPIO_SVIDEO_LOAD_DET,
164 GPIO_SVID_AMP_SHUTDOWN1_N,
165 GPIO_SVID_AMP_SHUTDOWN0_N,
166 GPIO_SDC_WP,
167 GPIO_IRDA_PWDN,
168 GPIO_IRDA_RESET_N,
169 GPIO_DONGLE_GPIO0,
170 GPIO_DONGLE_GPIO1,
171 GPIO_DONGLE_GPIO2,
172 GPIO_DONGLE_GPIO3,
173 GPIO_DONGLE_PWR_EN,
174 GPIO_EMMC_RESET_N,
175 GPIO_TP_EXP2_IO15,
176 /* SURF expander */
177 GPIO_SURF_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 2),
178 GPIO_SD_CARD_DET_1 = GPIO_SURF_EXPANDER_BASE,
179 GPIO_SD_CARD_DET_2,
180 GPIO_SD_CARD_DET_4,
181 GPIO_SD_CARD_DET_5,
182 GPIO_UIM3_RST,
183 GPIO_SURF_EXPANDER_IO5,
184 GPIO_SURF_EXPANDER_IO6,
185 GPIO_ADC_I2C_EN,
186 GPIO_SURF_EXPANDER_IO8,
187 GPIO_SURF_EXPANDER_IO9,
188 GPIO_SURF_EXPANDER_IO10,
189 GPIO_SURF_EXPANDER_IO11,
190 GPIO_SURF_EXPANDER_IO12,
191 GPIO_SURF_EXPANDER_IO13,
192 GPIO_SURF_EXPANDER_IO14,
193 GPIO_SURF_EXPANDER_IO15,
194 /* LEFT KB IO expander */
195 GPIO_LEFT_KB_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 3),
196 GPIO_LEFT_LED_1 = GPIO_LEFT_KB_EXPANDER_BASE,
197 GPIO_LEFT_LED_2,
198 GPIO_LEFT_LED_3,
199 GPIO_LEFT_LED_WLAN,
200 GPIO_JOYSTICK_EN,
201 GPIO_CAP_TS_SLEEP,
202 GPIO_LEFT_KB_IO6,
203 GPIO_LEFT_LED_5,
204 /* RIGHT KB IO expander */
205 GPIO_RIGHT_KB_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 3) + 8,
206 GPIO_RIGHT_LED_1 = GPIO_RIGHT_KB_EXPANDER_BASE,
207 GPIO_RIGHT_LED_2,
208 GPIO_RIGHT_LED_3,
209 GPIO_RIGHT_LED_BT,
210 GPIO_WEB_CAMIF_STANDBY,
211 GPIO_COMPASS_RST_N,
212 GPIO_WEB_CAMIF_RESET_N,
213 GPIO_RIGHT_LED_5,
214 GPIO_R_ALTIMETER_RESET_N,
215 /* FLUID S IO expander */
216 GPIO_SOUTH_EXPANDER_BASE,
217 GPIO_MIC2_ANCR_SEL = GPIO_SOUTH_EXPANDER_BASE,
218 GPIO_MIC1_ANCL_SEL,
219 GPIO_HS_MIC4_SEL,
220 GPIO_FML_MIC3_SEL,
221 GPIO_FMR_MIC5_SEL,
222 GPIO_TS_SLEEP,
223 GPIO_HAP_SHIFT_LVL_OE,
224 GPIO_HS_SW_DIR,
225 /* FLUID N IO expander */
226 GPIO_NORTH_EXPANDER_BASE,
227 GPIO_EPM_3_3V_EN = GPIO_NORTH_EXPANDER_BASE,
228 GPIO_EPM_5V_BOOST_EN,
229 GPIO_AUX_CAM_2P7_EN,
230 GPIO_LED_FLASH_EN,
231 GPIO_LED1_GREEN_N,
232 GPIO_LED2_RED_N,
233 GPIO_FRONT_CAM_RESET_N,
234 GPIO_EPM_LVLSFT_EN,
235 GPIO_N_ALTIMETER_RESET_N,
236 /* EPM expander */
237 GPIO_EPM_EXPANDER_BASE,
238 GPIO_PWR_MON_START = GPIO_EPM_EXPANDER_BASE,
239 GPIO_PWR_MON_RESET_N,
240 GPIO_ADC1_PWDN_N,
241 GPIO_ADC2_PWDN_N,
242 GPIO_EPM_EXPANDER_IO4,
243 GPIO_ADC1_MUX_SPI_INT_N_3_3V,
244 GPIO_ADC2_MUX_SPI_INT_N,
245 GPIO_EPM_EXPANDER_IO7,
246 GPIO_PWR_MON_ENABLE,
247 GPIO_EPM_SPI_ADC1_CS_N,
248 GPIO_EPM_SPI_ADC2_CS_N,
249 GPIO_EPM_EXPANDER_IO11,
250 GPIO_EPM_EXPANDER_IO12,
251 GPIO_EPM_EXPANDER_IO13,
252 GPIO_EPM_EXPANDER_IO14,
253 GPIO_EPM_EXPANDER_IO15,
254};
255
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530256struct pm8xxx_mpp_init_info {
257 unsigned mpp;
258 struct pm8xxx_mpp_config_data config;
259};
260
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530261#define PM8058_MPP_INIT(_mpp, _type, _level, _control) \
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530262{ \
263 .mpp = PM8058_MPP_PM_TO_SYS(_mpp), \
264 .config = { \
265 .type = PM8XXX_MPP_TYPE_##_type, \
266 .level = _level, \
267 .control = PM8XXX_MPP_##_control, \
268 } \
269}
270
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530271#define PM8901_MPP_INIT(_mpp, _type, _level, _control) \
272{ \
273 .mpp = PM8901_MPP_PM_TO_SYS(_mpp), \
274 .config = { \
275 .type = PM8XXX_MPP_TYPE_##_type, \
276 .level = _level, \
277 .control = PM8XXX_MPP_##_control, \
278 } \
279}
280
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700281/*
282 * The UI_INTx_N lines are pmic gpio lines which connect i2c
283 * gpio expanders to the pm8058.
284 */
285#define UI_INT1_N 25
286#define UI_INT2_N 34
287#define UI_INT3_N 14
288/*
289FM GPIO is GPIO 18 on PMIC 8058.
290As the index starts from 0 in the PMIC driver, and hence 17
291corresponds to GPIO 18 on PMIC 8058.
292*/
293#define FM_GPIO 17
294
295#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
296static void (*sdc2_status_notify_cb)(int card_present, void *dev_id);
297static void *sdc2_status_notify_cb_devid;
298#endif
299
300#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
301static void (*sdc5_status_notify_cb)(int card_present, void *dev_id);
302static void *sdc5_status_notify_cb_devid;
303#endif
304
305static struct msm_spm_platform_data msm_spm_data_v1[] __initdata = {
306 [0] = {
307 .reg_base_addr = MSM_SAW0_BASE,
308
309#ifdef CONFIG_MSM_AVS_HW
310 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
311#endif
312 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x0F,
313 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
314 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0xFFFFFFFF,
315 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0xFFFFFFFF,
316
317 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x01,
318 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
319 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
320
321 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
322 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
323 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
324
325 .awake_vlevel = 0x94,
326 .retention_vlevel = 0x81,
327 .collapse_vlevel = 0x20,
328 .retention_mid_vlevel = 0x94,
329 .collapse_mid_vlevel = 0x8C,
330
331 .vctl_timeout_us = 50,
332 },
333
334 [1] = {
335 .reg_base_addr = MSM_SAW1_BASE,
336
337#ifdef CONFIG_MSM_AVS_HW
338 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
339#endif
340 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x0F,
341 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
342 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0xFFFFFFFF,
343 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0xFFFFFFFF,
344
345 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x13,
346 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
347 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
348
349 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
350 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
351 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
352
353 .awake_vlevel = 0x94,
354 .retention_vlevel = 0x81,
355 .collapse_vlevel = 0x20,
356 .retention_mid_vlevel = 0x94,
357 .collapse_mid_vlevel = 0x8C,
358
359 .vctl_timeout_us = 50,
360 },
361};
362
363static struct msm_spm_platform_data msm_spm_data[] __initdata = {
364 [0] = {
365 .reg_base_addr = MSM_SAW0_BASE,
366
367#ifdef CONFIG_MSM_AVS_HW
368 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
369#endif
370 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x1C,
371 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
372 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0x0C0CFFFF,
373 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0x78780FFF,
374
375 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x01,
376 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
377 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
378
379 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
380 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
381 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
382
383 .awake_vlevel = 0xA0,
384 .retention_vlevel = 0x89,
385 .collapse_vlevel = 0x20,
386 .retention_mid_vlevel = 0x89,
387 .collapse_mid_vlevel = 0x89,
388
389 .vctl_timeout_us = 50,
390 },
391
392 [1] = {
393 .reg_base_addr = MSM_SAW1_BASE,
394
395#ifdef CONFIG_MSM_AVS_HW
396 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
397#endif
398 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x1C,
399 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
400 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0x0C0CFFFF,
401 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0x78780FFF,
402
403 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x13,
404 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
405 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
406
407 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
408 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
409 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
410
411 .awake_vlevel = 0xA0,
412 .retention_vlevel = 0x89,
413 .collapse_vlevel = 0x20,
414 .retention_mid_vlevel = 0x89,
415 .collapse_mid_vlevel = 0x89,
416
417 .vctl_timeout_us = 50,
418 },
419};
420
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700421/*
422 * Consumer specific regulator names:
423 * regulator name consumer dev_name
424 */
425static struct regulator_consumer_supply vreg_consumers_8901_S0[] = {
426 REGULATOR_SUPPLY("8901_s0", NULL),
427};
428static struct regulator_consumer_supply vreg_consumers_8901_S1[] = {
429 REGULATOR_SUPPLY("8901_s1", NULL),
430};
431
432static struct regulator_init_data saw_s0_init_data = {
433 .constraints = {
434 .name = "8901_s0",
435 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
Tianyi Gou7c81dfa2011-07-27 12:15:24 -0700436 .min_uV = 800000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700437 .max_uV = 1250000,
438 },
439 .consumer_supplies = vreg_consumers_8901_S0,
440 .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S0),
441};
442
443static struct regulator_init_data saw_s1_init_data = {
444 .constraints = {
445 .name = "8901_s1",
446 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
Tianyi Gou7c81dfa2011-07-27 12:15:24 -0700447 .min_uV = 800000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700448 .max_uV = 1250000,
449 },
450 .consumer_supplies = vreg_consumers_8901_S1,
451 .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S1),
452};
453
454static struct platform_device msm_device_saw_s0 = {
455 .name = "saw-regulator",
456 .id = 0,
457 .dev = {
458 .platform_data = &saw_s0_init_data,
459 },
460};
461
462static struct platform_device msm_device_saw_s1 = {
463 .name = "saw-regulator",
464 .id = 1,
465 .dev = {
466 .platform_data = &saw_s1_init_data,
467 },
468};
469
470/*
471 * The smc91x configuration varies depending on platform.
472 * The resources data structure is filled in at runtime.
473 */
474static struct resource smc91x_resources[] = {
475 [0] = {
476 .flags = IORESOURCE_MEM,
477 },
478 [1] = {
479 .flags = IORESOURCE_IRQ,
480 },
481};
482
483static struct platform_device smc91x_device = {
484 .name = "smc91x",
485 .id = 0,
486 .num_resources = ARRAY_SIZE(smc91x_resources),
487 .resource = smc91x_resources,
488};
489
490static struct resource smsc911x_resources[] = {
491 [0] = {
492 .flags = IORESOURCE_MEM,
493 .start = 0x1b800000,
494 .end = 0x1b8000ff
495 },
496 [1] = {
497 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
498 },
499};
500
501static struct smsc911x_platform_config smsc911x_config = {
502 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
503 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
504 .flags = SMSC911X_USE_16BIT,
505 .has_reset_gpio = 1,
506 .reset_gpio = GPIO_ETHERNET_RESET_N
507};
508
509static struct platform_device smsc911x_device = {
510 .name = "smsc911x",
511 .id = 0,
512 .num_resources = ARRAY_SIZE(smsc911x_resources),
513 .resource = smsc911x_resources,
514 .dev = {
515 .platform_data = &smsc911x_config
516 }
517};
518
519#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
520 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE) || \
521 defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
522 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
523
524#define QCE_SIZE 0x10000
525#define QCE_0_BASE 0x18500000
526
527#define QCE_HW_KEY_SUPPORT 0
528#define QCE_SHA_HMAC_SUPPORT 0
529#define QCE_SHARE_CE_RESOURCE 2
530#define QCE_CE_SHARED 1
531
532static struct resource qcrypto_resources[] = {
533 [0] = {
534 .start = QCE_0_BASE,
535 .end = QCE_0_BASE + QCE_SIZE - 1,
536 .flags = IORESOURCE_MEM,
537 },
538 [1] = {
539 .name = "crypto_channels",
540 .start = DMOV_CE_IN_CHAN,
541 .end = DMOV_CE_OUT_CHAN,
542 .flags = IORESOURCE_DMA,
543 },
544 [2] = {
545 .name = "crypto_crci_in",
546 .start = DMOV_CE_IN_CRCI,
547 .end = DMOV_CE_IN_CRCI,
548 .flags = IORESOURCE_DMA,
549 },
550 [3] = {
551 .name = "crypto_crci_out",
552 .start = DMOV_CE_OUT_CRCI,
553 .end = DMOV_CE_OUT_CRCI,
554 .flags = IORESOURCE_DMA,
555 },
556 [4] = {
557 .name = "crypto_crci_hash",
558 .start = DMOV_CE_HASH_CRCI,
559 .end = DMOV_CE_HASH_CRCI,
560 .flags = IORESOURCE_DMA,
561 },
562};
563
564static struct resource qcedev_resources[] = {
565 [0] = {
566 .start = QCE_0_BASE,
567 .end = QCE_0_BASE + QCE_SIZE - 1,
568 .flags = IORESOURCE_MEM,
569 },
570 [1] = {
571 .name = "crypto_channels",
572 .start = DMOV_CE_IN_CHAN,
573 .end = DMOV_CE_OUT_CHAN,
574 .flags = IORESOURCE_DMA,
575 },
576 [2] = {
577 .name = "crypto_crci_in",
578 .start = DMOV_CE_IN_CRCI,
579 .end = DMOV_CE_IN_CRCI,
580 .flags = IORESOURCE_DMA,
581 },
582 [3] = {
583 .name = "crypto_crci_out",
584 .start = DMOV_CE_OUT_CRCI,
585 .end = DMOV_CE_OUT_CRCI,
586 .flags = IORESOURCE_DMA,
587 },
588 [4] = {
589 .name = "crypto_crci_hash",
590 .start = DMOV_CE_HASH_CRCI,
591 .end = DMOV_CE_HASH_CRCI,
592 .flags = IORESOURCE_DMA,
593 },
594};
595
596#endif
597
598#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
599 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
600
601static struct msm_ce_hw_support qcrypto_ce_hw_suppport = {
602 .ce_shared = QCE_CE_SHARED,
603 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
604 .hw_key_support = QCE_HW_KEY_SUPPORT,
605 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
Ramesh Masavarapu49259682011-12-02 14:00:18 -0800606 .bus_scale_table = NULL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700607};
608
609static struct platform_device qcrypto_device = {
610 .name = "qcrypto",
611 .id = 0,
612 .num_resources = ARRAY_SIZE(qcrypto_resources),
613 .resource = qcrypto_resources,
614 .dev = {
615 .coherent_dma_mask = DMA_BIT_MASK(32),
616 .platform_data = &qcrypto_ce_hw_suppport,
617 },
618};
619#endif
620
621#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
622 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
623
624static struct msm_ce_hw_support qcedev_ce_hw_suppport = {
625 .ce_shared = QCE_CE_SHARED,
626 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
627 .hw_key_support = QCE_HW_KEY_SUPPORT,
628 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
Ramesh Masavarapu49259682011-12-02 14:00:18 -0800629 .bus_scale_table = NULL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700630};
631
632static struct platform_device qcedev_device = {
633 .name = "qce",
634 .id = 0,
635 .num_resources = ARRAY_SIZE(qcedev_resources),
636 .resource = qcedev_resources,
637 .dev = {
638 .coherent_dma_mask = DMA_BIT_MASK(32),
639 .platform_data = &qcedev_ce_hw_suppport,
640 },
641};
642#endif
643
644#if defined(CONFIG_HAPTIC_ISA1200) || \
645 defined(CONFIG_HAPTIC_ISA1200_MODULE)
646
647static const char *vregs_isa1200_name[] = {
648 "8058_s3",
649 "8901_l4",
650};
651
652static const int vregs_isa1200_val[] = {
653 1800000,/* uV */
654 2600000,
655};
656static struct regulator *vregs_isa1200[ARRAY_SIZE(vregs_isa1200_name)];
657static struct msm_xo_voter *xo_handle_a1;
658
659static int isa1200_power(int vreg_on)
Steve Mucklea55df6e2010-01-07 12:43:24 -0800660{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700661 int i, rc = 0;
662
663 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++) {
664 rc = vreg_on ? regulator_enable(vregs_isa1200[i]) :
665 regulator_disable(vregs_isa1200[i]);
666 if (rc < 0) {
667 pr_err("%s: vreg %s %s failed (%d)\n",
668 __func__, vregs_isa1200_name[i],
669 vreg_on ? "enable" : "disable", rc);
670 goto vreg_fail;
671 }
672 }
673
674 rc = vreg_on ? msm_xo_mode_vote(xo_handle_a1, MSM_XO_MODE_ON) :
675 msm_xo_mode_vote(xo_handle_a1, MSM_XO_MODE_OFF);
676 if (rc < 0) {
677 pr_err("%s: failed to %svote for TCXO A1 buffer%d\n",
678 __func__, vreg_on ? "" : "de-", rc);
679 goto vreg_fail;
680 }
681 return 0;
682
683vreg_fail:
684 while (i--)
685 !vreg_on ? regulator_enable(vregs_isa1200[i]) :
686 regulator_disable(vregs_isa1200[i]);
687 return rc;
Steve Mucklea55df6e2010-01-07 12:43:24 -0800688}
689
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700690static int isa1200_dev_setup(bool enable)
Steve Mucklea55df6e2010-01-07 12:43:24 -0800691{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700692 int i, rc;
Steve Muckle9161d302010-02-11 11:50:40 -0800693
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700694 if (enable == true) {
695 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++) {
696 vregs_isa1200[i] = regulator_get(NULL,
697 vregs_isa1200_name[i]);
698 if (IS_ERR(vregs_isa1200[i])) {
699 pr_err("%s: regulator get of %s failed (%ld)\n",
700 __func__, vregs_isa1200_name[i],
701 PTR_ERR(vregs_isa1200[i]));
702 rc = PTR_ERR(vregs_isa1200[i]);
703 goto vreg_get_fail;
704 }
705 rc = regulator_set_voltage(vregs_isa1200[i],
706 vregs_isa1200_val[i], vregs_isa1200_val[i]);
707 if (rc) {
708 pr_err("%s: regulator_set_voltage(%s) failed\n",
709 __func__, vregs_isa1200_name[i]);
710 goto vreg_get_fail;
711 }
712 }
Steve Muckle9161d302010-02-11 11:50:40 -0800713
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700714 rc = gpio_request(GPIO_HAP_SHIFT_LVL_OE, "haptics_shft_lvl_oe");
715 if (rc) {
716 pr_err("%s: unable to request gpio %d (%d)\n",
717 __func__, GPIO_HAP_SHIFT_LVL_OE, rc);
718 goto vreg_get_fail;
719 }
Steve Muckle9161d302010-02-11 11:50:40 -0800720
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700721 rc = gpio_direction_output(GPIO_HAP_SHIFT_LVL_OE, 1);
722 if (rc) {
723 pr_err("%s: Unable to set direction\n", __func__);;
724 goto free_gpio;
725 }
726
727 xo_handle_a1 = msm_xo_get(MSM_XO_TCXO_A1, "isa1200");
728 if (IS_ERR(xo_handle_a1)) {
729 rc = PTR_ERR(xo_handle_a1);
730 pr_err("%s: failed to get the handle for A1(%d)\n",
731 __func__, rc);
732 goto gpio_set_dir;
733 }
734 } else {
735 gpio_set_value(GPIO_HAP_SHIFT_LVL_OE, 0);
736 gpio_free(GPIO_HAP_SHIFT_LVL_OE);
737
738 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++)
739 regulator_put(vregs_isa1200[i]);
740
741 msm_xo_put(xo_handle_a1);
742 }
743
744 return 0;
745gpio_set_dir:
746 gpio_set_value(GPIO_HAP_SHIFT_LVL_OE, 0);
747free_gpio:
748 gpio_free(GPIO_HAP_SHIFT_LVL_OE);
749vreg_get_fail:
750 while (i)
751 regulator_put(vregs_isa1200[--i]);
752 return rc;
753}
754
755#define PMIC_GPIO_HAP_ENABLE 18 /* PMIC GPIO Number 19 */
Mohan Pallaka4a1160d2011-09-09 15:17:45 +0530756#define PMIC_GPIO_HAP_LDO_ENABLE 5 /* PMIC GPIO Number 6 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700757static struct isa1200_platform_data isa1200_1_pdata = {
758 .name = "vibrator",
759 .power_on = isa1200_power,
760 .dev_setup = isa1200_dev_setup,
761 /*gpio to enable haptic*/
762 .hap_en_gpio = PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_ENABLE),
Mohan Pallaka4a1160d2011-09-09 15:17:45 +0530763 .hap_len_gpio = PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_LDO_ENABLE),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700764 .max_timeout = 15000,
765 .mode_ctrl = PWM_GEN_MODE,
766 .pwm_fd = {
767 .pwm_div = 256,
768 },
769 .is_erm = false,
770 .smart_en = true,
771 .ext_clk_en = true,
772 .chip_en = 1,
773};
774
775static struct i2c_board_info msm_isa1200_board_info[] = {
776 {
777 I2C_BOARD_INFO("isa1200_1", 0x90>>1),
778 .platform_data = &isa1200_1_pdata,
779 },
780};
781#endif
782
783#if defined(CONFIG_BATTERY_BQ27520) || \
784 defined(CONFIG_BATTERY_BQ27520_MODULE)
785static struct bq27520_platform_data bq27520_pdata = {
786 .name = "fuel-gauge",
787 .vreg_name = "8058_s3",
788 .vreg_value = 1800000,
789 .soc_int = GPIO_BATT_GAUGE_INT_N,
790 .bi_tout = GPIO_CAP_GAUGE_BI_TOUT,
791 .chip_en = GPIO_BATT_GAUGE_EN,
792 .enable_dlog = 0, /* if enable coulomb counter logger */
793};
794
795static struct i2c_board_info msm_bq27520_board_info[] = {
796 {
797 I2C_BOARD_INFO("bq27520", 0xaa>>1),
798 .platform_data = &bq27520_pdata,
799 },
800};
801#endif
802
803static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR * 2] = {
804 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
805 .idle_supported = 1,
806 .suspend_supported = 1,
807 .idle_enabled = 0,
808 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700809 },
810
811 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
812 .idle_supported = 1,
813 .suspend_supported = 1,
814 .idle_enabled = 0,
815 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700816 },
817
818 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
819 .idle_supported = 1,
820 .suspend_supported = 1,
821 .idle_enabled = 1,
822 .suspend_enabled = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700823 },
824
825 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
826 .idle_supported = 1,
827 .suspend_supported = 1,
828 .idle_enabled = 0,
829 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700830 },
831
832 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
833 .idle_supported = 1,
834 .suspend_supported = 1,
835 .idle_enabled = 0,
836 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700837 },
838
839 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
840 .idle_supported = 1,
841 .suspend_supported = 1,
842 .idle_enabled = 1,
843 .suspend_enabled = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700844 },
845};
846
847static struct msm_cpuidle_state msm_cstates[] __initdata = {
848 {0, 0, "C0", "WFI",
849 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
850
851 {0, 1, "C1", "STANDALONE_POWER_COLLAPSE",
852 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
853
854 {0, 2, "C2", "POWER_COLLAPSE",
855 MSM_PM_SLEEP_MODE_POWER_COLLAPSE},
856
857 {1, 0, "C0", "WFI",
858 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
859
860 {1, 1, "C1", "STANDALONE_POWER_COLLAPSE",
861 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
862};
863
864static struct msm_rpmrs_level msm_rpmrs_levels[] __initdata = {
865 {
866 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT,
867 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
868 true,
869 1, 8000, 100000, 1,
870 },
871
872 {
873 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE,
874 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
875 true,
876 1500, 5000, 60100000, 3000,
877 },
878
879 {
880 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
881 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
882 false,
883 1800, 5000, 60350000, 3500,
884 },
885 {
886 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
887 MSM_RPMRS_LIMITS(OFF, ACTIVE, MAX, ACTIVE),
888 false,
889 3800, 4500, 65350000, 5500,
890 },
891
892 {
893 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
894 MSM_RPMRS_LIMITS(ON, HSFS_OPEN, MAX, ACTIVE),
895 false,
896 2800, 2500, 66850000, 4800,
897 },
898
899 {
900 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
901 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, MAX, ACTIVE),
902 false,
903 4800, 2000, 71850000, 6800,
904 },
905
906 {
907 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
908 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, ACTIVE, RET_HIGH),
909 false,
910 6800, 500, 75850000, 8800,
911 },
912
913 {
914 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
915 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, RET_HIGH, RET_LOW),
916 false,
917 7800, 0, 76350000, 9800,
918 },
919};
920
Maheshkumar Sivasubramanianc6c55032011-10-25 16:01:32 -0600921static struct msm_pm_boot_platform_data msm_pm_boot_pdata __initdata = {
922 .mode = MSM_PM_BOOT_CONFIG_TZ,
923};
924
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700925#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
926
927#define ISP1763_INT_GPIO 117
928#define ISP1763_RST_GPIO 152
929static struct resource isp1763_resources[] = {
930 [0] = {
931 .flags = IORESOURCE_MEM,
932 .start = 0x1D000000,
933 .end = 0x1D005FFF, /* 24KB */
934 },
935 [1] = {
936 .flags = IORESOURCE_IRQ,
937 },
938};
939static void __init msm8x60_cfg_isp1763(void)
940{
941 isp1763_resources[1].start = gpio_to_irq(ISP1763_INT_GPIO);
942 isp1763_resources[1].end = gpio_to_irq(ISP1763_INT_GPIO);
943}
944
945static int isp1763_setup_gpio(int enable)
946{
947 int status = 0;
948
949 if (enable) {
950 status = gpio_request(ISP1763_INT_GPIO, "isp1763_usb");
951 if (status) {
952 pr_err("%s:Failed to request GPIO %d\n",
953 __func__, ISP1763_INT_GPIO);
954 return status;
955 }
956 status = gpio_direction_input(ISP1763_INT_GPIO);
957 if (status) {
958 pr_err("%s:Failed to configure GPIO %d\n",
959 __func__, ISP1763_INT_GPIO);
960 goto gpio_free_int;
961 }
962 status = gpio_request(ISP1763_RST_GPIO, "isp1763_usb");
963 if (status) {
964 pr_err("%s:Failed to request GPIO %d\n",
965 __func__, ISP1763_RST_GPIO);
966 goto gpio_free_int;
967 }
968 status = gpio_direction_output(ISP1763_RST_GPIO, 1);
969 if (status) {
970 pr_err("%s:Failed to configure GPIO %d\n",
971 __func__, ISP1763_RST_GPIO);
972 goto gpio_free_rst;
973 }
974 pr_debug("\nISP GPIO configuration done\n");
975 return status;
976 }
977
978gpio_free_rst:
979 gpio_free(ISP1763_RST_GPIO);
980gpio_free_int:
981 gpio_free(ISP1763_INT_GPIO);
982
983 return status;
984}
985static struct isp1763_platform_data isp1763_pdata = {
986 .reset_gpio = ISP1763_RST_GPIO,
987 .setup_gpio = isp1763_setup_gpio
988};
989
990static struct platform_device isp1763_device = {
991 .name = "isp1763_usb",
992 .num_resources = ARRAY_SIZE(isp1763_resources),
993 .resource = isp1763_resources,
994 .dev = {
995 .platform_data = &isp1763_pdata
996 }
997};
998#endif
999
1000#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_MSM_72K)
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301001static struct msm_otg_platform_data msm_otg_pdata;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001002static struct regulator *ldo6_3p3;
1003static struct regulator *ldo7_1p8;
1004static struct regulator *vdd_cx;
1005#define PMICID_INT PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 36)
Anji jonnalaae745e92011-11-14 18:34:31 +05301006#define PMIC_ID_GPIO 36
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001007notify_vbus_state notify_vbus_state_func_ptr;
1008static int usb_phy_susp_dig_vol = 750000;
1009static int pmic_id_notif_supported;
1010
1011#ifdef CONFIG_USB_EHCI_MSM_72K
1012#define USB_PMIC_ID_DET_DELAY msecs_to_jiffies(100)
1013struct delayed_work pmic_id_det;
1014
1015static int __init usb_id_pin_rework_setup(char *support)
1016{
1017 if (strncmp(support, "true", 4) == 0)
1018 pmic_id_notif_supported = 1;
1019
1020 return 1;
1021}
1022__setup("usb_id_pin_rework=", usb_id_pin_rework_setup);
1023
1024static void pmic_id_detect(struct work_struct *w)
1025{
1026 int val = gpio_get_value_cansleep(PM8058_GPIO_PM_TO_SYS(36));
1027 pr_debug("%s(): gpio_read_value = %d\n", __func__, val);
1028
1029 if (notify_vbus_state_func_ptr)
1030 (*notify_vbus_state_func_ptr) (val);
1031}
1032
1033static irqreturn_t pmic_id_on_irq(int irq, void *data)
1034{
1035 /*
1036 * Spurious interrupts are observed on pmic gpio line
1037 * even though there is no state change on USB ID. Schedule the
1038 * work to to allow debounce on gpio
Steve Muckle9161d302010-02-11 11:50:40 -08001039 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001040 schedule_delayed_work(&pmic_id_det, USB_PMIC_ID_DET_DELAY);
Steve Muckle9161d302010-02-11 11:50:40 -08001041
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001042 return IRQ_HANDLED;
1043}
1044
Anji jonnalaae745e92011-11-14 18:34:31 +05301045static int msm_hsusb_phy_id_setup_init(int init)
1046{
1047 unsigned ret;
1048
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301049 struct pm8xxx_mpp_config_data hsusb_phy_mpp = {
1050 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
1051 .level = PM8901_MPP_DIG_LEVEL_L5,
1052 };
1053
Anji jonnalaae745e92011-11-14 18:34:31 +05301054 if (init) {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301055 hsusb_phy_mpp.control = PM8XXX_MPP_DOUT_CTRL_HIGH;
1056 ret = pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1),
1057 &hsusb_phy_mpp);
Anji jonnalaae745e92011-11-14 18:34:31 +05301058 if (ret < 0)
1059 pr_err("%s:MPP2 configuration failed\n", __func__);
1060 } else {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301061 hsusb_phy_mpp.control = PM8XXX_MPP_DOUT_CTRL_LOW;
1062 ret = pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1),
1063 &hsusb_phy_mpp);
Anji jonnalaae745e92011-11-14 18:34:31 +05301064 if (ret < 0)
1065 pr_err("%s:MPP2 un config failed\n", __func__);
1066 }
1067 return ret;
1068}
1069
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001070static int msm_hsusb_pmic_id_notif_init(void (*callback)(int online), int init)
1071{
1072 unsigned ret = -ENODEV;
1073
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301074 struct pm_gpio pmic_id_cfg = {
Anji jonnalaae745e92011-11-14 18:34:31 +05301075 .direction = PM_GPIO_DIR_IN,
1076 .pull = PM_GPIO_PULL_UP_1P5,
1077 .function = PM_GPIO_FUNC_NORMAL,
1078 .vin_sel = 2,
1079 .inv_int_pol = 0,
1080 };
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301081 struct pm_gpio pmic_id_uncfg = {
Anji jonnalaae745e92011-11-14 18:34:31 +05301082 .direction = PM_GPIO_DIR_IN,
1083 .pull = PM_GPIO_PULL_NO,
1084 .function = PM_GPIO_FUNC_NORMAL,
1085 .vin_sel = 2,
1086 .inv_int_pol = 0,
1087 };
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001088 if (!callback)
1089 return -EINVAL;
1090
1091 if (machine_is_msm8x60_fluid())
1092 return -ENOTSUPP;
1093
1094 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 2) {
1095 pr_debug("%s: USB_ID pin is not routed to PMIC"
1096 "on V1 surf/ffa\n", __func__);
1097 return -ENOTSUPP;
1098 }
1099
Manu Gautam62158eb2011-11-24 16:20:46 +05301100 if ((machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa() ||
1101 machine_is_msm8x60_ffa()) && !pmic_id_notif_supported) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001102 pr_debug("%s: USB_ID is not routed to PMIC"
1103 "on V2 ffa\n", __func__);
1104 return -ENOTSUPP;
1105 }
1106
1107 usb_phy_susp_dig_vol = 500000;
1108
1109 if (init) {
1110 notify_vbus_state_func_ptr = callback;
Manu Gautame8420ef2011-11-11 15:37:21 +05301111 INIT_DELAYED_WORK(&pmic_id_det, pmic_id_detect);
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301112 ret = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(PMIC_ID_GPIO),
1113 &pmic_id_cfg);
Anji jonnalaae745e92011-11-14 18:34:31 +05301114 if (ret) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301115 pr_err("%s:return val of pm8xxx_gpio_config: %d\n",
Anji jonnalaae745e92011-11-14 18:34:31 +05301116 __func__, ret);
1117 return ret;
1118 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001119 ret = request_threaded_irq(PMICID_INT, NULL, pmic_id_on_irq,
1120 (IRQF_TRIGGER_RISING|IRQF_TRIGGER_FALLING),
1121 "msm_otg_id", NULL);
1122 if (ret) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001123 pr_err("%s:pmic_usb_id interrupt registration failed",
1124 __func__);
1125 return ret;
1126 }
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301127 msm_otg_pdata.pmic_id_irq = PMICID_INT;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001128 } else {
Anji jonnalaae745e92011-11-14 18:34:31 +05301129 usb_phy_susp_dig_vol = 750000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001130 free_irq(PMICID_INT, 0);
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301131 ret = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(PMIC_ID_GPIO),
1132 &pmic_id_uncfg);
Anji jonnalaae745e92011-11-14 18:34:31 +05301133 if (ret) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301134 pr_err("%s: return val of pm8xxx_gpio_config: %d\n",
Anji jonnalaae745e92011-11-14 18:34:31 +05301135 __func__, ret);
1136 return ret;
1137 }
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301138 msm_otg_pdata.pmic_id_irq = 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001139 cancel_delayed_work_sync(&pmic_id_det);
1140 notify_vbus_state_func_ptr = NULL;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001141 }
1142 return 0;
1143}
1144#endif
1145
1146#define USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL 1000000
1147#define USB_PHY_MAX_VDD_DIG_VOL 1320000
1148static int msm_hsusb_init_vddcx(int init)
1149{
1150 int ret = 0;
1151
1152 if (init) {
1153 vdd_cx = regulator_get(NULL, "8058_s1");
1154 if (IS_ERR(vdd_cx)) {
1155 return PTR_ERR(vdd_cx);
1156 }
1157
1158 ret = regulator_set_voltage(vdd_cx,
1159 USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL,
1160 USB_PHY_MAX_VDD_DIG_VOL);
1161 if (ret) {
1162 pr_err("%s: unable to set the voltage for regulator"
1163 "vdd_cx\n", __func__);
1164 regulator_put(vdd_cx);
1165 return ret;
1166 }
1167
1168 ret = regulator_enable(vdd_cx);
1169 if (ret) {
1170 pr_err("%s: unable to enable regulator"
1171 "vdd_cx\n", __func__);
1172 regulator_put(vdd_cx);
1173 }
1174 } else {
1175 ret = regulator_disable(vdd_cx);
1176 if (ret) {
1177 pr_err("%s: Unable to disable the regulator:"
1178 "vdd_cx\n", __func__);
1179 return ret;
1180 }
1181
1182 regulator_put(vdd_cx);
1183 }
1184
1185 return ret;
1186}
1187
1188static int msm_hsusb_config_vddcx(int high)
1189{
1190 int max_vol = USB_PHY_MAX_VDD_DIG_VOL;
1191 int min_vol;
1192 int ret;
1193
1194 if (high)
1195 min_vol = USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL;
1196 else
1197 min_vol = usb_phy_susp_dig_vol;
1198
1199 ret = regulator_set_voltage(vdd_cx, min_vol, max_vol);
1200 if (ret) {
1201 pr_err("%s: unable to set the voltage for regulator"
1202 "vdd_cx\n", __func__);
1203 return ret;
1204 }
1205
1206 pr_debug("%s: min_vol:%d max_vol:%d\n", __func__, min_vol, max_vol);
1207
1208 return ret;
1209}
1210
1211#define USB_PHY_3P3_VOL_MIN 3050000 /* uV */
1212#define USB_PHY_3P3_VOL_MAX 3050000 /* uV */
1213#define USB_PHY_3P3_HPM_LOAD 50000 /* uA */
1214#define USB_PHY_3P3_LPM_LOAD 4000 /* uA */
1215
1216#define USB_PHY_1P8_VOL_MIN 1800000 /* uV */
1217#define USB_PHY_1P8_VOL_MAX 1800000 /* uV */
1218#define USB_PHY_1P8_HPM_LOAD 50000 /* uA */
1219#define USB_PHY_1P8_LPM_LOAD 4000 /* uA */
1220static int msm_hsusb_ldo_init(int init)
1221{
1222 int rc = 0;
1223
1224 if (init) {
1225 ldo6_3p3 = regulator_get(NULL, "8058_l6");
1226 if (IS_ERR(ldo6_3p3))
1227 return PTR_ERR(ldo6_3p3);
1228
1229 ldo7_1p8 = regulator_get(NULL, "8058_l7");
1230 if (IS_ERR(ldo7_1p8)) {
1231 rc = PTR_ERR(ldo7_1p8);
1232 goto put_3p3;
1233 }
1234
1235 rc = regulator_set_voltage(ldo6_3p3, USB_PHY_3P3_VOL_MIN,
1236 USB_PHY_3P3_VOL_MAX);
1237 if (rc) {
1238 pr_err("%s: Unable to set voltage level for"
1239 "ldo6_3p3 regulator\n", __func__);
1240 goto put_1p8;
1241 }
1242 rc = regulator_enable(ldo6_3p3);
1243 if (rc) {
1244 pr_err("%s: Unable to enable the regulator:"
1245 "ldo6_3p3\n", __func__);
1246 goto put_1p8;
1247 }
1248 rc = regulator_set_voltage(ldo7_1p8, USB_PHY_1P8_VOL_MIN,
1249 USB_PHY_1P8_VOL_MAX);
1250 if (rc) {
1251 pr_err("%s: Unable to set voltage level for"
1252 "ldo7_1p8 regulator\n", __func__);
1253 goto disable_3p3;
1254 }
1255 rc = regulator_enable(ldo7_1p8);
1256 if (rc) {
1257 pr_err("%s: Unable to enable the regulator:"
1258 "ldo7_1p8\n", __func__);
1259 goto disable_3p3;
1260 }
1261
1262 return 0;
1263 }
1264
1265 regulator_disable(ldo7_1p8);
1266disable_3p3:
1267 regulator_disable(ldo6_3p3);
1268put_1p8:
1269 regulator_put(ldo7_1p8);
1270put_3p3:
1271 regulator_put(ldo6_3p3);
1272 return rc;
1273}
1274
1275static int msm_hsusb_ldo_enable(int on)
1276{
1277 int ret = 0;
1278
1279 if (!ldo7_1p8 || IS_ERR(ldo7_1p8)) {
1280 pr_err("%s: ldo7_1p8 is not initialized\n", __func__);
1281 return -ENODEV;
1282 }
1283
1284 if (!ldo6_3p3 || IS_ERR(ldo6_3p3)) {
1285 pr_err("%s: ldo6_3p3 is not initialized\n", __func__);
1286 return -ENODEV;
1287 }
1288
1289 if (on) {
1290 ret = regulator_set_optimum_mode(ldo7_1p8,
1291 USB_PHY_1P8_HPM_LOAD);
1292 if (ret < 0) {
1293 pr_err("%s: Unable to set HPM of the regulator:"
1294 "ldo7_1p8\n", __func__);
1295 return ret;
1296 }
1297 ret = regulator_set_optimum_mode(ldo6_3p3,
1298 USB_PHY_3P3_HPM_LOAD);
1299 if (ret < 0) {
1300 pr_err("%s: Unable to set HPM of the regulator:"
1301 "ldo6_3p3\n", __func__);
1302 regulator_set_optimum_mode(ldo7_1p8,
1303 USB_PHY_1P8_LPM_LOAD);
1304 return ret;
1305 }
1306 } else {
1307 ret = regulator_set_optimum_mode(ldo7_1p8,
1308 USB_PHY_1P8_LPM_LOAD);
1309 if (ret < 0)
1310 pr_err("%s: Unable to set LPM of the regulator:"
1311 "ldo7_1p8\n", __func__);
1312 ret = regulator_set_optimum_mode(ldo6_3p3,
1313 USB_PHY_3P3_LPM_LOAD);
1314 if (ret < 0)
1315 pr_err("%s: Unable to set LPM of the regulator:"
1316 "ldo6_3p3\n", __func__);
1317 }
1318
1319 pr_debug("reg (%s)\n", on ? "HPM" : "LPM");
1320 return ret < 0 ? ret : 0;
1321 }
1322#endif
1323#ifdef CONFIG_USB_EHCI_MSM_72K
1324#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
1325static void msm_hsusb_smb137b_vbus_power(unsigned phy_info, int on)
1326{
1327 static int vbus_is_on;
1328
1329 /* If VBUS is already on (or off), do nothing. */
1330 if (on == vbus_is_on)
1331 return;
1332 smb137b_otg_power(on);
1333 vbus_is_on = on;
1334}
1335#endif
1336static void msm_hsusb_vbus_power(unsigned phy_info, int on)
1337{
1338 static struct regulator *votg_5v_switch;
1339 static struct regulator *ext_5v_reg;
1340 static int vbus_is_on;
1341
1342 /* If VBUS is already on (or off), do nothing. */
1343 if (on == vbus_is_on)
1344 return;
1345
1346 if (!votg_5v_switch) {
1347 votg_5v_switch = regulator_get(NULL, "8901_usb_otg");
1348 if (IS_ERR(votg_5v_switch)) {
1349 pr_err("%s: unable to get votg_5v_switch\n", __func__);
1350 return;
1351 }
1352 }
1353 if (!ext_5v_reg) {
1354 ext_5v_reg = regulator_get(NULL, "8901_mpp0");
1355 if (IS_ERR(ext_5v_reg)) {
1356 pr_err("%s: unable to get ext_5v_reg\n", __func__);
1357 return;
1358 }
1359 }
1360 if (on) {
1361 if (regulator_enable(ext_5v_reg)) {
1362 pr_err("%s: Unable to enable the regulator:"
1363 " ext_5v_reg\n", __func__);
1364 return;
1365 }
1366 if (regulator_enable(votg_5v_switch)) {
1367 pr_err("%s: Unable to enable the regulator:"
1368 " votg_5v_switch\n", __func__);
1369 return;
1370 }
1371 } else {
1372 if (regulator_disable(votg_5v_switch))
1373 pr_err("%s: Unable to enable the regulator:"
1374 " votg_5v_switch\n", __func__);
1375 if (regulator_disable(ext_5v_reg))
1376 pr_err("%s: Unable to enable the regulator:"
1377 " ext_5v_reg\n", __func__);
1378 }
1379
1380 vbus_is_on = on;
1381}
1382
1383static struct msm_usb_host_platform_data msm_usb_host_pdata = {
1384 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_45NM),
1385 .power_budget = 390,
1386};
1387#endif
1388
1389#ifdef CONFIG_BATTERY_MSM8X60
1390static int msm_hsusb_pmic_vbus_notif_init(void (*callback)(int online),
1391 int init)
1392{
1393 int ret = -ENOTSUPP;
1394
1395#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
1396 if (machine_is_msm8x60_fluid()) {
1397 if (init)
1398 msm_charger_register_vbus_sn(callback);
1399 else
1400 msm_charger_unregister_vbus_sn(callback);
1401 return 0;
1402 }
1403#endif
1404 /* ID and VBUS lines are connected to pmic on 8660.V2.SURF,
1405 * hence, irrespective of either peripheral only mode or
1406 * OTG (host and peripheral) modes, can depend on pmic for
1407 * vbus notifications
Steve Muckle9161d302010-02-11 11:50:40 -08001408 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001409 if ((SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2)
1410 && (machine_is_msm8x60_surf() ||
1411 pmic_id_notif_supported)) {
1412 if (init)
1413 ret = msm_charger_register_vbus_sn(callback);
1414 else {
1415 msm_charger_unregister_vbus_sn(callback);
1416 ret = 0;
1417 }
1418 } else {
1419#if !defined(CONFIG_USB_EHCI_MSM_72K)
1420 if (init)
1421 ret = msm_charger_register_vbus_sn(callback);
1422 else {
1423 msm_charger_unregister_vbus_sn(callback);
1424 ret = 0;
1425 }
1426#endif
1427 }
1428 return ret;
1429}
1430#endif
1431
1432#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_MSM_72K)
1433static struct msm_otg_platform_data msm_otg_pdata = {
1434 /* if usb link is in sps there is no need for
1435 * usb pclk as dayatona fabric clock will be
1436 * used instead
1437 */
1438 .pclk_src_name = "dfab_usb_hs_clk",
1439 .pemp_level = PRE_EMPHASIS_WITH_20_PERCENT,
1440 .cdr_autoreset = CDR_AUTO_RESET_DISABLE,
1441 .se1_gating = SE1_GATING_DISABLE,
Chandra Devireddyb3fc78c2011-08-30 17:25:55 +05301442 .bam_disable = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001443#ifdef CONFIG_USB_EHCI_MSM_72K
1444 .pmic_id_notif_init = msm_hsusb_pmic_id_notif_init,
Anji jonnalaae745e92011-11-14 18:34:31 +05301445 .phy_id_setup_init = msm_hsusb_phy_id_setup_init,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001446#endif
1447#ifdef CONFIG_USB_EHCI_MSM_72K
1448 .vbus_power = msm_hsusb_vbus_power,
1449#endif
1450#ifdef CONFIG_BATTERY_MSM8X60
1451 .pmic_vbus_notif_init = msm_hsusb_pmic_vbus_notif_init,
1452#endif
1453 .ldo_init = msm_hsusb_ldo_init,
1454 .ldo_enable = msm_hsusb_ldo_enable,
1455 .config_vddcx = msm_hsusb_config_vddcx,
1456 .init_vddcx = msm_hsusb_init_vddcx,
1457#ifdef CONFIG_BATTERY_MSM8X60
1458 .chg_vbus_draw = msm_charger_vbus_draw,
1459#endif
1460};
1461#endif
1462
1463#ifdef CONFIG_USB_GADGET_MSM_72K
1464static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = {
1465 .is_phy_status_timer_on = 1,
1466};
1467#endif
1468
1469#ifdef CONFIG_USB_G_ANDROID
1470
1471#define PID_MAGIC_ID 0x71432909
1472#define SERIAL_NUM_MAGIC_ID 0x61945374
1473#define SERIAL_NUMBER_LENGTH 127
1474#define DLOAD_USB_BASE_ADD 0x2A05F0C8
1475
1476struct magic_num_struct {
1477 uint32_t pid;
1478 uint32_t serial_num;
1479};
1480
1481struct dload_struct {
1482 uint32_t reserved1;
1483 uint32_t reserved2;
1484 uint32_t reserved3;
1485 uint16_t reserved4;
1486 uint16_t pid;
1487 char serial_number[SERIAL_NUMBER_LENGTH];
1488 uint16_t reserved5;
1489 struct magic_num_struct
1490 magic_struct;
1491};
1492
1493static int usb_diag_update_pid_and_serial_num(uint32_t pid, const char *snum)
1494{
1495 struct dload_struct __iomem *dload = 0;
1496
1497 dload = ioremap(DLOAD_USB_BASE_ADD, sizeof(*dload));
1498 if (!dload) {
1499 pr_err("%s: cannot remap I/O memory region: %08x\n",
1500 __func__, DLOAD_USB_BASE_ADD);
1501 return -ENXIO;
1502 }
1503
1504 pr_debug("%s: dload:%p pid:%x serial_num:%s\n",
1505 __func__, dload, pid, snum);
1506 /* update pid */
1507 dload->magic_struct.pid = PID_MAGIC_ID;
1508 dload->pid = pid;
1509
1510 /* update serial number */
1511 dload->magic_struct.serial_num = 0;
1512 if (!snum)
1513 return 0;
1514
1515 dload->magic_struct.serial_num = SERIAL_NUM_MAGIC_ID;
1516 strncpy(dload->serial_number, snum, SERIAL_NUMBER_LENGTH);
1517 dload->serial_number[SERIAL_NUMBER_LENGTH - 1] = '\0';
1518
1519 iounmap(dload);
1520
1521 return 0;
1522}
1523
1524static struct android_usb_platform_data android_usb_pdata = {
1525 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
1526};
1527
1528static struct platform_device android_usb_device = {
1529 .name = "android_usb",
1530 .id = -1,
1531 .dev = {
1532 .platform_data = &android_usb_pdata,
1533 },
1534};
1535
1536
1537#endif
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08001538
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001539#ifdef CONFIG_MSM_VPE
1540static struct resource msm_vpe_resources[] = {
1541 {
1542 .start = 0x05300000,
1543 .end = 0x05300000 + SZ_1M - 1,
1544 .flags = IORESOURCE_MEM,
1545 },
1546 {
1547 .start = INT_VPE,
1548 .end = INT_VPE,
1549 .flags = IORESOURCE_IRQ,
1550 },
1551};
1552
1553static struct platform_device msm_vpe_device = {
1554 .name = "msm_vpe",
1555 .id = 0,
1556 .num_resources = ARRAY_SIZE(msm_vpe_resources),
1557 .resource = msm_vpe_resources,
1558};
1559#endif
1560
1561#ifdef CONFIG_MSM_CAMERA
1562#ifdef CONFIG_MSM_CAMERA_FLASH
1563#define VFE_CAMIF_TIMER1_GPIO 29
1564#define VFE_CAMIF_TIMER2_GPIO 30
1565#define VFE_CAMIF_TIMER3_GPIO_INT 31
1566#define FUSION_VFE_CAMIF_TIMER1_GPIO 42
1567static struct msm_camera_sensor_flash_src msm_flash_src = {
1568 .flash_sr_type = MSM_CAMERA_FLASH_SRC_PMIC,
1569 ._fsrc.pmic_src.num_of_src = 2,
1570 ._fsrc.pmic_src.low_current = 100,
1571 ._fsrc.pmic_src.high_current = 300,
1572 ._fsrc.pmic_src.led_src_1 = PMIC8058_ID_FLASH_LED_0,
1573 ._fsrc.pmic_src.led_src_2 = PMIC8058_ID_FLASH_LED_1,
1574 ._fsrc.pmic_src.pmic_set_current = pm8058_set_flash_led_current,
1575};
1576#ifdef CONFIG_IMX074
1577static struct msm_camera_sensor_strobe_flash_data strobe_flash_xenon = {
1578 .flash_trigger = VFE_CAMIF_TIMER2_GPIO,
1579 .flash_charge = VFE_CAMIF_TIMER1_GPIO,
1580 .flash_charge_done = VFE_CAMIF_TIMER3_GPIO_INT,
1581 .flash_recharge_duration = 50000,
1582 .irq = MSM_GPIO_TO_INT(VFE_CAMIF_TIMER3_GPIO_INT),
1583};
1584#endif
1585#endif
1586
1587int msm_cam_gpio_tbl[] = {
1588 32,/*CAMIF_MCLK*/
1589 47,/*CAMIF_I2C_DATA*/
1590 48,/*CAMIF_I2C_CLK*/
1591 105,/*STANDBY*/
1592};
1593
1594enum msm_cam_stat{
1595 MSM_CAM_OFF,
1596 MSM_CAM_ON,
1597};
1598
1599static int config_gpio_table(enum msm_cam_stat stat)
1600{
1601 int rc = 0, i = 0;
1602 if (stat == MSM_CAM_ON) {
1603 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++) {
1604 rc = gpio_request(msm_cam_gpio_tbl[i], "CAM_GPIO");
1605 if (unlikely(rc < 0)) {
1606 pr_err("%s not able to get gpio\n", __func__);
1607 for (i--; i >= 0; i--)
1608 gpio_free(msm_cam_gpio_tbl[i]);
1609 break;
1610 }
1611 }
1612 } else {
1613 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++)
1614 gpio_free(msm_cam_gpio_tbl[i]);
1615 }
1616 return rc;
1617}
1618
1619static struct msm_camera_sensor_platform_info sensor_board_info = {
1620 .mount_angle = 0
1621};
1622
1623/*external regulator VREG_5V*/
1624static struct regulator *reg_flash_5V;
1625
1626static int config_camera_on_gpios_fluid(void)
1627{
1628 int rc = 0;
1629
1630 reg_flash_5V = regulator_get(NULL, "8901_mpp0");
1631 if (IS_ERR(reg_flash_5V)) {
1632 pr_err("'%s' regulator not found, rc=%ld\n",
1633 "8901_mpp0", IS_ERR(reg_flash_5V));
1634 return -ENODEV;
1635 }
1636
1637 rc = regulator_enable(reg_flash_5V);
1638 if (rc) {
1639 pr_err("'%s' regulator enable failed, rc=%d\n",
1640 "8901_mpp0", rc);
1641 regulator_put(reg_flash_5V);
1642 return rc;
1643 }
1644
1645#ifdef CONFIG_IMX074
1646 sensor_board_info.mount_angle = 90;
1647#endif
1648 rc = config_gpio_table(MSM_CAM_ON);
1649 if (rc < 0) {
1650 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1651 "failed\n", __func__);
1652 return rc;
1653 }
1654
1655 rc = gpio_request(GPIO_EXT_CAMIF_PWR_EN, "CAM_EN");
1656 if (rc < 0) {
1657 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1658 "failed\n", __func__, GPIO_EXT_CAMIF_PWR_EN);
1659 regulator_disable(reg_flash_5V);
1660 regulator_put(reg_flash_5V);
1661 return rc;
1662 }
1663 gpio_direction_output(GPIO_EXT_CAMIF_PWR_EN, 0);
1664 msleep(20);
1665 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 1);
1666
1667
1668 /*Enable LED_FLASH_EN*/
1669 rc = gpio_request(GPIO_LED_FLASH_EN, "LED_FLASH_EN");
1670 if (rc < 0) {
1671 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1672 "failed\n", __func__, GPIO_LED_FLASH_EN);
1673
1674 regulator_disable(reg_flash_5V);
1675 regulator_put(reg_flash_5V);
1676 config_gpio_table(MSM_CAM_OFF);
1677 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1678 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1679 return rc;
1680 }
1681 gpio_direction_output(GPIO_LED_FLASH_EN, 1);
1682 msleep(20);
1683 return rc;
1684}
1685
1686
1687static void config_camera_off_gpios_fluid(void)
1688{
1689 regulator_disable(reg_flash_5V);
1690 regulator_put(reg_flash_5V);
1691
1692 gpio_direction_output(GPIO_LED_FLASH_EN, 0);
1693 gpio_free(GPIO_LED_FLASH_EN);
1694
1695 config_gpio_table(MSM_CAM_OFF);
1696
1697 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1698 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1699}
1700static int config_camera_on_gpios(void)
1701{
1702 int rc = 0;
1703
1704 if (machine_is_msm8x60_fluid())
1705 return config_camera_on_gpios_fluid();
1706
1707 rc = config_gpio_table(MSM_CAM_ON);
1708 if (rc < 0) {
1709 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1710 "failed\n", __func__);
1711 return rc;
1712 }
1713
Jilai Wang971f97f2011-07-13 14:25:25 -04001714 if (!machine_is_msm8x60_dragon()) {
1715 rc = gpio_request(GPIO_EXT_CAMIF_PWR_EN, "CAM_EN");
1716 if (rc < 0) {
1717 config_gpio_table(MSM_CAM_OFF);
1718 pr_err("%s: CAMSENSOR gpio %d request"
1719 "failed\n", __func__, GPIO_EXT_CAMIF_PWR_EN);
1720 return rc;
1721 }
1722 gpio_direction_output(GPIO_EXT_CAMIF_PWR_EN, 0);
1723 msleep(20);
1724 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001725 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001726
1727#ifdef CONFIG_MSM_CAMERA_FLASH
1728#ifdef CONFIG_IMX074
1729 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
1730 strobe_flash_xenon.flash_charge = FUSION_VFE_CAMIF_TIMER1_GPIO;
1731#endif
1732#endif
1733 return rc;
1734}
1735
1736static void config_camera_off_gpios(void)
1737{
1738 if (machine_is_msm8x60_fluid())
1739 return config_camera_off_gpios_fluid();
1740
1741
1742 config_gpio_table(MSM_CAM_OFF);
1743
Jilai Wang971f97f2011-07-13 14:25:25 -04001744 if (!machine_is_msm8x60_dragon()) {
1745 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1746 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1747 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001748}
1749
1750#ifdef CONFIG_QS_S5K4E1
1751
1752#define QS_CAM_HC37_CAM_PD PM8058_GPIO_PM_TO_SYS(26)
1753
1754static int config_camera_on_gpios_qs_cam_fluid(void)
1755{
1756 int rc = 0;
1757
1758 /* request QS_CAM_HC37_CAM_PD as an output to HC37 ASIC pin CAM_PD */
1759 rc = gpio_request(QS_CAM_HC37_CAM_PD, "QS_CAM_HC37_CAM_PD");
1760 if (rc < 0) {
1761 printk(KERN_ERR "%s: QS_CAM_HC37_CAM_PD gpio %d request"
1762 " failed\n", __func__, QS_CAM_HC37_CAM_PD);
1763 return rc;
1764 }
1765 gpio_direction_output(QS_CAM_HC37_CAM_PD, 0);
1766 msleep(20);
1767 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 1);
1768 msleep(20);
1769
1770 /*
1771 * Set GPIO_AUX_CAM_2P7_EN to 1 on North Expander IO2
1772 * to enable 2.7V power to Camera
1773 */
1774 rc = gpio_request(GPIO_AUX_CAM_2P7_EN, "CAM_2P7_EN");
1775 if (rc < 0) {
1776 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1777 " failed\n", __func__, GPIO_AUX_CAM_2P7_EN);
1778 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1779 gpio_free(QS_CAM_HC37_CAM_PD);
1780 return rc;
1781 }
1782 gpio_direction_output(GPIO_AUX_CAM_2P7_EN, 0);
1783 msleep(20);
1784 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 1);
1785 msleep(20);
1786
1787 rc = config_camera_on_gpios_fluid();
1788 if (rc < 0) {
1789 printk(KERN_ERR "%s: config_camera_on_gpios_fluid"
1790 " failed\n", __func__);
1791 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1792 gpio_free(QS_CAM_HC37_CAM_PD);
1793 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 0);
1794 gpio_free(GPIO_AUX_CAM_2P7_EN);
1795 return rc;
1796 }
1797 return rc;
1798}
1799
1800static void config_camera_off_gpios_qs_cam_fluid(void)
1801{
1802 /*
1803 * Set GPIO_AUX_CAM_2P7_EN to 0 on North Expander IO2
1804 * to disable 2.7V power to Camera
1805 */
1806 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 0);
1807 gpio_free(GPIO_AUX_CAM_2P7_EN);
1808
1809 /* set QS_CAM_HC37_CAM_PD to 0 to power off HC37 ASIC*/
1810 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1811 gpio_free(QS_CAM_HC37_CAM_PD);
1812
1813 config_camera_off_gpios_fluid();
1814 return;
1815}
1816
1817static int config_camera_on_gpios_qs_cam(void)
1818{
1819 int rc = 0;
1820
1821 if (machine_is_msm8x60_fluid())
1822 return config_camera_on_gpios_qs_cam_fluid();
1823
1824 rc = config_camera_on_gpios();
1825 return rc;
1826}
1827
1828static void config_camera_off_gpios_qs_cam(void)
1829{
1830 if (machine_is_msm8x60_fluid())
1831 return config_camera_off_gpios_qs_cam_fluid();
1832
1833 config_camera_off_gpios();
1834 return;
1835}
1836#endif
1837
1838static int config_camera_on_gpios_web_cam(void)
1839{
1840 int rc = 0;
1841 rc = config_gpio_table(MSM_CAM_ON);
1842 if (rc < 0) {
1843 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1844 "failed\n", __func__);
1845 return rc;
1846 }
1847
Jilai Wang53d27a82011-07-13 14:32:58 -04001848 if (!(machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon())) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001849 rc = gpio_request(GPIO_WEB_CAMIF_STANDBY, "CAM_EN");
1850 if (rc < 0) {
1851 config_gpio_table(MSM_CAM_OFF);
1852 pr_err(KERN_ERR "%s: CAMSENSOR gpio %d request"
1853 "failed\n", __func__, GPIO_WEB_CAMIF_STANDBY);
1854 return rc;
1855 }
1856 gpio_direction_output(GPIO_WEB_CAMIF_STANDBY, 0);
1857 }
1858 return rc;
1859}
1860
1861static void config_camera_off_gpios_web_cam(void)
1862{
1863 config_gpio_table(MSM_CAM_OFF);
Jilai Wang53d27a82011-07-13 14:32:58 -04001864 if (!(machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon())) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001865 gpio_set_value_cansleep(GPIO_WEB_CAMIF_STANDBY, 1);
1866 gpio_free(GPIO_WEB_CAMIF_STANDBY);
1867 }
1868 return;
1869}
1870
1871#ifdef CONFIG_MSM_BUS_SCALING
1872static struct msm_bus_vectors cam_init_vectors[] = {
1873 {
1874 .src = MSM_BUS_MASTER_VFE,
1875 .dst = MSM_BUS_SLAVE_SMI,
1876 .ab = 0,
1877 .ib = 0,
1878 },
1879 {
1880 .src = MSM_BUS_MASTER_VFE,
1881 .dst = MSM_BUS_SLAVE_EBI_CH0,
1882 .ab = 0,
1883 .ib = 0,
1884 },
1885 {
1886 .src = MSM_BUS_MASTER_VPE,
1887 .dst = MSM_BUS_SLAVE_SMI,
1888 .ab = 0,
1889 .ib = 0,
1890 },
1891 {
1892 .src = MSM_BUS_MASTER_VPE,
1893 .dst = MSM_BUS_SLAVE_EBI_CH0,
1894 .ab = 0,
1895 .ib = 0,
1896 },
1897 {
1898 .src = MSM_BUS_MASTER_JPEG_ENC,
1899 .dst = MSM_BUS_SLAVE_SMI,
1900 .ab = 0,
1901 .ib = 0,
1902 },
1903 {
1904 .src = MSM_BUS_MASTER_JPEG_ENC,
1905 .dst = MSM_BUS_SLAVE_EBI_CH0,
1906 .ab = 0,
1907 .ib = 0,
1908 },
1909};
1910
1911static struct msm_bus_vectors cam_preview_vectors[] = {
1912 {
1913 .src = MSM_BUS_MASTER_VFE,
1914 .dst = MSM_BUS_SLAVE_SMI,
1915 .ab = 0,
1916 .ib = 0,
1917 },
1918 {
1919 .src = MSM_BUS_MASTER_VFE,
1920 .dst = MSM_BUS_SLAVE_EBI_CH0,
1921 .ab = 283115520,
1922 .ib = 452984832,
1923 },
1924 {
1925 .src = MSM_BUS_MASTER_VPE,
1926 .dst = MSM_BUS_SLAVE_SMI,
1927 .ab = 0,
1928 .ib = 0,
1929 },
1930 {
1931 .src = MSM_BUS_MASTER_VPE,
1932 .dst = MSM_BUS_SLAVE_EBI_CH0,
1933 .ab = 0,
1934 .ib = 0,
1935 },
1936 {
1937 .src = MSM_BUS_MASTER_JPEG_ENC,
1938 .dst = MSM_BUS_SLAVE_SMI,
1939 .ab = 0,
1940 .ib = 0,
1941 },
1942 {
1943 .src = MSM_BUS_MASTER_JPEG_ENC,
1944 .dst = MSM_BUS_SLAVE_EBI_CH0,
1945 .ab = 0,
1946 .ib = 0,
1947 },
1948};
1949
1950static struct msm_bus_vectors cam_video_vectors[] = {
1951 {
1952 .src = MSM_BUS_MASTER_VFE,
1953 .dst = MSM_BUS_SLAVE_SMI,
1954 .ab = 283115520,
1955 .ib = 452984832,
1956 },
1957 {
1958 .src = MSM_BUS_MASTER_VFE,
1959 .dst = MSM_BUS_SLAVE_EBI_CH0,
1960 .ab = 283115520,
1961 .ib = 452984832,
1962 },
1963 {
1964 .src = MSM_BUS_MASTER_VPE,
1965 .dst = MSM_BUS_SLAVE_SMI,
1966 .ab = 319610880,
1967 .ib = 511377408,
1968 },
1969 {
1970 .src = MSM_BUS_MASTER_VPE,
1971 .dst = MSM_BUS_SLAVE_EBI_CH0,
1972 .ab = 0,
1973 .ib = 0,
1974 },
1975 {
1976 .src = MSM_BUS_MASTER_JPEG_ENC,
1977 .dst = MSM_BUS_SLAVE_SMI,
1978 .ab = 0,
1979 .ib = 0,
1980 },
1981 {
1982 .src = MSM_BUS_MASTER_JPEG_ENC,
1983 .dst = MSM_BUS_SLAVE_EBI_CH0,
1984 .ab = 0,
1985 .ib = 0,
1986 },
1987};
1988
1989static struct msm_bus_vectors cam_snapshot_vectors[] = {
1990 {
1991 .src = MSM_BUS_MASTER_VFE,
1992 .dst = MSM_BUS_SLAVE_SMI,
1993 .ab = 566231040,
1994 .ib = 905969664,
1995 },
1996 {
1997 .src = MSM_BUS_MASTER_VFE,
1998 .dst = MSM_BUS_SLAVE_EBI_CH0,
1999 .ab = 69984000,
2000 .ib = 111974400,
2001 },
2002 {
2003 .src = MSM_BUS_MASTER_VPE,
2004 .dst = MSM_BUS_SLAVE_SMI,
2005 .ab = 0,
2006 .ib = 0,
2007 },
2008 {
2009 .src = MSM_BUS_MASTER_VPE,
2010 .dst = MSM_BUS_SLAVE_EBI_CH0,
2011 .ab = 0,
2012 .ib = 0,
2013 },
2014 {
2015 .src = MSM_BUS_MASTER_JPEG_ENC,
2016 .dst = MSM_BUS_SLAVE_SMI,
2017 .ab = 320864256,
2018 .ib = 513382810,
2019 },
2020 {
2021 .src = MSM_BUS_MASTER_JPEG_ENC,
2022 .dst = MSM_BUS_SLAVE_EBI_CH0,
2023 .ab = 320864256,
2024 .ib = 513382810,
2025 },
2026};
2027
2028static struct msm_bus_vectors cam_zsl_vectors[] = {
2029 {
2030 .src = MSM_BUS_MASTER_VFE,
2031 .dst = MSM_BUS_SLAVE_SMI,
2032 .ab = 566231040,
2033 .ib = 905969664,
2034 },
2035 {
2036 .src = MSM_BUS_MASTER_VFE,
2037 .dst = MSM_BUS_SLAVE_EBI_CH0,
2038 .ab = 706199040,
2039 .ib = 1129918464,
2040 },
2041 {
2042 .src = MSM_BUS_MASTER_VPE,
2043 .dst = MSM_BUS_SLAVE_SMI,
2044 .ab = 0,
2045 .ib = 0,
2046 },
2047 {
2048 .src = MSM_BUS_MASTER_VPE,
2049 .dst = MSM_BUS_SLAVE_EBI_CH0,
2050 .ab = 0,
2051 .ib = 0,
2052 },
2053 {
2054 .src = MSM_BUS_MASTER_JPEG_ENC,
2055 .dst = MSM_BUS_SLAVE_SMI,
2056 .ab = 320864256,
2057 .ib = 513382810,
2058 },
2059 {
2060 .src = MSM_BUS_MASTER_JPEG_ENC,
2061 .dst = MSM_BUS_SLAVE_EBI_CH0,
2062 .ab = 320864256,
2063 .ib = 513382810,
2064 },
2065};
2066
2067static struct msm_bus_vectors cam_stereo_video_vectors[] = {
2068 {
2069 .src = MSM_BUS_MASTER_VFE,
2070 .dst = MSM_BUS_SLAVE_SMI,
2071 .ab = 212336640,
2072 .ib = 339738624,
2073 },
2074 {
2075 .src = MSM_BUS_MASTER_VFE,
2076 .dst = MSM_BUS_SLAVE_EBI_CH0,
2077 .ab = 25090560,
2078 .ib = 40144896,
2079 },
2080 {
2081 .src = MSM_BUS_MASTER_VPE,
2082 .dst = MSM_BUS_SLAVE_SMI,
2083 .ab = 239708160,
2084 .ib = 383533056,
2085 },
2086 {
2087 .src = MSM_BUS_MASTER_VPE,
2088 .dst = MSM_BUS_SLAVE_EBI_CH0,
2089 .ab = 79902720,
2090 .ib = 127844352,
2091 },
2092 {
2093 .src = MSM_BUS_MASTER_JPEG_ENC,
2094 .dst = MSM_BUS_SLAVE_SMI,
2095 .ab = 0,
2096 .ib = 0,
2097 },
2098 {
2099 .src = MSM_BUS_MASTER_JPEG_ENC,
2100 .dst = MSM_BUS_SLAVE_EBI_CH0,
2101 .ab = 0,
2102 .ib = 0,
2103 },
2104};
2105
2106static struct msm_bus_vectors cam_stereo_snapshot_vectors[] = {
2107 {
2108 .src = MSM_BUS_MASTER_VFE,
2109 .dst = MSM_BUS_SLAVE_SMI,
2110 .ab = 0,
2111 .ib = 0,
2112 },
2113 {
2114 .src = MSM_BUS_MASTER_VFE,
2115 .dst = MSM_BUS_SLAVE_EBI_CH0,
2116 .ab = 300902400,
2117 .ib = 481443840,
2118 },
2119 {
2120 .src = MSM_BUS_MASTER_VPE,
2121 .dst = MSM_BUS_SLAVE_SMI,
2122 .ab = 230307840,
2123 .ib = 368492544,
2124 },
2125 {
2126 .src = MSM_BUS_MASTER_VPE,
2127 .dst = MSM_BUS_SLAVE_EBI_CH0,
2128 .ab = 245113344,
2129 .ib = 392181351,
2130 },
2131 {
2132 .src = MSM_BUS_MASTER_JPEG_ENC,
2133 .dst = MSM_BUS_SLAVE_SMI,
2134 .ab = 106536960,
2135 .ib = 170459136,
2136 },
2137 {
2138 .src = MSM_BUS_MASTER_JPEG_ENC,
2139 .dst = MSM_BUS_SLAVE_EBI_CH0,
2140 .ab = 106536960,
2141 .ib = 170459136,
2142 },
2143};
2144
2145static struct msm_bus_paths cam_bus_client_config[] = {
2146 {
2147 ARRAY_SIZE(cam_init_vectors),
2148 cam_init_vectors,
2149 },
2150 {
2151 ARRAY_SIZE(cam_preview_vectors),
2152 cam_preview_vectors,
2153 },
2154 {
2155 ARRAY_SIZE(cam_video_vectors),
2156 cam_video_vectors,
2157 },
2158 {
2159 ARRAY_SIZE(cam_snapshot_vectors),
2160 cam_snapshot_vectors,
2161 },
2162 {
2163 ARRAY_SIZE(cam_zsl_vectors),
2164 cam_zsl_vectors,
2165 },
2166 {
2167 ARRAY_SIZE(cam_stereo_video_vectors),
2168 cam_stereo_video_vectors,
2169 },
2170 {
2171 ARRAY_SIZE(cam_stereo_snapshot_vectors),
2172 cam_stereo_snapshot_vectors,
2173 },
2174};
2175
2176static struct msm_bus_scale_pdata cam_bus_client_pdata = {
2177 cam_bus_client_config,
2178 ARRAY_SIZE(cam_bus_client_config),
2179 .name = "msm_camera",
2180};
2181#endif
2182
2183struct msm_camera_device_platform_data msm_camera_device_data = {
2184 .camera_gpio_on = config_camera_on_gpios,
2185 .camera_gpio_off = config_camera_off_gpios,
2186 .ioext.csiphy = 0x04800000,
2187 .ioext.csisz = 0x00000400,
2188 .ioext.csiirq = CSI_0_IRQ,
2189 .ioclk.mclk_clk_rate = 24000000,
2190 .ioclk.vfe_clk_rate = 228570000,
2191#ifdef CONFIG_MSM_BUS_SCALING
2192 .cam_bus_scale_table = &cam_bus_client_pdata,
2193#endif
2194};
2195
2196#ifdef CONFIG_QS_S5K4E1
2197struct msm_camera_device_platform_data msm_camera_device_data_qs_cam = {
2198 .camera_gpio_on = config_camera_on_gpios_qs_cam,
2199 .camera_gpio_off = config_camera_off_gpios_qs_cam,
2200 .ioext.csiphy = 0x04800000,
2201 .ioext.csisz = 0x00000400,
2202 .ioext.csiirq = CSI_0_IRQ,
2203 .ioclk.mclk_clk_rate = 24000000,
2204 .ioclk.vfe_clk_rate = 228570000,
2205#ifdef CONFIG_MSM_BUS_SCALING
2206 .cam_bus_scale_table = &cam_bus_client_pdata,
2207#endif
2208};
2209#endif
2210
2211struct msm_camera_device_platform_data msm_camera_device_data_web_cam = {
2212 .camera_gpio_on = config_camera_on_gpios_web_cam,
2213 .camera_gpio_off = config_camera_off_gpios_web_cam,
2214 .ioext.csiphy = 0x04900000,
2215 .ioext.csisz = 0x00000400,
2216 .ioext.csiirq = CSI_1_IRQ,
2217 .ioclk.mclk_clk_rate = 24000000,
2218 .ioclk.vfe_clk_rate = 228570000,
2219#ifdef CONFIG_MSM_BUS_SCALING
2220 .cam_bus_scale_table = &cam_bus_client_pdata,
2221#endif
2222};
2223
2224struct resource msm_camera_resources[] = {
2225 {
2226 .start = 0x04500000,
2227 .end = 0x04500000 + SZ_1M - 1,
2228 .flags = IORESOURCE_MEM,
2229 },
2230 {
2231 .start = VFE_IRQ,
2232 .end = VFE_IRQ,
2233 .flags = IORESOURCE_IRQ,
2234 },
2235};
2236#ifdef CONFIG_MT9E013
2237static struct msm_camera_sensor_platform_info mt9e013_sensor_8660_info = {
2238 .mount_angle = 0
2239};
2240
2241static struct msm_camera_sensor_flash_data flash_mt9e013 = {
2242 .flash_type = MSM_CAMERA_FLASH_LED,
2243 .flash_src = &msm_flash_src
2244};
2245
2246static struct msm_camera_sensor_info msm_camera_sensor_mt9e013_data = {
2247 .sensor_name = "mt9e013",
2248 .sensor_reset = 106,
2249 .sensor_pwd = 85,
2250 .vcm_pwd = 1,
2251 .vcm_enable = 0,
2252 .pdata = &msm_camera_device_data,
2253 .resource = msm_camera_resources,
2254 .num_resources = ARRAY_SIZE(msm_camera_resources),
2255 .flash_data = &flash_mt9e013,
2256 .strobe_flash_data = &strobe_flash_xenon,
2257 .sensor_platform_info = &mt9e013_sensor_8660_info,
2258 .csi_if = 1
2259};
2260struct platform_device msm_camera_sensor_mt9e013 = {
2261 .name = "msm_camera_mt9e013",
2262 .dev = {
2263 .platform_data = &msm_camera_sensor_mt9e013_data,
2264 },
2265};
2266#endif
2267
2268#ifdef CONFIG_IMX074
Roja Rani Yarubandi68ebb4d2011-10-20 10:33:16 +05302269static struct msm_camera_sensor_platform_info imx074_sensor_board_info = {
2270 .mount_angle = 180
2271};
2272
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002273static struct msm_camera_sensor_flash_data flash_imx074 = {
2274 .flash_type = MSM_CAMERA_FLASH_LED,
2275 .flash_src = &msm_flash_src
2276};
2277
2278static struct msm_camera_sensor_info msm_camera_sensor_imx074_data = {
2279 .sensor_name = "imx074",
2280 .sensor_reset = 106,
2281 .sensor_pwd = 85,
2282 .vcm_pwd = GPIO_AUX_CAM_2P7_EN,
2283 .vcm_enable = 1,
2284 .pdata = &msm_camera_device_data,
2285 .resource = msm_camera_resources,
2286 .num_resources = ARRAY_SIZE(msm_camera_resources),
2287 .flash_data = &flash_imx074,
2288 .strobe_flash_data = &strobe_flash_xenon,
Roja Rani Yarubandi68ebb4d2011-10-20 10:33:16 +05302289 .sensor_platform_info = &imx074_sensor_board_info,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002290 .csi_if = 1
2291};
2292struct platform_device msm_camera_sensor_imx074 = {
2293 .name = "msm_camera_imx074",
2294 .dev = {
2295 .platform_data = &msm_camera_sensor_imx074_data,
2296 },
2297};
2298#endif
2299#ifdef CONFIG_WEBCAM_OV9726
2300
2301static struct msm_camera_sensor_platform_info ov9726_sensor_8660_info = {
2302 .mount_angle = 0
2303};
2304
2305static struct msm_camera_sensor_flash_data flash_ov9726 = {
2306 .flash_type = MSM_CAMERA_FLASH_LED,
2307 .flash_src = &msm_flash_src
2308};
2309static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data = {
2310 .sensor_name = "ov9726",
Kevin Chan3382c512011-07-19 21:00:45 -07002311 .sensor_reset_enable = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002312 .sensor_reset = GPIO_FRONT_CAM_RESET_N,
2313 .sensor_pwd = 85,
2314 .vcm_pwd = 1,
2315 .vcm_enable = 0,
2316 .pdata = &msm_camera_device_data_web_cam,
2317 .resource = msm_camera_resources,
2318 .num_resources = ARRAY_SIZE(msm_camera_resources),
2319 .flash_data = &flash_ov9726,
2320 .sensor_platform_info = &ov9726_sensor_8660_info,
2321 .csi_if = 1
2322};
2323struct platform_device msm_camera_sensor_webcam_ov9726 = {
2324 .name = "msm_camera_ov9726",
2325 .dev = {
2326 .platform_data = &msm_camera_sensor_ov9726_data,
2327 },
2328};
2329#endif
2330#ifdef CONFIG_WEBCAM_OV7692
2331static struct msm_camera_sensor_flash_data flash_ov7692 = {
2332 .flash_type = MSM_CAMERA_FLASH_LED,
2333 .flash_src = &msm_flash_src
2334};
2335static struct msm_camera_sensor_info msm_camera_sensor_ov7692_data = {
2336 .sensor_name = "ov7692",
2337 .sensor_reset = GPIO_WEB_CAMIF_RESET_N,
2338 .sensor_pwd = 85,
2339 .vcm_pwd = 1,
2340 .vcm_enable = 0,
2341 .pdata = &msm_camera_device_data_web_cam,
2342 .resource = msm_camera_resources,
2343 .num_resources = ARRAY_SIZE(msm_camera_resources),
2344 .flash_data = &flash_ov7692,
2345 .csi_if = 1
2346};
2347
2348static struct platform_device msm_camera_sensor_webcam_ov7692 = {
2349 .name = "msm_camera_ov7692",
2350 .dev = {
2351 .platform_data = &msm_camera_sensor_ov7692_data,
2352 },
2353};
2354#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04002355#ifdef CONFIG_VX6953
2356static struct msm_camera_sensor_platform_info vx6953_sensor_8660_info = {
2357 .mount_angle = 270
2358};
2359
2360static struct msm_camera_sensor_flash_data flash_vx6953 = {
2361 .flash_type = MSM_CAMERA_FLASH_NONE,
2362 .flash_src = &msm_flash_src
2363};
2364
2365static struct msm_camera_sensor_info msm_camera_sensor_vx6953_data = {
2366 .sensor_name = "vx6953",
2367 .sensor_reset = 63,
2368 .sensor_pwd = 63,
2369 .vcm_pwd = GPIO_AUX_CAM_2P7_EN,
2370 .vcm_enable = 1,
2371 .pdata = &msm_camera_device_data,
2372 .resource = msm_camera_resources,
2373 .num_resources = ARRAY_SIZE(msm_camera_resources),
2374 .flash_data = &flash_vx6953,
2375 .sensor_platform_info = &vx6953_sensor_8660_info,
2376 .csi_if = 1
2377};
2378struct platform_device msm_camera_sensor_vx6953 = {
2379 .name = "msm_camera_vx6953",
2380 .dev = {
2381 .platform_data = &msm_camera_sensor_vx6953_data,
2382 },
2383};
2384#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002385#ifdef CONFIG_QS_S5K4E1
2386
Nishant Pandit613ab7a2011-09-02 03:36:01 +05302387static struct msm_camera_sensor_platform_info qs_s5k4e1_sensor_8660_info = {
2388#ifdef CONFIG_FB_MSM_MIPI_NOVATEK_CMD_QHD_PT
2389 .mount_angle = 90
2390#else
2391 .mount_angle = 0
2392#endif
2393};
2394
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002395static char eeprom_data[864];
2396static struct msm_camera_sensor_flash_data flash_qs_s5k4e1 = {
2397 .flash_type = MSM_CAMERA_FLASH_LED,
2398 .flash_src = &msm_flash_src
2399};
2400
2401static struct msm_camera_sensor_info msm_camera_sensor_qs_s5k4e1_data = {
2402 .sensor_name = "qs_s5k4e1",
2403 .sensor_reset = 106,
2404 .sensor_pwd = 85,
2405 .vcm_pwd = 1,
2406 .vcm_enable = 0,
2407 .pdata = &msm_camera_device_data_qs_cam,
2408 .resource = msm_camera_resources,
2409 .num_resources = ARRAY_SIZE(msm_camera_resources),
2410 .flash_data = &flash_qs_s5k4e1,
2411 .strobe_flash_data = &strobe_flash_xenon,
Nishant Pandit613ab7a2011-09-02 03:36:01 +05302412 .sensor_platform_info = &qs_s5k4e1_sensor_8660_info,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002413 .csi_if = 1,
2414 .eeprom_data = eeprom_data,
2415};
2416struct platform_device msm_camera_sensor_qs_s5k4e1 = {
2417 .name = "msm_camera_qs_s5k4e1",
2418 .dev = {
2419 .platform_data = &msm_camera_sensor_qs_s5k4e1_data,
2420 },
2421};
2422#endif
2423static struct i2c_board_info msm_camera_boardinfo[] __initdata = {
2424 #ifdef CONFIG_MT9E013
2425 {
2426 I2C_BOARD_INFO("mt9e013", 0x6C >> 2),
2427 },
2428 #endif
2429 #ifdef CONFIG_IMX074
2430 {
2431 I2C_BOARD_INFO("imx074", 0x1A),
2432 },
2433 #endif
2434 #ifdef CONFIG_WEBCAM_OV7692
2435 {
2436 I2C_BOARD_INFO("ov7692", 0x78),
2437 },
2438 #endif
2439 #ifdef CONFIG_WEBCAM_OV9726
2440 {
2441 I2C_BOARD_INFO("ov9726", 0x10),
2442 },
2443 #endif
2444 #ifdef CONFIG_QS_S5K4E1
2445 {
2446 I2C_BOARD_INFO("qs_s5k4e1", 0x20),
2447 },
2448 #endif
2449};
Jilai Wang971f97f2011-07-13 14:25:25 -04002450
2451static struct i2c_board_info msm_camera_dragon_boardinfo[] __initdata = {
Jilai Wang53d27a82011-07-13 14:32:58 -04002452 #ifdef CONFIG_WEBCAM_OV9726
2453 {
2454 I2C_BOARD_INFO("ov9726", 0x10),
2455 },
2456 #endif
Jilai Wang971f97f2011-07-13 14:25:25 -04002457 #ifdef CONFIG_VX6953
2458 {
2459 I2C_BOARD_INFO("vx6953", 0x20),
2460 },
2461 #endif
2462};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002463#endif
2464
2465#ifdef CONFIG_MSM_GEMINI
2466static struct resource msm_gemini_resources[] = {
2467 {
2468 .start = 0x04600000,
2469 .end = 0x04600000 + SZ_1M - 1,
2470 .flags = IORESOURCE_MEM,
2471 },
2472 {
2473 .start = INT_JPEG,
2474 .end = INT_JPEG,
2475 .flags = IORESOURCE_IRQ,
2476 },
2477};
2478
2479static struct platform_device msm_gemini_device = {
2480 .name = "msm_gemini",
2481 .resource = msm_gemini_resources,
2482 .num_resources = ARRAY_SIZE(msm_gemini_resources),
2483};
2484#endif
2485
2486#ifdef CONFIG_I2C_QUP
2487static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
2488{
2489}
2490
2491static struct msm_i2c_platform_data msm_gsbi3_qup_i2c_pdata = {
2492 .clk_freq = 384000,
2493 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002494 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2495};
2496
2497static struct msm_i2c_platform_data msm_gsbi4_qup_i2c_pdata = {
2498 .clk_freq = 100000,
2499 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002500 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2501};
2502
2503static struct msm_i2c_platform_data msm_gsbi7_qup_i2c_pdata = {
2504 .clk_freq = 100000,
2505 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002506 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2507};
2508
2509static struct msm_i2c_platform_data msm_gsbi8_qup_i2c_pdata = {
2510 .clk_freq = 100000,
2511 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002512 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2513};
2514
2515static struct msm_i2c_platform_data msm_gsbi9_qup_i2c_pdata = {
2516 .clk_freq = 100000,
2517 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002518 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2519};
2520
2521static struct msm_i2c_platform_data msm_gsbi12_qup_i2c_pdata = {
2522 .clk_freq = 100000,
2523 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002524 .use_gsbi_shared_mode = 1,
2525 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2526};
2527#endif
2528
2529#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
2530static struct msm_spi_platform_data msm_gsbi1_qup_spi_pdata = {
2531 .max_clock_speed = 24000000,
2532};
2533
2534static struct msm_spi_platform_data msm_gsbi10_qup_spi_pdata = {
2535 .max_clock_speed = 24000000,
2536};
2537#endif
2538
2539#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002540/* CODEC/TSSC SSBI */
2541static struct msm_i2c_ssbi_platform_data msm_ssbi3_pdata = {
2542 .controller_type = MSM_SBI_CTRL_SSBI,
2543};
2544#endif
2545
2546#ifdef CONFIG_BATTERY_MSM
2547/* Use basic value for fake MSM battery */
2548static struct msm_psy_batt_pdata msm_psy_batt_data = {
2549 .avail_chg_sources = AC_CHG,
2550};
2551
2552static struct platform_device msm_batt_device = {
2553 .name = "msm-battery",
2554 .id = -1,
2555 .dev.platform_data = &msm_psy_batt_data,
2556};
2557#endif
2558
2559#ifdef CONFIG_FB_MSM_LCDC_DSUB
2560/* VGA = 1440 x 900 x 4(bpp) x 2(pages)
2561 prim = 1024 x 600 x 4(bpp) x 2(pages)
2562 This is the difference. */
2563#define MSM_FB_DSUB_PMEM_ADDER (0xA32000-0x4B0000)
2564#else
2565#define MSM_FB_DSUB_PMEM_ADDER (0)
2566#endif
2567
2568/* Sensors DSPS platform data */
2569#ifdef CONFIG_MSM_DSPS
2570
2571static struct dsps_gpio_info dsps_surf_gpios[] = {
2572 {
2573 .name = "compass_rst_n",
2574 .num = GPIO_COMPASS_RST_N,
2575 .on_val = 1, /* device not in reset */
2576 .off_val = 0, /* device in reset */
2577 },
2578 {
2579 .name = "gpio_r_altimeter_reset_n",
2580 .num = GPIO_R_ALTIMETER_RESET_N,
2581 .on_val = 1, /* device not in reset */
2582 .off_val = 0, /* device in reset */
2583 }
2584};
2585
2586static struct dsps_gpio_info dsps_fluid_gpios[] = {
2587 {
2588 .name = "gpio_n_altimeter_reset_n",
2589 .num = GPIO_N_ALTIMETER_RESET_N,
2590 .on_val = 1, /* device not in reset */
2591 .off_val = 0, /* device in reset */
2592 }
2593};
2594
2595static void __init msm8x60_init_dsps(void)
2596{
2597 struct msm_dsps_platform_data *pdata =
2598 msm_dsps_device.dev.platform_data;
2599 /*
2600 * On Fluid the Compass sensor Chip-Select (CS) is directly connected
2601 * to the power supply and not controled via GPIOs. Fluid uses a
2602 * different IO-Expender (north) than used on surf/ffa.
2603 */
2604 if (machine_is_msm8x60_fluid()) {
2605 /* fluid has different firmware, gpios */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002606 pdata->pil_name = DSPS_PIL_FLUID_NAME;
2607 pdata->gpios = dsps_fluid_gpios;
2608 pdata->gpios_num = ARRAY_SIZE(dsps_fluid_gpios);
2609 } else {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002610 pdata->pil_name = DSPS_PIL_GENERIC_NAME;
2611 pdata->gpios = dsps_surf_gpios;
2612 pdata->gpios_num = ARRAY_SIZE(dsps_surf_gpios);
2613 }
2614
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002615 platform_device_register(&msm_dsps_device);
2616}
2617#endif /* CONFIG_MSM_DSPS */
2618
2619#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002620#define MSM_FB_PRIM_BUF_SIZE (1024 * 600 * 4 * 3) /* 4 bpp x 3 pages */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002621#else
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002622#define MSM_FB_PRIM_BUF_SIZE (1024 * 600 * 4 * 2) /* 4 bpp x 2 pages */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002623#endif
2624
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002625#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
2626#define MSM_FB_EXT_BUF_SIZE (1920 * 1080 * 2 * 1) /* 2 bpp x 1 page */
2627#elif defined(CONFIG_FB_MSM_TVOUT)
2628#define MSM_FB_EXT_BUF_SIZE (720 * 576 * 2 * 2) /* 2 bpp x 2 pages */
2629#else
2630#define MSM_FB_EXT_BUFT_SIZE 0
2631#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002632
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002633#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
2634/* 4 bpp x 2 page HDMI case */
2635#define MSM_FB_SIZE roundup((1920 * 1088 * 4 * 2), 4096)
2636#else
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002637/* Note: must be multiple of 4096 */
2638#define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE + \
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002639 MSM_FB_DSUB_PMEM_ADDER, 4096)
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002640#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002641
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002642#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
2643#define MSM_PMEM_SF_SIZE 0x8000000 /* 128 Mbytes */
2644#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002645#define MSM_PMEM_SF_SIZE 0x4000000 /* 64 Mbytes */
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002646#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002647
Huaibin Yanga5419422011-12-08 23:52:10 -08002648#ifdef CONFIG_FB_MSM_OVERLAY0_WRITEBACK
2649#define MSM_FB_OVERLAY0_WRITEBACK_SIZE roundup((1376 * 768 * 3 * 2), 4096)
2650#else
2651#define MSM_FB_OVERLAY0_WRITEBACK_SIZE (0)
2652#endif /* CONFIG_FB_MSM_OVERLAY0_WRITEBACK */
2653
2654#ifdef CONFIG_FB_MSM_OVERLAY1_WRITEBACK
2655#define MSM_FB_OVERLAY1_WRITEBACK_SIZE roundup((1920 * 1088 * 3 * 2), 4096)
2656#else
2657#define MSM_FB_OVERLAY1_WRITEBACK_SIZE (0)
2658#endif /* CONFIG_FB_MSM_OVERLAY1_WRITEBACK */
2659
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002660#define MSM_PMEM_KERNEL_EBI1_SIZE 0x600000
2661#define MSM_PMEM_ADSP_SIZE 0x2000000
Ben Romberger09e462d2011-08-09 15:24:37 -07002662#define MSM_PMEM_AUDIO_SIZE 0x28B000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002663
2664#define MSM_SMI_BASE 0x38000000
2665#define MSM_SMI_SIZE 0x4000000
2666
2667#define KERNEL_SMI_BASE (MSM_SMI_BASE)
Maheshwar Ajjac60c0462011-11-29 17:46:57 -08002668#define KERNEL_SMI_SIZE 0x600000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002669
2670#define USER_SMI_BASE (KERNEL_SMI_BASE + KERNEL_SMI_SIZE)
2671#define USER_SMI_SIZE (MSM_SMI_SIZE - KERNEL_SMI_SIZE)
2672#define MSM_PMEM_SMIPOOL_SIZE USER_SMI_SIZE
2673
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002674#define MSM_ION_EBI_SIZE MSM_PMEM_SF_SIZE
2675#define MSM_ION_ADSP_SIZE MSM_PMEM_ADSP_SIZE
Laura Abbottdf8b8a82011-11-02 23:13:45 -07002676#define MSM_ION_SMI_SIZE MSM_PMEM_SMIPOOL_SIZE
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002677
2678#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
2679#define MSM_ION_HEAP_NUM 5
2680#else
2681#define MSM_ION_HEAP_NUM 2
2682#endif
2683
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002684static unsigned fb_size;
2685static int __init fb_size_setup(char *p)
2686{
2687 fb_size = memparse(p, NULL);
2688 return 0;
2689}
2690early_param("fb_size", fb_size_setup);
2691
2692static unsigned pmem_kernel_ebi1_size = MSM_PMEM_KERNEL_EBI1_SIZE;
2693static int __init pmem_kernel_ebi1_size_setup(char *p)
2694{
2695 pmem_kernel_ebi1_size = memparse(p, NULL);
2696 return 0;
2697}
2698early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
2699
2700#ifdef CONFIG_ANDROID_PMEM
2701static unsigned pmem_sf_size = MSM_PMEM_SF_SIZE;
2702static int __init pmem_sf_size_setup(char *p)
2703{
2704 pmem_sf_size = memparse(p, NULL);
2705 return 0;
2706}
2707early_param("pmem_sf_size", pmem_sf_size_setup);
2708
2709static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
2710
2711static int __init pmem_adsp_size_setup(char *p)
2712{
2713 pmem_adsp_size = memparse(p, NULL);
2714 return 0;
2715}
2716early_param("pmem_adsp_size", pmem_adsp_size_setup);
2717
2718static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
2719
2720static int __init pmem_audio_size_setup(char *p)
2721{
2722 pmem_audio_size = memparse(p, NULL);
2723 return 0;
2724}
2725early_param("pmem_audio_size", pmem_audio_size_setup);
2726#endif
2727
2728static struct resource msm_fb_resources[] = {
2729 {
2730 .flags = IORESOURCE_DMA,
2731 }
2732};
2733
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002734static int msm_fb_detect_panel(const char *name)
2735{
2736 if (machine_is_msm8x60_fluid()) {
2737 uint32_t soc_platform_version = socinfo_get_platform_version();
2738 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3) {
2739#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
2740 if (!strncmp(name, LCDC_SAMSUNG_OLED_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002741 strnlen(LCDC_SAMSUNG_OLED_PANEL_NAME,
2742 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002743 return 0;
2744#endif
2745 } else { /*P3 and up use AUO panel */
2746#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
2747 if (!strncmp(name, LCDC_AUO_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002748 strnlen(LCDC_AUO_PANEL_NAME,
2749 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002750 return 0;
2751#endif
2752 }
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04002753#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
2754 } else if machine_is_msm8x60_dragon() {
2755 if (!strncmp(name, LCDC_NT35582_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002756 strnlen(LCDC_NT35582_PANEL_NAME,
2757 PANEL_NAME_MAX_LEN)))
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04002758 return 0;
2759#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002760 } else {
2761 if (!strncmp(name, LCDC_SAMSUNG_WSVGA_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002762 strnlen(LCDC_SAMSUNG_WSVGA_PANEL_NAME,
2763 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002764 return 0;
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002765
2766#if !defined(CONFIG_FB_MSM_LCDC_AUTO_DETECT) && \
2767 !defined(CONFIG_FB_MSM_MIPI_PANEL_AUTO_DETECT) && \
2768 !defined(CONFIG_FB_MSM_LCDC_MIPI_PANEL_AUTO_DETECT)
2769 if (!strncmp(name, MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME,
2770 strnlen(MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME,
2771 PANEL_NAME_MAX_LEN)))
2772 return 0;
2773
2774 if (!strncmp(name, MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
2775 strnlen(MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
2776 PANEL_NAME_MAX_LEN)))
2777 return 0;
2778
2779 if (!strncmp(name, MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
2780 strnlen(MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
2781 PANEL_NAME_MAX_LEN)))
2782 return 0;
2783#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002784 }
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002785
2786 if (!strncmp(name, HDMI_PANEL_NAME,
2787 strnlen(HDMI_PANEL_NAME,
2788 PANEL_NAME_MAX_LEN)))
2789 return 0;
2790
2791 if (!strncmp(name, TVOUT_PANEL_NAME,
2792 strnlen(TVOUT_PANEL_NAME,
2793 PANEL_NAME_MAX_LEN)))
2794 return 0;
2795
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002796 pr_warning("%s: not supported '%s'", __func__, name);
2797 return -ENODEV;
2798}
2799
2800static struct msm_fb_platform_data msm_fb_pdata = {
2801 .detect_client = msm_fb_detect_panel,
2802};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002803
2804static struct platform_device msm_fb_device = {
2805 .name = "msm_fb",
2806 .id = 0,
2807 .num_resources = ARRAY_SIZE(msm_fb_resources),
2808 .resource = msm_fb_resources,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002809 .dev.platform_data = &msm_fb_pdata,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002810};
2811
2812#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002813#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002814static struct android_pmem_platform_data android_pmem_pdata = {
2815 .name = "pmem",
2816 .allocator_type = PMEM_ALLOCATORTYPE_ALLORNOTHING,
2817 .cached = 1,
2818 .memory_type = MEMTYPE_EBI1,
2819};
2820
2821static struct platform_device android_pmem_device = {
2822 .name = "android_pmem",
2823 .id = 0,
2824 .dev = {.platform_data = &android_pmem_pdata},
2825};
2826
2827static struct android_pmem_platform_data android_pmem_adsp_pdata = {
2828 .name = "pmem_adsp",
2829 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2830 .cached = 0,
2831 .memory_type = MEMTYPE_EBI1,
2832};
2833
2834static struct platform_device android_pmem_adsp_device = {
2835 .name = "android_pmem",
2836 .id = 2,
2837 .dev = { .platform_data = &android_pmem_adsp_pdata },
2838};
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002839#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002840static struct android_pmem_platform_data android_pmem_audio_pdata = {
2841 .name = "pmem_audio",
2842 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2843 .cached = 0,
2844 .memory_type = MEMTYPE_EBI1,
2845};
2846
2847static struct platform_device android_pmem_audio_device = {
2848 .name = "android_pmem",
2849 .id = 4,
2850 .dev = { .platform_data = &android_pmem_audio_pdata },
2851};
2852
Laura Abbott1e36a022011-06-22 17:08:13 -07002853#define PMEM_BUS_WIDTH(_bw) \
2854 { \
2855 .vectors = &(struct msm_bus_vectors){ \
2856 .src = MSM_BUS_MASTER_AMPSS_M0, \
2857 .dst = MSM_BUS_SLAVE_SMI, \
2858 .ib = (_bw), \
2859 .ab = 0, \
2860 }, \
2861 .num_paths = 1, \
2862 }
Olav Hauganee0f7802011-12-19 13:28:57 -08002863
2864static struct msm_bus_paths mem_smi_table[] = {
Laura Abbott1e36a022011-06-22 17:08:13 -07002865 [0] = PMEM_BUS_WIDTH(0), /* Off */
2866 [1] = PMEM_BUS_WIDTH(1), /* On */
2867};
2868
2869static struct msm_bus_scale_pdata smi_client_pdata = {
Olav Hauganee0f7802011-12-19 13:28:57 -08002870 .usecase = mem_smi_table,
2871 .num_usecases = ARRAY_SIZE(mem_smi_table),
2872 .name = "mem_smi",
Laura Abbott1e36a022011-06-22 17:08:13 -07002873};
2874
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002875int request_smi_region(void *data)
Laura Abbott1e36a022011-06-22 17:08:13 -07002876{
2877 int bus_id = (int) data;
2878
2879 msm_bus_scale_client_update_request(bus_id, 1);
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002880 return 0;
Laura Abbott1e36a022011-06-22 17:08:13 -07002881}
2882
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002883int release_smi_region(void *data)
Laura Abbott1e36a022011-06-22 17:08:13 -07002884{
2885 int bus_id = (int) data;
2886
2887 msm_bus_scale_client_update_request(bus_id, 0);
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002888 return 0;
Laura Abbott1e36a022011-06-22 17:08:13 -07002889}
2890
Alex Bird199980e2011-10-21 11:29:27 -07002891void *setup_smi_region(void)
Laura Abbott1e36a022011-06-22 17:08:13 -07002892{
2893 return (void *)msm_bus_scale_register_client(&smi_client_pdata);
2894}
Olav Hauganee0f7802011-12-19 13:28:57 -08002895#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002896static struct android_pmem_platform_data android_pmem_smipool_pdata = {
2897 .name = "pmem_smipool",
2898 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2899 .cached = 0,
2900 .memory_type = MEMTYPE_SMI,
Alex Bird199980e2011-10-21 11:29:27 -07002901 .request_region = request_smi_region,
2902 .release_region = release_smi_region,
2903 .setup_region = setup_smi_region,
Laura Abbott1e36a022011-06-22 17:08:13 -07002904 .map_on_demand = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002905};
2906static struct platform_device android_pmem_smipool_device = {
2907 .name = "android_pmem",
2908 .id = 7,
2909 .dev = { .platform_data = &android_pmem_smipool_pdata },
2910};
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002911#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002912#endif
2913
2914#define GPIO_DONGLE_PWR_EN 258
2915static void setup_display_power(void);
2916static int lcdc_vga_enabled;
2917static int vga_enable_request(int enable)
2918{
2919 if (enable)
2920 lcdc_vga_enabled = 1;
2921 else
2922 lcdc_vga_enabled = 0;
2923 setup_display_power();
2924
2925 return 0;
2926}
2927
2928#define GPIO_BACKLIGHT_PWM0 0
2929#define GPIO_BACKLIGHT_PWM1 1
2930
2931static int pmic_backlight_gpio[2]
2932 = { GPIO_BACKLIGHT_PWM0, GPIO_BACKLIGHT_PWM1 };
2933static struct msm_panel_common_pdata lcdc_samsung_panel_data = {
2934 .gpio_num = pmic_backlight_gpio, /* two LPG CHANNELS for backlight */
2935 .vga_switch = vga_enable_request,
2936};
2937
2938static struct platform_device lcdc_samsung_panel_device = {
2939 .name = LCDC_SAMSUNG_WSVGA_PANEL_NAME,
2940 .id = 0,
2941 .dev = {
2942 .platform_data = &lcdc_samsung_panel_data,
2943 }
2944};
2945#if (!defined(CONFIG_SPI_QUP)) && \
2946 (defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
2947 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA))
2948
2949static int lcdc_spi_gpio_array_num[] = {
2950 LCDC_SPI_GPIO_CLK,
2951 LCDC_SPI_GPIO_CS,
2952 LCDC_SPI_GPIO_MOSI,
2953};
2954
2955static uint32_t lcdc_spi_gpio_config_data[] = {
2956 GPIO_CFG(LCDC_SPI_GPIO_CLK, 0,
2957 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2958 GPIO_CFG(LCDC_SPI_GPIO_CS, 0,
2959 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2960 GPIO_CFG(LCDC_SPI_GPIO_MOSI, 0,
2961 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2962};
2963
2964static void lcdc_config_spi_gpios(int enable)
2965{
2966 int n;
2967 for (n = 0; n < ARRAY_SIZE(lcdc_spi_gpio_config_data); ++n)
2968 gpio_tlmm_config(lcdc_spi_gpio_config_data[n], 0);
2969}
2970#endif
2971
2972#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
2973#ifdef CONFIG_SPI_QUP
2974static struct spi_board_info lcdc_samsung_spi_board_info[] __initdata = {
2975 {
2976 .modalias = LCDC_SAMSUNG_SPI_DEVICE_NAME,
2977 .mode = SPI_MODE_3,
2978 .bus_num = 1,
2979 .chip_select = 0,
2980 .max_speed_hz = 10800000,
2981 }
2982};
2983#endif /* CONFIG_SPI_QUP */
2984
2985static struct msm_panel_common_pdata lcdc_samsung_oled_panel_data = {
2986#ifndef CONFIG_SPI_QUP
2987 .panel_config_gpio = lcdc_config_spi_gpios,
2988 .gpio_num = lcdc_spi_gpio_array_num,
2989#endif
2990};
2991
2992static struct platform_device lcdc_samsung_oled_panel_device = {
2993 .name = LCDC_SAMSUNG_OLED_PANEL_NAME,
2994 .id = 0,
2995 .dev.platform_data = &lcdc_samsung_oled_panel_data,
2996};
2997#endif /*CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT */
2998
2999#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
3000#ifdef CONFIG_SPI_QUP
3001static struct spi_board_info lcdc_auo_spi_board_info[] __initdata = {
3002 {
3003 .modalias = LCDC_AUO_SPI_DEVICE_NAME,
3004 .mode = SPI_MODE_3,
3005 .bus_num = 1,
3006 .chip_select = 0,
3007 .max_speed_hz = 10800000,
3008 }
3009};
3010#endif
3011
3012static struct msm_panel_common_pdata lcdc_auo_wvga_panel_data = {
3013#ifndef CONFIG_SPI_QUP
3014 .panel_config_gpio = lcdc_config_spi_gpios,
3015 .gpio_num = lcdc_spi_gpio_array_num,
3016#endif
3017};
3018
3019static struct platform_device lcdc_auo_wvga_panel_device = {
3020 .name = LCDC_AUO_PANEL_NAME,
3021 .id = 0,
3022 .dev.platform_data = &lcdc_auo_wvga_panel_data,
3023};
3024#endif /*CONFIG_FB_MSM_LCDC_AUO_WVGA*/
3025
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04003026#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
3027
3028#define GPIO_NT35582_RESET 94
3029#define GPIO_NT35582_BL_EN_HW_PIN 24
3030#define GPIO_NT35582_BL_EN \
3031 PM8058_GPIO_PM_TO_SYS(GPIO_NT35582_BL_EN_HW_PIN - 1)
3032
3033static int lcdc_nt35582_pmic_gpio[] = {GPIO_NT35582_BL_EN };
3034
3035static struct msm_panel_common_pdata lcdc_nt35582_panel_data = {
3036 .gpio_num = lcdc_nt35582_pmic_gpio,
3037};
3038
3039static struct platform_device lcdc_nt35582_panel_device = {
3040 .name = LCDC_NT35582_PANEL_NAME,
3041 .id = 0,
3042 .dev = {
3043 .platform_data = &lcdc_nt35582_panel_data,
3044 }
3045};
3046
3047static struct spi_board_info lcdc_nt35582_spi_board_info[] __initdata = {
3048 {
3049 .modalias = "lcdc_nt35582_spi",
3050 .mode = SPI_MODE_0,
3051 .bus_num = 0,
3052 .chip_select = 0,
3053 .max_speed_hz = 1100000,
3054 }
3055};
3056#endif
3057
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003058#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
3059static struct resource hdmi_msm_resources[] = {
3060 {
3061 .name = "hdmi_msm_qfprom_addr",
3062 .start = 0x00700000,
3063 .end = 0x007060FF,
3064 .flags = IORESOURCE_MEM,
3065 },
3066 {
3067 .name = "hdmi_msm_hdmi_addr",
3068 .start = 0x04A00000,
3069 .end = 0x04A00FFF,
3070 .flags = IORESOURCE_MEM,
3071 },
3072 {
3073 .name = "hdmi_msm_irq",
3074 .start = HDMI_IRQ,
3075 .end = HDMI_IRQ,
3076 .flags = IORESOURCE_IRQ,
3077 },
3078};
3079
3080static int hdmi_enable_5v(int on);
3081static int hdmi_core_power(int on, int show);
3082static int hdmi_cec_power(int on);
3083
3084static struct msm_hdmi_platform_data hdmi_msm_data = {
3085 .irq = HDMI_IRQ,
3086 .enable_5v = hdmi_enable_5v,
3087 .core_power = hdmi_core_power,
3088 .cec_power = hdmi_cec_power,
3089};
3090
3091static struct platform_device hdmi_msm_device = {
3092 .name = "hdmi_msm",
3093 .id = 0,
3094 .num_resources = ARRAY_SIZE(hdmi_msm_resources),
3095 .resource = hdmi_msm_resources,
3096 .dev.platform_data = &hdmi_msm_data,
3097};
3098#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
3099
3100#ifdef CONFIG_FB_MSM_MIPI_DSI
3101static struct platform_device mipi_dsi_toshiba_panel_device = {
3102 .name = "mipi_toshiba",
3103 .id = 0,
3104};
3105
3106#define FPGA_3D_GPIO_CONFIG_ADDR 0x1D00017A
3107
Nagamalleswararao Ganjieac5dfa2011-07-23 17:31:16 -07003108static struct mipi_dsi_panel_platform_data novatek_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003109 .fpga_3d_config_addr = FPGA_3D_GPIO_CONFIG_ADDR,
Chandan Uddaraju83eac3c2011-09-11 18:32:23 -07003110 .fpga_ctrl_mode = FPGA_EBI2_INTF,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003111};
3112
3113static struct platform_device mipi_dsi_novatek_panel_device = {
3114 .name = "mipi_novatek",
3115 .id = 0,
3116 .dev = {
3117 .platform_data = &novatek_pdata,
3118 }
3119};
3120#endif
3121
3122static void __init msm8x60_allocate_memory_regions(void)
3123{
3124 void *addr;
3125 unsigned long size;
3126
3127 size = MSM_FB_SIZE;
3128 addr = alloc_bootmem_align(size, 0x1000);
3129 msm_fb_resources[0].start = __pa(addr);
3130 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
3131 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
3132 size, addr, __pa(addr));
3133
3134}
3135
3136#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
3137 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
3138/*virtual key support */
3139static ssize_t tma300_vkeys_show(struct kobject *kobj,
3140 struct kobj_attribute *attr, char *buf)
3141{
3142 return sprintf(buf,
3143 __stringify(EV_KEY) ":" __stringify(KEY_BACK) ":60:900:90:120"
3144 ":" __stringify(EV_KEY) ":" __stringify(KEY_MENU) ":180:900:90:120"
3145 ":" __stringify(EV_KEY) ":" __stringify(KEY_HOME) ":300:900:90:120"
3146 ":" __stringify(EV_KEY) ":" __stringify(KEY_SEARCH) ":420:900:90:120"
3147 "\n");
3148}
3149
3150static struct kobj_attribute tma300_vkeys_attr = {
3151 .attr = {
3152 .mode = S_IRUGO,
3153 },
3154 .show = &tma300_vkeys_show,
3155};
3156
3157static struct attribute *tma300_properties_attrs[] = {
3158 &tma300_vkeys_attr.attr,
3159 NULL
3160};
3161
3162static struct attribute_group tma300_properties_attr_group = {
3163 .attrs = tma300_properties_attrs,
3164};
3165
3166static struct kobject *properties_kobj;
3167
3168
3169
3170#define CYTTSP_TS_GPIO_IRQ 61
3171static int cyttsp_platform_init(struct i2c_client *client)
3172{
3173 int rc = -EINVAL;
3174 struct regulator *pm8058_l5 = NULL, *pm8058_s3;
3175
3176 if (machine_is_msm8x60_fluid()) {
3177 pm8058_l5 = regulator_get(NULL, "8058_l5");
3178 if (IS_ERR(pm8058_l5)) {
3179 pr_err("%s: regulator get of 8058_l5 failed (%ld)\n",
3180 __func__, PTR_ERR(pm8058_l5));
3181 rc = PTR_ERR(pm8058_l5);
3182 return rc;
3183 }
3184 rc = regulator_set_voltage(pm8058_l5, 2850000, 2850000);
3185 if (rc) {
3186 pr_err("%s: regulator_set_voltage of 8058_l5 failed(%d)\n",
3187 __func__, rc);
3188 goto reg_l5_put;
3189 }
3190
3191 rc = regulator_enable(pm8058_l5);
3192 if (rc) {
3193 pr_err("%s: regulator_enable of 8058_l5 failed(%d)\n",
3194 __func__, rc);
3195 goto reg_l5_put;
3196 }
3197 }
3198 /* vote for s3 to enable i2c communication lines */
3199 pm8058_s3 = regulator_get(NULL, "8058_s3");
3200 if (IS_ERR(pm8058_s3)) {
3201 pr_err("%s: regulator get of 8058_s3 failed (%ld)\n",
3202 __func__, PTR_ERR(pm8058_s3));
3203 rc = PTR_ERR(pm8058_s3);
3204 goto reg_l5_disable;
3205 }
3206
3207 rc = regulator_set_voltage(pm8058_s3, 1800000, 1800000);
3208 if (rc) {
3209 pr_err("%s: regulator_set_voltage() = %d\n",
3210 __func__, rc);
3211 goto reg_s3_put;
3212 }
3213
3214 rc = regulator_enable(pm8058_s3);
3215 if (rc) {
3216 pr_err("%s: regulator_enable of 8058_l5 failed(%d)\n",
3217 __func__, rc);
3218 goto reg_s3_put;
3219 }
3220
3221 /* wait for vregs to stabilize */
3222 usleep_range(10000, 10000);
3223
3224 /* check this device active by reading first byte/register */
3225 rc = i2c_smbus_read_byte_data(client, 0x01);
3226 if (rc < 0) {
3227 pr_err("%s: i2c sanity check failed\n", __func__);
3228 goto reg_s3_disable;
3229 }
3230
3231 /* virtual keys */
3232 if (machine_is_msm8x60_fluid()) {
3233 tma300_vkeys_attr.attr.name = "virtualkeys.cyttsp-i2c";
3234 properties_kobj = kobject_create_and_add("board_properties",
3235 NULL);
3236 if (properties_kobj)
3237 rc = sysfs_create_group(properties_kobj,
3238 &tma300_properties_attr_group);
3239 if (!properties_kobj || rc)
3240 pr_err("%s: failed to create board_properties\n",
3241 __func__);
3242 }
3243 return CY_OK;
3244
3245reg_s3_disable:
3246 regulator_disable(pm8058_s3);
3247reg_s3_put:
3248 regulator_put(pm8058_s3);
3249reg_l5_disable:
3250 if (machine_is_msm8x60_fluid())
3251 regulator_disable(pm8058_l5);
3252reg_l5_put:
3253 if (machine_is_msm8x60_fluid())
3254 regulator_put(pm8058_l5);
3255 return rc;
3256}
3257
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303258/* TODO: Put the regulator to LPM / HPM in suspend/resume*/
3259static int cyttsp_platform_suspend(struct i2c_client *client)
3260{
3261 msleep(20);
3262
3263 return CY_OK;
3264}
3265
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003266static int cyttsp_platform_resume(struct i2c_client *client)
3267{
3268 /* add any special code to strobe a wakeup pin or chip reset */
3269 msleep(10);
3270
3271 return CY_OK;
3272}
3273
3274static struct cyttsp_platform_data cyttsp_fluid_pdata = {
3275 .flags = 0x04,
3276 .gen = CY_GEN3, /* or */
3277 .use_st = CY_USE_ST,
3278 .use_mt = CY_USE_MT,
3279 .use_hndshk = CY_SEND_HNDSHK,
3280 .use_trk_id = CY_USE_TRACKING_ID,
Anirudh Ghayal15187772011-06-22 17:39:41 +05303281 .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003282 .use_gestures = CY_USE_GESTURES,
3283 /* activate up to 4 groups
3284 * and set active distance
3285 */
3286 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
3287 CY_GEST_GRP3 | CY_GEST_GRP4 |
3288 CY_ACT_DIST,
3289 /* change act_intrvl to customize the Active power state
3290 * scanning/processing refresh interval for Operating mode
3291 */
3292 .act_intrvl = CY_ACT_INTRVL_DFLT,
3293 /* change tch_tmout to customize the touch timeout for the
3294 * Active power state for Operating mode
3295 */
3296 .tch_tmout = CY_TCH_TMOUT_DFLT,
3297 /* change lp_intrvl to customize the Low Power power state
3298 * scanning/processing refresh interval for Operating mode
3299 */
3300 .lp_intrvl = CY_LP_INTRVL_DFLT,
3301 .sleep_gpio = -1,
3302 .resout_gpio = -1,
3303 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
3304 .resume = cyttsp_platform_resume,
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303305 .suspend = cyttsp_platform_suspend,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003306 .init = cyttsp_platform_init,
3307};
3308
3309static struct cyttsp_platform_data cyttsp_tmg240_pdata = {
3310 .panel_maxx = 1083,
3311 .panel_maxy = 659,
3312 .disp_minx = 30,
3313 .disp_maxx = 1053,
3314 .disp_miny = 30,
3315 .disp_maxy = 629,
3316 .correct_fw_ver = 8,
3317 .fw_fname = "cyttsp_8660_ffa.hex",
3318 .flags = 0x00,
3319 .gen = CY_GEN2, /* or */
3320 .use_st = CY_USE_ST,
3321 .use_mt = CY_USE_MT,
3322 .use_hndshk = CY_SEND_HNDSHK,
3323 .use_trk_id = CY_USE_TRACKING_ID,
Anirudh Ghayal15187772011-06-22 17:39:41 +05303324 .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003325 .use_gestures = CY_USE_GESTURES,
3326 /* activate up to 4 groups
3327 * and set active distance
3328 */
3329 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
3330 CY_GEST_GRP3 | CY_GEST_GRP4 |
3331 CY_ACT_DIST,
3332 /* change act_intrvl to customize the Active power state
3333 * scanning/processing refresh interval for Operating mode
3334 */
3335 .act_intrvl = CY_ACT_INTRVL_DFLT,
3336 /* change tch_tmout to customize the touch timeout for the
3337 * Active power state for Operating mode
3338 */
3339 .tch_tmout = CY_TCH_TMOUT_DFLT,
3340 /* change lp_intrvl to customize the Low Power power state
3341 * scanning/processing refresh interval for Operating mode
3342 */
3343 .lp_intrvl = CY_LP_INTRVL_DFLT,
3344 .sleep_gpio = -1,
3345 .resout_gpio = -1,
3346 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
3347 .resume = cyttsp_platform_resume,
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303348 .suspend = cyttsp_platform_suspend,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003349 .init = cyttsp_platform_init,
Mohan Pallaka1ea7d8a2011-08-18 15:06:00 +05303350 .disable_ghost_det = true,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003351};
3352static void cyttsp_set_params(void)
3353{
3354 if (SOCINFO_VERSION_MAJOR(socinfo_get_platform_version()) < 3) {
3355 cyttsp_fluid_pdata.fw_fname = "cyttsp_8660_fluid_p2.hex";
3356 cyttsp_fluid_pdata.panel_maxx = 539;
3357 cyttsp_fluid_pdata.panel_maxy = 994;
3358 cyttsp_fluid_pdata.disp_minx = 30;
3359 cyttsp_fluid_pdata.disp_maxx = 509;
3360 cyttsp_fluid_pdata.disp_miny = 60;
3361 cyttsp_fluid_pdata.disp_maxy = 859;
3362 cyttsp_fluid_pdata.correct_fw_ver = 4;
3363 } else {
3364 cyttsp_fluid_pdata.fw_fname = "cyttsp_8660_fluid_p3.hex";
3365 cyttsp_fluid_pdata.panel_maxx = 550;
3366 cyttsp_fluid_pdata.panel_maxy = 1013;
3367 cyttsp_fluid_pdata.disp_minx = 35;
3368 cyttsp_fluid_pdata.disp_maxx = 515;
3369 cyttsp_fluid_pdata.disp_miny = 69;
3370 cyttsp_fluid_pdata.disp_maxy = 869;
3371 cyttsp_fluid_pdata.correct_fw_ver = 5;
3372 }
3373
3374}
3375
3376static struct i2c_board_info cyttsp_fluid_info[] __initdata = {
3377 {
3378 I2C_BOARD_INFO(CY_I2C_NAME, 0x24),
3379 .platform_data = &cyttsp_fluid_pdata,
3380#ifndef CY_USE_TIMER
3381 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
3382#endif /* CY_USE_TIMER */
3383 },
3384};
3385
3386static struct i2c_board_info cyttsp_ffa_info[] __initdata = {
3387 {
3388 I2C_BOARD_INFO(CY_I2C_NAME, 0x3b),
3389 .platform_data = &cyttsp_tmg240_pdata,
3390#ifndef CY_USE_TIMER
3391 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
3392#endif /* CY_USE_TIMER */
3393 },
3394};
3395#endif
3396
3397static struct regulator *vreg_tmg200;
3398
3399#define TS_PEN_IRQ_GPIO 61
3400static int tmg200_power(int vreg_on)
3401{
3402 int rc = -EINVAL;
3403
3404 if (!vreg_tmg200) {
3405 printk(KERN_ERR "%s: regulator 8058_s3 not found (%d)\n",
3406 __func__, rc);
3407 return rc;
3408 }
3409
3410 rc = vreg_on ? regulator_enable(vreg_tmg200) :
3411 regulator_disable(vreg_tmg200);
3412 if (rc < 0)
3413 printk(KERN_ERR "%s: vreg 8058_s3 %s failed (%d)\n",
3414 __func__, vreg_on ? "enable" : "disable", rc);
3415
3416 /* wait for vregs to stabilize */
Amy Maloche12b5d4e2011-08-03 15:42:28 -07003417 msleep(20);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003418
3419 return rc;
3420}
3421
3422static int tmg200_dev_setup(bool enable)
3423{
3424 int rc;
3425
3426 if (enable) {
3427 vreg_tmg200 = regulator_get(NULL, "8058_s3");
3428 if (IS_ERR(vreg_tmg200)) {
3429 pr_err("%s: regulator get of 8058_s3 failed (%ld)\n",
3430 __func__, PTR_ERR(vreg_tmg200));
3431 rc = PTR_ERR(vreg_tmg200);
3432 return rc;
3433 }
3434
3435 rc = regulator_set_voltage(vreg_tmg200, 1800000, 1800000);
3436 if (rc) {
3437 pr_err("%s: regulator_set_voltage() = %d\n",
3438 __func__, rc);
3439 goto reg_put;
3440 }
3441 } else {
3442 /* put voltage sources */
3443 regulator_put(vreg_tmg200);
3444 }
3445 return 0;
3446reg_put:
3447 regulator_put(vreg_tmg200);
3448 return rc;
3449}
3450
3451static struct cy8c_ts_platform_data cy8ctmg200_pdata = {
3452 .ts_name = "msm_tmg200_ts",
3453 .dis_min_x = 0,
3454 .dis_max_x = 1023,
3455 .dis_min_y = 0,
3456 .dis_max_y = 599,
3457 .min_tid = 0,
3458 .max_tid = 255,
3459 .min_touch = 0,
3460 .max_touch = 255,
3461 .min_width = 0,
3462 .max_width = 255,
3463 .power_on = tmg200_power,
3464 .dev_setup = tmg200_dev_setup,
3465 .nfingers = 2,
3466 .irq_gpio = TS_PEN_IRQ_GPIO,
3467 .resout_gpio = GPIO_CAP_TS_RESOUT_N,
3468};
3469
3470static struct i2c_board_info cy8ctmg200_board_info[] = {
3471 {
3472 I2C_BOARD_INFO("cy8ctmg200", 0x2),
3473 .platform_data = &cy8ctmg200_pdata,
3474 }
3475};
3476
Zhang Chang Ken211df572011-07-05 19:16:39 -04003477static struct regulator *vreg_tma340;
3478
3479static int tma340_power(int vreg_on)
3480{
3481 int rc = -EINVAL;
3482
3483 if (!vreg_tma340) {
3484 pr_err("%s: regulator 8901_l2 not found (%d)\n",
3485 __func__, rc);
3486 return rc;
3487 }
3488
3489 rc = vreg_on ? regulator_enable(vreg_tma340) :
3490 regulator_disable(vreg_tma340);
3491 if (rc < 0)
3492 pr_err("%s: vreg 8901_l2 %s failed (%d)\n",
3493 __func__, vreg_on ? "enable" : "disable", rc);
3494
3495 /* wait for vregs to stabilize */
Amy Malocheb5c67e8d2011-08-18 16:39:35 -07003496 msleep(100);
Zhang Chang Ken211df572011-07-05 19:16:39 -04003497
3498 return rc;
3499}
3500
3501static struct kobject *tma340_prop_kobj;
3502
3503static int tma340_dragon_dev_setup(bool enable)
3504{
3505 int rc;
3506
3507 if (enable) {
3508 vreg_tma340 = regulator_get(NULL, "8901_l2");
3509 if (IS_ERR(vreg_tma340)) {
3510 pr_err("%s: regulator get of 8901_l2 failed (%ld)\n",
3511 __func__, PTR_ERR(vreg_tma340));
3512 rc = PTR_ERR(vreg_tma340);
3513 return rc;
3514 }
3515
3516 rc = regulator_set_voltage(vreg_tma340, 3300000, 3300000);
3517 if (rc) {
3518 pr_err("%s: regulator_set_voltage() = %d\n",
3519 __func__, rc);
3520 goto reg_put;
3521 }
3522 tma300_vkeys_attr.attr.name = "virtualkeys.cy8ctma340";
3523 tma340_prop_kobj = kobject_create_and_add("board_properties",
3524 NULL);
3525 if (tma340_prop_kobj) {
3526 rc = sysfs_create_group(tma340_prop_kobj,
3527 &tma300_properties_attr_group);
3528 if (rc) {
3529 kobject_put(tma340_prop_kobj);
3530 pr_err("%s: failed to create board_properties\n",
3531 __func__);
3532 goto reg_put;
3533 }
3534 }
3535
3536 } else {
3537 /* put voltage sources */
3538 regulator_put(vreg_tma340);
3539 /* destroy virtual keys */
3540 if (tma340_prop_kobj) {
3541 sysfs_remove_group(tma340_prop_kobj,
3542 &tma300_properties_attr_group);
3543 kobject_put(tma340_prop_kobj);
3544 }
3545 }
3546 return 0;
3547reg_put:
3548 regulator_put(vreg_tma340);
3549 return rc;
3550}
3551
3552
3553static struct cy8c_ts_platform_data cy8ctma340_dragon_pdata = {
3554 .ts_name = "cy8ctma340",
3555 .dis_min_x = 0,
3556 .dis_max_x = 479,
3557 .dis_min_y = 0,
3558 .dis_max_y = 799,
3559 .min_tid = 0,
3560 .max_tid = 255,
3561 .min_touch = 0,
3562 .max_touch = 255,
3563 .min_width = 0,
3564 .max_width = 255,
3565 .power_on = tma340_power,
3566 .dev_setup = tma340_dragon_dev_setup,
3567 .nfingers = 2,
3568 .irq_gpio = TS_PEN_IRQ_GPIO,
3569 .resout_gpio = -1,
3570};
3571
3572static struct i2c_board_info cy8ctma340_dragon_board_info[] = {
3573 {
3574 I2C_BOARD_INFO("cy8ctma340", 0x24),
3575 .platform_data = &cy8ctma340_dragon_pdata,
3576 }
3577};
3578
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003579#ifdef CONFIG_SERIAL_MSM_HS
3580static int configure_uart_gpios(int on)
3581{
3582 int ret = 0, i;
3583 int uart_gpios[] = {53, 54, 55, 56};
3584 for (i = 0; i < ARRAY_SIZE(uart_gpios); i++) {
3585 if (on) {
3586 ret = msm_gpiomux_get(uart_gpios[i]);
3587 if (unlikely(ret))
3588 break;
3589 } else {
3590 ret = msm_gpiomux_put(uart_gpios[i]);
3591 if (unlikely(ret))
3592 return ret;
3593 }
3594 }
3595 if (ret)
3596 for (; i >= 0; i--)
3597 msm_gpiomux_put(uart_gpios[i]);
3598 return ret;
3599}
3600static struct msm_serial_hs_platform_data msm_uart_dm1_pdata = {
3601 .inject_rx_on_wakeup = 1,
3602 .rx_to_inject = 0xFD,
3603 .gpio_config = configure_uart_gpios,
3604};
3605#endif
3606
3607
3608#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
3609
3610static struct gpio_led gpio_exp_leds_config[] = {
3611 {
3612 .name = "left_led1:green",
3613 .gpio = GPIO_LEFT_LED_1,
3614 .active_low = 1,
3615 .retain_state_suspended = 0,
3616 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3617 },
3618 {
3619 .name = "left_led2:red",
3620 .gpio = GPIO_LEFT_LED_2,
3621 .active_low = 1,
3622 .retain_state_suspended = 0,
3623 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3624 },
3625 {
3626 .name = "left_led3:green",
3627 .gpio = GPIO_LEFT_LED_3,
3628 .active_low = 1,
3629 .retain_state_suspended = 0,
3630 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3631 },
3632 {
3633 .name = "wlan_led:orange",
3634 .gpio = GPIO_LEFT_LED_WLAN,
3635 .active_low = 1,
3636 .retain_state_suspended = 0,
3637 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3638 },
3639 {
3640 .name = "left_led5:green",
3641 .gpio = GPIO_LEFT_LED_5,
3642 .active_low = 1,
3643 .retain_state_suspended = 0,
3644 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3645 },
3646 {
3647 .name = "right_led1:green",
3648 .gpio = GPIO_RIGHT_LED_1,
3649 .active_low = 1,
3650 .retain_state_suspended = 0,
3651 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3652 },
3653 {
3654 .name = "right_led2:red",
3655 .gpio = GPIO_RIGHT_LED_2,
3656 .active_low = 1,
3657 .retain_state_suspended = 0,
3658 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3659 },
3660 {
3661 .name = "right_led3:green",
3662 .gpio = GPIO_RIGHT_LED_3,
3663 .active_low = 1,
3664 .retain_state_suspended = 0,
3665 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3666 },
3667 {
3668 .name = "bt_led:blue",
3669 .gpio = GPIO_RIGHT_LED_BT,
3670 .active_low = 1,
3671 .retain_state_suspended = 0,
3672 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3673 },
3674 {
3675 .name = "right_led5:green",
3676 .gpio = GPIO_RIGHT_LED_5,
3677 .active_low = 1,
3678 .retain_state_suspended = 0,
3679 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3680 },
3681};
3682
3683static struct gpio_led_platform_data gpio_leds_pdata = {
3684 .num_leds = ARRAY_SIZE(gpio_exp_leds_config),
3685 .leds = gpio_exp_leds_config,
3686};
3687
3688static struct platform_device gpio_leds = {
3689 .name = "leds-gpio",
3690 .id = -1,
3691 .dev = {
3692 .platform_data = &gpio_leds_pdata,
3693 },
3694};
3695
3696static struct gpio_led fluid_gpio_leds[] = {
3697 {
3698 .name = "dual_led:green",
3699 .gpio = GPIO_LED1_GREEN_N,
3700 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3701 .active_low = 1,
3702 .retain_state_suspended = 0,
3703 },
3704 {
3705 .name = "dual_led:red",
3706 .gpio = GPIO_LED2_RED_N,
3707 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3708 .active_low = 1,
3709 .retain_state_suspended = 0,
3710 },
3711};
3712
3713static struct gpio_led_platform_data gpio_led_pdata = {
3714 .leds = fluid_gpio_leds,
3715 .num_leds = ARRAY_SIZE(fluid_gpio_leds),
3716};
3717
3718static struct platform_device fluid_leds_gpio = {
3719 .name = "leds-gpio",
3720 .id = -1,
3721 .dev = {
3722 .platform_data = &gpio_led_pdata,
3723 },
3724};
3725
3726#endif
3727
3728#if defined(CONFIG_MSM_RPM_LOG) || defined(CONFIG_MSM_RPM_LOG_MODULE)
3729
3730static struct msm_rpm_log_platform_data msm_rpm_log_pdata = {
3731 .phys_addr_base = 0x00106000,
3732 .reg_offsets = {
3733 [MSM_RPM_LOG_PAGE_INDICES] = 0x00000C80,
3734 [MSM_RPM_LOG_PAGE_BUFFER] = 0x00000CA0,
3735 },
3736 .phys_size = SZ_8K,
3737 .log_len = 4096, /* log's buffer length in bytes */
3738 .log_len_mask = (4096 >> 2) - 1, /* length mask in units of u32 */
3739};
3740
3741static struct platform_device msm_rpm_log_device = {
3742 .name = "msm_rpm_log",
3743 .id = -1,
3744 .dev = {
3745 .platform_data = &msm_rpm_log_pdata,
3746 },
3747};
3748#endif
3749
3750#ifdef CONFIG_BATTERY_MSM8X60
3751static struct msm_charger_platform_data msm_charger_data = {
3752 .safety_time = 180,
3753 .update_time = 1,
3754 .max_voltage = 4200,
3755 .min_voltage = 3200,
3756};
3757
3758static struct platform_device msm_charger_device = {
3759 .name = "msm-charger",
3760 .id = -1,
3761 .dev = {
3762 .platform_data = &msm_charger_data,
3763 }
3764};
3765#endif
3766
3767/*
3768 * Consumer specific regulator names:
3769 * regulator name consumer dev_name
3770 */
3771static struct regulator_consumer_supply vreg_consumers_PM8058_L0[] = {
3772 REGULATOR_SUPPLY("8058_l0", NULL),
3773};
3774static struct regulator_consumer_supply vreg_consumers_PM8058_L1[] = {
3775 REGULATOR_SUPPLY("8058_l1", NULL),
3776};
3777static struct regulator_consumer_supply vreg_consumers_PM8058_L2[] = {
3778 REGULATOR_SUPPLY("8058_l2", NULL),
3779};
3780static struct regulator_consumer_supply vreg_consumers_PM8058_L3[] = {
3781 REGULATOR_SUPPLY("8058_l3", NULL),
3782};
3783static struct regulator_consumer_supply vreg_consumers_PM8058_L4[] = {
3784 REGULATOR_SUPPLY("8058_l4", NULL),
3785};
3786static struct regulator_consumer_supply vreg_consumers_PM8058_L5[] = {
3787 REGULATOR_SUPPLY("8058_l5", NULL),
3788};
3789static struct regulator_consumer_supply vreg_consumers_PM8058_L6[] = {
3790 REGULATOR_SUPPLY("8058_l6", NULL),
3791};
3792static struct regulator_consumer_supply vreg_consumers_PM8058_L7[] = {
3793 REGULATOR_SUPPLY("8058_l7", NULL),
3794};
3795static struct regulator_consumer_supply vreg_consumers_PM8058_L8[] = {
3796 REGULATOR_SUPPLY("8058_l8", NULL),
3797};
3798static struct regulator_consumer_supply vreg_consumers_PM8058_L9[] = {
3799 REGULATOR_SUPPLY("8058_l9", NULL),
3800};
3801static struct regulator_consumer_supply vreg_consumers_PM8058_L10[] = {
3802 REGULATOR_SUPPLY("8058_l10", NULL),
3803};
3804static struct regulator_consumer_supply vreg_consumers_PM8058_L11[] = {
3805 REGULATOR_SUPPLY("8058_l11", NULL),
3806};
3807static struct regulator_consumer_supply vreg_consumers_PM8058_L12[] = {
3808 REGULATOR_SUPPLY("8058_l12", NULL),
3809};
3810static struct regulator_consumer_supply vreg_consumers_PM8058_L13[] = {
3811 REGULATOR_SUPPLY("8058_l13", NULL),
3812};
3813static struct regulator_consumer_supply vreg_consumers_PM8058_L14[] = {
3814 REGULATOR_SUPPLY("8058_l14", NULL),
3815};
3816static struct regulator_consumer_supply vreg_consumers_PM8058_L15[] = {
3817 REGULATOR_SUPPLY("8058_l15", NULL),
3818};
3819static struct regulator_consumer_supply vreg_consumers_PM8058_L16[] = {
3820 REGULATOR_SUPPLY("8058_l16", NULL),
3821};
3822static struct regulator_consumer_supply vreg_consumers_PM8058_L17[] = {
3823 REGULATOR_SUPPLY("8058_l17", NULL),
3824};
3825static struct regulator_consumer_supply vreg_consumers_PM8058_L18[] = {
3826 REGULATOR_SUPPLY("8058_l18", NULL),
3827};
3828static struct regulator_consumer_supply vreg_consumers_PM8058_L19[] = {
3829 REGULATOR_SUPPLY("8058_l19", NULL),
3830};
3831static struct regulator_consumer_supply vreg_consumers_PM8058_L20[] = {
3832 REGULATOR_SUPPLY("8058_l20", NULL),
3833};
3834static struct regulator_consumer_supply vreg_consumers_PM8058_L21[] = {
3835 REGULATOR_SUPPLY("8058_l21", NULL),
3836};
3837static struct regulator_consumer_supply vreg_consumers_PM8058_L22[] = {
3838 REGULATOR_SUPPLY("8058_l22", NULL),
3839};
3840static struct regulator_consumer_supply vreg_consumers_PM8058_L23[] = {
3841 REGULATOR_SUPPLY("8058_l23", NULL),
3842};
3843static struct regulator_consumer_supply vreg_consumers_PM8058_L24[] = {
3844 REGULATOR_SUPPLY("8058_l24", NULL),
3845};
3846static struct regulator_consumer_supply vreg_consumers_PM8058_L25[] = {
3847 REGULATOR_SUPPLY("8058_l25", NULL),
3848};
3849static struct regulator_consumer_supply vreg_consumers_PM8058_S0[] = {
3850 REGULATOR_SUPPLY("8058_s0", NULL),
3851};
3852static struct regulator_consumer_supply vreg_consumers_PM8058_S1[] = {
3853 REGULATOR_SUPPLY("8058_s1", NULL),
3854};
3855static struct regulator_consumer_supply vreg_consumers_PM8058_S2[] = {
3856 REGULATOR_SUPPLY("8058_s2", NULL),
3857};
3858static struct regulator_consumer_supply vreg_consumers_PM8058_S3[] = {
3859 REGULATOR_SUPPLY("8058_s3", NULL),
3860};
3861static struct regulator_consumer_supply vreg_consumers_PM8058_S4[] = {
3862 REGULATOR_SUPPLY("8058_s4", NULL),
3863};
3864static struct regulator_consumer_supply vreg_consumers_PM8058_LVS0[] = {
3865 REGULATOR_SUPPLY("8058_lvs0", NULL),
3866};
3867static struct regulator_consumer_supply vreg_consumers_PM8058_LVS1[] = {
3868 REGULATOR_SUPPLY("8058_lvs1", NULL),
3869};
3870static struct regulator_consumer_supply vreg_consumers_PM8058_NCP[] = {
3871 REGULATOR_SUPPLY("8058_ncp", NULL),
3872};
3873
3874static struct regulator_consumer_supply vreg_consumers_PM8901_L0[] = {
3875 REGULATOR_SUPPLY("8901_l0", NULL),
3876};
3877static struct regulator_consumer_supply vreg_consumers_PM8901_L1[] = {
3878 REGULATOR_SUPPLY("8901_l1", NULL),
3879};
3880static struct regulator_consumer_supply vreg_consumers_PM8901_L2[] = {
3881 REGULATOR_SUPPLY("8901_l2", NULL),
3882};
3883static struct regulator_consumer_supply vreg_consumers_PM8901_L3[] = {
3884 REGULATOR_SUPPLY("8901_l3", NULL),
3885};
3886static struct regulator_consumer_supply vreg_consumers_PM8901_L4[] = {
3887 REGULATOR_SUPPLY("8901_l4", NULL),
3888};
3889static struct regulator_consumer_supply vreg_consumers_PM8901_L5[] = {
3890 REGULATOR_SUPPLY("8901_l5", NULL),
3891};
3892static struct regulator_consumer_supply vreg_consumers_PM8901_L6[] = {
3893 REGULATOR_SUPPLY("8901_l6", NULL),
3894};
3895static struct regulator_consumer_supply vreg_consumers_PM8901_S2[] = {
3896 REGULATOR_SUPPLY("8901_s2", NULL),
3897};
3898static struct regulator_consumer_supply vreg_consumers_PM8901_S3[] = {
3899 REGULATOR_SUPPLY("8901_s3", NULL),
3900};
3901static struct regulator_consumer_supply vreg_consumers_PM8901_S4[] = {
3902 REGULATOR_SUPPLY("8901_s4", NULL),
3903};
3904static struct regulator_consumer_supply vreg_consumers_PM8901_LVS0[] = {
3905 REGULATOR_SUPPLY("8901_lvs0", NULL),
3906};
3907static struct regulator_consumer_supply vreg_consumers_PM8901_LVS1[] = {
3908 REGULATOR_SUPPLY("8901_lvs1", NULL),
3909};
3910static struct regulator_consumer_supply vreg_consumers_PM8901_LVS2[] = {
3911 REGULATOR_SUPPLY("8901_lvs2", NULL),
3912};
3913static struct regulator_consumer_supply vreg_consumers_PM8901_LVS3[] = {
3914 REGULATOR_SUPPLY("8901_lvs3", NULL),
3915};
3916static struct regulator_consumer_supply vreg_consumers_PM8901_MVS0[] = {
3917 REGULATOR_SUPPLY("8901_mvs0", NULL),
3918};
3919
David Collins6f032ba2011-08-31 14:08:15 -07003920/* Pin control regulators */
3921static struct regulator_consumer_supply vreg_consumers_PM8058_L8_PC[] = {
3922 REGULATOR_SUPPLY("8058_l8_pc", NULL),
3923};
3924static struct regulator_consumer_supply vreg_consumers_PM8058_L20_PC[] = {
3925 REGULATOR_SUPPLY("8058_l20_pc", NULL),
3926};
3927static struct regulator_consumer_supply vreg_consumers_PM8058_L21_PC[] = {
3928 REGULATOR_SUPPLY("8058_l21_pc", NULL),
3929};
3930static struct regulator_consumer_supply vreg_consumers_PM8058_S2_PC[] = {
3931 REGULATOR_SUPPLY("8058_s2_pc", NULL),
3932};
3933static struct regulator_consumer_supply vreg_consumers_PM8901_L0_PC[] = {
3934 REGULATOR_SUPPLY("8901_l0_pc", NULL),
3935};
3936static struct regulator_consumer_supply vreg_consumers_PM8901_S4_PC[] = {
3937 REGULATOR_SUPPLY("8901_s4_pc", NULL),
3938};
3939
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003940#define RPM_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
3941 _default_uV, _peak_uA, _avg_uA, _pull_down, _pin_ctrl, \
David Collins6f032ba2011-08-31 14:08:15 -07003942 _freq, _pin_fn, _force_mode, _state, _sleep_selectable, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003943 _always_on) \
David Collins6f032ba2011-08-31 14:08:15 -07003944 { \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003945 .init_data = { \
3946 .constraints = { \
David Collins6f032ba2011-08-31 14:08:15 -07003947 .valid_modes_mask = _modes, \
3948 .valid_ops_mask = _ops, \
3949 .min_uV = _min_uV, \
3950 .max_uV = _max_uV, \
3951 .input_uV = _min_uV, \
3952 .apply_uV = _apply_uV, \
3953 .always_on = _always_on, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003954 }, \
David Collins6f032ba2011-08-31 14:08:15 -07003955 .consumer_supplies = vreg_consumers_##_id, \
3956 .num_consumer_supplies = \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003957 ARRAY_SIZE(vreg_consumers_##_id), \
3958 }, \
David Collins6f032ba2011-08-31 14:08:15 -07003959 .id = RPM_VREG_ID_##_id, \
3960 .default_uV = _default_uV, \
3961 .peak_uA = _peak_uA, \
3962 .avg_uA = _avg_uA, \
3963 .pull_down_enable = _pull_down, \
3964 .pin_ctrl = _pin_ctrl, \
3965 .freq = RPM_VREG_FREQ_##_freq, \
3966 .pin_fn = _pin_fn, \
3967 .force_mode = _force_mode, \
3968 .state = _state, \
3969 .sleep_selectable = _sleep_selectable, \
3970 }
3971
3972/* Pin control initialization */
3973#define RPM_PC(_id, _always_on, _pin_fn, _pin_ctrl) \
3974 { \
3975 .init_data = { \
3976 .constraints = { \
3977 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
3978 .always_on = _always_on, \
3979 }, \
3980 .num_consumer_supplies = \
3981 ARRAY_SIZE(vreg_consumers_##_id##_PC), \
3982 .consumer_supplies = vreg_consumers_##_id##_PC, \
3983 }, \
3984 .id = RPM_VREG_ID_##_id##_PC, \
3985 .pin_fn = RPM_VREG_PIN_FN_8660_##_pin_fn, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003986 .pin_ctrl = _pin_ctrl, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003987 }
3988
3989/*
3990 * The default LPM/HPM state of an RPM controlled regulator can be controlled
3991 * via the peak_uA value specified in the table below. If the value is less
3992 * than the high power min threshold for the regulator, then the regulator will
3993 * be set to LPM. Otherwise, it will be set to HPM.
3994 *
3995 * This value can be further overridden by specifying an initial mode via
3996 * .init_data.constraints.initial_mode.
3997 */
3998
David Collins6f032ba2011-08-31 14:08:15 -07003999#define RPM_LDO(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
4000 _init_peak_uA) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004001 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_FAST | \
4002 REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE | \
4003 REGULATOR_MODE_STANDBY, REGULATOR_CHANGE_VOLTAGE | \
4004 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
4005 REGULATOR_CHANGE_DRMS, 0, _min_uV, _init_peak_uA, \
David Collins6f032ba2011-08-31 14:08:15 -07004006 _init_peak_uA, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4007 RPM_VREG_PIN_FN_8660_ENABLE, \
4008 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004009 _sleep_selectable, _always_on)
4010
David Collins6f032ba2011-08-31 14:08:15 -07004011#define RPM_SMPS(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
4012 _init_peak_uA, _freq) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004013 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_FAST | \
4014 REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE | \
4015 REGULATOR_MODE_STANDBY, REGULATOR_CHANGE_VOLTAGE | \
4016 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
4017 REGULATOR_CHANGE_DRMS, 0, _min_uV, _init_peak_uA, \
David Collins6f032ba2011-08-31 14:08:15 -07004018 _init_peak_uA, _pd, RPM_VREG_PIN_CTRL_NONE, _freq, \
4019 RPM_VREG_PIN_FN_8660_ENABLE, \
4020 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4021 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004022
David Collins6f032ba2011-08-31 14:08:15 -07004023#define RPM_VS(_id, _always_on, _pd, _sleep_selectable) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004024 RPM_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE, \
4025 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE, 0, 0, \
David Collins6f032ba2011-08-31 14:08:15 -07004026 1000, 1000, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4027 RPM_VREG_PIN_FN_8660_ENABLE, \
4028 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4029 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004030
David Collins6f032ba2011-08-31 14:08:15 -07004031#define RPM_NCP(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004032 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_NORMAL, \
4033 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, 0, \
David Collins6f032ba2011-08-31 14:08:15 -07004034 _min_uV, 1000, 1000, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4035 RPM_VREG_PIN_FN_8660_ENABLE, \
4036 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4037 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004038
David Collins6f032ba2011-08-31 14:08:15 -07004039#define LDO50HMIN RPM_VREG_8660_LDO_50_HPM_MIN_LOAD
4040#define LDO150HMIN RPM_VREG_8660_LDO_150_HPM_MIN_LOAD
4041#define LDO300HMIN RPM_VREG_8660_LDO_300_HPM_MIN_LOAD
4042#define SMPS_HMIN RPM_VREG_8660_SMPS_HPM_MIN_LOAD
4043#define FTS_HMIN RPM_VREG_8660_FTSMPS_HPM_MIN_LOAD
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004044
David Collins6f032ba2011-08-31 14:08:15 -07004045/* RPM early regulator constraints */
4046static struct rpm_regulator_init_data rpm_regulator_early_init_data[] = {
4047 /* ID a_on pd ss min_uV max_uV init_ip freq */
4048 RPM_SMPS(PM8058_S0, 0, 1, 1, 500000, 1250000, SMPS_HMIN, 1p60),
4049 RPM_SMPS(PM8058_S1, 0, 1, 1, 500000, 1250000, SMPS_HMIN, 1p60),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004050};
4051
David Collins6f032ba2011-08-31 14:08:15 -07004052/* RPM regulator constraints */
4053static struct rpm_regulator_init_data rpm_regulator_init_data[] = {
4054 /* ID a_on pd ss min_uV max_uV init_ip */
4055 RPM_LDO(PM8058_L0, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
4056 RPM_LDO(PM8058_L1, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4057 RPM_LDO(PM8058_L2, 0, 1, 0, 1800000, 2600000, LDO300HMIN),
4058 RPM_LDO(PM8058_L3, 0, 1, 0, 1800000, 1800000, LDO150HMIN),
4059 RPM_LDO(PM8058_L4, 0, 1, 0, 2850000, 2850000, LDO50HMIN),
4060 RPM_LDO(PM8058_L5, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4061 RPM_LDO(PM8058_L6, 0, 1, 0, 3000000, 3600000, LDO50HMIN),
4062 RPM_LDO(PM8058_L7, 0, 1, 0, 1800000, 1800000, LDO50HMIN),
4063 RPM_LDO(PM8058_L8, 0, 1, 0, 2900000, 3050000, LDO300HMIN),
4064 RPM_LDO(PM8058_L9, 0, 1, 0, 1800000, 1800000, LDO300HMIN),
4065 RPM_LDO(PM8058_L10, 0, 1, 0, 2600000, 2600000, LDO300HMIN),
4066 RPM_LDO(PM8058_L11, 0, 1, 0, 1500000, 1500000, LDO150HMIN),
4067 RPM_LDO(PM8058_L12, 0, 1, 0, 2900000, 2900000, LDO150HMIN),
4068 RPM_LDO(PM8058_L13, 0, 1, 0, 2050000, 2050000, LDO300HMIN),
4069 RPM_LDO(PM8058_L14, 0, 0, 0, 2850000, 2850000, LDO300HMIN),
4070 RPM_LDO(PM8058_L15, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4071 RPM_LDO(PM8058_L16, 1, 1, 0, 1800000, 1800000, LDO300HMIN),
4072 RPM_LDO(PM8058_L17, 0, 1, 0, 2600000, 2600000, LDO150HMIN),
4073 RPM_LDO(PM8058_L18, 0, 1, 0, 2200000, 2200000, LDO150HMIN),
4074 RPM_LDO(PM8058_L19, 0, 1, 0, 2500000, 2500000, LDO150HMIN),
4075 RPM_LDO(PM8058_L20, 0, 1, 0, 1800000, 1800000, LDO150HMIN),
4076 RPM_LDO(PM8058_L21, 1, 1, 0, 1200000, 1200000, LDO150HMIN),
4077 RPM_LDO(PM8058_L22, 0, 1, 0, 1150000, 1150000, LDO300HMIN),
4078 RPM_LDO(PM8058_L23, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4079 RPM_LDO(PM8058_L24, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
4080 RPM_LDO(PM8058_L25, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004081
David Collins6f032ba2011-08-31 14:08:15 -07004082 /* ID a_on pd ss min_uV max_uV init_ip freq */
4083 RPM_SMPS(PM8058_S2, 0, 1, 1, 1200000, 1400000, SMPS_HMIN, 1p60),
4084 RPM_SMPS(PM8058_S3, 1, 1, 0, 1800000, 1800000, SMPS_HMIN, 1p60),
4085 RPM_SMPS(PM8058_S4, 1, 1, 0, 2200000, 2200000, SMPS_HMIN, 1p60),
4086
4087 /* ID a_on pd ss */
4088 RPM_VS(PM8058_LVS0, 0, 1, 0),
4089 RPM_VS(PM8058_LVS1, 0, 1, 0),
4090
4091 /* ID a_on pd ss min_uV max_uV */
4092 RPM_NCP(PM8058_NCP, 0, 1, 0, 1800000, 1800000),
4093
4094 /* ID a_on pd ss min_uV max_uV init_ip */
4095 RPM_LDO(PM8901_L0, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4096 RPM_LDO(PM8901_L1, 0, 1, 0, 3300000, 3300000, LDO300HMIN),
4097 RPM_LDO(PM8901_L2, 0, 1, 0, 2850000, 3300000, LDO300HMIN),
4098 RPM_LDO(PM8901_L3, 0, 1, 0, 3300000, 3300000, LDO300HMIN),
4099 RPM_LDO(PM8901_L4, 0, 1, 0, 2600000, 2600000, LDO300HMIN),
4100 RPM_LDO(PM8901_L5, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4101 RPM_LDO(PM8901_L6, 0, 1, 0, 2200000, 2200000, LDO300HMIN),
4102
4103 /* ID a_on pd ss min_uV max_uV init_ip freq */
4104 RPM_SMPS(PM8901_S2, 0, 1, 0, 1300000, 1300000, FTS_HMIN, 1p60),
4105 RPM_SMPS(PM8901_S3, 0, 1, 0, 1100000, 1100000, FTS_HMIN, 1p60),
4106 RPM_SMPS(PM8901_S4, 0, 1, 0, 1225000, 1225000, FTS_HMIN, 1p60),
4107
4108 /* ID a_on pd ss */
4109 RPM_VS(PM8901_LVS0, 1, 1, 0),
4110 RPM_VS(PM8901_LVS1, 0, 1, 0),
4111 RPM_VS(PM8901_LVS2, 0, 1, 0),
4112 RPM_VS(PM8901_LVS3, 0, 1, 0),
4113 RPM_VS(PM8901_MVS0, 0, 1, 0),
4114
4115 /* ID a_on pin_func pin_ctrl */
4116 RPM_PC(PM8058_L8, 0, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4117 RPM_PC(PM8058_L20, 0, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4118 RPM_PC(PM8058_L21, 1, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4119 RPM_PC(PM8058_S2, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8058_A0),
4120 RPM_PC(PM8901_L0, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8901_A0),
4121 RPM_PC(PM8901_S4, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8901_A0),
4122};
4123
4124static struct rpm_regulator_platform_data rpm_regulator_early_pdata = {
4125 .init_data = rpm_regulator_early_init_data,
4126 .num_regulators = ARRAY_SIZE(rpm_regulator_early_init_data),
4127 .version = RPM_VREG_VERSION_8660,
4128 .vreg_id_vdd_mem = RPM_VREG_ID_PM8058_S0,
4129 .vreg_id_vdd_dig = RPM_VREG_ID_PM8058_S1,
4130};
4131
4132static struct rpm_regulator_platform_data rpm_regulator_pdata = {
4133 .init_data = rpm_regulator_init_data,
4134 .num_regulators = ARRAY_SIZE(rpm_regulator_init_data),
4135 .version = RPM_VREG_VERSION_8660,
4136};
4137
4138static struct platform_device rpm_regulator_early_device = {
4139 .name = "rpm-regulator",
4140 .id = 0,
4141 .dev = {
4142 .platform_data = &rpm_regulator_early_pdata,
4143 },
4144};
4145
4146static struct platform_device rpm_regulator_device = {
4147 .name = "rpm-regulator",
4148 .id = 1,
4149 .dev = {
4150 .platform_data = &rpm_regulator_pdata,
4151 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004152};
4153
4154static struct platform_device *early_regulators[] __initdata = {
4155 &msm_device_saw_s0,
4156 &msm_device_saw_s1,
David Collins6f032ba2011-08-31 14:08:15 -07004157 &rpm_regulator_early_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004158};
4159
4160static struct platform_device *early_devices[] __initdata = {
4161#ifdef CONFIG_MSM_BUS_SCALING
4162 &msm_bus_apps_fabric,
4163 &msm_bus_sys_fabric,
4164 &msm_bus_mm_fabric,
4165 &msm_bus_sys_fpb,
4166 &msm_bus_cpss_fpb,
4167#endif
4168 &msm_device_dmov_adm0,
4169 &msm_device_dmov_adm1,
4170};
4171
4172#if (defined(CONFIG_MARIMBA_CORE)) && \
4173 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
4174
4175static int bluetooth_power(int);
4176static struct platform_device msm_bt_power_device = {
4177 .name = "bt_power",
4178 .id = -1,
4179 .dev = {
4180 .platform_data = &bluetooth_power,
4181 },
4182};
4183#endif
4184
4185static struct platform_device msm_tsens_device = {
4186 .name = "tsens-tm",
4187 .id = -1,
4188};
4189
4190static struct platform_device *rumi_sim_devices[] __initdata = {
4191 &smc91x_device,
4192 &msm_device_uart_dm12,
4193#ifdef CONFIG_I2C_QUP
4194 &msm_gsbi3_qup_i2c_device,
4195 &msm_gsbi4_qup_i2c_device,
4196 &msm_gsbi7_qup_i2c_device,
4197 &msm_gsbi8_qup_i2c_device,
4198 &msm_gsbi9_qup_i2c_device,
4199 &msm_gsbi12_qup_i2c_device,
4200#endif
4201#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004202 &msm_device_ssbi3,
4203#endif
4204#ifdef CONFIG_ANDROID_PMEM
Laura Abbottdf8b8a82011-11-02 23:13:45 -07004205#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004206 &android_pmem_device,
4207 &android_pmem_adsp_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004208 &android_pmem_smipool_device,
4209#endif
Laura Abbottdf8b8a82011-11-02 23:13:45 -07004210 &android_pmem_audio_device,
4211#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004212#ifdef CONFIG_MSM_ROTATOR
4213 &msm_rotator_device,
4214#endif
4215 &msm_fb_device,
4216 &msm_kgsl_3d0,
4217 &msm_kgsl_2d0,
4218 &msm_kgsl_2d1,
4219 &lcdc_samsung_panel_device,
4220#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
4221 &hdmi_msm_device,
4222#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
4223#ifdef CONFIG_MSM_CAMERA
4224#ifdef CONFIG_MT9E013
4225 &msm_camera_sensor_mt9e013,
4226#endif
4227#ifdef CONFIG_IMX074
4228 &msm_camera_sensor_imx074,
4229#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04004230#ifdef CONFIG_VX6953
4231 &msm_camera_sensor_vx6953,
4232#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004233#ifdef CONFIG_WEBCAM_OV7692
4234 &msm_camera_sensor_webcam_ov7692,
4235#endif
4236#ifdef CONFIG_WEBCAM_OV9726
4237 &msm_camera_sensor_webcam_ov9726,
4238#endif
4239#ifdef CONFIG_QS_S5K4E1
4240 &msm_camera_sensor_qs_s5k4e1,
4241#endif
4242#endif
4243#ifdef CONFIG_MSM_GEMINI
4244 &msm_gemini_device,
4245#endif
4246#ifdef CONFIG_MSM_VPE
4247 &msm_vpe_device,
4248#endif
4249 &msm_device_vidc,
4250};
4251
4252#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
4253enum {
4254 SX150X_CORE,
4255 SX150X_DOCKING,
4256 SX150X_SURF,
4257 SX150X_LEFT_FHA,
4258 SX150X_RIGHT_FHA,
4259 SX150X_SOUTH,
4260 SX150X_NORTH,
4261 SX150X_CORE_FLUID,
4262};
4263
4264static struct sx150x_platform_data sx150x_data[] __initdata = {
4265 [SX150X_CORE] = {
4266 .gpio_base = GPIO_CORE_EXPANDER_BASE,
4267 .oscio_is_gpo = false,
4268 .io_pullup_ena = 0x0c08,
4269 .io_pulldn_ena = 0x4060,
4270 .io_open_drain_ena = 0x000c,
4271 .io_polarity = 0,
4272 .irq_summary = -1, /* see fixup_i2c_configs() */
4273 .irq_base = GPIO_EXPANDER_IRQ_BASE,
4274 },
4275 [SX150X_DOCKING] = {
4276 .gpio_base = GPIO_DOCKING_EXPANDER_BASE,
4277 .oscio_is_gpo = false,
4278 .io_pullup_ena = 0x5e06,
4279 .io_pulldn_ena = 0x81b8,
4280 .io_open_drain_ena = 0,
4281 .io_polarity = 0,
4282 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4283 UI_INT2_N),
4284 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4285 GPIO_DOCKING_EXPANDER_BASE -
4286 GPIO_EXPANDER_GPIO_BASE,
4287 },
4288 [SX150X_SURF] = {
4289 .gpio_base = GPIO_SURF_EXPANDER_BASE,
4290 .oscio_is_gpo = false,
4291 .io_pullup_ena = 0,
4292 .io_pulldn_ena = 0,
4293 .io_open_drain_ena = 0,
4294 .io_polarity = 0,
4295 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4296 UI_INT1_N),
4297 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4298 GPIO_SURF_EXPANDER_BASE -
4299 GPIO_EXPANDER_GPIO_BASE,
4300 },
4301 [SX150X_LEFT_FHA] = {
4302 .gpio_base = GPIO_LEFT_KB_EXPANDER_BASE,
4303 .oscio_is_gpo = false,
4304 .io_pullup_ena = 0,
4305 .io_pulldn_ena = 0x40,
4306 .io_open_drain_ena = 0,
4307 .io_polarity = 0,
4308 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4309 UI_INT3_N),
4310 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4311 GPIO_LEFT_KB_EXPANDER_BASE -
4312 GPIO_EXPANDER_GPIO_BASE,
4313 },
4314 [SX150X_RIGHT_FHA] = {
4315 .gpio_base = GPIO_RIGHT_KB_EXPANDER_BASE,
4316 .oscio_is_gpo = true,
4317 .io_pullup_ena = 0,
4318 .io_pulldn_ena = 0,
4319 .io_open_drain_ena = 0,
4320 .io_polarity = 0,
4321 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4322 UI_INT3_N),
4323 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4324 GPIO_RIGHT_KB_EXPANDER_BASE -
4325 GPIO_EXPANDER_GPIO_BASE,
4326 },
4327 [SX150X_SOUTH] = {
4328 .gpio_base = GPIO_SOUTH_EXPANDER_BASE,
4329 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4330 GPIO_SOUTH_EXPANDER_BASE -
4331 GPIO_EXPANDER_GPIO_BASE,
4332 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT3_N),
4333 },
4334 [SX150X_NORTH] = {
4335 .gpio_base = GPIO_NORTH_EXPANDER_BASE,
4336 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4337 GPIO_NORTH_EXPANDER_BASE -
4338 GPIO_EXPANDER_GPIO_BASE,
4339 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT3_N),
4340 .oscio_is_gpo = true,
4341 .io_open_drain_ena = 0x30,
4342 },
4343 [SX150X_CORE_FLUID] = {
4344 .gpio_base = GPIO_CORE_EXPANDER_BASE,
4345 .oscio_is_gpo = false,
4346 .io_pullup_ena = 0x0408,
4347 .io_pulldn_ena = 0x4060,
4348 .io_open_drain_ena = 0x0008,
4349 .io_polarity = 0,
4350 .irq_summary = -1, /* see fixup_i2c_configs() */
4351 .irq_base = GPIO_EXPANDER_IRQ_BASE,
4352 },
4353};
4354
4355#ifdef CONFIG_SENSORS_MSM_ADC
4356/* Configuration of EPM expander is done when client
4357 * request an adc read
4358 */
4359static struct sx150x_platform_data sx150x_epmdata = {
4360 .gpio_base = GPIO_EPM_EXPANDER_BASE,
4361 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4362 GPIO_EPM_EXPANDER_BASE -
4363 GPIO_EXPANDER_GPIO_BASE,
4364 .irq_summary = -1,
4365};
4366#endif
4367
4368/* sx150x_low_power_cfg
4369 *
4370 * This data and init function are used to put unused gpio-expander output
4371 * lines into their low-power states at boot. The init
4372 * function must be deferred until a later init stage because the i2c
4373 * gpio expander drivers do not probe until after they are registered
4374 * (see register_i2c_devices) and the work-queues for those registrations
4375 * are processed. Because these lines are unused, there is no risk of
4376 * competing with a device driver for the gpio.
4377 *
4378 * gpio lines whose low-power states are input are naturally in their low-
4379 * power configurations once probed, see the platform data structures above.
4380 */
4381struct sx150x_low_power_cfg {
4382 unsigned gpio;
4383 unsigned val;
4384};
4385
4386static struct sx150x_low_power_cfg
4387common_sx150x_lp_cfgs[] __initdata = {
4388 {GPIO_WLAN_DEEP_SLEEP_N, 0},
4389 {GPIO_EXT_GPS_LNA_EN, 0},
4390 {GPIO_MSM_WAKES_BT, 0},
4391 {GPIO_USB_UICC_EN, 0},
4392 {GPIO_BATT_GAUGE_EN, 0},
4393};
4394
4395static struct sx150x_low_power_cfg
4396surf_ffa_sx150x_lp_cfgs[] __initdata = {
4397 {GPIO_MIPI_DSI_RST_N, 0},
4398 {GPIO_DONGLE_PWR_EN, 0},
4399 {GPIO_CAP_TS_SLEEP, 1},
4400 {GPIO_WEB_CAMIF_RESET_N, 0},
4401};
4402
4403static void __init
4404cfg_gpio_low_power(struct sx150x_low_power_cfg *cfgs, unsigned nelems)
4405{
4406 unsigned n;
4407 int rc;
4408
4409 for (n = 0; n < nelems; ++n) {
4410 rc = gpio_request(cfgs[n].gpio, NULL);
4411 if (!rc) {
4412 rc = gpio_direction_output(cfgs[n].gpio, cfgs[n].val);
4413 gpio_free(cfgs[n].gpio);
4414 }
4415
4416 if (rc) {
4417 printk(KERN_NOTICE "%s: failed to sleep gpio %d: %d\n",
4418 __func__, cfgs[n].gpio, rc);
4419 }
Steve Muckle9161d302010-02-11 11:50:40 -08004420 }
Steve Mucklea55df6e2010-01-07 12:43:24 -08004421}
4422
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004423static int __init cfg_sx150xs_low_power(void)
Steve Mucklea55df6e2010-01-07 12:43:24 -08004424{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004425 cfg_gpio_low_power(common_sx150x_lp_cfgs,
4426 ARRAY_SIZE(common_sx150x_lp_cfgs));
4427 if (!machine_is_msm8x60_fluid())
4428 cfg_gpio_low_power(surf_ffa_sx150x_lp_cfgs,
4429 ARRAY_SIZE(surf_ffa_sx150x_lp_cfgs));
4430 return 0;
4431}
4432module_init(cfg_sx150xs_low_power);
4433
4434#ifdef CONFIG_I2C
4435static struct i2c_board_info core_expander_i2c_info[] __initdata = {
4436 {
4437 I2C_BOARD_INFO("sx1509q", 0x3e),
4438 .platform_data = &sx150x_data[SX150X_CORE]
4439 },
4440};
4441
4442static struct i2c_board_info docking_expander_i2c_info[] __initdata = {
4443 {
4444 I2C_BOARD_INFO("sx1509q", 0x3f),
4445 .platform_data = &sx150x_data[SX150X_DOCKING]
4446 },
4447};
4448
4449static struct i2c_board_info surf_expanders_i2c_info[] __initdata = {
4450 {
4451 I2C_BOARD_INFO("sx1509q", 0x70),
4452 .platform_data = &sx150x_data[SX150X_SURF]
4453 }
4454};
4455
4456static struct i2c_board_info fha_expanders_i2c_info[] __initdata = {
4457 {
4458 I2C_BOARD_INFO("sx1508q", 0x21),
4459 .platform_data = &sx150x_data[SX150X_LEFT_FHA]
4460 },
4461 {
4462 I2C_BOARD_INFO("sx1508q", 0x22),
4463 .platform_data = &sx150x_data[SX150X_RIGHT_FHA]
4464 }
4465};
4466
4467static struct i2c_board_info fluid_expanders_i2c_info[] __initdata = {
4468 {
4469 I2C_BOARD_INFO("sx1508q", 0x23),
4470 .platform_data = &sx150x_data[SX150X_SOUTH]
4471 },
4472 {
4473 I2C_BOARD_INFO("sx1508q", 0x20),
4474 .platform_data = &sx150x_data[SX150X_NORTH]
4475 }
4476};
4477
4478static struct i2c_board_info fluid_core_expander_i2c_info[] __initdata = {
4479 {
4480 I2C_BOARD_INFO("sx1509q", 0x3e),
4481 .platform_data = &sx150x_data[SX150X_CORE_FLUID]
4482 },
4483};
4484
4485#ifdef CONFIG_SENSORS_MSM_ADC
4486static struct i2c_board_info fluid_expanders_i2c_epm_info[] = {
4487 {
4488 I2C_BOARD_INFO("sx1509q", 0x3e),
4489 .platform_data = &sx150x_epmdata
4490 },
4491};
4492#endif
4493#endif
4494#endif
4495
4496#ifdef CONFIG_SENSORS_MSM_ADC
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004497
4498static struct adc_access_fn xoadc_fn = {
4499 pm8058_xoadc_select_chan_and_start_conv,
4500 pm8058_xoadc_read_adc_code,
4501 pm8058_xoadc_get_properties,
4502 pm8058_xoadc_slot_request,
4503 pm8058_xoadc_restore_slot,
4504 pm8058_xoadc_calibrate,
4505};
4506
4507#if defined(CONFIG_I2C) && \
4508 (defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE))
4509static struct regulator *vreg_adc_epm1;
4510
4511static struct i2c_client *epm_expander_i2c_register_board(void)
4512
4513{
4514 struct i2c_adapter *i2c_adap;
4515 struct i2c_client *client = NULL;
4516 i2c_adap = i2c_get_adapter(0x0);
4517
4518 if (i2c_adap == NULL)
4519 printk(KERN_ERR "\nepm_expander_i2c_adapter is NULL\n");
4520
4521 if (i2c_adap != NULL)
4522 client = i2c_new_device(i2c_adap,
4523 &fluid_expanders_i2c_epm_info[0]);
4524 return client;
4525
4526}
4527
4528static unsigned int msm_adc_gpio_configure_expander_enable(void)
4529{
4530 int rc = 0;
4531 static struct i2c_client *epm_i2c_client;
4532
4533 printk(KERN_DEBUG "Enter msm_adc_gpio_configure_expander_enable\n");
4534
4535 vreg_adc_epm1 = regulator_get(NULL, "8058_s3");
4536
4537 if (IS_ERR(vreg_adc_epm1)) {
4538 printk(KERN_ERR "%s: Unable to get 8058_s3\n", __func__);
4539 return 0;
4540 }
4541
4542 rc = regulator_set_voltage(vreg_adc_epm1, 1800000, 1800000);
4543 if (rc)
4544 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4545 "regulator set voltage failed\n");
4546
4547 rc = regulator_enable(vreg_adc_epm1);
4548 if (rc) {
4549 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4550 "Error while enabling regulator for epm s3 %d\n", rc);
4551 return rc;
4552 }
4553
4554 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: Start"
4555 " setting the value of the EPM 3.3, 5v and lvlsft\n");
4556
4557 msleep(1000);
4558
4559 rc = gpio_request(GPIO_EPM_5V_BOOST_EN, "boost_epm_5v");
4560 if (!rc) {
4561 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4562 "Configure 5v boost\n");
4563 gpio_direction_output(GPIO_EPM_5V_BOOST_EN, 1);
4564 } else {
4565 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4566 "Error for epm 5v boost en\n");
4567 goto exit_vreg_epm;
4568 }
4569
4570 msleep(500);
4571
4572 rc = gpio_request(GPIO_EPM_3_3V_EN, "epm_3_3v");
4573 if (!rc) {
4574 gpio_direction_output(GPIO_EPM_3_3V_EN, 1);
4575 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4576 "Configure epm 3.3v\n");
4577 } else {
4578 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4579 "Error for gpio 3.3ven\n");
4580 goto exit_vreg_epm;
4581 }
4582 msleep(500);
4583
4584 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4585 "Trying to request EPM LVLSFT_EN\n");
4586 rc = gpio_request(GPIO_EPM_LVLSFT_EN, "lvsft_en");
4587 if (!rc) {
4588 gpio_direction_output(GPIO_EPM_LVLSFT_EN, 1);
4589 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4590 "Configure the lvlsft\n");
4591 } else {
4592 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4593 "Error for epm lvlsft_en\n");
4594 goto exit_vreg_epm;
4595 }
4596
4597 msleep(500);
4598
4599 if (!epm_i2c_client)
4600 epm_i2c_client = epm_expander_i2c_register_board();
4601
4602 rc = gpio_request(GPIO_PWR_MON_ENABLE, "pwr_mon_enable");
4603 if (!rc)
4604 rc = gpio_direction_output(GPIO_PWR_MON_ENABLE, 1);
4605 if (rc) {
4606 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4607 ": GPIO PWR MON Enable issue\n");
4608 goto exit_vreg_epm;
4609 }
4610
4611 msleep(1000);
4612
4613 rc = gpio_request(GPIO_ADC1_PWDN_N, "adc1_pwdn");
4614 if (!rc) {
4615 rc = gpio_direction_output(GPIO_ADC1_PWDN_N, 1);
4616 if (rc) {
4617 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4618 ": ADC1_PWDN error direction out\n");
4619 goto exit_vreg_epm;
4620 }
4621 }
4622
4623 msleep(100);
4624
4625 rc = gpio_request(GPIO_ADC2_PWDN_N, "adc2_pwdn");
4626 if (!rc) {
4627 rc = gpio_direction_output(GPIO_ADC2_PWDN_N, 1);
4628 if (rc) {
4629 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4630 ": ADC2_PWD error direction out\n");
4631 goto exit_vreg_epm;
4632 }
4633 }
4634
4635 msleep(1000);
4636
4637 rc = gpio_request(GPIO_PWR_MON_START, "pwr_mon_start");
4638 if (!rc) {
4639 rc = gpio_direction_output(GPIO_PWR_MON_START, 0);
4640 if (rc) {
4641 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4642 "Gpio request problem %d\n", rc);
4643 goto exit_vreg_epm;
4644 }
4645 }
4646
4647 rc = gpio_request(GPIO_EPM_SPI_ADC1_CS_N, "spi_adc1_cs");
4648 if (!rc) {
4649 rc = gpio_direction_output(GPIO_EPM_SPI_ADC1_CS_N, 0);
4650 if (rc) {
4651 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4652 ": EPM_SPI_ADC1_CS_N error\n");
4653 goto exit_vreg_epm;
4654 }
4655 }
4656
4657 rc = gpio_request(GPIO_EPM_SPI_ADC2_CS_N, "spi_adc2_cs");
4658 if (!rc) {
4659 rc = gpio_direction_output(GPIO_EPM_SPI_ADC2_CS_N, 0);
4660 if (rc) {
4661 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4662 ": EPM_SPI_ADC2_Cs_N error\n");
4663 goto exit_vreg_epm;
4664 }
4665 }
4666
4667 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: Set "
4668 "the power monitor reset for epm\n");
4669
4670 rc = gpio_request(GPIO_PWR_MON_RESET_N, "pwr_mon_reset_n");
4671 if (!rc) {
4672 gpio_direction_output(GPIO_PWR_MON_RESET_N, 0);
4673 if (rc) {
4674 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4675 ": Error in the power mon reset\n");
4676 goto exit_vreg_epm;
4677 }
4678 }
4679
4680 msleep(1000);
4681
4682 gpio_set_value_cansleep(GPIO_PWR_MON_RESET_N, 1);
4683
4684 msleep(500);
4685
4686 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4687
4688 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4689
4690 return rc;
4691
4692exit_vreg_epm:
4693 regulator_disable(vreg_adc_epm1);
4694
4695 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: Exit."
4696 " rc = %d.\n", rc);
4697 return rc;
4698};
4699
4700static unsigned int msm_adc_gpio_configure_expander_disable(void)
4701{
4702 int rc = 0;
4703
4704 gpio_set_value_cansleep(GPIO_PWR_MON_RESET_N, 0);
4705 gpio_free(GPIO_PWR_MON_RESET_N);
4706
4707 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 0);
4708 gpio_free(GPIO_EPM_SPI_ADC1_CS_N);
4709
4710 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 0);
4711 gpio_free(GPIO_EPM_SPI_ADC2_CS_N);
4712
4713 gpio_set_value_cansleep(GPIO_PWR_MON_START, 0);
4714 gpio_free(GPIO_PWR_MON_START);
4715
4716 gpio_direction_output(GPIO_ADC1_PWDN_N, 0);
4717 gpio_free(GPIO_ADC1_PWDN_N);
4718
4719 gpio_direction_output(GPIO_ADC2_PWDN_N, 0);
4720 gpio_free(GPIO_ADC2_PWDN_N);
4721
4722 gpio_set_value_cansleep(GPIO_PWR_MON_ENABLE, 0);
4723 gpio_free(GPIO_PWR_MON_ENABLE);
4724
4725 gpio_set_value_cansleep(GPIO_EPM_LVLSFT_EN, 0);
4726 gpio_free(GPIO_EPM_LVLSFT_EN);
4727
4728 gpio_set_value_cansleep(GPIO_EPM_5V_BOOST_EN, 0);
4729 gpio_free(GPIO_EPM_5V_BOOST_EN);
4730
4731 gpio_set_value_cansleep(GPIO_EPM_3_3V_EN, 0);
4732 gpio_free(GPIO_EPM_3_3V_EN);
4733
4734 rc = regulator_disable(vreg_adc_epm1);
4735 if (rc)
4736 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_disable: "
4737 "Error while enabling regulator for epm s3 %d\n", rc);
4738 regulator_put(vreg_adc_epm1);
4739
4740 printk(KERN_DEBUG "Exi msm_adc_gpio_configure_expander_disable\n");
4741 return rc;
4742};
4743
4744unsigned int msm_adc_gpio_expander_enable(int cs_enable)
4745{
4746 int rc = 0;
4747
4748 printk(KERN_DEBUG "msm_adc_gpio_expander_enable: cs_enable = %d",
4749 cs_enable);
4750
4751 if (cs_enable < 16) {
4752 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 0);
4753 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4754 } else {
4755 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 0);
4756 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4757 }
4758 return rc;
4759};
4760
4761unsigned int msm_adc_gpio_expander_disable(int cs_disable)
4762{
4763 int rc = 0;
4764
4765 printk(KERN_DEBUG "Enter msm_adc_gpio_expander_disable.\n");
4766
4767 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4768
4769 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4770
4771 return rc;
4772};
4773#endif
4774
4775static struct msm_adc_channels msm_adc_channels_data[] = {
4776 {"vbatt", CHANNEL_ADC_VBATT, 0, &xoadc_fn, CHAN_PATH_TYPE2,
4777 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4778 {"vcoin", CHANNEL_ADC_VCOIN, 0, &xoadc_fn, CHAN_PATH_TYPE1,
4779 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4780 {"vcharger_channel", CHANNEL_ADC_VCHG, 0, &xoadc_fn, CHAN_PATH_TYPE3,
4781 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE4, scale_default},
4782 {"charger_current_monitor", CHANNEL_ADC_CHG_MONITOR, 0, &xoadc_fn,
4783 CHAN_PATH_TYPE4,
4784 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_default},
4785 {"vph_pwr", CHANNEL_ADC_VPH_PWR, 0, &xoadc_fn, CHAN_PATH_TYPE5,
4786 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4787 {"usb_vbus", CHANNEL_ADC_USB_VBUS, 0, &xoadc_fn, CHAN_PATH_TYPE11,
4788 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4789 {"pmic_therm", CHANNEL_ADC_DIE_TEMP, 0, &xoadc_fn, CHAN_PATH_TYPE12,
4790 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_pmic_therm},
4791 {"pmic_therm_4K", CHANNEL_ADC_DIE_TEMP_4K, 0, &xoadc_fn,
4792 CHAN_PATH_TYPE12,
4793 ADC_CONFIG_TYPE1, ADC_CALIB_CONFIG_TYPE7, scale_pmic_therm},
4794 {"xo_therm", CHANNEL_ADC_XOTHERM, 0, &xoadc_fn, CHAN_PATH_TYPE_NONE,
4795 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE5, tdkntcgtherm},
4796 {"xo_therm_4K", CHANNEL_ADC_XOTHERM_4K, 0, &xoadc_fn,
4797 CHAN_PATH_TYPE_NONE,
4798 ADC_CONFIG_TYPE1, ADC_CALIB_CONFIG_TYPE6, tdkntcgtherm},
4799 {"hdset_detect", CHANNEL_ADC_HDSET, 0, &xoadc_fn, CHAN_PATH_TYPE6,
4800 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_default},
4801 {"chg_batt_amon", CHANNEL_ADC_BATT_AMON, 0, &xoadc_fn, CHAN_PATH_TYPE10,
4802 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1,
4803 scale_xtern_chgr_cur},
4804 {"msm_therm", CHANNEL_ADC_MSM_THERM, 0, &xoadc_fn, CHAN_PATH_TYPE8,
4805 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_msm_therm},
4806 {"batt_therm", CHANNEL_ADC_BATT_THERM, 0, &xoadc_fn, CHAN_PATH_TYPE7,
4807 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_batt_therm},
4808 {"batt_id", CHANNEL_ADC_BATT_ID, 0, &xoadc_fn, CHAN_PATH_TYPE9,
4809 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4810 {"ref_625mv", CHANNEL_ADC_625_REF, 0, &xoadc_fn, CHAN_PATH_TYPE15,
4811 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4812 {"ref_1250mv", CHANNEL_ADC_1250_REF, 0, &xoadc_fn, CHAN_PATH_TYPE13,
4813 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4814 {"ref_325mv", CHANNEL_ADC_325_REF, 0, &xoadc_fn, CHAN_PATH_TYPE14,
4815 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4816};
4817
4818static char *msm_adc_fluid_device_names[] = {
4819 "ADS_ADC1",
4820 "ADS_ADC2",
4821};
4822
4823static struct msm_adc_platform_data msm_adc_pdata = {
4824 .channel = msm_adc_channels_data,
4825 .num_chan_supported = ARRAY_SIZE(msm_adc_channels_data),
4826#if defined(CONFIG_I2C) && \
4827 (defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE))
4828 .adc_gpio_enable = msm_adc_gpio_expander_enable,
4829 .adc_gpio_disable = msm_adc_gpio_expander_disable,
4830 .adc_fluid_enable = msm_adc_gpio_configure_expander_enable,
4831 .adc_fluid_disable = msm_adc_gpio_configure_expander_disable,
4832#endif
4833};
4834
4835static struct platform_device msm_adc_device = {
4836 .name = "msm_adc",
4837 .id = -1,
4838 .dev = {
4839 .platform_data = &msm_adc_pdata,
4840 },
4841};
4842
4843static void pmic8058_xoadc_mpp_config(void)
4844{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304845 int rc, i;
4846 struct pm8xxx_mpp_init_info xoadc_mpps[] = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304847 PM8058_MPP_INIT(XOADC_MPP_3, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304848 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304849 PM8058_MPP_INIT(XOADC_MPP_5, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH9,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304850 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304851 PM8058_MPP_INIT(XOADC_MPP_7, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH6,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304852 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304853 PM8058_MPP_INIT(XOADC_MPP_8, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH8,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304854 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304855 PM8058_MPP_INIT(XOADC_MPP_10, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH7,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304856 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304857 PM8901_MPP_INIT(XOADC_MPP_4, D_OUTPUT, PM8901_MPP_DIG_LEVEL_S4,
4858 DOUT_CTRL_LOW),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304859 };
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004860
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304861 for (i = 0; i < ARRAY_SIZE(xoadc_mpps); i++) {
4862 rc = pm8xxx_mpp_config(xoadc_mpps[i].mpp,
4863 &xoadc_mpps[i].config);
4864 if (rc) {
4865 pr_err("%s: Config MPP %d of PM8058 failed\n",
4866 __func__, xoadc_mpps[i].mpp);
4867 }
4868 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004869}
4870
4871static struct regulator *vreg_ldo18_adc;
4872
4873static int pmic8058_xoadc_vreg_config(int on)
4874{
4875 int rc;
4876
4877 if (on) {
4878 rc = regulator_enable(vreg_ldo18_adc);
4879 if (rc)
4880 pr_err("%s: Enable of regulator ldo18_adc "
4881 "failed\n", __func__);
4882 } else {
4883 rc = regulator_disable(vreg_ldo18_adc);
4884 if (rc)
4885 pr_err("%s: Disable of regulator ldo18_adc "
4886 "failed\n", __func__);
4887 }
4888
4889 return rc;
4890}
4891
4892static int pmic8058_xoadc_vreg_setup(void)
4893{
4894 int rc;
4895
4896 vreg_ldo18_adc = regulator_get(NULL, "8058_l18");
4897 if (IS_ERR(vreg_ldo18_adc)) {
4898 printk(KERN_ERR "%s: vreg get failed (%ld)\n",
4899 __func__, PTR_ERR(vreg_ldo18_adc));
4900 rc = PTR_ERR(vreg_ldo18_adc);
4901 goto fail;
4902 }
4903
4904 rc = regulator_set_voltage(vreg_ldo18_adc, 2200000, 2200000);
4905 if (rc) {
4906 pr_err("%s: unable to set ldo18 voltage to 2.2V\n", __func__);
4907 goto fail;
4908 }
4909
4910 return rc;
4911fail:
4912 regulator_put(vreg_ldo18_adc);
4913 return rc;
4914}
4915
4916static void pmic8058_xoadc_vreg_shutdown(void)
4917{
4918 regulator_put(vreg_ldo18_adc);
4919}
4920
4921/* usec. For this ADC,
4922 * this time represents clk rate @ txco w/ 1024 decimation ratio.
4923 * Each channel has different configuration, thus at the time of starting
4924 * the conversion, xoadc will return actual conversion time
4925 * */
4926static struct adc_properties pm8058_xoadc_data = {
4927 .adc_reference = 2200, /* milli-voltage for this adc */
4928 .bitresolution = 15,
4929 .bipolar = 0,
4930 .conversiontime = 54,
4931};
4932
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304933static struct xoadc_platform_data pm8058_xoadc_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004934 .xoadc_prop = &pm8058_xoadc_data,
4935 .xoadc_mpp_config = pmic8058_xoadc_mpp_config,
4936 .xoadc_vreg_set = pmic8058_xoadc_vreg_config,
4937 .xoadc_num = XOADC_PMIC_0,
4938 .xoadc_vreg_setup = pmic8058_xoadc_vreg_setup,
4939 .xoadc_vreg_shutdown = pmic8058_xoadc_vreg_shutdown,
4940};
4941#endif
4942
4943#ifdef CONFIG_MSM_SDIO_AL
4944
4945static unsigned mdm2ap_status = 140;
4946
4947static int configure_mdm2ap_status(int on)
4948{
4949 int ret = 0;
4950 if (on)
4951 ret = msm_gpiomux_get(mdm2ap_status);
4952 else
4953 ret = msm_gpiomux_put(mdm2ap_status);
4954
4955 if (ret)
4956 pr_err("%s: mdm2ap_status config failed, on = %d\n", __func__,
4957 on);
4958
4959 return ret;
4960}
4961
4962
4963static int get_mdm2ap_status(void)
4964{
4965 return gpio_get_value(mdm2ap_status);
4966}
4967
4968static struct sdio_al_platform_data sdio_al_pdata = {
4969 .config_mdm2ap_status = configure_mdm2ap_status,
4970 .get_mdm2ap_status = get_mdm2ap_status,
4971 .allow_sdioc_version_major_2 = 0,
Konstantin Dorfmanee2e3082011-08-16 15:12:01 +03004972 .peer_sdioc_version_minor = 0x0202,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004973 .peer_sdioc_version_major = 0x0004,
4974 .peer_sdioc_boot_version_minor = 0x0001,
4975 .peer_sdioc_boot_version_major = 0x0003
4976};
4977
4978struct platform_device msm_device_sdio_al = {
4979 .name = "msm_sdio_al",
4980 .id = -1,
4981 .dev = {
Maya Erez6862b142011-08-22 09:07:07 +03004982 .parent = &msm_charm_modem.dev,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004983 .platform_data = &sdio_al_pdata,
4984 },
4985};
4986
4987#endif /* CONFIG_MSM_SDIO_AL */
4988
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304989#define GPIO_VREG_ID_EXT_5V 0
4990
4991static struct regulator_consumer_supply vreg_consumers_EXT_5V[] = {
4992 REGULATOR_SUPPLY("ext_5v", NULL),
4993 REGULATOR_SUPPLY("8901_mpp0", NULL),
4994};
4995
4996#define GPIO_VREG_INIT(_id, _reg_name, _gpio_label, _gpio, _active_low) \
4997 [GPIO_VREG_ID_##_id] = { \
4998 .init_data = { \
4999 .constraints = { \
5000 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
5001 }, \
5002 .num_consumer_supplies = \
5003 ARRAY_SIZE(vreg_consumers_##_id), \
5004 .consumer_supplies = vreg_consumers_##_id, \
5005 }, \
5006 .regulator_name = _reg_name, \
5007 .active_low = _active_low, \
5008 .gpio_label = _gpio_label, \
5009 .gpio = _gpio, \
5010 }
5011
5012/* GPIO regulator constraints */
5013static struct gpio_regulator_platform_data msm_gpio_regulator_pdata[] = {
5014 GPIO_VREG_INIT(EXT_5V, "ext_5v", "ext_5v_en",
5015 PM8901_MPP_PM_TO_SYS(0), 0),
5016};
5017
5018/* GPIO regulator */
5019static struct platform_device msm8x60_8901_mpp_vreg __devinitdata = {
5020 .name = GPIO_REGULATOR_DEV_NAME,
5021 .id = PM8901_MPP_PM_TO_SYS(0),
5022 .dev = {
5023 .platform_data =
5024 &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V],
5025 },
5026};
5027
5028static void __init pm8901_vreg_mpp0_init(void)
5029{
5030 int rc;
5031
5032 struct pm8xxx_mpp_init_info pm8901_vreg_mpp0 = {
5033 .mpp = PM8901_MPP_PM_TO_SYS(0),
5034 .config = {
5035 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
5036 .level = PM8901_MPP_DIG_LEVEL_VPH,
5037 },
5038 };
5039
5040 /*
5041 * Set PMIC 8901 MPP0 active_high to 0 for surf and charm_surf. This
5042 * implies that the regulator connected to MPP0 is enabled when
5043 * MPP0 is low.
5044 */
5045 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion()) {
5046 msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V].active_low = 1;
5047 pm8901_vreg_mpp0.config.control = PM8XXX_MPP_DOUT_CTRL_HIGH;
5048 } else {
5049 msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V].active_low = 0;
5050 pm8901_vreg_mpp0.config.control = PM8XXX_MPP_DOUT_CTRL_LOW;
5051 }
5052
5053 rc = pm8xxx_mpp_config(pm8901_vreg_mpp0.mpp, &pm8901_vreg_mpp0.config);
5054 if (rc)
5055 pr_err("%s: pm8xxx_mpp_config: rc=%d\n", __func__, rc);
5056}
5057
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005058static struct platform_device *charm_devices[] __initdata = {
5059 &msm_charm_modem,
5060#ifdef CONFIG_MSM_SDIO_AL
5061 &msm_device_sdio_al,
5062#endif
5063};
5064
Lei Zhou338cab82011-08-19 13:38:17 -04005065#ifdef CONFIG_SND_SOC_MSM8660_APQ
5066static struct platform_device *dragon_alsa_devices[] __initdata = {
5067 &msm_pcm,
5068 &msm_pcm_routing,
5069 &msm_cpudai0,
5070 &msm_cpudai1,
5071 &msm_cpudai_hdmi_rx,
5072 &msm_cpudai_bt_rx,
5073 &msm_cpudai_bt_tx,
5074 &msm_cpudai_fm_rx,
5075 &msm_cpudai_fm_tx,
5076 &msm_cpu_fe,
5077 &msm_stub_codec,
5078 &msm_lpa_pcm,
5079};
5080#endif
5081
5082static struct platform_device *asoc_devices[] __initdata = {
5083 &asoc_msm_pcm,
5084 &asoc_msm_dai0,
5085 &asoc_msm_dai1,
5086};
5087
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005088static struct platform_device *surf_devices[] __initdata = {
5089 &msm_device_smd,
5090 &msm_device_uart_dm12,
Stephen Boyd3acc9e42011-09-28 16:46:40 -07005091 &msm_pil_q6v3,
Stephen Boyd4eb885b2011-09-29 01:16:03 -07005092 &msm_pil_modem,
Stephen Boydd89eebe2011-09-28 23:28:11 -07005093 &msm_pil_tzapps,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005094#ifdef CONFIG_I2C_QUP
5095 &msm_gsbi3_qup_i2c_device,
5096 &msm_gsbi4_qup_i2c_device,
5097 &msm_gsbi7_qup_i2c_device,
5098 &msm_gsbi8_qup_i2c_device,
5099 &msm_gsbi9_qup_i2c_device,
5100 &msm_gsbi12_qup_i2c_device,
5101#endif
5102#ifdef CONFIG_SERIAL_MSM_HS
5103 &msm_device_uart_dm1,
5104#endif
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05305105#ifdef CONFIG_MSM_SSBI
5106 &msm_device_ssbi_pmic1,
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05305107 &msm_device_ssbi_pmic2,
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05305108#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005109#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005110 &msm_device_ssbi3,
5111#endif
5112#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
5113 &isp1763_device,
5114#endif
5115
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005116#if defined (CONFIG_MSM_8x60_VOIP)
5117 &asoc_msm_mvs,
5118 &asoc_mvs_dai0,
5119 &asoc_mvs_dai1,
5120#endif
Lei Zhou338cab82011-08-19 13:38:17 -04005121
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005122#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_HCD)
5123 &msm_device_otg,
5124#endif
5125#ifdef CONFIG_USB_GADGET_MSM_72K
5126 &msm_device_gadget_peripheral,
5127#endif
5128#ifdef CONFIG_USB_G_ANDROID
5129 &android_usb_device,
5130#endif
5131#ifdef CONFIG_BATTERY_MSM
5132 &msm_batt_device,
5133#endif
5134#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005135#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005136 &android_pmem_device,
5137 &android_pmem_adsp_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005138 &android_pmem_smipool_device,
5139#endif
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005140 &android_pmem_audio_device,
5141#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005142#ifdef CONFIG_MSM_ROTATOR
5143 &msm_rotator_device,
5144#endif
5145 &msm_fb_device,
5146 &msm_kgsl_3d0,
5147 &msm_kgsl_2d0,
5148 &msm_kgsl_2d1,
5149 &lcdc_samsung_panel_device,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005150#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5151 &lcdc_nt35582_panel_device,
5152#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005153#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
5154 &lcdc_samsung_oled_panel_device,
5155#endif
5156#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
5157 &lcdc_auo_wvga_panel_device,
5158#endif
5159#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
5160 &hdmi_msm_device,
5161#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
5162#ifdef CONFIG_FB_MSM_MIPI_DSI
5163 &mipi_dsi_toshiba_panel_device,
5164 &mipi_dsi_novatek_panel_device,
5165#endif
5166#ifdef CONFIG_MSM_CAMERA
5167#ifdef CONFIG_MT9E013
5168 &msm_camera_sensor_mt9e013,
5169#endif
5170#ifdef CONFIG_IMX074
5171 &msm_camera_sensor_imx074,
5172#endif
5173#ifdef CONFIG_WEBCAM_OV7692
5174 &msm_camera_sensor_webcam_ov7692,
5175#endif
5176#ifdef CONFIG_WEBCAM_OV9726
5177 &msm_camera_sensor_webcam_ov9726,
5178#endif
5179#ifdef CONFIG_QS_S5K4E1
5180 &msm_camera_sensor_qs_s5k4e1,
5181#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04005182#ifdef CONFIG_VX6953
5183 &msm_camera_sensor_vx6953,
5184#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005185#endif
5186#ifdef CONFIG_MSM_GEMINI
5187 &msm_gemini_device,
5188#endif
5189#ifdef CONFIG_MSM_VPE
5190 &msm_vpe_device,
5191#endif
5192
5193#if defined(CONFIG_MSM_RPM_LOG) || defined(CONFIG_MSM_RPM_LOG_MODULE)
5194 &msm_rpm_log_device,
5195#endif
5196#if defined(CONFIG_MSM_RPM_STATS_LOG)
5197 &msm_rpm_stat_device,
5198#endif
5199 &msm_device_vidc,
5200#if (defined(CONFIG_MARIMBA_CORE)) && \
5201 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
5202 &msm_bt_power_device,
5203#endif
5204#ifdef CONFIG_SENSORS_MSM_ADC
5205 &msm_adc_device,
5206#endif
David Collins6f032ba2011-08-31 14:08:15 -07005207 &rpm_regulator_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005208
5209#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
5210 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
5211 &qcrypto_device,
5212#endif
5213
5214#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
5215 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
5216 &qcedev_device,
5217#endif
5218
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005219
5220#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
5221#ifdef CONFIG_MSM_USE_TSIF1
5222 &msm_device_tsif[1],
5223#else
5224 &msm_device_tsif[0],
5225#endif /* CONFIG_MSM_USE_TSIF1 */
5226#endif /* CONFIG_TSIF */
5227
5228#ifdef CONFIG_HW_RANDOM_MSM
5229 &msm_device_rng,
5230#endif
5231
5232 &msm_tsens_device,
Praveen Chidambaram043f4ce2011-08-02 09:37:59 -06005233 &msm_rpm_device,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005234#ifdef CONFIG_ION_MSM
5235 &ion_dev,
5236#endif
Jeff Ohlstein7e668552011-10-06 16:17:25 -07005237 &msm8660_device_watchdog,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005238};
5239
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005240#ifdef CONFIG_ION_MSM
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08005241static struct ion_platform_data ion_pdata = {
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005242 .nr = MSM_ION_HEAP_NUM,
5243 .heaps = {
5244 {
5245 .id = ION_HEAP_SYSTEM_ID,
5246 .type = ION_HEAP_TYPE_SYSTEM,
5247 .name = ION_VMALLOC_HEAP_NAME,
5248 },
5249 {
5250 .id = ION_HEAP_SYSTEM_CONTIG_ID,
5251 .type = ION_HEAP_TYPE_SYSTEM_CONTIG,
5252 .name = ION_KMALLOC_HEAP_NAME,
5253 },
5254#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
5255 {
5256 .id = ION_HEAP_EBI_ID,
5257 .type = ION_HEAP_TYPE_CARVEOUT,
5258 .name = ION_EBI1_HEAP_NAME,
5259 .size = MSM_ION_EBI_SIZE,
5260 .memory_type = ION_EBI_TYPE,
5261 },
5262 {
5263 .id = ION_HEAP_ADSP_ID,
5264 .type = ION_HEAP_TYPE_CARVEOUT,
5265 .name = ION_ADSP_HEAP_NAME,
5266 .size = MSM_ION_ADSP_SIZE,
5267 .memory_type = ION_EBI_TYPE,
5268 },
5269 {
5270 .id = ION_HEAP_SMI_ID,
5271 .type = ION_HEAP_TYPE_CARVEOUT,
5272 .name = ION_SMI_HEAP_NAME,
5273 .size = MSM_ION_SMI_SIZE,
5274 .memory_type = ION_SMI_TYPE,
Olav Hauganee0f7802011-12-19 13:28:57 -08005275 .request_region = request_smi_region,
5276 .release_region = release_smi_region,
5277 .setup_region = setup_smi_region,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005278 },
5279#endif
5280 }
5281};
5282
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08005283static struct platform_device ion_dev = {
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005284 .name = "ion-msm",
5285 .id = 1,
5286 .dev = { .platform_data = &ion_pdata },
5287};
5288#endif
5289
5290
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005291static struct memtype_reserve msm8x60_reserve_table[] __initdata = {
5292 /* Kernel SMI memory pool for video core, used for firmware */
5293 /* and encoder, decoder scratch buffers */
5294 /* Kernel SMI memory pool should always precede the user space */
5295 /* SMI memory pool, as the video core will use offset address */
5296 /* from the Firmware base */
5297 [MEMTYPE_SMI_KERNEL] = {
5298 .start = KERNEL_SMI_BASE,
5299 .limit = KERNEL_SMI_SIZE,
5300 .size = KERNEL_SMI_SIZE,
5301 .flags = MEMTYPE_FLAGS_FIXED,
5302 },
5303 /* User space SMI memory pool for video core */
5304 /* used for encoder, decoder input & output buffers */
5305 [MEMTYPE_SMI] = {
5306 .start = USER_SMI_BASE,
5307 .limit = USER_SMI_SIZE,
5308 .flags = MEMTYPE_FLAGS_FIXED,
5309 },
5310 [MEMTYPE_EBI0] = {
5311 .flags = MEMTYPE_FLAGS_1M_ALIGN,
5312 },
5313 [MEMTYPE_EBI1] = {
5314 .flags = MEMTYPE_FLAGS_1M_ALIGN,
5315 },
5316};
5317
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005318static void reserve_ion_memory(void)
5319{
5320#if defined(CONFIG_ION_MSM) && defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
5321 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_EBI_SIZE;
5322 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_ADSP_SIZE;
5323 msm8x60_reserve_table[MEMTYPE_SMI].size += MSM_ION_SMI_SIZE;
5324#endif
5325}
5326
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005327static void __init size_pmem_devices(void)
5328{
5329#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005330#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005331 android_pmem_adsp_pdata.size = pmem_adsp_size;
5332 android_pmem_smipool_pdata.size = MSM_PMEM_SMIPOOL_SIZE;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005333 android_pmem_pdata.size = pmem_sf_size;
5334#endif
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005335 android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE;
5336#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005337}
5338
5339static void __init reserve_memory_for(struct android_pmem_platform_data *p)
5340{
5341 msm8x60_reserve_table[p->memory_type].size += p->size;
5342}
5343
5344static void __init reserve_pmem_memory(void)
5345{
5346#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005347#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005348 reserve_memory_for(&android_pmem_adsp_pdata);
5349 reserve_memory_for(&android_pmem_smipool_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005350 reserve_memory_for(&android_pmem_pdata);
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005351#endif
5352 reserve_memory_for(&android_pmem_audio_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005353 msm8x60_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
5354#endif
5355}
5356
Huaibin Yanga5419422011-12-08 23:52:10 -08005357static void __init reserve_mdp_memory(void);
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005358
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005359static void __init msm8x60_calculate_reserve_sizes(void)
5360{
5361 size_pmem_devices();
5362 reserve_pmem_memory();
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005363 reserve_ion_memory();
Huaibin Yanga5419422011-12-08 23:52:10 -08005364 reserve_mdp_memory();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005365}
5366
5367static int msm8x60_paddr_to_memtype(unsigned int paddr)
5368{
5369 if (paddr >= 0x40000000 && paddr < 0x60000000)
5370 return MEMTYPE_EBI1;
5371 if (paddr >= 0x38000000 && paddr < 0x40000000)
5372 return MEMTYPE_SMI;
5373 return MEMTYPE_NONE;
5374}
5375
5376static struct reserve_info msm8x60_reserve_info __initdata = {
5377 .memtype_reserve_table = msm8x60_reserve_table,
5378 .calculate_reserve_sizes = msm8x60_calculate_reserve_sizes,
5379 .paddr_to_memtype = msm8x60_paddr_to_memtype,
5380};
5381
5382static void __init msm8x60_reserve(void)
5383{
5384 reserve_info = &msm8x60_reserve_info;
5385 msm_reserve();
5386}
5387
5388#define EXT_CHG_VALID_MPP 10
5389#define EXT_CHG_VALID_MPP_2 11
5390
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305391static struct pm8xxx_mpp_init_info isl_mpp[] = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05305392 PM8058_MPP_INIT(EXT_CHG_VALID_MPP, D_INPUT,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305393 PM8058_MPP_DIG_LEVEL_S3, DIN_TO_INT),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05305394 PM8058_MPP_INIT(EXT_CHG_VALID_MPP_2, D_BI_DIR,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305395 PM8058_MPP_DIG_LEVEL_S3, BI_PULLUP_10KOHM),
5396};
5397
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005398#ifdef CONFIG_ISL9519_CHARGER
5399static int isl_detection_setup(void)
5400{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305401 int ret = 0, i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005402
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305403 for (i = 0; i < ARRAY_SIZE(isl_mpp); i++) {
5404 ret = pm8xxx_mpp_config(isl_mpp[i].mpp,
5405 &isl_mpp[i].config);
5406 if (ret) {
5407 pr_err("%s: Config MPP %d of PM8058 failed\n",
5408 __func__, isl_mpp[i].mpp);
5409 return ret;
5410 }
5411 }
5412
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005413 return ret;
5414}
5415
5416static struct isl_platform_data isl_data __initdata = {
5417 .chgcurrent = 700,
5418 .valid_n_gpio = PM8058_MPP_PM_TO_SYS(10),
5419 .chg_detection_config = isl_detection_setup,
5420 .max_system_voltage = 4200,
5421 .min_system_voltage = 3200,
5422 .term_current = 120,
5423 .input_current = 2048,
5424};
5425
5426static struct i2c_board_info isl_charger_i2c_info[] __initdata = {
5427 {
5428 I2C_BOARD_INFO("isl9519q", 0x9),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305429 .irq = PM8058_IRQ_BASE + PM8058_CBLPWR_IRQ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005430 .platform_data = &isl_data,
5431 },
5432};
5433#endif
5434
5435#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
5436static int smb137b_detection_setup(void)
5437{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305438 int ret = 0, i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005439
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305440 for (i = 0; i < ARRAY_SIZE(isl_mpp); i++) {
5441 ret = pm8xxx_mpp_config(isl_mpp[i].mpp,
5442 &isl_mpp[i].config);
5443 if (ret) {
5444 pr_err("%s: Config MPP %d of PM8058 failed\n",
5445 __func__, isl_mpp[i].mpp);
5446 return ret;
5447 }
5448 }
5449
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005450 return ret;
5451}
5452
5453static struct smb137b_platform_data smb137b_data __initdata = {
5454 .chg_detection_config = smb137b_detection_setup,
5455 .valid_n_gpio = PM8058_MPP_PM_TO_SYS(10),
5456 .batt_mah_rating = 950,
5457};
5458
5459static struct i2c_board_info smb137b_charger_i2c_info[] __initdata = {
5460 {
5461 I2C_BOARD_INFO("smb137b", 0x08),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305462 .irq = PM8058_IRQ_BASE + PM8058_CBLPWR_IRQ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005463 .platform_data = &smb137b_data,
5464 },
5465};
5466#endif
5467
5468#ifdef CONFIG_PMIC8058
5469#define PMIC_GPIO_SDC3_DET 22
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305470#define PMIC_GPIO_TOUCH_DISC_INTR 5
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005471
5472static int pm8058_gpios_init(void)
5473{
5474 int i;
5475 int rc;
5476 struct pm8058_gpio_cfg {
5477 int gpio;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305478 struct pm_gpio cfg;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005479 };
5480
5481 struct pm8058_gpio_cfg gpio_cfgs[] = {
5482 { /* FFA ethernet */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305483 PM8058_GPIO_PM_TO_SYS(6),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005484 {
5485 .direction = PM_GPIO_DIR_IN,
5486 .pull = PM_GPIO_PULL_DN,
5487 .vin_sel = 2,
5488 .function = PM_GPIO_FUNC_NORMAL,
5489 .inv_int_pol = 0,
5490 },
5491 },
5492#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
5493 {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305494 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005495 {
5496 .direction = PM_GPIO_DIR_IN,
5497 .pull = PM_GPIO_PULL_UP_30,
5498 .vin_sel = 2,
5499 .function = PM_GPIO_FUNC_NORMAL,
5500 .inv_int_pol = 0,
5501 },
5502 },
5503#endif
5504 { /* core&surf gpio expander */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305505 PM8058_GPIO_PM_TO_SYS(UI_INT1_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005506 {
5507 .direction = PM_GPIO_DIR_IN,
5508 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305509 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005510 .function = PM_GPIO_FUNC_NORMAL,
5511 .inv_int_pol = 0,
5512 },
5513 },
5514 { /* docking gpio expander */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305515 PM8058_GPIO_PM_TO_SYS(UI_INT2_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005516 {
5517 .direction = PM_GPIO_DIR_IN,
5518 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305519 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005520 .function = PM_GPIO_FUNC_NORMAL,
5521 .inv_int_pol = 0,
5522 },
5523 },
5524 { /* FHA/keypad gpio expanders */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305525 PM8058_GPIO_PM_TO_SYS(UI_INT3_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005526 {
5527 .direction = PM_GPIO_DIR_IN,
5528 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305529 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005530 .function = PM_GPIO_FUNC_NORMAL,
5531 .inv_int_pol = 0,
5532 },
5533 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005534 { /* Timpani Reset */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305535 PM8058_GPIO_PM_TO_SYS(20),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005536 {
5537 .direction = PM_GPIO_DIR_OUT,
5538 .output_value = 1,
5539 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5540 .pull = PM_GPIO_PULL_DN,
5541 .out_strength = PM_GPIO_STRENGTH_HIGH,
5542 .function = PM_GPIO_FUNC_NORMAL,
5543 .vin_sel = 2,
5544 .inv_int_pol = 0,
5545 }
5546 },
5547 { /* PMIC ID interrupt */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305548 PM8058_GPIO_PM_TO_SYS(36),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005549 {
5550 .direction = PM_GPIO_DIR_IN,
Anji jonnalaae745e92011-11-14 18:34:31 +05305551 .pull = PM_GPIO_PULL_NO,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005552 .function = PM_GPIO_FUNC_NORMAL,
5553 .vin_sel = 2,
5554 .inv_int_pol = 0,
5555 }
5556 },
5557 };
5558
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305559#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
5560 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305561 struct pm_gpio touchdisc_intr_gpio_cfg = {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305562 .direction = PM_GPIO_DIR_IN,
5563 .pull = PM_GPIO_PULL_UP_1P5,
5564 .vin_sel = 2,
5565 .function = PM_GPIO_FUNC_NORMAL,
5566 };
5567#endif
5568
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005569#if defined(CONFIG_HAPTIC_ISA1200) || \
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305570 defined(CONFIG_HAPTIC_ISA1200_MODULE)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305571 struct pm_gpio en_hap_gpio_cfg = {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305572 .direction = PM_GPIO_DIR_OUT,
5573 .pull = PM_GPIO_PULL_NO,
5574 .out_strength = PM_GPIO_STRENGTH_HIGH,
5575 .function = PM_GPIO_FUNC_NORMAL,
5576 .inv_int_pol = 0,
5577 .vin_sel = 2,
5578 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5579 .output_value = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005580 };
5581#endif
5582
5583#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
5584 struct pm8058_gpio_cfg line_in_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305585 PM8058_GPIO_PM_TO_SYS(18),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005586 {
5587 .direction = PM_GPIO_DIR_IN,
5588 .pull = PM_GPIO_PULL_UP_1P5,
5589 .vin_sel = 2,
5590 .function = PM_GPIO_FUNC_NORMAL,
5591 .inv_int_pol = 0,
5592 }
5593 };
5594#endif
5595
5596#if defined(CONFIG_QS_S5K4E1)
5597 {
5598 struct pm8058_gpio_cfg qs_hc37_cam_pd_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305599 PM8058_GPIO_PM_TO_SYS(26),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005600 {
5601 .direction = PM_GPIO_DIR_OUT,
5602 .output_value = 0,
5603 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5604 .pull = PM_GPIO_PULL_DN,
5605 .out_strength = PM_GPIO_STRENGTH_HIGH,
5606 .function = PM_GPIO_FUNC_NORMAL,
5607 .vin_sel = 2,
5608 .inv_int_pol = 0,
5609 }
5610 };
5611#endif
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005612#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5613 struct pm8058_gpio_cfg pmic_lcdc_nt35582_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305614 PM8058_GPIO_PM_TO_SYS(GPIO_NT35582_BL_EN_HW_PIN - 1),
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005615 {
5616 .direction = PM_GPIO_DIR_OUT,
5617 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5618 .output_value = 1,
5619 .pull = PM_GPIO_PULL_UP_30,
5620 /* 2.9V PM_GPIO_VIN_L2, which gives 2.6V */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305621 .vin_sel = PM8058_GPIO_VIN_L5,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005622 .out_strength = PM_GPIO_STRENGTH_HIGH,
5623 .function = PM_GPIO_FUNC_NORMAL,
5624 .inv_int_pol = 0,
5625 }
5626 };
5627#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005628#if defined(CONFIG_HAPTIC_ISA1200) || \
5629 defined(CONFIG_HAPTIC_ISA1200_MODULE)
5630 if (machine_is_msm8x60_fluid()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305631 rc = pm8xxx_gpio_config(
5632 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_ENABLE),
5633 &en_hap_gpio_cfg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005634 if (rc < 0) {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305635 pr_err("%s: pmic haptics gpio config failed\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005636 __func__);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305637 }
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305638 rc = pm8xxx_gpio_config(
5639 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_LDO_ENABLE),
5640 &en_hap_gpio_cfg);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305641 if (rc < 0) {
5642 pr_err("%s: pmic haptics ldo gpio config failed\n",
5643 __func__);
5644 }
5645
5646 }
5647#endif
5648
5649#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
5650 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
5651 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_surf() ||
5652 machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305653 rc = pm8xxx_gpio_config(
5654 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_TOUCH_DISC_INTR),
5655 &touchdisc_intr_gpio_cfg);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305656 if (rc < 0) {
5657 pr_err("%s: Touchdisc interrupt gpio config failed\n",
5658 __func__);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005659 }
5660 }
5661#endif
5662
5663#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
5664 /* Line_in only for 8660 ffa & surf */
5665 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_surf() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04005666 machine_is_msm8x60_fusion() || machine_is_msm8x60_dragon() ||
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005667 machine_is_msm8x60_fusn_ffa()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305668 rc = pm8xxx_gpio_config(line_in_gpio_cfg.gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005669 &line_in_gpio_cfg.cfg);
5670 if (rc < 0) {
5671 pr_err("%s pmic line_in gpio config failed\n",
5672 __func__);
5673 return rc;
5674 }
5675 }
5676#endif
5677
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005678#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5679 if (machine_is_msm8x60_dragon()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305680 rc = pm8xxx_gpio_config(pmic_lcdc_nt35582_gpio_cfg.gpio,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005681 &pmic_lcdc_nt35582_gpio_cfg.cfg);
5682 if (rc < 0) {
5683 pr_err("%s pmic gpio config failed\n", __func__);
5684 return rc;
5685 }
5686 }
5687#endif
5688
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005689#if defined(CONFIG_QS_S5K4E1)
5690 /* qs_cam_hc37_cam_pd only for 8660 fluid qs camera*/
5691 if (machine_is_msm8x60_fluid()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305692 rc = pm8xxx_gpio_config(qs_hc37_cam_pd_gpio_cfg.gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005693 &qs_hc37_cam_pd_gpio_cfg.cfg);
5694 if (rc < 0) {
5695 pr_err("%s pmic qs_hc37_cam_pd gpio config failed\n",
5696 __func__);
5697 return rc;
5698 }
5699 }
5700 }
5701#endif
5702
5703 for (i = 0; i < ARRAY_SIZE(gpio_cfgs); ++i) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305704 rc = pm8xxx_gpio_config(gpio_cfgs[i].gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005705 &gpio_cfgs[i].cfg);
5706 if (rc < 0) {
5707 pr_err("%s pmic gpio config failed\n",
5708 __func__);
5709 return rc;
5710 }
5711 }
5712
5713 return 0;
5714}
5715
5716static const unsigned int ffa_keymap[] = {
5717 KEY(0, 0, KEY_FN_F1), /* LS - PUSH1 */
5718 KEY(0, 1, KEY_UP), /* NAV - UP */
5719 KEY(0, 2, KEY_LEFT), /* NAV - LEFT */
5720 KEY(0, 3, KEY_VOLUMEUP), /* Shuttle SW_UP */
5721
5722 KEY(1, 0, KEY_FN_F2), /* LS - PUSH2 */
5723 KEY(1, 1, KEY_RIGHT), /* NAV - RIGHT */
5724 KEY(1, 2, KEY_DOWN), /* NAV - DOWN */
5725 KEY(1, 3, KEY_VOLUMEDOWN),
5726
5727 KEY(2, 3, KEY_ENTER), /* SW_PUSH key */
5728
5729 KEY(4, 0, KEY_CAMERA_FOCUS), /* RS - PUSH1 */
5730 KEY(4, 1, KEY_UP), /* USER_UP */
5731 KEY(4, 2, KEY_LEFT), /* USER_LEFT */
5732 KEY(4, 3, KEY_HOME), /* Right switch: MIC Bd */
5733 KEY(4, 4, KEY_FN_F3), /* Reserved MIC */
5734
5735 KEY(5, 0, KEY_CAMERA), /* RS - PUSH2 */
5736 KEY(5, 1, KEY_RIGHT), /* USER_RIGHT */
5737 KEY(5, 2, KEY_DOWN), /* USER_DOWN */
5738 KEY(5, 3, KEY_BACK), /* Left switch: MIC */
5739 KEY(5, 4, KEY_MENU), /* Center switch: MIC */
5740};
5741
Zhang Chang Ken683be172011-08-10 17:45:34 -04005742static const unsigned int dragon_keymap[] = {
5743 KEY(0, 0, KEY_MENU),
5744 KEY(0, 2, KEY_1),
5745 KEY(0, 3, KEY_4),
5746 KEY(0, 4, KEY_7),
5747
5748 KEY(1, 0, KEY_UP),
5749 KEY(1, 1, KEY_LEFT),
5750 KEY(1, 2, KEY_DOWN),
5751 KEY(1, 3, KEY_5),
5752 KEY(1, 4, KEY_8),
5753
5754 KEY(2, 0, KEY_HOME),
5755 KEY(2, 1, KEY_REPLY),
5756 KEY(2, 2, KEY_2),
5757 KEY(2, 3, KEY_6),
5758 KEY(2, 4, KEY_0),
5759
5760 KEY(3, 0, KEY_VOLUMEUP),
5761 KEY(3, 1, KEY_RIGHT),
5762 KEY(3, 2, KEY_3),
5763 KEY(3, 3, KEY_9),
5764 KEY(3, 4, KEY_SWITCHVIDEOMODE),
5765
5766 KEY(4, 0, KEY_VOLUMEDOWN),
5767 KEY(4, 1, KEY_BACK),
5768 KEY(4, 2, KEY_CAMERA),
5769 KEY(4, 3, KEY_KBDILLUMTOGGLE),
5770};
5771
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005772static struct matrix_keymap_data ffa_keymap_data = {
5773 .keymap_size = ARRAY_SIZE(ffa_keymap),
5774 .keymap = ffa_keymap,
5775};
5776
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305777static struct pm8xxx_keypad_platform_data ffa_keypad_data = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005778 .input_name = "ffa-keypad",
5779 .input_phys_device = "ffa-keypad/input0",
5780 .num_rows = 6,
5781 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305782 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5783 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5784 .debounce_ms = 15,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005785 .scan_delay_ms = 32,
5786 .row_hold_ns = 91500,
5787 .wakeup = 1,
5788 .keymap_data = &ffa_keymap_data,
5789};
5790
Zhang Chang Ken683be172011-08-10 17:45:34 -04005791static struct matrix_keymap_data dragon_keymap_data = {
5792 .keymap_size = ARRAY_SIZE(dragon_keymap),
5793 .keymap = dragon_keymap,
5794};
5795
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305796static struct pm8xxx_keypad_platform_data dragon_keypad_data = {
Zhang Chang Ken683be172011-08-10 17:45:34 -04005797 .input_name = "dragon-keypad",
5798 .input_phys_device = "dragon-keypad/input0",
5799 .num_rows = 6,
5800 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305801 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5802 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5803 .debounce_ms = 15,
Zhang Chang Ken683be172011-08-10 17:45:34 -04005804 .scan_delay_ms = 32,
5805 .row_hold_ns = 91500,
5806 .wakeup = 1,
5807 .keymap_data = &dragon_keymap_data,
5808};
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305809
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005810static const unsigned int fluid_keymap[] = {
5811 KEY(0, 0, KEY_FN_F1), /* LS - PUSH1 */
5812 KEY(0, 1, KEY_UP), /* NAV - UP */
5813 KEY(0, 2, KEY_LEFT), /* NAV - LEFT */
5814 KEY(0, 3, KEY_VOLUMEDOWN), /* Shuttle SW_UP */
5815
5816 KEY(1, 0, KEY_FN_F2), /* LS - PUSH2 */
5817 KEY(1, 1, KEY_RIGHT), /* NAV - RIGHT */
5818 KEY(1, 2, KEY_DOWN), /* NAV - DOWN */
5819 KEY(1, 3, KEY_VOLUMEUP),
5820
5821 KEY(2, 3, KEY_ENTER), /* SW_PUSH key */
5822
5823 KEY(4, 0, KEY_CAMERA_FOCUS), /* RS - PUSH1 */
5824 KEY(4, 1, KEY_UP), /* USER_UP */
5825 KEY(4, 2, KEY_LEFT), /* USER_LEFT */
5826 KEY(4, 3, KEY_HOME), /* Right switch: MIC Bd */
5827 KEY(4, 4, KEY_FN_F3), /* Reserved MIC */
5828
Jilai Wang9a895102011-07-12 14:00:35 -04005829 KEY(5, 0, KEY_CAMERA), /* RS - PUSH2 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005830 KEY(5, 1, KEY_RIGHT), /* USER_RIGHT */
5831 KEY(5, 2, KEY_DOWN), /* USER_DOWN */
5832 KEY(5, 3, KEY_BACK), /* Left switch: MIC */
5833 KEY(5, 4, KEY_MENU), /* Center switch: MIC */
5834};
5835
5836static struct matrix_keymap_data fluid_keymap_data = {
5837 .keymap_size = ARRAY_SIZE(fluid_keymap),
5838 .keymap = fluid_keymap,
5839};
5840
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305841static struct pm8xxx_keypad_platform_data fluid_keypad_data = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005842 .input_name = "fluid-keypad",
5843 .input_phys_device = "fluid-keypad/input0",
5844 .num_rows = 6,
5845 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305846 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5847 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5848 .debounce_ms = 15,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005849 .scan_delay_ms = 32,
5850 .row_hold_ns = 91500,
5851 .wakeup = 1,
5852 .keymap_data = &fluid_keymap_data,
5853};
5854
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305855static struct pm8xxx_vibrator_platform_data pm8058_vib_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005856 .initial_vibrate_ms = 500,
5857 .level_mV = 3000,
5858 .max_timeout_ms = 15000,
5859};
5860
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305861static struct pm8xxx_rtc_platform_data pm8058_rtc_pdata = {
5862 .rtc_write_enable = false,
5863 .rtc_alarm_powerup = false,
5864};
5865
5866static struct pm8xxx_pwrkey_platform_data pm8058_pwrkey_pdata = {
5867 .pull_up = 1,
Jing Lineecdc062011-11-17 09:47:09 -08005868 .kpd_trigger_delay_us = 15625,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305869 .wakeup = 1,
5870};
5871
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005872#define PM8058_LINE_IN_DET_GPIO PM8058_GPIO_PM_TO_SYS(18)
5873
5874static struct othc_accessory_info othc_accessories[] = {
5875 {
5876 .accessory = OTHC_SVIDEO_OUT,
5877 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_SWITCH_DETECT
5878 | OTHC_ADC_DETECT,
5879 .key_code = SW_VIDEOOUT_INSERT,
5880 .enabled = false,
5881 .adc_thres = {
5882 .min_threshold = 20,
5883 .max_threshold = 40,
5884 },
5885 },
5886 {
5887 .accessory = OTHC_ANC_HEADPHONE,
5888 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_GPIO_DETECT |
5889 OTHC_SWITCH_DETECT,
5890 .gpio = PM8058_LINE_IN_DET_GPIO,
5891 .active_low = 1,
5892 .key_code = SW_HEADPHONE_INSERT,
5893 .enabled = true,
5894 },
5895 {
5896 .accessory = OTHC_ANC_HEADSET,
5897 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_GPIO_DETECT,
5898 .gpio = PM8058_LINE_IN_DET_GPIO,
5899 .active_low = 1,
5900 .key_code = SW_HEADPHONE_INSERT,
5901 .enabled = true,
5902 },
5903 {
5904 .accessory = OTHC_HEADPHONE,
5905 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_SWITCH_DETECT,
5906 .key_code = SW_HEADPHONE_INSERT,
5907 .enabled = true,
5908 },
5909 {
5910 .accessory = OTHC_MICROPHONE,
5911 .detect_flags = OTHC_GPIO_DETECT,
5912 .gpio = PM8058_LINE_IN_DET_GPIO,
5913 .active_low = 1,
5914 .key_code = SW_MICROPHONE_INSERT,
5915 .enabled = true,
5916 },
5917 {
5918 .accessory = OTHC_HEADSET,
5919 .detect_flags = OTHC_MICBIAS_DETECT,
5920 .key_code = SW_HEADPHONE_INSERT,
5921 .enabled = true,
5922 },
5923};
5924
5925static struct othc_switch_info switch_info[] = {
5926 {
5927 .min_adc_threshold = 0,
5928 .max_adc_threshold = 100,
5929 .key_code = KEY_PLAYPAUSE,
5930 },
5931 {
5932 .min_adc_threshold = 100,
5933 .max_adc_threshold = 200,
5934 .key_code = KEY_REWIND,
5935 },
5936 {
5937 .min_adc_threshold = 200,
5938 .max_adc_threshold = 500,
5939 .key_code = KEY_FASTFORWARD,
5940 },
5941};
5942
5943static struct othc_n_switch_config switch_config = {
5944 .voltage_settling_time_ms = 0,
5945 .num_adc_samples = 3,
5946 .adc_channel = CHANNEL_ADC_HDSET,
5947 .switch_info = switch_info,
5948 .num_keys = ARRAY_SIZE(switch_info),
5949 .default_sw_en = true,
5950 .default_sw_idx = 0,
5951};
5952
5953static struct hsed_bias_config hsed_bias_config = {
5954 /* HSED mic bias config info */
5955 .othc_headset = OTHC_HEADSET_NO,
5956 .othc_lowcurr_thresh_uA = 100,
5957 .othc_highcurr_thresh_uA = 600,
5958 .othc_hyst_prediv_us = 7800,
5959 .othc_period_clkdiv_us = 62500,
5960 .othc_hyst_clk_us = 121000,
5961 .othc_period_clk_us = 312500,
5962 .othc_wakeup = 1,
5963};
5964
5965static struct othc_hsed_config hsed_config_1 = {
5966 .hsed_bias_config = &hsed_bias_config,
5967 /*
5968 * The detection delay and switch reporting delay are
5969 * required to encounter a hardware bug (spurious switch
5970 * interrupts on slow insertion/removal of the headset).
5971 * This will introduce a delay in reporting the accessory
5972 * insertion and removal to the userspace.
5973 */
5974 .detection_delay_ms = 1500,
5975 /* Switch info */
5976 .switch_debounce_ms = 1500,
5977 .othc_support_n_switch = false,
5978 .switch_config = &switch_config,
5979 .ir_gpio = -1,
5980 /* Accessory info */
5981 .accessories_support = true,
5982 .accessories = othc_accessories,
5983 .othc_num_accessories = ARRAY_SIZE(othc_accessories),
5984};
5985
5986static struct othc_regulator_config othc_reg = {
5987 .regulator = "8058_l5",
5988 .max_uV = 2850000,
5989 .min_uV = 2850000,
5990};
5991
5992/* MIC_BIAS0 is configured as normal MIC BIAS */
5993static struct pmic8058_othc_config_pdata othc_config_pdata_0 = {
5994 .micbias_select = OTHC_MICBIAS_0,
5995 .micbias_capability = OTHC_MICBIAS,
5996 .micbias_enable = OTHC_SIGNAL_OFF,
5997 .micbias_regulator = &othc_reg,
5998};
5999
6000/* MIC_BIAS1 is configured as HSED_BIAS for OTHC */
6001static struct pmic8058_othc_config_pdata othc_config_pdata_1 = {
6002 .micbias_select = OTHC_MICBIAS_1,
6003 .micbias_capability = OTHC_MICBIAS_HSED,
6004 .micbias_enable = OTHC_SIGNAL_PWM_TCXO,
6005 .micbias_regulator = &othc_reg,
6006 .hsed_config = &hsed_config_1,
6007 .hsed_name = "8660_handset",
6008};
6009
6010/* MIC_BIAS2 is configured as normal MIC BIAS */
6011static struct pmic8058_othc_config_pdata othc_config_pdata_2 = {
6012 .micbias_select = OTHC_MICBIAS_2,
6013 .micbias_capability = OTHC_MICBIAS,
6014 .micbias_enable = OTHC_SIGNAL_OFF,
6015 .micbias_regulator = &othc_reg,
6016};
6017
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006018
6019static void __init msm8x60_init_pm8058_othc(void)
6020{
6021 int i;
6022
6023 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2 ||
6024 machine_is_msm8x60_fluid() || machine_is_msm8x60_fusion() ||
6025 machine_is_msm8x60_fusn_ffa()) {
6026 /* 3-switch headset supported only by V2 FFA and FLUID */
6027 hsed_config_1.accessories_adc_support = true,
6028 /* ADC based accessory detection works only on V2 and FLUID */
6029 hsed_config_1.accessories_adc_channel = CHANNEL_ADC_HDSET,
6030 hsed_config_1.othc_support_n_switch = true;
6031 }
6032
6033 /* IR GPIO is absent on FLUID */
6034 if (machine_is_msm8x60_fluid())
6035 hsed_config_1.ir_gpio = -1;
6036
6037 for (i = 0; i < ARRAY_SIZE(othc_accessories); i++) {
6038 if (machine_is_msm8x60_fluid()) {
6039 switch (othc_accessories[i].accessory) {
6040 case OTHC_ANC_HEADPHONE:
6041 case OTHC_ANC_HEADSET:
6042 othc_accessories[i].gpio = GPIO_HEADSET_DET_N;
6043 break;
6044 case OTHC_MICROPHONE:
6045 othc_accessories[i].enabled = false;
6046 break;
6047 case OTHC_SVIDEO_OUT:
6048 othc_accessories[i].enabled = true;
6049 hsed_config_1.video_out_gpio = GPIO_HS_SW_DIR;
6050 break;
6051 }
6052 }
6053 }
6054}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006055
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006056
6057static int pm8058_pwm_config(struct pwm_device *pwm, int ch, int on)
6058{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306059 struct pm_gpio pwm_gpio_config = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006060 .direction = PM_GPIO_DIR_OUT,
6061 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
6062 .output_value = 0,
6063 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306064 .vin_sel = PM8058_GPIO_VIN_VPH,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006065 .out_strength = PM_GPIO_STRENGTH_HIGH,
6066 .function = PM_GPIO_FUNC_2,
6067 };
6068
6069 int rc = -EINVAL;
6070 int id, mode, max_mA;
6071
6072 id = mode = max_mA = 0;
6073 switch (ch) {
6074 case 0:
6075 case 1:
6076 case 2:
6077 if (on) {
6078 id = 24 + ch;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306079 rc = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(id - 1),
6080 &pwm_gpio_config);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006081 if (rc)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306082 pr_err("%s: pm8xxx_gpio_config(%d): rc=%d\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006083 __func__, id, rc);
6084 }
6085 break;
6086
6087 case 6:
6088 id = PM_PWM_LED_FLASH;
6089 mode = PM_PWM_CONF_PWM1;
6090 max_mA = 300;
6091 break;
6092
6093 case 7:
6094 id = PM_PWM_LED_FLASH1;
6095 mode = PM_PWM_CONF_PWM1;
6096 max_mA = 300;
6097 break;
6098
6099 default:
6100 break;
6101 }
6102
6103 if (ch >= 6 && ch <= 7) {
6104 if (!on) {
6105 mode = PM_PWM_CONF_NONE;
6106 max_mA = 0;
6107 }
6108 rc = pm8058_pwm_config_led(pwm, id, mode, max_mA);
6109 if (rc)
6110 pr_err("%s: pm8058_pwm_config_led(ch=%d): rc=%d\n",
6111 __func__, ch, rc);
6112 }
6113 return rc;
6114
6115}
6116
6117static struct pm8058_pwm_pdata pm8058_pwm_data = {
6118 .config = pm8058_pwm_config,
6119};
6120
6121#define PM8058_GPIO_INT 88
6122
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006123static struct pmic8058_led pmic8058_flash_leds[] = {
6124 [0] = {
6125 .name = "camera:flash0",
6126 .max_brightness = 15,
6127 .id = PMIC8058_ID_FLASH_LED_0,
6128 },
6129 [1] = {
6130 .name = "camera:flash1",
6131 .max_brightness = 15,
6132 .id = PMIC8058_ID_FLASH_LED_1,
6133 },
6134};
6135
6136static struct pmic8058_leds_platform_data pm8058_flash_leds_data = {
6137 .num_leds = ARRAY_SIZE(pmic8058_flash_leds),
6138 .leds = pmic8058_flash_leds,
6139};
6140
Terence Hampsonc0b6dfb2011-07-15 11:07:17 -04006141static struct pmic8058_led pmic8058_dragon_leds[] = {
6142 [0] = {
6143 /* RED */
6144 .name = "led_drv0",
6145 .max_brightness = 15,
6146 .id = PMIC8058_ID_LED_0,
6147 },/* 300 mA flash led0 drv sink */
6148 [1] = {
6149 /* Yellow */
6150 .name = "led_drv1",
6151 .max_brightness = 15,
6152 .id = PMIC8058_ID_LED_1,
6153 },/* 300 mA flash led0 drv sink */
6154 [2] = {
6155 /* Green */
6156 .name = "led_drv2",
6157 .max_brightness = 15,
6158 .id = PMIC8058_ID_LED_2,
6159 },/* 300 mA flash led0 drv sink */
6160 [3] = {
6161 .name = "led_psensor",
6162 .max_brightness = 15,
6163 .id = PMIC8058_ID_LED_KB_LIGHT,
6164 },/* 300 mA flash led0 drv sink */
6165};
6166
6167static struct pmic8058_leds_platform_data pm8058_dragon_leds_data = {
6168 .num_leds = ARRAY_SIZE(pmic8058_dragon_leds),
6169 .leds = pmic8058_dragon_leds,
6170};
6171
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006172static struct pmic8058_led pmic8058_fluid_flash_leds[] = {
6173 [0] = {
6174 .name = "led:drv0",
6175 .max_brightness = 15,
6176 .id = PMIC8058_ID_FLASH_LED_0,
6177 },/* 300 mA flash led0 drv sink */
6178 [1] = {
6179 .name = "led:drv1",
6180 .max_brightness = 15,
6181 .id = PMIC8058_ID_FLASH_LED_1,
6182 },/* 300 mA flash led1 sink */
6183 [2] = {
6184 .name = "led:drv2",
6185 .max_brightness = 20,
6186 .id = PMIC8058_ID_LED_0,
6187 },/* 40 mA led0 sink */
6188 [3] = {
6189 .name = "keypad:drv",
6190 .max_brightness = 15,
6191 .id = PMIC8058_ID_LED_KB_LIGHT,
6192 },/* 300 mA keypad drv sink */
6193};
6194
6195static struct pmic8058_leds_platform_data pm8058_fluid_flash_leds_data = {
6196 .num_leds = ARRAY_SIZE(pmic8058_fluid_flash_leds),
6197 .leds = pmic8058_fluid_flash_leds,
6198};
6199
Terence Hampson90508a92011-08-09 10:40:08 -04006200static struct pmic8058_charger_data pmic8058_charger_dragon = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306201 .charger_data_valid = true,
Terence Hampson90508a92011-08-09 10:40:08 -04006202 .max_source_current = 1800,
6203 .charger_type = CHG_TYPE_AC,
6204};
6205
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306206static struct pmic8058_charger_data pmic8058_charger_ffa_surf = {
6207 .charger_data_valid = false,
6208};
6209
6210static struct pm8xxx_misc_platform_data pm8058_misc_pdata = {
6211 .priority = 0,
6212};
6213
6214static struct pm8xxx_irq_platform_data pm8058_irq_pdata = {
6215 .irq_base = PM8058_IRQ_BASE,
6216 .devirq = MSM_GPIO_TO_INT(PM8058_GPIO_INT),
6217 .irq_trigger_flag = IRQF_TRIGGER_LOW,
6218};
6219
6220static struct pm8xxx_gpio_platform_data pm8058_gpio_pdata = {
6221 .gpio_base = PM8058_GPIO_PM_TO_SYS(0),
6222};
6223
6224static struct pm8xxx_mpp_platform_data pm8058_mpp_pdata = {
6225 .mpp_base = PM8058_MPP_PM_TO_SYS(0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006226};
6227
6228static struct pm8058_platform_data pm8058_platform_data = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306229 .irq_pdata = &pm8058_irq_pdata,
6230 .gpio_pdata = &pm8058_gpio_pdata,
6231 .mpp_pdata = &pm8058_mpp_pdata,
6232 .rtc_pdata = &pm8058_rtc_pdata,
6233 .pwrkey_pdata = &pm8058_pwrkey_pdata,
6234 .othc0_pdata = &othc_config_pdata_0,
6235 .othc1_pdata = &othc_config_pdata_1,
6236 .othc2_pdata = &othc_config_pdata_2,
6237 .pwm_pdata = &pm8058_pwm_data,
6238 .misc_pdata = &pm8058_misc_pdata,
6239#ifdef CONFIG_SENSORS_MSM_ADC
6240 .xoadc_pdata = &pm8058_xoadc_pdata,
6241#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006242};
6243
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05306244#ifdef CONFIG_MSM_SSBI
6245static struct msm_ssbi_platform_data msm8x60_ssbi_pm8058_pdata __devinitdata = {
6246 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
6247 .slave = {
6248 .name = "pm8058-core",
6249 .platform_data = &pm8058_platform_data,
6250 },
6251};
6252#endif
6253#endif /* CONFIG_PMIC8058 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006254
6255#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
6256 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
6257#define TDISC_I2C_SLAVE_ADDR 0x67
6258#define PMIC_GPIO_TDISC PM8058_GPIO_PM_TO_SYS(5)
6259#define TDISC_INT PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 5)
6260
6261static const char *vregs_tdisc_name[] = {
6262 "8058_l5",
6263 "8058_s3",
6264};
6265
6266static const int vregs_tdisc_val[] = {
6267 2850000,/* uV */
6268 1800000,
6269};
6270static struct regulator *vregs_tdisc[ARRAY_SIZE(vregs_tdisc_name)];
6271
6272static int tdisc_shinetsu_setup(void)
6273{
6274 int rc, i;
6275
6276 rc = gpio_request(PMIC_GPIO_TDISC, "tdisc_interrupt");
6277 if (rc) {
6278 pr_err("%s: gpio_request failed for PMIC_GPIO_TDISC\n",
6279 __func__);
6280 return rc;
6281 }
6282
6283 rc = gpio_request(GPIO_JOYSTICK_EN, "tdisc_oe");
6284 if (rc) {
6285 pr_err("%s: gpio_request failed for GPIO_JOYSTICK_EN\n",
6286 __func__);
6287 goto fail_gpio_oe;
6288 }
6289
6290 rc = gpio_direction_output(GPIO_JOYSTICK_EN, 1);
6291 if (rc) {
6292 pr_err("%s: gpio_direction_output failed for GPIO_JOYSTICK_EN\n",
6293 __func__);
6294 gpio_free(GPIO_JOYSTICK_EN);
6295 goto fail_gpio_oe;
6296 }
6297
6298 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6299 vregs_tdisc[i] = regulator_get(NULL, vregs_tdisc_name[i]);
6300 if (IS_ERR(vregs_tdisc[i])) {
6301 printk(KERN_ERR "%s: regulator get %s failed (%ld)\n",
6302 __func__, vregs_tdisc_name[i],
6303 PTR_ERR(vregs_tdisc[i]));
6304 rc = PTR_ERR(vregs_tdisc[i]);
6305 goto vreg_get_fail;
6306 }
6307
6308 rc = regulator_set_voltage(vregs_tdisc[i],
6309 vregs_tdisc_val[i], vregs_tdisc_val[i]);
6310 if (rc) {
6311 printk(KERN_ERR "%s: regulator_set_voltage() = %d\n",
6312 __func__, rc);
6313 goto vreg_set_voltage_fail;
6314 }
6315 }
6316
6317 return rc;
6318vreg_set_voltage_fail:
6319 i++;
6320vreg_get_fail:
6321 while (i)
6322 regulator_put(vregs_tdisc[--i]);
6323fail_gpio_oe:
6324 gpio_free(PMIC_GPIO_TDISC);
6325 return rc;
6326}
6327
6328static void tdisc_shinetsu_release(void)
6329{
6330 int i;
6331
6332 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++)
6333 regulator_put(vregs_tdisc[i]);
6334
6335 gpio_free(PMIC_GPIO_TDISC);
6336 gpio_free(GPIO_JOYSTICK_EN);
6337}
6338
6339static int tdisc_shinetsu_enable(void)
6340{
6341 int i, rc = -EINVAL;
6342
6343 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6344 rc = regulator_enable(vregs_tdisc[i]);
6345 if (rc < 0) {
6346 printk(KERN_ERR "%s: vreg %s enable failed (%d)\n",
6347 __func__, vregs_tdisc_name[i], rc);
6348 goto vreg_fail;
6349 }
6350 }
6351
6352 /* Enable the OE (output enable) gpio */
6353 gpio_set_value_cansleep(GPIO_JOYSTICK_EN, 1);
6354 /* voltage and gpio stabilization delay */
6355 msleep(50);
6356
6357 return 0;
6358vreg_fail:
6359 while (i)
6360 regulator_disable(vregs_tdisc[--i]);
6361 return rc;
6362}
6363
6364static int tdisc_shinetsu_disable(void)
6365{
6366 int i, rc;
6367
6368 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6369 rc = regulator_disable(vregs_tdisc[i]);
6370 if (rc < 0) {
6371 printk(KERN_ERR "%s: vreg %s disable failed (%d)\n",
6372 __func__, vregs_tdisc_name[i], rc);
6373 goto tdisc_reg_fail;
6374 }
6375 }
6376
6377 /* Disable the OE (output enable) gpio */
6378 gpio_set_value_cansleep(GPIO_JOYSTICK_EN, 0);
6379
6380 return 0;
6381
6382tdisc_reg_fail:
6383 while (i)
6384 regulator_enable(vregs_tdisc[--i]);
6385 return rc;
6386}
6387
6388static struct tdisc_abs_values tdisc_abs = {
6389 .x_max = 32,
6390 .y_max = 32,
6391 .x_min = -32,
6392 .y_min = -32,
6393 .pressure_max = 32,
6394 .pressure_min = 0,
6395};
6396
6397static struct tdisc_platform_data tdisc_data = {
6398 .tdisc_setup = tdisc_shinetsu_setup,
6399 .tdisc_release = tdisc_shinetsu_release,
6400 .tdisc_enable = tdisc_shinetsu_enable,
6401 .tdisc_disable = tdisc_shinetsu_disable,
6402 .tdisc_wakeup = 0,
6403 .tdisc_gpio = PMIC_GPIO_TDISC,
6404 .tdisc_report_keys = true,
6405 .tdisc_report_relative = true,
6406 .tdisc_report_absolute = false,
6407 .tdisc_report_wheel = false,
6408 .tdisc_reverse_x = false,
6409 .tdisc_reverse_y = true,
6410 .tdisc_abs = &tdisc_abs,
6411};
6412
6413static struct i2c_board_info msm_i2c_gsbi3_tdisc_info[] = {
6414 {
6415 I2C_BOARD_INFO("vtd518", TDISC_I2C_SLAVE_ADDR),
6416 .irq = TDISC_INT,
6417 .platform_data = &tdisc_data,
6418 },
6419};
6420#endif
6421
6422#define PM_GPIO_CDC_RST_N 20
6423#define GPIO_CDC_RST_N PM8058_GPIO_PM_TO_SYS(PM_GPIO_CDC_RST_N)
6424
6425static struct regulator *vreg_timpani_1;
6426static struct regulator *vreg_timpani_2;
6427
6428static unsigned int msm_timpani_setup_power(void)
6429{
6430 int rc;
6431
6432 vreg_timpani_1 = regulator_get(NULL, "8058_l0");
6433 if (IS_ERR(vreg_timpani_1)) {
6434 pr_err("%s: Unable to get 8058_l0\n", __func__);
6435 return -ENODEV;
6436 }
6437
6438 vreg_timpani_2 = regulator_get(NULL, "8058_s3");
6439 if (IS_ERR(vreg_timpani_2)) {
6440 pr_err("%s: Unable to get 8058_s3\n", __func__);
6441 regulator_put(vreg_timpani_1);
6442 return -ENODEV;
6443 }
6444
6445 rc = regulator_set_voltage(vreg_timpani_1, 1200000, 1200000);
6446 if (rc) {
6447 pr_err("%s: unable to set L0 voltage to 1.2V\n", __func__);
6448 goto fail;
6449 }
6450
6451 rc = regulator_set_voltage(vreg_timpani_2, 1800000, 1800000);
6452 if (rc) {
6453 pr_err("%s: unable to set S3 voltage to 1.8V\n", __func__);
6454 goto fail;
6455 }
6456
6457 rc = regulator_enable(vreg_timpani_1);
6458 if (rc) {
6459 pr_err("%s: Enable regulator 8058_l0 failed\n", __func__);
6460 goto fail;
6461 }
6462
6463 /* The settings for LDO0 should be set such that
6464 * it doesn't require to reset the timpani. */
6465 rc = regulator_set_optimum_mode(vreg_timpani_1, 5000);
6466 if (rc < 0) {
6467 pr_err("Timpani regulator optimum mode setting failed\n");
6468 goto fail;
6469 }
6470
6471 rc = regulator_enable(vreg_timpani_2);
6472 if (rc) {
6473 pr_err("%s: Enable regulator 8058_s3 failed\n", __func__);
6474 regulator_disable(vreg_timpani_1);
6475 goto fail;
6476 }
6477
6478 rc = gpio_request(GPIO_CDC_RST_N, "CDC_RST_N");
6479 if (rc) {
6480 pr_err("%s: GPIO Request %d failed\n", __func__,
6481 GPIO_CDC_RST_N);
6482 regulator_disable(vreg_timpani_1);
6483 regulator_disable(vreg_timpani_2);
6484 goto fail;
6485 } else {
6486 gpio_direction_output(GPIO_CDC_RST_N, 1);
6487 usleep_range(1000, 1050);
6488 gpio_direction_output(GPIO_CDC_RST_N, 0);
6489 usleep_range(1000, 1050);
6490 gpio_direction_output(GPIO_CDC_RST_N, 1);
6491 gpio_free(GPIO_CDC_RST_N);
6492 }
6493 return rc;
6494
6495fail:
6496 regulator_put(vreg_timpani_1);
6497 regulator_put(vreg_timpani_2);
6498 return rc;
6499}
6500
6501static void msm_timpani_shutdown_power(void)
6502{
6503 int rc;
6504
6505 rc = regulator_disable(vreg_timpani_1);
6506 if (rc)
6507 pr_err("%s: Disable regulator 8058_l0 failed\n", __func__);
6508
6509 regulator_put(vreg_timpani_1);
6510
6511 rc = regulator_disable(vreg_timpani_2);
6512 if (rc)
6513 pr_err("%s: Disable regulator 8058_s3 failed\n", __func__);
6514
6515 regulator_put(vreg_timpani_2);
6516}
6517
6518/* Power analog function of codec */
6519static struct regulator *vreg_timpani_cdc_apwr;
6520static int msm_timpani_codec_power(int vreg_on)
6521{
6522 int rc = 0;
6523
6524 if (!vreg_timpani_cdc_apwr) {
6525
6526 vreg_timpani_cdc_apwr = regulator_get(NULL, "8058_s4");
6527
6528 if (IS_ERR(vreg_timpani_cdc_apwr)) {
6529 pr_err("%s: vreg_get failed (%ld)\n",
6530 __func__, PTR_ERR(vreg_timpani_cdc_apwr));
6531 rc = PTR_ERR(vreg_timpani_cdc_apwr);
6532 return rc;
6533 }
6534 }
6535
6536 if (vreg_on) {
6537
6538 rc = regulator_set_voltage(vreg_timpani_cdc_apwr,
6539 2200000, 2200000);
6540 if (rc) {
6541 pr_err("%s: unable to set 8058_s4 voltage to 2.2 V\n",
6542 __func__);
6543 goto vreg_fail;
6544 }
6545
6546 rc = regulator_enable(vreg_timpani_cdc_apwr);
6547 if (rc) {
6548 pr_err("%s: vreg_enable failed %d\n", __func__, rc);
6549 goto vreg_fail;
6550 }
6551 } else {
6552 rc = regulator_disable(vreg_timpani_cdc_apwr);
6553 if (rc) {
6554 pr_err("%s: vreg_disable failed %d\n",
6555 __func__, rc);
6556 goto vreg_fail;
6557 }
6558 }
6559
6560 return 0;
6561
6562vreg_fail:
6563 regulator_put(vreg_timpani_cdc_apwr);
6564 vreg_timpani_cdc_apwr = NULL;
6565 return rc;
6566}
6567
6568static struct marimba_codec_platform_data timpani_codec_pdata = {
6569 .marimba_codec_power = msm_timpani_codec_power,
6570};
6571
6572#define TIMPANI_SLAVE_ID_CDC_ADDR 0X77
6573#define TIMPANI_SLAVE_ID_QMEMBIST_ADDR 0X66
6574
6575static struct marimba_platform_data timpani_pdata = {
6576 .slave_id[MARIMBA_SLAVE_ID_CDC] = TIMPANI_SLAVE_ID_CDC_ADDR,
6577 .slave_id[MARIMBA_SLAVE_ID_QMEMBIST] = TIMPANI_SLAVE_ID_QMEMBIST_ADDR,
6578 .marimba_setup = msm_timpani_setup_power,
6579 .marimba_shutdown = msm_timpani_shutdown_power,
6580 .codec = &timpani_codec_pdata,
6581 .tsadc_ssbi_adap = MARIMBA_SSBI_ADAP,
6582};
6583
6584#define TIMPANI_I2C_SLAVE_ADDR 0xD
6585
6586static struct i2c_board_info msm_i2c_gsbi7_timpani_info[] = {
6587 {
6588 I2C_BOARD_INFO("timpani", TIMPANI_I2C_SLAVE_ADDR),
6589 .platform_data = &timpani_pdata,
6590 },
6591};
6592
Lei Zhou338cab82011-08-19 13:38:17 -04006593#ifdef CONFIG_SND_SOC_WM8903
6594static struct wm8903_platform_data wm8903_pdata = {
6595 .gpio_cfg[2] = 0x3A8,
6596};
6597
6598#define WM8903_I2C_SLAVE_ADDR 0x34
6599static struct i2c_board_info wm8903_codec_i2c_info[] = {
6600 {
6601 I2C_BOARD_INFO("wm8903", WM8903_I2C_SLAVE_ADDR >> 1),
6602 .platform_data = &wm8903_pdata,
6603 },
6604};
6605#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006606#ifdef CONFIG_PMIC8901
6607
6608#define PM8901_GPIO_INT 91
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006609/*
6610 * Consumer specific regulator names:
6611 * regulator name consumer dev_name
6612 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006613static struct regulator_consumer_supply vreg_consumers_8901_USB_OTG[] = {
6614 REGULATOR_SUPPLY("8901_usb_otg", NULL),
6615};
6616static struct regulator_consumer_supply vreg_consumers_8901_HDMI_MVS[] = {
6617 REGULATOR_SUPPLY("8901_hdmi_mvs", NULL),
6618};
6619
6620#define PM8901_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306621 _always_on) \
6622 { \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006623 .init_data = { \
6624 .constraints = { \
6625 .valid_modes_mask = _modes, \
6626 .valid_ops_mask = _ops, \
6627 .min_uV = _min_uV, \
6628 .max_uV = _max_uV, \
6629 .input_uV = _min_uV, \
6630 .apply_uV = _apply_uV, \
6631 .always_on = _always_on, \
6632 }, \
6633 .consumer_supplies = vreg_consumers_8901_##_id, \
6634 .num_consumer_supplies = \
6635 ARRAY_SIZE(vreg_consumers_8901_##_id), \
6636 }, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306637 .id = PM8901_VREG_ID_##_id, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006638 }
6639
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006640#define PM8901_VREG_INIT_VS(_id) \
6641 PM8901_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306642 REGULATOR_CHANGE_STATUS, 0, 0)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006643
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306644static struct pm8901_vreg_pdata pm8901_vreg_init[] = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006645 PM8901_VREG_INIT_VS(USB_OTG),
6646 PM8901_VREG_INIT_VS(HDMI_MVS),
6647};
6648
Anirudh Ghayalb6c98092011-12-13 14:06:48 +05306649static struct pm8xxx_misc_platform_data pm8901_misc_pdata = {
6650 .priority = 1,
6651};
6652
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306653static struct pm8xxx_irq_platform_data pm8901_irq_pdata = {
6654 .irq_base = PM8901_IRQ_BASE,
6655 .devirq = MSM_GPIO_TO_INT(PM8901_GPIO_INT),
6656 .irq_trigger_flag = IRQF_TRIGGER_LOW,
6657};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006658
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306659static struct pm8xxx_mpp_platform_data pm8901_mpp_pdata = {
6660 .mpp_base = PM8901_MPP_PM_TO_SYS(0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006661};
6662
6663static struct pm8901_platform_data pm8901_platform_data = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306664 .irq_pdata = &pm8901_irq_pdata,
6665 .mpp_pdata = &pm8901_mpp_pdata,
6666 .regulator_pdatas = pm8901_vreg_init,
6667 .num_regulators = ARRAY_SIZE(pm8901_vreg_init),
Anirudh Ghayalb6c98092011-12-13 14:06:48 +05306668 .misc_pdata = &pm8901_misc_pdata,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006669};
6670
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05306671static struct msm_ssbi_platform_data msm8x60_ssbi_pm8901_pdata __devinitdata = {
6672 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
6673 .slave = {
6674 .name = "pm8901-core",
6675 .platform_data = &pm8901_platform_data,
6676 },
6677};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006678#endif /* CONFIG_PMIC8901 */
6679
6680#if defined(CONFIG_MARIMBA_CORE) && (defined(CONFIG_GPIO_SX150X) \
6681 || defined(CONFIG_GPIO_SX150X_MODULE))
6682
6683static struct regulator *vreg_bahama;
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006684static int msm_bahama_sys_rst = GPIO_MS_SYS_RESET_N;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006685
6686struct bahama_config_register{
6687 u8 reg;
6688 u8 value;
6689 u8 mask;
6690};
6691
6692enum version{
6693 VER_1_0,
6694 VER_2_0,
6695 VER_UNSUPPORTED = 0xFF
6696};
6697
6698static u8 read_bahama_ver(void)
6699{
6700 int rc;
6701 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA };
6702 u8 bahama_version;
6703
6704 rc = marimba_read_bit_mask(&config, 0x00, &bahama_version, 1, 0x1F);
6705 if (rc < 0) {
6706 printk(KERN_ERR
6707 "%s: version read failed: %d\n",
6708 __func__, rc);
6709 return VER_UNSUPPORTED;
6710 } else {
6711 printk(KERN_INFO
6712 "%s: version read got: 0x%x\n",
6713 __func__, bahama_version);
6714 }
6715
6716 switch (bahama_version) {
6717 case 0x08: /* varient of bahama v1 */
6718 case 0x10:
6719 case 0x00:
6720 return VER_1_0;
6721 case 0x09: /* variant of bahama v2 */
6722 return VER_2_0;
6723 default:
6724 return VER_UNSUPPORTED;
6725 }
6726}
6727
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006728static int msm_bahama_setup_power_enable;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006729static unsigned int msm_bahama_setup_power(void)
6730{
6731 int rc = 0;
6732 const char *msm_bahama_regulator = "8058_s3";
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006733
6734 if (machine_is_msm8x60_dragon())
6735 msm_bahama_sys_rst = GPIO_CDC_RST_N;
6736
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006737 vreg_bahama = regulator_get(NULL, msm_bahama_regulator);
6738
6739 if (IS_ERR(vreg_bahama)) {
6740 rc = PTR_ERR(vreg_bahama);
6741 pr_err("%s: regulator_get %s = %d\n", __func__,
6742 msm_bahama_regulator, rc);
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006743 return rc;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006744 }
6745
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006746 rc = regulator_set_voltage(vreg_bahama, 1800000, 1800000);
6747 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006748 pr_err("%s: regulator_set_voltage %s = %d\n", __func__,
6749 msm_bahama_regulator, rc);
6750 goto unget;
6751 }
6752
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006753 rc = regulator_enable(vreg_bahama);
6754 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006755 pr_err("%s: regulator_enable %s = %d\n", __func__,
6756 msm_bahama_regulator, rc);
6757 goto unget;
6758 }
6759
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006760 rc = gpio_request(msm_bahama_sys_rst, "bahama sys_rst_n");
6761 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006762 pr_err("%s: gpio_request %d = %d\n", __func__,
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006763 msm_bahama_sys_rst, rc);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006764 goto unenable;
6765 }
6766
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006767 gpio_direction_output(msm_bahama_sys_rst, 0);
6768 usleep_range(1000, 1050);
6769 gpio_set_value_cansleep(msm_bahama_sys_rst, 1);
6770 usleep_range(1000, 1050);
6771 msm_bahama_setup_power_enable = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006772 return rc;
6773
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006774unenable:
6775 regulator_disable(vreg_bahama);
6776unget:
6777 regulator_put(vreg_bahama);
6778 return rc;
6779};
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006780
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006781static unsigned int msm_bahama_shutdown_power(int value)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006782{
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006783 if (msm_bahama_setup_power_enable) {
6784 gpio_set_value_cansleep(msm_bahama_sys_rst, 0);
6785 gpio_free(msm_bahama_sys_rst);
6786 regulator_disable(vreg_bahama);
6787 regulator_put(vreg_bahama);
6788 msm_bahama_setup_power_enable = 0;
6789 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006790
6791 return 0;
6792};
6793
6794static unsigned int msm_bahama_core_config(int type)
6795{
6796 int rc = 0;
6797
6798 if (type == BAHAMA_ID) {
6799
6800 int i;
6801 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA };
6802
6803 const struct bahama_config_register v20_init[] = {
6804 /* reg, value, mask */
6805 { 0xF4, 0x84, 0xFF }, /* AREG */
6806 { 0xF0, 0x04, 0xFF } /* DREG */
6807 };
6808
6809 if (read_bahama_ver() == VER_2_0) {
6810 for (i = 0; i < ARRAY_SIZE(v20_init); i++) {
6811 u8 value = v20_init[i].value;
6812 rc = marimba_write_bit_mask(&config,
6813 v20_init[i].reg,
6814 &value,
6815 sizeof(v20_init[i].value),
6816 v20_init[i].mask);
6817 if (rc < 0) {
6818 printk(KERN_ERR
6819 "%s: reg %d write failed: %d\n",
6820 __func__, v20_init[i].reg, rc);
6821 return rc;
6822 }
6823 printk(KERN_INFO "%s: reg 0x%02x value 0x%02x"
6824 " mask 0x%02x\n",
6825 __func__, v20_init[i].reg,
6826 v20_init[i].value, v20_init[i].mask);
6827 }
6828 }
6829 }
6830 printk(KERN_INFO "core type: %d\n", type);
6831
6832 return rc;
6833}
6834
6835static struct regulator *fm_regulator_s3;
6836static struct msm_xo_voter *fm_clock;
6837
6838static int fm_radio_setup(struct marimba_fm_platform_data *pdata)
6839{
6840 int rc = 0;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306841 struct pm_gpio cfg = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006842 .direction = PM_GPIO_DIR_IN,
6843 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306844 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006845 .function = PM_GPIO_FUNC_NORMAL,
6846 .inv_int_pol = 0,
6847 };
6848
6849 if (!fm_regulator_s3) {
6850 fm_regulator_s3 = regulator_get(NULL, "8058_s3");
6851 if (IS_ERR(fm_regulator_s3)) {
6852 rc = PTR_ERR(fm_regulator_s3);
6853 printk(KERN_ERR "%s: regulator get s3 (%d)\n",
6854 __func__, rc);
6855 goto out;
6856 }
6857 }
6858
6859
6860 rc = regulator_set_voltage(fm_regulator_s3, 1800000, 1800000);
6861 if (rc < 0) {
6862 printk(KERN_ERR "%s: regulator set voltage failed (%d)\n",
6863 __func__, rc);
6864 goto fm_fail_put;
6865 }
6866
6867 rc = regulator_enable(fm_regulator_s3);
6868 if (rc < 0) {
6869 printk(KERN_ERR "%s: regulator s3 enable failed (%d)\n",
6870 __func__, rc);
6871 goto fm_fail_put;
6872 }
6873
6874 /*Vote for XO clock*/
6875 fm_clock = msm_xo_get(MSM_XO_TCXO_D0, "fm_power");
6876
6877 if (IS_ERR(fm_clock)) {
6878 rc = PTR_ERR(fm_clock);
6879 printk(KERN_ERR "%s: Couldn't get TCXO_D0 vote for FM (%d)\n",
6880 __func__, rc);
6881 goto fm_fail_switch;
6882 }
6883
6884 rc = msm_xo_mode_vote(fm_clock, MSM_XO_MODE_ON);
6885 if (rc < 0) {
6886 printk(KERN_ERR "%s: Failed to vote for TCX0_D0 ON (%d)\n",
6887 __func__, rc);
6888 goto fm_fail_vote;
6889 }
6890
6891 /*GPIO 18 on PMIC is FM_IRQ*/
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306892 rc = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(FM_GPIO), &cfg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006893 if (rc) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306894 printk(KERN_ERR "%s: return val of pm8xxx_gpio_config: %d\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006895 __func__, rc);
6896 goto fm_fail_clock;
6897 }
6898 goto out;
6899
6900fm_fail_clock:
6901 msm_xo_mode_vote(fm_clock, MSM_XO_MODE_OFF);
6902fm_fail_vote:
6903 msm_xo_put(fm_clock);
6904fm_fail_switch:
6905 regulator_disable(fm_regulator_s3);
6906fm_fail_put:
6907 regulator_put(fm_regulator_s3);
6908out:
6909 return rc;
6910};
6911
6912static void fm_radio_shutdown(struct marimba_fm_platform_data *pdata)
6913{
6914 int rc = 0;
6915 if (fm_regulator_s3 != NULL) {
6916 rc = regulator_disable(fm_regulator_s3);
6917 if (rc < 0) {
6918 printk(KERN_ERR "%s: regulator s3 disable (%d)\n",
6919 __func__, rc);
6920 }
6921 regulator_put(fm_regulator_s3);
6922 fm_regulator_s3 = NULL;
6923 }
6924 printk(KERN_ERR "%s: Voting off for XO", __func__);
6925
6926 if (fm_clock != NULL) {
6927 rc = msm_xo_mode_vote(fm_clock, MSM_XO_MODE_OFF);
6928 if (rc < 0) {
6929 printk(KERN_ERR "%s: Voting off XO clock (%d)\n",
6930 __func__, rc);
6931 }
6932 msm_xo_put(fm_clock);
6933 }
6934 printk(KERN_ERR "%s: coming out of fm_radio_shutdown", __func__);
6935}
6936
6937/* Slave id address for FM/CDC/QMEMBIST
6938 * Values can be programmed using Marimba slave id 0
6939 * should there be a conflict with other I2C devices
6940 * */
6941#define BAHAMA_SLAVE_ID_FM_ADDR 0x2A
6942#define BAHAMA_SLAVE_ID_QMEMBIST_ADDR 0x7B
6943
6944static struct marimba_fm_platform_data marimba_fm_pdata = {
6945 .fm_setup = fm_radio_setup,
6946 .fm_shutdown = fm_radio_shutdown,
6947 .irq = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, FM_GPIO),
6948 .is_fm_soc_i2s_master = false,
6949 .config_i2s_gpio = NULL,
6950};
6951
6952/*
6953Just initializing the BAHAMA related slave
6954*/
6955static struct marimba_platform_data marimba_pdata = {
6956 .slave_id[SLAVE_ID_BAHAMA_FM] = BAHAMA_SLAVE_ID_FM_ADDR,
6957 .slave_id[SLAVE_ID_BAHAMA_QMEMBIST] = BAHAMA_SLAVE_ID_QMEMBIST_ADDR,
6958 .bahama_setup = msm_bahama_setup_power,
6959 .bahama_shutdown = msm_bahama_shutdown_power,
6960 .bahama_core_config = msm_bahama_core_config,
6961 .fm = &marimba_fm_pdata,
6962 .tsadc_ssbi_adap = MARIMBA_SSBI_ADAP,
6963};
6964
6965
6966static struct i2c_board_info msm_marimba_board_info[] = {
6967 {
6968 I2C_BOARD_INFO("marimba", 0xc),
6969 .platform_data = &marimba_pdata,
6970 }
6971};
6972#endif /* CONFIG_MAIMBA_CORE */
6973
6974#ifdef CONFIG_I2C
6975#define I2C_SURF 1
6976#define I2C_FFA (1 << 1)
6977#define I2C_RUMI (1 << 2)
6978#define I2C_SIM (1 << 3)
6979#define I2C_FLUID (1 << 4)
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04006980#define I2C_DRAGON (1 << 5)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006981
6982struct i2c_registry {
6983 u8 machs;
6984 int bus;
6985 struct i2c_board_info *info;
6986 int len;
6987};
6988
6989static struct i2c_registry msm8x60_i2c_devices[] __initdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006990#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
6991 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04006992 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006993 MSM_GSBI8_QUP_I2C_BUS_ID,
6994 core_expander_i2c_info,
6995 ARRAY_SIZE(core_expander_i2c_info),
6996 },
6997 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04006998 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006999 MSM_GSBI8_QUP_I2C_BUS_ID,
7000 docking_expander_i2c_info,
7001 ARRAY_SIZE(docking_expander_i2c_info),
7002 },
7003 {
7004 I2C_SURF,
7005 MSM_GSBI8_QUP_I2C_BUS_ID,
7006 surf_expanders_i2c_info,
7007 ARRAY_SIZE(surf_expanders_i2c_info),
7008 },
7009 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007010 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007011 MSM_GSBI3_QUP_I2C_BUS_ID,
7012 fha_expanders_i2c_info,
7013 ARRAY_SIZE(fha_expanders_i2c_info),
7014 },
7015 {
7016 I2C_FLUID,
7017 MSM_GSBI3_QUP_I2C_BUS_ID,
7018 fluid_expanders_i2c_info,
7019 ARRAY_SIZE(fluid_expanders_i2c_info),
7020 },
7021 {
7022 I2C_FLUID,
7023 MSM_GSBI8_QUP_I2C_BUS_ID,
7024 fluid_core_expander_i2c_info,
7025 ARRAY_SIZE(fluid_core_expander_i2c_info),
7026 },
7027#endif
7028#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
7029 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
7030 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007031 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007032 MSM_GSBI3_QUP_I2C_BUS_ID,
7033 msm_i2c_gsbi3_tdisc_info,
7034 ARRAY_SIZE(msm_i2c_gsbi3_tdisc_info),
7035 },
7036#endif
7037 {
Zhang Chang Ken211df572011-07-05 19:16:39 -04007038 I2C_SURF | I2C_FFA | I2C_FLUID,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007039 MSM_GSBI3_QUP_I2C_BUS_ID,
7040 cy8ctmg200_board_info,
7041 ARRAY_SIZE(cy8ctmg200_board_info),
7042 },
Zhang Chang Ken211df572011-07-05 19:16:39 -04007043 {
7044 I2C_DRAGON,
7045 MSM_GSBI3_QUP_I2C_BUS_ID,
7046 cy8ctma340_dragon_board_info,
7047 ARRAY_SIZE(cy8ctma340_dragon_board_info),
7048 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007049#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
7050 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
7051 {
7052 I2C_FLUID,
7053 MSM_GSBI3_QUP_I2C_BUS_ID,
7054 cyttsp_fluid_info,
7055 ARRAY_SIZE(cyttsp_fluid_info),
7056 },
7057 {
7058 I2C_FFA | I2C_SURF,
7059 MSM_GSBI3_QUP_I2C_BUS_ID,
7060 cyttsp_ffa_info,
7061 ARRAY_SIZE(cyttsp_ffa_info),
7062 },
7063#endif
7064#ifdef CONFIG_MSM_CAMERA
Jilai Wang971f97f2011-07-13 14:25:25 -04007065 {
7066 I2C_SURF | I2C_FFA | I2C_FLUID ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007067 MSM_GSBI4_QUP_I2C_BUS_ID,
7068 msm_camera_boardinfo,
7069 ARRAY_SIZE(msm_camera_boardinfo),
7070 },
Jilai Wang971f97f2011-07-13 14:25:25 -04007071 {
7072 I2C_DRAGON,
7073 MSM_GSBI4_QUP_I2C_BUS_ID,
7074 msm_camera_dragon_boardinfo,
7075 ARRAY_SIZE(msm_camera_dragon_boardinfo),
7076 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007077#endif
7078 {
7079 I2C_SURF | I2C_FFA | I2C_FLUID,
7080 MSM_GSBI7_QUP_I2C_BUS_ID,
7081 msm_i2c_gsbi7_timpani_info,
7082 ARRAY_SIZE(msm_i2c_gsbi7_timpani_info),
7083 },
7084#if defined(CONFIG_MARIMBA_CORE)
7085 {
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04007086 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007087 MSM_GSBI7_QUP_I2C_BUS_ID,
7088 msm_marimba_board_info,
7089 ARRAY_SIZE(msm_marimba_board_info),
7090 },
7091#endif /* CONFIG_MARIMBA_CORE */
7092#ifdef CONFIG_ISL9519_CHARGER
7093 {
7094 I2C_SURF | I2C_FFA,
7095 MSM_GSBI8_QUP_I2C_BUS_ID,
7096 isl_charger_i2c_info,
7097 ARRAY_SIZE(isl_charger_i2c_info),
7098 },
7099#endif
7100#if defined(CONFIG_HAPTIC_ISA1200) || \
7101 defined(CONFIG_HAPTIC_ISA1200_MODULE)
7102 {
7103 I2C_FLUID,
7104 MSM_GSBI8_QUP_I2C_BUS_ID,
7105 msm_isa1200_board_info,
7106 ARRAY_SIZE(msm_isa1200_board_info),
7107 },
7108#endif
7109#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
7110 {
7111 I2C_FLUID,
7112 MSM_GSBI8_QUP_I2C_BUS_ID,
7113 smb137b_charger_i2c_info,
7114 ARRAY_SIZE(smb137b_charger_i2c_info),
7115 },
7116#endif
7117#if defined(CONFIG_BATTERY_BQ27520) || \
7118 defined(CONFIG_BATTERY_BQ27520_MODULE)
7119 {
7120 I2C_FLUID,
7121 MSM_GSBI8_QUP_I2C_BUS_ID,
7122 msm_bq27520_board_info,
7123 ARRAY_SIZE(msm_bq27520_board_info),
7124 },
7125#endif
Lei Zhou338cab82011-08-19 13:38:17 -04007126#if defined(CONFIG_SND_SOC_WM8903) || defined(CONFIG_SND_SOC_WM8903_MODULE)
7127 {
7128 I2C_DRAGON,
7129 MSM_GSBI8_QUP_I2C_BUS_ID,
7130 wm8903_codec_i2c_info,
7131 ARRAY_SIZE(wm8903_codec_i2c_info),
7132 },
7133#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007134};
7135#endif /* CONFIG_I2C */
7136
7137static void fixup_i2c_configs(void)
7138{
7139#ifdef CONFIG_I2C
7140#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
7141 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion())
7142 sx150x_data[SX150X_CORE].irq_summary =
7143 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT2_N);
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007144 else if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa() ||
7145 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007146 sx150x_data[SX150X_CORE].irq_summary =
7147 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT1_N);
7148 else if (machine_is_msm8x60_fluid())
7149 sx150x_data[SX150X_CORE_FLUID].irq_summary =
7150 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT1_N);
7151#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007152#endif
7153}
7154
7155static void register_i2c_devices(void)
7156{
7157#ifdef CONFIG_I2C
7158 u8 mach_mask = 0;
7159 int i;
7160
7161 /* Build the matching 'supported_machs' bitmask */
7162 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion())
7163 mach_mask = I2C_SURF;
7164 else if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa())
7165 mach_mask = I2C_FFA;
7166 else if (machine_is_msm8x60_rumi3())
7167 mach_mask = I2C_RUMI;
7168 else if (machine_is_msm8x60_sim())
7169 mach_mask = I2C_SIM;
7170 else if (machine_is_msm8x60_fluid())
7171 mach_mask = I2C_FLUID;
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007172 else if (machine_is_msm8x60_dragon())
7173 mach_mask = I2C_DRAGON;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007174 else
7175 pr_err("unmatched machine ID in register_i2c_devices\n");
7176
7177 /* Run the array and install devices as appropriate */
7178 for (i = 0; i < ARRAY_SIZE(msm8x60_i2c_devices); ++i) {
7179 if (msm8x60_i2c_devices[i].machs & mach_mask)
7180 i2c_register_board_info(msm8x60_i2c_devices[i].bus,
7181 msm8x60_i2c_devices[i].info,
7182 msm8x60_i2c_devices[i].len);
7183 }
7184#endif
7185}
7186
7187static void __init msm8x60_init_uart12dm(void)
7188{
7189#if !defined(CONFIG_USB_PEHCI_HCD) && !defined(CONFIG_USB_PEHCI_HCD_MODULE)
7190 /* 0x1D000000 now belongs to EBI2:CS3 i.e. USB ISP Controller */
7191 void *fpga_mem = ioremap_nocache(0x1D000000, SZ_4K);
7192
7193 if (!fpga_mem)
7194 pr_err("%s(): Error getting memory\n", __func__);
7195
7196 /* Advanced mode */
7197 writew(0xFFFF, fpga_mem + 0x15C);
7198 /* FPGA_UART_SEL */
7199 writew(0, fpga_mem + 0x172);
7200 /* FPGA_GPIO_CONFIG_117 */
7201 writew(1, fpga_mem + 0xEA);
7202 /* FPGA_GPIO_CONFIG_118 */
7203 writew(1, fpga_mem + 0xEC);
7204 mb();
7205 iounmap(fpga_mem);
7206#endif
7207}
7208
7209#define MSM_GSBI9_PHYS 0x19900000
7210#define GSBI_DUAL_MODE_CODE 0x60
7211
7212static void __init msm8x60_init_buses(void)
7213{
7214#ifdef CONFIG_I2C_QUP
7215 void *gsbi_mem = ioremap_nocache(0x19C00000, 4);
7216 /* Setting protocol code to 0x60 for dual UART/I2C in GSBI12 */
7217 writel_relaxed(0x6 << 4, gsbi_mem);
7218 /* Ensure protocol code is written before proceeding further */
7219 mb();
7220 iounmap(gsbi_mem);
7221
7222 msm_gsbi3_qup_i2c_device.dev.platform_data = &msm_gsbi3_qup_i2c_pdata;
7223 msm_gsbi4_qup_i2c_device.dev.platform_data = &msm_gsbi4_qup_i2c_pdata;
7224 msm_gsbi7_qup_i2c_device.dev.platform_data = &msm_gsbi7_qup_i2c_pdata;
7225 msm_gsbi8_qup_i2c_device.dev.platform_data = &msm_gsbi8_qup_i2c_pdata;
7226
7227#ifdef CONFIG_MSM_GSBI9_UART
7228 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
7229 /* Setting protocol code to 0x60 for dual UART/I2C in GSBI9 */
7230 gsbi_mem = ioremap_nocache(MSM_GSBI9_PHYS, 4);
7231 writel_relaxed(GSBI_DUAL_MODE_CODE, gsbi_mem);
7232 iounmap(gsbi_mem);
7233 msm_gsbi9_qup_i2c_pdata.use_gsbi_shared_mode = 1;
7234 }
7235#endif
7236 msm_gsbi9_qup_i2c_device.dev.platform_data = &msm_gsbi9_qup_i2c_pdata;
7237 msm_gsbi12_qup_i2c_device.dev.platform_data = &msm_gsbi12_qup_i2c_pdata;
7238#endif
7239#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
7240 msm_gsbi1_qup_spi_device.dev.platform_data = &msm_gsbi1_qup_spi_pdata;
7241#endif
7242#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007243 msm_device_ssbi3.dev.platform_data = &msm_ssbi3_pdata;
7244#endif
7245
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05307246#ifdef CONFIG_MSM_SSBI
7247 msm_device_ssbi_pmic1.dev.platform_data =
7248 &msm8x60_ssbi_pm8058_pdata;
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05307249 msm_device_ssbi_pmic2.dev.platform_data =
7250 &msm8x60_ssbi_pm8901_pdata;
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05307251#endif
7252
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007253 if (machine_is_msm8x60_fluid()) {
7254#if (defined(CONFIG_USB_EHCI_MSM_72K) && \
7255 (defined(CONFIG_SMB137B_CHARGER) || \
7256 defined(CONFIG_SMB137B_CHARGER_MODULE)))
7257 msm_otg_pdata.vbus_power = msm_hsusb_smb137b_vbus_power;
7258#endif
7259#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
7260 msm_gsbi10_qup_spi_device.dev.platform_data =
7261 &msm_gsbi10_qup_spi_pdata;
7262#endif
7263 }
7264
7265#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_HCD)
7266 /*
7267 * We can not put USB regulators (8058_l6 and 8058_l7) in LPM
7268 * when we depend on USB PHY for VBUS/ID notifications. VBUS
7269 * and ID notifications are available only on V2 surf and FFA
7270 * with a hardware workaround.
7271 */
7272 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2 &&
7273 (machine_is_msm8x60_surf() ||
7274 (machine_is_msm8x60_ffa() &&
7275 pmic_id_notif_supported)))
7276 msm_otg_pdata.phy_can_powercollapse = 1;
7277 msm_device_otg.dev.platform_data = &msm_otg_pdata;
7278#endif
7279
7280#ifdef CONFIG_USB_GADGET_MSM_72K
7281 msm_device_gadget_peripheral.dev.platform_data = &msm_gadget_pdata;
7282#endif
7283
7284#ifdef CONFIG_SERIAL_MSM_HS
7285 msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(54); /* GSBI6(2) */
7286 msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
7287#endif
7288#ifdef CONFIG_MSM_GSBI9_UART
7289 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
7290 msm_device_uart_gsbi9 = msm_add_gsbi9_uart();
7291 if (IS_ERR(msm_device_uart_gsbi9))
7292 pr_err("%s(): Failed to create uart gsbi9 device\n",
7293 __func__);
7294 }
7295#endif
7296
7297#ifdef CONFIG_MSM_BUS_SCALING
7298
7299 /* RPM calls are only enabled on V2 */
7300 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2) {
7301 msm_bus_apps_fabric_pdata.rpm_enabled = 1;
7302 msm_bus_sys_fabric_pdata.rpm_enabled = 1;
7303 msm_bus_mm_fabric_pdata.rpm_enabled = 1;
7304 msm_bus_sys_fpb_pdata.rpm_enabled = 1;
7305 msm_bus_cpss_fpb_pdata.rpm_enabled = 1;
7306 }
7307
7308 msm_bus_apps_fabric.dev.platform_data = &msm_bus_apps_fabric_pdata;
7309 msm_bus_sys_fabric.dev.platform_data = &msm_bus_sys_fabric_pdata;
7310 msm_bus_mm_fabric.dev.platform_data = &msm_bus_mm_fabric_pdata;
7311 msm_bus_sys_fpb.dev.platform_data = &msm_bus_sys_fpb_pdata;
7312 msm_bus_cpss_fpb.dev.platform_data = &msm_bus_cpss_fpb_pdata;
7313#endif
7314}
7315
7316static void __init msm8x60_map_io(void)
7317{
7318 msm_shared_ram_phys = MSM_SHARED_RAM_PHYS;
7319 msm_map_msm8x60_io();
Jeff Ohlstein3a77f9f2011-09-06 14:50:20 -07007320
7321 if (socinfo_init() < 0)
7322 pr_err("socinfo_init() failed!\n");
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007323}
7324
7325/*
7326 * Most segments of the EBI2 bus are disabled by default.
7327 */
7328static void __init msm8x60_init_ebi2(void)
7329{
7330 uint32_t ebi2_cfg;
7331 void *ebi2_cfg_ptr;
Terence Hampsonb36a38c2011-09-19 19:10:40 -04007332 struct clk *mem_clk = clk_get_sys("msm_ebi2", "mem_clk");
7333
7334 if (IS_ERR(mem_clk)) {
7335 pr_err("%s: clk_get_sys(%s,%s), failed", __func__,
7336 "msm_ebi2", "mem_clk");
7337 return;
7338 }
7339 clk_enable(mem_clk);
7340 clk_put(mem_clk);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007341
7342 ebi2_cfg_ptr = ioremap_nocache(0x1a100000, sizeof(uint32_t));
7343 if (ebi2_cfg_ptr != 0) {
7344 ebi2_cfg = readl_relaxed(ebi2_cfg_ptr);
7345
7346 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007347 machine_is_msm8x60_fluid() ||
7348 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007349 ebi2_cfg |= (1 << 4) | (1 << 5); /* CS2, CS3 */
7350 else if (machine_is_msm8x60_sim())
7351 ebi2_cfg |= (1 << 4); /* CS2 */
7352 else if (machine_is_msm8x60_rumi3())
7353 ebi2_cfg |= (1 << 5); /* CS3 */
7354
7355 writel_relaxed(ebi2_cfg, ebi2_cfg_ptr);
7356 iounmap(ebi2_cfg_ptr);
7357 }
7358
7359 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007360 machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon()) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007361 ebi2_cfg_ptr = ioremap_nocache(0x1a110000, SZ_4K);
7362 if (ebi2_cfg_ptr != 0) {
7363 /* EBI2_XMEM_CFG:PWRSAVE_MODE off */
7364 writel_relaxed(0UL, ebi2_cfg_ptr);
7365
7366 /* CS2: Delay 9 cycles (140ns@64MHz) between SMSC
7367 * LAN9221 Ethernet controller reads and writes.
7368 * The lowest 4 bits are the read delay, the next
7369 * 4 are the write delay. */
7370 writel_relaxed(0x031F1C99, ebi2_cfg_ptr + 0x10);
7371#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
7372 /*
7373 * RECOVERY=5, HOLD_WR=1
7374 * INIT_LATENCY_WR=1, INIT_LATENCY_RD=1
7375 * WAIT_WR=1, WAIT_RD=2
7376 */
7377 writel_relaxed(0x51010112, ebi2_cfg_ptr + 0x14);
7378 /*
7379 * HOLD_RD=1
7380 * ADV_OE_RECOVERY=0, ADDR_HOLD_ENA=1
7381 */
7382 writel_relaxed(0x01000020, ebi2_cfg_ptr + 0x34);
7383#else
7384 /* EBI2 CS3 muxed address/data,
7385 * two cyc addr enable */
7386 writel_relaxed(0xA3030020, ebi2_cfg_ptr + 0x34);
7387
7388#endif
7389 iounmap(ebi2_cfg_ptr);
7390 }
7391 }
7392}
7393
7394static void __init msm8x60_configure_smc91x(void)
7395{
7396 if (machine_is_msm8x60_sim()) {
7397
7398 smc91x_resources[0].start = 0x1b800300;
7399 smc91x_resources[0].end = 0x1b8003ff;
7400
7401 smc91x_resources[1].start = (NR_MSM_IRQS + 40);
7402 smc91x_resources[1].end = (NR_MSM_IRQS + 40);
7403
7404 } else if (machine_is_msm8x60_rumi3()) {
7405
7406 smc91x_resources[0].start = 0x1d000300;
7407 smc91x_resources[0].end = 0x1d0003ff;
7408
7409 smc91x_resources[1].start = TLMM_MSM_DIR_CONN_IRQ_0;
7410 smc91x_resources[1].end = TLMM_MSM_DIR_CONN_IRQ_0;
7411 }
7412}
7413
7414static void __init msm8x60_init_tlmm(void)
7415{
7416 if (machine_is_msm8x60_rumi3())
7417 msm_gpio_install_direct_irq(0, 0, 1);
7418}
7419
7420#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
7421 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
7422 || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
7423 || defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
7424 || defined(CONFIG_MMC_MSM_SDC5_SUPPORT))
7425
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007426/* 8x60 has 5 SDCC controllers */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007427#define MAX_SDCC_CONTROLLER 5
7428
7429struct msm_sdcc_gpio {
7430 /* maximum 10 GPIOs per SDCC controller */
7431 s16 no;
7432 /* name of this GPIO */
7433 const char *name;
7434 bool always_on;
7435 bool is_enabled;
7436};
7437
7438#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
7439static struct msm_sdcc_gpio sdc1_gpio_cfg[] = {
7440 {159, "sdc1_dat_0"},
7441 {160, "sdc1_dat_1"},
7442 {161, "sdc1_dat_2"},
7443 {162, "sdc1_dat_3"},
7444#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
7445 {163, "sdc1_dat_4"},
7446 {164, "sdc1_dat_5"},
7447 {165, "sdc1_dat_6"},
7448 {166, "sdc1_dat_7"},
7449#endif
7450 {167, "sdc1_clk"},
7451 {168, "sdc1_cmd"}
7452};
7453#endif
7454
7455#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
7456static struct msm_sdcc_gpio sdc2_gpio_cfg[] = {
7457 {143, "sdc2_dat_0"},
7458 {144, "sdc2_dat_1", 1},
7459 {145, "sdc2_dat_2"},
7460 {146, "sdc2_dat_3"},
7461#ifdef CONFIG_MMC_MSM_SDC2_8_BIT_SUPPORT
7462 {147, "sdc2_dat_4"},
7463 {148, "sdc2_dat_5"},
7464 {149, "sdc2_dat_6"},
7465 {150, "sdc2_dat_7"},
7466#endif
7467 {151, "sdc2_cmd"},
7468 {152, "sdc2_clk", 1}
7469};
7470#endif
7471
7472#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
7473static struct msm_sdcc_gpio sdc5_gpio_cfg[] = {
7474 {95, "sdc5_cmd"},
7475 {96, "sdc5_dat_3"},
7476 {97, "sdc5_clk", 1},
7477 {98, "sdc5_dat_2"},
7478 {99, "sdc5_dat_1", 1},
7479 {100, "sdc5_dat_0"}
7480};
7481#endif
7482
7483struct msm_sdcc_pad_pull_cfg {
7484 enum msm_tlmm_pull_tgt pull;
7485 u32 pull_val;
7486};
7487
7488struct msm_sdcc_pad_drv_cfg {
7489 enum msm_tlmm_hdrive_tgt drv;
7490 u32 drv_val;
7491};
7492
7493#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
7494static struct msm_sdcc_pad_drv_cfg sdc3_pad_on_drv_cfg[] = {
7495 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_8MA},
7496 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_8MA},
7497 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_8MA}
7498};
7499
7500static struct msm_sdcc_pad_pull_cfg sdc3_pad_on_pull_cfg[] = {
7501 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_UP},
7502 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_UP}
7503};
7504
7505static struct msm_sdcc_pad_drv_cfg sdc3_pad_off_drv_cfg[] = {
7506 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_2MA},
7507 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_2MA},
7508 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_2MA}
7509};
7510
7511static struct msm_sdcc_pad_pull_cfg sdc3_pad_off_pull_cfg[] = {
7512 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_DOWN},
7513 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_DOWN}
7514};
7515#endif
7516
7517#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
7518static struct msm_sdcc_pad_drv_cfg sdc4_pad_on_drv_cfg[] = {
7519 {TLMM_HDRV_SDC4_CLK, GPIO_CFG_8MA},
7520 {TLMM_HDRV_SDC4_CMD, GPIO_CFG_8MA},
7521 {TLMM_HDRV_SDC4_DATA, GPIO_CFG_8MA}
7522};
7523
7524static struct msm_sdcc_pad_pull_cfg sdc4_pad_on_pull_cfg[] = {
7525 {TLMM_PULL_SDC4_CMD, GPIO_CFG_PULL_UP},
7526 {TLMM_PULL_SDC4_DATA, GPIO_CFG_PULL_UP}
7527};
7528
7529static struct msm_sdcc_pad_drv_cfg sdc4_pad_off_drv_cfg[] = {
7530 {TLMM_HDRV_SDC4_CLK, GPIO_CFG_2MA},
7531 {TLMM_HDRV_SDC4_CMD, GPIO_CFG_2MA},
7532 {TLMM_HDRV_SDC4_DATA, GPIO_CFG_2MA}
7533};
7534
7535static struct msm_sdcc_pad_pull_cfg sdc4_pad_off_pull_cfg[] = {
7536 {TLMM_PULL_SDC4_CMD, GPIO_CFG_PULL_DOWN},
7537 {TLMM_PULL_SDC4_DATA, GPIO_CFG_PULL_DOWN}
7538};
7539#endif
7540
7541struct msm_sdcc_pin_cfg {
7542 /*
7543 * = 1 if controller pins are using gpios
7544 * = 0 if controller has dedicated MSM pins
7545 */
7546 u8 is_gpio;
7547 u8 cfg_sts;
7548 u8 gpio_data_size;
7549 struct msm_sdcc_gpio *gpio_data;
7550 struct msm_sdcc_pad_drv_cfg *pad_drv_on_data;
7551 struct msm_sdcc_pad_drv_cfg *pad_drv_off_data;
7552 struct msm_sdcc_pad_pull_cfg *pad_pull_on_data;
7553 struct msm_sdcc_pad_pull_cfg *pad_pull_off_data;
7554 u8 pad_drv_data_size;
7555 u8 pad_pull_data_size;
7556 u8 sdio_lpm_gpio_cfg;
7557};
7558
7559
7560static struct msm_sdcc_pin_cfg sdcc_pin_cfg_data[MAX_SDCC_CONTROLLER] = {
7561#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
7562 [0] = {
7563 .is_gpio = 1,
7564 .gpio_data_size = ARRAY_SIZE(sdc1_gpio_cfg),
7565 .gpio_data = sdc1_gpio_cfg
7566 },
7567#endif
7568#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
7569 [1] = {
7570 .is_gpio = 1,
7571 .gpio_data_size = ARRAY_SIZE(sdc2_gpio_cfg),
7572 .gpio_data = sdc2_gpio_cfg
7573 },
7574#endif
7575#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
7576 [2] = {
7577 .is_gpio = 0,
7578 .pad_drv_on_data = sdc3_pad_on_drv_cfg,
7579 .pad_drv_off_data = sdc3_pad_off_drv_cfg,
7580 .pad_pull_on_data = sdc3_pad_on_pull_cfg,
7581 .pad_pull_off_data = sdc3_pad_off_pull_cfg,
7582 .pad_drv_data_size = ARRAY_SIZE(sdc3_pad_on_drv_cfg),
7583 .pad_pull_data_size = ARRAY_SIZE(sdc3_pad_on_pull_cfg)
7584 },
7585#endif
7586#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
7587 [3] = {
7588 .is_gpio = 0,
7589 .pad_drv_on_data = sdc4_pad_on_drv_cfg,
7590 .pad_drv_off_data = sdc4_pad_off_drv_cfg,
7591 .pad_pull_on_data = sdc4_pad_on_pull_cfg,
7592 .pad_pull_off_data = sdc4_pad_off_pull_cfg,
7593 .pad_drv_data_size = ARRAY_SIZE(sdc4_pad_on_drv_cfg),
7594 .pad_pull_data_size = ARRAY_SIZE(sdc4_pad_on_pull_cfg)
7595 },
7596#endif
7597#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
7598 [4] = {
7599 .is_gpio = 1,
7600 .gpio_data_size = ARRAY_SIZE(sdc5_gpio_cfg),
7601 .gpio_data = sdc5_gpio_cfg
7602 }
7603#endif
7604};
7605
7606static int msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
7607{
7608 int rc = 0;
7609 struct msm_sdcc_pin_cfg *curr;
7610 int n;
7611
7612 curr = &sdcc_pin_cfg_data[dev_id - 1];
7613 if (!curr->gpio_data)
7614 goto out;
7615
7616 for (n = 0; n < curr->gpio_data_size; n++) {
7617 if (enable) {
7618
7619 if (curr->gpio_data[n].always_on &&
7620 curr->gpio_data[n].is_enabled)
7621 continue;
7622 pr_debug("%s: enable: %s\n", __func__,
7623 curr->gpio_data[n].name);
7624 rc = gpio_request(curr->gpio_data[n].no,
7625 curr->gpio_data[n].name);
7626 if (rc) {
7627 pr_err("%s: gpio_request(%d, %s)"
7628 "failed", __func__,
7629 curr->gpio_data[n].no,
7630 curr->gpio_data[n].name);
7631 goto free_gpios;
7632 }
7633 /* set direction as output for all GPIOs */
7634 rc = gpio_direction_output(
7635 curr->gpio_data[n].no, 1);
7636 if (rc) {
7637 pr_err("%s: gpio_direction_output"
7638 "(%d, 1) failed\n", __func__,
7639 curr->gpio_data[n].no);
7640 goto free_gpios;
7641 }
7642 curr->gpio_data[n].is_enabled = 1;
7643 } else {
7644 /*
7645 * now free this GPIO which will put GPIO
7646 * in low power mode and will also put GPIO
7647 * in input mode
7648 */
7649 if (curr->gpio_data[n].always_on)
7650 continue;
7651 pr_debug("%s: disable: %s\n", __func__,
7652 curr->gpio_data[n].name);
7653 gpio_free(curr->gpio_data[n].no);
7654 curr->gpio_data[n].is_enabled = 0;
7655 }
7656 }
7657 curr->cfg_sts = enable;
7658 goto out;
7659
7660free_gpios:
7661 for (; n >= 0; n--)
7662 gpio_free(curr->gpio_data[n].no);
7663out:
7664 return rc;
7665}
7666
7667static int msm_sdcc_setup_pad(int dev_id, unsigned int enable)
7668{
7669 int rc = 0;
7670 struct msm_sdcc_pin_cfg *curr;
7671 int n;
7672
7673 curr = &sdcc_pin_cfg_data[dev_id - 1];
7674 if (!curr->pad_drv_on_data || !curr->pad_pull_on_data)
7675 goto out;
7676
7677 if (enable) {
7678 /*
7679 * set up the normal driver strength and
7680 * pull config for pads
7681 */
7682 for (n = 0; n < curr->pad_drv_data_size; n++) {
7683 if (curr->sdio_lpm_gpio_cfg) {
7684 if (curr->pad_drv_on_data[n].drv ==
7685 TLMM_HDRV_SDC4_DATA)
7686 continue;
7687 }
7688 msm_tlmm_set_hdrive(curr->pad_drv_on_data[n].drv,
7689 curr->pad_drv_on_data[n].drv_val);
7690 }
7691 for (n = 0; n < curr->pad_pull_data_size; n++) {
7692 if (curr->sdio_lpm_gpio_cfg) {
7693 if (curr->pad_pull_on_data[n].pull ==
7694 TLMM_PULL_SDC4_DATA)
7695 continue;
7696 }
7697 msm_tlmm_set_pull(curr->pad_pull_on_data[n].pull,
7698 curr->pad_pull_on_data[n].pull_val);
7699 }
7700 } else {
7701 /* set the low power config for pads */
7702 for (n = 0; n < curr->pad_drv_data_size; n++) {
7703 if (curr->sdio_lpm_gpio_cfg) {
7704 if (curr->pad_drv_off_data[n].drv ==
7705 TLMM_HDRV_SDC4_DATA)
7706 continue;
7707 }
7708 msm_tlmm_set_hdrive(
7709 curr->pad_drv_off_data[n].drv,
7710 curr->pad_drv_off_data[n].drv_val);
7711 }
7712 for (n = 0; n < curr->pad_pull_data_size; n++) {
7713 if (curr->sdio_lpm_gpio_cfg) {
7714 if (curr->pad_pull_off_data[n].pull ==
7715 TLMM_PULL_SDC4_DATA)
7716 continue;
7717 }
7718 msm_tlmm_set_pull(
7719 curr->pad_pull_off_data[n].pull,
7720 curr->pad_pull_off_data[n].pull_val);
7721 }
7722 }
7723 curr->cfg_sts = enable;
7724out:
7725 return rc;
7726}
7727
7728struct sdcc_reg {
7729 /* VDD/VCC/VCCQ regulator name on PMIC8058/PMIC8089*/
7730 const char *reg_name;
7731 /*
7732 * is set voltage supported for this regulator?
7733 * 0 = not supported, 1 = supported
7734 */
7735 unsigned char set_voltage_sup;
7736 /* voltage level to be set */
7737 unsigned int level;
7738 /* VDD/VCC/VCCQ voltage regulator handle */
7739 struct regulator *reg;
7740 /* is this regulator enabled? */
7741 bool enabled;
7742 /* is this regulator needs to be always on? */
7743 bool always_on;
7744 /* is operating power mode setting required for this regulator? */
7745 bool op_pwr_mode_sup;
7746 /* Load values for low power and high power mode */
7747 unsigned int lpm_uA;
7748 unsigned int hpm_uA;
7749};
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007750/* all SDCC controllers require VDD/VCC voltage */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007751static struct sdcc_reg sdcc_vdd_reg_data[MAX_SDCC_CONTROLLER];
7752/* only SDCC1 requires VCCQ voltage */
7753static struct sdcc_reg sdcc_vccq_reg_data[1];
7754/* all SDCC controllers may require voting for VDD PAD voltage */
7755static struct sdcc_reg sdcc_vddp_reg_data[MAX_SDCC_CONTROLLER];
7756
7757struct sdcc_reg_data {
7758 struct sdcc_reg *vdd_data; /* keeps VDD/VCC regulator info */
7759 struct sdcc_reg *vccq_data; /* keeps VCCQ regulator info */
7760 struct sdcc_reg *vddp_data; /* keeps VDD Pad regulator info */
7761 unsigned char sts; /* regulator enable/disable status */
7762};
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007763/* msm8x60 has 5 SDCC controllers */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007764static struct sdcc_reg_data sdcc_vreg_data[MAX_SDCC_CONTROLLER];
7765
7766static int msm_sdcc_vreg_init_reg(struct sdcc_reg *vreg)
7767{
7768 int rc = 0;
7769
7770 /* Get the regulator handle */
7771 vreg->reg = regulator_get(NULL, vreg->reg_name);
7772 if (IS_ERR(vreg->reg)) {
7773 rc = PTR_ERR(vreg->reg);
7774 pr_err("%s: regulator_get(%s) failed. rc=%d\n",
7775 __func__, vreg->reg_name, rc);
7776 goto out;
7777 }
7778
7779 /* Set the voltage level if required */
7780 if (vreg->set_voltage_sup) {
7781 rc = regulator_set_voltage(vreg->reg, vreg->level,
7782 vreg->level);
7783 if (rc) {
7784 pr_err("%s: regulator_set_voltage(%s) failed rc=%d\n",
7785 __func__, vreg->reg_name, rc);
7786 goto vreg_put;
7787 }
7788 }
7789 goto out;
7790
7791vreg_put:
7792 regulator_put(vreg->reg);
7793out:
7794 return rc;
7795}
7796
7797static inline void msm_sdcc_vreg_deinit_reg(struct sdcc_reg *vreg)
7798{
7799 regulator_put(vreg->reg);
7800}
7801
7802/* this init function should be called only once for each SDCC */
7803static int msm_sdcc_vreg_init(int dev_id, unsigned char init)
7804{
7805 int rc = 0;
7806 struct sdcc_reg *curr_vdd_reg, *curr_vccq_reg, *curr_vddp_reg;
7807 struct sdcc_reg_data *curr;
7808
7809 curr = &sdcc_vreg_data[dev_id - 1];
7810 curr_vdd_reg = curr->vdd_data;
7811 curr_vccq_reg = curr->vccq_data;
7812 curr_vddp_reg = curr->vddp_data;
7813
7814 if (init) {
7815 /*
7816 * get the regulator handle from voltage regulator framework
7817 * and then try to set the voltage level for the regulator
7818 */
7819 if (curr_vdd_reg) {
7820 rc = msm_sdcc_vreg_init_reg(curr_vdd_reg);
7821 if (rc)
7822 goto out;
7823 }
7824 if (curr_vccq_reg) {
7825 rc = msm_sdcc_vreg_init_reg(curr_vccq_reg);
7826 if (rc)
7827 goto vdd_reg_deinit;
7828 }
7829 if (curr_vddp_reg) {
7830 rc = msm_sdcc_vreg_init_reg(curr_vddp_reg);
7831 if (rc)
7832 goto vccq_reg_deinit;
7833 }
7834 goto out;
7835 } else
7836 /* deregister with all regulators from regulator framework */
7837 goto vddp_reg_deinit;
7838
7839vddp_reg_deinit:
7840 if (curr_vddp_reg)
7841 msm_sdcc_vreg_deinit_reg(curr_vddp_reg);
7842vccq_reg_deinit:
7843 if (curr_vccq_reg)
7844 msm_sdcc_vreg_deinit_reg(curr_vccq_reg);
7845vdd_reg_deinit:
7846 if (curr_vdd_reg)
7847 msm_sdcc_vreg_deinit_reg(curr_vdd_reg);
7848out:
7849 return rc;
7850}
7851
7852static int msm_sdcc_vreg_enable(struct sdcc_reg *vreg)
7853{
7854 int rc;
7855
7856 if (!vreg->enabled) {
7857 rc = regulator_enable(vreg->reg);
7858 if (rc) {
7859 pr_err("%s: regulator_enable(%s) failed. rc=%d\n",
7860 __func__, vreg->reg_name, rc);
7861 goto out;
7862 }
7863 vreg->enabled = 1;
7864 }
7865
7866 /* Put always_on regulator in HPM (high power mode) */
7867 if (vreg->always_on && vreg->op_pwr_mode_sup) {
7868 rc = regulator_set_optimum_mode(vreg->reg, vreg->hpm_uA);
7869 if (rc < 0) {
7870 pr_err("%s: reg=%s: HPM setting failed"
7871 " hpm_uA=%d, rc=%d\n",
7872 __func__, vreg->reg_name,
7873 vreg->hpm_uA, rc);
7874 goto vreg_disable;
7875 }
7876 rc = 0;
7877 }
7878 goto out;
7879
7880vreg_disable:
7881 regulator_disable(vreg->reg);
7882 vreg->enabled = 0;
7883out:
7884 return rc;
7885}
7886
7887static int msm_sdcc_vreg_disable(struct sdcc_reg *vreg)
7888{
7889 int rc;
7890
7891 /* Never disable always_on regulator */
7892 if (!vreg->always_on) {
7893 rc = regulator_disable(vreg->reg);
7894 if (rc) {
7895 pr_err("%s: regulator_disable(%s) failed. rc=%d\n",
7896 __func__, vreg->reg_name, rc);
7897 goto out;
7898 }
7899 vreg->enabled = 0;
7900 }
7901
7902 /* Put always_on regulator in LPM (low power mode) */
7903 if (vreg->always_on && vreg->op_pwr_mode_sup) {
7904 rc = regulator_set_optimum_mode(vreg->reg, vreg->lpm_uA);
7905 if (rc < 0) {
7906 pr_err("%s: reg=%s: LPM setting failed"
7907 " lpm_uA=%d, rc=%d\n",
7908 __func__,
7909 vreg->reg_name,
7910 vreg->lpm_uA, rc);
7911 goto out;
7912 }
7913 rc = 0;
7914 }
7915
7916out:
7917 return rc;
7918}
7919
7920static int msm_sdcc_setup_vreg(int dev_id, unsigned char enable)
7921{
7922 int rc = 0;
7923 struct sdcc_reg *curr_vdd_reg, *curr_vccq_reg, *curr_vddp_reg;
7924 struct sdcc_reg_data *curr;
7925
7926 curr = &sdcc_vreg_data[dev_id - 1];
7927 curr_vdd_reg = curr->vdd_data;
7928 curr_vccq_reg = curr->vccq_data;
7929 curr_vddp_reg = curr->vddp_data;
7930
7931 /* check if regulators are initialized or not? */
7932 if ((curr_vdd_reg && !curr_vdd_reg->reg) ||
7933 (curr_vccq_reg && !curr_vccq_reg->reg) ||
7934 (curr_vddp_reg && !curr_vddp_reg->reg)) {
7935 /* initialize voltage regulators required for this SDCC */
7936 rc = msm_sdcc_vreg_init(dev_id, 1);
7937 if (rc) {
7938 pr_err("%s: regulator init failed = %d\n",
7939 __func__, rc);
7940 goto out;
7941 }
7942 }
7943
7944 if (curr->sts == enable)
7945 goto out;
7946
7947 if (curr_vdd_reg) {
7948 if (enable)
7949 rc = msm_sdcc_vreg_enable(curr_vdd_reg);
7950 else
7951 rc = msm_sdcc_vreg_disable(curr_vdd_reg);
7952 if (rc)
7953 goto out;
7954 }
7955
7956 if (curr_vccq_reg) {
7957 if (enable)
7958 rc = msm_sdcc_vreg_enable(curr_vccq_reg);
7959 else
7960 rc = msm_sdcc_vreg_disable(curr_vccq_reg);
7961 if (rc)
7962 goto out;
7963 }
7964
7965 if (curr_vddp_reg) {
7966 if (enable)
7967 rc = msm_sdcc_vreg_enable(curr_vddp_reg);
7968 else
7969 rc = msm_sdcc_vreg_disable(curr_vddp_reg);
7970 if (rc)
7971 goto out;
7972 }
7973 curr->sts = enable;
7974
7975out:
7976 return rc;
7977}
7978
7979static u32 msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
7980{
7981 u32 rc_pin_cfg = 0;
7982 u32 rc_vreg_cfg = 0;
7983 u32 rc = 0;
7984 struct platform_device *pdev;
7985 struct msm_sdcc_pin_cfg *curr_pin_cfg;
7986
7987 pdev = container_of(dv, struct platform_device, dev);
7988
7989 /* setup gpio/pad */
7990 curr_pin_cfg = &sdcc_pin_cfg_data[pdev->id - 1];
7991 if (curr_pin_cfg->cfg_sts == !!vdd)
7992 goto setup_vreg;
7993
7994 if (curr_pin_cfg->is_gpio)
7995 rc_pin_cfg = msm_sdcc_setup_gpio(pdev->id, !!vdd);
7996 else
7997 rc_pin_cfg = msm_sdcc_setup_pad(pdev->id, !!vdd);
7998
7999setup_vreg:
8000 /* setup voltage regulators */
8001 rc_vreg_cfg = msm_sdcc_setup_vreg(pdev->id, !!vdd);
8002
8003 if (rc_pin_cfg || rc_vreg_cfg)
8004 rc = rc_pin_cfg ? rc_pin_cfg : rc_vreg_cfg;
8005
8006 return rc;
8007}
8008
8009static void msm_sdcc_sdio_lpm_gpio(struct device *dv, unsigned int active)
8010{
8011 struct msm_sdcc_pin_cfg *curr_pin_cfg;
8012 struct platform_device *pdev;
8013
8014 pdev = container_of(dv, struct platform_device, dev);
8015 /* setup gpio/pad */
8016 curr_pin_cfg = &sdcc_pin_cfg_data[pdev->id - 1];
8017
8018 if (curr_pin_cfg->cfg_sts == active)
8019 return;
8020
8021 curr_pin_cfg->sdio_lpm_gpio_cfg = 1;
8022 if (curr_pin_cfg->is_gpio)
8023 msm_sdcc_setup_gpio(pdev->id, active);
8024 else
8025 msm_sdcc_setup_pad(pdev->id, active);
8026 curr_pin_cfg->sdio_lpm_gpio_cfg = 0;
8027}
8028
8029static int msm_sdc3_get_wpswitch(struct device *dev)
8030{
8031 struct platform_device *pdev;
8032 int status;
8033 pdev = container_of(dev, struct platform_device, dev);
8034
8035 status = gpio_request(GPIO_SDC_WP, "SD_WP_Switch");
8036 if (status) {
8037 pr_err("%s:Failed to request GPIO %d\n",
8038 __func__, GPIO_SDC_WP);
8039 } else {
8040 status = gpio_direction_input(GPIO_SDC_WP);
8041 if (!status) {
8042 status = gpio_get_value_cansleep(GPIO_SDC_WP);
8043 pr_info("%s: WP Status for Slot %d = %d\n",
8044 __func__, pdev->id, status);
8045 }
8046 gpio_free(GPIO_SDC_WP);
8047 }
8048 return status;
8049}
8050
8051#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8052int sdc5_register_status_notify(void (*callback)(int, void *),
8053 void *dev_id)
8054{
8055 sdc5_status_notify_cb = callback;
8056 sdc5_status_notify_cb_devid = dev_id;
8057 return 0;
8058}
8059#endif
8060
8061#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8062int sdc2_register_status_notify(void (*callback)(int, void *),
8063 void *dev_id)
8064{
8065 sdc2_status_notify_cb = callback;
8066 sdc2_status_notify_cb_devid = dev_id;
8067 return 0;
8068}
8069#endif
8070
8071/* Interrupt handler for SDC2 and SDC5 detection
8072 * This function uses dual-edge interrputs settings in order
8073 * to get SDIO detection when the GPIO is rising and SDIO removal
8074 * when the GPIO is falling */
8075static irqreturn_t msm8x60_multi_sdio_slot_status_irq(int irq, void *dev_id)
8076{
8077 int status;
8078
8079 if (!machine_is_msm8x60_fusion() &&
8080 !machine_is_msm8x60_fusn_ffa())
8081 return IRQ_NONE;
8082
8083 status = gpio_get_value(MDM2AP_SYNC);
8084 pr_info("%s: MDM2AP_SYNC Status = %d\n",
8085 __func__, status);
8086
8087#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8088 if (sdc2_status_notify_cb) {
8089 pr_info("%s: calling sdc2_status_notify_cb\n", __func__);
8090 sdc2_status_notify_cb(status,
8091 sdc2_status_notify_cb_devid);
8092 }
8093#endif
8094
8095#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8096 if (sdc5_status_notify_cb) {
8097 pr_info("%s: calling sdc5_status_notify_cb\n", __func__);
8098 sdc5_status_notify_cb(status,
8099 sdc5_status_notify_cb_devid);
8100 }
8101#endif
8102 return IRQ_HANDLED;
8103}
8104
8105static int msm8x60_multi_sdio_init(void)
8106{
8107 int ret, irq_num;
8108
8109 if (!machine_is_msm8x60_fusion() &&
8110 !machine_is_msm8x60_fusn_ffa())
8111 return 0;
8112
8113 ret = msm_gpiomux_get(MDM2AP_SYNC);
8114 if (ret) {
8115 pr_err("%s:Failed to request GPIO %d, ret=%d\n",
8116 __func__, MDM2AP_SYNC, ret);
8117 return ret;
8118 }
8119
8120 irq_num = gpio_to_irq(MDM2AP_SYNC);
8121
8122 ret = request_irq(irq_num,
8123 msm8x60_multi_sdio_slot_status_irq,
8124 IRQ_TYPE_EDGE_BOTH,
8125 "sdio_multidetection", NULL);
8126
8127 if (ret) {
8128 pr_err("%s:Failed to request irq, ret=%d\n",
8129 __func__, ret);
8130 return ret;
8131 }
8132
8133 return ret;
8134}
8135
8136#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8137#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
8138static unsigned int msm8x60_sdcc_slot_status(struct device *dev)
8139{
8140 int status;
8141
8142 status = gpio_request(PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1)
8143 , "SD_HW_Detect");
8144 if (status) {
8145 pr_err("%s:Failed to request GPIO %d\n", __func__,
8146 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8147 } else {
8148 status = gpio_direction_input(
8149 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8150 if (!status)
8151 status = !(gpio_get_value_cansleep(
8152 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1)));
8153 gpio_free(PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8154 }
8155 return (unsigned int) status;
8156}
8157#endif
8158#endif
8159
8160#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8161static int msm_sdcc_cfg_mpm_sdiowakeup(struct device *dev, unsigned mode)
8162{
8163 struct platform_device *pdev;
8164 enum msm_mpm_pin pin;
8165 int ret = 0;
8166
8167 pdev = container_of(dev, struct platform_device, dev);
8168
8169 /* Only SDCC4 slot connected to WLAN chip has wakeup capability */
8170 if (pdev->id == 4)
8171 pin = MSM_MPM_PIN_SDC4_DAT1;
8172 else
8173 return -EINVAL;
8174
8175 switch (mode) {
8176 case SDC_DAT1_DISABLE:
8177 ret = msm_mpm_enable_pin(pin, 0);
8178 break;
8179 case SDC_DAT1_ENABLE:
8180 ret = msm_mpm_set_pin_type(pin, IRQ_TYPE_LEVEL_LOW);
8181 ret = msm_mpm_enable_pin(pin, 1);
8182 break;
8183 case SDC_DAT1_ENWAKE:
8184 ret = msm_mpm_set_pin_wake(pin, 1);
8185 break;
8186 case SDC_DAT1_DISWAKE:
8187 ret = msm_mpm_set_pin_wake(pin, 0);
8188 break;
8189 default:
8190 ret = -EINVAL;
8191 break;
8192 }
8193 return ret;
8194}
8195#endif
8196#endif
8197
8198#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
8199static struct mmc_platform_data msm8x60_sdc1_data = {
8200 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8201 .translate_vdd = msm_sdcc_setup_power,
8202#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
8203 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
8204#else
8205 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8206#endif
8207 .msmsdcc_fmin = 400000,
8208 .msmsdcc_fmid = 24000000,
8209 .msmsdcc_fmax = 48000000,
8210 .nonremovable = 1,
8211 .pclk_src_dfab = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008212};
8213#endif
8214
8215#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8216static struct mmc_platform_data msm8x60_sdc2_data = {
8217 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_165_195,
8218 .translate_vdd = msm_sdcc_setup_power,
8219 .sdio_lpm_gpio_setup = msm_sdcc_sdio_lpm_gpio,
8220 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
8221 .msmsdcc_fmin = 400000,
8222 .msmsdcc_fmid = 24000000,
8223 .msmsdcc_fmax = 48000000,
8224 .nonremovable = 0,
8225 .pclk_src_dfab = 1,
8226 .register_status_notify = sdc2_register_status_notify,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008227#ifdef CONFIG_MSM_SDIO_AL
8228 .is_sdio_al_client = 1,
8229#endif
8230};
8231#endif
8232
8233#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8234static struct mmc_platform_data msm8x60_sdc3_data = {
8235 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8236 .translate_vdd = msm_sdcc_setup_power,
8237 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8238 .wpswitch = msm_sdc3_get_wpswitch,
8239#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
8240 .status = msm8x60_sdcc_slot_status,
8241 .status_irq = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
8242 PMIC_GPIO_SDC3_DET - 1),
8243 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
8244#endif
8245 .msmsdcc_fmin = 400000,
8246 .msmsdcc_fmid = 24000000,
8247 .msmsdcc_fmax = 48000000,
8248 .nonremovable = 0,
8249 .pclk_src_dfab = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008250};
8251#endif
8252
8253#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8254static struct mmc_platform_data msm8x60_sdc4_data = {
8255 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8256 .translate_vdd = msm_sdcc_setup_power,
8257 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8258 .msmsdcc_fmin = 400000,
8259 .msmsdcc_fmid = 24000000,
8260 .msmsdcc_fmax = 48000000,
8261 .nonremovable = 0,
8262 .pclk_src_dfab = 1,
8263 .cfg_mpm_sdiowakeup = msm_sdcc_cfg_mpm_sdiowakeup,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008264};
8265#endif
8266
8267#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8268static struct mmc_platform_data msm8x60_sdc5_data = {
8269 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_165_195,
8270 .translate_vdd = msm_sdcc_setup_power,
8271 .sdio_lpm_gpio_setup = msm_sdcc_sdio_lpm_gpio,
8272 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8273 .msmsdcc_fmin = 400000,
8274 .msmsdcc_fmid = 24000000,
8275 .msmsdcc_fmax = 48000000,
8276 .nonremovable = 0,
8277 .pclk_src_dfab = 1,
8278 .register_status_notify = sdc5_register_status_notify,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008279#ifdef CONFIG_MSM_SDIO_AL
8280 .is_sdio_al_client = 1,
8281#endif
8282};
8283#endif
8284
8285static void __init msm8x60_init_mmc(void)
8286{
8287#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
8288 /* SDCC1 : eMMC card connected */
8289 sdcc_vreg_data[0].vdd_data = &sdcc_vdd_reg_data[0];
8290 sdcc_vreg_data[0].vdd_data->reg_name = "8901_l5";
8291 sdcc_vreg_data[0].vdd_data->set_voltage_sup = 1;
8292 sdcc_vreg_data[0].vdd_data->level = 2850000;
Subhash Jadavania8482a32011-08-08 11:01:44 +05308293 sdcc_vreg_data[0].vdd_data->always_on = 1;
8294 sdcc_vreg_data[0].vdd_data->op_pwr_mode_sup = 1;
8295 sdcc_vreg_data[0].vdd_data->lpm_uA = 9000;
8296 sdcc_vreg_data[0].vdd_data->hpm_uA = 200000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008297
8298 sdcc_vreg_data[0].vccq_data = &sdcc_vccq_reg_data[0];
8299 sdcc_vreg_data[0].vccq_data->reg_name = "8901_lvs0";
8300 sdcc_vreg_data[0].vccq_data->set_voltage_sup = 0;
8301 sdcc_vreg_data[0].vccq_data->always_on = 1;
8302
8303 msm_add_sdcc(1, &msm8x60_sdc1_data);
8304#endif
8305#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8306 /*
8307 * MDM SDIO client is connected to SDC2 on charm SURF/FFA
8308 * and no card is connected on 8660 SURF/FFA/FLUID.
8309 */
8310 sdcc_vreg_data[1].vdd_data = &sdcc_vdd_reg_data[1];
8311 sdcc_vreg_data[1].vdd_data->reg_name = "8058_s3";
8312 sdcc_vreg_data[1].vdd_data->set_voltage_sup = 1;
8313 sdcc_vreg_data[1].vdd_data->level = 1800000;
8314
8315 sdcc_vreg_data[1].vccq_data = NULL;
8316
8317 if (machine_is_msm8x60_fusion())
8318 msm8x60_sdc2_data.msmsdcc_fmax = 24000000;
8319 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8320#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
8321 msm8x60_sdc2_data.sdiowakeup_irq = gpio_to_irq(144);
8322 msm_sdcc_setup_gpio(2, 1);
8323#endif
8324 msm_add_sdcc(2, &msm8x60_sdc2_data);
8325 }
8326#endif
8327#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8328 /* SDCC3 : External card slot connected */
8329 sdcc_vreg_data[2].vdd_data = &sdcc_vdd_reg_data[2];
8330 sdcc_vreg_data[2].vdd_data->reg_name = "8058_l14";
8331 sdcc_vreg_data[2].vdd_data->set_voltage_sup = 1;
8332 sdcc_vreg_data[2].vdd_data->level = 2850000;
8333 sdcc_vreg_data[2].vdd_data->always_on = 1;
8334 sdcc_vreg_data[2].vdd_data->op_pwr_mode_sup = 1;
8335 sdcc_vreg_data[2].vdd_data->lpm_uA = 9000;
8336 sdcc_vreg_data[2].vdd_data->hpm_uA = 200000;
8337
8338 sdcc_vreg_data[2].vccq_data = NULL;
8339
8340 sdcc_vreg_data[2].vddp_data = &sdcc_vddp_reg_data[2];
8341 sdcc_vreg_data[2].vddp_data->reg_name = "8058_l5";
8342 sdcc_vreg_data[2].vddp_data->set_voltage_sup = 1;
8343 sdcc_vreg_data[2].vddp_data->level = 2850000;
8344 sdcc_vreg_data[2].vddp_data->always_on = 1;
8345 sdcc_vreg_data[2].vddp_data->op_pwr_mode_sup = 1;
8346 /* Sleep current required is ~300 uA. But min. RPM
8347 * vote can be in terms of mA (min. 1 mA).
8348 * So let's vote for 2 mA during sleep.
8349 */
8350 sdcc_vreg_data[2].vddp_data->lpm_uA = 2000;
8351 /* Max. Active current required is 16 mA */
8352 sdcc_vreg_data[2].vddp_data->hpm_uA = 16000;
8353
8354 if (machine_is_msm8x60_fluid())
8355 msm8x60_sdc3_data.wpswitch = NULL;
8356 msm_add_sdcc(3, &msm8x60_sdc3_data);
8357#endif
8358#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8359 /* SDCC4 : WLAN WCN1314 chip is connected */
8360 sdcc_vreg_data[3].vdd_data = &sdcc_vdd_reg_data[3];
8361 sdcc_vreg_data[3].vdd_data->reg_name = "8058_s3";
8362 sdcc_vreg_data[3].vdd_data->set_voltage_sup = 1;
8363 sdcc_vreg_data[3].vdd_data->level = 1800000;
8364
8365 sdcc_vreg_data[3].vccq_data = NULL;
8366
8367 msm_add_sdcc(4, &msm8x60_sdc4_data);
8368#endif
8369#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8370 /*
8371 * MDM SDIO client is connected to SDC5 on charm SURF/FFA
8372 * and no card is connected on 8660 SURF/FFA/FLUID.
8373 */
8374 sdcc_vreg_data[4].vdd_data = &sdcc_vdd_reg_data[4];
8375 sdcc_vreg_data[4].vdd_data->reg_name = "8058_s3";
8376 sdcc_vreg_data[4].vdd_data->set_voltage_sup = 1;
8377 sdcc_vreg_data[4].vdd_data->level = 1800000;
8378
8379 sdcc_vreg_data[4].vccq_data = NULL;
8380
8381 if (machine_is_msm8x60_fusion())
8382 msm8x60_sdc5_data.msmsdcc_fmax = 24000000;
8383 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8384#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
8385 msm8x60_sdc5_data.sdiowakeup_irq = gpio_to_irq(99);
8386 msm_sdcc_setup_gpio(5, 1);
8387#endif
8388 msm_add_sdcc(5, &msm8x60_sdc5_data);
8389 }
8390#endif
8391}
8392
8393#if !defined(CONFIG_GPIO_SX150X) && !defined(CONFIG_GPIO_SX150X_MODULE)
8394static inline void display_common_power(int on) {}
8395#else
8396
8397#define _GET_REGULATOR(var, name) do { \
8398 if (var == NULL) { \
8399 var = regulator_get(NULL, name); \
8400 if (IS_ERR(var)) { \
8401 pr_err("'%s' regulator not found, rc=%ld\n", \
8402 name, PTR_ERR(var)); \
8403 var = NULL; \
8404 } \
8405 } \
8406} while (0)
8407
8408static int dsub_regulator(int on)
8409{
8410 static struct regulator *dsub_reg;
8411 static struct regulator *mpp0_reg;
8412 static int dsub_reg_enabled;
8413 int rc = 0;
8414
8415 _GET_REGULATOR(dsub_reg, "8901_l3");
8416 if (IS_ERR(dsub_reg)) {
8417 printk(KERN_ERR "%s: failed to get reg 8901_l3 err=%ld",
8418 __func__, PTR_ERR(dsub_reg));
8419 return PTR_ERR(dsub_reg);
8420 }
8421
8422 _GET_REGULATOR(mpp0_reg, "8901_mpp0");
8423 if (IS_ERR(mpp0_reg)) {
8424 printk(KERN_ERR "%s: failed to get reg 8901_mpp0 err=%ld",
8425 __func__, PTR_ERR(mpp0_reg));
8426 return PTR_ERR(mpp0_reg);
8427 }
8428
8429 if (on && !dsub_reg_enabled) {
8430 rc = regulator_set_voltage(dsub_reg, 3300000, 3300000);
8431 if (rc) {
8432 printk(KERN_ERR "%s: failed to set reg 8901_l3 voltage"
8433 " err=%d", __func__, rc);
8434 goto dsub_regulator_err;
8435 }
8436 rc = regulator_enable(dsub_reg);
8437 if (rc) {
8438 printk(KERN_ERR "%s: failed to enable reg 8901_l3"
8439 " err=%d", __func__, rc);
8440 goto dsub_regulator_err;
8441 }
8442 rc = regulator_enable(mpp0_reg);
8443 if (rc) {
8444 printk(KERN_ERR "%s: failed to enable reg 8901_mpp0"
8445 " err=%d", __func__, rc);
8446 goto dsub_regulator_err;
8447 }
8448 dsub_reg_enabled = 1;
8449 } else if (!on && dsub_reg_enabled) {
8450 rc = regulator_disable(dsub_reg);
8451 if (rc)
8452 printk(KERN_WARNING "%s: failed to disable reg 8901_l3"
8453 " err=%d", __func__, rc);
8454 rc = regulator_disable(mpp0_reg);
8455 if (rc)
8456 printk(KERN_WARNING "%s: failed to disable reg "
8457 "8901_mpp0 err=%d", __func__, rc);
8458 dsub_reg_enabled = 0;
8459 }
8460
8461 return rc;
8462
8463dsub_regulator_err:
8464 regulator_put(mpp0_reg);
8465 regulator_put(dsub_reg);
8466 return rc;
8467}
8468
8469static int display_power_on;
8470static void setup_display_power(void)
8471{
8472 if (display_power_on)
8473 if (lcdc_vga_enabled) {
8474 dsub_regulator(1);
8475 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 0);
8476 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 0);
8477 if (machine_is_msm8x60_ffa() ||
8478 machine_is_msm8x60_fusn_ffa())
8479 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 1);
8480 } else {
8481 dsub_regulator(0);
8482 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 1);
8483 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 1);
8484 if (machine_is_msm8x60_ffa() ||
8485 machine_is_msm8x60_fusn_ffa())
8486 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 0);
8487 }
8488 else {
8489 dsub_regulator(0);
8490 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa())
8491 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 0);
8492 /* BACKLIGHT */
8493 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 0);
8494 /* LVDS */
8495 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 0);
8496 }
8497}
8498
8499#define _GET_REGULATOR(var, name) do { \
8500 if (var == NULL) { \
8501 var = regulator_get(NULL, name); \
8502 if (IS_ERR(var)) { \
8503 pr_err("'%s' regulator not found, rc=%ld\n", \
8504 name, PTR_ERR(var)); \
8505 var = NULL; \
8506 } \
8507 } \
8508} while (0)
8509
8510#define GPIO_RESX_N (GPIO_EXPANDER_GPIO_BASE + 2)
8511
8512static void display_common_power(int on)
8513{
8514 int rc;
8515 static struct regulator *display_reg;
8516
8517 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
8518 machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8519 if (on) {
8520 /* LVDS */
8521 _GET_REGULATOR(display_reg, "8901_l2");
8522 if (!display_reg)
8523 return;
8524 rc = regulator_set_voltage(display_reg,
8525 3300000, 3300000);
8526 if (rc)
8527 goto out;
8528 rc = regulator_enable(display_reg);
8529 if (rc)
8530 goto out;
8531 rc = gpio_request(GPIO_LVDS_SHUTDOWN_N,
8532 "LVDS_STDN_OUT_N");
8533 if (rc) {
8534 printk(KERN_ERR "%s: LVDS gpio %d request"
8535 "failed\n", __func__,
8536 GPIO_LVDS_SHUTDOWN_N);
8537 goto out2;
8538 }
8539
8540 /* BACKLIGHT */
8541 rc = gpio_request(GPIO_BACKLIGHT_EN, "BACKLIGHT_EN");
8542 if (rc) {
8543 printk(KERN_ERR "%s: BACKLIGHT gpio %d request"
8544 "failed\n", __func__,
8545 GPIO_BACKLIGHT_EN);
8546 goto out3;
8547 }
8548
8549 if (machine_is_msm8x60_ffa() ||
8550 machine_is_msm8x60_fusn_ffa()) {
8551 rc = gpio_request(GPIO_DONGLE_PWR_EN,
8552 "DONGLE_PWR_EN");
8553 if (rc) {
8554 printk(KERN_ERR "%s: DONGLE_PWR_EN gpio"
8555 " %d request failed\n", __func__,
8556 GPIO_DONGLE_PWR_EN);
8557 goto out4;
8558 }
8559 }
8560
8561 gpio_direction_output(GPIO_LVDS_SHUTDOWN_N, 0);
8562 gpio_direction_output(GPIO_BACKLIGHT_EN, 0);
8563 if (machine_is_msm8x60_ffa() ||
8564 machine_is_msm8x60_fusn_ffa())
8565 gpio_direction_output(GPIO_DONGLE_PWR_EN, 0);
8566 mdelay(20);
8567 display_power_on = 1;
8568 setup_display_power();
8569 } else {
8570 if (display_power_on) {
8571 display_power_on = 0;
8572 setup_display_power();
8573 mdelay(20);
8574 if (machine_is_msm8x60_ffa() ||
8575 machine_is_msm8x60_fusn_ffa())
8576 gpio_free(GPIO_DONGLE_PWR_EN);
8577 goto out4;
8578 }
8579 }
8580 }
8581#if defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
8582 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA)
8583 else if (machine_is_msm8x60_fluid()) {
8584 static struct regulator *fluid_reg;
8585 static struct regulator *fluid_reg2;
8586
8587 if (on) {
8588 _GET_REGULATOR(fluid_reg, "8901_l2");
8589 if (!fluid_reg)
8590 return;
8591 _GET_REGULATOR(fluid_reg2, "8058_s3");
8592 if (!fluid_reg2) {
8593 regulator_put(fluid_reg);
8594 return;
8595 }
8596 rc = gpio_request(GPIO_RESX_N, "RESX_N");
8597 if (rc) {
8598 regulator_put(fluid_reg2);
8599 regulator_put(fluid_reg);
8600 return;
8601 }
8602 regulator_set_voltage(fluid_reg, 2850000, 2850000);
8603 regulator_set_voltage(fluid_reg2, 1800000, 1800000);
8604 regulator_enable(fluid_reg);
8605 regulator_enable(fluid_reg2);
8606 msleep(20);
8607 gpio_direction_output(GPIO_RESX_N, 0);
8608 udelay(10);
8609 gpio_set_value_cansleep(GPIO_RESX_N, 1);
8610 display_power_on = 1;
8611 setup_display_power();
8612 } else {
8613 gpio_set_value_cansleep(GPIO_RESX_N, 0);
8614 gpio_free(GPIO_RESX_N);
8615 msleep(20);
8616 regulator_disable(fluid_reg2);
8617 regulator_disable(fluid_reg);
8618 regulator_put(fluid_reg2);
8619 regulator_put(fluid_reg);
8620 display_power_on = 0;
8621 setup_display_power();
8622 fluid_reg = NULL;
8623 fluid_reg2 = NULL;
8624 }
8625 }
8626#endif
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04008627#if defined(CONFIG_FB_MSM_LCDC_NT35582_WVGA)
8628 else if (machine_is_msm8x60_dragon()) {
8629 static struct regulator *dragon_reg;
8630 static struct regulator *dragon_reg2;
8631
8632 if (on) {
8633 _GET_REGULATOR(dragon_reg, "8901_l2");
8634 if (!dragon_reg)
8635 return;
8636 _GET_REGULATOR(dragon_reg2, "8058_l16");
8637 if (!dragon_reg2) {
8638 regulator_put(dragon_reg);
8639 dragon_reg = NULL;
8640 return;
8641 }
8642
8643 rc = gpio_request(GPIO_NT35582_BL_EN, "lcdc_bl_en");
8644 if (rc) {
8645 pr_err("%s: gpio %d request failed with rc=%d\n",
8646 __func__, GPIO_NT35582_BL_EN, rc);
8647 regulator_put(dragon_reg);
8648 regulator_put(dragon_reg2);
8649 dragon_reg = NULL;
8650 dragon_reg2 = NULL;
8651 return;
8652 }
8653
8654 if (gpio_tlmm_config(GPIO_CFG(GPIO_NT35582_RESET, 0,
8655 GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN,
8656 GPIO_CFG_16MA), GPIO_CFG_ENABLE)) {
8657 pr_err("%s: config gpio '%d' failed!\n",
8658 __func__, GPIO_NT35582_RESET);
8659 gpio_free(GPIO_NT35582_BL_EN);
8660 regulator_put(dragon_reg);
8661 regulator_put(dragon_reg2);
8662 dragon_reg = NULL;
8663 dragon_reg2 = NULL;
8664 return;
8665 }
8666
8667 rc = gpio_request(GPIO_NT35582_RESET, "lcdc_reset");
8668 if (rc) {
8669 pr_err("%s: unable to request gpio %d (rc=%d)\n",
8670 __func__, GPIO_NT35582_RESET, rc);
8671 gpio_free(GPIO_NT35582_BL_EN);
8672 regulator_put(dragon_reg);
8673 regulator_put(dragon_reg2);
8674 dragon_reg = NULL;
8675 dragon_reg2 = NULL;
8676 return;
8677 }
8678
8679 regulator_set_voltage(dragon_reg, 3300000, 3300000);
8680 regulator_set_voltage(dragon_reg2, 1800000, 1800000);
8681 regulator_enable(dragon_reg);
8682 regulator_enable(dragon_reg2);
8683 msleep(20);
8684
8685 gpio_set_value_cansleep(GPIO_NT35582_RESET, 1);
8686 msleep(20);
8687 gpio_set_value_cansleep(GPIO_NT35582_RESET, 0);
8688 msleep(20);
8689 gpio_set_value_cansleep(GPIO_NT35582_RESET, 1);
8690 msleep(50);
8691
8692 gpio_set_value_cansleep(GPIO_NT35582_BL_EN, 1);
8693
8694 display_power_on = 1;
8695 } else if ((dragon_reg != NULL) && (dragon_reg2 != NULL)) {
8696 gpio_free(GPIO_NT35582_RESET);
8697 gpio_free(GPIO_NT35582_BL_EN);
8698 regulator_disable(dragon_reg2);
8699 regulator_disable(dragon_reg);
8700 regulator_put(dragon_reg2);
8701 regulator_put(dragon_reg);
8702 display_power_on = 0;
8703 dragon_reg = NULL;
8704 dragon_reg2 = NULL;
8705 }
8706 }
8707#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008708 return;
8709
8710out4:
8711 gpio_free(GPIO_BACKLIGHT_EN);
8712out3:
8713 gpio_free(GPIO_LVDS_SHUTDOWN_N);
8714out2:
8715 regulator_disable(display_reg);
8716out:
8717 regulator_put(display_reg);
8718 display_reg = NULL;
8719}
8720#undef _GET_REGULATOR
8721#endif
8722
8723static int mipi_dsi_panel_power(int on);
8724
8725#define LCDC_NUM_GPIO 28
8726#define LCDC_GPIO_START 0
8727
8728static void lcdc_samsung_panel_power(int on)
8729{
8730 int n, ret = 0;
8731
8732 display_common_power(on);
8733
8734 for (n = 0; n < LCDC_NUM_GPIO; n++) {
8735 if (on) {
8736 ret = gpio_request(LCDC_GPIO_START + n, "LCDC_GPIO");
8737 if (unlikely(ret)) {
8738 pr_err("%s not able to get gpio\n", __func__);
8739 break;
8740 }
8741 } else
8742 gpio_free(LCDC_GPIO_START + n);
8743 }
8744
8745 if (ret) {
8746 for (n--; n >= 0; n--)
8747 gpio_free(LCDC_GPIO_START + n);
8748 }
8749
8750 mipi_dsi_panel_power(0); /* set 8058_ldo0 to LPM */
8751}
8752
8753#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
8754#define _GET_REGULATOR(var, name) do { \
8755 var = regulator_get(NULL, name); \
8756 if (IS_ERR(var)) { \
8757 pr_err("'%s' regulator not found, rc=%ld\n", \
8758 name, IS_ERR(var)); \
8759 var = NULL; \
8760 return -ENODEV; \
8761 } \
8762} while (0)
8763
8764static int hdmi_enable_5v(int on)
8765{
8766 static struct regulator *reg_8901_hdmi_mvs; /* HDMI_5V */
8767 static struct regulator *reg_8901_mpp0; /* External 5V */
8768 static int prev_on;
8769 int rc;
8770
8771 if (on == prev_on)
8772 return 0;
8773
8774 if (!reg_8901_hdmi_mvs)
8775 _GET_REGULATOR(reg_8901_hdmi_mvs, "8901_hdmi_mvs");
8776 if (!reg_8901_mpp0)
8777 _GET_REGULATOR(reg_8901_mpp0, "8901_mpp0");
8778
8779 if (on) {
8780 rc = regulator_enable(reg_8901_mpp0);
8781 if (rc) {
8782 pr_err("'%s' regulator enable failed, rc=%d\n",
8783 "reg_8901_mpp0", rc);
8784 return rc;
8785 }
8786 rc = regulator_enable(reg_8901_hdmi_mvs);
8787 if (rc) {
8788 pr_err("'%s' regulator enable failed, rc=%d\n",
8789 "8901_hdmi_mvs", rc);
8790 return rc;
8791 }
8792 pr_info("%s(on): success\n", __func__);
8793 } else {
8794 rc = regulator_disable(reg_8901_hdmi_mvs);
8795 if (rc)
8796 pr_warning("'%s' regulator disable failed, rc=%d\n",
8797 "8901_hdmi_mvs", rc);
8798 rc = regulator_disable(reg_8901_mpp0);
8799 if (rc)
8800 pr_warning("'%s' regulator disable failed, rc=%d\n",
8801 "reg_8901_mpp0", rc);
8802 pr_info("%s(off): success\n", __func__);
8803 }
8804
8805 prev_on = on;
8806
8807 return 0;
8808}
8809
8810static int hdmi_core_power(int on, int show)
8811{
8812 static struct regulator *reg_8058_l16; /* VDD_HDMI */
8813 static int prev_on;
8814 int rc;
8815
8816 if (on == prev_on)
8817 return 0;
8818
8819 if (!reg_8058_l16)
8820 _GET_REGULATOR(reg_8058_l16, "8058_l16");
8821
8822 if (on) {
8823 rc = regulator_set_voltage(reg_8058_l16, 1800000, 1800000);
8824 if (!rc)
8825 rc = regulator_enable(reg_8058_l16);
8826 if (rc) {
8827 pr_err("'%s' regulator enable failed, rc=%d\n",
8828 "8058_l16", rc);
8829 return rc;
8830 }
8831 rc = gpio_request(170, "HDMI_DDC_CLK");
8832 if (rc) {
8833 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8834 "HDMI_DDC_CLK", 170, rc);
8835 goto error1;
8836 }
8837 rc = gpio_request(171, "HDMI_DDC_DATA");
8838 if (rc) {
8839 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8840 "HDMI_DDC_DATA", 171, rc);
8841 goto error2;
8842 }
8843 rc = gpio_request(172, "HDMI_HPD");
8844 if (rc) {
8845 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8846 "HDMI_HPD", 172, rc);
8847 goto error3;
8848 }
8849 pr_info("%s(on): success\n", __func__);
8850 } else {
8851 gpio_free(170);
8852 gpio_free(171);
8853 gpio_free(172);
8854 rc = regulator_disable(reg_8058_l16);
8855 if (rc)
8856 pr_warning("'%s' regulator disable failed, rc=%d\n",
8857 "8058_l16", rc);
8858 pr_info("%s(off): success\n", __func__);
8859 }
8860
8861 prev_on = on;
8862
8863 return 0;
8864
8865error3:
8866 gpio_free(171);
8867error2:
8868 gpio_free(170);
8869error1:
8870 regulator_disable(reg_8058_l16);
8871 return rc;
8872}
8873
8874static int hdmi_cec_power(int on)
8875{
8876 static struct regulator *reg_8901_l3; /* HDMI_CEC */
8877 static int prev_on;
8878 int rc;
8879
8880 if (on == prev_on)
8881 return 0;
8882
8883 if (!reg_8901_l3)
8884 _GET_REGULATOR(reg_8901_l3, "8901_l3");
8885
8886 if (on) {
8887 rc = regulator_set_voltage(reg_8901_l3, 3300000, 3300000);
8888 if (!rc)
8889 rc = regulator_enable(reg_8901_l3);
8890 if (rc) {
8891 pr_err("'%s' regulator enable failed, rc=%d\n",
8892 "8901_l3", rc);
8893 return rc;
8894 }
8895 rc = gpio_request(169, "HDMI_CEC_VAR");
8896 if (rc) {
8897 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8898 "HDMI_CEC_VAR", 169, rc);
8899 goto error;
8900 }
8901 pr_info("%s(on): success\n", __func__);
8902 } else {
8903 gpio_free(169);
8904 rc = regulator_disable(reg_8901_l3);
8905 if (rc)
8906 pr_warning("'%s' regulator disable failed, rc=%d\n",
8907 "8901_l3", rc);
8908 pr_info("%s(off): success\n", __func__);
8909 }
8910
8911 prev_on = on;
8912
8913 return 0;
8914error:
8915 regulator_disable(reg_8901_l3);
8916 return rc;
8917}
8918
8919#undef _GET_REGULATOR
8920
8921#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
8922
8923static int lcdc_panel_power(int on)
8924{
8925 int flag_on = !!on;
8926 static int lcdc_power_save_on;
8927
8928 if (lcdc_power_save_on == flag_on)
8929 return 0;
8930
8931 lcdc_power_save_on = flag_on;
8932
8933 lcdc_samsung_panel_power(on);
8934
8935 return 0;
8936}
8937
8938#ifdef CONFIG_MSM_BUS_SCALING
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008939static struct msm_bus_vectors mdp_init_vectors[] = {
8940 /* For now, 0th array entry is reserved.
8941 * Please leave 0 as is and don't use it
8942 */
8943 {
8944 .src = MSM_BUS_MASTER_MDP_PORT0,
8945 .dst = MSM_BUS_SLAVE_SMI,
8946 .ab = 0,
8947 .ib = 0,
8948 },
8949 /* Master and slaves can be from different fabrics */
8950 {
8951 .src = MSM_BUS_MASTER_MDP_PORT0,
8952 .dst = MSM_BUS_SLAVE_EBI_CH0,
8953 .ab = 0,
8954 .ib = 0,
8955 },
8956};
8957
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07008958#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
8959static struct msm_bus_vectors hdmi_as_primary_vectors[] = {
8960 /* If HDMI is used as primary */
8961 {
8962 .src = MSM_BUS_MASTER_MDP_PORT0,
8963 .dst = MSM_BUS_SLAVE_SMI,
8964 .ab = 2000000000,
8965 .ib = 2000000000,
8966 },
8967 /* Master and slaves can be from different fabrics */
8968 {
8969 .src = MSM_BUS_MASTER_MDP_PORT0,
8970 .dst = MSM_BUS_SLAVE_EBI_CH0,
8971 .ab = 2000000000,
8972 .ib = 2000000000,
8973 },
8974};
8975
8976static struct msm_bus_paths mdp_bus_scale_usecases[] = {
8977 {
8978 ARRAY_SIZE(mdp_init_vectors),
8979 mdp_init_vectors,
8980 },
8981 {
8982 ARRAY_SIZE(hdmi_as_primary_vectors),
8983 hdmi_as_primary_vectors,
8984 },
8985 {
8986 ARRAY_SIZE(hdmi_as_primary_vectors),
8987 hdmi_as_primary_vectors,
8988 },
8989 {
8990 ARRAY_SIZE(hdmi_as_primary_vectors),
8991 hdmi_as_primary_vectors,
8992 },
8993 {
8994 ARRAY_SIZE(hdmi_as_primary_vectors),
8995 hdmi_as_primary_vectors,
8996 },
8997 {
8998 ARRAY_SIZE(hdmi_as_primary_vectors),
8999 hdmi_as_primary_vectors,
9000 },
9001};
9002#else
9003#ifdef CONFIG_FB_MSM_LCDC_DSUB
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009004static struct msm_bus_vectors mdp_sd_smi_vectors[] = {
9005 /* Default case static display/UI/2d/3d if FB SMI */
9006 {
9007 .src = MSM_BUS_MASTER_MDP_PORT0,
9008 .dst = MSM_BUS_SLAVE_SMI,
9009 .ab = 388800000,
9010 .ib = 486000000,
9011 },
9012 /* Master and slaves can be from different fabrics */
9013 {
9014 .src = MSM_BUS_MASTER_MDP_PORT0,
9015 .dst = MSM_BUS_SLAVE_EBI_CH0,
9016 .ab = 0,
9017 .ib = 0,
9018 },
9019};
9020
9021static struct msm_bus_vectors mdp_sd_ebi_vectors[] = {
9022 /* Default case static display/UI/2d/3d if FB SMI */
9023 {
9024 .src = MSM_BUS_MASTER_MDP_PORT0,
9025 .dst = MSM_BUS_SLAVE_SMI,
9026 .ab = 0,
9027 .ib = 0,
9028 },
9029 /* Master and slaves can be from different fabrics */
9030 {
9031 .src = MSM_BUS_MASTER_MDP_PORT0,
9032 .dst = MSM_BUS_SLAVE_EBI_CH0,
9033 .ab = 388800000,
9034 .ib = 486000000 * 2,
9035 },
9036};
9037static struct msm_bus_vectors mdp_vga_vectors[] = {
9038 /* VGA and less video */
9039 {
9040 .src = MSM_BUS_MASTER_MDP_PORT0,
9041 .dst = MSM_BUS_SLAVE_SMI,
9042 .ab = 458092800,
9043 .ib = 572616000,
9044 },
9045 {
9046 .src = MSM_BUS_MASTER_MDP_PORT0,
9047 .dst = MSM_BUS_SLAVE_EBI_CH0,
9048 .ab = 458092800,
9049 .ib = 572616000 * 2,
9050 },
9051};
9052static struct msm_bus_vectors mdp_720p_vectors[] = {
9053 /* 720p and less video */
9054 {
9055 .src = MSM_BUS_MASTER_MDP_PORT0,
9056 .dst = MSM_BUS_SLAVE_SMI,
9057 .ab = 471744000,
9058 .ib = 589680000,
9059 },
9060 /* Master and slaves can be from different fabrics */
9061 {
9062 .src = MSM_BUS_MASTER_MDP_PORT0,
9063 .dst = MSM_BUS_SLAVE_EBI_CH0,
9064 .ab = 471744000,
9065 .ib = 589680000 * 2,
9066 },
9067};
9068
9069static struct msm_bus_vectors mdp_1080p_vectors[] = {
9070 /* 1080p and less video */
9071 {
9072 .src = MSM_BUS_MASTER_MDP_PORT0,
9073 .dst = MSM_BUS_SLAVE_SMI,
9074 .ab = 575424000,
9075 .ib = 719280000,
9076 },
9077 /* Master and slaves can be from different fabrics */
9078 {
9079 .src = MSM_BUS_MASTER_MDP_PORT0,
9080 .dst = MSM_BUS_SLAVE_EBI_CH0,
9081 .ab = 575424000,
9082 .ib = 719280000 * 2,
9083 },
9084};
9085
9086#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009087static struct msm_bus_vectors mdp_sd_smi_vectors[] = {
9088 /* Default case static display/UI/2d/3d if FB SMI */
9089 {
9090 .src = MSM_BUS_MASTER_MDP_PORT0,
9091 .dst = MSM_BUS_SLAVE_SMI,
9092 .ab = 175110000,
9093 .ib = 218887500,
9094 },
9095 /* Master and slaves can be from different fabrics */
9096 {
9097 .src = MSM_BUS_MASTER_MDP_PORT0,
9098 .dst = MSM_BUS_SLAVE_EBI_CH0,
9099 .ab = 0,
9100 .ib = 0,
9101 },
9102};
9103
9104static struct msm_bus_vectors mdp_sd_ebi_vectors[] = {
9105 /* Default case static display/UI/2d/3d if FB SMI */
9106 {
9107 .src = MSM_BUS_MASTER_MDP_PORT0,
9108 .dst = MSM_BUS_SLAVE_SMI,
9109 .ab = 0,
9110 .ib = 0,
9111 },
9112 /* Master and slaves can be from different fabrics */
9113 {
9114 .src = MSM_BUS_MASTER_MDP_PORT0,
9115 .dst = MSM_BUS_SLAVE_EBI_CH0,
9116 .ab = 216000000,
9117 .ib = 270000000 * 2,
9118 },
9119};
9120static struct msm_bus_vectors mdp_vga_vectors[] = {
9121 /* VGA and less video */
9122 {
9123 .src = MSM_BUS_MASTER_MDP_PORT0,
9124 .dst = MSM_BUS_SLAVE_SMI,
9125 .ab = 216000000,
9126 .ib = 270000000,
9127 },
9128 {
9129 .src = MSM_BUS_MASTER_MDP_PORT0,
9130 .dst = MSM_BUS_SLAVE_EBI_CH0,
9131 .ab = 216000000,
9132 .ib = 270000000 * 2,
9133 },
9134};
9135
9136static struct msm_bus_vectors mdp_720p_vectors[] = {
9137 /* 720p and less video */
9138 {
9139 .src = MSM_BUS_MASTER_MDP_PORT0,
9140 .dst = MSM_BUS_SLAVE_SMI,
9141 .ab = 230400000,
9142 .ib = 288000000,
9143 },
9144 /* Master and slaves can be from different fabrics */
9145 {
9146 .src = MSM_BUS_MASTER_MDP_PORT0,
9147 .dst = MSM_BUS_SLAVE_EBI_CH0,
9148 .ab = 230400000,
9149 .ib = 288000000 * 2,
9150 },
9151};
9152
9153static struct msm_bus_vectors mdp_1080p_vectors[] = {
9154 /* 1080p and less video */
9155 {
9156 .src = MSM_BUS_MASTER_MDP_PORT0,
9157 .dst = MSM_BUS_SLAVE_SMI,
9158 .ab = 334080000,
9159 .ib = 417600000,
9160 },
9161 /* Master and slaves can be from different fabrics */
9162 {
9163 .src = MSM_BUS_MASTER_MDP_PORT0,
9164 .dst = MSM_BUS_SLAVE_EBI_CH0,
9165 .ab = 334080000,
Ravishangar Kalyanam731beb92011-07-07 18:27:32 -07009166 .ib = 550000000 * 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009167 },
9168};
9169
9170#endif
9171static struct msm_bus_paths mdp_bus_scale_usecases[] = {
9172 {
9173 ARRAY_SIZE(mdp_init_vectors),
9174 mdp_init_vectors,
9175 },
9176 {
9177 ARRAY_SIZE(mdp_sd_smi_vectors),
9178 mdp_sd_smi_vectors,
9179 },
9180 {
9181 ARRAY_SIZE(mdp_sd_ebi_vectors),
9182 mdp_sd_ebi_vectors,
9183 },
9184 {
9185 ARRAY_SIZE(mdp_vga_vectors),
9186 mdp_vga_vectors,
9187 },
9188 {
9189 ARRAY_SIZE(mdp_720p_vectors),
9190 mdp_720p_vectors,
9191 },
9192 {
9193 ARRAY_SIZE(mdp_1080p_vectors),
9194 mdp_1080p_vectors,
9195 },
9196};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009197#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009198static struct msm_bus_scale_pdata mdp_bus_scale_pdata = {
9199 mdp_bus_scale_usecases,
9200 ARRAY_SIZE(mdp_bus_scale_usecases),
9201 .name = "mdp",
9202};
9203
9204#endif
9205#ifdef CONFIG_MSM_BUS_SCALING
9206static struct msm_bus_vectors dtv_bus_init_vectors[] = {
9207 /* For now, 0th array entry is reserved.
9208 * Please leave 0 as is and don't use it
9209 */
9210 {
9211 .src = MSM_BUS_MASTER_MDP_PORT0,
9212 .dst = MSM_BUS_SLAVE_SMI,
9213 .ab = 0,
9214 .ib = 0,
9215 },
9216 /* Master and slaves can be from different fabrics */
9217 {
9218 .src = MSM_BUS_MASTER_MDP_PORT0,
9219 .dst = MSM_BUS_SLAVE_EBI_CH0,
9220 .ab = 0,
9221 .ib = 0,
9222 },
9223};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009224#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
9225static struct msm_bus_vectors dtv_bus_def_vectors[] = {
9226 /* For now, 0th array entry is reserved.
9227 * Please leave 0 as is and don't use it
9228 */
9229 {
9230 .src = MSM_BUS_MASTER_MDP_PORT0,
9231 .dst = MSM_BUS_SLAVE_SMI,
9232 .ab = 2000000000,
9233 .ib = 2000000000,
9234 },
9235 /* Master and slaves can be from different fabrics */
9236 {
9237 .src = MSM_BUS_MASTER_MDP_PORT0,
9238 .dst = MSM_BUS_SLAVE_EBI_CH0,
9239 .ab = 2000000000,
9240 .ib = 2000000000,
9241 },
9242};
9243#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009244static struct msm_bus_vectors dtv_bus_def_vectors[] = {
9245 /* For now, 0th array entry is reserved.
9246 * Please leave 0 as is and don't use it
9247 */
9248 {
9249 .src = MSM_BUS_MASTER_MDP_PORT0,
9250 .dst = MSM_BUS_SLAVE_SMI,
9251 .ab = 566092800,
9252 .ib = 707616000,
9253 },
9254 /* Master and slaves can be from different fabrics */
9255 {
9256 .src = MSM_BUS_MASTER_MDP_PORT0,
9257 .dst = MSM_BUS_SLAVE_EBI_CH0,
9258 .ab = 566092800,
9259 .ib = 707616000,
9260 },
9261};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009262#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009263static struct msm_bus_paths dtv_bus_scale_usecases[] = {
9264 {
9265 ARRAY_SIZE(dtv_bus_init_vectors),
9266 dtv_bus_init_vectors,
9267 },
9268 {
9269 ARRAY_SIZE(dtv_bus_def_vectors),
9270 dtv_bus_def_vectors,
9271 },
9272};
9273static struct msm_bus_scale_pdata dtv_bus_scale_pdata = {
9274 dtv_bus_scale_usecases,
9275 ARRAY_SIZE(dtv_bus_scale_usecases),
9276 .name = "dtv",
9277};
9278
9279static struct lcdc_platform_data dtv_pdata = {
9280 .bus_scale_table = &dtv_bus_scale_pdata,
9281};
9282#endif
9283
9284
9285static struct lcdc_platform_data lcdc_pdata = {
9286 .lcdc_power_save = lcdc_panel_power,
9287};
9288
9289
9290#define MDP_VSYNC_GPIO 28
9291
9292/*
9293 * MIPI_DSI only use 8058_LDO0 which need always on
9294 * therefore it need to be put at low power mode if
9295 * it was not used instead of turn it off.
9296 */
9297static int mipi_dsi_panel_power(int on)
9298{
9299 int flag_on = !!on;
9300 static int mipi_dsi_power_save_on;
9301 static struct regulator *ldo0;
9302 int rc = 0;
9303
9304 if (mipi_dsi_power_save_on == flag_on)
9305 return 0;
9306
9307 mipi_dsi_power_save_on = flag_on;
9308
9309 if (ldo0 == NULL) { /* init */
9310 ldo0 = regulator_get(NULL, "8058_l0");
9311 if (IS_ERR(ldo0)) {
9312 pr_debug("%s: LDO0 failed\n", __func__);
9313 rc = PTR_ERR(ldo0);
9314 return rc;
9315 }
9316
9317 rc = regulator_set_voltage(ldo0, 1200000, 1200000);
9318 if (rc)
9319 goto out;
9320
9321 rc = regulator_enable(ldo0);
9322 if (rc)
9323 goto out;
9324 }
9325
9326 if (on) {
9327 /* set ldo0 to HPM */
9328 rc = regulator_set_optimum_mode(ldo0, 100000);
9329 if (rc < 0)
9330 goto out;
9331 } else {
9332 /* set ldo0 to LPM */
Padmanabhan Komanduru0b478ff2011-11-22 19:15:40 +05309333 rc = regulator_set_optimum_mode(ldo0, 1000);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009334 if (rc < 0)
9335 goto out;
9336 }
9337
9338 return 0;
9339out:
9340 regulator_disable(ldo0);
9341 regulator_put(ldo0);
9342 ldo0 = NULL;
9343 return rc;
9344}
9345
9346static struct mipi_dsi_platform_data mipi_dsi_pdata = {
9347 .vsync_gpio = MDP_VSYNC_GPIO,
9348 .dsi_power_save = mipi_dsi_panel_power,
9349};
9350
9351#ifdef CONFIG_FB_MSM_TVOUT
9352static struct regulator *reg_8058_l13;
9353
9354static int atv_dac_power(int on)
9355{
9356 int rc = 0;
9357 #define _GET_REGULATOR(var, name) do { \
9358 var = regulator_get(NULL, name); \
9359 if (IS_ERR(var)) { \
9360 pr_info("'%s' regulator not found, rc=%ld\n", \
9361 name, IS_ERR(var)); \
9362 var = NULL; \
9363 return -ENODEV; \
9364 } \
9365 } while (0)
9366
9367 if (!reg_8058_l13)
9368 _GET_REGULATOR(reg_8058_l13, "8058_l13");
9369 #undef _GET_REGULATOR
9370
9371 if (on) {
9372 rc = regulator_set_voltage(reg_8058_l13, 2050000, 2050000);
9373 if (rc) {
9374 pr_info("%s: '%s' regulator set voltage failed,\
9375 rc=%d\n", __func__, "8058_l13", rc);
9376 return rc;
9377 }
9378
9379 rc = regulator_enable(reg_8058_l13);
9380 if (rc) {
9381 pr_err("%s: '%s' regulator enable failed,\
9382 rc=%d\n", __func__, "8058_l13", rc);
9383 return rc;
9384 }
9385 } else {
9386 rc = regulator_force_disable(reg_8058_l13);
9387 if (rc)
9388 pr_warning("%s: '%s' regulator disable failed, rc=%d\n",
9389 __func__, "8058_l13", rc);
9390 }
9391 return rc;
9392
9393}
9394#endif
9395
9396#ifdef CONFIG_FB_MSM_MIPI_DSI
9397int mdp_core_clk_rate_table[] = {
9398 85330000,
9399 85330000,
9400 160000000,
9401 200000000,
9402};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009403#elif defined(CONFIG_FB_MSM_HDMI_AS_PRIMARY)
9404int mdp_core_clk_rate_table[] = {
9405 200000000,
9406 200000000,
9407 200000000,
9408 200000000,
9409};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009410#else
9411int mdp_core_clk_rate_table[] = {
9412 59080000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009413 85330000,
kuogee hsieh26791a92011-08-01 18:35:58 -07009414 128000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009415 200000000,
9416};
9417#endif
9418
9419static struct msm_panel_common_pdata mdp_pdata = {
9420 .gpio = MDP_VSYNC_GPIO,
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009421#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
9422 .mdp_core_clk_rate = 200000000,
9423#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009424 .mdp_core_clk_rate = 59080000,
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009425#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009426 .mdp_core_clk_table = mdp_core_clk_rate_table,
9427 .num_mdp_clk = ARRAY_SIZE(mdp_core_clk_rate_table),
9428#ifdef CONFIG_MSM_BUS_SCALING
9429 .mdp_bus_scale_table = &mdp_bus_scale_pdata,
9430#endif
9431 .mdp_rev = MDP_REV_41,
Huaibin Yanga5419422011-12-08 23:52:10 -08009432 .mdp_writeback_memtype = MEMTYPE_EBI1,
9433 .mdp_writeback_phys = NULL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009434};
9435
Huaibin Yanga5419422011-12-08 23:52:10 -08009436static void __init reserve_mdp_memory(void)
9437{
9438 mdp_pdata.mdp_writeback_size_ov0 = MSM_FB_OVERLAY0_WRITEBACK_SIZE;
9439 mdp_pdata.mdp_writeback_size_ov1 = MSM_FB_OVERLAY1_WRITEBACK_SIZE;
9440
9441 msm8x60_reserve_table[mdp_pdata.mdp_writeback_memtype].size +=
9442 mdp_pdata.mdp_writeback_size_ov0;
9443 msm8x60_reserve_table[mdp_pdata.mdp_writeback_memtype].size +=
9444 mdp_pdata.mdp_writeback_size_ov1;
9445}
9446
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009447#ifdef CONFIG_FB_MSM_TVOUT
9448
9449#ifdef CONFIG_MSM_BUS_SCALING
9450static struct msm_bus_vectors atv_bus_init_vectors[] = {
9451 /* For now, 0th array entry is reserved.
9452 * Please leave 0 as is and don't use it
9453 */
9454 {
9455 .src = MSM_BUS_MASTER_MDP_PORT0,
9456 .dst = MSM_BUS_SLAVE_SMI,
9457 .ab = 0,
9458 .ib = 0,
9459 },
9460 /* Master and slaves can be from different fabrics */
9461 {
9462 .src = MSM_BUS_MASTER_MDP_PORT0,
9463 .dst = MSM_BUS_SLAVE_EBI_CH0,
9464 .ab = 0,
9465 .ib = 0,
9466 },
9467};
9468static struct msm_bus_vectors atv_bus_def_vectors[] = {
9469 /* For now, 0th array entry is reserved.
9470 * Please leave 0 as is and don't use it
9471 */
9472 {
9473 .src = MSM_BUS_MASTER_MDP_PORT0,
9474 .dst = MSM_BUS_SLAVE_SMI,
9475 .ab = 236390400,
9476 .ib = 265939200,
9477 },
9478 /* Master and slaves can be from different fabrics */
9479 {
9480 .src = MSM_BUS_MASTER_MDP_PORT0,
9481 .dst = MSM_BUS_SLAVE_EBI_CH0,
9482 .ab = 236390400,
9483 .ib = 265939200,
9484 },
9485};
9486static struct msm_bus_paths atv_bus_scale_usecases[] = {
9487 {
9488 ARRAY_SIZE(atv_bus_init_vectors),
9489 atv_bus_init_vectors,
9490 },
9491 {
9492 ARRAY_SIZE(atv_bus_def_vectors),
9493 atv_bus_def_vectors,
9494 },
9495};
9496static struct msm_bus_scale_pdata atv_bus_scale_pdata = {
9497 atv_bus_scale_usecases,
9498 ARRAY_SIZE(atv_bus_scale_usecases),
9499 .name = "atv",
9500};
9501#endif
9502
9503static struct tvenc_platform_data atv_pdata = {
9504 .poll = 0,
9505 .pm_vid_en = atv_dac_power,
9506#ifdef CONFIG_MSM_BUS_SCALING
9507 .bus_scale_table = &atv_bus_scale_pdata,
9508#endif
9509};
9510#endif
9511
9512static void __init msm_fb_add_devices(void)
9513{
9514#ifdef CONFIG_FB_MSM_LCDC_DSUB
9515 mdp_pdata.mdp_core_clk_table = NULL;
9516 mdp_pdata.num_mdp_clk = 0;
9517 mdp_pdata.mdp_core_clk_rate = 200000000;
9518#endif
9519 if (machine_is_msm8x60_rumi3())
9520 msm_fb_register_device("mdp", NULL);
9521 else
9522 msm_fb_register_device("mdp", &mdp_pdata);
9523
9524 msm_fb_register_device("lcdc", &lcdc_pdata);
9525 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
9526#ifdef CONFIG_MSM_BUS_SCALING
9527 msm_fb_register_device("dtv", &dtv_pdata);
9528#endif
9529#ifdef CONFIG_FB_MSM_TVOUT
9530 msm_fb_register_device("tvenc", &atv_pdata);
9531 msm_fb_register_device("tvout_device", NULL);
9532#endif
9533}
9534
9535#if (defined(CONFIG_MARIMBA_CORE)) && \
9536 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
9537
9538static const struct {
9539 char *name;
9540 int vmin;
9541 int vmax;
9542} bt_regs_info[] = {
9543 { "8058_s3", 1800000, 1800000 },
9544 { "8058_s2", 1300000, 1300000 },
9545 { "8058_l8", 2900000, 3050000 },
9546};
9547
9548static struct {
9549 bool enabled;
9550} bt_regs_status[] = {
9551 { false },
9552 { false },
9553 { false },
9554};
9555static struct regulator *bt_regs[ARRAY_SIZE(bt_regs_info)];
9556
9557static int bahama_bt(int on)
9558{
9559 int rc;
9560 int i;
9561 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
9562
9563 struct bahama_variant_register {
9564 const size_t size;
9565 const struct bahama_config_register *set;
9566 };
9567
9568 const struct bahama_config_register *p;
9569
9570 u8 version;
9571
9572 const struct bahama_config_register v10_bt_on[] = {
9573 { 0xE9, 0x00, 0xFF },
9574 { 0xF4, 0x80, 0xFF },
9575 { 0xE4, 0x00, 0xFF },
9576 { 0xE5, 0x00, 0x0F },
9577#ifdef CONFIG_WLAN
9578 { 0xE6, 0x38, 0x7F },
9579 { 0xE7, 0x06, 0xFF },
9580#endif
9581 { 0xE9, 0x21, 0xFF },
9582 { 0x01, 0x0C, 0x1F },
9583 { 0x01, 0x08, 0x1F },
9584 };
9585
9586 const struct bahama_config_register v20_bt_on_fm_off[] = {
9587 { 0x11, 0x0C, 0xFF },
9588 { 0x13, 0x01, 0xFF },
9589 { 0xF4, 0x80, 0xFF },
9590 { 0xF0, 0x00, 0xFF },
9591 { 0xE9, 0x00, 0xFF },
9592#ifdef CONFIG_WLAN
9593 { 0x81, 0x00, 0x7F },
9594 { 0x82, 0x00, 0xFF },
9595 { 0xE6, 0x38, 0x7F },
9596 { 0xE7, 0x06, 0xFF },
9597#endif
9598 { 0xE9, 0x21, 0xFF },
9599 };
9600
9601 const struct bahama_config_register v20_bt_on_fm_on[] = {
9602 { 0x11, 0x0C, 0xFF },
9603 { 0x13, 0x01, 0xFF },
9604 { 0xF4, 0x86, 0xFF },
9605 { 0xF0, 0x06, 0xFF },
9606 { 0xE9, 0x00, 0xFF },
9607#ifdef CONFIG_WLAN
9608 { 0x81, 0x00, 0x7F },
9609 { 0x82, 0x00, 0xFF },
9610 { 0xE6, 0x38, 0x7F },
9611 { 0xE7, 0x06, 0xFF },
9612#endif
9613 { 0xE9, 0x21, 0xFF },
9614 };
9615
9616 const struct bahama_config_register v10_bt_off[] = {
9617 { 0xE9, 0x00, 0xFF },
9618 };
9619
9620 const struct bahama_config_register v20_bt_off_fm_off[] = {
9621 { 0xF4, 0x84, 0xFF },
9622 { 0xF0, 0x04, 0xFF },
9623 { 0xE9, 0x00, 0xFF }
9624 };
9625
9626 const struct bahama_config_register v20_bt_off_fm_on[] = {
9627 { 0xF4, 0x86, 0xFF },
9628 { 0xF0, 0x06, 0xFF },
9629 { 0xE9, 0x00, 0xFF }
9630 };
9631 const struct bahama_variant_register bt_bahama[2][3] = {
9632 {
9633 { ARRAY_SIZE(v10_bt_off), v10_bt_off },
9634 { ARRAY_SIZE(v20_bt_off_fm_off), v20_bt_off_fm_off },
9635 { ARRAY_SIZE(v20_bt_off_fm_on), v20_bt_off_fm_on }
9636 },
9637 {
9638 { ARRAY_SIZE(v10_bt_on), v10_bt_on },
9639 { ARRAY_SIZE(v20_bt_on_fm_off), v20_bt_on_fm_off },
9640 { ARRAY_SIZE(v20_bt_on_fm_on), v20_bt_on_fm_on }
9641 }
9642 };
9643
9644 u8 offset = 0; /* index into bahama configs */
9645
9646 on = on ? 1 : 0;
9647 version = read_bahama_ver();
9648
9649 if (version == VER_UNSUPPORTED) {
9650 dev_err(&msm_bt_power_device.dev,
9651 "%s: unsupported version\n",
9652 __func__);
9653 return -EIO;
9654 }
9655
9656 if (version == VER_2_0) {
9657 if (marimba_get_fm_status(&config))
9658 offset = 0x01;
9659 }
9660
9661 /* Voting off 1.3V S2 Regulator,BahamaV2 used in Normal mode */
9662 if (on && (version == VER_2_0)) {
9663 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9664 if ((!strcmp(bt_regs_info[i].name, "8058_s2"))
9665 && (bt_regs_status[i].enabled == true)) {
9666 if (regulator_disable(bt_regs[i])) {
9667 dev_err(&msm_bt_power_device.dev,
9668 "%s: regulator disable failed",
9669 __func__);
9670 }
9671 bt_regs_status[i].enabled = false;
9672 break;
9673 }
9674 }
9675 }
9676
9677 p = bt_bahama[on][version + offset].set;
9678
9679 dev_info(&msm_bt_power_device.dev,
9680 "%s: found version %d\n", __func__, version);
9681
9682 for (i = 0; i < bt_bahama[on][version + offset].size; i++) {
9683 u8 value = (p+i)->value;
9684 rc = marimba_write_bit_mask(&config,
9685 (p+i)->reg,
9686 &value,
9687 sizeof((p+i)->value),
9688 (p+i)->mask);
9689 if (rc < 0) {
9690 dev_err(&msm_bt_power_device.dev,
9691 "%s: reg %d write failed: %d\n",
9692 __func__, (p+i)->reg, rc);
9693 return rc;
9694 }
9695 dev_dbg(&msm_bt_power_device.dev,
9696 "%s: reg 0x%02x write value 0x%02x mask 0x%02x\n",
9697 __func__, (p+i)->reg,
9698 value, (p+i)->mask);
9699 }
9700 /* Update BT Status */
9701 if (on)
9702 marimba_set_bt_status(&config, true);
9703 else
9704 marimba_set_bt_status(&config, false);
9705
9706 return 0;
9707}
9708
9709static int bluetooth_use_regulators(int on)
9710{
9711 int i, recover = -1, rc = 0;
9712
9713 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9714 bt_regs[i] = on ? regulator_get(&msm_bt_power_device.dev,
9715 bt_regs_info[i].name) :
9716 (regulator_put(bt_regs[i]), NULL);
9717 if (IS_ERR(bt_regs[i])) {
9718 rc = PTR_ERR(bt_regs[i]);
9719 dev_err(&msm_bt_power_device.dev,
9720 "regulator %s get failed (%d)\n",
9721 bt_regs_info[i].name, rc);
9722 recover = i - 1;
9723 bt_regs[i] = NULL;
9724 break;
9725 }
9726
9727 if (!on)
9728 continue;
9729
9730 rc = regulator_set_voltage(bt_regs[i],
9731 bt_regs_info[i].vmin,
9732 bt_regs_info[i].vmax);
9733 if (rc < 0) {
9734 dev_err(&msm_bt_power_device.dev,
9735 "regulator %s voltage set (%d)\n",
9736 bt_regs_info[i].name, rc);
9737 recover = i;
9738 break;
9739 }
9740 }
9741
9742 if (on && (recover > -1))
9743 for (i = recover; i >= 0; i--) {
9744 regulator_put(bt_regs[i]);
9745 bt_regs[i] = NULL;
9746 }
9747
9748 return rc;
9749}
9750
9751static int bluetooth_switch_regulators(int on)
9752{
9753 int i, rc = 0;
9754
9755 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9756 if (on && (bt_regs_status[i].enabled == false)) {
9757 rc = regulator_enable(bt_regs[i]);
9758 if (rc < 0) {
9759 dev_err(&msm_bt_power_device.dev,
9760 "regulator %s %s failed (%d)\n",
9761 bt_regs_info[i].name,
9762 "enable", rc);
9763 if (i > 0) {
9764 while (--i) {
9765 regulator_disable(bt_regs[i]);
9766 bt_regs_status[i].enabled
9767 = false;
9768 }
9769 break;
9770 }
9771 }
9772 bt_regs_status[i].enabled = true;
9773 } else if (!on && (bt_regs_status[i].enabled == true)) {
9774 rc = regulator_disable(bt_regs[i]);
9775 if (rc < 0) {
9776 dev_err(&msm_bt_power_device.dev,
9777 "regulator %s %s failed (%d)\n",
9778 bt_regs_info[i].name,
9779 "disable", rc);
9780 break;
9781 }
9782 bt_regs_status[i].enabled = false;
9783 }
9784 }
9785 return rc;
9786}
9787
9788static struct msm_xo_voter *bt_clock;
9789
9790static int bluetooth_power(int on)
9791{
9792 int rc = 0;
9793 int id;
9794
9795 /* In case probe function fails, cur_connv_type would be -1 */
9796 id = adie_get_detected_connectivity_type();
9797 if (id != BAHAMA_ID) {
9798 pr_err("%s: unexpected adie connectivity type: %d\n",
9799 __func__, id);
9800 return -ENODEV;
9801 }
9802
9803 if (on) {
9804
9805 rc = bluetooth_use_regulators(1);
9806 if (rc < 0)
9807 goto out;
9808
9809 rc = bluetooth_switch_regulators(1);
9810
9811 if (rc < 0)
9812 goto fail_put;
9813
9814 bt_clock = msm_xo_get(MSM_XO_TCXO_D0, "bt_power");
9815
9816 if (IS_ERR(bt_clock)) {
9817 pr_err("Couldn't get TCXO_D0 voter\n");
9818 goto fail_switch;
9819 }
9820
9821 rc = msm_xo_mode_vote(bt_clock, MSM_XO_MODE_ON);
9822
9823 if (rc < 0) {
9824 pr_err("Failed to vote for TCXO_DO ON\n");
9825 goto fail_vote;
9826 }
9827
9828 rc = bahama_bt(1);
9829
9830 if (rc < 0)
9831 goto fail_clock;
9832
9833 msleep(10);
9834
9835 rc = msm_xo_mode_vote(bt_clock, MSM_XO_MODE_PIN_CTRL);
9836
9837 if (rc < 0) {
9838 pr_err("Failed to vote for TCXO_DO pin control\n");
9839 goto fail_vote;
9840 }
9841 } else {
9842 /* check for initial RFKILL block (power off) */
9843 /* some RFKILL versions/configurations rfkill_register */
9844 /* calls here for an initial set_block */
9845 /* avoid calling i2c and regulator before unblock (on) */
9846 if (platform_get_drvdata(&msm_bt_power_device) == NULL) {
9847 dev_info(&msm_bt_power_device.dev,
9848 "%s: initialized OFF/blocked\n", __func__);
9849 goto out;
9850 }
9851
9852 bahama_bt(0);
9853
9854fail_clock:
9855 msm_xo_mode_vote(bt_clock, MSM_XO_MODE_OFF);
9856fail_vote:
9857 msm_xo_put(bt_clock);
9858fail_switch:
9859 bluetooth_switch_regulators(0);
9860fail_put:
9861 bluetooth_use_regulators(0);
9862 }
9863
9864out:
9865 if (rc < 0)
9866 on = 0;
9867 dev_info(&msm_bt_power_device.dev,
9868 "Bluetooth power switch: state %d result %d\n", on, rc);
9869
9870 return rc;
9871}
9872
9873#endif /*CONFIG_MARIMBA_CORE, CONFIG_MSM_BT_POWER, CONFIG_MSM_BT_POWER_MODULE*/
9874
9875static void __init msm8x60_cfg_smsc911x(void)
9876{
9877 smsc911x_resources[1].start =
9878 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 6);
9879 smsc911x_resources[1].end =
9880 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 6);
9881}
9882
9883#ifdef CONFIG_MSM_RPM
9884static struct msm_rpm_platform_data msm_rpm_data = {
9885 .reg_base_addrs = {
9886 [MSM_RPM_PAGE_STATUS] = MSM_RPM_BASE,
9887 [MSM_RPM_PAGE_CTRL] = MSM_RPM_BASE + 0x400,
9888 [MSM_RPM_PAGE_REQ] = MSM_RPM_BASE + 0x600,
9889 [MSM_RPM_PAGE_ACK] = MSM_RPM_BASE + 0xa00,
9890 },
9891
9892 .irq_ack = RPM_SCSS_CPU0_GP_HIGH_IRQ,
9893 .irq_err = RPM_SCSS_CPU0_GP_LOW_IRQ,
9894 .irq_vmpm = RPM_SCSS_CPU0_GP_MEDIUM_IRQ,
9895 .msm_apps_ipc_rpm_reg = MSM_GCC_BASE + 0x008,
9896 .msm_apps_ipc_rpm_val = 4,
9897};
9898#endif
9899
Laura Abbott5d2d1e62011-08-10 16:27:35 -07009900void msm_fusion_setup_pinctrl(void)
9901{
9902 struct msm_xo_voter *a1;
9903
9904 if (socinfo_get_platform_subtype() == 0x3) {
9905 /*
9906 * Vote for the A1 clock to be in pin control mode before
9907 * the external images are loaded.
9908 */
9909 a1 = msm_xo_get(MSM_XO_TCXO_A1, "mdm");
9910 BUG_ON(!a1);
9911 msm_xo_mode_vote(a1, MSM_XO_MODE_PIN_CTRL);
9912 }
9913}
9914
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009915struct msm_board_data {
9916 struct msm_gpiomux_configs *gpiomux_cfgs;
9917};
9918
9919static struct msm_board_data msm8x60_rumi3_board_data __initdata = {
9920 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
9921};
9922
9923static struct msm_board_data msm8x60_sim_board_data __initdata = {
9924 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
9925};
9926
9927static struct msm_board_data msm8x60_surf_board_data __initdata = {
9928 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
9929};
9930
9931static struct msm_board_data msm8x60_ffa_board_data __initdata = {
9932 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
9933};
9934
9935static struct msm_board_data msm8x60_fluid_board_data __initdata = {
9936 .gpiomux_cfgs = msm8x60_fluid_gpiomux_cfgs,
9937};
9938
9939static struct msm_board_data msm8x60_charm_surf_board_data __initdata = {
9940 .gpiomux_cfgs = msm8x60_charm_gpiomux_cfgs,
9941};
9942
9943static struct msm_board_data msm8x60_charm_ffa_board_data __initdata = {
9944 .gpiomux_cfgs = msm8x60_charm_gpiomux_cfgs,
9945};
9946
Zhang Chang Kenef05b172011-07-27 15:28:13 -04009947static struct msm_board_data msm8x60_dragon_board_data __initdata = {
9948 .gpiomux_cfgs = msm8x60_dragon_gpiomux_cfgs,
9949};
9950
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009951static void __init msm8x60_init(struct msm_board_data *board_data)
9952{
9953 uint32_t soc_platform_version;
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05309954#ifdef CONFIG_USB_EHCI_MSM_72K
9955 struct pm8xxx_mpp_config_data hsusb_phy_mpp = {
9956 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
9957 .level = PM8901_MPP_DIG_LEVEL_L5,
9958 .control = PM8XXX_MPP_DOUT_CTRL_HIGH,
9959 };
9960#endif
Anirudh Ghayalc2019332011-11-12 06:29:10 +05309961 pmic_reset_irq = PM8058_IRQ_BASE + PM8058_RESOUT_IRQ;
Abhijeet Dharmapurikar6d565fd2011-09-15 18:49:56 -07009962
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009963 /*
9964 * Initialize RPM first as other drivers and devices may need
9965 * it for their initialization.
9966 */
9967#ifdef CONFIG_MSM_RPM
9968 BUG_ON(msm_rpm_init(&msm_rpm_data));
9969#endif
9970 BUG_ON(msm_rpmrs_levels_init(msm_rpmrs_levels,
9971 ARRAY_SIZE(msm_rpmrs_levels)));
9972 if (msm_xo_init())
9973 pr_err("Failed to initialize XO votes\n");
9974
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009975 msm8x60_check_2d_hardware();
9976
9977 /* Change SPM handling of core 1 if PMM 8160 is present. */
9978 soc_platform_version = socinfo_get_platform_version();
9979 if (SOCINFO_VERSION_MAJOR(soc_platform_version) == 1 &&
9980 SOCINFO_VERSION_MINOR(soc_platform_version) >= 2) {
9981 struct msm_spm_platform_data *spm_data;
9982
9983 spm_data = &msm_spm_data_v1[1];
9984 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] &= ~0x0F00UL;
9985 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] |= 0x0100UL;
9986
9987 spm_data = &msm_spm_data[1];
9988 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] &= ~0x0F00UL;
9989 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] |= 0x0100UL;
9990 }
9991
9992 /*
9993 * Initialize SPM before acpuclock as the latter calls into SPM
9994 * driver to set ACPU voltages.
9995 */
9996 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 1)
9997 msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
9998 else
9999 msm_spm_init(msm_spm_data_v1, ARRAY_SIZE(msm_spm_data_v1));
10000
10001 /*
10002 * Set regulators 8901_l4 and 8901_l6 to be always on in HPM for SURF
10003 * devices so that the RPM doesn't drop into a low power mode that an
10004 * un-reworked SURF cannot resume from.
10005 */
10006 if (machine_is_msm8x60_surf()) {
David Collins6f032ba2011-08-31 14:08:15 -070010007 int i;
10008
10009 for (i = 0; i < ARRAY_SIZE(rpm_regulator_init_data); i++)
10010 if (rpm_regulator_init_data[i].id
10011 == RPM_VREG_ID_PM8901_L4
10012 || rpm_regulator_init_data[i].id
10013 == RPM_VREG_ID_PM8901_L6)
10014 rpm_regulator_init_data[i]
10015 .init_data.constraints.always_on = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010016 }
10017
10018 /*
10019 * Disable regulator info printing so that regulator registration
10020 * messages do not enter the kmsg log.
10021 */
10022 regulator_suppress_info_printing();
10023
10024 /* Initialize regulators needed for clock_init. */
10025 platform_add_devices(early_regulators, ARRAY_SIZE(early_regulators));
10026
Stephen Boydbb600ae2011-08-02 20:11:40 -070010027 msm_clock_init(&msm8x60_clock_init_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010028
10029 /* Buses need to be initialized before early-device registration
10030 * to get the platform data for fabrics.
10031 */
10032 msm8x60_init_buses();
10033 platform_add_devices(early_devices, ARRAY_SIZE(early_devices));
10034 /* CPU frequency control is not supported on simulated targets. */
10035 if (!machine_is_msm8x60_rumi3() && !machine_is_msm8x60_sim())
Matt Wagantallec57f062011-08-16 23:54:46 -070010036 acpuclk_init(&acpuclk_8x60_soc_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010037
Terence Hampsonb36a38c2011-09-19 19:10:40 -040010038 /*
10039 * Enable EBI2 only for boards which make use of it. Leave
10040 * it disabled for all others for additional power savings.
10041 */
10042 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10043 machine_is_msm8x60_rumi3() ||
10044 machine_is_msm8x60_sim() ||
10045 machine_is_msm8x60_fluid() ||
10046 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010047 msm8x60_init_ebi2();
10048 msm8x60_init_tlmm();
10049 msm8x60_init_gpiomux(board_data->gpiomux_cfgs);
10050 msm8x60_init_uart12dm();
10051 msm8x60_init_mmc();
10052
10053#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
10054 msm8x60_init_pm8058_othc();
10055#endif
10056
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010057 if (machine_is_msm8x60_fluid())
10058 pm8058_platform_data.keypad_pdata = &fluid_keypad_data;
10059 else if (machine_is_msm8x60_dragon())
10060 pm8058_platform_data.keypad_pdata = &dragon_keypad_data;
10061 else
10062 pm8058_platform_data.keypad_pdata = &ffa_keypad_data;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010063
Jilai Wang53d27a82011-07-13 14:32:58 -040010064 /* Specify reset pin for OV9726 */
10065 if (machine_is_msm8x60_dragon()) {
10066 msm_camera_sensor_ov9726_data.sensor_reset = 62;
10067 ov9726_sensor_8660_info.mount_angle = 270;
10068 }
10069
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010070#ifdef CONFIG_BATTERY_MSM8X60
10071 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10072 machine_is_msm8x60_fusion() || machine_is_msm8x60_dragon() ||
10073 machine_is_msm8x60_fusn_ffa() || machine_is_msm8x60_fluid())
10074 platform_device_register(&msm_charger_device);
10075#endif
10076
10077 if (machine_is_msm8x60_dragon())
10078 pm8058_platform_data.charger_pdata = &pmic8058_charger_dragon;
10079 if (!machine_is_msm8x60_fluid())
10080 pm8058_platform_data.charger_pdata = &pmic8058_charger_ffa_surf;
10081
10082 /* configure pmic leds */
10083 if (machine_is_msm8x60_fluid())
10084 pm8058_platform_data.leds_pdata = &pm8058_fluid_flash_leds_data;
10085 else if (machine_is_msm8x60_dragon())
10086 pm8058_platform_data.leds_pdata = &pm8058_dragon_leds_data;
10087 else
10088 pm8058_platform_data.leds_pdata = &pm8058_flash_leds_data;
10089
10090 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa() ||
10091 machine_is_msm8x60_dragon()) {
10092 pm8058_platform_data.vibrator_pdata = &pm8058_vib_pdata;
10093 }
10094
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010095 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10096 machine_is_msm8x60_fluid() || machine_is_msm8x60_fusion() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -040010097 machine_is_msm8x60_fusn_ffa() || machine_is_msm8x60_dragon()) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010098 msm8x60_cfg_smsc911x();
10099 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 1)
10100 platform_add_devices(msm_footswitch_devices,
10101 msm_num_footswitch_devices);
10102 platform_add_devices(surf_devices,
10103 ARRAY_SIZE(surf_devices));
10104
10105#ifdef CONFIG_MSM_DSPS
10106 if (machine_is_msm8x60_fluid()) {
10107 platform_device_unregister(&msm_gsbi12_qup_i2c_device);
10108 msm8x60_init_dsps();
10109 }
10110#endif
10111
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010112 pm8901_vreg_mpp0_init();
10113
10114 platform_device_register(&msm8x60_8901_mpp_vreg);
10115
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010116#ifdef CONFIG_USB_EHCI_MSM_72K
10117 /*
10118 * Drive MPP2 pin HIGH for PHY to generate ID interrupts on 8660
10119 * fluid
10120 */
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010121 if (machine_is_msm8x60_fluid())
10122 pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1), &hsusb_phy_mpp);
10123 msm_add_host(0, &msm_usb_host_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010124#endif
Lei Zhou338cab82011-08-19 13:38:17 -040010125
10126#ifdef CONFIG_SND_SOC_MSM8660_APQ
10127 if (machine_is_msm8x60_dragon())
10128 platform_add_devices(dragon_alsa_devices,
10129 ARRAY_SIZE(dragon_alsa_devices));
10130 else
10131#endif
10132 platform_add_devices(asoc_devices,
10133 ARRAY_SIZE(asoc_devices));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010134 } else {
10135 msm8x60_configure_smc91x();
10136 platform_add_devices(rumi_sim_devices,
10137 ARRAY_SIZE(rumi_sim_devices));
10138 }
10139#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
Zhang Chang Ken6baadf02011-08-05 09:48:15 -040010140 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10141 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010142 msm8x60_cfg_isp1763();
10143#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010144
10145 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
10146 platform_add_devices(charm_devices, ARRAY_SIZE(charm_devices));
10147
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010148
10149#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
10150 if (machine_is_msm8x60_fluid())
10151 platform_device_register(&msm_gsbi10_qup_spi_device);
10152 else
10153 platform_device_register(&msm_gsbi1_qup_spi_device);
10154#endif
10155
10156#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
10157 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
10158 if (machine_is_msm8x60_fluid())
10159 cyttsp_set_params();
10160#endif
10161 if (!machine_is_msm8x60_sim())
10162 msm_fb_add_devices();
10163 fixup_i2c_configs();
10164 register_i2c_devices();
10165
Terence Hampson1c73fef2011-07-19 17:10:49 -040010166 if (machine_is_msm8x60_dragon())
10167 smsc911x_config.reset_gpio
10168 = GPIO_ETHERNET_RESET_N_DRAGON;
10169
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010170 platform_device_register(&smsc911x_device);
10171
10172#if (defined(CONFIG_SPI_QUP)) && \
10173 (defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -040010174 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA) || \
10175 defined(CONFIG_FB_MSM_LCDC_NT35582_WVGA))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010176
10177 if (machine_is_msm8x60_fluid()) {
10178#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
10179 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3) {
10180 spi_register_board_info(lcdc_samsung_spi_board_info,
10181 ARRAY_SIZE(lcdc_samsung_spi_board_info));
10182 } else
10183#endif
10184 {
10185#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
10186 spi_register_board_info(lcdc_auo_spi_board_info,
10187 ARRAY_SIZE(lcdc_auo_spi_board_info));
10188#endif
10189 }
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -040010190#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
10191 } else if (machine_is_msm8x60_dragon()) {
10192 spi_register_board_info(lcdc_nt35582_spi_board_info,
10193 ARRAY_SIZE(lcdc_nt35582_spi_board_info));
10194#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010195 }
10196#endif
10197
10198 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
10199 msm_pm_set_rpm_wakeup_irq(RPM_SCSS_CPU0_WAKE_UP_IRQ);
10200 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
10201 msm_pm_data);
Maheshkumar Sivasubramanianc6c55032011-10-25 16:01:32 -060010202 BUG_ON(msm_pm_boot_init(&msm_pm_boot_pdata));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010203
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010204 pm8058_gpios_init();
10205
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010206#ifdef CONFIG_SENSORS_MSM_ADC
10207 if (machine_is_msm8x60_fluid()) {
10208 msm_adc_pdata.dev_names = msm_adc_fluid_device_names;
10209 msm_adc_pdata.num_adc = ARRAY_SIZE(msm_adc_fluid_device_names);
10210 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3)
10211 msm_adc_pdata.gpio_config = APROC_CONFIG;
10212 else
10213 msm_adc_pdata.gpio_config = MPROC_CONFIG;
10214 }
10215 msm_adc_pdata.target_hw = MSM_8x60;
10216#endif
10217#ifdef CONFIG_MSM8X60_AUDIO
10218 msm_snddev_init();
10219#endif
10220#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
10221 if (machine_is_msm8x60_fluid())
10222 platform_device_register(&fluid_leds_gpio);
10223 else
10224 platform_device_register(&gpio_leds);
10225#endif
10226
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010227 msm8x60_multi_sdio_init();
Laura Abbott5d2d1e62011-08-10 16:27:35 -070010228
10229 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
10230 msm_fusion_setup_pinctrl();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010231}
10232
10233static void __init msm8x60_rumi3_init(void)
10234{
10235 msm8x60_init(&msm8x60_rumi3_board_data);
10236}
10237
10238static void __init msm8x60_sim_init(void)
10239{
10240 msm8x60_init(&msm8x60_sim_board_data);
10241}
10242
10243static void __init msm8x60_surf_init(void)
10244{
10245 msm8x60_init(&msm8x60_surf_board_data);
10246}
10247
10248static void __init msm8x60_ffa_init(void)
10249{
10250 msm8x60_init(&msm8x60_ffa_board_data);
10251}
10252
10253static void __init msm8x60_fluid_init(void)
10254{
10255 msm8x60_init(&msm8x60_fluid_board_data);
10256}
10257
10258static void __init msm8x60_charm_surf_init(void)
10259{
10260 msm8x60_init(&msm8x60_charm_surf_board_data);
10261}
10262
10263static void __init msm8x60_charm_ffa_init(void)
10264{
10265 msm8x60_init(&msm8x60_charm_ffa_board_data);
10266}
10267
10268static void __init msm8x60_charm_init_early(void)
10269{
10270 msm8x60_allocate_memory_regions();
Steve Mucklea55df6e2010-01-07 12:43:24 -080010271}
10272
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010273static void __init msm8x60_dragon_init(void)
10274{
10275 msm8x60_init(&msm8x60_dragon_board_data);
10276}
10277
Steve Mucklea55df6e2010-01-07 12:43:24 -080010278MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
10279 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010280 .reserve = msm8x60_reserve,
Steve Mucklea55df6e2010-01-07 12:43:24 -080010281 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010282 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010283 .init_machine = msm8x60_rumi3_init,
Steve Mucklea55df6e2010-01-07 12:43:24 -080010284 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010285 .init_early = msm8x60_charm_init_early,
Steve Muckle49b76f72010-03-19 17:00:08 -070010286MACHINE_END
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010287
10288MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
10289 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010290 .reserve = msm8x60_reserve,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010291 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010292 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010293 .init_machine = msm8x60_sim_init,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010294 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010295 .init_early = msm8x60_charm_init_early,
10296MACHINE_END
10297
10298MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
10299 .map_io = msm8x60_map_io,
10300 .reserve = msm8x60_reserve,
10301 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010302 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010303 .init_machine = msm8x60_surf_init,
10304 .timer = &msm_timer,
10305 .init_early = msm8x60_charm_init_early,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010306MACHINE_END
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010307
10308MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
10309 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010310 .reserve = msm8x60_reserve,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010311 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010312 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010313 .init_machine = msm8x60_ffa_init,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010314 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010315 .init_early = msm8x60_charm_init_early,
10316MACHINE_END
10317
10318MACHINE_START(MSM8X60_FLUID, "QCT MSM8X60 FLUID")
10319 .map_io = msm8x60_map_io,
10320 .reserve = msm8x60_reserve,
10321 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010322 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010323 .init_machine = msm8x60_fluid_init,
10324 .timer = &msm_timer,
10325 .init_early = msm8x60_charm_init_early,
10326MACHINE_END
10327
10328MACHINE_START(MSM8X60_FUSION, "QCT MSM8X60 FUSION SURF")
10329 .map_io = msm8x60_map_io,
10330 .reserve = msm8x60_reserve,
10331 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010332 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010333 .init_machine = msm8x60_charm_surf_init,
10334 .timer = &msm_timer,
10335 .init_early = msm8x60_charm_init_early,
10336MACHINE_END
10337
10338MACHINE_START(MSM8X60_FUSN_FFA, "QCT MSM8X60 FUSION FFA")
10339 .map_io = msm8x60_map_io,
10340 .reserve = msm8x60_reserve,
10341 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010342 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010343 .init_machine = msm8x60_charm_ffa_init,
10344 .timer = &msm_timer,
10345 .init_early = msm8x60_charm_init_early,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010346MACHINE_END
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010347
10348MACHINE_START(MSM8X60_DRAGON, "QCT MSM8X60 DRAGON")
10349 .map_io = msm8x60_map_io,
10350 .reserve = msm8x60_reserve,
10351 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010352 .handle_irq = gic_handle_irq,
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010353 .init_machine = msm8x60_dragon_init,
10354 .timer = &msm_timer,
10355 .init_early = msm8x60_charm_init_early,
10356MACHINE_END