blob: 6692f35f4e3a298fd727d0dbcc4fed9a1d68404c [file] [log] [blame]
Stepan Moskovchenko39236d72011-11-30 17:42:23 -08001/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13
14#include <linux/init.h>
15#include <linux/ioport.h>
16#include <linux/platform_device.h>
17#include <linux/bootmem.h>
18#include <asm/mach-types.h>
19#include <mach/msm_bus_board.h>
20#include <mach/board.h>
21#include <mach/gpio.h>
22#include <mach/gpiomux.h>
Ajay Dudani9114be72011-12-03 07:46:35 -080023#include <mach/socinfo.h>
Stepan Moskovchenko39236d72011-11-30 17:42:23 -080024#include "devices.h"
25#include "board-msm8930.h"
26
27#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
28#define MSM_FB_PRIM_BUF_SIZE (1376 * 768 * 4 * 3) /* 4 bpp x 3 pages */
29#else
30#define MSM_FB_PRIM_BUF_SIZE (1376 * 768 * 4 * 2) /* 4 bpp x 2 pages */
31#endif
32
33#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
34#define MSM_FB_EXT_BUF_SIZE (1920 * 1088 * 2 * 1) /* 2 bpp x 1 page */
35#elif defined(CONFIG_FB_MSM_TVOUT)
36#define MSM_FB_EXT_BUF_SIZE (720 * 576 * 2 * 2) /* 2 bpp x 2 pages */
37#else
38#define MSM_FB_EXT_BUF_SIZE 0
39#endif
40
41#ifdef CONFIG_FB_MSM_OVERLAY_WRITEBACK
42/* width x height x 3 bpp x 2 frame buffer */
43#define MSM_FB_WRITEBACK_SIZE (1376 * 768 * 3 * 2)
44#define MSM_FB_WRITEBACK_OFFSET \
45 (MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE)
46#else
47#define MSM_FB_WRITEBACK_SIZE 0
48#define MSM_FB_WRITEBACK_OFFSET 0
49#endif
50
51#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
52/* 4 bpp x 2 page HDMI case */
53#define MSM_FB_SIZE roundup((1920 * 1088 * 4 * 2), 4096)
54#else
55/* Note: must be multiple of 4096 */
56#define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE + \
57 MSM_FB_WRITEBACK_SIZE, 4096)
58#endif
59
60#define MDP_VSYNC_GPIO 0
61
62#define PANEL_NAME_MAX_LEN 30
63#define MIPI_CMD_NOVATEK_QHD_PANEL_NAME "mipi_cmd_novatek_qhd"
64#define MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME "mipi_video_novatek_qhd"
65#define MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME "mipi_video_toshiba_wsvga"
66#define MIPI_VIDEO_CHIMEI_WXGA_PANEL_NAME "mipi_video_chimei_wxga"
67#define MIPI_VIDEO_SIMULATOR_VGA_PANEL_NAME "mipi_video_simulator_vga"
68#define MIPI_CMD_RENESAS_FWVGA_PANEL_NAME "mipi_cmd_renesas_fwvga"
69#define HDMI_PANEL_NAME "hdmi_msm"
70#define TVOUT_PANEL_NAME "tvout_msm"
71
72static int writeback_offset(void)
73{
74 return MSM_FB_WRITEBACK_OFFSET;
75}
76
77static struct resource msm_fb_resources[] = {
78 {
79 .flags = IORESOURCE_DMA,
80 }
81};
82
83static int msm_fb_detect_panel(const char *name)
84{
85 if (!strncmp(name, MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME,
86 strnlen(MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME,
87 PANEL_NAME_MAX_LEN)))
88 return 0;
89
90#ifndef CONFIG_FB_MSM_MIPI_PANEL_DETECT
91 if (!strncmp(name, MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
92 strnlen(MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
93 PANEL_NAME_MAX_LEN)))
94 return 0;
95
96 if (!strncmp(name, MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
97 strnlen(MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
98 PANEL_NAME_MAX_LEN)))
99 return 0;
100
101 if (!strncmp(name, MIPI_VIDEO_SIMULATOR_VGA_PANEL_NAME,
102 strnlen(MIPI_VIDEO_SIMULATOR_VGA_PANEL_NAME,
103 PANEL_NAME_MAX_LEN)))
104 return 0;
105
106 if (!strncmp(name, MIPI_CMD_RENESAS_FWVGA_PANEL_NAME,
107 strnlen(MIPI_CMD_RENESAS_FWVGA_PANEL_NAME,
108 PANEL_NAME_MAX_LEN)))
109 return 0;
110#endif
111
112 if (!strncmp(name, HDMI_PANEL_NAME,
113 strnlen(HDMI_PANEL_NAME,
114 PANEL_NAME_MAX_LEN)))
115 return 0;
116
117 if (!strncmp(name, TVOUT_PANEL_NAME,
118 strnlen(TVOUT_PANEL_NAME,
119 PANEL_NAME_MAX_LEN)))
120 return 0;
121
122 pr_warning("%s: not supported '%s'", __func__, name);
123 return -ENODEV;
124}
125
126static struct msm_fb_platform_data msm_fb_pdata = {
127 .detect_client = msm_fb_detect_panel,
128};
129
130static struct platform_device msm_fb_device = {
131 .name = "msm_fb",
132 .id = 0,
133 .num_resources = ARRAY_SIZE(msm_fb_resources),
134 .resource = msm_fb_resources,
135 .dev.platform_data = &msm_fb_pdata,
136};
137
138static bool dsi_power_on;
139
140static int mipi_dsi_cdp_panel_power(int on)
141{
142 static struct regulator *reg_l8, *reg_l23, *reg_l2;
143 static int gpio43;
144 int rc;
145
146 pr_info("%s: state : %d\n", __func__, on);
147
148 if (!dsi_power_on) {
149
150 reg_l8 = regulator_get(&msm_mipi_dsi1_device.dev,
151 "dsi_vdc");
152 if (IS_ERR(reg_l8)) {
153 pr_err("could not get 8921_l8, rc = %ld\n",
154 PTR_ERR(reg_l8));
155 return -ENODEV;
156 }
157 reg_l23 = regulator_get(&msm_mipi_dsi1_device.dev,
158 "dsi_vddio");
159 if (IS_ERR(reg_l23)) {
160 pr_err("could not get 8921_l23, rc = %ld\n",
161 PTR_ERR(reg_l23));
162 return -ENODEV;
163 }
164 reg_l2 = regulator_get(&msm_mipi_dsi1_device.dev,
165 "dsi_vdda");
166 if (IS_ERR(reg_l2)) {
167 pr_err("could not get 8921_l2, rc = %ld\n",
168 PTR_ERR(reg_l2));
169 return -ENODEV;
170 }
171 rc = regulator_set_voltage(reg_l8, 2800000, 3000000);
172 if (rc) {
173 pr_err("set_voltage l8 failed, rc=%d\n", rc);
174 return -EINVAL;
175 }
176 rc = regulator_set_voltage(reg_l23, 1800000, 1800000);
177 if (rc) {
178 pr_err("set_voltage l23 failed, rc=%d\n", rc);
179 return -EINVAL;
180 }
181 rc = regulator_set_voltage(reg_l2, 1200000, 1200000);
182 if (rc) {
183 pr_err("set_voltage l2 failed, rc=%d\n", rc);
184 return -EINVAL;
185 }
186 gpio43 = PM8921_GPIO_PM_TO_SYS(43);
187 rc = gpio_request(gpio43, "disp_rst_n");
188 if (rc) {
189 pr_err("request gpio 43 failed, rc=%d\n", rc);
190 return -ENODEV;
191 }
192 dsi_power_on = true;
193 }
194 if (on) {
195 rc = regulator_set_optimum_mode(reg_l8, 100000);
196 if (rc < 0) {
197 pr_err("set_optimum_mode l8 failed, rc=%d\n", rc);
198 return -EINVAL;
199 }
200 rc = regulator_set_optimum_mode(reg_l23, 100000);
201 if (rc < 0) {
202 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
203 return -EINVAL;
204 }
205 rc = regulator_set_optimum_mode(reg_l2, 100000);
206 if (rc < 0) {
207 pr_err("set_optimum_mode l2 failed, rc=%d\n", rc);
208 return -EINVAL;
209 }
210 rc = regulator_enable(reg_l8);
211 if (rc) {
212 pr_err("enable l8 failed, rc=%d\n", rc);
213 return -ENODEV;
214 }
215 rc = regulator_enable(reg_l23);
216 if (rc) {
217 pr_err("enable l8 failed, rc=%d\n", rc);
218 return -ENODEV;
219 }
220 rc = regulator_enable(reg_l2);
221 if (rc) {
222 pr_err("enable l2 failed, rc=%d\n", rc);
223 return -ENODEV;
224 }
225 gpio_set_value_cansleep(gpio43, 1);
226 } else {
227 rc = regulator_disable(reg_l2);
228 if (rc) {
229 pr_err("disable reg_l2 failed, rc=%d\n", rc);
230 return -ENODEV;
231 }
232 rc = regulator_disable(reg_l8);
233 if (rc) {
234 pr_err("disable reg_l8 failed, rc=%d\n", rc);
235 return -ENODEV;
236 }
237 rc = regulator_disable(reg_l23);
238 if (rc) {
239 pr_err("disable reg_l23 failed, rc=%d\n", rc);
240 return -ENODEV;
241 }
242 rc = regulator_set_optimum_mode(reg_l8, 100);
243 if (rc < 0) {
244 pr_err("set_optimum_mode l8 failed, rc=%d\n", rc);
245 return -EINVAL;
246 }
247 rc = regulator_set_optimum_mode(reg_l23, 100);
248 if (rc < 0) {
249 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
250 return -EINVAL;
251 }
252 rc = regulator_set_optimum_mode(reg_l2, 100);
253 if (rc < 0) {
254 pr_err("set_optimum_mode l2 failed, rc=%d\n", rc);
255 return -EINVAL;
256 }
257 gpio_set_value_cansleep(gpio43, 0);
258 }
259 return 0;
260}
261
262static int mipi_dsi_panel_power(int on)
263{
264 pr_info("%s: on=%d\n", __func__, on);
265
266 return mipi_dsi_cdp_panel_power(on);
267}
268
269static struct mipi_dsi_platform_data mipi_dsi_pdata = {
270 .vsync_gpio = MDP_VSYNC_GPIO,
271 .dsi_power_save = mipi_dsi_panel_power,
272};
273
274#ifdef CONFIG_MSM_BUS_SCALING
275
276static struct msm_bus_vectors mdp_init_vectors[] = {
277 {
278 .src = MSM_BUS_MASTER_MDP_PORT0,
279 .dst = MSM_BUS_SLAVE_EBI_CH0,
280 .ab = 0,
281 .ib = 0,
282 },
283};
284
285#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
286static struct msm_bus_vectors hdmi_as_primary_vectors[] = {
287 /* If HDMI is used as primary */
288 {
289 .src = MSM_BUS_MASTER_MDP_PORT0,
290 .dst = MSM_BUS_SLAVE_EBI_CH0,
291 .ab = 2000000000,
292 .ib = 2000000000,
293 },
294};
295static struct msm_bus_paths mdp_bus_scale_usecases[] = {
296 {
297 ARRAY_SIZE(mdp_init_vectors),
298 mdp_init_vectors,
299 },
300 {
301 ARRAY_SIZE(hdmi_as_primary_vectors),
302 hdmi_as_primary_vectors,
303 },
304 {
305 ARRAY_SIZE(hdmi_as_primary_vectors),
306 hdmi_as_primary_vectors,
307 },
308 {
309 ARRAY_SIZE(hdmi_as_primary_vectors),
310 hdmi_as_primary_vectors,
311 },
312 {
313 ARRAY_SIZE(hdmi_as_primary_vectors),
314 hdmi_as_primary_vectors,
315 },
316 {
317 ARRAY_SIZE(hdmi_as_primary_vectors),
318 hdmi_as_primary_vectors,
319 },
320};
321#else
322static struct msm_bus_vectors mdp_ui_vectors[] = {
323 {
324 .src = MSM_BUS_MASTER_MDP_PORT0,
325 .dst = MSM_BUS_SLAVE_EBI_CH0,
326 .ab = 216000000 * 2,
327 .ib = 270000000 * 2,
328 },
329};
330
331static struct msm_bus_vectors mdp_vga_vectors[] = {
332 /* VGA and less video */
333 {
334 .src = MSM_BUS_MASTER_MDP_PORT0,
335 .dst = MSM_BUS_SLAVE_EBI_CH0,
336 .ab = 216000000 * 2,
337 .ib = 270000000 * 2,
338 },
339};
340
341static struct msm_bus_vectors mdp_720p_vectors[] = {
342 /* 720p and less video */
343 {
344 .src = MSM_BUS_MASTER_MDP_PORT0,
345 .dst = MSM_BUS_SLAVE_EBI_CH0,
346 .ab = 230400000 * 2,
347 .ib = 288000000 * 2,
348 },
349};
350
351static struct msm_bus_vectors mdp_1080p_vectors[] = {
352 /* 1080p and less video */
353 {
354 .src = MSM_BUS_MASTER_MDP_PORT0,
355 .dst = MSM_BUS_SLAVE_EBI_CH0,
356 .ab = 334080000 * 2,
357 .ib = 417600000 * 2,
358 },
359};
360
361static struct msm_bus_paths mdp_bus_scale_usecases[] = {
362 {
363 ARRAY_SIZE(mdp_init_vectors),
364 mdp_init_vectors,
365 },
366 {
367 ARRAY_SIZE(mdp_ui_vectors),
368 mdp_ui_vectors,
369 },
370 {
371 ARRAY_SIZE(mdp_ui_vectors),
372 mdp_ui_vectors,
373 },
374 {
375 ARRAY_SIZE(mdp_vga_vectors),
376 mdp_vga_vectors,
377 },
378 {
379 ARRAY_SIZE(mdp_720p_vectors),
380 mdp_720p_vectors,
381 },
382 {
383 ARRAY_SIZE(mdp_1080p_vectors),
384 mdp_1080p_vectors,
385 },
386};
387#endif
388
389static struct msm_bus_scale_pdata mdp_bus_scale_pdata = {
390 mdp_bus_scale_usecases,
391 ARRAY_SIZE(mdp_bus_scale_usecases),
392 .name = "mdp",
393};
394
395#endif
396
397#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
398static int mdp_core_clk_rate_table[] = {
399 200000000,
400 200000000,
401 200000000,
402 200000000,
403};
404#else
405static int mdp_core_clk_rate_table[] = {
406 85330000,
407 85330000,
408 160000000,
409 200000000,
410};
411#endif
412
413static struct msm_panel_common_pdata mdp_pdata = {
414 .gpio = MDP_VSYNC_GPIO,
415#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
416 .mdp_core_clk_rate = 200000000,
417#else
418 .mdp_core_clk_rate = 85330000,
419#endif
420 .mdp_core_clk_table = mdp_core_clk_rate_table,
421 .num_mdp_clk = ARRAY_SIZE(mdp_core_clk_rate_table),
422#ifdef CONFIG_MSM_BUS_SCALING
423 .mdp_bus_scale_table = &mdp_bus_scale_pdata,
424#endif
425 .mdp_rev = MDP_REV_42,
426 .writeback_offset = writeback_offset,
427};
428
429#define LPM_CHANNEL0 0
430static int toshiba_gpio[] = {LPM_CHANNEL0};
431
432static struct mipi_dsi_panel_platform_data toshiba_pdata = {
433 .gpio = toshiba_gpio,
434};
435
436static struct platform_device mipi_dsi_toshiba_panel_device = {
437 .name = "mipi_toshiba",
438 .id = 0,
439 .dev = {
440 .platform_data = &toshiba_pdata,
441 }
442};
443
444#define FPGA_3D_GPIO_CONFIG_ADDR 0xB5
445
446static struct mipi_dsi_phy_ctrl dsi_novatek_cmd_mode_phy_db = {
447
448/* DSI_BIT_CLK at 500MHz, 2 lane, RGB888 */
449 {0x0F, 0x0a, 0x04, 0x00, 0x20}, /* regulator */
450 /* timing */
451 {0xab, 0x8a, 0x18, 0x00, 0x92, 0x97, 0x1b, 0x8c,
452 0x0c, 0x03, 0x04, 0xa0},
453 {0x5f, 0x00, 0x00, 0x10}, /* phy ctrl */
454 {0xff, 0x00, 0x06, 0x00}, /* strength */
455 /* pll control */
456 {0x40, 0xf9, 0x30, 0xda, 0x00, 0x40, 0x03, 0x62,
457 0x40, 0x07, 0x03,
458 0x00, 0x1a, 0x00, 0x00, 0x02, 0x00, 0x20, 0x00, 0x01},
459};
460
461static struct mipi_dsi_panel_platform_data novatek_pdata = {
462 .fpga_3d_config_addr = FPGA_3D_GPIO_CONFIG_ADDR,
463 .fpga_ctrl_mode = FPGA_SPI_INTF,
464 .phy_ctrl_settings = &dsi_novatek_cmd_mode_phy_db,
465};
466
467static struct platform_device mipi_dsi_novatek_panel_device = {
468 .name = "mipi_novatek",
469 .id = 0,
470 .dev = {
471 .platform_data = &novatek_pdata,
472 }
473};
474
475#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
476static struct resource hdmi_msm_resources[] = {
477 {
478 .name = "hdmi_msm_qfprom_addr",
479 .start = 0x00700000,
480 .end = 0x007060FF,
481 .flags = IORESOURCE_MEM,
482 },
483 {
484 .name = "hdmi_msm_hdmi_addr",
485 .start = 0x04A00000,
486 .end = 0x04A00FFF,
487 .flags = IORESOURCE_MEM,
488 },
489 {
490 .name = "hdmi_msm_irq",
491 .start = HDMI_IRQ,
492 .end = HDMI_IRQ,
493 .flags = IORESOURCE_IRQ,
494 },
495};
496
497static int hdmi_enable_5v(int on);
498static int hdmi_core_power(int on, int show);
499static int hdmi_cec_power(int on);
500
501static struct msm_hdmi_platform_data hdmi_msm_data = {
502 .irq = HDMI_IRQ,
503 .enable_5v = hdmi_enable_5v,
504 .core_power = hdmi_core_power,
505 .cec_power = hdmi_cec_power,
506};
507
508static struct platform_device hdmi_msm_device = {
509 .name = "hdmi_msm",
510 .id = 0,
511 .num_resources = ARRAY_SIZE(hdmi_msm_resources),
512 .resource = hdmi_msm_resources,
513 .dev.platform_data = &hdmi_msm_data,
514};
515#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
516
517#ifdef CONFIG_FB_MSM_WRITEBACK_MSM_PANEL
518static struct platform_device wfd_panel_device = {
519 .name = "wfd_panel",
520 .id = 0,
521 .dev.platform_data = NULL,
522};
523
524static struct platform_device wfd_device = {
525 .name = "msm_wfd",
526 .id = -1,
527};
528#endif
529
530#ifdef CONFIG_MSM_BUS_SCALING
531static struct msm_bus_vectors dtv_bus_init_vectors[] = {
532 {
533 .src = MSM_BUS_MASTER_MDP_PORT0,
534 .dst = MSM_BUS_SLAVE_EBI_CH0,
535 .ab = 0,
536 .ib = 0,
537 },
538};
539
540#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
541static struct msm_bus_vectors dtv_bus_def_vectors[] = {
542 {
543 .src = MSM_BUS_MASTER_MDP_PORT0,
544 .dst = MSM_BUS_SLAVE_EBI_CH0,
545 .ab = 2000000000,
546 .ib = 2000000000,
547 },
548};
549#else
550static struct msm_bus_vectors dtv_bus_def_vectors[] = {
551 {
552 .src = MSM_BUS_MASTER_MDP_PORT0,
553 .dst = MSM_BUS_SLAVE_EBI_CH0,
554 .ab = 566092800 * 2,
555 .ib = 707616000 * 2,
556 },
557};
558#endif
559
560static struct msm_bus_paths dtv_bus_scale_usecases[] = {
561 {
562 ARRAY_SIZE(dtv_bus_init_vectors),
563 dtv_bus_init_vectors,
564 },
565 {
566 ARRAY_SIZE(dtv_bus_def_vectors),
567 dtv_bus_def_vectors,
568 },
569};
570static struct msm_bus_scale_pdata dtv_bus_scale_pdata = {
571 dtv_bus_scale_usecases,
572 ARRAY_SIZE(dtv_bus_scale_usecases),
573 .name = "dtv",
574};
575
576static struct lcdc_platform_data dtv_pdata = {
577 .bus_scale_table = &dtv_bus_scale_pdata,
578};
579#endif
580
581static struct gpiomux_setting mdp_vsync_suspend_cfg = {
582 .func = GPIOMUX_FUNC_GPIO,
583 .drv = GPIOMUX_DRV_2MA,
584 .pull = GPIOMUX_PULL_DOWN,
585};
586
587static struct gpiomux_setting mdp_vsync_active_cfg = {
588 .func = GPIOMUX_FUNC_1,
589 .drv = GPIOMUX_DRV_2MA,
590 .pull = GPIOMUX_PULL_DOWN,
591};
592
593static struct msm_gpiomux_config msm8960_mdp_vsync_configs[] __initdata = {
594 {
595 .gpio = MDP_VSYNC_GPIO,
596 .settings = {
597 [GPIOMUX_ACTIVE] = &mdp_vsync_active_cfg,
598 [GPIOMUX_SUSPENDED] = &mdp_vsync_suspend_cfg,
599 },
600 }
601};
602
603#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
604static struct gpiomux_setting hdmi_suspend_cfg = {
605 .func = GPIOMUX_FUNC_GPIO,
606 .drv = GPIOMUX_DRV_2MA,
607 .pull = GPIOMUX_PULL_DOWN,
608};
609
610static struct gpiomux_setting hdmi_active_1_cfg = {
611 .func = GPIOMUX_FUNC_1,
612 .drv = GPIOMUX_DRV_2MA,
613 .pull = GPIOMUX_PULL_UP,
614};
615
616static struct gpiomux_setting hdmi_active_2_cfg = {
617 .func = GPIOMUX_FUNC_1,
618 .drv = GPIOMUX_DRV_2MA,
619 .pull = GPIOMUX_PULL_DOWN,
620};
621
622static struct msm_gpiomux_config msm8960_hdmi_configs[] __initdata = {
623 {
624 .gpio = 99,
625 .settings = {
626 [GPIOMUX_ACTIVE] = &hdmi_active_1_cfg,
627 [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg,
628 },
629 },
630 {
631 .gpio = 100,
632 .settings = {
633 [GPIOMUX_ACTIVE] = &hdmi_active_1_cfg,
634 [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg,
635 },
636 },
637 {
638 .gpio = 101,
639 .settings = {
640 [GPIOMUX_ACTIVE] = &hdmi_active_1_cfg,
641 [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg,
642 },
643 },
644 {
645 .gpio = 102,
646 .settings = {
647 [GPIOMUX_ACTIVE] = &hdmi_active_2_cfg,
648 [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg,
649 },
650 },
651};
652
653static int hdmi_enable_5v(int on)
654{
655 /* TBD: PM8921 regulator instead of 8901 */
656 static struct regulator *reg_8921_hdmi_mvs; /* HDMI_5V */
657 static int prev_on;
658 int rc;
659
660 if (on == prev_on)
661 return 0;
662
663 if (!reg_8921_hdmi_mvs)
664 reg_8921_hdmi_mvs = regulator_get(&hdmi_msm_device.dev,
665 "hdmi_mvs");
666
667 if (on) {
668 rc = regulator_enable(reg_8921_hdmi_mvs);
669 if (rc) {
670 pr_err("'%s' regulator enable failed, rc=%d\n",
671 "8921_hdmi_mvs", rc);
672 return rc;
673 }
674 pr_debug("%s(on): success\n", __func__);
675 } else {
676 rc = regulator_disable(reg_8921_hdmi_mvs);
677 if (rc)
678 pr_warning("'%s' regulator disable failed, rc=%d\n",
679 "8921_hdmi_mvs", rc);
680 pr_debug("%s(off): success\n", __func__);
681 }
682
683 prev_on = on;
684
685 return 0;
686}
687
688static int hdmi_core_power(int on, int show)
689{
690 static struct regulator *reg_8921_l23, *reg_8921_s4;
691 static int prev_on;
692 int rc;
693
694 if (on == prev_on)
695 return 0;
696
697 /* TBD: PM8921 regulator instead of 8901 */
698 if (!reg_8921_l23) {
699 reg_8921_l23 = regulator_get(&hdmi_msm_device.dev, "hdmi_avdd");
700 if (IS_ERR(reg_8921_l23)) {
701 pr_err("could not get reg_8921_l23, rc = %ld\n",
702 PTR_ERR(reg_8921_l23));
703 return -ENODEV;
704 }
705 rc = regulator_set_voltage(reg_8921_l23, 1800000, 1800000);
706 if (rc) {
707 pr_err("set_voltage failed for 8921_l23, rc=%d\n", rc);
708 return -EINVAL;
709 }
710 }
711 if (!reg_8921_s4) {
712 reg_8921_s4 = regulator_get(&hdmi_msm_device.dev, "hdmi_vcc");
713 if (IS_ERR(reg_8921_s4)) {
714 pr_err("could not get reg_8921_s4, rc = %ld\n",
715 PTR_ERR(reg_8921_s4));
716 return -ENODEV;
717 }
718 rc = regulator_set_voltage(reg_8921_s4, 1800000, 1800000);
719 if (rc) {
720 pr_err("set_voltage failed for 8921_s4, rc=%d\n", rc);
721 return -EINVAL;
722 }
723 }
724
725 if (on) {
726 rc = regulator_set_optimum_mode(reg_8921_l23, 100000);
727 if (rc < 0) {
728 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
729 return -EINVAL;
730 }
731 rc = regulator_enable(reg_8921_l23);
732 if (rc) {
733 pr_err("'%s' regulator enable failed, rc=%d\n",
734 "hdmi_avdd", rc);
735 return rc;
736 }
737 rc = regulator_enable(reg_8921_s4);
738 if (rc) {
739 pr_err("'%s' regulator enable failed, rc=%d\n",
740 "hdmi_vcc", rc);
741 return rc;
742 }
743 rc = gpio_request(100, "HDMI_DDC_CLK");
744 if (rc) {
745 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
746 "HDMI_DDC_CLK", 100, rc);
747 goto error1;
748 }
749 rc = gpio_request(101, "HDMI_DDC_DATA");
750 if (rc) {
751 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
752 "HDMI_DDC_DATA", 101, rc);
753 goto error2;
754 }
755 rc = gpio_request(102, "HDMI_HPD");
756 if (rc) {
757 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
758 "HDMI_HPD", 102, rc);
759 goto error3;
760 }
761 pr_debug("%s(on): success\n", __func__);
762 } else {
763 gpio_free(100);
764 gpio_free(101);
765 gpio_free(102);
766
767 rc = regulator_disable(reg_8921_l23);
768 if (rc) {
769 pr_err("disable reg_8921_l23 failed, rc=%d\n", rc);
770 return -ENODEV;
771 }
772 rc = regulator_disable(reg_8921_s4);
773 if (rc) {
774 pr_err("disable reg_8921_s4 failed, rc=%d\n", rc);
775 return -ENODEV;
776 }
777 rc = regulator_set_optimum_mode(reg_8921_l23, 100);
778 if (rc < 0) {
779 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
780 return -EINVAL;
781 }
782 pr_debug("%s(off): success\n", __func__);
783 }
784
785 prev_on = on;
786
787 return 0;
788
789error3:
790 gpio_free(101);
791error2:
792 gpio_free(100);
793error1:
794 regulator_disable(reg_8921_l23);
795 regulator_disable(reg_8921_s4);
796 return rc;
797}
798
799static int hdmi_cec_power(int on)
800{
801 static int prev_on;
802 int rc;
803
804 if (on == prev_on)
805 return 0;
806
807 if (on) {
808 rc = gpio_request(99, "HDMI_CEC_VAR");
809 if (rc) {
810 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
811 "HDMI_CEC_VAR", 99, rc);
812 goto error;
813 }
814 pr_debug("%s(on): success\n", __func__);
815 } else {
816 gpio_free(99);
817 pr_debug("%s(off): success\n", __func__);
818 }
819
820 prev_on = on;
821
822 return 0;
823error:
824 return rc;
825}
826#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
827
828void __init msm8930_init_fb(void)
829{
830#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
831 msm_gpiomux_install(msm8960_hdmi_configs,
832 ARRAY_SIZE(msm8960_hdmi_configs));
833#endif
834
835 msm_gpiomux_install(msm8960_mdp_vsync_configs,
836 ARRAY_SIZE(msm8960_mdp_vsync_configs));
837
838 platform_device_register(&msm_fb_device);
839
840#ifdef CONFIG_FB_MSM_WRITEBACK_MSM_PANEL
841 platform_device_register(&wfd_panel_device);
842 platform_device_register(&wfd_device);
843#endif
844
845 platform_device_register(&mipi_dsi_novatek_panel_device);
846
847#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
Ajay Dudani9114be72011-12-03 07:46:35 -0800848 if (!cpu_is_msm8627())
849 platform_device_register(&hdmi_msm_device);
Stepan Moskovchenko39236d72011-11-30 17:42:23 -0800850#endif
851
852 platform_device_register(&mipi_dsi_toshiba_panel_device);
853
854 msm_fb_register_device("mdp", &mdp_pdata);
855 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
856#ifdef CONFIG_MSM_BUS_SCALING
857 msm_fb_register_device("dtv", &dtv_pdata);
858#endif
859}
860
861void __init msm8930_allocate_fb_region(void)
862{
863 void *addr;
864 unsigned long size;
865
866 size = MSM_FB_SIZE;
867 addr = alloc_bootmem_align(size, 0x1000);
868 msm_fb_resources[0].start = __pa(addr);
869 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
870 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
871 size, addr, __pa(addr));
872}