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Nagamalleswararao Ganji70fac1e2011-12-29 19:06:37 -08001/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
Steve Mucklea55df6e2010-01-07 12:43:24 -08002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
Steve Mucklea55df6e2010-01-07 12:43:24 -080012 */
13
14#include <linux/kernel.h>
15#include <linux/platform_device.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070016#include <linux/gpio.h>
Steve Muckle9161d302010-02-11 11:50:40 -080017#include <linux/irq.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018#include <linux/io.h>
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +053019#include <linux/msm_ssbi.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070020#include <linux/mfd/pmic8058.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080021
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070022#include <linux/leds.h>
23#include <linux/pmic8058-othc.h>
24#include <linux/mfd/pmic8901.h>
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053025#include <linux/regulator/gpio-regulator.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070026#include <linux/regulator/pmic8901-regulator.h>
27#include <linux/bootmem.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070028#include <linux/msm_adc.h>
29#include <linux/m_adcproc.h>
30#include <linux/mfd/marimba.h>
31#include <linux/msm-charger.h>
32#include <linux/i2c.h>
33#include <linux/i2c/sx150x.h>
34#include <linux/smsc911x.h>
35#include <linux/spi/spi.h>
36#include <linux/input/tdisc_shinetsu.h>
37#include <linux/input/cy8c_ts.h>
38#include <linux/cyttsp.h>
39#include <linux/i2c/isa1200.h>
40#include <linux/dma-mapping.h>
41#include <linux/i2c/bq27520.h>
42
43#ifdef CONFIG_ANDROID_PMEM
44#include <linux/android_pmem.h>
45#endif
46
47#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
48#include <linux/i2c/smb137b.h>
49#endif
Lei Zhou338cab82011-08-19 13:38:17 -040050#ifdef CONFIG_SND_SOC_WM8903
51#include <sound/wm8903.h>
52#endif
Steve Mucklea55df6e2010-01-07 12:43:24 -080053#include <asm/mach-types.h>
54#include <asm/mach/arch.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070055#include <asm/setup.h>
Marc Zyngier89bdafd12011-12-22 11:39:20 +053056#include <asm/hardware/gic.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080057
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070058#include <mach/dma.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080059#include <mach/board.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070060#include <mach/irqs.h>
61#include <mach/msm_spi.h>
62#include <mach/msm_serial_hs.h>
63#include <mach/msm_serial_hs_lite.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080064#include <mach/msm_iomap.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070065#include <mach/msm_memtypes.h>
66#include <asm/mach/mmc.h>
67#include <mach/msm_battery.h>
68#include <mach/msm_hsusb.h>
Rohit Vaswania513aa8d2011-07-18 15:14:28 -070069#include <mach/gpiomux.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070070#ifdef CONFIG_MSM_DSPS
71#include <mach/msm_dsps.h>
72#endif
73#include <mach/msm_xo.h>
74#include <mach/msm_bus_board.h>
75#include <mach/socinfo.h>
76#include <linux/i2c/isl9519.h>
77#ifdef CONFIG_USB_G_ANDROID
78#include <linux/usb/android.h>
79#include <mach/usbdiag.h>
80#endif
81#include <linux/regulator/consumer.h>
82#include <linux/regulator/machine.h>
83#include <mach/sdio_al.h>
84#include <mach/rpm.h>
85#include <mach/rpm-regulator.h>
Abhijeet Dharmapurikar6d565fd2011-09-15 18:49:56 -070086#include <mach/restart.h>
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053087#include <mach/board-msm8660.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080088
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070089#include "devices.h"
90#include "devices-msm8x60.h"
Abhijeet Dharmapurikarefaca4f2011-12-27 16:24:07 -080091#include <mach/cpuidle.h>
Matt Wagantall7cca4642012-02-01 16:43:24 -080092#include "pm.h"
Subhash Jadavani909e04f2012-04-12 10:52:50 +053093#include <mach/mpm.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070094#include "spm.h"
95#include "rpm_log.h"
96#include "timer.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070097#include "gpiomux-8x60.h"
98#include "rpm_stats.h"
99#include "peripheral-loader.h"
100#include <linux/platform_data/qcom_crypto_device.h>
101#include "rpm_resources.h"
Matt Wagantall6d9ebee2011-08-26 12:15:24 -0700102#include "acpuclock.h"
Maheshkumar Sivasubramanian8ccc16e2011-10-25 15:59:57 -0600103#include "pm-boot.h"
Laura Abbott63cfd7e2011-10-10 18:21:01 -0700104
105#include <linux/ion.h>
106#include <mach/ion.h>
107
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700108#define MSM_SHARED_RAM_PHYS 0x40000000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700109#define MDM2AP_SYNC 129
110
Terence Hampson1c73fef2011-07-19 17:10:49 -0400111#define GPIO_ETHERNET_RESET_N_DRAGON 30
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700112#define LCDC_SPI_GPIO_CLK 73
113#define LCDC_SPI_GPIO_CS 72
114#define LCDC_SPI_GPIO_MOSI 70
115#define LCDC_AUO_PANEL_NAME "lcdc_auo_wvga"
116#define LCDC_SAMSUNG_OLED_PANEL_NAME "lcdc_samsung_oled"
117#define LCDC_SAMSUNG_WSVGA_PANEL_NAME "lcdc_samsung_wsvga"
118#define LCDC_SAMSUNG_SPI_DEVICE_NAME "lcdc_samsung_ams367pe02"
119#define LCDC_AUO_SPI_DEVICE_NAME "lcdc_auo_nt35582"
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -0400120#define LCDC_NT35582_PANEL_NAME "lcdc_nt35582_wvga"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700121
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -0700122#define MIPI_CMD_NOVATEK_QHD_PANEL_NAME "mipi_cmd_novatek_qhd"
123#define MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME "mipi_video_novatek_qhd"
124#define MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME "mipi_video_toshiba_wvga"
125#define HDMI_PANEL_NAME "hdmi_msm"
126#define TVOUT_PANEL_NAME "tvout_msm"
127
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700128#define DSPS_PIL_GENERIC_NAME "dsps"
129#define DSPS_PIL_FLUID_NAME "dsps_fluid"
130
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -0800131#ifdef CONFIG_ION_MSM
132static struct platform_device ion_dev;
133#endif
134
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700135enum {
136 GPIO_EXPANDER_IRQ_BASE = PM8901_IRQ_BASE + NR_PMIC8901_IRQS,
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530137 GPIO_EXPANDER_GPIO_BASE = PM8901_MPP_BASE + PM8901_MPPS,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700138 /* CORE expander */
139 GPIO_CORE_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE,
140 GPIO_CLASS_D1_EN = GPIO_CORE_EXPANDER_BASE,
141 GPIO_WLAN_DEEP_SLEEP_N,
142 GPIO_LVDS_SHUTDOWN_N,
143 GPIO_DISP_RESX_N = GPIO_LVDS_SHUTDOWN_N,
144 GPIO_MS_SYS_RESET_N,
145 GPIO_CAP_TS_RESOUT_N,
146 GPIO_CAP_GAUGE_BI_TOUT,
147 GPIO_ETHERNET_PME,
148 GPIO_EXT_GPS_LNA_EN,
149 GPIO_MSM_WAKES_BT,
150 GPIO_ETHERNET_RESET_N,
151 GPIO_HEADSET_DET_N,
152 GPIO_USB_UICC_EN,
153 GPIO_BACKLIGHT_EN,
154 GPIO_EXT_CAMIF_PWR_EN,
155 GPIO_BATT_GAUGE_INT_N,
156 GPIO_BATT_GAUGE_EN,
157 /* DOCKING expander */
158 GPIO_DOCKING_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + 16,
159 GPIO_MIPI_DSI_RST_N = GPIO_DOCKING_EXPANDER_BASE,
160 GPIO_AUX_JTAG_DET_N,
161 GPIO_DONGLE_DET_N,
162 GPIO_SVIDEO_LOAD_DET,
163 GPIO_SVID_AMP_SHUTDOWN1_N,
164 GPIO_SVID_AMP_SHUTDOWN0_N,
165 GPIO_SDC_WP,
166 GPIO_IRDA_PWDN,
167 GPIO_IRDA_RESET_N,
168 GPIO_DONGLE_GPIO0,
169 GPIO_DONGLE_GPIO1,
170 GPIO_DONGLE_GPIO2,
171 GPIO_DONGLE_GPIO3,
172 GPIO_DONGLE_PWR_EN,
173 GPIO_EMMC_RESET_N,
174 GPIO_TP_EXP2_IO15,
175 /* SURF expander */
176 GPIO_SURF_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 2),
177 GPIO_SD_CARD_DET_1 = GPIO_SURF_EXPANDER_BASE,
178 GPIO_SD_CARD_DET_2,
179 GPIO_SD_CARD_DET_4,
180 GPIO_SD_CARD_DET_5,
181 GPIO_UIM3_RST,
182 GPIO_SURF_EXPANDER_IO5,
183 GPIO_SURF_EXPANDER_IO6,
184 GPIO_ADC_I2C_EN,
185 GPIO_SURF_EXPANDER_IO8,
186 GPIO_SURF_EXPANDER_IO9,
187 GPIO_SURF_EXPANDER_IO10,
188 GPIO_SURF_EXPANDER_IO11,
189 GPIO_SURF_EXPANDER_IO12,
190 GPIO_SURF_EXPANDER_IO13,
191 GPIO_SURF_EXPANDER_IO14,
192 GPIO_SURF_EXPANDER_IO15,
193 /* LEFT KB IO expander */
194 GPIO_LEFT_KB_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 3),
195 GPIO_LEFT_LED_1 = GPIO_LEFT_KB_EXPANDER_BASE,
196 GPIO_LEFT_LED_2,
197 GPIO_LEFT_LED_3,
198 GPIO_LEFT_LED_WLAN,
199 GPIO_JOYSTICK_EN,
200 GPIO_CAP_TS_SLEEP,
201 GPIO_LEFT_KB_IO6,
202 GPIO_LEFT_LED_5,
203 /* RIGHT KB IO expander */
204 GPIO_RIGHT_KB_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 3) + 8,
205 GPIO_RIGHT_LED_1 = GPIO_RIGHT_KB_EXPANDER_BASE,
206 GPIO_RIGHT_LED_2,
207 GPIO_RIGHT_LED_3,
208 GPIO_RIGHT_LED_BT,
209 GPIO_WEB_CAMIF_STANDBY,
210 GPIO_COMPASS_RST_N,
211 GPIO_WEB_CAMIF_RESET_N,
212 GPIO_RIGHT_LED_5,
213 GPIO_R_ALTIMETER_RESET_N,
214 /* FLUID S IO expander */
215 GPIO_SOUTH_EXPANDER_BASE,
216 GPIO_MIC2_ANCR_SEL = GPIO_SOUTH_EXPANDER_BASE,
217 GPIO_MIC1_ANCL_SEL,
218 GPIO_HS_MIC4_SEL,
219 GPIO_FML_MIC3_SEL,
220 GPIO_FMR_MIC5_SEL,
221 GPIO_TS_SLEEP,
222 GPIO_HAP_SHIFT_LVL_OE,
223 GPIO_HS_SW_DIR,
224 /* FLUID N IO expander */
225 GPIO_NORTH_EXPANDER_BASE,
226 GPIO_EPM_3_3V_EN = GPIO_NORTH_EXPANDER_BASE,
227 GPIO_EPM_5V_BOOST_EN,
228 GPIO_AUX_CAM_2P7_EN,
229 GPIO_LED_FLASH_EN,
230 GPIO_LED1_GREEN_N,
231 GPIO_LED2_RED_N,
232 GPIO_FRONT_CAM_RESET_N,
233 GPIO_EPM_LVLSFT_EN,
234 GPIO_N_ALTIMETER_RESET_N,
235 /* EPM expander */
236 GPIO_EPM_EXPANDER_BASE,
237 GPIO_PWR_MON_START = GPIO_EPM_EXPANDER_BASE,
238 GPIO_PWR_MON_RESET_N,
239 GPIO_ADC1_PWDN_N,
240 GPIO_ADC2_PWDN_N,
241 GPIO_EPM_EXPANDER_IO4,
242 GPIO_ADC1_MUX_SPI_INT_N_3_3V,
243 GPIO_ADC2_MUX_SPI_INT_N,
244 GPIO_EPM_EXPANDER_IO7,
245 GPIO_PWR_MON_ENABLE,
246 GPIO_EPM_SPI_ADC1_CS_N,
247 GPIO_EPM_SPI_ADC2_CS_N,
248 GPIO_EPM_EXPANDER_IO11,
249 GPIO_EPM_EXPANDER_IO12,
250 GPIO_EPM_EXPANDER_IO13,
251 GPIO_EPM_EXPANDER_IO14,
252 GPIO_EPM_EXPANDER_IO15,
253};
254
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530255struct pm8xxx_mpp_init_info {
256 unsigned mpp;
257 struct pm8xxx_mpp_config_data config;
258};
259
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530260#define PM8058_MPP_INIT(_mpp, _type, _level, _control) \
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530261{ \
262 .mpp = PM8058_MPP_PM_TO_SYS(_mpp), \
263 .config = { \
264 .type = PM8XXX_MPP_TYPE_##_type, \
265 .level = _level, \
266 .control = PM8XXX_MPP_##_control, \
267 } \
268}
269
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530270#define PM8901_MPP_INIT(_mpp, _type, _level, _control) \
271{ \
272 .mpp = PM8901_MPP_PM_TO_SYS(_mpp), \
273 .config = { \
274 .type = PM8XXX_MPP_TYPE_##_type, \
275 .level = _level, \
276 .control = PM8XXX_MPP_##_control, \
277 } \
278}
279
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700280/*
281 * The UI_INTx_N lines are pmic gpio lines which connect i2c
282 * gpio expanders to the pm8058.
283 */
284#define UI_INT1_N 25
285#define UI_INT2_N 34
286#define UI_INT3_N 14
287/*
288FM GPIO is GPIO 18 on PMIC 8058.
289As the index starts from 0 in the PMIC driver, and hence 17
290corresponds to GPIO 18 on PMIC 8058.
291*/
292#define FM_GPIO 17
293
294#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
295static void (*sdc2_status_notify_cb)(int card_present, void *dev_id);
296static void *sdc2_status_notify_cb_devid;
297#endif
298
299#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
300static void (*sdc5_status_notify_cb)(int card_present, void *dev_id);
301static void *sdc5_status_notify_cb_devid;
302#endif
303
304static struct msm_spm_platform_data msm_spm_data_v1[] __initdata = {
305 [0] = {
306 .reg_base_addr = MSM_SAW0_BASE,
307
308#ifdef CONFIG_MSM_AVS_HW
309 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
310#endif
311 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x0F,
312 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
313 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0xFFFFFFFF,
314 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0xFFFFFFFF,
315
316 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x01,
317 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
318 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
319
320 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
321 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
322 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
323
324 .awake_vlevel = 0x94,
325 .retention_vlevel = 0x81,
326 .collapse_vlevel = 0x20,
327 .retention_mid_vlevel = 0x94,
328 .collapse_mid_vlevel = 0x8C,
329
330 .vctl_timeout_us = 50,
331 },
332
333 [1] = {
334 .reg_base_addr = MSM_SAW1_BASE,
335
336#ifdef CONFIG_MSM_AVS_HW
337 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
338#endif
339 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x0F,
340 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
341 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0xFFFFFFFF,
342 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0xFFFFFFFF,
343
344 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x13,
345 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
346 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
347
348 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
349 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
350 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
351
352 .awake_vlevel = 0x94,
353 .retention_vlevel = 0x81,
354 .collapse_vlevel = 0x20,
355 .retention_mid_vlevel = 0x94,
356 .collapse_mid_vlevel = 0x8C,
357
358 .vctl_timeout_us = 50,
359 },
360};
361
362static struct msm_spm_platform_data msm_spm_data[] __initdata = {
363 [0] = {
364 .reg_base_addr = MSM_SAW0_BASE,
365
366#ifdef CONFIG_MSM_AVS_HW
367 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
368#endif
369 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x1C,
370 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
371 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0x0C0CFFFF,
372 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0x78780FFF,
373
374 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x01,
375 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
376 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
377
378 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
379 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
380 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
381
382 .awake_vlevel = 0xA0,
383 .retention_vlevel = 0x89,
384 .collapse_vlevel = 0x20,
385 .retention_mid_vlevel = 0x89,
386 .collapse_mid_vlevel = 0x89,
387
388 .vctl_timeout_us = 50,
389 },
390
391 [1] = {
392 .reg_base_addr = MSM_SAW1_BASE,
393
394#ifdef CONFIG_MSM_AVS_HW
395 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
396#endif
397 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x1C,
398 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
399 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0x0C0CFFFF,
400 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0x78780FFF,
401
402 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x13,
403 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
404 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
405
406 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
407 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
408 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
409
410 .awake_vlevel = 0xA0,
411 .retention_vlevel = 0x89,
412 .collapse_vlevel = 0x20,
413 .retention_mid_vlevel = 0x89,
414 .collapse_mid_vlevel = 0x89,
415
416 .vctl_timeout_us = 50,
417 },
418};
419
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700420/*
421 * Consumer specific regulator names:
422 * regulator name consumer dev_name
423 */
424static struct regulator_consumer_supply vreg_consumers_8901_S0[] = {
425 REGULATOR_SUPPLY("8901_s0", NULL),
426};
427static struct regulator_consumer_supply vreg_consumers_8901_S1[] = {
428 REGULATOR_SUPPLY("8901_s1", NULL),
429};
430
431static struct regulator_init_data saw_s0_init_data = {
432 .constraints = {
433 .name = "8901_s0",
434 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
Tianyi Gou7c81dfa2011-07-27 12:15:24 -0700435 .min_uV = 800000,
Matt Wagantall2ecbec22012-03-13 23:18:07 -0700436 .max_uV = 1325000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700437 },
438 .consumer_supplies = vreg_consumers_8901_S0,
439 .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S0),
440};
441
442static struct regulator_init_data saw_s1_init_data = {
443 .constraints = {
444 .name = "8901_s1",
445 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
Tianyi Gou7c81dfa2011-07-27 12:15:24 -0700446 .min_uV = 800000,
Matt Wagantall2ecbec22012-03-13 23:18:07 -0700447 .max_uV = 1325000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700448 },
449 .consumer_supplies = vreg_consumers_8901_S1,
450 .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S1),
451};
452
453static struct platform_device msm_device_saw_s0 = {
454 .name = "saw-regulator",
455 .id = 0,
456 .dev = {
457 .platform_data = &saw_s0_init_data,
458 },
459};
460
461static struct platform_device msm_device_saw_s1 = {
462 .name = "saw-regulator",
463 .id = 1,
464 .dev = {
465 .platform_data = &saw_s1_init_data,
466 },
467};
468
469/*
470 * The smc91x configuration varies depending on platform.
471 * The resources data structure is filled in at runtime.
472 */
473static struct resource smc91x_resources[] = {
474 [0] = {
475 .flags = IORESOURCE_MEM,
476 },
477 [1] = {
478 .flags = IORESOURCE_IRQ,
479 },
480};
481
482static struct platform_device smc91x_device = {
483 .name = "smc91x",
484 .id = 0,
485 .num_resources = ARRAY_SIZE(smc91x_resources),
486 .resource = smc91x_resources,
487};
488
489static struct resource smsc911x_resources[] = {
490 [0] = {
491 .flags = IORESOURCE_MEM,
492 .start = 0x1b800000,
493 .end = 0x1b8000ff
494 },
495 [1] = {
496 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
497 },
498};
499
500static struct smsc911x_platform_config smsc911x_config = {
501 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
502 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
503 .flags = SMSC911X_USE_16BIT,
504 .has_reset_gpio = 1,
505 .reset_gpio = GPIO_ETHERNET_RESET_N
506};
507
508static struct platform_device smsc911x_device = {
509 .name = "smsc911x",
510 .id = 0,
511 .num_resources = ARRAY_SIZE(smsc911x_resources),
512 .resource = smsc911x_resources,
513 .dev = {
514 .platform_data = &smsc911x_config
515 }
516};
517
518#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
519 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE) || \
520 defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
521 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
522
523#define QCE_SIZE 0x10000
524#define QCE_0_BASE 0x18500000
525
526#define QCE_HW_KEY_SUPPORT 0
527#define QCE_SHA_HMAC_SUPPORT 0
528#define QCE_SHARE_CE_RESOURCE 2
529#define QCE_CE_SHARED 1
530
531static struct resource qcrypto_resources[] = {
532 [0] = {
533 .start = QCE_0_BASE,
534 .end = QCE_0_BASE + QCE_SIZE - 1,
535 .flags = IORESOURCE_MEM,
536 },
537 [1] = {
538 .name = "crypto_channels",
539 .start = DMOV_CE_IN_CHAN,
540 .end = DMOV_CE_OUT_CHAN,
541 .flags = IORESOURCE_DMA,
542 },
543 [2] = {
544 .name = "crypto_crci_in",
545 .start = DMOV_CE_IN_CRCI,
546 .end = DMOV_CE_IN_CRCI,
547 .flags = IORESOURCE_DMA,
548 },
549 [3] = {
550 .name = "crypto_crci_out",
551 .start = DMOV_CE_OUT_CRCI,
552 .end = DMOV_CE_OUT_CRCI,
553 .flags = IORESOURCE_DMA,
554 },
555 [4] = {
556 .name = "crypto_crci_hash",
557 .start = DMOV_CE_HASH_CRCI,
558 .end = DMOV_CE_HASH_CRCI,
559 .flags = IORESOURCE_DMA,
560 },
561};
562
563static struct resource qcedev_resources[] = {
564 [0] = {
565 .start = QCE_0_BASE,
566 .end = QCE_0_BASE + QCE_SIZE - 1,
567 .flags = IORESOURCE_MEM,
568 },
569 [1] = {
570 .name = "crypto_channels",
571 .start = DMOV_CE_IN_CHAN,
572 .end = DMOV_CE_OUT_CHAN,
573 .flags = IORESOURCE_DMA,
574 },
575 [2] = {
576 .name = "crypto_crci_in",
577 .start = DMOV_CE_IN_CRCI,
578 .end = DMOV_CE_IN_CRCI,
579 .flags = IORESOURCE_DMA,
580 },
581 [3] = {
582 .name = "crypto_crci_out",
583 .start = DMOV_CE_OUT_CRCI,
584 .end = DMOV_CE_OUT_CRCI,
585 .flags = IORESOURCE_DMA,
586 },
587 [4] = {
588 .name = "crypto_crci_hash",
589 .start = DMOV_CE_HASH_CRCI,
590 .end = DMOV_CE_HASH_CRCI,
591 .flags = IORESOURCE_DMA,
592 },
593};
594
595#endif
596
597#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
598 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
599
600static struct msm_ce_hw_support qcrypto_ce_hw_suppport = {
601 .ce_shared = QCE_CE_SHARED,
602 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
603 .hw_key_support = QCE_HW_KEY_SUPPORT,
604 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
Ramesh Masavarapu49259682011-12-02 14:00:18 -0800605 .bus_scale_table = NULL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700606};
607
608static struct platform_device qcrypto_device = {
609 .name = "qcrypto",
610 .id = 0,
611 .num_resources = ARRAY_SIZE(qcrypto_resources),
612 .resource = qcrypto_resources,
613 .dev = {
614 .coherent_dma_mask = DMA_BIT_MASK(32),
615 .platform_data = &qcrypto_ce_hw_suppport,
616 },
617};
618#endif
619
620#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
621 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
622
623static struct msm_ce_hw_support qcedev_ce_hw_suppport = {
624 .ce_shared = QCE_CE_SHARED,
625 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
626 .hw_key_support = QCE_HW_KEY_SUPPORT,
627 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
Ramesh Masavarapu49259682011-12-02 14:00:18 -0800628 .bus_scale_table = NULL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700629};
630
631static struct platform_device qcedev_device = {
632 .name = "qce",
633 .id = 0,
634 .num_resources = ARRAY_SIZE(qcedev_resources),
635 .resource = qcedev_resources,
636 .dev = {
637 .coherent_dma_mask = DMA_BIT_MASK(32),
638 .platform_data = &qcedev_ce_hw_suppport,
639 },
640};
641#endif
642
643#if defined(CONFIG_HAPTIC_ISA1200) || \
644 defined(CONFIG_HAPTIC_ISA1200_MODULE)
645
646static const char *vregs_isa1200_name[] = {
647 "8058_s3",
648 "8901_l4",
649};
650
651static const int vregs_isa1200_val[] = {
652 1800000,/* uV */
653 2600000,
654};
655static struct regulator *vregs_isa1200[ARRAY_SIZE(vregs_isa1200_name)];
656static struct msm_xo_voter *xo_handle_a1;
657
658static int isa1200_power(int vreg_on)
Steve Mucklea55df6e2010-01-07 12:43:24 -0800659{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700660 int i, rc = 0;
661
662 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++) {
663 rc = vreg_on ? regulator_enable(vregs_isa1200[i]) :
664 regulator_disable(vregs_isa1200[i]);
665 if (rc < 0) {
666 pr_err("%s: vreg %s %s failed (%d)\n",
667 __func__, vregs_isa1200_name[i],
668 vreg_on ? "enable" : "disable", rc);
669 goto vreg_fail;
670 }
671 }
672
673 rc = vreg_on ? msm_xo_mode_vote(xo_handle_a1, MSM_XO_MODE_ON) :
674 msm_xo_mode_vote(xo_handle_a1, MSM_XO_MODE_OFF);
675 if (rc < 0) {
676 pr_err("%s: failed to %svote for TCXO A1 buffer%d\n",
677 __func__, vreg_on ? "" : "de-", rc);
678 goto vreg_fail;
679 }
680 return 0;
681
682vreg_fail:
683 while (i--)
684 !vreg_on ? regulator_enable(vregs_isa1200[i]) :
685 regulator_disable(vregs_isa1200[i]);
686 return rc;
Steve Mucklea55df6e2010-01-07 12:43:24 -0800687}
688
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700689static int isa1200_dev_setup(bool enable)
Steve Mucklea55df6e2010-01-07 12:43:24 -0800690{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700691 int i, rc;
Steve Muckle9161d302010-02-11 11:50:40 -0800692
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700693 if (enable == true) {
694 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++) {
695 vregs_isa1200[i] = regulator_get(NULL,
696 vregs_isa1200_name[i]);
697 if (IS_ERR(vregs_isa1200[i])) {
698 pr_err("%s: regulator get of %s failed (%ld)\n",
699 __func__, vregs_isa1200_name[i],
700 PTR_ERR(vregs_isa1200[i]));
701 rc = PTR_ERR(vregs_isa1200[i]);
702 goto vreg_get_fail;
703 }
704 rc = regulator_set_voltage(vregs_isa1200[i],
705 vregs_isa1200_val[i], vregs_isa1200_val[i]);
706 if (rc) {
707 pr_err("%s: regulator_set_voltage(%s) failed\n",
708 __func__, vregs_isa1200_name[i]);
709 goto vreg_get_fail;
710 }
711 }
Steve Muckle9161d302010-02-11 11:50:40 -0800712
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700713 rc = gpio_request(GPIO_HAP_SHIFT_LVL_OE, "haptics_shft_lvl_oe");
714 if (rc) {
715 pr_err("%s: unable to request gpio %d (%d)\n",
716 __func__, GPIO_HAP_SHIFT_LVL_OE, rc);
717 goto vreg_get_fail;
718 }
Steve Muckle9161d302010-02-11 11:50:40 -0800719
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700720 rc = gpio_direction_output(GPIO_HAP_SHIFT_LVL_OE, 1);
721 if (rc) {
722 pr_err("%s: Unable to set direction\n", __func__);;
723 goto free_gpio;
724 }
725
726 xo_handle_a1 = msm_xo_get(MSM_XO_TCXO_A1, "isa1200");
727 if (IS_ERR(xo_handle_a1)) {
728 rc = PTR_ERR(xo_handle_a1);
729 pr_err("%s: failed to get the handle for A1(%d)\n",
730 __func__, rc);
731 goto gpio_set_dir;
732 }
733 } else {
734 gpio_set_value(GPIO_HAP_SHIFT_LVL_OE, 0);
735 gpio_free(GPIO_HAP_SHIFT_LVL_OE);
736
737 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++)
738 regulator_put(vregs_isa1200[i]);
739
740 msm_xo_put(xo_handle_a1);
741 }
742
743 return 0;
744gpio_set_dir:
745 gpio_set_value(GPIO_HAP_SHIFT_LVL_OE, 0);
746free_gpio:
747 gpio_free(GPIO_HAP_SHIFT_LVL_OE);
748vreg_get_fail:
749 while (i)
750 regulator_put(vregs_isa1200[--i]);
751 return rc;
752}
753
754#define PMIC_GPIO_HAP_ENABLE 18 /* PMIC GPIO Number 19 */
Mohan Pallaka4a1160d2011-09-09 15:17:45 +0530755#define PMIC_GPIO_HAP_LDO_ENABLE 5 /* PMIC GPIO Number 6 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700756static struct isa1200_platform_data isa1200_1_pdata = {
757 .name = "vibrator",
758 .power_on = isa1200_power,
759 .dev_setup = isa1200_dev_setup,
760 /*gpio to enable haptic*/
761 .hap_en_gpio = PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_ENABLE),
Mohan Pallaka4a1160d2011-09-09 15:17:45 +0530762 .hap_len_gpio = PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_LDO_ENABLE),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700763 .max_timeout = 15000,
764 .mode_ctrl = PWM_GEN_MODE,
765 .pwm_fd = {
766 .pwm_div = 256,
767 },
768 .is_erm = false,
769 .smart_en = true,
770 .ext_clk_en = true,
771 .chip_en = 1,
772};
773
774static struct i2c_board_info msm_isa1200_board_info[] = {
775 {
776 I2C_BOARD_INFO("isa1200_1", 0x90>>1),
777 .platform_data = &isa1200_1_pdata,
778 },
779};
780#endif
781
782#if defined(CONFIG_BATTERY_BQ27520) || \
783 defined(CONFIG_BATTERY_BQ27520_MODULE)
784static struct bq27520_platform_data bq27520_pdata = {
785 .name = "fuel-gauge",
786 .vreg_name = "8058_s3",
787 .vreg_value = 1800000,
788 .soc_int = GPIO_BATT_GAUGE_INT_N,
789 .bi_tout = GPIO_CAP_GAUGE_BI_TOUT,
790 .chip_en = GPIO_BATT_GAUGE_EN,
791 .enable_dlog = 0, /* if enable coulomb counter logger */
792};
793
794static struct i2c_board_info msm_bq27520_board_info[] = {
795 {
796 I2C_BOARD_INFO("bq27520", 0xaa>>1),
797 .platform_data = &bq27520_pdata,
798 },
799};
800#endif
801
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700802static struct msm_rpmrs_level msm_rpmrs_levels[] __initdata = {
803 {
804 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT,
805 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
806 true,
807 1, 8000, 100000, 1,
808 },
809
810 {
811 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE,
812 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
813 true,
814 1500, 5000, 60100000, 3000,
815 },
816
817 {
818 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
819 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
820 false,
821 1800, 5000, 60350000, 3500,
822 },
823 {
824 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
825 MSM_RPMRS_LIMITS(OFF, ACTIVE, MAX, ACTIVE),
826 false,
827 3800, 4500, 65350000, 5500,
828 },
829
830 {
831 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
832 MSM_RPMRS_LIMITS(ON, HSFS_OPEN, MAX, ACTIVE),
833 false,
834 2800, 2500, 66850000, 4800,
835 },
836
837 {
838 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
839 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, MAX, ACTIVE),
840 false,
841 4800, 2000, 71850000, 6800,
842 },
843
844 {
845 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
846 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, ACTIVE, RET_HIGH),
847 false,
848 6800, 500, 75850000, 8800,
849 },
850
851 {
852 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
853 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, RET_HIGH, RET_LOW),
854 false,
855 7800, 0, 76350000, 9800,
856 },
857};
858
Praveen Chidambaram78499012011-11-01 17:15:17 -0600859static struct msm_rpmrs_platform_data msm_rpmrs_data __initdata = {
860 .levels = &msm_rpmrs_levels[0],
861 .num_levels = ARRAY_SIZE(msm_rpmrs_levels),
862 .vdd_mem_levels = {
863 [MSM_RPMRS_VDD_MEM_RET_LOW] = 500,
864 [MSM_RPMRS_VDD_MEM_RET_HIGH] = 750,
865 [MSM_RPMRS_VDD_MEM_ACTIVE] = 1000,
Matt Wagantall2ecbec22012-03-13 23:18:07 -0700866 [MSM_RPMRS_VDD_MEM_MAX] = 1325,
Praveen Chidambaram78499012011-11-01 17:15:17 -0600867 },
868 .vdd_dig_levels = {
869 [MSM_RPMRS_VDD_DIG_RET_LOW] = 500,
870 [MSM_RPMRS_VDD_DIG_RET_HIGH] = 750,
871 [MSM_RPMRS_VDD_DIG_ACTIVE] = 1000,
872 [MSM_RPMRS_VDD_DIG_MAX] = 1250,
873 },
874 .vdd_mask = 0xFFF,
875 .rpmrs_target_id = {
876 [MSM_RPMRS_ID_PXO_CLK] = MSM_RPM_ID_PXO_CLK,
877 [MSM_RPMRS_ID_L2_CACHE_CTL] = MSM_RPM_ID_APPS_L2_CACHE_CTL,
878 [MSM_RPMRS_ID_VDD_DIG_0] = MSM_RPM_ID_SMPS1_0,
879 [MSM_RPMRS_ID_VDD_DIG_1] = MSM_RPM_ID_SMPS1_1,
880 [MSM_RPMRS_ID_VDD_MEM_0] = MSM_RPM_ID_SMPS0_0,
881 [MSM_RPMRS_ID_VDD_MEM_1] = MSM_RPM_ID_SMPS0_1,
882 [MSM_RPMRS_ID_RPM_CTL] = MSM_RPM_ID_TRIGGER_SET_FROM,
883 },
884};
885
Maheshkumar Sivasubramanianc6c55032011-10-25 16:01:32 -0600886static struct msm_pm_boot_platform_data msm_pm_boot_pdata __initdata = {
887 .mode = MSM_PM_BOOT_CONFIG_TZ,
888};
889
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700890#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
891
892#define ISP1763_INT_GPIO 117
893#define ISP1763_RST_GPIO 152
894static struct resource isp1763_resources[] = {
895 [0] = {
896 .flags = IORESOURCE_MEM,
897 .start = 0x1D000000,
898 .end = 0x1D005FFF, /* 24KB */
899 },
900 [1] = {
901 .flags = IORESOURCE_IRQ,
902 },
903};
904static void __init msm8x60_cfg_isp1763(void)
905{
906 isp1763_resources[1].start = gpio_to_irq(ISP1763_INT_GPIO);
907 isp1763_resources[1].end = gpio_to_irq(ISP1763_INT_GPIO);
908}
909
910static int isp1763_setup_gpio(int enable)
911{
912 int status = 0;
913
914 if (enable) {
915 status = gpio_request(ISP1763_INT_GPIO, "isp1763_usb");
916 if (status) {
917 pr_err("%s:Failed to request GPIO %d\n",
918 __func__, ISP1763_INT_GPIO);
919 return status;
920 }
921 status = gpio_direction_input(ISP1763_INT_GPIO);
922 if (status) {
923 pr_err("%s:Failed to configure GPIO %d\n",
924 __func__, ISP1763_INT_GPIO);
925 goto gpio_free_int;
926 }
927 status = gpio_request(ISP1763_RST_GPIO, "isp1763_usb");
928 if (status) {
929 pr_err("%s:Failed to request GPIO %d\n",
930 __func__, ISP1763_RST_GPIO);
931 goto gpio_free_int;
932 }
933 status = gpio_direction_output(ISP1763_RST_GPIO, 1);
934 if (status) {
935 pr_err("%s:Failed to configure GPIO %d\n",
936 __func__, ISP1763_RST_GPIO);
937 goto gpio_free_rst;
938 }
939 pr_debug("\nISP GPIO configuration done\n");
940 return status;
941 }
942
943gpio_free_rst:
944 gpio_free(ISP1763_RST_GPIO);
945gpio_free_int:
946 gpio_free(ISP1763_INT_GPIO);
947
948 return status;
949}
950static struct isp1763_platform_data isp1763_pdata = {
951 .reset_gpio = ISP1763_RST_GPIO,
952 .setup_gpio = isp1763_setup_gpio
953};
954
955static struct platform_device isp1763_device = {
956 .name = "isp1763_usb",
957 .num_resources = ARRAY_SIZE(isp1763_resources),
958 .resource = isp1763_resources,
959 .dev = {
960 .platform_data = &isp1763_pdata
961 }
962};
963#endif
964
Lena Salman57d167e2012-03-21 19:46:38 +0200965#if defined(CONFIG_USB_MSM_72K) || defined(CONFIG_USB_EHCI_MSM_72K)
Anji jonnalaeb9e60d2011-10-05 12:19:46 +0530966static struct msm_otg_platform_data msm_otg_pdata;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700967static struct regulator *ldo6_3p3;
968static struct regulator *ldo7_1p8;
969static struct regulator *vdd_cx;
970#define PMICID_INT PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 36)
Anji jonnalaae745e92011-11-14 18:34:31 +0530971#define PMIC_ID_GPIO 36
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700972notify_vbus_state notify_vbus_state_func_ptr;
973static int usb_phy_susp_dig_vol = 750000;
974static int pmic_id_notif_supported;
975
976#ifdef CONFIG_USB_EHCI_MSM_72K
977#define USB_PMIC_ID_DET_DELAY msecs_to_jiffies(100)
978struct delayed_work pmic_id_det;
979
980static int __init usb_id_pin_rework_setup(char *support)
981{
982 if (strncmp(support, "true", 4) == 0)
983 pmic_id_notif_supported = 1;
984
985 return 1;
986}
987__setup("usb_id_pin_rework=", usb_id_pin_rework_setup);
988
989static void pmic_id_detect(struct work_struct *w)
990{
991 int val = gpio_get_value_cansleep(PM8058_GPIO_PM_TO_SYS(36));
992 pr_debug("%s(): gpio_read_value = %d\n", __func__, val);
993
994 if (notify_vbus_state_func_ptr)
995 (*notify_vbus_state_func_ptr) (val);
996}
997
998static irqreturn_t pmic_id_on_irq(int irq, void *data)
999{
1000 /*
1001 * Spurious interrupts are observed on pmic gpio line
1002 * even though there is no state change on USB ID. Schedule the
1003 * work to to allow debounce on gpio
Steve Muckle9161d302010-02-11 11:50:40 -08001004 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001005 schedule_delayed_work(&pmic_id_det, USB_PMIC_ID_DET_DELAY);
Steve Muckle9161d302010-02-11 11:50:40 -08001006
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001007 return IRQ_HANDLED;
1008}
1009
Anji jonnalaae745e92011-11-14 18:34:31 +05301010static int msm_hsusb_phy_id_setup_init(int init)
1011{
1012 unsigned ret;
1013
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301014 struct pm8xxx_mpp_config_data hsusb_phy_mpp = {
1015 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
1016 .level = PM8901_MPP_DIG_LEVEL_L5,
1017 };
1018
Anji jonnalaae745e92011-11-14 18:34:31 +05301019 if (init) {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301020 hsusb_phy_mpp.control = PM8XXX_MPP_DOUT_CTRL_HIGH;
1021 ret = pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1),
1022 &hsusb_phy_mpp);
Anji jonnalaae745e92011-11-14 18:34:31 +05301023 if (ret < 0)
1024 pr_err("%s:MPP2 configuration failed\n", __func__);
1025 } else {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301026 hsusb_phy_mpp.control = PM8XXX_MPP_DOUT_CTRL_LOW;
1027 ret = pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1),
1028 &hsusb_phy_mpp);
Anji jonnalaae745e92011-11-14 18:34:31 +05301029 if (ret < 0)
1030 pr_err("%s:MPP2 un config failed\n", __func__);
1031 }
1032 return ret;
1033}
1034
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001035static int msm_hsusb_pmic_id_notif_init(void (*callback)(int online), int init)
1036{
1037 unsigned ret = -ENODEV;
1038
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301039 struct pm_gpio pmic_id_cfg = {
Anji jonnalaae745e92011-11-14 18:34:31 +05301040 .direction = PM_GPIO_DIR_IN,
1041 .pull = PM_GPIO_PULL_UP_1P5,
1042 .function = PM_GPIO_FUNC_NORMAL,
1043 .vin_sel = 2,
1044 .inv_int_pol = 0,
1045 };
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301046 struct pm_gpio pmic_id_uncfg = {
Anji jonnalaae745e92011-11-14 18:34:31 +05301047 .direction = PM_GPIO_DIR_IN,
1048 .pull = PM_GPIO_PULL_NO,
1049 .function = PM_GPIO_FUNC_NORMAL,
1050 .vin_sel = 2,
1051 .inv_int_pol = 0,
1052 };
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001053 if (!callback)
1054 return -EINVAL;
1055
1056 if (machine_is_msm8x60_fluid())
1057 return -ENOTSUPP;
1058
1059 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 2) {
1060 pr_debug("%s: USB_ID pin is not routed to PMIC"
1061 "on V1 surf/ffa\n", __func__);
1062 return -ENOTSUPP;
1063 }
1064
Manu Gautam62158eb2011-11-24 16:20:46 +05301065 if ((machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa() ||
1066 machine_is_msm8x60_ffa()) && !pmic_id_notif_supported) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001067 pr_debug("%s: USB_ID is not routed to PMIC"
1068 "on V2 ffa\n", __func__);
1069 return -ENOTSUPP;
1070 }
1071
1072 usb_phy_susp_dig_vol = 500000;
1073
1074 if (init) {
1075 notify_vbus_state_func_ptr = callback;
Manu Gautame8420ef2011-11-11 15:37:21 +05301076 INIT_DELAYED_WORK(&pmic_id_det, pmic_id_detect);
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301077 ret = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(PMIC_ID_GPIO),
1078 &pmic_id_cfg);
Anji jonnalaae745e92011-11-14 18:34:31 +05301079 if (ret) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301080 pr_err("%s:return val of pm8xxx_gpio_config: %d\n",
Anji jonnalaae745e92011-11-14 18:34:31 +05301081 __func__, ret);
1082 return ret;
1083 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001084 ret = request_threaded_irq(PMICID_INT, NULL, pmic_id_on_irq,
1085 (IRQF_TRIGGER_RISING|IRQF_TRIGGER_FALLING),
1086 "msm_otg_id", NULL);
1087 if (ret) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001088 pr_err("%s:pmic_usb_id interrupt registration failed",
1089 __func__);
1090 return ret;
1091 }
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301092 msm_otg_pdata.pmic_id_irq = PMICID_INT;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001093 } else {
Anji jonnalaae745e92011-11-14 18:34:31 +05301094 usb_phy_susp_dig_vol = 750000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001095 free_irq(PMICID_INT, 0);
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301096 ret = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(PMIC_ID_GPIO),
1097 &pmic_id_uncfg);
Anji jonnalaae745e92011-11-14 18:34:31 +05301098 if (ret) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301099 pr_err("%s: return val of pm8xxx_gpio_config: %d\n",
Anji jonnalaae745e92011-11-14 18:34:31 +05301100 __func__, ret);
1101 return ret;
1102 }
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301103 msm_otg_pdata.pmic_id_irq = 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001104 cancel_delayed_work_sync(&pmic_id_det);
1105 notify_vbus_state_func_ptr = NULL;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001106 }
1107 return 0;
1108}
1109#endif
1110
1111#define USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL 1000000
1112#define USB_PHY_MAX_VDD_DIG_VOL 1320000
1113static int msm_hsusb_init_vddcx(int init)
1114{
1115 int ret = 0;
1116
1117 if (init) {
1118 vdd_cx = regulator_get(NULL, "8058_s1");
1119 if (IS_ERR(vdd_cx)) {
1120 return PTR_ERR(vdd_cx);
1121 }
1122
1123 ret = regulator_set_voltage(vdd_cx,
1124 USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL,
1125 USB_PHY_MAX_VDD_DIG_VOL);
1126 if (ret) {
1127 pr_err("%s: unable to set the voltage for regulator"
1128 "vdd_cx\n", __func__);
1129 regulator_put(vdd_cx);
1130 return ret;
1131 }
1132
1133 ret = regulator_enable(vdd_cx);
1134 if (ret) {
1135 pr_err("%s: unable to enable regulator"
1136 "vdd_cx\n", __func__);
1137 regulator_put(vdd_cx);
1138 }
1139 } else {
1140 ret = regulator_disable(vdd_cx);
1141 if (ret) {
1142 pr_err("%s: Unable to disable the regulator:"
1143 "vdd_cx\n", __func__);
1144 return ret;
1145 }
1146
1147 regulator_put(vdd_cx);
1148 }
1149
1150 return ret;
1151}
1152
1153static int msm_hsusb_config_vddcx(int high)
1154{
1155 int max_vol = USB_PHY_MAX_VDD_DIG_VOL;
1156 int min_vol;
1157 int ret;
1158
1159 if (high)
1160 min_vol = USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL;
1161 else
1162 min_vol = usb_phy_susp_dig_vol;
1163
1164 ret = regulator_set_voltage(vdd_cx, min_vol, max_vol);
1165 if (ret) {
1166 pr_err("%s: unable to set the voltage for regulator"
1167 "vdd_cx\n", __func__);
1168 return ret;
1169 }
1170
1171 pr_debug("%s: min_vol:%d max_vol:%d\n", __func__, min_vol, max_vol);
1172
1173 return ret;
1174}
1175
1176#define USB_PHY_3P3_VOL_MIN 3050000 /* uV */
1177#define USB_PHY_3P3_VOL_MAX 3050000 /* uV */
1178#define USB_PHY_3P3_HPM_LOAD 50000 /* uA */
1179#define USB_PHY_3P3_LPM_LOAD 4000 /* uA */
1180
1181#define USB_PHY_1P8_VOL_MIN 1800000 /* uV */
1182#define USB_PHY_1P8_VOL_MAX 1800000 /* uV */
1183#define USB_PHY_1P8_HPM_LOAD 50000 /* uA */
1184#define USB_PHY_1P8_LPM_LOAD 4000 /* uA */
1185static int msm_hsusb_ldo_init(int init)
1186{
1187 int rc = 0;
1188
1189 if (init) {
1190 ldo6_3p3 = regulator_get(NULL, "8058_l6");
1191 if (IS_ERR(ldo6_3p3))
1192 return PTR_ERR(ldo6_3p3);
1193
1194 ldo7_1p8 = regulator_get(NULL, "8058_l7");
1195 if (IS_ERR(ldo7_1p8)) {
1196 rc = PTR_ERR(ldo7_1p8);
1197 goto put_3p3;
1198 }
1199
1200 rc = regulator_set_voltage(ldo6_3p3, USB_PHY_3P3_VOL_MIN,
1201 USB_PHY_3P3_VOL_MAX);
1202 if (rc) {
1203 pr_err("%s: Unable to set voltage level for"
1204 "ldo6_3p3 regulator\n", __func__);
1205 goto put_1p8;
1206 }
1207 rc = regulator_enable(ldo6_3p3);
1208 if (rc) {
1209 pr_err("%s: Unable to enable the regulator:"
1210 "ldo6_3p3\n", __func__);
1211 goto put_1p8;
1212 }
1213 rc = regulator_set_voltage(ldo7_1p8, USB_PHY_1P8_VOL_MIN,
1214 USB_PHY_1P8_VOL_MAX);
1215 if (rc) {
1216 pr_err("%s: Unable to set voltage level for"
1217 "ldo7_1p8 regulator\n", __func__);
1218 goto disable_3p3;
1219 }
1220 rc = regulator_enable(ldo7_1p8);
1221 if (rc) {
1222 pr_err("%s: Unable to enable the regulator:"
1223 "ldo7_1p8\n", __func__);
1224 goto disable_3p3;
1225 }
1226
1227 return 0;
1228 }
1229
1230 regulator_disable(ldo7_1p8);
1231disable_3p3:
1232 regulator_disable(ldo6_3p3);
1233put_1p8:
1234 regulator_put(ldo7_1p8);
1235put_3p3:
1236 regulator_put(ldo6_3p3);
1237 return rc;
1238}
1239
1240static int msm_hsusb_ldo_enable(int on)
1241{
1242 int ret = 0;
1243
1244 if (!ldo7_1p8 || IS_ERR(ldo7_1p8)) {
1245 pr_err("%s: ldo7_1p8 is not initialized\n", __func__);
1246 return -ENODEV;
1247 }
1248
1249 if (!ldo6_3p3 || IS_ERR(ldo6_3p3)) {
1250 pr_err("%s: ldo6_3p3 is not initialized\n", __func__);
1251 return -ENODEV;
1252 }
1253
1254 if (on) {
1255 ret = regulator_set_optimum_mode(ldo7_1p8,
1256 USB_PHY_1P8_HPM_LOAD);
1257 if (ret < 0) {
1258 pr_err("%s: Unable to set HPM of the regulator:"
1259 "ldo7_1p8\n", __func__);
1260 return ret;
1261 }
1262 ret = regulator_set_optimum_mode(ldo6_3p3,
1263 USB_PHY_3P3_HPM_LOAD);
1264 if (ret < 0) {
1265 pr_err("%s: Unable to set HPM of the regulator:"
1266 "ldo6_3p3\n", __func__);
1267 regulator_set_optimum_mode(ldo7_1p8,
1268 USB_PHY_1P8_LPM_LOAD);
1269 return ret;
1270 }
1271 } else {
1272 ret = regulator_set_optimum_mode(ldo7_1p8,
1273 USB_PHY_1P8_LPM_LOAD);
1274 if (ret < 0)
1275 pr_err("%s: Unable to set LPM of the regulator:"
1276 "ldo7_1p8\n", __func__);
1277 ret = regulator_set_optimum_mode(ldo6_3p3,
1278 USB_PHY_3P3_LPM_LOAD);
1279 if (ret < 0)
1280 pr_err("%s: Unable to set LPM of the regulator:"
1281 "ldo6_3p3\n", __func__);
1282 }
1283
1284 pr_debug("reg (%s)\n", on ? "HPM" : "LPM");
1285 return ret < 0 ? ret : 0;
1286 }
1287#endif
1288#ifdef CONFIG_USB_EHCI_MSM_72K
1289#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
1290static void msm_hsusb_smb137b_vbus_power(unsigned phy_info, int on)
1291{
1292 static int vbus_is_on;
1293
1294 /* If VBUS is already on (or off), do nothing. */
1295 if (on == vbus_is_on)
1296 return;
1297 smb137b_otg_power(on);
1298 vbus_is_on = on;
1299}
1300#endif
1301static void msm_hsusb_vbus_power(unsigned phy_info, int on)
1302{
1303 static struct regulator *votg_5v_switch;
1304 static struct regulator *ext_5v_reg;
1305 static int vbus_is_on;
1306
1307 /* If VBUS is already on (or off), do nothing. */
1308 if (on == vbus_is_on)
1309 return;
1310
1311 if (!votg_5v_switch) {
1312 votg_5v_switch = regulator_get(NULL, "8901_usb_otg");
1313 if (IS_ERR(votg_5v_switch)) {
1314 pr_err("%s: unable to get votg_5v_switch\n", __func__);
1315 return;
1316 }
1317 }
1318 if (!ext_5v_reg) {
1319 ext_5v_reg = regulator_get(NULL, "8901_mpp0");
1320 if (IS_ERR(ext_5v_reg)) {
1321 pr_err("%s: unable to get ext_5v_reg\n", __func__);
1322 return;
1323 }
1324 }
1325 if (on) {
1326 if (regulator_enable(ext_5v_reg)) {
1327 pr_err("%s: Unable to enable the regulator:"
1328 " ext_5v_reg\n", __func__);
1329 return;
1330 }
1331 if (regulator_enable(votg_5v_switch)) {
1332 pr_err("%s: Unable to enable the regulator:"
1333 " votg_5v_switch\n", __func__);
1334 return;
1335 }
1336 } else {
1337 if (regulator_disable(votg_5v_switch))
1338 pr_err("%s: Unable to enable the regulator:"
1339 " votg_5v_switch\n", __func__);
1340 if (regulator_disable(ext_5v_reg))
1341 pr_err("%s: Unable to enable the regulator:"
1342 " ext_5v_reg\n", __func__);
1343 }
1344
1345 vbus_is_on = on;
1346}
1347
1348static struct msm_usb_host_platform_data msm_usb_host_pdata = {
1349 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_45NM),
1350 .power_budget = 390,
1351};
1352#endif
1353
1354#ifdef CONFIG_BATTERY_MSM8X60
1355static int msm_hsusb_pmic_vbus_notif_init(void (*callback)(int online),
1356 int init)
1357{
1358 int ret = -ENOTSUPP;
1359
1360#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
1361 if (machine_is_msm8x60_fluid()) {
1362 if (init)
1363 msm_charger_register_vbus_sn(callback);
1364 else
1365 msm_charger_unregister_vbus_sn(callback);
1366 return 0;
1367 }
1368#endif
1369 /* ID and VBUS lines are connected to pmic on 8660.V2.SURF,
1370 * hence, irrespective of either peripheral only mode or
1371 * OTG (host and peripheral) modes, can depend on pmic for
1372 * vbus notifications
Steve Muckle9161d302010-02-11 11:50:40 -08001373 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001374 if ((SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2)
1375 && (machine_is_msm8x60_surf() ||
1376 pmic_id_notif_supported)) {
1377 if (init)
1378 ret = msm_charger_register_vbus_sn(callback);
1379 else {
1380 msm_charger_unregister_vbus_sn(callback);
1381 ret = 0;
1382 }
1383 } else {
1384#if !defined(CONFIG_USB_EHCI_MSM_72K)
1385 if (init)
1386 ret = msm_charger_register_vbus_sn(callback);
1387 else {
1388 msm_charger_unregister_vbus_sn(callback);
1389 ret = 0;
1390 }
1391#endif
1392 }
1393 return ret;
1394}
1395#endif
1396
Lena Salman57d167e2012-03-21 19:46:38 +02001397#if defined(CONFIG_USB_MSM_72K) || defined(CONFIG_USB_EHCI_MSM_72K)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001398static struct msm_otg_platform_data msm_otg_pdata = {
1399 /* if usb link is in sps there is no need for
1400 * usb pclk as dayatona fabric clock will be
1401 * used instead
1402 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001403 .pemp_level = PRE_EMPHASIS_WITH_20_PERCENT,
1404 .cdr_autoreset = CDR_AUTO_RESET_DISABLE,
1405 .se1_gating = SE1_GATING_DISABLE,
Chandra Devireddyb3fc78c2011-08-30 17:25:55 +05301406 .bam_disable = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001407#ifdef CONFIG_USB_EHCI_MSM_72K
1408 .pmic_id_notif_init = msm_hsusb_pmic_id_notif_init,
Anji jonnalaae745e92011-11-14 18:34:31 +05301409 .phy_id_setup_init = msm_hsusb_phy_id_setup_init,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001410#endif
1411#ifdef CONFIG_USB_EHCI_MSM_72K
1412 .vbus_power = msm_hsusb_vbus_power,
1413#endif
1414#ifdef CONFIG_BATTERY_MSM8X60
1415 .pmic_vbus_notif_init = msm_hsusb_pmic_vbus_notif_init,
1416#endif
1417 .ldo_init = msm_hsusb_ldo_init,
1418 .ldo_enable = msm_hsusb_ldo_enable,
1419 .config_vddcx = msm_hsusb_config_vddcx,
1420 .init_vddcx = msm_hsusb_init_vddcx,
1421#ifdef CONFIG_BATTERY_MSM8X60
1422 .chg_vbus_draw = msm_charger_vbus_draw,
1423#endif
1424};
1425#endif
1426
Lena Salman57d167e2012-03-21 19:46:38 +02001427#ifdef CONFIG_USB_MSM_72K
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001428static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = {
1429 .is_phy_status_timer_on = 1,
1430};
1431#endif
1432
1433#ifdef CONFIG_USB_G_ANDROID
1434
1435#define PID_MAGIC_ID 0x71432909
1436#define SERIAL_NUM_MAGIC_ID 0x61945374
1437#define SERIAL_NUMBER_LENGTH 127
1438#define DLOAD_USB_BASE_ADD 0x2A05F0C8
1439
1440struct magic_num_struct {
1441 uint32_t pid;
1442 uint32_t serial_num;
1443};
1444
1445struct dload_struct {
1446 uint32_t reserved1;
1447 uint32_t reserved2;
1448 uint32_t reserved3;
1449 uint16_t reserved4;
1450 uint16_t pid;
1451 char serial_number[SERIAL_NUMBER_LENGTH];
1452 uint16_t reserved5;
1453 struct magic_num_struct
1454 magic_struct;
1455};
1456
1457static int usb_diag_update_pid_and_serial_num(uint32_t pid, const char *snum)
1458{
1459 struct dload_struct __iomem *dload = 0;
1460
1461 dload = ioremap(DLOAD_USB_BASE_ADD, sizeof(*dload));
1462 if (!dload) {
1463 pr_err("%s: cannot remap I/O memory region: %08x\n",
1464 __func__, DLOAD_USB_BASE_ADD);
1465 return -ENXIO;
1466 }
1467
1468 pr_debug("%s: dload:%p pid:%x serial_num:%s\n",
1469 __func__, dload, pid, snum);
1470 /* update pid */
1471 dload->magic_struct.pid = PID_MAGIC_ID;
1472 dload->pid = pid;
1473
1474 /* update serial number */
1475 dload->magic_struct.serial_num = 0;
1476 if (!snum)
1477 return 0;
1478
1479 dload->magic_struct.serial_num = SERIAL_NUM_MAGIC_ID;
1480 strncpy(dload->serial_number, snum, SERIAL_NUMBER_LENGTH);
1481 dload->serial_number[SERIAL_NUMBER_LENGTH - 1] = '\0';
1482
1483 iounmap(dload);
1484
1485 return 0;
1486}
1487
1488static struct android_usb_platform_data android_usb_pdata = {
1489 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
1490};
1491
1492static struct platform_device android_usb_device = {
1493 .name = "android_usb",
1494 .id = -1,
1495 .dev = {
1496 .platform_data = &android_usb_pdata,
1497 },
1498};
1499
1500
1501#endif
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08001502
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001503#ifdef CONFIG_MSM_VPE
Kevin Chan3be11612012-03-22 20:05:40 -07001504#ifndef CONFIG_MSM_CAMERA_V4L2
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001505static struct resource msm_vpe_resources[] = {
1506 {
1507 .start = 0x05300000,
1508 .end = 0x05300000 + SZ_1M - 1,
1509 .flags = IORESOURCE_MEM,
1510 },
1511 {
1512 .start = INT_VPE,
1513 .end = INT_VPE,
1514 .flags = IORESOURCE_IRQ,
1515 },
1516};
1517
1518static struct platform_device msm_vpe_device = {
1519 .name = "msm_vpe",
1520 .id = 0,
1521 .num_resources = ARRAY_SIZE(msm_vpe_resources),
1522 .resource = msm_vpe_resources,
1523};
1524#endif
Kevin Chan3be11612012-03-22 20:05:40 -07001525#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001526
1527#ifdef CONFIG_MSM_CAMERA
Kevin Chan3be11612012-03-22 20:05:40 -07001528#ifndef CONFIG_MSM_CAMERA_V4L2
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001529#ifdef CONFIG_MSM_CAMERA_FLASH
1530#define VFE_CAMIF_TIMER1_GPIO 29
1531#define VFE_CAMIF_TIMER2_GPIO 30
1532#define VFE_CAMIF_TIMER3_GPIO_INT 31
1533#define FUSION_VFE_CAMIF_TIMER1_GPIO 42
1534static struct msm_camera_sensor_flash_src msm_flash_src = {
1535 .flash_sr_type = MSM_CAMERA_FLASH_SRC_PMIC,
1536 ._fsrc.pmic_src.num_of_src = 2,
1537 ._fsrc.pmic_src.low_current = 100,
1538 ._fsrc.pmic_src.high_current = 300,
1539 ._fsrc.pmic_src.led_src_1 = PMIC8058_ID_FLASH_LED_0,
1540 ._fsrc.pmic_src.led_src_2 = PMIC8058_ID_FLASH_LED_1,
1541 ._fsrc.pmic_src.pmic_set_current = pm8058_set_flash_led_current,
1542};
1543#ifdef CONFIG_IMX074
1544static struct msm_camera_sensor_strobe_flash_data strobe_flash_xenon = {
1545 .flash_trigger = VFE_CAMIF_TIMER2_GPIO,
1546 .flash_charge = VFE_CAMIF_TIMER1_GPIO,
1547 .flash_charge_done = VFE_CAMIF_TIMER3_GPIO_INT,
1548 .flash_recharge_duration = 50000,
1549 .irq = MSM_GPIO_TO_INT(VFE_CAMIF_TIMER3_GPIO_INT),
1550};
1551#endif
1552#endif
1553
1554int msm_cam_gpio_tbl[] = {
1555 32,/*CAMIF_MCLK*/
1556 47,/*CAMIF_I2C_DATA*/
1557 48,/*CAMIF_I2C_CLK*/
1558 105,/*STANDBY*/
1559};
1560
1561enum msm_cam_stat{
1562 MSM_CAM_OFF,
1563 MSM_CAM_ON,
1564};
1565
1566static int config_gpio_table(enum msm_cam_stat stat)
1567{
1568 int rc = 0, i = 0;
1569 if (stat == MSM_CAM_ON) {
1570 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++) {
1571 rc = gpio_request(msm_cam_gpio_tbl[i], "CAM_GPIO");
1572 if (unlikely(rc < 0)) {
1573 pr_err("%s not able to get gpio\n", __func__);
1574 for (i--; i >= 0; i--)
1575 gpio_free(msm_cam_gpio_tbl[i]);
1576 break;
1577 }
1578 }
1579 } else {
1580 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++)
1581 gpio_free(msm_cam_gpio_tbl[i]);
1582 }
1583 return rc;
1584}
1585
1586static struct msm_camera_sensor_platform_info sensor_board_info = {
1587 .mount_angle = 0
1588};
1589
1590/*external regulator VREG_5V*/
1591static struct regulator *reg_flash_5V;
1592
1593static int config_camera_on_gpios_fluid(void)
1594{
1595 int rc = 0;
1596
1597 reg_flash_5V = regulator_get(NULL, "8901_mpp0");
1598 if (IS_ERR(reg_flash_5V)) {
1599 pr_err("'%s' regulator not found, rc=%ld\n",
1600 "8901_mpp0", IS_ERR(reg_flash_5V));
1601 return -ENODEV;
1602 }
1603
1604 rc = regulator_enable(reg_flash_5V);
1605 if (rc) {
1606 pr_err("'%s' regulator enable failed, rc=%d\n",
1607 "8901_mpp0", rc);
1608 regulator_put(reg_flash_5V);
1609 return rc;
1610 }
1611
1612#ifdef CONFIG_IMX074
1613 sensor_board_info.mount_angle = 90;
1614#endif
1615 rc = config_gpio_table(MSM_CAM_ON);
1616 if (rc < 0) {
1617 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1618 "failed\n", __func__);
1619 return rc;
1620 }
1621
1622 rc = gpio_request(GPIO_EXT_CAMIF_PWR_EN, "CAM_EN");
1623 if (rc < 0) {
1624 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1625 "failed\n", __func__, GPIO_EXT_CAMIF_PWR_EN);
1626 regulator_disable(reg_flash_5V);
1627 regulator_put(reg_flash_5V);
1628 return rc;
1629 }
1630 gpio_direction_output(GPIO_EXT_CAMIF_PWR_EN, 0);
1631 msleep(20);
1632 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 1);
1633
1634
1635 /*Enable LED_FLASH_EN*/
1636 rc = gpio_request(GPIO_LED_FLASH_EN, "LED_FLASH_EN");
1637 if (rc < 0) {
1638 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1639 "failed\n", __func__, GPIO_LED_FLASH_EN);
1640
1641 regulator_disable(reg_flash_5V);
1642 regulator_put(reg_flash_5V);
1643 config_gpio_table(MSM_CAM_OFF);
1644 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1645 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1646 return rc;
1647 }
1648 gpio_direction_output(GPIO_LED_FLASH_EN, 1);
1649 msleep(20);
1650 return rc;
1651}
1652
1653
1654static void config_camera_off_gpios_fluid(void)
1655{
1656 regulator_disable(reg_flash_5V);
1657 regulator_put(reg_flash_5V);
1658
1659 gpio_direction_output(GPIO_LED_FLASH_EN, 0);
1660 gpio_free(GPIO_LED_FLASH_EN);
1661
1662 config_gpio_table(MSM_CAM_OFF);
1663
1664 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1665 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1666}
1667static int config_camera_on_gpios(void)
1668{
1669 int rc = 0;
1670
1671 if (machine_is_msm8x60_fluid())
1672 return config_camera_on_gpios_fluid();
1673
1674 rc = config_gpio_table(MSM_CAM_ON);
1675 if (rc < 0) {
1676 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1677 "failed\n", __func__);
1678 return rc;
1679 }
1680
Jilai Wang971f97f2011-07-13 14:25:25 -04001681 if (!machine_is_msm8x60_dragon()) {
1682 rc = gpio_request(GPIO_EXT_CAMIF_PWR_EN, "CAM_EN");
1683 if (rc < 0) {
1684 config_gpio_table(MSM_CAM_OFF);
1685 pr_err("%s: CAMSENSOR gpio %d request"
1686 "failed\n", __func__, GPIO_EXT_CAMIF_PWR_EN);
1687 return rc;
1688 }
1689 gpio_direction_output(GPIO_EXT_CAMIF_PWR_EN, 0);
1690 msleep(20);
1691 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001692 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001693
1694#ifdef CONFIG_MSM_CAMERA_FLASH
1695#ifdef CONFIG_IMX074
1696 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
1697 strobe_flash_xenon.flash_charge = FUSION_VFE_CAMIF_TIMER1_GPIO;
1698#endif
1699#endif
1700 return rc;
1701}
1702
1703static void config_camera_off_gpios(void)
1704{
1705 if (machine_is_msm8x60_fluid())
1706 return config_camera_off_gpios_fluid();
1707
1708
1709 config_gpio_table(MSM_CAM_OFF);
1710
Jilai Wang971f97f2011-07-13 14:25:25 -04001711 if (!machine_is_msm8x60_dragon()) {
1712 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1713 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1714 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001715}
1716
1717#ifdef CONFIG_QS_S5K4E1
1718
1719#define QS_CAM_HC37_CAM_PD PM8058_GPIO_PM_TO_SYS(26)
1720
1721static int config_camera_on_gpios_qs_cam_fluid(void)
1722{
1723 int rc = 0;
1724
1725 /* request QS_CAM_HC37_CAM_PD as an output to HC37 ASIC pin CAM_PD */
1726 rc = gpio_request(QS_CAM_HC37_CAM_PD, "QS_CAM_HC37_CAM_PD");
1727 if (rc < 0) {
1728 printk(KERN_ERR "%s: QS_CAM_HC37_CAM_PD gpio %d request"
1729 " failed\n", __func__, QS_CAM_HC37_CAM_PD);
1730 return rc;
1731 }
1732 gpio_direction_output(QS_CAM_HC37_CAM_PD, 0);
1733 msleep(20);
1734 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 1);
1735 msleep(20);
1736
1737 /*
1738 * Set GPIO_AUX_CAM_2P7_EN to 1 on North Expander IO2
1739 * to enable 2.7V power to Camera
1740 */
1741 rc = gpio_request(GPIO_AUX_CAM_2P7_EN, "CAM_2P7_EN");
1742 if (rc < 0) {
1743 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1744 " failed\n", __func__, GPIO_AUX_CAM_2P7_EN);
1745 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1746 gpio_free(QS_CAM_HC37_CAM_PD);
1747 return rc;
1748 }
1749 gpio_direction_output(GPIO_AUX_CAM_2P7_EN, 0);
1750 msleep(20);
1751 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 1);
1752 msleep(20);
1753
1754 rc = config_camera_on_gpios_fluid();
1755 if (rc < 0) {
1756 printk(KERN_ERR "%s: config_camera_on_gpios_fluid"
1757 " failed\n", __func__);
1758 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1759 gpio_free(QS_CAM_HC37_CAM_PD);
1760 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 0);
1761 gpio_free(GPIO_AUX_CAM_2P7_EN);
1762 return rc;
1763 }
1764 return rc;
1765}
1766
1767static void config_camera_off_gpios_qs_cam_fluid(void)
1768{
1769 /*
1770 * Set GPIO_AUX_CAM_2P7_EN to 0 on North Expander IO2
1771 * to disable 2.7V power to Camera
1772 */
1773 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 0);
1774 gpio_free(GPIO_AUX_CAM_2P7_EN);
1775
1776 /* set QS_CAM_HC37_CAM_PD to 0 to power off HC37 ASIC*/
1777 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1778 gpio_free(QS_CAM_HC37_CAM_PD);
1779
1780 config_camera_off_gpios_fluid();
1781 return;
1782}
1783
1784static int config_camera_on_gpios_qs_cam(void)
1785{
1786 int rc = 0;
1787
1788 if (machine_is_msm8x60_fluid())
1789 return config_camera_on_gpios_qs_cam_fluid();
1790
1791 rc = config_camera_on_gpios();
1792 return rc;
1793}
1794
1795static void config_camera_off_gpios_qs_cam(void)
1796{
1797 if (machine_is_msm8x60_fluid())
1798 return config_camera_off_gpios_qs_cam_fluid();
1799
1800 config_camera_off_gpios();
1801 return;
1802}
1803#endif
1804
1805static int config_camera_on_gpios_web_cam(void)
1806{
1807 int rc = 0;
1808 rc = config_gpio_table(MSM_CAM_ON);
1809 if (rc < 0) {
1810 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1811 "failed\n", __func__);
1812 return rc;
1813 }
1814
Jilai Wang53d27a82011-07-13 14:32:58 -04001815 if (!(machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon())) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001816 rc = gpio_request(GPIO_WEB_CAMIF_STANDBY, "CAM_EN");
1817 if (rc < 0) {
1818 config_gpio_table(MSM_CAM_OFF);
1819 pr_err(KERN_ERR "%s: CAMSENSOR gpio %d request"
1820 "failed\n", __func__, GPIO_WEB_CAMIF_STANDBY);
1821 return rc;
1822 }
1823 gpio_direction_output(GPIO_WEB_CAMIF_STANDBY, 0);
1824 }
1825 return rc;
1826}
1827
1828static void config_camera_off_gpios_web_cam(void)
1829{
1830 config_gpio_table(MSM_CAM_OFF);
Jilai Wang53d27a82011-07-13 14:32:58 -04001831 if (!(machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon())) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001832 gpio_set_value_cansleep(GPIO_WEB_CAMIF_STANDBY, 1);
1833 gpio_free(GPIO_WEB_CAMIF_STANDBY);
1834 }
1835 return;
1836}
1837
1838#ifdef CONFIG_MSM_BUS_SCALING
1839static struct msm_bus_vectors cam_init_vectors[] = {
1840 {
1841 .src = MSM_BUS_MASTER_VFE,
1842 .dst = MSM_BUS_SLAVE_SMI,
1843 .ab = 0,
1844 .ib = 0,
1845 },
1846 {
1847 .src = MSM_BUS_MASTER_VFE,
1848 .dst = MSM_BUS_SLAVE_EBI_CH0,
1849 .ab = 0,
1850 .ib = 0,
1851 },
1852 {
1853 .src = MSM_BUS_MASTER_VPE,
1854 .dst = MSM_BUS_SLAVE_SMI,
1855 .ab = 0,
1856 .ib = 0,
1857 },
1858 {
1859 .src = MSM_BUS_MASTER_VPE,
1860 .dst = MSM_BUS_SLAVE_EBI_CH0,
1861 .ab = 0,
1862 .ib = 0,
1863 },
1864 {
1865 .src = MSM_BUS_MASTER_JPEG_ENC,
1866 .dst = MSM_BUS_SLAVE_SMI,
1867 .ab = 0,
1868 .ib = 0,
1869 },
1870 {
1871 .src = MSM_BUS_MASTER_JPEG_ENC,
1872 .dst = MSM_BUS_SLAVE_EBI_CH0,
1873 .ab = 0,
1874 .ib = 0,
1875 },
1876};
1877
1878static struct msm_bus_vectors cam_preview_vectors[] = {
1879 {
1880 .src = MSM_BUS_MASTER_VFE,
1881 .dst = MSM_BUS_SLAVE_SMI,
1882 .ab = 0,
1883 .ib = 0,
1884 },
1885 {
1886 .src = MSM_BUS_MASTER_VFE,
1887 .dst = MSM_BUS_SLAVE_EBI_CH0,
1888 .ab = 283115520,
1889 .ib = 452984832,
1890 },
1891 {
1892 .src = MSM_BUS_MASTER_VPE,
1893 .dst = MSM_BUS_SLAVE_SMI,
1894 .ab = 0,
1895 .ib = 0,
1896 },
1897 {
1898 .src = MSM_BUS_MASTER_VPE,
1899 .dst = MSM_BUS_SLAVE_EBI_CH0,
1900 .ab = 0,
1901 .ib = 0,
1902 },
1903 {
1904 .src = MSM_BUS_MASTER_JPEG_ENC,
1905 .dst = MSM_BUS_SLAVE_SMI,
1906 .ab = 0,
1907 .ib = 0,
1908 },
1909 {
1910 .src = MSM_BUS_MASTER_JPEG_ENC,
1911 .dst = MSM_BUS_SLAVE_EBI_CH0,
1912 .ab = 0,
1913 .ib = 0,
1914 },
1915};
1916
1917static struct msm_bus_vectors cam_video_vectors[] = {
1918 {
1919 .src = MSM_BUS_MASTER_VFE,
1920 .dst = MSM_BUS_SLAVE_SMI,
1921 .ab = 283115520,
1922 .ib = 452984832,
1923 },
1924 {
1925 .src = MSM_BUS_MASTER_VFE,
1926 .dst = MSM_BUS_SLAVE_EBI_CH0,
1927 .ab = 283115520,
1928 .ib = 452984832,
1929 },
1930 {
1931 .src = MSM_BUS_MASTER_VPE,
1932 .dst = MSM_BUS_SLAVE_SMI,
1933 .ab = 319610880,
1934 .ib = 511377408,
1935 },
1936 {
1937 .src = MSM_BUS_MASTER_VPE,
1938 .dst = MSM_BUS_SLAVE_EBI_CH0,
1939 .ab = 0,
1940 .ib = 0,
1941 },
1942 {
1943 .src = MSM_BUS_MASTER_JPEG_ENC,
1944 .dst = MSM_BUS_SLAVE_SMI,
1945 .ab = 0,
1946 .ib = 0,
1947 },
1948 {
1949 .src = MSM_BUS_MASTER_JPEG_ENC,
1950 .dst = MSM_BUS_SLAVE_EBI_CH0,
1951 .ab = 0,
1952 .ib = 0,
1953 },
1954};
1955
1956static struct msm_bus_vectors cam_snapshot_vectors[] = {
1957 {
1958 .src = MSM_BUS_MASTER_VFE,
1959 .dst = MSM_BUS_SLAVE_SMI,
1960 .ab = 566231040,
1961 .ib = 905969664,
1962 },
1963 {
1964 .src = MSM_BUS_MASTER_VFE,
1965 .dst = MSM_BUS_SLAVE_EBI_CH0,
1966 .ab = 69984000,
1967 .ib = 111974400,
1968 },
1969 {
1970 .src = MSM_BUS_MASTER_VPE,
1971 .dst = MSM_BUS_SLAVE_SMI,
1972 .ab = 0,
1973 .ib = 0,
1974 },
1975 {
1976 .src = MSM_BUS_MASTER_VPE,
1977 .dst = MSM_BUS_SLAVE_EBI_CH0,
1978 .ab = 0,
1979 .ib = 0,
1980 },
1981 {
1982 .src = MSM_BUS_MASTER_JPEG_ENC,
1983 .dst = MSM_BUS_SLAVE_SMI,
1984 .ab = 320864256,
1985 .ib = 513382810,
1986 },
1987 {
1988 .src = MSM_BUS_MASTER_JPEG_ENC,
1989 .dst = MSM_BUS_SLAVE_EBI_CH0,
1990 .ab = 320864256,
1991 .ib = 513382810,
1992 },
1993};
1994
1995static struct msm_bus_vectors cam_zsl_vectors[] = {
1996 {
1997 .src = MSM_BUS_MASTER_VFE,
1998 .dst = MSM_BUS_SLAVE_SMI,
1999 .ab = 566231040,
2000 .ib = 905969664,
2001 },
2002 {
2003 .src = MSM_BUS_MASTER_VFE,
2004 .dst = MSM_BUS_SLAVE_EBI_CH0,
2005 .ab = 706199040,
2006 .ib = 1129918464,
2007 },
2008 {
2009 .src = MSM_BUS_MASTER_VPE,
2010 .dst = MSM_BUS_SLAVE_SMI,
2011 .ab = 0,
2012 .ib = 0,
2013 },
2014 {
2015 .src = MSM_BUS_MASTER_VPE,
2016 .dst = MSM_BUS_SLAVE_EBI_CH0,
2017 .ab = 0,
2018 .ib = 0,
2019 },
2020 {
2021 .src = MSM_BUS_MASTER_JPEG_ENC,
2022 .dst = MSM_BUS_SLAVE_SMI,
2023 .ab = 320864256,
2024 .ib = 513382810,
2025 },
2026 {
2027 .src = MSM_BUS_MASTER_JPEG_ENC,
2028 .dst = MSM_BUS_SLAVE_EBI_CH0,
2029 .ab = 320864256,
2030 .ib = 513382810,
2031 },
2032};
2033
2034static struct msm_bus_vectors cam_stereo_video_vectors[] = {
2035 {
2036 .src = MSM_BUS_MASTER_VFE,
2037 .dst = MSM_BUS_SLAVE_SMI,
2038 .ab = 212336640,
2039 .ib = 339738624,
2040 },
2041 {
2042 .src = MSM_BUS_MASTER_VFE,
2043 .dst = MSM_BUS_SLAVE_EBI_CH0,
2044 .ab = 25090560,
2045 .ib = 40144896,
2046 },
2047 {
2048 .src = MSM_BUS_MASTER_VPE,
2049 .dst = MSM_BUS_SLAVE_SMI,
2050 .ab = 239708160,
2051 .ib = 383533056,
2052 },
2053 {
2054 .src = MSM_BUS_MASTER_VPE,
2055 .dst = MSM_BUS_SLAVE_EBI_CH0,
2056 .ab = 79902720,
2057 .ib = 127844352,
2058 },
2059 {
2060 .src = MSM_BUS_MASTER_JPEG_ENC,
2061 .dst = MSM_BUS_SLAVE_SMI,
2062 .ab = 0,
2063 .ib = 0,
2064 },
2065 {
2066 .src = MSM_BUS_MASTER_JPEG_ENC,
2067 .dst = MSM_BUS_SLAVE_EBI_CH0,
2068 .ab = 0,
2069 .ib = 0,
2070 },
2071};
2072
2073static struct msm_bus_vectors cam_stereo_snapshot_vectors[] = {
2074 {
2075 .src = MSM_BUS_MASTER_VFE,
2076 .dst = MSM_BUS_SLAVE_SMI,
2077 .ab = 0,
2078 .ib = 0,
2079 },
2080 {
2081 .src = MSM_BUS_MASTER_VFE,
2082 .dst = MSM_BUS_SLAVE_EBI_CH0,
2083 .ab = 300902400,
2084 .ib = 481443840,
2085 },
2086 {
2087 .src = MSM_BUS_MASTER_VPE,
2088 .dst = MSM_BUS_SLAVE_SMI,
2089 .ab = 230307840,
2090 .ib = 368492544,
2091 },
2092 {
2093 .src = MSM_BUS_MASTER_VPE,
2094 .dst = MSM_BUS_SLAVE_EBI_CH0,
2095 .ab = 245113344,
2096 .ib = 392181351,
2097 },
2098 {
2099 .src = MSM_BUS_MASTER_JPEG_ENC,
2100 .dst = MSM_BUS_SLAVE_SMI,
2101 .ab = 106536960,
2102 .ib = 170459136,
2103 },
2104 {
2105 .src = MSM_BUS_MASTER_JPEG_ENC,
2106 .dst = MSM_BUS_SLAVE_EBI_CH0,
2107 .ab = 106536960,
2108 .ib = 170459136,
2109 },
2110};
2111
2112static struct msm_bus_paths cam_bus_client_config[] = {
2113 {
2114 ARRAY_SIZE(cam_init_vectors),
2115 cam_init_vectors,
2116 },
2117 {
2118 ARRAY_SIZE(cam_preview_vectors),
2119 cam_preview_vectors,
2120 },
2121 {
2122 ARRAY_SIZE(cam_video_vectors),
2123 cam_video_vectors,
2124 },
2125 {
2126 ARRAY_SIZE(cam_snapshot_vectors),
2127 cam_snapshot_vectors,
2128 },
2129 {
2130 ARRAY_SIZE(cam_zsl_vectors),
2131 cam_zsl_vectors,
2132 },
2133 {
2134 ARRAY_SIZE(cam_stereo_video_vectors),
2135 cam_stereo_video_vectors,
2136 },
2137 {
2138 ARRAY_SIZE(cam_stereo_snapshot_vectors),
2139 cam_stereo_snapshot_vectors,
2140 },
2141};
2142
2143static struct msm_bus_scale_pdata cam_bus_client_pdata = {
2144 cam_bus_client_config,
2145 ARRAY_SIZE(cam_bus_client_config),
2146 .name = "msm_camera",
2147};
2148#endif
2149
2150struct msm_camera_device_platform_data msm_camera_device_data = {
2151 .camera_gpio_on = config_camera_on_gpios,
2152 .camera_gpio_off = config_camera_off_gpios,
2153 .ioext.csiphy = 0x04800000,
2154 .ioext.csisz = 0x00000400,
2155 .ioext.csiirq = CSI_0_IRQ,
2156 .ioclk.mclk_clk_rate = 24000000,
2157 .ioclk.vfe_clk_rate = 228570000,
2158#ifdef CONFIG_MSM_BUS_SCALING
2159 .cam_bus_scale_table = &cam_bus_client_pdata,
2160#endif
2161};
2162
2163#ifdef CONFIG_QS_S5K4E1
2164struct msm_camera_device_platform_data msm_camera_device_data_qs_cam = {
2165 .camera_gpio_on = config_camera_on_gpios_qs_cam,
2166 .camera_gpio_off = config_camera_off_gpios_qs_cam,
2167 .ioext.csiphy = 0x04800000,
2168 .ioext.csisz = 0x00000400,
2169 .ioext.csiirq = CSI_0_IRQ,
2170 .ioclk.mclk_clk_rate = 24000000,
2171 .ioclk.vfe_clk_rate = 228570000,
2172#ifdef CONFIG_MSM_BUS_SCALING
2173 .cam_bus_scale_table = &cam_bus_client_pdata,
2174#endif
2175};
2176#endif
2177
2178struct msm_camera_device_platform_data msm_camera_device_data_web_cam = {
2179 .camera_gpio_on = config_camera_on_gpios_web_cam,
2180 .camera_gpio_off = config_camera_off_gpios_web_cam,
2181 .ioext.csiphy = 0x04900000,
2182 .ioext.csisz = 0x00000400,
2183 .ioext.csiirq = CSI_1_IRQ,
2184 .ioclk.mclk_clk_rate = 24000000,
2185 .ioclk.vfe_clk_rate = 228570000,
2186#ifdef CONFIG_MSM_BUS_SCALING
2187 .cam_bus_scale_table = &cam_bus_client_pdata,
2188#endif
2189};
2190
2191struct resource msm_camera_resources[] = {
2192 {
2193 .start = 0x04500000,
2194 .end = 0x04500000 + SZ_1M - 1,
2195 .flags = IORESOURCE_MEM,
2196 },
2197 {
2198 .start = VFE_IRQ,
2199 .end = VFE_IRQ,
2200 .flags = IORESOURCE_IRQ,
2201 },
2202};
2203#ifdef CONFIG_MT9E013
2204static struct msm_camera_sensor_platform_info mt9e013_sensor_8660_info = {
2205 .mount_angle = 0
2206};
2207
2208static struct msm_camera_sensor_flash_data flash_mt9e013 = {
2209 .flash_type = MSM_CAMERA_FLASH_LED,
2210 .flash_src = &msm_flash_src
2211};
2212
2213static struct msm_camera_sensor_info msm_camera_sensor_mt9e013_data = {
2214 .sensor_name = "mt9e013",
2215 .sensor_reset = 106,
2216 .sensor_pwd = 85,
2217 .vcm_pwd = 1,
2218 .vcm_enable = 0,
2219 .pdata = &msm_camera_device_data,
2220 .resource = msm_camera_resources,
2221 .num_resources = ARRAY_SIZE(msm_camera_resources),
2222 .flash_data = &flash_mt9e013,
2223 .strobe_flash_data = &strobe_flash_xenon,
2224 .sensor_platform_info = &mt9e013_sensor_8660_info,
2225 .csi_if = 1
2226};
2227struct platform_device msm_camera_sensor_mt9e013 = {
2228 .name = "msm_camera_mt9e013",
2229 .dev = {
2230 .platform_data = &msm_camera_sensor_mt9e013_data,
2231 },
2232};
2233#endif
2234
2235#ifdef CONFIG_IMX074
Roja Rani Yarubandi68ebb4d2011-10-20 10:33:16 +05302236static struct msm_camera_sensor_platform_info imx074_sensor_board_info = {
2237 .mount_angle = 180
2238};
2239
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002240static struct msm_camera_sensor_flash_data flash_imx074 = {
2241 .flash_type = MSM_CAMERA_FLASH_LED,
2242 .flash_src = &msm_flash_src
2243};
2244
2245static struct msm_camera_sensor_info msm_camera_sensor_imx074_data = {
2246 .sensor_name = "imx074",
2247 .sensor_reset = 106,
2248 .sensor_pwd = 85,
2249 .vcm_pwd = GPIO_AUX_CAM_2P7_EN,
2250 .vcm_enable = 1,
2251 .pdata = &msm_camera_device_data,
2252 .resource = msm_camera_resources,
2253 .num_resources = ARRAY_SIZE(msm_camera_resources),
2254 .flash_data = &flash_imx074,
2255 .strobe_flash_data = &strobe_flash_xenon,
Roja Rani Yarubandi68ebb4d2011-10-20 10:33:16 +05302256 .sensor_platform_info = &imx074_sensor_board_info,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002257 .csi_if = 1
2258};
2259struct platform_device msm_camera_sensor_imx074 = {
2260 .name = "msm_camera_imx074",
2261 .dev = {
2262 .platform_data = &msm_camera_sensor_imx074_data,
2263 },
2264};
2265#endif
2266#ifdef CONFIG_WEBCAM_OV9726
2267
2268static struct msm_camera_sensor_platform_info ov9726_sensor_8660_info = {
2269 .mount_angle = 0
2270};
2271
2272static struct msm_camera_sensor_flash_data flash_ov9726 = {
2273 .flash_type = MSM_CAMERA_FLASH_LED,
2274 .flash_src = &msm_flash_src
2275};
2276static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data = {
2277 .sensor_name = "ov9726",
Kevin Chan3382c512011-07-19 21:00:45 -07002278 .sensor_reset_enable = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002279 .sensor_reset = GPIO_FRONT_CAM_RESET_N,
2280 .sensor_pwd = 85,
2281 .vcm_pwd = 1,
2282 .vcm_enable = 0,
2283 .pdata = &msm_camera_device_data_web_cam,
2284 .resource = msm_camera_resources,
2285 .num_resources = ARRAY_SIZE(msm_camera_resources),
2286 .flash_data = &flash_ov9726,
2287 .sensor_platform_info = &ov9726_sensor_8660_info,
2288 .csi_if = 1
2289};
2290struct platform_device msm_camera_sensor_webcam_ov9726 = {
2291 .name = "msm_camera_ov9726",
2292 .dev = {
2293 .platform_data = &msm_camera_sensor_ov9726_data,
2294 },
2295};
2296#endif
2297#ifdef CONFIG_WEBCAM_OV7692
2298static struct msm_camera_sensor_flash_data flash_ov7692 = {
2299 .flash_type = MSM_CAMERA_FLASH_LED,
2300 .flash_src = &msm_flash_src
2301};
2302static struct msm_camera_sensor_info msm_camera_sensor_ov7692_data = {
2303 .sensor_name = "ov7692",
2304 .sensor_reset = GPIO_WEB_CAMIF_RESET_N,
2305 .sensor_pwd = 85,
2306 .vcm_pwd = 1,
2307 .vcm_enable = 0,
2308 .pdata = &msm_camera_device_data_web_cam,
2309 .resource = msm_camera_resources,
2310 .num_resources = ARRAY_SIZE(msm_camera_resources),
2311 .flash_data = &flash_ov7692,
2312 .csi_if = 1
2313};
2314
2315static struct platform_device msm_camera_sensor_webcam_ov7692 = {
2316 .name = "msm_camera_ov7692",
2317 .dev = {
2318 .platform_data = &msm_camera_sensor_ov7692_data,
2319 },
2320};
2321#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04002322#ifdef CONFIG_VX6953
2323static struct msm_camera_sensor_platform_info vx6953_sensor_8660_info = {
2324 .mount_angle = 270
2325};
2326
2327static struct msm_camera_sensor_flash_data flash_vx6953 = {
2328 .flash_type = MSM_CAMERA_FLASH_NONE,
2329 .flash_src = &msm_flash_src
2330};
2331
2332static struct msm_camera_sensor_info msm_camera_sensor_vx6953_data = {
2333 .sensor_name = "vx6953",
2334 .sensor_reset = 63,
2335 .sensor_pwd = 63,
2336 .vcm_pwd = GPIO_AUX_CAM_2P7_EN,
2337 .vcm_enable = 1,
2338 .pdata = &msm_camera_device_data,
2339 .resource = msm_camera_resources,
2340 .num_resources = ARRAY_SIZE(msm_camera_resources),
2341 .flash_data = &flash_vx6953,
2342 .sensor_platform_info = &vx6953_sensor_8660_info,
2343 .csi_if = 1
2344};
2345struct platform_device msm_camera_sensor_vx6953 = {
2346 .name = "msm_camera_vx6953",
2347 .dev = {
2348 .platform_data = &msm_camera_sensor_vx6953_data,
2349 },
2350};
2351#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002352#ifdef CONFIG_QS_S5K4E1
2353
Nishant Pandit613ab7a2011-09-02 03:36:01 +05302354static struct msm_camera_sensor_platform_info qs_s5k4e1_sensor_8660_info = {
2355#ifdef CONFIG_FB_MSM_MIPI_NOVATEK_CMD_QHD_PT
2356 .mount_angle = 90
2357#else
2358 .mount_angle = 0
2359#endif
2360};
2361
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002362static char eeprom_data[864];
2363static struct msm_camera_sensor_flash_data flash_qs_s5k4e1 = {
2364 .flash_type = MSM_CAMERA_FLASH_LED,
2365 .flash_src = &msm_flash_src
2366};
2367
2368static struct msm_camera_sensor_info msm_camera_sensor_qs_s5k4e1_data = {
2369 .sensor_name = "qs_s5k4e1",
2370 .sensor_reset = 106,
2371 .sensor_pwd = 85,
2372 .vcm_pwd = 1,
2373 .vcm_enable = 0,
2374 .pdata = &msm_camera_device_data_qs_cam,
2375 .resource = msm_camera_resources,
2376 .num_resources = ARRAY_SIZE(msm_camera_resources),
2377 .flash_data = &flash_qs_s5k4e1,
2378 .strobe_flash_data = &strobe_flash_xenon,
Nishant Pandit613ab7a2011-09-02 03:36:01 +05302379 .sensor_platform_info = &qs_s5k4e1_sensor_8660_info,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002380 .csi_if = 1,
2381 .eeprom_data = eeprom_data,
2382};
2383struct platform_device msm_camera_sensor_qs_s5k4e1 = {
2384 .name = "msm_camera_qs_s5k4e1",
2385 .dev = {
2386 .platform_data = &msm_camera_sensor_qs_s5k4e1_data,
2387 },
2388};
2389#endif
2390static struct i2c_board_info msm_camera_boardinfo[] __initdata = {
2391 #ifdef CONFIG_MT9E013
2392 {
2393 I2C_BOARD_INFO("mt9e013", 0x6C >> 2),
2394 },
2395 #endif
2396 #ifdef CONFIG_IMX074
2397 {
2398 I2C_BOARD_INFO("imx074", 0x1A),
2399 },
2400 #endif
2401 #ifdef CONFIG_WEBCAM_OV7692
2402 {
2403 I2C_BOARD_INFO("ov7692", 0x78),
2404 },
2405 #endif
2406 #ifdef CONFIG_WEBCAM_OV9726
2407 {
2408 I2C_BOARD_INFO("ov9726", 0x10),
2409 },
2410 #endif
2411 #ifdef CONFIG_QS_S5K4E1
2412 {
2413 I2C_BOARD_INFO("qs_s5k4e1", 0x20),
2414 },
2415 #endif
2416};
Jilai Wang971f97f2011-07-13 14:25:25 -04002417
2418static struct i2c_board_info msm_camera_dragon_boardinfo[] __initdata = {
Jilai Wang53d27a82011-07-13 14:32:58 -04002419 #ifdef CONFIG_WEBCAM_OV9726
2420 {
2421 I2C_BOARD_INFO("ov9726", 0x10),
2422 },
2423 #endif
Jilai Wang971f97f2011-07-13 14:25:25 -04002424 #ifdef CONFIG_VX6953
2425 {
2426 I2C_BOARD_INFO("vx6953", 0x20),
2427 },
2428 #endif
2429};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002430#endif
Kevin Chan3be11612012-03-22 20:05:40 -07002431#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002432
2433#ifdef CONFIG_MSM_GEMINI
2434static struct resource msm_gemini_resources[] = {
2435 {
2436 .start = 0x04600000,
2437 .end = 0x04600000 + SZ_1M - 1,
2438 .flags = IORESOURCE_MEM,
2439 },
2440 {
2441 .start = INT_JPEG,
2442 .end = INT_JPEG,
2443 .flags = IORESOURCE_IRQ,
2444 },
2445};
2446
2447static struct platform_device msm_gemini_device = {
2448 .name = "msm_gemini",
2449 .resource = msm_gemini_resources,
2450 .num_resources = ARRAY_SIZE(msm_gemini_resources),
2451};
2452#endif
2453
2454#ifdef CONFIG_I2C_QUP
2455static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
2456{
2457}
2458
2459static struct msm_i2c_platform_data msm_gsbi3_qup_i2c_pdata = {
2460 .clk_freq = 384000,
2461 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002462 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2463};
2464
2465static struct msm_i2c_platform_data msm_gsbi4_qup_i2c_pdata = {
2466 .clk_freq = 100000,
2467 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002468 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2469};
2470
2471static struct msm_i2c_platform_data msm_gsbi7_qup_i2c_pdata = {
2472 .clk_freq = 100000,
2473 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002474 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2475};
2476
2477static struct msm_i2c_platform_data msm_gsbi8_qup_i2c_pdata = {
2478 .clk_freq = 100000,
2479 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002480 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2481};
2482
2483static struct msm_i2c_platform_data msm_gsbi9_qup_i2c_pdata = {
2484 .clk_freq = 100000,
2485 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002486 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2487};
2488
2489static struct msm_i2c_platform_data msm_gsbi12_qup_i2c_pdata = {
2490 .clk_freq = 100000,
2491 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002492 .use_gsbi_shared_mode = 1,
2493 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2494};
2495#endif
2496
2497#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
2498static struct msm_spi_platform_data msm_gsbi1_qup_spi_pdata = {
2499 .max_clock_speed = 24000000,
2500};
2501
2502static struct msm_spi_platform_data msm_gsbi10_qup_spi_pdata = {
2503 .max_clock_speed = 24000000,
2504};
2505#endif
2506
2507#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002508/* CODEC/TSSC SSBI */
2509static struct msm_i2c_ssbi_platform_data msm_ssbi3_pdata = {
2510 .controller_type = MSM_SBI_CTRL_SSBI,
2511};
2512#endif
2513
2514#ifdef CONFIG_BATTERY_MSM
2515/* Use basic value for fake MSM battery */
2516static struct msm_psy_batt_pdata msm_psy_batt_data = {
2517 .avail_chg_sources = AC_CHG,
2518};
2519
2520static struct platform_device msm_batt_device = {
2521 .name = "msm-battery",
2522 .id = -1,
2523 .dev.platform_data = &msm_psy_batt_data,
2524};
2525#endif
2526
2527#ifdef CONFIG_FB_MSM_LCDC_DSUB
2528/* VGA = 1440 x 900 x 4(bpp) x 2(pages)
2529 prim = 1024 x 600 x 4(bpp) x 2(pages)
2530 This is the difference. */
2531#define MSM_FB_DSUB_PMEM_ADDER (0xA32000-0x4B0000)
2532#else
2533#define MSM_FB_DSUB_PMEM_ADDER (0)
2534#endif
2535
2536/* Sensors DSPS platform data */
2537#ifdef CONFIG_MSM_DSPS
2538
2539static struct dsps_gpio_info dsps_surf_gpios[] = {
2540 {
2541 .name = "compass_rst_n",
2542 .num = GPIO_COMPASS_RST_N,
2543 .on_val = 1, /* device not in reset */
2544 .off_val = 0, /* device in reset */
2545 },
2546 {
2547 .name = "gpio_r_altimeter_reset_n",
2548 .num = GPIO_R_ALTIMETER_RESET_N,
2549 .on_val = 1, /* device not in reset */
2550 .off_val = 0, /* device in reset */
2551 }
2552};
2553
2554static struct dsps_gpio_info dsps_fluid_gpios[] = {
2555 {
2556 .name = "gpio_n_altimeter_reset_n",
2557 .num = GPIO_N_ALTIMETER_RESET_N,
2558 .on_val = 1, /* device not in reset */
2559 .off_val = 0, /* device in reset */
2560 }
2561};
2562
2563static void __init msm8x60_init_dsps(void)
2564{
2565 struct msm_dsps_platform_data *pdata =
2566 msm_dsps_device.dev.platform_data;
2567 /*
2568 * On Fluid the Compass sensor Chip-Select (CS) is directly connected
2569 * to the power supply and not controled via GPIOs. Fluid uses a
2570 * different IO-Expender (north) than used on surf/ffa.
2571 */
2572 if (machine_is_msm8x60_fluid()) {
2573 /* fluid has different firmware, gpios */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002574 pdata->pil_name = DSPS_PIL_FLUID_NAME;
Stephen Boyd25c4a0b2011-09-20 00:12:36 -07002575 msm_pil_dsps.dev.platform_data = DSPS_PIL_FLUID_NAME;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002576 pdata->gpios = dsps_fluid_gpios;
2577 pdata->gpios_num = ARRAY_SIZE(dsps_fluid_gpios);
2578 } else {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002579 pdata->pil_name = DSPS_PIL_GENERIC_NAME;
Stephen Boyd25c4a0b2011-09-20 00:12:36 -07002580 msm_pil_dsps.dev.platform_data = DSPS_PIL_GENERIC_NAME;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002581 pdata->gpios = dsps_surf_gpios;
2582 pdata->gpios_num = ARRAY_SIZE(dsps_surf_gpios);
2583 }
2584
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002585 platform_device_register(&msm_dsps_device);
2586}
2587#endif /* CONFIG_MSM_DSPS */
2588
2589#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
Padmanabhan Komanduruede0a632012-01-25 12:01:28 +05302590#define MSM_FB_PRIM_BUF_SIZE \
2591 (roundup((1024 * 600 * 4), 4096) * 3) /* 4 bpp x 3 pages */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002592#else
Padmanabhan Komanduruede0a632012-01-25 12:01:28 +05302593#define MSM_FB_PRIM_BUF_SIZE \
2594 (roundup((1024 * 600 * 4), 4096) * 2) /* 4 bpp x 2 pages */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002595#endif
2596
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002597#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
Padmanabhan Komanduruede0a632012-01-25 12:01:28 +05302598#define MSM_FB_EXT_BUF_SIZE \
2599 (roundup((1920 * 1080 * 2), 4096) * 1) /* 2 bpp x 1 page */
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002600#elif defined(CONFIG_FB_MSM_TVOUT)
Padmanabhan Komanduruede0a632012-01-25 12:01:28 +05302601#define MSM_FB_EXT_BUF_SIZE \
2602 (roundup((720 * 576 * 2), 4096) * 2) /* 2 bpp x 2 pages */
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002603#else
2604#define MSM_FB_EXT_BUFT_SIZE 0
2605#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002606
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002607/* Note: must be multiple of 4096 */
2608#define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE + \
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002609 MSM_FB_DSUB_PMEM_ADDER, 4096)
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08002610
2611#define MSM_PMEM_SF_SIZE 0x4000000 /* 64 Mbytes */
Sravan Kumar D.V.Nb4d77dd2012-03-16 12:25:37 +05302612#define MSM_HDMI_PRIM_PMEM_SF_SIZE 0x8000000 /* 128 Mbytes */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002613
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002614#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08002615unsigned char hdmi_is_primary = 1;
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002616#else
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08002617unsigned char hdmi_is_primary;
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002618#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002619
Huaibin Yanga5419422011-12-08 23:52:10 -08002620#ifdef CONFIG_FB_MSM_OVERLAY0_WRITEBACK
2621#define MSM_FB_OVERLAY0_WRITEBACK_SIZE roundup((1376 * 768 * 3 * 2), 4096)
2622#else
2623#define MSM_FB_OVERLAY0_WRITEBACK_SIZE (0)
2624#endif /* CONFIG_FB_MSM_OVERLAY0_WRITEBACK */
2625
2626#ifdef CONFIG_FB_MSM_OVERLAY1_WRITEBACK
2627#define MSM_FB_OVERLAY1_WRITEBACK_SIZE roundup((1920 * 1088 * 3 * 2), 4096)
2628#else
2629#define MSM_FB_OVERLAY1_WRITEBACK_SIZE (0)
2630#endif /* CONFIG_FB_MSM_OVERLAY1_WRITEBACK */
2631
Chaithanya Krishna Bacharaju1844c7c2012-03-19 11:25:43 +05302632#define MSM_PMEM_KERNEL_EBI1_SIZE 0x3BC000
Ankit Premrajkaaee8f562012-04-09 03:57:53 -07002633#define MSM_PMEM_ADSP_SIZE 0x4200000
Chaithanya Krishna Bacharaju1844c7c2012-03-19 11:25:43 +05302634#define MSM_PMEM_AUDIO_SIZE 0x4CF000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002635
2636#define MSM_SMI_BASE 0x38000000
2637#define MSM_SMI_SIZE 0x4000000
2638
2639#define KERNEL_SMI_BASE (MSM_SMI_BASE)
Maheshwar Ajjac60c0462011-11-29 17:46:57 -08002640#define KERNEL_SMI_SIZE 0x600000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002641
2642#define USER_SMI_BASE (KERNEL_SMI_BASE + KERNEL_SMI_SIZE)
2643#define USER_SMI_SIZE (MSM_SMI_SIZE - KERNEL_SMI_SIZE)
2644#define MSM_PMEM_SMIPOOL_SIZE USER_SMI_SIZE
2645
Naseer Ahmed51860b02012-02-07 18:53:29 +05302646#define MSM_ION_SF_SIZE 0x4000000 /* 64MB */
Olav Hauganb5be7992011-11-18 14:29:02 -08002647#define MSM_ION_CAMERA_SIZE MSM_PMEM_ADSP_SIZE
Olav Haugan42ebe712012-01-10 16:30:58 -08002648#define MSM_ION_MM_FW_SIZE 0x200000 /* (2MB) */
2649#define MSM_ION_MM_SIZE 0x3600000 /* (54MB) */
Olav Hauganb5be7992011-11-18 14:29:02 -08002650#define MSM_ION_MFC_SIZE SZ_8K
Mayank Choprac22ace32012-03-03 00:45:04 +05302651#ifdef CONFIG_FB_MSM_OVERLAY1_WRITEBACK
2652#define MSM_ION_WB_SIZE 0xC00000 /* 12MB */
2653#else
Olav Hauganb5be7992011-11-18 14:29:02 -08002654#define MSM_ION_WB_SIZE 0x600000 /* 6MB */
Mayank Choprac22ace32012-03-03 00:45:04 +05302655#endif
2656
Olav Haugan424ff492012-03-13 11:41:23 -07002657#define MSM_ION_QSECOM_SIZE 0x600000 /* (6MB) */
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002658
2659#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
Chaithanya Krishna Bacharaju1844c7c2012-03-19 11:25:43 +05302660#define MSM_ION_AUDIO_SIZE MSM_PMEM_AUDIO_SIZE
Olav Haugan6ab47252012-02-15 14:46:49 -08002661#define MSM_ION_HEAP_NUM 9
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08002662#define MSM_HDMI_PRIM_ION_SF_SIZE MSM_HDMI_PRIM_PMEM_SF_SIZE
2663static unsigned msm_ion_sf_size = MSM_ION_SF_SIZE;
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002664#else
Olav Hauganb5be7992011-11-18 14:29:02 -08002665#define MSM_ION_HEAP_NUM 1
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002666#endif
2667
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002668static unsigned fb_size;
2669static int __init fb_size_setup(char *p)
2670{
2671 fb_size = memparse(p, NULL);
2672 return 0;
2673}
2674early_param("fb_size", fb_size_setup);
2675
2676static unsigned pmem_kernel_ebi1_size = MSM_PMEM_KERNEL_EBI1_SIZE;
2677static int __init pmem_kernel_ebi1_size_setup(char *p)
2678{
2679 pmem_kernel_ebi1_size = memparse(p, NULL);
2680 return 0;
2681}
2682early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
2683
2684#ifdef CONFIG_ANDROID_PMEM
2685static unsigned pmem_sf_size = MSM_PMEM_SF_SIZE;
2686static int __init pmem_sf_size_setup(char *p)
2687{
2688 pmem_sf_size = memparse(p, NULL);
2689 return 0;
2690}
2691early_param("pmem_sf_size", pmem_sf_size_setup);
2692
2693static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
2694
2695static int __init pmem_adsp_size_setup(char *p)
2696{
2697 pmem_adsp_size = memparse(p, NULL);
2698 return 0;
2699}
2700early_param("pmem_adsp_size", pmem_adsp_size_setup);
2701
2702static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
2703
2704static int __init pmem_audio_size_setup(char *p)
2705{
2706 pmem_audio_size = memparse(p, NULL);
2707 return 0;
2708}
2709early_param("pmem_audio_size", pmem_audio_size_setup);
2710#endif
2711
2712static struct resource msm_fb_resources[] = {
2713 {
2714 .flags = IORESOURCE_DMA,
2715 }
2716};
2717
Ravishangar Kalyanam5f0c6412012-03-15 17:24:11 -07002718static void set_mdp_clocks_for_wuxga(void);
2719
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002720static int msm_fb_detect_panel(const char *name)
2721{
2722 if (machine_is_msm8x60_fluid()) {
2723 uint32_t soc_platform_version = socinfo_get_platform_version();
2724 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3) {
2725#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
2726 if (!strncmp(name, LCDC_SAMSUNG_OLED_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002727 strnlen(LCDC_SAMSUNG_OLED_PANEL_NAME,
2728 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002729 return 0;
2730#endif
2731 } else { /*P3 and up use AUO panel */
2732#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
2733 if (!strncmp(name, LCDC_AUO_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002734 strnlen(LCDC_AUO_PANEL_NAME,
2735 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002736 return 0;
2737#endif
2738 }
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04002739#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
2740 } else if machine_is_msm8x60_dragon() {
2741 if (!strncmp(name, LCDC_NT35582_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002742 strnlen(LCDC_NT35582_PANEL_NAME,
2743 PANEL_NAME_MAX_LEN)))
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04002744 return 0;
2745#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002746 } else {
2747 if (!strncmp(name, LCDC_SAMSUNG_WSVGA_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002748 strnlen(LCDC_SAMSUNG_WSVGA_PANEL_NAME,
2749 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002750 return 0;
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002751
2752#if !defined(CONFIG_FB_MSM_LCDC_AUTO_DETECT) && \
2753 !defined(CONFIG_FB_MSM_MIPI_PANEL_AUTO_DETECT) && \
2754 !defined(CONFIG_FB_MSM_LCDC_MIPI_PANEL_AUTO_DETECT)
2755 if (!strncmp(name, MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME,
2756 strnlen(MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME,
2757 PANEL_NAME_MAX_LEN)))
2758 return 0;
2759
2760 if (!strncmp(name, MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
2761 strnlen(MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
2762 PANEL_NAME_MAX_LEN)))
2763 return 0;
2764
2765 if (!strncmp(name, MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
2766 strnlen(MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
2767 PANEL_NAME_MAX_LEN)))
2768 return 0;
2769#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002770 }
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002771
2772 if (!strncmp(name, HDMI_PANEL_NAME,
2773 strnlen(HDMI_PANEL_NAME,
Ravishangar Kalyanam5f0c6412012-03-15 17:24:11 -07002774 PANEL_NAME_MAX_LEN))) {
2775 if (hdmi_is_primary)
2776 set_mdp_clocks_for_wuxga();
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002777 return 0;
Ravishangar Kalyanam5f0c6412012-03-15 17:24:11 -07002778 }
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002779
2780 if (!strncmp(name, TVOUT_PANEL_NAME,
2781 strnlen(TVOUT_PANEL_NAME,
2782 PANEL_NAME_MAX_LEN)))
2783 return 0;
2784
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002785 pr_warning("%s: not supported '%s'", __func__, name);
2786 return -ENODEV;
2787}
2788
2789static struct msm_fb_platform_data msm_fb_pdata = {
2790 .detect_client = msm_fb_detect_panel,
2791};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002792
2793static struct platform_device msm_fb_device = {
2794 .name = "msm_fb",
2795 .id = 0,
2796 .num_resources = ARRAY_SIZE(msm_fb_resources),
2797 .resource = msm_fb_resources,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002798 .dev.platform_data = &msm_fb_pdata,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002799};
2800
2801#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002802#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002803static struct android_pmem_platform_data android_pmem_pdata = {
2804 .name = "pmem",
2805 .allocator_type = PMEM_ALLOCATORTYPE_ALLORNOTHING,
2806 .cached = 1,
2807 .memory_type = MEMTYPE_EBI1,
2808};
2809
2810static struct platform_device android_pmem_device = {
2811 .name = "android_pmem",
2812 .id = 0,
2813 .dev = {.platform_data = &android_pmem_pdata},
2814};
2815
2816static struct android_pmem_platform_data android_pmem_adsp_pdata = {
2817 .name = "pmem_adsp",
2818 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2819 .cached = 0,
2820 .memory_type = MEMTYPE_EBI1,
2821};
2822
2823static struct platform_device android_pmem_adsp_device = {
2824 .name = "android_pmem",
2825 .id = 2,
2826 .dev = { .platform_data = &android_pmem_adsp_pdata },
2827};
Chaithanya Krishna Bacharaju23685fb2012-03-19 11:43:53 +05302828
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002829static struct android_pmem_platform_data android_pmem_audio_pdata = {
2830 .name = "pmem_audio",
2831 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2832 .cached = 0,
2833 .memory_type = MEMTYPE_EBI1,
2834};
2835
2836static struct platform_device android_pmem_audio_device = {
2837 .name = "android_pmem",
2838 .id = 4,
2839 .dev = { .platform_data = &android_pmem_audio_pdata },
2840};
Chaithanya Krishna Bacharaju23685fb2012-03-19 11:43:53 +05302841#endif /*CONFIG_MSM_MULTIMEDIA_USE_ION*/
Laura Abbott1e36a022011-06-22 17:08:13 -07002842#define PMEM_BUS_WIDTH(_bw) \
2843 { \
2844 .vectors = &(struct msm_bus_vectors){ \
2845 .src = MSM_BUS_MASTER_AMPSS_M0, \
2846 .dst = MSM_BUS_SLAVE_SMI, \
2847 .ib = (_bw), \
2848 .ab = 0, \
2849 }, \
2850 .num_paths = 1, \
2851 }
Olav Hauganee0f7802011-12-19 13:28:57 -08002852
2853static struct msm_bus_paths mem_smi_table[] = {
Laura Abbott1e36a022011-06-22 17:08:13 -07002854 [0] = PMEM_BUS_WIDTH(0), /* Off */
2855 [1] = PMEM_BUS_WIDTH(1), /* On */
2856};
2857
2858static struct msm_bus_scale_pdata smi_client_pdata = {
Olav Hauganee0f7802011-12-19 13:28:57 -08002859 .usecase = mem_smi_table,
2860 .num_usecases = ARRAY_SIZE(mem_smi_table),
2861 .name = "mem_smi",
Laura Abbott1e36a022011-06-22 17:08:13 -07002862};
2863
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002864int request_smi_region(void *data)
Laura Abbott1e36a022011-06-22 17:08:13 -07002865{
2866 int bus_id = (int) data;
2867
2868 msm_bus_scale_client_update_request(bus_id, 1);
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002869 return 0;
Laura Abbott1e36a022011-06-22 17:08:13 -07002870}
2871
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002872int release_smi_region(void *data)
Laura Abbott1e36a022011-06-22 17:08:13 -07002873{
2874 int bus_id = (int) data;
2875
2876 msm_bus_scale_client_update_request(bus_id, 0);
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002877 return 0;
Laura Abbott1e36a022011-06-22 17:08:13 -07002878}
2879
Alex Bird199980e2011-10-21 11:29:27 -07002880void *setup_smi_region(void)
Laura Abbott1e36a022011-06-22 17:08:13 -07002881{
2882 return (void *)msm_bus_scale_register_client(&smi_client_pdata);
2883}
Olav Hauganee0f7802011-12-19 13:28:57 -08002884#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002885static struct android_pmem_platform_data android_pmem_smipool_pdata = {
2886 .name = "pmem_smipool",
2887 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2888 .cached = 0,
2889 .memory_type = MEMTYPE_SMI,
Alex Bird199980e2011-10-21 11:29:27 -07002890 .request_region = request_smi_region,
2891 .release_region = release_smi_region,
2892 .setup_region = setup_smi_region,
Laura Abbott1e36a022011-06-22 17:08:13 -07002893 .map_on_demand = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002894};
2895static struct platform_device android_pmem_smipool_device = {
2896 .name = "android_pmem",
2897 .id = 7,
2898 .dev = { .platform_data = &android_pmem_smipool_pdata },
2899};
Chaithanya Krishna Bacharaju23685fb2012-03-19 11:43:53 +05302900#endif /*CONFIG_MSM_MULTIMEDIA_USE_ION*/
2901#endif /*CONFIG_ANDROID_PMEM*/
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002902
2903#define GPIO_DONGLE_PWR_EN 258
2904static void setup_display_power(void);
2905static int lcdc_vga_enabled;
2906static int vga_enable_request(int enable)
2907{
2908 if (enable)
2909 lcdc_vga_enabled = 1;
2910 else
2911 lcdc_vga_enabled = 0;
2912 setup_display_power();
2913
2914 return 0;
2915}
2916
2917#define GPIO_BACKLIGHT_PWM0 0
2918#define GPIO_BACKLIGHT_PWM1 1
2919
2920static int pmic_backlight_gpio[2]
2921 = { GPIO_BACKLIGHT_PWM0, GPIO_BACKLIGHT_PWM1 };
2922static struct msm_panel_common_pdata lcdc_samsung_panel_data = {
2923 .gpio_num = pmic_backlight_gpio, /* two LPG CHANNELS for backlight */
2924 .vga_switch = vga_enable_request,
2925};
2926
2927static struct platform_device lcdc_samsung_panel_device = {
2928 .name = LCDC_SAMSUNG_WSVGA_PANEL_NAME,
2929 .id = 0,
2930 .dev = {
2931 .platform_data = &lcdc_samsung_panel_data,
2932 }
2933};
2934#if (!defined(CONFIG_SPI_QUP)) && \
2935 (defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
2936 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA))
2937
2938static int lcdc_spi_gpio_array_num[] = {
2939 LCDC_SPI_GPIO_CLK,
2940 LCDC_SPI_GPIO_CS,
2941 LCDC_SPI_GPIO_MOSI,
2942};
2943
2944static uint32_t lcdc_spi_gpio_config_data[] = {
2945 GPIO_CFG(LCDC_SPI_GPIO_CLK, 0,
2946 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2947 GPIO_CFG(LCDC_SPI_GPIO_CS, 0,
2948 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2949 GPIO_CFG(LCDC_SPI_GPIO_MOSI, 0,
2950 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2951};
2952
2953static void lcdc_config_spi_gpios(int enable)
2954{
2955 int n;
2956 for (n = 0; n < ARRAY_SIZE(lcdc_spi_gpio_config_data); ++n)
2957 gpio_tlmm_config(lcdc_spi_gpio_config_data[n], 0);
2958}
2959#endif
2960
2961#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
2962#ifdef CONFIG_SPI_QUP
2963static struct spi_board_info lcdc_samsung_spi_board_info[] __initdata = {
2964 {
2965 .modalias = LCDC_SAMSUNG_SPI_DEVICE_NAME,
2966 .mode = SPI_MODE_3,
2967 .bus_num = 1,
2968 .chip_select = 0,
2969 .max_speed_hz = 10800000,
2970 }
2971};
2972#endif /* CONFIG_SPI_QUP */
2973
2974static struct msm_panel_common_pdata lcdc_samsung_oled_panel_data = {
2975#ifndef CONFIG_SPI_QUP
2976 .panel_config_gpio = lcdc_config_spi_gpios,
2977 .gpio_num = lcdc_spi_gpio_array_num,
2978#endif
2979};
2980
2981static struct platform_device lcdc_samsung_oled_panel_device = {
2982 .name = LCDC_SAMSUNG_OLED_PANEL_NAME,
2983 .id = 0,
2984 .dev.platform_data = &lcdc_samsung_oled_panel_data,
2985};
2986#endif /*CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT */
2987
2988#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
2989#ifdef CONFIG_SPI_QUP
2990static struct spi_board_info lcdc_auo_spi_board_info[] __initdata = {
2991 {
2992 .modalias = LCDC_AUO_SPI_DEVICE_NAME,
2993 .mode = SPI_MODE_3,
2994 .bus_num = 1,
2995 .chip_select = 0,
2996 .max_speed_hz = 10800000,
2997 }
2998};
2999#endif
3000
3001static struct msm_panel_common_pdata lcdc_auo_wvga_panel_data = {
3002#ifndef CONFIG_SPI_QUP
3003 .panel_config_gpio = lcdc_config_spi_gpios,
3004 .gpio_num = lcdc_spi_gpio_array_num,
3005#endif
3006};
3007
3008static struct platform_device lcdc_auo_wvga_panel_device = {
3009 .name = LCDC_AUO_PANEL_NAME,
3010 .id = 0,
3011 .dev.platform_data = &lcdc_auo_wvga_panel_data,
3012};
3013#endif /*CONFIG_FB_MSM_LCDC_AUO_WVGA*/
3014
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04003015#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
3016
3017#define GPIO_NT35582_RESET 94
3018#define GPIO_NT35582_BL_EN_HW_PIN 24
3019#define GPIO_NT35582_BL_EN \
3020 PM8058_GPIO_PM_TO_SYS(GPIO_NT35582_BL_EN_HW_PIN - 1)
3021
3022static int lcdc_nt35582_pmic_gpio[] = {GPIO_NT35582_BL_EN };
3023
3024static struct msm_panel_common_pdata lcdc_nt35582_panel_data = {
3025 .gpio_num = lcdc_nt35582_pmic_gpio,
3026};
3027
3028static struct platform_device lcdc_nt35582_panel_device = {
3029 .name = LCDC_NT35582_PANEL_NAME,
3030 .id = 0,
3031 .dev = {
3032 .platform_data = &lcdc_nt35582_panel_data,
3033 }
3034};
3035
3036static struct spi_board_info lcdc_nt35582_spi_board_info[] __initdata = {
3037 {
3038 .modalias = "lcdc_nt35582_spi",
3039 .mode = SPI_MODE_0,
3040 .bus_num = 0,
3041 .chip_select = 0,
3042 .max_speed_hz = 1100000,
3043 }
3044};
3045#endif
3046
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003047#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
3048static struct resource hdmi_msm_resources[] = {
3049 {
3050 .name = "hdmi_msm_qfprom_addr",
3051 .start = 0x00700000,
3052 .end = 0x007060FF,
3053 .flags = IORESOURCE_MEM,
3054 },
3055 {
3056 .name = "hdmi_msm_hdmi_addr",
3057 .start = 0x04A00000,
3058 .end = 0x04A00FFF,
3059 .flags = IORESOURCE_MEM,
3060 },
3061 {
3062 .name = "hdmi_msm_irq",
3063 .start = HDMI_IRQ,
3064 .end = HDMI_IRQ,
3065 .flags = IORESOURCE_IRQ,
3066 },
3067};
3068
3069static int hdmi_enable_5v(int on);
3070static int hdmi_core_power(int on, int show);
3071static int hdmi_cec_power(int on);
3072
3073static struct msm_hdmi_platform_data hdmi_msm_data = {
3074 .irq = HDMI_IRQ,
3075 .enable_5v = hdmi_enable_5v,
3076 .core_power = hdmi_core_power,
3077 .cec_power = hdmi_cec_power,
3078};
3079
3080static struct platform_device hdmi_msm_device = {
3081 .name = "hdmi_msm",
3082 .id = 0,
3083 .num_resources = ARRAY_SIZE(hdmi_msm_resources),
3084 .resource = hdmi_msm_resources,
3085 .dev.platform_data = &hdmi_msm_data,
3086};
3087#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
3088
3089#ifdef CONFIG_FB_MSM_MIPI_DSI
3090static struct platform_device mipi_dsi_toshiba_panel_device = {
3091 .name = "mipi_toshiba",
3092 .id = 0,
3093};
3094
3095#define FPGA_3D_GPIO_CONFIG_ADDR 0x1D00017A
3096
Nagamalleswararao Ganjieac5dfa2011-07-23 17:31:16 -07003097static struct mipi_dsi_panel_platform_data novatek_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003098 .fpga_3d_config_addr = FPGA_3D_GPIO_CONFIG_ADDR,
Chandan Uddaraju83eac3c2011-09-11 18:32:23 -07003099 .fpga_ctrl_mode = FPGA_EBI2_INTF,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003100};
3101
3102static struct platform_device mipi_dsi_novatek_panel_device = {
3103 .name = "mipi_novatek",
3104 .id = 0,
3105 .dev = {
3106 .platform_data = &novatek_pdata,
3107 }
3108};
3109#endif
3110
3111static void __init msm8x60_allocate_memory_regions(void)
3112{
3113 void *addr;
3114 unsigned long size;
3115
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08003116 if (hdmi_is_primary)
3117 size = roundup((1920 * 1088 * 4 * 2), 4096);
3118 else
3119 size = MSM_FB_SIZE;
3120
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003121 addr = alloc_bootmem_align(size, 0x1000);
3122 msm_fb_resources[0].start = __pa(addr);
3123 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
3124 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
3125 size, addr, __pa(addr));
3126
3127}
3128
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08003129void __init msm8x60_set_display_params(char *prim_panel, char *ext_panel)
3130{
3131 if (strnlen(prim_panel, PANEL_NAME_MAX_LEN)) {
3132 strlcpy(msm_fb_pdata.prim_panel_name, prim_panel,
3133 PANEL_NAME_MAX_LEN);
3134 pr_debug("msm_fb_pdata.prim_panel_name %s\n",
3135 msm_fb_pdata.prim_panel_name);
3136
3137 if (!strncmp((char *)msm_fb_pdata.prim_panel_name,
3138 HDMI_PANEL_NAME, strnlen(HDMI_PANEL_NAME,
3139 PANEL_NAME_MAX_LEN))) {
3140 pr_debug("HDMI is the primary display by"
3141 " boot parameter\n");
3142 hdmi_is_primary = 1;
Ravishangar Kalyanam5f0c6412012-03-15 17:24:11 -07003143 set_mdp_clocks_for_wuxga();
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08003144 }
3145 }
3146 if (strnlen(ext_panel, PANEL_NAME_MAX_LEN)) {
3147 strlcpy(msm_fb_pdata.ext_panel_name, ext_panel,
3148 PANEL_NAME_MAX_LEN);
3149 pr_debug("msm_fb_pdata.ext_panel_name %s\n",
3150 msm_fb_pdata.ext_panel_name);
3151 }
3152}
3153
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003154#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
3155 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
3156/*virtual key support */
3157static ssize_t tma300_vkeys_show(struct kobject *kobj,
3158 struct kobj_attribute *attr, char *buf)
3159{
3160 return sprintf(buf,
3161 __stringify(EV_KEY) ":" __stringify(KEY_BACK) ":60:900:90:120"
3162 ":" __stringify(EV_KEY) ":" __stringify(KEY_MENU) ":180:900:90:120"
3163 ":" __stringify(EV_KEY) ":" __stringify(KEY_HOME) ":300:900:90:120"
3164 ":" __stringify(EV_KEY) ":" __stringify(KEY_SEARCH) ":420:900:90:120"
3165 "\n");
3166}
3167
3168static struct kobj_attribute tma300_vkeys_attr = {
3169 .attr = {
3170 .mode = S_IRUGO,
3171 },
3172 .show = &tma300_vkeys_show,
3173};
3174
3175static struct attribute *tma300_properties_attrs[] = {
3176 &tma300_vkeys_attr.attr,
3177 NULL
3178};
3179
3180static struct attribute_group tma300_properties_attr_group = {
3181 .attrs = tma300_properties_attrs,
3182};
3183
3184static struct kobject *properties_kobj;
3185
3186
3187
3188#define CYTTSP_TS_GPIO_IRQ 61
3189static int cyttsp_platform_init(struct i2c_client *client)
3190{
3191 int rc = -EINVAL;
3192 struct regulator *pm8058_l5 = NULL, *pm8058_s3;
3193
3194 if (machine_is_msm8x60_fluid()) {
3195 pm8058_l5 = regulator_get(NULL, "8058_l5");
3196 if (IS_ERR(pm8058_l5)) {
3197 pr_err("%s: regulator get of 8058_l5 failed (%ld)\n",
3198 __func__, PTR_ERR(pm8058_l5));
3199 rc = PTR_ERR(pm8058_l5);
3200 return rc;
3201 }
3202 rc = regulator_set_voltage(pm8058_l5, 2850000, 2850000);
3203 if (rc) {
3204 pr_err("%s: regulator_set_voltage of 8058_l5 failed(%d)\n",
3205 __func__, rc);
3206 goto reg_l5_put;
3207 }
3208
3209 rc = regulator_enable(pm8058_l5);
3210 if (rc) {
3211 pr_err("%s: regulator_enable of 8058_l5 failed(%d)\n",
3212 __func__, rc);
3213 goto reg_l5_put;
3214 }
3215 }
3216 /* vote for s3 to enable i2c communication lines */
3217 pm8058_s3 = regulator_get(NULL, "8058_s3");
3218 if (IS_ERR(pm8058_s3)) {
3219 pr_err("%s: regulator get of 8058_s3 failed (%ld)\n",
3220 __func__, PTR_ERR(pm8058_s3));
3221 rc = PTR_ERR(pm8058_s3);
3222 goto reg_l5_disable;
3223 }
3224
3225 rc = regulator_set_voltage(pm8058_s3, 1800000, 1800000);
3226 if (rc) {
3227 pr_err("%s: regulator_set_voltage() = %d\n",
3228 __func__, rc);
3229 goto reg_s3_put;
3230 }
3231
3232 rc = regulator_enable(pm8058_s3);
3233 if (rc) {
3234 pr_err("%s: regulator_enable of 8058_l5 failed(%d)\n",
3235 __func__, rc);
3236 goto reg_s3_put;
3237 }
3238
3239 /* wait for vregs to stabilize */
3240 usleep_range(10000, 10000);
3241
3242 /* check this device active by reading first byte/register */
3243 rc = i2c_smbus_read_byte_data(client, 0x01);
3244 if (rc < 0) {
3245 pr_err("%s: i2c sanity check failed\n", __func__);
3246 goto reg_s3_disable;
3247 }
3248
3249 /* virtual keys */
3250 if (machine_is_msm8x60_fluid()) {
3251 tma300_vkeys_attr.attr.name = "virtualkeys.cyttsp-i2c";
3252 properties_kobj = kobject_create_and_add("board_properties",
3253 NULL);
3254 if (properties_kobj)
3255 rc = sysfs_create_group(properties_kobj,
3256 &tma300_properties_attr_group);
3257 if (!properties_kobj || rc)
3258 pr_err("%s: failed to create board_properties\n",
3259 __func__);
3260 }
3261 return CY_OK;
3262
3263reg_s3_disable:
3264 regulator_disable(pm8058_s3);
3265reg_s3_put:
3266 regulator_put(pm8058_s3);
3267reg_l5_disable:
3268 if (machine_is_msm8x60_fluid())
3269 regulator_disable(pm8058_l5);
3270reg_l5_put:
3271 if (machine_is_msm8x60_fluid())
3272 regulator_put(pm8058_l5);
3273 return rc;
3274}
3275
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303276/* TODO: Put the regulator to LPM / HPM in suspend/resume*/
3277static int cyttsp_platform_suspend(struct i2c_client *client)
3278{
3279 msleep(20);
3280
3281 return CY_OK;
3282}
3283
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003284static int cyttsp_platform_resume(struct i2c_client *client)
3285{
3286 /* add any special code to strobe a wakeup pin or chip reset */
3287 msleep(10);
3288
3289 return CY_OK;
3290}
3291
3292static struct cyttsp_platform_data cyttsp_fluid_pdata = {
3293 .flags = 0x04,
3294 .gen = CY_GEN3, /* or */
3295 .use_st = CY_USE_ST,
3296 .use_mt = CY_USE_MT,
3297 .use_hndshk = CY_SEND_HNDSHK,
3298 .use_trk_id = CY_USE_TRACKING_ID,
Anirudh Ghayal15187772011-06-22 17:39:41 +05303299 .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003300 .use_gestures = CY_USE_GESTURES,
3301 /* activate up to 4 groups
3302 * and set active distance
3303 */
3304 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
3305 CY_GEST_GRP3 | CY_GEST_GRP4 |
3306 CY_ACT_DIST,
3307 /* change act_intrvl to customize the Active power state
3308 * scanning/processing refresh interval for Operating mode
3309 */
3310 .act_intrvl = CY_ACT_INTRVL_DFLT,
3311 /* change tch_tmout to customize the touch timeout for the
3312 * Active power state for Operating mode
3313 */
3314 .tch_tmout = CY_TCH_TMOUT_DFLT,
3315 /* change lp_intrvl to customize the Low Power power state
3316 * scanning/processing refresh interval for Operating mode
3317 */
3318 .lp_intrvl = CY_LP_INTRVL_DFLT,
3319 .sleep_gpio = -1,
3320 .resout_gpio = -1,
3321 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
3322 .resume = cyttsp_platform_resume,
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303323 .suspend = cyttsp_platform_suspend,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003324 .init = cyttsp_platform_init,
3325};
3326
3327static struct cyttsp_platform_data cyttsp_tmg240_pdata = {
3328 .panel_maxx = 1083,
3329 .panel_maxy = 659,
3330 .disp_minx = 30,
3331 .disp_maxx = 1053,
3332 .disp_miny = 30,
3333 .disp_maxy = 629,
3334 .correct_fw_ver = 8,
3335 .fw_fname = "cyttsp_8660_ffa.hex",
3336 .flags = 0x00,
3337 .gen = CY_GEN2, /* or */
3338 .use_st = CY_USE_ST,
3339 .use_mt = CY_USE_MT,
3340 .use_hndshk = CY_SEND_HNDSHK,
3341 .use_trk_id = CY_USE_TRACKING_ID,
Anirudh Ghayal15187772011-06-22 17:39:41 +05303342 .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003343 .use_gestures = CY_USE_GESTURES,
3344 /* activate up to 4 groups
3345 * and set active distance
3346 */
3347 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
3348 CY_GEST_GRP3 | CY_GEST_GRP4 |
3349 CY_ACT_DIST,
3350 /* change act_intrvl to customize the Active power state
3351 * scanning/processing refresh interval for Operating mode
3352 */
3353 .act_intrvl = CY_ACT_INTRVL_DFLT,
3354 /* change tch_tmout to customize the touch timeout for the
3355 * Active power state for Operating mode
3356 */
3357 .tch_tmout = CY_TCH_TMOUT_DFLT,
3358 /* change lp_intrvl to customize the Low Power power state
3359 * scanning/processing refresh interval for Operating mode
3360 */
3361 .lp_intrvl = CY_LP_INTRVL_DFLT,
3362 .sleep_gpio = -1,
3363 .resout_gpio = -1,
3364 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
3365 .resume = cyttsp_platform_resume,
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303366 .suspend = cyttsp_platform_suspend,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003367 .init = cyttsp_platform_init,
Mohan Pallaka1ea7d8a2011-08-18 15:06:00 +05303368 .disable_ghost_det = true,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003369};
3370static void cyttsp_set_params(void)
3371{
3372 if (SOCINFO_VERSION_MAJOR(socinfo_get_platform_version()) < 3) {
3373 cyttsp_fluid_pdata.fw_fname = "cyttsp_8660_fluid_p2.hex";
3374 cyttsp_fluid_pdata.panel_maxx = 539;
3375 cyttsp_fluid_pdata.panel_maxy = 994;
3376 cyttsp_fluid_pdata.disp_minx = 30;
3377 cyttsp_fluid_pdata.disp_maxx = 509;
3378 cyttsp_fluid_pdata.disp_miny = 60;
3379 cyttsp_fluid_pdata.disp_maxy = 859;
3380 cyttsp_fluid_pdata.correct_fw_ver = 4;
3381 } else {
3382 cyttsp_fluid_pdata.fw_fname = "cyttsp_8660_fluid_p3.hex";
3383 cyttsp_fluid_pdata.panel_maxx = 550;
3384 cyttsp_fluid_pdata.panel_maxy = 1013;
3385 cyttsp_fluid_pdata.disp_minx = 35;
3386 cyttsp_fluid_pdata.disp_maxx = 515;
3387 cyttsp_fluid_pdata.disp_miny = 69;
3388 cyttsp_fluid_pdata.disp_maxy = 869;
3389 cyttsp_fluid_pdata.correct_fw_ver = 5;
3390 }
3391
3392}
3393
3394static struct i2c_board_info cyttsp_fluid_info[] __initdata = {
3395 {
3396 I2C_BOARD_INFO(CY_I2C_NAME, 0x24),
3397 .platform_data = &cyttsp_fluid_pdata,
3398#ifndef CY_USE_TIMER
3399 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
3400#endif /* CY_USE_TIMER */
3401 },
3402};
3403
3404static struct i2c_board_info cyttsp_ffa_info[] __initdata = {
3405 {
3406 I2C_BOARD_INFO(CY_I2C_NAME, 0x3b),
3407 .platform_data = &cyttsp_tmg240_pdata,
3408#ifndef CY_USE_TIMER
3409 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
3410#endif /* CY_USE_TIMER */
3411 },
3412};
3413#endif
3414
3415static struct regulator *vreg_tmg200;
3416
3417#define TS_PEN_IRQ_GPIO 61
3418static int tmg200_power(int vreg_on)
3419{
3420 int rc = -EINVAL;
3421
3422 if (!vreg_tmg200) {
3423 printk(KERN_ERR "%s: regulator 8058_s3 not found (%d)\n",
3424 __func__, rc);
3425 return rc;
3426 }
3427
3428 rc = vreg_on ? regulator_enable(vreg_tmg200) :
3429 regulator_disable(vreg_tmg200);
3430 if (rc < 0)
3431 printk(KERN_ERR "%s: vreg 8058_s3 %s failed (%d)\n",
3432 __func__, vreg_on ? "enable" : "disable", rc);
3433
3434 /* wait for vregs to stabilize */
Amy Maloche12b5d4e2011-08-03 15:42:28 -07003435 msleep(20);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003436
3437 return rc;
3438}
3439
3440static int tmg200_dev_setup(bool enable)
3441{
3442 int rc;
3443
3444 if (enable) {
3445 vreg_tmg200 = regulator_get(NULL, "8058_s3");
3446 if (IS_ERR(vreg_tmg200)) {
3447 pr_err("%s: regulator get of 8058_s3 failed (%ld)\n",
3448 __func__, PTR_ERR(vreg_tmg200));
3449 rc = PTR_ERR(vreg_tmg200);
3450 return rc;
3451 }
3452
3453 rc = regulator_set_voltage(vreg_tmg200, 1800000, 1800000);
3454 if (rc) {
3455 pr_err("%s: regulator_set_voltage() = %d\n",
3456 __func__, rc);
3457 goto reg_put;
3458 }
3459 } else {
3460 /* put voltage sources */
3461 regulator_put(vreg_tmg200);
3462 }
3463 return 0;
3464reg_put:
3465 regulator_put(vreg_tmg200);
3466 return rc;
3467}
3468
3469static struct cy8c_ts_platform_data cy8ctmg200_pdata = {
3470 .ts_name = "msm_tmg200_ts",
3471 .dis_min_x = 0,
3472 .dis_max_x = 1023,
3473 .dis_min_y = 0,
3474 .dis_max_y = 599,
3475 .min_tid = 0,
3476 .max_tid = 255,
3477 .min_touch = 0,
3478 .max_touch = 255,
3479 .min_width = 0,
3480 .max_width = 255,
3481 .power_on = tmg200_power,
3482 .dev_setup = tmg200_dev_setup,
3483 .nfingers = 2,
3484 .irq_gpio = TS_PEN_IRQ_GPIO,
3485 .resout_gpio = GPIO_CAP_TS_RESOUT_N,
3486};
3487
3488static struct i2c_board_info cy8ctmg200_board_info[] = {
3489 {
3490 I2C_BOARD_INFO("cy8ctmg200", 0x2),
3491 .platform_data = &cy8ctmg200_pdata,
3492 }
3493};
3494
Zhang Chang Ken211df572011-07-05 19:16:39 -04003495static struct regulator *vreg_tma340;
3496
3497static int tma340_power(int vreg_on)
3498{
3499 int rc = -EINVAL;
3500
3501 if (!vreg_tma340) {
3502 pr_err("%s: regulator 8901_l2 not found (%d)\n",
3503 __func__, rc);
3504 return rc;
3505 }
3506
3507 rc = vreg_on ? regulator_enable(vreg_tma340) :
3508 regulator_disable(vreg_tma340);
3509 if (rc < 0)
3510 pr_err("%s: vreg 8901_l2 %s failed (%d)\n",
3511 __func__, vreg_on ? "enable" : "disable", rc);
3512
3513 /* wait for vregs to stabilize */
Amy Malocheb5c67e8d2011-08-18 16:39:35 -07003514 msleep(100);
Zhang Chang Ken211df572011-07-05 19:16:39 -04003515
3516 return rc;
3517}
3518
3519static struct kobject *tma340_prop_kobj;
3520
3521static int tma340_dragon_dev_setup(bool enable)
3522{
3523 int rc;
3524
3525 if (enable) {
3526 vreg_tma340 = regulator_get(NULL, "8901_l2");
3527 if (IS_ERR(vreg_tma340)) {
3528 pr_err("%s: regulator get of 8901_l2 failed (%ld)\n",
3529 __func__, PTR_ERR(vreg_tma340));
3530 rc = PTR_ERR(vreg_tma340);
3531 return rc;
3532 }
3533
3534 rc = regulator_set_voltage(vreg_tma340, 3300000, 3300000);
3535 if (rc) {
3536 pr_err("%s: regulator_set_voltage() = %d\n",
3537 __func__, rc);
3538 goto reg_put;
3539 }
3540 tma300_vkeys_attr.attr.name = "virtualkeys.cy8ctma340";
3541 tma340_prop_kobj = kobject_create_and_add("board_properties",
3542 NULL);
3543 if (tma340_prop_kobj) {
3544 rc = sysfs_create_group(tma340_prop_kobj,
3545 &tma300_properties_attr_group);
3546 if (rc) {
3547 kobject_put(tma340_prop_kobj);
3548 pr_err("%s: failed to create board_properties\n",
3549 __func__);
3550 goto reg_put;
3551 }
3552 }
3553
3554 } else {
3555 /* put voltage sources */
3556 regulator_put(vreg_tma340);
3557 /* destroy virtual keys */
3558 if (tma340_prop_kobj) {
3559 sysfs_remove_group(tma340_prop_kobj,
3560 &tma300_properties_attr_group);
3561 kobject_put(tma340_prop_kobj);
3562 }
3563 }
3564 return 0;
3565reg_put:
3566 regulator_put(vreg_tma340);
3567 return rc;
3568}
3569
3570
3571static struct cy8c_ts_platform_data cy8ctma340_dragon_pdata = {
3572 .ts_name = "cy8ctma340",
3573 .dis_min_x = 0,
3574 .dis_max_x = 479,
3575 .dis_min_y = 0,
3576 .dis_max_y = 799,
3577 .min_tid = 0,
3578 .max_tid = 255,
3579 .min_touch = 0,
3580 .max_touch = 255,
3581 .min_width = 0,
3582 .max_width = 255,
3583 .power_on = tma340_power,
3584 .dev_setup = tma340_dragon_dev_setup,
3585 .nfingers = 2,
3586 .irq_gpio = TS_PEN_IRQ_GPIO,
3587 .resout_gpio = -1,
3588};
3589
3590static struct i2c_board_info cy8ctma340_dragon_board_info[] = {
3591 {
3592 I2C_BOARD_INFO("cy8ctma340", 0x24),
3593 .platform_data = &cy8ctma340_dragon_pdata,
3594 }
3595};
3596
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003597#ifdef CONFIG_SERIAL_MSM_HS
3598static int configure_uart_gpios(int on)
3599{
3600 int ret = 0, i;
3601 int uart_gpios[] = {53, 54, 55, 56};
3602 for (i = 0; i < ARRAY_SIZE(uart_gpios); i++) {
3603 if (on) {
3604 ret = msm_gpiomux_get(uart_gpios[i]);
3605 if (unlikely(ret))
3606 break;
3607 } else {
3608 ret = msm_gpiomux_put(uart_gpios[i]);
3609 if (unlikely(ret))
3610 return ret;
3611 }
3612 }
3613 if (ret)
3614 for (; i >= 0; i--)
3615 msm_gpiomux_put(uart_gpios[i]);
3616 return ret;
3617}
3618static struct msm_serial_hs_platform_data msm_uart_dm1_pdata = {
3619 .inject_rx_on_wakeup = 1,
3620 .rx_to_inject = 0xFD,
3621 .gpio_config = configure_uart_gpios,
3622};
3623#endif
3624
3625
3626#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
3627
3628static struct gpio_led gpio_exp_leds_config[] = {
3629 {
3630 .name = "left_led1:green",
3631 .gpio = GPIO_LEFT_LED_1,
3632 .active_low = 1,
3633 .retain_state_suspended = 0,
3634 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3635 },
3636 {
3637 .name = "left_led2:red",
3638 .gpio = GPIO_LEFT_LED_2,
3639 .active_low = 1,
3640 .retain_state_suspended = 0,
3641 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3642 },
3643 {
3644 .name = "left_led3:green",
3645 .gpio = GPIO_LEFT_LED_3,
3646 .active_low = 1,
3647 .retain_state_suspended = 0,
3648 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3649 },
3650 {
3651 .name = "wlan_led:orange",
3652 .gpio = GPIO_LEFT_LED_WLAN,
3653 .active_low = 1,
3654 .retain_state_suspended = 0,
3655 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3656 },
3657 {
3658 .name = "left_led5:green",
3659 .gpio = GPIO_LEFT_LED_5,
3660 .active_low = 1,
3661 .retain_state_suspended = 0,
3662 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3663 },
3664 {
3665 .name = "right_led1:green",
3666 .gpio = GPIO_RIGHT_LED_1,
3667 .active_low = 1,
3668 .retain_state_suspended = 0,
3669 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3670 },
3671 {
3672 .name = "right_led2:red",
3673 .gpio = GPIO_RIGHT_LED_2,
3674 .active_low = 1,
3675 .retain_state_suspended = 0,
3676 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3677 },
3678 {
3679 .name = "right_led3:green",
3680 .gpio = GPIO_RIGHT_LED_3,
3681 .active_low = 1,
3682 .retain_state_suspended = 0,
3683 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3684 },
3685 {
3686 .name = "bt_led:blue",
3687 .gpio = GPIO_RIGHT_LED_BT,
3688 .active_low = 1,
3689 .retain_state_suspended = 0,
3690 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3691 },
3692 {
3693 .name = "right_led5:green",
3694 .gpio = GPIO_RIGHT_LED_5,
3695 .active_low = 1,
3696 .retain_state_suspended = 0,
3697 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3698 },
3699};
3700
3701static struct gpio_led_platform_data gpio_leds_pdata = {
3702 .num_leds = ARRAY_SIZE(gpio_exp_leds_config),
3703 .leds = gpio_exp_leds_config,
3704};
3705
3706static struct platform_device gpio_leds = {
3707 .name = "leds-gpio",
3708 .id = -1,
3709 .dev = {
3710 .platform_data = &gpio_leds_pdata,
3711 },
3712};
3713
3714static struct gpio_led fluid_gpio_leds[] = {
3715 {
3716 .name = "dual_led:green",
3717 .gpio = GPIO_LED1_GREEN_N,
3718 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3719 .active_low = 1,
3720 .retain_state_suspended = 0,
3721 },
3722 {
3723 .name = "dual_led:red",
3724 .gpio = GPIO_LED2_RED_N,
3725 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3726 .active_low = 1,
3727 .retain_state_suspended = 0,
3728 },
3729};
3730
3731static struct gpio_led_platform_data gpio_led_pdata = {
3732 .leds = fluid_gpio_leds,
3733 .num_leds = ARRAY_SIZE(fluid_gpio_leds),
3734};
3735
3736static struct platform_device fluid_leds_gpio = {
3737 .name = "leds-gpio",
3738 .id = -1,
3739 .dev = {
3740 .platform_data = &gpio_led_pdata,
3741 },
3742};
3743
3744#endif
3745
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003746#ifdef CONFIG_BATTERY_MSM8X60
3747static struct msm_charger_platform_data msm_charger_data = {
3748 .safety_time = 180,
3749 .update_time = 1,
3750 .max_voltage = 4200,
3751 .min_voltage = 3200,
3752};
3753
3754static struct platform_device msm_charger_device = {
3755 .name = "msm-charger",
3756 .id = -1,
3757 .dev = {
3758 .platform_data = &msm_charger_data,
3759 }
3760};
3761#endif
3762
3763/*
3764 * Consumer specific regulator names:
3765 * regulator name consumer dev_name
3766 */
3767static struct regulator_consumer_supply vreg_consumers_PM8058_L0[] = {
3768 REGULATOR_SUPPLY("8058_l0", NULL),
3769};
3770static struct regulator_consumer_supply vreg_consumers_PM8058_L1[] = {
3771 REGULATOR_SUPPLY("8058_l1", NULL),
3772};
3773static struct regulator_consumer_supply vreg_consumers_PM8058_L2[] = {
3774 REGULATOR_SUPPLY("8058_l2", NULL),
3775};
3776static struct regulator_consumer_supply vreg_consumers_PM8058_L3[] = {
3777 REGULATOR_SUPPLY("8058_l3", NULL),
3778};
3779static struct regulator_consumer_supply vreg_consumers_PM8058_L4[] = {
3780 REGULATOR_SUPPLY("8058_l4", NULL),
3781};
3782static struct regulator_consumer_supply vreg_consumers_PM8058_L5[] = {
3783 REGULATOR_SUPPLY("8058_l5", NULL),
3784};
3785static struct regulator_consumer_supply vreg_consumers_PM8058_L6[] = {
3786 REGULATOR_SUPPLY("8058_l6", NULL),
3787};
3788static struct regulator_consumer_supply vreg_consumers_PM8058_L7[] = {
3789 REGULATOR_SUPPLY("8058_l7", NULL),
3790};
3791static struct regulator_consumer_supply vreg_consumers_PM8058_L8[] = {
3792 REGULATOR_SUPPLY("8058_l8", NULL),
3793};
3794static struct regulator_consumer_supply vreg_consumers_PM8058_L9[] = {
3795 REGULATOR_SUPPLY("8058_l9", NULL),
3796};
3797static struct regulator_consumer_supply vreg_consumers_PM8058_L10[] = {
3798 REGULATOR_SUPPLY("8058_l10", NULL),
3799};
3800static struct regulator_consumer_supply vreg_consumers_PM8058_L11[] = {
3801 REGULATOR_SUPPLY("8058_l11", NULL),
3802};
3803static struct regulator_consumer_supply vreg_consumers_PM8058_L12[] = {
3804 REGULATOR_SUPPLY("8058_l12", NULL),
3805};
3806static struct regulator_consumer_supply vreg_consumers_PM8058_L13[] = {
3807 REGULATOR_SUPPLY("8058_l13", NULL),
3808};
3809static struct regulator_consumer_supply vreg_consumers_PM8058_L14[] = {
3810 REGULATOR_SUPPLY("8058_l14", NULL),
3811};
3812static struct regulator_consumer_supply vreg_consumers_PM8058_L15[] = {
3813 REGULATOR_SUPPLY("8058_l15", NULL),
Kevin Chan3be11612012-03-22 20:05:40 -07003814 REGULATOR_SUPPLY("cam_vana", "1-001a"),
Sreesudhan Ramakrish Ramkumar93701d32012-04-26 15:04:05 -07003815 REGULATOR_SUPPLY("cam_vana", "1-006c"),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003816};
3817static struct regulator_consumer_supply vreg_consumers_PM8058_L16[] = {
3818 REGULATOR_SUPPLY("8058_l16", NULL),
3819};
3820static struct regulator_consumer_supply vreg_consumers_PM8058_L17[] = {
3821 REGULATOR_SUPPLY("8058_l17", NULL),
3822};
3823static struct regulator_consumer_supply vreg_consumers_PM8058_L18[] = {
3824 REGULATOR_SUPPLY("8058_l18", NULL),
3825};
3826static struct regulator_consumer_supply vreg_consumers_PM8058_L19[] = {
3827 REGULATOR_SUPPLY("8058_l19", NULL),
3828};
3829static struct regulator_consumer_supply vreg_consumers_PM8058_L20[] = {
3830 REGULATOR_SUPPLY("8058_l20", NULL),
3831};
3832static struct regulator_consumer_supply vreg_consumers_PM8058_L21[] = {
3833 REGULATOR_SUPPLY("8058_l21", NULL),
3834};
3835static struct regulator_consumer_supply vreg_consumers_PM8058_L22[] = {
3836 REGULATOR_SUPPLY("8058_l22", NULL),
3837};
3838static struct regulator_consumer_supply vreg_consumers_PM8058_L23[] = {
3839 REGULATOR_SUPPLY("8058_l23", NULL),
3840};
3841static struct regulator_consumer_supply vreg_consumers_PM8058_L24[] = {
3842 REGULATOR_SUPPLY("8058_l24", NULL),
3843};
3844static struct regulator_consumer_supply vreg_consumers_PM8058_L25[] = {
3845 REGULATOR_SUPPLY("8058_l25", NULL),
Kevin Chan3be11612012-03-22 20:05:40 -07003846 REGULATOR_SUPPLY("cam_vdig", "1-001a"),
Sreesudhan Ramakrish Ramkumar93701d32012-04-26 15:04:05 -07003847 REGULATOR_SUPPLY("cam_vdig", "1-006c"),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003848};
3849static struct regulator_consumer_supply vreg_consumers_PM8058_S0[] = {
3850 REGULATOR_SUPPLY("8058_s0", NULL),
3851};
3852static struct regulator_consumer_supply vreg_consumers_PM8058_S1[] = {
3853 REGULATOR_SUPPLY("8058_s1", NULL),
3854};
3855static struct regulator_consumer_supply vreg_consumers_PM8058_S2[] = {
3856 REGULATOR_SUPPLY("8058_s2", NULL),
3857};
3858static struct regulator_consumer_supply vreg_consumers_PM8058_S3[] = {
3859 REGULATOR_SUPPLY("8058_s3", NULL),
3860};
3861static struct regulator_consumer_supply vreg_consumers_PM8058_S4[] = {
3862 REGULATOR_SUPPLY("8058_s4", NULL),
3863};
3864static struct regulator_consumer_supply vreg_consumers_PM8058_LVS0[] = {
3865 REGULATOR_SUPPLY("8058_lvs0", NULL),
Kevin Chan3be11612012-03-22 20:05:40 -07003866 REGULATOR_SUPPLY("cam_vio", "1-001a"),
Sreesudhan Ramakrish Ramkumar93701d32012-04-26 15:04:05 -07003867 REGULATOR_SUPPLY("cam_vio", "1-006c"),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003868};
3869static struct regulator_consumer_supply vreg_consumers_PM8058_LVS1[] = {
3870 REGULATOR_SUPPLY("8058_lvs1", NULL),
3871};
3872static struct regulator_consumer_supply vreg_consumers_PM8058_NCP[] = {
3873 REGULATOR_SUPPLY("8058_ncp", NULL),
3874};
3875
3876static struct regulator_consumer_supply vreg_consumers_PM8901_L0[] = {
3877 REGULATOR_SUPPLY("8901_l0", NULL),
3878};
3879static struct regulator_consumer_supply vreg_consumers_PM8901_L1[] = {
3880 REGULATOR_SUPPLY("8901_l1", NULL),
3881};
3882static struct regulator_consumer_supply vreg_consumers_PM8901_L2[] = {
3883 REGULATOR_SUPPLY("8901_l2", NULL),
3884};
3885static struct regulator_consumer_supply vreg_consumers_PM8901_L3[] = {
3886 REGULATOR_SUPPLY("8901_l3", NULL),
3887};
3888static struct regulator_consumer_supply vreg_consumers_PM8901_L4[] = {
3889 REGULATOR_SUPPLY("8901_l4", NULL),
3890};
3891static struct regulator_consumer_supply vreg_consumers_PM8901_L5[] = {
3892 REGULATOR_SUPPLY("8901_l5", NULL),
3893};
3894static struct regulator_consumer_supply vreg_consumers_PM8901_L6[] = {
3895 REGULATOR_SUPPLY("8901_l6", NULL),
3896};
3897static struct regulator_consumer_supply vreg_consumers_PM8901_S2[] = {
3898 REGULATOR_SUPPLY("8901_s2", NULL),
3899};
3900static struct regulator_consumer_supply vreg_consumers_PM8901_S3[] = {
3901 REGULATOR_SUPPLY("8901_s3", NULL),
3902};
3903static struct regulator_consumer_supply vreg_consumers_PM8901_S4[] = {
3904 REGULATOR_SUPPLY("8901_s4", NULL),
3905};
3906static struct regulator_consumer_supply vreg_consumers_PM8901_LVS0[] = {
3907 REGULATOR_SUPPLY("8901_lvs0", NULL),
3908};
3909static struct regulator_consumer_supply vreg_consumers_PM8901_LVS1[] = {
3910 REGULATOR_SUPPLY("8901_lvs1", NULL),
3911};
3912static struct regulator_consumer_supply vreg_consumers_PM8901_LVS2[] = {
3913 REGULATOR_SUPPLY("8901_lvs2", NULL),
3914};
3915static struct regulator_consumer_supply vreg_consumers_PM8901_LVS3[] = {
3916 REGULATOR_SUPPLY("8901_lvs3", NULL),
3917};
3918static struct regulator_consumer_supply vreg_consumers_PM8901_MVS0[] = {
3919 REGULATOR_SUPPLY("8901_mvs0", NULL),
3920};
3921
David Collins6f032ba2011-08-31 14:08:15 -07003922/* Pin control regulators */
3923static struct regulator_consumer_supply vreg_consumers_PM8058_L8_PC[] = {
3924 REGULATOR_SUPPLY("8058_l8_pc", NULL),
3925};
3926static struct regulator_consumer_supply vreg_consumers_PM8058_L20_PC[] = {
3927 REGULATOR_SUPPLY("8058_l20_pc", NULL),
3928};
3929static struct regulator_consumer_supply vreg_consumers_PM8058_L21_PC[] = {
3930 REGULATOR_SUPPLY("8058_l21_pc", NULL),
3931};
3932static struct regulator_consumer_supply vreg_consumers_PM8058_S2_PC[] = {
3933 REGULATOR_SUPPLY("8058_s2_pc", NULL),
3934};
3935static struct regulator_consumer_supply vreg_consumers_PM8901_L0_PC[] = {
3936 REGULATOR_SUPPLY("8901_l0_pc", NULL),
3937};
3938static struct regulator_consumer_supply vreg_consumers_PM8901_S4_PC[] = {
3939 REGULATOR_SUPPLY("8901_s4_pc", NULL),
3940};
3941
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003942#define RPM_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
3943 _default_uV, _peak_uA, _avg_uA, _pull_down, _pin_ctrl, \
David Collins15789042012-03-19 10:44:36 -07003944 _freq, _pin_fn, _force_mode, _sleep_set_force_mode, \
3945 _state, _sleep_selectable, _always_on) \
David Collins6f032ba2011-08-31 14:08:15 -07003946 { \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003947 .init_data = { \
3948 .constraints = { \
David Collins6f032ba2011-08-31 14:08:15 -07003949 .valid_modes_mask = _modes, \
3950 .valid_ops_mask = _ops, \
3951 .min_uV = _min_uV, \
3952 .max_uV = _max_uV, \
3953 .input_uV = _min_uV, \
3954 .apply_uV = _apply_uV, \
3955 .always_on = _always_on, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003956 }, \
David Collins6f032ba2011-08-31 14:08:15 -07003957 .consumer_supplies = vreg_consumers_##_id, \
3958 .num_consumer_supplies = \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003959 ARRAY_SIZE(vreg_consumers_##_id), \
3960 }, \
David Collins6f032ba2011-08-31 14:08:15 -07003961 .id = RPM_VREG_ID_##_id, \
3962 .default_uV = _default_uV, \
3963 .peak_uA = _peak_uA, \
3964 .avg_uA = _avg_uA, \
3965 .pull_down_enable = _pull_down, \
3966 .pin_ctrl = _pin_ctrl, \
3967 .freq = RPM_VREG_FREQ_##_freq, \
3968 .pin_fn = _pin_fn, \
3969 .force_mode = _force_mode, \
David Collins15789042012-03-19 10:44:36 -07003970 .sleep_set_force_mode = _sleep_set_force_mode, \
David Collins6f032ba2011-08-31 14:08:15 -07003971 .state = _state, \
3972 .sleep_selectable = _sleep_selectable, \
3973 }
3974
3975/* Pin control initialization */
3976#define RPM_PC(_id, _always_on, _pin_fn, _pin_ctrl) \
3977 { \
3978 .init_data = { \
3979 .constraints = { \
3980 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
3981 .always_on = _always_on, \
3982 }, \
3983 .num_consumer_supplies = \
3984 ARRAY_SIZE(vreg_consumers_##_id##_PC), \
3985 .consumer_supplies = vreg_consumers_##_id##_PC, \
3986 }, \
3987 .id = RPM_VREG_ID_##_id##_PC, \
3988 .pin_fn = RPM_VREG_PIN_FN_8660_##_pin_fn, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003989 .pin_ctrl = _pin_ctrl, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003990 }
3991
3992/*
3993 * The default LPM/HPM state of an RPM controlled regulator can be controlled
3994 * via the peak_uA value specified in the table below. If the value is less
3995 * than the high power min threshold for the regulator, then the regulator will
3996 * be set to LPM. Otherwise, it will be set to HPM.
3997 *
3998 * This value can be further overridden by specifying an initial mode via
3999 * .init_data.constraints.initial_mode.
4000 */
4001
David Collins6f032ba2011-08-31 14:08:15 -07004002#define RPM_LDO(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
4003 _init_peak_uA) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004004 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_FAST | \
4005 REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE | \
4006 REGULATOR_MODE_STANDBY, REGULATOR_CHANGE_VOLTAGE | \
4007 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
4008 REGULATOR_CHANGE_DRMS, 0, _min_uV, _init_peak_uA, \
David Collins6f032ba2011-08-31 14:08:15 -07004009 _init_peak_uA, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4010 RPM_VREG_PIN_FN_8660_ENABLE, \
David Collins15789042012-03-19 10:44:36 -07004011 RPM_VREG_FORCE_MODE_8660_NONE, \
David Collins6f032ba2011-08-31 14:08:15 -07004012 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004013 _sleep_selectable, _always_on)
4014
David Collins6f032ba2011-08-31 14:08:15 -07004015#define RPM_SMPS(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
4016 _init_peak_uA, _freq) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004017 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_FAST | \
4018 REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE | \
4019 REGULATOR_MODE_STANDBY, REGULATOR_CHANGE_VOLTAGE | \
4020 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
4021 REGULATOR_CHANGE_DRMS, 0, _min_uV, _init_peak_uA, \
David Collins6f032ba2011-08-31 14:08:15 -07004022 _init_peak_uA, _pd, RPM_VREG_PIN_CTRL_NONE, _freq, \
4023 RPM_VREG_PIN_FN_8660_ENABLE, \
David Collins15789042012-03-19 10:44:36 -07004024 RPM_VREG_FORCE_MODE_8660_NONE, \
David Collins6f032ba2011-08-31 14:08:15 -07004025 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4026 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004027
David Collins6f032ba2011-08-31 14:08:15 -07004028#define RPM_VS(_id, _always_on, _pd, _sleep_selectable) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004029 RPM_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE, \
4030 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE, 0, 0, \
David Collins6f032ba2011-08-31 14:08:15 -07004031 1000, 1000, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4032 RPM_VREG_PIN_FN_8660_ENABLE, \
David Collins15789042012-03-19 10:44:36 -07004033 RPM_VREG_FORCE_MODE_8660_NONE, \
David Collins6f032ba2011-08-31 14:08:15 -07004034 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4035 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004036
David Collins6f032ba2011-08-31 14:08:15 -07004037#define RPM_NCP(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004038 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_NORMAL, \
4039 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, 0, \
David Collins6f032ba2011-08-31 14:08:15 -07004040 _min_uV, 1000, 1000, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4041 RPM_VREG_PIN_FN_8660_ENABLE, \
David Collins15789042012-03-19 10:44:36 -07004042 RPM_VREG_FORCE_MODE_8660_NONE, \
David Collins6f032ba2011-08-31 14:08:15 -07004043 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4044 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004045
David Collins6f032ba2011-08-31 14:08:15 -07004046#define LDO50HMIN RPM_VREG_8660_LDO_50_HPM_MIN_LOAD
4047#define LDO150HMIN RPM_VREG_8660_LDO_150_HPM_MIN_LOAD
4048#define LDO300HMIN RPM_VREG_8660_LDO_300_HPM_MIN_LOAD
4049#define SMPS_HMIN RPM_VREG_8660_SMPS_HPM_MIN_LOAD
4050#define FTS_HMIN RPM_VREG_8660_FTSMPS_HPM_MIN_LOAD
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004051
David Collins6f032ba2011-08-31 14:08:15 -07004052/* RPM early regulator constraints */
4053static struct rpm_regulator_init_data rpm_regulator_early_init_data[] = {
4054 /* ID a_on pd ss min_uV max_uV init_ip freq */
Matt Wagantall2ecbec22012-03-13 23:18:07 -07004055 RPM_SMPS(PM8058_S0, 0, 1, 1, 500000, 1325000, SMPS_HMIN, 1p60),
David Collins6f032ba2011-08-31 14:08:15 -07004056 RPM_SMPS(PM8058_S1, 0, 1, 1, 500000, 1250000, SMPS_HMIN, 1p60),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004057};
4058
David Collins6f032ba2011-08-31 14:08:15 -07004059/* RPM regulator constraints */
4060static struct rpm_regulator_init_data rpm_regulator_init_data[] = {
4061 /* ID a_on pd ss min_uV max_uV init_ip */
4062 RPM_LDO(PM8058_L0, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
4063 RPM_LDO(PM8058_L1, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4064 RPM_LDO(PM8058_L2, 0, 1, 0, 1800000, 2600000, LDO300HMIN),
4065 RPM_LDO(PM8058_L3, 0, 1, 0, 1800000, 1800000, LDO150HMIN),
4066 RPM_LDO(PM8058_L4, 0, 1, 0, 2850000, 2850000, LDO50HMIN),
4067 RPM_LDO(PM8058_L5, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4068 RPM_LDO(PM8058_L6, 0, 1, 0, 3000000, 3600000, LDO50HMIN),
4069 RPM_LDO(PM8058_L7, 0, 1, 0, 1800000, 1800000, LDO50HMIN),
4070 RPM_LDO(PM8058_L8, 0, 1, 0, 2900000, 3050000, LDO300HMIN),
4071 RPM_LDO(PM8058_L9, 0, 1, 0, 1800000, 1800000, LDO300HMIN),
4072 RPM_LDO(PM8058_L10, 0, 1, 0, 2600000, 2600000, LDO300HMIN),
4073 RPM_LDO(PM8058_L11, 0, 1, 0, 1500000, 1500000, LDO150HMIN),
4074 RPM_LDO(PM8058_L12, 0, 1, 0, 2900000, 2900000, LDO150HMIN),
4075 RPM_LDO(PM8058_L13, 0, 1, 0, 2050000, 2050000, LDO300HMIN),
4076 RPM_LDO(PM8058_L14, 0, 0, 0, 2850000, 2850000, LDO300HMIN),
4077 RPM_LDO(PM8058_L15, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4078 RPM_LDO(PM8058_L16, 1, 1, 0, 1800000, 1800000, LDO300HMIN),
4079 RPM_LDO(PM8058_L17, 0, 1, 0, 2600000, 2600000, LDO150HMIN),
4080 RPM_LDO(PM8058_L18, 0, 1, 0, 2200000, 2200000, LDO150HMIN),
4081 RPM_LDO(PM8058_L19, 0, 1, 0, 2500000, 2500000, LDO150HMIN),
4082 RPM_LDO(PM8058_L20, 0, 1, 0, 1800000, 1800000, LDO150HMIN),
4083 RPM_LDO(PM8058_L21, 1, 1, 0, 1200000, 1200000, LDO150HMIN),
4084 RPM_LDO(PM8058_L22, 0, 1, 0, 1150000, 1150000, LDO300HMIN),
4085 RPM_LDO(PM8058_L23, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4086 RPM_LDO(PM8058_L24, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
4087 RPM_LDO(PM8058_L25, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004088
David Collins6f032ba2011-08-31 14:08:15 -07004089 /* ID a_on pd ss min_uV max_uV init_ip freq */
4090 RPM_SMPS(PM8058_S2, 0, 1, 1, 1200000, 1400000, SMPS_HMIN, 1p60),
4091 RPM_SMPS(PM8058_S3, 1, 1, 0, 1800000, 1800000, SMPS_HMIN, 1p60),
4092 RPM_SMPS(PM8058_S4, 1, 1, 0, 2200000, 2200000, SMPS_HMIN, 1p60),
4093
4094 /* ID a_on pd ss */
4095 RPM_VS(PM8058_LVS0, 0, 1, 0),
4096 RPM_VS(PM8058_LVS1, 0, 1, 0),
4097
4098 /* ID a_on pd ss min_uV max_uV */
4099 RPM_NCP(PM8058_NCP, 0, 1, 0, 1800000, 1800000),
4100
4101 /* ID a_on pd ss min_uV max_uV init_ip */
4102 RPM_LDO(PM8901_L0, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4103 RPM_LDO(PM8901_L1, 0, 1, 0, 3300000, 3300000, LDO300HMIN),
4104 RPM_LDO(PM8901_L2, 0, 1, 0, 2850000, 3300000, LDO300HMIN),
4105 RPM_LDO(PM8901_L3, 0, 1, 0, 3300000, 3300000, LDO300HMIN),
4106 RPM_LDO(PM8901_L4, 0, 1, 0, 2600000, 2600000, LDO300HMIN),
4107 RPM_LDO(PM8901_L5, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4108 RPM_LDO(PM8901_L6, 0, 1, 0, 2200000, 2200000, LDO300HMIN),
4109
4110 /* ID a_on pd ss min_uV max_uV init_ip freq */
4111 RPM_SMPS(PM8901_S2, 0, 1, 0, 1300000, 1300000, FTS_HMIN, 1p60),
4112 RPM_SMPS(PM8901_S3, 0, 1, 0, 1100000, 1100000, FTS_HMIN, 1p60),
4113 RPM_SMPS(PM8901_S4, 0, 1, 0, 1225000, 1225000, FTS_HMIN, 1p60),
4114
4115 /* ID a_on pd ss */
4116 RPM_VS(PM8901_LVS0, 1, 1, 0),
4117 RPM_VS(PM8901_LVS1, 0, 1, 0),
4118 RPM_VS(PM8901_LVS2, 0, 1, 0),
4119 RPM_VS(PM8901_LVS3, 0, 1, 0),
4120 RPM_VS(PM8901_MVS0, 0, 1, 0),
4121
4122 /* ID a_on pin_func pin_ctrl */
4123 RPM_PC(PM8058_L8, 0, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4124 RPM_PC(PM8058_L20, 0, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4125 RPM_PC(PM8058_L21, 1, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4126 RPM_PC(PM8058_S2, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8058_A0),
4127 RPM_PC(PM8901_L0, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8901_A0),
4128 RPM_PC(PM8901_S4, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8901_A0),
4129};
4130
4131static struct rpm_regulator_platform_data rpm_regulator_early_pdata = {
4132 .init_data = rpm_regulator_early_init_data,
4133 .num_regulators = ARRAY_SIZE(rpm_regulator_early_init_data),
4134 .version = RPM_VREG_VERSION_8660,
4135 .vreg_id_vdd_mem = RPM_VREG_ID_PM8058_S0,
4136 .vreg_id_vdd_dig = RPM_VREG_ID_PM8058_S1,
4137};
4138
4139static struct rpm_regulator_platform_data rpm_regulator_pdata = {
4140 .init_data = rpm_regulator_init_data,
4141 .num_regulators = ARRAY_SIZE(rpm_regulator_init_data),
4142 .version = RPM_VREG_VERSION_8660,
4143};
4144
4145static struct platform_device rpm_regulator_early_device = {
4146 .name = "rpm-regulator",
4147 .id = 0,
4148 .dev = {
4149 .platform_data = &rpm_regulator_early_pdata,
4150 },
4151};
4152
4153static struct platform_device rpm_regulator_device = {
4154 .name = "rpm-regulator",
4155 .id = 1,
4156 .dev = {
4157 .platform_data = &rpm_regulator_pdata,
4158 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004159};
4160
4161static struct platform_device *early_regulators[] __initdata = {
4162 &msm_device_saw_s0,
4163 &msm_device_saw_s1,
David Collins6f032ba2011-08-31 14:08:15 -07004164 &rpm_regulator_early_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004165};
4166
4167static struct platform_device *early_devices[] __initdata = {
4168#ifdef CONFIG_MSM_BUS_SCALING
4169 &msm_bus_apps_fabric,
4170 &msm_bus_sys_fabric,
4171 &msm_bus_mm_fabric,
4172 &msm_bus_sys_fpb,
4173 &msm_bus_cpss_fpb,
4174#endif
4175 &msm_device_dmov_adm0,
4176 &msm_device_dmov_adm1,
4177};
4178
4179#if (defined(CONFIG_MARIMBA_CORE)) && \
4180 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
4181
4182static int bluetooth_power(int);
4183static struct platform_device msm_bt_power_device = {
4184 .name = "bt_power",
4185 .id = -1,
4186 .dev = {
4187 .platform_data = &bluetooth_power,
4188 },
4189};
4190#endif
4191
4192static struct platform_device msm_tsens_device = {
4193 .name = "tsens-tm",
4194 .id = -1,
4195};
4196
4197static struct platform_device *rumi_sim_devices[] __initdata = {
4198 &smc91x_device,
4199 &msm_device_uart_dm12,
4200#ifdef CONFIG_I2C_QUP
4201 &msm_gsbi3_qup_i2c_device,
4202 &msm_gsbi4_qup_i2c_device,
4203 &msm_gsbi7_qup_i2c_device,
4204 &msm_gsbi8_qup_i2c_device,
4205 &msm_gsbi9_qup_i2c_device,
4206 &msm_gsbi12_qup_i2c_device,
4207#endif
4208#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004209 &msm_device_ssbi3,
4210#endif
4211#ifdef CONFIG_ANDROID_PMEM
Laura Abbottdf8b8a82011-11-02 23:13:45 -07004212#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004213 &android_pmem_device,
4214 &android_pmem_adsp_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004215 &android_pmem_smipool_device,
Laura Abbottdf8b8a82011-11-02 23:13:45 -07004216 &android_pmem_audio_device,
Chaithanya Krishna Bacharaju23685fb2012-03-19 11:43:53 +05304217#endif /*CONFIG_MSM_MULTIMEDIA_USE_ION*/
4218#endif /*CONFIG_ANDROID_PMEM*/
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004219#ifdef CONFIG_MSM_ROTATOR
4220 &msm_rotator_device,
4221#endif
4222 &msm_fb_device,
4223 &msm_kgsl_3d0,
4224 &msm_kgsl_2d0,
4225 &msm_kgsl_2d1,
4226 &lcdc_samsung_panel_device,
4227#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
4228 &hdmi_msm_device,
4229#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
4230#ifdef CONFIG_MSM_CAMERA
Kevin Chan3be11612012-03-22 20:05:40 -07004231#ifndef CONFIG_MSM_CAMERA_V4L2
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004232#ifdef CONFIG_MT9E013
4233 &msm_camera_sensor_mt9e013,
4234#endif
4235#ifdef CONFIG_IMX074
4236 &msm_camera_sensor_imx074,
4237#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04004238#ifdef CONFIG_VX6953
4239 &msm_camera_sensor_vx6953,
4240#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004241#ifdef CONFIG_WEBCAM_OV7692
4242 &msm_camera_sensor_webcam_ov7692,
4243#endif
4244#ifdef CONFIG_WEBCAM_OV9726
4245 &msm_camera_sensor_webcam_ov9726,
4246#endif
4247#ifdef CONFIG_QS_S5K4E1
4248 &msm_camera_sensor_qs_s5k4e1,
4249#endif
4250#endif
Kevin Chan3be11612012-03-22 20:05:40 -07004251#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004252#ifdef CONFIG_MSM_GEMINI
4253 &msm_gemini_device,
4254#endif
4255#ifdef CONFIG_MSM_VPE
Kevin Chan3be11612012-03-22 20:05:40 -07004256#ifndef CONFIG_MSM_CAMERA_V4L2
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004257 &msm_vpe_device,
4258#endif
Kevin Chan3be11612012-03-22 20:05:40 -07004259#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004260 &msm_device_vidc,
4261};
4262
4263#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
4264enum {
4265 SX150X_CORE,
4266 SX150X_DOCKING,
4267 SX150X_SURF,
4268 SX150X_LEFT_FHA,
4269 SX150X_RIGHT_FHA,
4270 SX150X_SOUTH,
4271 SX150X_NORTH,
4272 SX150X_CORE_FLUID,
4273};
4274
4275static struct sx150x_platform_data sx150x_data[] __initdata = {
4276 [SX150X_CORE] = {
4277 .gpio_base = GPIO_CORE_EXPANDER_BASE,
4278 .oscio_is_gpo = false,
4279 .io_pullup_ena = 0x0c08,
4280 .io_pulldn_ena = 0x4060,
4281 .io_open_drain_ena = 0x000c,
4282 .io_polarity = 0,
4283 .irq_summary = -1, /* see fixup_i2c_configs() */
4284 .irq_base = GPIO_EXPANDER_IRQ_BASE,
4285 },
4286 [SX150X_DOCKING] = {
4287 .gpio_base = GPIO_DOCKING_EXPANDER_BASE,
4288 .oscio_is_gpo = false,
4289 .io_pullup_ena = 0x5e06,
4290 .io_pulldn_ena = 0x81b8,
4291 .io_open_drain_ena = 0,
4292 .io_polarity = 0,
4293 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4294 UI_INT2_N),
4295 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4296 GPIO_DOCKING_EXPANDER_BASE -
4297 GPIO_EXPANDER_GPIO_BASE,
4298 },
4299 [SX150X_SURF] = {
4300 .gpio_base = GPIO_SURF_EXPANDER_BASE,
4301 .oscio_is_gpo = false,
4302 .io_pullup_ena = 0,
4303 .io_pulldn_ena = 0,
4304 .io_open_drain_ena = 0,
4305 .io_polarity = 0,
4306 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4307 UI_INT1_N),
4308 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4309 GPIO_SURF_EXPANDER_BASE -
4310 GPIO_EXPANDER_GPIO_BASE,
4311 },
4312 [SX150X_LEFT_FHA] = {
4313 .gpio_base = GPIO_LEFT_KB_EXPANDER_BASE,
4314 .oscio_is_gpo = false,
4315 .io_pullup_ena = 0,
4316 .io_pulldn_ena = 0x40,
4317 .io_open_drain_ena = 0,
4318 .io_polarity = 0,
4319 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4320 UI_INT3_N),
4321 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4322 GPIO_LEFT_KB_EXPANDER_BASE -
4323 GPIO_EXPANDER_GPIO_BASE,
4324 },
4325 [SX150X_RIGHT_FHA] = {
4326 .gpio_base = GPIO_RIGHT_KB_EXPANDER_BASE,
4327 .oscio_is_gpo = true,
4328 .io_pullup_ena = 0,
4329 .io_pulldn_ena = 0,
4330 .io_open_drain_ena = 0,
4331 .io_polarity = 0,
4332 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4333 UI_INT3_N),
4334 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4335 GPIO_RIGHT_KB_EXPANDER_BASE -
4336 GPIO_EXPANDER_GPIO_BASE,
4337 },
4338 [SX150X_SOUTH] = {
4339 .gpio_base = GPIO_SOUTH_EXPANDER_BASE,
4340 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4341 GPIO_SOUTH_EXPANDER_BASE -
4342 GPIO_EXPANDER_GPIO_BASE,
4343 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT3_N),
4344 },
4345 [SX150X_NORTH] = {
4346 .gpio_base = GPIO_NORTH_EXPANDER_BASE,
4347 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4348 GPIO_NORTH_EXPANDER_BASE -
4349 GPIO_EXPANDER_GPIO_BASE,
4350 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT3_N),
4351 .oscio_is_gpo = true,
4352 .io_open_drain_ena = 0x30,
4353 },
4354 [SX150X_CORE_FLUID] = {
4355 .gpio_base = GPIO_CORE_EXPANDER_BASE,
4356 .oscio_is_gpo = false,
4357 .io_pullup_ena = 0x0408,
4358 .io_pulldn_ena = 0x4060,
4359 .io_open_drain_ena = 0x0008,
4360 .io_polarity = 0,
4361 .irq_summary = -1, /* see fixup_i2c_configs() */
4362 .irq_base = GPIO_EXPANDER_IRQ_BASE,
4363 },
4364};
4365
4366#ifdef CONFIG_SENSORS_MSM_ADC
4367/* Configuration of EPM expander is done when client
4368 * request an adc read
4369 */
4370static struct sx150x_platform_data sx150x_epmdata = {
4371 .gpio_base = GPIO_EPM_EXPANDER_BASE,
4372 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4373 GPIO_EPM_EXPANDER_BASE -
4374 GPIO_EXPANDER_GPIO_BASE,
4375 .irq_summary = -1,
4376};
4377#endif
4378
4379/* sx150x_low_power_cfg
4380 *
4381 * This data and init function are used to put unused gpio-expander output
4382 * lines into their low-power states at boot. The init
4383 * function must be deferred until a later init stage because the i2c
4384 * gpio expander drivers do not probe until after they are registered
4385 * (see register_i2c_devices) and the work-queues for those registrations
4386 * are processed. Because these lines are unused, there is no risk of
4387 * competing with a device driver for the gpio.
4388 *
4389 * gpio lines whose low-power states are input are naturally in their low-
4390 * power configurations once probed, see the platform data structures above.
4391 */
4392struct sx150x_low_power_cfg {
4393 unsigned gpio;
4394 unsigned val;
4395};
4396
4397static struct sx150x_low_power_cfg
4398common_sx150x_lp_cfgs[] __initdata = {
4399 {GPIO_WLAN_DEEP_SLEEP_N, 0},
4400 {GPIO_EXT_GPS_LNA_EN, 0},
4401 {GPIO_MSM_WAKES_BT, 0},
4402 {GPIO_USB_UICC_EN, 0},
4403 {GPIO_BATT_GAUGE_EN, 0},
4404};
4405
4406static struct sx150x_low_power_cfg
4407surf_ffa_sx150x_lp_cfgs[] __initdata = {
4408 {GPIO_MIPI_DSI_RST_N, 0},
4409 {GPIO_DONGLE_PWR_EN, 0},
4410 {GPIO_CAP_TS_SLEEP, 1},
4411 {GPIO_WEB_CAMIF_RESET_N, 0},
4412};
4413
4414static void __init
4415cfg_gpio_low_power(struct sx150x_low_power_cfg *cfgs, unsigned nelems)
4416{
4417 unsigned n;
4418 int rc;
4419
4420 for (n = 0; n < nelems; ++n) {
4421 rc = gpio_request(cfgs[n].gpio, NULL);
4422 if (!rc) {
4423 rc = gpio_direction_output(cfgs[n].gpio, cfgs[n].val);
4424 gpio_free(cfgs[n].gpio);
4425 }
4426
4427 if (rc) {
4428 printk(KERN_NOTICE "%s: failed to sleep gpio %d: %d\n",
4429 __func__, cfgs[n].gpio, rc);
4430 }
Steve Muckle9161d302010-02-11 11:50:40 -08004431 }
Steve Mucklea55df6e2010-01-07 12:43:24 -08004432}
4433
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004434static int __init cfg_sx150xs_low_power(void)
Steve Mucklea55df6e2010-01-07 12:43:24 -08004435{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004436 cfg_gpio_low_power(common_sx150x_lp_cfgs,
4437 ARRAY_SIZE(common_sx150x_lp_cfgs));
4438 if (!machine_is_msm8x60_fluid())
4439 cfg_gpio_low_power(surf_ffa_sx150x_lp_cfgs,
4440 ARRAY_SIZE(surf_ffa_sx150x_lp_cfgs));
4441 return 0;
4442}
4443module_init(cfg_sx150xs_low_power);
4444
4445#ifdef CONFIG_I2C
4446static struct i2c_board_info core_expander_i2c_info[] __initdata = {
4447 {
4448 I2C_BOARD_INFO("sx1509q", 0x3e),
4449 .platform_data = &sx150x_data[SX150X_CORE]
4450 },
4451};
4452
4453static struct i2c_board_info docking_expander_i2c_info[] __initdata = {
4454 {
4455 I2C_BOARD_INFO("sx1509q", 0x3f),
4456 .platform_data = &sx150x_data[SX150X_DOCKING]
4457 },
4458};
4459
4460static struct i2c_board_info surf_expanders_i2c_info[] __initdata = {
4461 {
4462 I2C_BOARD_INFO("sx1509q", 0x70),
4463 .platform_data = &sx150x_data[SX150X_SURF]
4464 }
4465};
4466
4467static struct i2c_board_info fha_expanders_i2c_info[] __initdata = {
4468 {
4469 I2C_BOARD_INFO("sx1508q", 0x21),
4470 .platform_data = &sx150x_data[SX150X_LEFT_FHA]
4471 },
4472 {
4473 I2C_BOARD_INFO("sx1508q", 0x22),
4474 .platform_data = &sx150x_data[SX150X_RIGHT_FHA]
4475 }
4476};
4477
4478static struct i2c_board_info fluid_expanders_i2c_info[] __initdata = {
4479 {
4480 I2C_BOARD_INFO("sx1508q", 0x23),
4481 .platform_data = &sx150x_data[SX150X_SOUTH]
4482 },
4483 {
4484 I2C_BOARD_INFO("sx1508q", 0x20),
4485 .platform_data = &sx150x_data[SX150X_NORTH]
4486 }
4487};
4488
4489static struct i2c_board_info fluid_core_expander_i2c_info[] __initdata = {
4490 {
4491 I2C_BOARD_INFO("sx1509q", 0x3e),
4492 .platform_data = &sx150x_data[SX150X_CORE_FLUID]
4493 },
4494};
4495
4496#ifdef CONFIG_SENSORS_MSM_ADC
4497static struct i2c_board_info fluid_expanders_i2c_epm_info[] = {
4498 {
4499 I2C_BOARD_INFO("sx1509q", 0x3e),
4500 .platform_data = &sx150x_epmdata
4501 },
4502};
4503#endif
4504#endif
4505#endif
4506
4507#ifdef CONFIG_SENSORS_MSM_ADC
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004508
4509static struct adc_access_fn xoadc_fn = {
4510 pm8058_xoadc_select_chan_and_start_conv,
4511 pm8058_xoadc_read_adc_code,
4512 pm8058_xoadc_get_properties,
4513 pm8058_xoadc_slot_request,
4514 pm8058_xoadc_restore_slot,
4515 pm8058_xoadc_calibrate,
4516};
4517
4518#if defined(CONFIG_I2C) && \
4519 (defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE))
4520static struct regulator *vreg_adc_epm1;
4521
4522static struct i2c_client *epm_expander_i2c_register_board(void)
4523
4524{
4525 struct i2c_adapter *i2c_adap;
4526 struct i2c_client *client = NULL;
4527 i2c_adap = i2c_get_adapter(0x0);
4528
4529 if (i2c_adap == NULL)
4530 printk(KERN_ERR "\nepm_expander_i2c_adapter is NULL\n");
4531
4532 if (i2c_adap != NULL)
4533 client = i2c_new_device(i2c_adap,
4534 &fluid_expanders_i2c_epm_info[0]);
4535 return client;
4536
4537}
4538
4539static unsigned int msm_adc_gpio_configure_expander_enable(void)
4540{
4541 int rc = 0;
4542 static struct i2c_client *epm_i2c_client;
4543
4544 printk(KERN_DEBUG "Enter msm_adc_gpio_configure_expander_enable\n");
4545
4546 vreg_adc_epm1 = regulator_get(NULL, "8058_s3");
4547
4548 if (IS_ERR(vreg_adc_epm1)) {
4549 printk(KERN_ERR "%s: Unable to get 8058_s3\n", __func__);
4550 return 0;
4551 }
4552
4553 rc = regulator_set_voltage(vreg_adc_epm1, 1800000, 1800000);
4554 if (rc)
4555 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4556 "regulator set voltage failed\n");
4557
4558 rc = regulator_enable(vreg_adc_epm1);
4559 if (rc) {
4560 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4561 "Error while enabling regulator for epm s3 %d\n", rc);
4562 return rc;
4563 }
4564
4565 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: Start"
4566 " setting the value of the EPM 3.3, 5v and lvlsft\n");
4567
4568 msleep(1000);
4569
4570 rc = gpio_request(GPIO_EPM_5V_BOOST_EN, "boost_epm_5v");
4571 if (!rc) {
4572 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4573 "Configure 5v boost\n");
4574 gpio_direction_output(GPIO_EPM_5V_BOOST_EN, 1);
4575 } else {
4576 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4577 "Error for epm 5v boost en\n");
4578 goto exit_vreg_epm;
4579 }
4580
4581 msleep(500);
4582
4583 rc = gpio_request(GPIO_EPM_3_3V_EN, "epm_3_3v");
4584 if (!rc) {
4585 gpio_direction_output(GPIO_EPM_3_3V_EN, 1);
4586 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4587 "Configure epm 3.3v\n");
4588 } else {
4589 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4590 "Error for gpio 3.3ven\n");
4591 goto exit_vreg_epm;
4592 }
4593 msleep(500);
4594
4595 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4596 "Trying to request EPM LVLSFT_EN\n");
4597 rc = gpio_request(GPIO_EPM_LVLSFT_EN, "lvsft_en");
4598 if (!rc) {
4599 gpio_direction_output(GPIO_EPM_LVLSFT_EN, 1);
4600 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4601 "Configure the lvlsft\n");
4602 } else {
4603 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4604 "Error for epm lvlsft_en\n");
4605 goto exit_vreg_epm;
4606 }
4607
4608 msleep(500);
4609
4610 if (!epm_i2c_client)
4611 epm_i2c_client = epm_expander_i2c_register_board();
4612
4613 rc = gpio_request(GPIO_PWR_MON_ENABLE, "pwr_mon_enable");
4614 if (!rc)
4615 rc = gpio_direction_output(GPIO_PWR_MON_ENABLE, 1);
4616 if (rc) {
4617 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4618 ": GPIO PWR MON Enable issue\n");
4619 goto exit_vreg_epm;
4620 }
4621
4622 msleep(1000);
4623
4624 rc = gpio_request(GPIO_ADC1_PWDN_N, "adc1_pwdn");
4625 if (!rc) {
4626 rc = gpio_direction_output(GPIO_ADC1_PWDN_N, 1);
4627 if (rc) {
4628 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4629 ": ADC1_PWDN error direction out\n");
4630 goto exit_vreg_epm;
4631 }
4632 }
4633
4634 msleep(100);
4635
4636 rc = gpio_request(GPIO_ADC2_PWDN_N, "adc2_pwdn");
4637 if (!rc) {
4638 rc = gpio_direction_output(GPIO_ADC2_PWDN_N, 1);
4639 if (rc) {
4640 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4641 ": ADC2_PWD error direction out\n");
4642 goto exit_vreg_epm;
4643 }
4644 }
4645
4646 msleep(1000);
4647
4648 rc = gpio_request(GPIO_PWR_MON_START, "pwr_mon_start");
4649 if (!rc) {
4650 rc = gpio_direction_output(GPIO_PWR_MON_START, 0);
4651 if (rc) {
4652 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4653 "Gpio request problem %d\n", rc);
4654 goto exit_vreg_epm;
4655 }
4656 }
4657
4658 rc = gpio_request(GPIO_EPM_SPI_ADC1_CS_N, "spi_adc1_cs");
4659 if (!rc) {
4660 rc = gpio_direction_output(GPIO_EPM_SPI_ADC1_CS_N, 0);
4661 if (rc) {
4662 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4663 ": EPM_SPI_ADC1_CS_N error\n");
4664 goto exit_vreg_epm;
4665 }
4666 }
4667
4668 rc = gpio_request(GPIO_EPM_SPI_ADC2_CS_N, "spi_adc2_cs");
4669 if (!rc) {
4670 rc = gpio_direction_output(GPIO_EPM_SPI_ADC2_CS_N, 0);
4671 if (rc) {
4672 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4673 ": EPM_SPI_ADC2_Cs_N error\n");
4674 goto exit_vreg_epm;
4675 }
4676 }
4677
4678 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: Set "
4679 "the power monitor reset for epm\n");
4680
4681 rc = gpio_request(GPIO_PWR_MON_RESET_N, "pwr_mon_reset_n");
4682 if (!rc) {
4683 gpio_direction_output(GPIO_PWR_MON_RESET_N, 0);
4684 if (rc) {
4685 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4686 ": Error in the power mon reset\n");
4687 goto exit_vreg_epm;
4688 }
4689 }
4690
4691 msleep(1000);
4692
4693 gpio_set_value_cansleep(GPIO_PWR_MON_RESET_N, 1);
4694
4695 msleep(500);
4696
4697 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4698
4699 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4700
4701 return rc;
4702
4703exit_vreg_epm:
4704 regulator_disable(vreg_adc_epm1);
4705
4706 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: Exit."
4707 " rc = %d.\n", rc);
4708 return rc;
4709};
4710
4711static unsigned int msm_adc_gpio_configure_expander_disable(void)
4712{
4713 int rc = 0;
4714
4715 gpio_set_value_cansleep(GPIO_PWR_MON_RESET_N, 0);
4716 gpio_free(GPIO_PWR_MON_RESET_N);
4717
4718 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 0);
4719 gpio_free(GPIO_EPM_SPI_ADC1_CS_N);
4720
4721 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 0);
4722 gpio_free(GPIO_EPM_SPI_ADC2_CS_N);
4723
4724 gpio_set_value_cansleep(GPIO_PWR_MON_START, 0);
4725 gpio_free(GPIO_PWR_MON_START);
4726
4727 gpio_direction_output(GPIO_ADC1_PWDN_N, 0);
4728 gpio_free(GPIO_ADC1_PWDN_N);
4729
4730 gpio_direction_output(GPIO_ADC2_PWDN_N, 0);
4731 gpio_free(GPIO_ADC2_PWDN_N);
4732
4733 gpio_set_value_cansleep(GPIO_PWR_MON_ENABLE, 0);
4734 gpio_free(GPIO_PWR_MON_ENABLE);
4735
4736 gpio_set_value_cansleep(GPIO_EPM_LVLSFT_EN, 0);
4737 gpio_free(GPIO_EPM_LVLSFT_EN);
4738
4739 gpio_set_value_cansleep(GPIO_EPM_5V_BOOST_EN, 0);
4740 gpio_free(GPIO_EPM_5V_BOOST_EN);
4741
4742 gpio_set_value_cansleep(GPIO_EPM_3_3V_EN, 0);
4743 gpio_free(GPIO_EPM_3_3V_EN);
4744
4745 rc = regulator_disable(vreg_adc_epm1);
4746 if (rc)
4747 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_disable: "
4748 "Error while enabling regulator for epm s3 %d\n", rc);
4749 regulator_put(vreg_adc_epm1);
4750
4751 printk(KERN_DEBUG "Exi msm_adc_gpio_configure_expander_disable\n");
4752 return rc;
4753};
4754
4755unsigned int msm_adc_gpio_expander_enable(int cs_enable)
4756{
4757 int rc = 0;
4758
4759 printk(KERN_DEBUG "msm_adc_gpio_expander_enable: cs_enable = %d",
4760 cs_enable);
4761
4762 if (cs_enable < 16) {
4763 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 0);
4764 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4765 } else {
4766 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 0);
4767 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4768 }
4769 return rc;
4770};
4771
4772unsigned int msm_adc_gpio_expander_disable(int cs_disable)
4773{
4774 int rc = 0;
4775
4776 printk(KERN_DEBUG "Enter msm_adc_gpio_expander_disable.\n");
4777
4778 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4779
4780 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4781
4782 return rc;
4783};
4784#endif
4785
4786static struct msm_adc_channels msm_adc_channels_data[] = {
4787 {"vbatt", CHANNEL_ADC_VBATT, 0, &xoadc_fn, CHAN_PATH_TYPE2,
4788 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4789 {"vcoin", CHANNEL_ADC_VCOIN, 0, &xoadc_fn, CHAN_PATH_TYPE1,
4790 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4791 {"vcharger_channel", CHANNEL_ADC_VCHG, 0, &xoadc_fn, CHAN_PATH_TYPE3,
4792 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE4, scale_default},
4793 {"charger_current_monitor", CHANNEL_ADC_CHG_MONITOR, 0, &xoadc_fn,
4794 CHAN_PATH_TYPE4,
4795 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_default},
4796 {"vph_pwr", CHANNEL_ADC_VPH_PWR, 0, &xoadc_fn, CHAN_PATH_TYPE5,
4797 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4798 {"usb_vbus", CHANNEL_ADC_USB_VBUS, 0, &xoadc_fn, CHAN_PATH_TYPE11,
4799 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4800 {"pmic_therm", CHANNEL_ADC_DIE_TEMP, 0, &xoadc_fn, CHAN_PATH_TYPE12,
4801 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_pmic_therm},
4802 {"pmic_therm_4K", CHANNEL_ADC_DIE_TEMP_4K, 0, &xoadc_fn,
4803 CHAN_PATH_TYPE12,
4804 ADC_CONFIG_TYPE1, ADC_CALIB_CONFIG_TYPE7, scale_pmic_therm},
4805 {"xo_therm", CHANNEL_ADC_XOTHERM, 0, &xoadc_fn, CHAN_PATH_TYPE_NONE,
4806 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE5, tdkntcgtherm},
4807 {"xo_therm_4K", CHANNEL_ADC_XOTHERM_4K, 0, &xoadc_fn,
4808 CHAN_PATH_TYPE_NONE,
4809 ADC_CONFIG_TYPE1, ADC_CALIB_CONFIG_TYPE6, tdkntcgtherm},
4810 {"hdset_detect", CHANNEL_ADC_HDSET, 0, &xoadc_fn, CHAN_PATH_TYPE6,
4811 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_default},
4812 {"chg_batt_amon", CHANNEL_ADC_BATT_AMON, 0, &xoadc_fn, CHAN_PATH_TYPE10,
4813 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1,
4814 scale_xtern_chgr_cur},
4815 {"msm_therm", CHANNEL_ADC_MSM_THERM, 0, &xoadc_fn, CHAN_PATH_TYPE8,
4816 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_msm_therm},
4817 {"batt_therm", CHANNEL_ADC_BATT_THERM, 0, &xoadc_fn, CHAN_PATH_TYPE7,
4818 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_batt_therm},
4819 {"batt_id", CHANNEL_ADC_BATT_ID, 0, &xoadc_fn, CHAN_PATH_TYPE9,
4820 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4821 {"ref_625mv", CHANNEL_ADC_625_REF, 0, &xoadc_fn, CHAN_PATH_TYPE15,
4822 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4823 {"ref_1250mv", CHANNEL_ADC_1250_REF, 0, &xoadc_fn, CHAN_PATH_TYPE13,
4824 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4825 {"ref_325mv", CHANNEL_ADC_325_REF, 0, &xoadc_fn, CHAN_PATH_TYPE14,
4826 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4827};
4828
4829static char *msm_adc_fluid_device_names[] = {
4830 "ADS_ADC1",
4831 "ADS_ADC2",
4832};
4833
4834static struct msm_adc_platform_data msm_adc_pdata = {
4835 .channel = msm_adc_channels_data,
4836 .num_chan_supported = ARRAY_SIZE(msm_adc_channels_data),
4837#if defined(CONFIG_I2C) && \
4838 (defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE))
4839 .adc_gpio_enable = msm_adc_gpio_expander_enable,
4840 .adc_gpio_disable = msm_adc_gpio_expander_disable,
4841 .adc_fluid_enable = msm_adc_gpio_configure_expander_enable,
4842 .adc_fluid_disable = msm_adc_gpio_configure_expander_disable,
4843#endif
4844};
4845
4846static struct platform_device msm_adc_device = {
4847 .name = "msm_adc",
4848 .id = -1,
4849 .dev = {
4850 .platform_data = &msm_adc_pdata,
4851 },
4852};
4853
4854static void pmic8058_xoadc_mpp_config(void)
4855{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304856 int rc, i;
4857 struct pm8xxx_mpp_init_info xoadc_mpps[] = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304858 PM8058_MPP_INIT(XOADC_MPP_3, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304859 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304860 PM8058_MPP_INIT(XOADC_MPP_5, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH9,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304861 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304862 PM8058_MPP_INIT(XOADC_MPP_7, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH6,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304863 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304864 PM8058_MPP_INIT(XOADC_MPP_8, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH8,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304865 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304866 PM8058_MPP_INIT(XOADC_MPP_10, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH7,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304867 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304868 PM8901_MPP_INIT(XOADC_MPP_4, D_OUTPUT, PM8901_MPP_DIG_LEVEL_S4,
4869 DOUT_CTRL_LOW),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304870 };
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004871
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304872 for (i = 0; i < ARRAY_SIZE(xoadc_mpps); i++) {
4873 rc = pm8xxx_mpp_config(xoadc_mpps[i].mpp,
4874 &xoadc_mpps[i].config);
4875 if (rc) {
4876 pr_err("%s: Config MPP %d of PM8058 failed\n",
4877 __func__, xoadc_mpps[i].mpp);
4878 }
4879 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004880}
4881
4882static struct regulator *vreg_ldo18_adc;
4883
4884static int pmic8058_xoadc_vreg_config(int on)
4885{
4886 int rc;
4887
4888 if (on) {
4889 rc = regulator_enable(vreg_ldo18_adc);
4890 if (rc)
4891 pr_err("%s: Enable of regulator ldo18_adc "
4892 "failed\n", __func__);
4893 } else {
4894 rc = regulator_disable(vreg_ldo18_adc);
4895 if (rc)
4896 pr_err("%s: Disable of regulator ldo18_adc "
4897 "failed\n", __func__);
4898 }
4899
4900 return rc;
4901}
4902
4903static int pmic8058_xoadc_vreg_setup(void)
4904{
4905 int rc;
4906
4907 vreg_ldo18_adc = regulator_get(NULL, "8058_l18");
4908 if (IS_ERR(vreg_ldo18_adc)) {
4909 printk(KERN_ERR "%s: vreg get failed (%ld)\n",
4910 __func__, PTR_ERR(vreg_ldo18_adc));
4911 rc = PTR_ERR(vreg_ldo18_adc);
4912 goto fail;
4913 }
4914
4915 rc = regulator_set_voltage(vreg_ldo18_adc, 2200000, 2200000);
4916 if (rc) {
4917 pr_err("%s: unable to set ldo18 voltage to 2.2V\n", __func__);
4918 goto fail;
4919 }
4920
4921 return rc;
4922fail:
4923 regulator_put(vreg_ldo18_adc);
4924 return rc;
4925}
4926
4927static void pmic8058_xoadc_vreg_shutdown(void)
4928{
4929 regulator_put(vreg_ldo18_adc);
4930}
4931
4932/* usec. For this ADC,
4933 * this time represents clk rate @ txco w/ 1024 decimation ratio.
4934 * Each channel has different configuration, thus at the time of starting
4935 * the conversion, xoadc will return actual conversion time
4936 * */
4937static struct adc_properties pm8058_xoadc_data = {
4938 .adc_reference = 2200, /* milli-voltage for this adc */
4939 .bitresolution = 15,
4940 .bipolar = 0,
4941 .conversiontime = 54,
4942};
4943
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304944static struct xoadc_platform_data pm8058_xoadc_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004945 .xoadc_prop = &pm8058_xoadc_data,
4946 .xoadc_mpp_config = pmic8058_xoadc_mpp_config,
4947 .xoadc_vreg_set = pmic8058_xoadc_vreg_config,
4948 .xoadc_num = XOADC_PMIC_0,
4949 .xoadc_vreg_setup = pmic8058_xoadc_vreg_setup,
4950 .xoadc_vreg_shutdown = pmic8058_xoadc_vreg_shutdown,
4951};
4952#endif
4953
4954#ifdef CONFIG_MSM_SDIO_AL
4955
4956static unsigned mdm2ap_status = 140;
4957
4958static int configure_mdm2ap_status(int on)
4959{
4960 int ret = 0;
4961 if (on)
4962 ret = msm_gpiomux_get(mdm2ap_status);
4963 else
4964 ret = msm_gpiomux_put(mdm2ap_status);
4965
4966 if (ret)
4967 pr_err("%s: mdm2ap_status config failed, on = %d\n", __func__,
4968 on);
4969
4970 return ret;
4971}
4972
4973
4974static int get_mdm2ap_status(void)
4975{
4976 return gpio_get_value(mdm2ap_status);
4977}
4978
4979static struct sdio_al_platform_data sdio_al_pdata = {
4980 .config_mdm2ap_status = configure_mdm2ap_status,
4981 .get_mdm2ap_status = get_mdm2ap_status,
4982 .allow_sdioc_version_major_2 = 0,
Konstantin Dorfmanee2e3082011-08-16 15:12:01 +03004983 .peer_sdioc_version_minor = 0x0202,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004984 .peer_sdioc_version_major = 0x0004,
4985 .peer_sdioc_boot_version_minor = 0x0001,
4986 .peer_sdioc_boot_version_major = 0x0003
4987};
4988
4989struct platform_device msm_device_sdio_al = {
4990 .name = "msm_sdio_al",
4991 .id = -1,
4992 .dev = {
Maya Erez6862b142011-08-22 09:07:07 +03004993 .parent = &msm_charm_modem.dev,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004994 .platform_data = &sdio_al_pdata,
4995 },
4996};
4997
4998#endif /* CONFIG_MSM_SDIO_AL */
4999
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05305000#define GPIO_VREG_ID_EXT_5V 0
5001
5002static struct regulator_consumer_supply vreg_consumers_EXT_5V[] = {
5003 REGULATOR_SUPPLY("ext_5v", NULL),
5004 REGULATOR_SUPPLY("8901_mpp0", NULL),
5005};
5006
5007#define GPIO_VREG_INIT(_id, _reg_name, _gpio_label, _gpio, _active_low) \
5008 [GPIO_VREG_ID_##_id] = { \
5009 .init_data = { \
5010 .constraints = { \
5011 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
5012 }, \
5013 .num_consumer_supplies = \
5014 ARRAY_SIZE(vreg_consumers_##_id), \
5015 .consumer_supplies = vreg_consumers_##_id, \
5016 }, \
5017 .regulator_name = _reg_name, \
5018 .active_low = _active_low, \
5019 .gpio_label = _gpio_label, \
5020 .gpio = _gpio, \
5021 }
5022
5023/* GPIO regulator constraints */
5024static struct gpio_regulator_platform_data msm_gpio_regulator_pdata[] = {
5025 GPIO_VREG_INIT(EXT_5V, "ext_5v", "ext_5v_en",
5026 PM8901_MPP_PM_TO_SYS(0), 0),
5027};
5028
5029/* GPIO regulator */
5030static struct platform_device msm8x60_8901_mpp_vreg __devinitdata = {
5031 .name = GPIO_REGULATOR_DEV_NAME,
5032 .id = PM8901_MPP_PM_TO_SYS(0),
5033 .dev = {
5034 .platform_data =
5035 &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V],
5036 },
5037};
5038
5039static void __init pm8901_vreg_mpp0_init(void)
5040{
5041 int rc;
5042
5043 struct pm8xxx_mpp_init_info pm8901_vreg_mpp0 = {
5044 .mpp = PM8901_MPP_PM_TO_SYS(0),
5045 .config = {
5046 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
5047 .level = PM8901_MPP_DIG_LEVEL_VPH,
5048 },
5049 };
5050
5051 /*
5052 * Set PMIC 8901 MPP0 active_high to 0 for surf and charm_surf. This
5053 * implies that the regulator connected to MPP0 is enabled when
5054 * MPP0 is low.
5055 */
5056 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion()) {
5057 msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V].active_low = 1;
5058 pm8901_vreg_mpp0.config.control = PM8XXX_MPP_DOUT_CTRL_HIGH;
5059 } else {
5060 msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V].active_low = 0;
5061 pm8901_vreg_mpp0.config.control = PM8XXX_MPP_DOUT_CTRL_LOW;
5062 }
5063
5064 rc = pm8xxx_mpp_config(pm8901_vreg_mpp0.mpp, &pm8901_vreg_mpp0.config);
5065 if (rc)
5066 pr_err("%s: pm8xxx_mpp_config: rc=%d\n", __func__, rc);
5067}
5068
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005069static struct platform_device *charm_devices[] __initdata = {
5070 &msm_charm_modem,
5071#ifdef CONFIG_MSM_SDIO_AL
5072 &msm_device_sdio_al,
5073#endif
5074};
5075
Lei Zhou338cab82011-08-19 13:38:17 -04005076#ifdef CONFIG_SND_SOC_MSM8660_APQ
5077static struct platform_device *dragon_alsa_devices[] __initdata = {
5078 &msm_pcm,
5079 &msm_pcm_routing,
5080 &msm_cpudai0,
5081 &msm_cpudai1,
5082 &msm_cpudai_hdmi_rx,
5083 &msm_cpudai_bt_rx,
5084 &msm_cpudai_bt_tx,
5085 &msm_cpudai_fm_rx,
5086 &msm_cpudai_fm_tx,
5087 &msm_cpu_fe,
5088 &msm_stub_codec,
5089 &msm_lpa_pcm,
5090};
5091#endif
5092
5093static struct platform_device *asoc_devices[] __initdata = {
5094 &asoc_msm_pcm,
5095 &asoc_msm_dai0,
5096 &asoc_msm_dai1,
5097};
5098
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005099static struct platform_device *surf_devices[] __initdata = {
5100 &msm_device_smd,
5101 &msm_device_uart_dm12,
Stephen Boyd3acc9e42011-09-28 16:46:40 -07005102 &msm_pil_q6v3,
Stephen Boyd4eb885b2011-09-29 01:16:03 -07005103 &msm_pil_modem,
Stephen Boydd89eebe2011-09-28 23:28:11 -07005104 &msm_pil_tzapps,
Stephen Boyd25c4a0b2011-09-20 00:12:36 -07005105 &msm_pil_dsps,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005106#ifdef CONFIG_I2C_QUP
5107 &msm_gsbi3_qup_i2c_device,
5108 &msm_gsbi4_qup_i2c_device,
5109 &msm_gsbi7_qup_i2c_device,
5110 &msm_gsbi8_qup_i2c_device,
5111 &msm_gsbi9_qup_i2c_device,
5112 &msm_gsbi12_qup_i2c_device,
5113#endif
5114#ifdef CONFIG_SERIAL_MSM_HS
5115 &msm_device_uart_dm1,
5116#endif
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05305117#ifdef CONFIG_MSM_SSBI
5118 &msm_device_ssbi_pmic1,
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05305119 &msm_device_ssbi_pmic2,
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05305120#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005121#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005122 &msm_device_ssbi3,
5123#endif
5124#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
5125 &isp1763_device,
5126#endif
5127
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005128#if defined (CONFIG_MSM_8x60_VOIP)
5129 &asoc_msm_mvs,
5130 &asoc_mvs_dai0,
5131 &asoc_mvs_dai1,
5132#endif
Lei Zhou338cab82011-08-19 13:38:17 -04005133
Lena Salman57d167e2012-03-21 19:46:38 +02005134#if defined(CONFIG_USB_MSM_72K) || defined(CONFIG_USB_EHCI_HCD)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005135 &msm_device_otg,
5136#endif
Lena Salman57d167e2012-03-21 19:46:38 +02005137#ifdef CONFIG_USB_MSM_72K
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005138 &msm_device_gadget_peripheral,
5139#endif
5140#ifdef CONFIG_USB_G_ANDROID
5141 &android_usb_device,
5142#endif
5143#ifdef CONFIG_BATTERY_MSM
5144 &msm_batt_device,
5145#endif
5146#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005147#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005148 &android_pmem_device,
5149 &android_pmem_adsp_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005150 &android_pmem_smipool_device,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005151 &android_pmem_audio_device,
Chaithanya Krishna Bacharaju23685fb2012-03-19 11:43:53 +05305152#endif /*CONFIG_MSM_MULTIMEDIA_USE_ION*/
5153#endif /*CONFIG_ANDROID_PMEM*/
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005154#ifdef CONFIG_MSM_ROTATOR
5155 &msm_rotator_device,
5156#endif
5157 &msm_fb_device,
5158 &msm_kgsl_3d0,
5159 &msm_kgsl_2d0,
5160 &msm_kgsl_2d1,
5161 &lcdc_samsung_panel_device,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005162#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5163 &lcdc_nt35582_panel_device,
5164#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005165#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
5166 &lcdc_samsung_oled_panel_device,
5167#endif
5168#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
5169 &lcdc_auo_wvga_panel_device,
5170#endif
5171#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
5172 &hdmi_msm_device,
5173#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
5174#ifdef CONFIG_FB_MSM_MIPI_DSI
5175 &mipi_dsi_toshiba_panel_device,
5176 &mipi_dsi_novatek_panel_device,
5177#endif
5178#ifdef CONFIG_MSM_CAMERA
Kevin Chan3be11612012-03-22 20:05:40 -07005179#ifndef CONFIG_MSM_CAMERA_V4L2
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005180#ifdef CONFIG_MT9E013
5181 &msm_camera_sensor_mt9e013,
5182#endif
5183#ifdef CONFIG_IMX074
5184 &msm_camera_sensor_imx074,
5185#endif
5186#ifdef CONFIG_WEBCAM_OV7692
5187 &msm_camera_sensor_webcam_ov7692,
5188#endif
5189#ifdef CONFIG_WEBCAM_OV9726
5190 &msm_camera_sensor_webcam_ov9726,
5191#endif
5192#ifdef CONFIG_QS_S5K4E1
5193 &msm_camera_sensor_qs_s5k4e1,
5194#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04005195#ifdef CONFIG_VX6953
5196 &msm_camera_sensor_vx6953,
5197#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005198#endif
Kevin Chan3be11612012-03-22 20:05:40 -07005199#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005200#ifdef CONFIG_MSM_GEMINI
5201 &msm_gemini_device,
5202#endif
5203#ifdef CONFIG_MSM_VPE
Kevin Chan3be11612012-03-22 20:05:40 -07005204#ifndef CONFIG_MSM_CAMERA_V4L2
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005205 &msm_vpe_device,
5206#endif
Kevin Chan3be11612012-03-22 20:05:40 -07005207#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005208
5209#if defined(CONFIG_MSM_RPM_LOG) || defined(CONFIG_MSM_RPM_LOG_MODULE)
Praveen Chidambaram78499012011-11-01 17:15:17 -06005210 &msm8660_rpm_log_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005211#endif
5212#if defined(CONFIG_MSM_RPM_STATS_LOG)
Praveen Chidambaram78499012011-11-01 17:15:17 -06005213 &msm8660_rpm_stat_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005214#endif
5215 &msm_device_vidc,
5216#if (defined(CONFIG_MARIMBA_CORE)) && \
5217 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
5218 &msm_bt_power_device,
5219#endif
5220#ifdef CONFIG_SENSORS_MSM_ADC
5221 &msm_adc_device,
5222#endif
David Collins6f032ba2011-08-31 14:08:15 -07005223 &rpm_regulator_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005224
5225#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
5226 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
5227 &qcrypto_device,
5228#endif
5229
5230#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
5231 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
5232 &qcedev_device,
5233#endif
5234
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005235
5236#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
5237#ifdef CONFIG_MSM_USE_TSIF1
5238 &msm_device_tsif[1],
5239#else
5240 &msm_device_tsif[0],
5241#endif /* CONFIG_MSM_USE_TSIF1 */
5242#endif /* CONFIG_TSIF */
5243
5244#ifdef CONFIG_HW_RANDOM_MSM
5245 &msm_device_rng,
5246#endif
5247
5248 &msm_tsens_device,
Praveen Chidambaram78499012011-11-01 17:15:17 -06005249 &msm8660_rpm_device,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005250#ifdef CONFIG_ION_MSM
5251 &ion_dev,
5252#endif
Jeff Ohlstein7e668552011-10-06 16:17:25 -07005253 &msm8660_device_watchdog,
Mona Hossainceca6152012-04-10 09:55:41 -07005254 &msm_device_tz_log,
5255
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005256};
5257
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005258#ifdef CONFIG_ION_MSM
Olav Haugan0703dbf2011-12-19 17:53:38 -08005259#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
5260static struct ion_cp_heap_pdata cp_mm_ion_pdata = {
5261 .permission_type = IPT_TYPE_MM_CARVEOUT,
Olav Haugan42ebe712012-01-10 16:30:58 -08005262 .align = PAGE_SIZE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005263 .request_region = request_smi_region,
5264 .release_region = release_smi_region,
5265 .setup_region = setup_smi_region,
5266};
5267
5268static struct ion_cp_heap_pdata cp_mfc_ion_pdata = {
5269 .permission_type = IPT_TYPE_MFC_SHAREDMEM,
Olav Haugan42ebe712012-01-10 16:30:58 -08005270 .align = PAGE_SIZE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005271 .request_region = request_smi_region,
5272 .release_region = release_smi_region,
5273 .setup_region = setup_smi_region,
5274};
5275
5276static struct ion_cp_heap_pdata cp_wb_ion_pdata = {
5277 .permission_type = IPT_TYPE_MDP_WRITEBACK,
Olav Haugan42ebe712012-01-10 16:30:58 -08005278 .align = PAGE_SIZE,
5279};
5280
5281static struct ion_co_heap_pdata fw_co_ion_pdata = {
5282 .adjacent_mem_id = ION_CP_MM_HEAP_ID,
5283 .align = SZ_128K,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005284};
5285
5286static struct ion_co_heap_pdata co_ion_pdata = {
Olav Haugan42ebe712012-01-10 16:30:58 -08005287 .adjacent_mem_id = INVALID_HEAP_ID,
5288 .align = PAGE_SIZE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005289};
5290#endif
Olav Haugan9cdfc2f2012-02-15 09:52:57 -08005291
5292/**
5293 * These heaps are listed in the order they will be allocated. Due to
5294 * video hardware restrictions and content protection the FW heap has to
5295 * be allocated adjacent (below) the MM heap and the MFC heap has to be
5296 * allocated after the MM heap to ensure MFC heap is not more than 256MB
5297 * away from the base address of the FW heap.
5298 * However, the order of FW heap and MM heap doesn't matter since these
5299 * two heaps are taken care of by separate code to ensure they are adjacent
5300 * to each other.
5301 * Don't swap the order unless you know what you are doing!
5302 */
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08005303static struct ion_platform_data ion_pdata = {
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005304 .nr = MSM_ION_HEAP_NUM,
5305 .heaps = {
5306 {
Olav Hauganb5be7992011-11-18 14:29:02 -08005307 .id = ION_SYSTEM_HEAP_ID,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005308 .type = ION_HEAP_TYPE_SYSTEM,
5309 .name = ION_VMALLOC_HEAP_NAME,
5310 },
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005311#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
5312 {
Olav Hauganb5be7992011-11-18 14:29:02 -08005313 .id = ION_CP_MM_HEAP_ID,
Olav Haugan0a852512012-01-09 10:20:55 -08005314 .type = ION_HEAP_TYPE_CP,
Olav Hauganb5be7992011-11-18 14:29:02 -08005315 .name = ION_MM_HEAP_NAME,
5316 .size = MSM_ION_MM_SIZE,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005317 .memory_type = ION_SMI_TYPE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005318 .extra_data = (void *) &cp_mm_ion_pdata,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005319 },
Olav Hauganb5be7992011-11-18 14:29:02 -08005320 {
Olav Haugan42ebe712012-01-10 16:30:58 -08005321 .id = ION_MM_FIRMWARE_HEAP_ID,
5322 .type = ION_HEAP_TYPE_CARVEOUT,
5323 .name = ION_MM_FIRMWARE_HEAP_NAME,
5324 .size = MSM_ION_MM_FW_SIZE,
5325 .memory_type = ION_SMI_TYPE,
5326 .extra_data = (void *) &fw_co_ion_pdata,
5327 },
5328 {
Olav Hauganb5be7992011-11-18 14:29:02 -08005329 .id = ION_CP_MFC_HEAP_ID,
Olav Haugan0a852512012-01-09 10:20:55 -08005330 .type = ION_HEAP_TYPE_CP,
Olav Hauganb5be7992011-11-18 14:29:02 -08005331 .name = ION_MFC_HEAP_NAME,
5332 .size = MSM_ION_MFC_SIZE,
5333 .memory_type = ION_SMI_TYPE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005334 .extra_data = (void *) &cp_mfc_ion_pdata,
Olav Hauganb5be7992011-11-18 14:29:02 -08005335 },
5336 {
Olav Haugan9cdfc2f2012-02-15 09:52:57 -08005337 .id = ION_SF_HEAP_ID,
5338 .type = ION_HEAP_TYPE_CARVEOUT,
5339 .name = ION_SF_HEAP_NAME,
5340 .size = MSM_ION_SF_SIZE,
5341 .memory_type = ION_EBI_TYPE,
5342 .extra_data = (void *)&co_ion_pdata,
5343 },
5344 {
5345 .id = ION_CAMERA_HEAP_ID,
5346 .type = ION_HEAP_TYPE_CARVEOUT,
5347 .name = ION_CAMERA_HEAP_NAME,
5348 .size = MSM_ION_CAMERA_SIZE,
5349 .memory_type = ION_EBI_TYPE,
5350 .extra_data = &co_ion_pdata,
5351 },
5352 {
Olav Hauganb5be7992011-11-18 14:29:02 -08005353 .id = ION_CP_WB_HEAP_ID,
Olav Haugan0a852512012-01-09 10:20:55 -08005354 .type = ION_HEAP_TYPE_CP,
Olav Hauganb5be7992011-11-18 14:29:02 -08005355 .name = ION_WB_HEAP_NAME,
5356 .size = MSM_ION_WB_SIZE,
5357 .memory_type = ION_EBI_TYPE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005358 .extra_data = (void *) &cp_wb_ion_pdata,
Olav Hauganb5be7992011-11-18 14:29:02 -08005359 },
Olav Haugan3a55e322012-01-23 14:24:01 -08005360 {
Olav Haugan6ab47252012-02-15 14:46:49 -08005361 .id = ION_QSECOM_HEAP_ID,
5362 .type = ION_HEAP_TYPE_CARVEOUT,
5363 .name = ION_QSECOM_HEAP_NAME,
5364 .size = MSM_ION_QSECOM_SIZE,
5365 .memory_type = ION_EBI_TYPE,
5366 .extra_data = (void *) &co_ion_pdata,
5367 },
5368 {
Olav Haugan3a55e322012-01-23 14:24:01 -08005369 .id = ION_AUDIO_HEAP_ID,
5370 .type = ION_HEAP_TYPE_CARVEOUT,
5371 .name = ION_AUDIO_HEAP_NAME,
5372 .size = MSM_ION_AUDIO_SIZE,
5373 .memory_type = ION_EBI_TYPE,
5374 .extra_data = (void *)&co_ion_pdata,
5375 },
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005376#endif
5377 }
5378};
5379
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08005380static struct platform_device ion_dev = {
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005381 .name = "ion-msm",
5382 .id = 1,
5383 .dev = { .platform_data = &ion_pdata },
5384};
5385#endif
5386
5387
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005388static struct memtype_reserve msm8x60_reserve_table[] __initdata = {
5389 /* Kernel SMI memory pool for video core, used for firmware */
5390 /* and encoder, decoder scratch buffers */
5391 /* Kernel SMI memory pool should always precede the user space */
5392 /* SMI memory pool, as the video core will use offset address */
5393 /* from the Firmware base */
5394 [MEMTYPE_SMI_KERNEL] = {
5395 .start = KERNEL_SMI_BASE,
5396 .limit = KERNEL_SMI_SIZE,
5397 .size = KERNEL_SMI_SIZE,
5398 .flags = MEMTYPE_FLAGS_FIXED,
5399 },
5400 /* User space SMI memory pool for video core */
5401 /* used for encoder, decoder input & output buffers */
5402 [MEMTYPE_SMI] = {
5403 .start = USER_SMI_BASE,
5404 .limit = USER_SMI_SIZE,
5405 .flags = MEMTYPE_FLAGS_FIXED,
5406 },
5407 [MEMTYPE_EBI0] = {
5408 .flags = MEMTYPE_FLAGS_1M_ALIGN,
5409 },
5410 [MEMTYPE_EBI1] = {
5411 .flags = MEMTYPE_FLAGS_1M_ALIGN,
5412 },
5413};
5414
Stephen Boyd668d7652012-04-25 11:31:01 -07005415static void __init reserve_ion_memory(void)
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005416{
5417#if defined(CONFIG_ION_MSM) && defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08005418 unsigned int i;
5419
5420 if (hdmi_is_primary) {
5421 msm_ion_sf_size = MSM_HDMI_PRIM_ION_SF_SIZE;
5422 for (i = 0; i < ion_pdata.nr; i++) {
5423 if (ion_pdata.heaps[i].id == ION_SF_HEAP_ID) {
5424 ion_pdata.heaps[i].size = msm_ion_sf_size;
5425 pr_debug("msm_ion_sf_size 0x%x\n",
5426 msm_ion_sf_size);
5427 break;
5428 }
5429 }
5430 }
5431
5432 msm8x60_reserve_table[MEMTYPE_EBI1].size += msm_ion_sf_size;
Olav Haugan42ebe712012-01-10 16:30:58 -08005433 msm8x60_reserve_table[MEMTYPE_SMI].size += MSM_ION_MM_FW_SIZE;
Olav Hauganb5be7992011-11-18 14:29:02 -08005434 msm8x60_reserve_table[MEMTYPE_SMI].size += MSM_ION_MM_SIZE;
5435 msm8x60_reserve_table[MEMTYPE_SMI].size += MSM_ION_MFC_SIZE;
5436 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_CAMERA_SIZE;
5437 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_WB_SIZE;
Olav Haugan3a55e322012-01-23 14:24:01 -08005438 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_AUDIO_SIZE;
Olav Haugan8d8c2d12012-04-02 12:01:44 -07005439 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_QSECOM_SIZE;
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005440#endif
5441}
5442
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005443static void __init size_pmem_devices(void)
5444{
5445#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005446#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005447 android_pmem_adsp_pdata.size = pmem_adsp_size;
5448 android_pmem_smipool_pdata.size = MSM_PMEM_SMIPOOL_SIZE;
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08005449
5450 if (hdmi_is_primary)
5451 pmem_sf_size = MSM_HDMI_PRIM_PMEM_SF_SIZE;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005452 android_pmem_pdata.size = pmem_sf_size;
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005453 android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE;
Chaithanya Krishna Bacharaju23685fb2012-03-19 11:43:53 +05305454#endif /*CONFIG_MSM_MULTIMEDIA_USE_ION*/
5455#endif /*CONFIG_ANDROID_PMEM*/
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005456}
5457
Chaithanya Krishna Bacharaju23685fb2012-03-19 11:43:53 +05305458#ifdef CONFIG_ANDROID_PMEM
5459#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005460static void __init reserve_memory_for(struct android_pmem_platform_data *p)
5461{
5462 msm8x60_reserve_table[p->memory_type].size += p->size;
5463}
Chaithanya Krishna Bacharaju23685fb2012-03-19 11:43:53 +05305464#endif /*CONFIG_MSM_MULTIMEDIA_USE_ION*/
5465#endif /*CONFIG_ANDROID_PMEM*/
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005466
5467static void __init reserve_pmem_memory(void)
5468{
5469#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005470#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005471 reserve_memory_for(&android_pmem_adsp_pdata);
5472 reserve_memory_for(&android_pmem_smipool_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005473 reserve_memory_for(&android_pmem_pdata);
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005474 reserve_memory_for(&android_pmem_audio_pdata);
Chaithanya Krishna Bacharaju23685fb2012-03-19 11:43:53 +05305475#endif /*CONFIG_MSM_MULTIMEDIA_USE_ION*/
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005476 msm8x60_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
Chaithanya Krishna Bacharaju23685fb2012-03-19 11:43:53 +05305477#endif /*CONFIG_ANDROID_PMEM*/
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005478}
5479
Huaibin Yanga5419422011-12-08 23:52:10 -08005480static void __init reserve_mdp_memory(void);
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005481
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005482static void __init msm8x60_calculate_reserve_sizes(void)
5483{
5484 size_pmem_devices();
5485 reserve_pmem_memory();
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005486 reserve_ion_memory();
Huaibin Yanga5419422011-12-08 23:52:10 -08005487 reserve_mdp_memory();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005488}
5489
5490static int msm8x60_paddr_to_memtype(unsigned int paddr)
5491{
5492 if (paddr >= 0x40000000 && paddr < 0x60000000)
5493 return MEMTYPE_EBI1;
5494 if (paddr >= 0x38000000 && paddr < 0x40000000)
5495 return MEMTYPE_SMI;
5496 return MEMTYPE_NONE;
5497}
5498
5499static struct reserve_info msm8x60_reserve_info __initdata = {
5500 .memtype_reserve_table = msm8x60_reserve_table,
5501 .calculate_reserve_sizes = msm8x60_calculate_reserve_sizes,
5502 .paddr_to_memtype = msm8x60_paddr_to_memtype,
5503};
5504
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08005505static char prim_panel_name[PANEL_NAME_MAX_LEN];
5506static char ext_panel_name[PANEL_NAME_MAX_LEN];
5507static int __init prim_display_setup(char *param)
5508{
5509 if (strnlen(param, PANEL_NAME_MAX_LEN))
5510 strlcpy(prim_panel_name, param, PANEL_NAME_MAX_LEN);
5511 return 0;
5512}
5513early_param("prim_display", prim_display_setup);
5514
5515static int __init ext_display_setup(char *param)
5516{
5517 if (strnlen(param, PANEL_NAME_MAX_LEN))
5518 strlcpy(ext_panel_name, param, PANEL_NAME_MAX_LEN);
5519 return 0;
5520}
5521early_param("ext_display", ext_display_setup);
5522
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005523static void __init msm8x60_reserve(void)
5524{
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08005525 msm8x60_set_display_params(prim_panel_name, ext_panel_name);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005526 reserve_info = &msm8x60_reserve_info;
5527 msm_reserve();
5528}
5529
5530#define EXT_CHG_VALID_MPP 10
5531#define EXT_CHG_VALID_MPP_2 11
5532
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305533static struct pm8xxx_mpp_init_info isl_mpp[] = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05305534 PM8058_MPP_INIT(EXT_CHG_VALID_MPP, D_INPUT,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305535 PM8058_MPP_DIG_LEVEL_S3, DIN_TO_INT),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05305536 PM8058_MPP_INIT(EXT_CHG_VALID_MPP_2, D_BI_DIR,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305537 PM8058_MPP_DIG_LEVEL_S3, BI_PULLUP_10KOHM),
5538};
5539
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005540#ifdef CONFIG_ISL9519_CHARGER
5541static int isl_detection_setup(void)
5542{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305543 int ret = 0, i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005544
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305545 for (i = 0; i < ARRAY_SIZE(isl_mpp); i++) {
5546 ret = pm8xxx_mpp_config(isl_mpp[i].mpp,
5547 &isl_mpp[i].config);
5548 if (ret) {
5549 pr_err("%s: Config MPP %d of PM8058 failed\n",
5550 __func__, isl_mpp[i].mpp);
5551 return ret;
5552 }
5553 }
5554
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005555 return ret;
5556}
5557
5558static struct isl_platform_data isl_data __initdata = {
5559 .chgcurrent = 700,
5560 .valid_n_gpio = PM8058_MPP_PM_TO_SYS(10),
5561 .chg_detection_config = isl_detection_setup,
5562 .max_system_voltage = 4200,
5563 .min_system_voltage = 3200,
5564 .term_current = 120,
5565 .input_current = 2048,
5566};
5567
5568static struct i2c_board_info isl_charger_i2c_info[] __initdata = {
5569 {
5570 I2C_BOARD_INFO("isl9519q", 0x9),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305571 .irq = PM8058_IRQ_BASE + PM8058_CBLPWR_IRQ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005572 .platform_data = &isl_data,
5573 },
5574};
5575#endif
5576
5577#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
5578static int smb137b_detection_setup(void)
5579{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305580 int ret = 0, i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005581
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305582 for (i = 0; i < ARRAY_SIZE(isl_mpp); i++) {
5583 ret = pm8xxx_mpp_config(isl_mpp[i].mpp,
5584 &isl_mpp[i].config);
5585 if (ret) {
5586 pr_err("%s: Config MPP %d of PM8058 failed\n",
5587 __func__, isl_mpp[i].mpp);
5588 return ret;
5589 }
5590 }
5591
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005592 return ret;
5593}
5594
5595static struct smb137b_platform_data smb137b_data __initdata = {
5596 .chg_detection_config = smb137b_detection_setup,
5597 .valid_n_gpio = PM8058_MPP_PM_TO_SYS(10),
5598 .batt_mah_rating = 950,
5599};
5600
5601static struct i2c_board_info smb137b_charger_i2c_info[] __initdata = {
5602 {
5603 I2C_BOARD_INFO("smb137b", 0x08),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305604 .irq = PM8058_IRQ_BASE + PM8058_CBLPWR_IRQ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005605 .platform_data = &smb137b_data,
5606 },
5607};
5608#endif
5609
5610#ifdef CONFIG_PMIC8058
5611#define PMIC_GPIO_SDC3_DET 22
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305612#define PMIC_GPIO_TOUCH_DISC_INTR 5
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005613
5614static int pm8058_gpios_init(void)
5615{
5616 int i;
5617 int rc;
5618 struct pm8058_gpio_cfg {
5619 int gpio;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305620 struct pm_gpio cfg;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005621 };
5622
5623 struct pm8058_gpio_cfg gpio_cfgs[] = {
5624 { /* FFA ethernet */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305625 PM8058_GPIO_PM_TO_SYS(6),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005626 {
5627 .direction = PM_GPIO_DIR_IN,
5628 .pull = PM_GPIO_PULL_DN,
5629 .vin_sel = 2,
5630 .function = PM_GPIO_FUNC_NORMAL,
5631 .inv_int_pol = 0,
5632 },
5633 },
5634#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
5635 {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305636 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005637 {
5638 .direction = PM_GPIO_DIR_IN,
5639 .pull = PM_GPIO_PULL_UP_30,
5640 .vin_sel = 2,
5641 .function = PM_GPIO_FUNC_NORMAL,
5642 .inv_int_pol = 0,
5643 },
5644 },
5645#endif
5646 { /* core&surf gpio expander */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305647 PM8058_GPIO_PM_TO_SYS(UI_INT1_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005648 {
5649 .direction = PM_GPIO_DIR_IN,
5650 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305651 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005652 .function = PM_GPIO_FUNC_NORMAL,
5653 .inv_int_pol = 0,
5654 },
5655 },
5656 { /* docking gpio expander */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305657 PM8058_GPIO_PM_TO_SYS(UI_INT2_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005658 {
5659 .direction = PM_GPIO_DIR_IN,
5660 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305661 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005662 .function = PM_GPIO_FUNC_NORMAL,
5663 .inv_int_pol = 0,
5664 },
5665 },
5666 { /* FHA/keypad gpio expanders */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305667 PM8058_GPIO_PM_TO_SYS(UI_INT3_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005668 {
5669 .direction = PM_GPIO_DIR_IN,
5670 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305671 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005672 .function = PM_GPIO_FUNC_NORMAL,
5673 .inv_int_pol = 0,
5674 },
5675 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005676 { /* Timpani Reset */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305677 PM8058_GPIO_PM_TO_SYS(20),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005678 {
5679 .direction = PM_GPIO_DIR_OUT,
5680 .output_value = 1,
5681 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5682 .pull = PM_GPIO_PULL_DN,
5683 .out_strength = PM_GPIO_STRENGTH_HIGH,
5684 .function = PM_GPIO_FUNC_NORMAL,
5685 .vin_sel = 2,
5686 .inv_int_pol = 0,
5687 }
5688 },
5689 { /* PMIC ID interrupt */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305690 PM8058_GPIO_PM_TO_SYS(36),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005691 {
5692 .direction = PM_GPIO_DIR_IN,
Anji jonnalaae745e92011-11-14 18:34:31 +05305693 .pull = PM_GPIO_PULL_NO,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005694 .function = PM_GPIO_FUNC_NORMAL,
5695 .vin_sel = 2,
5696 .inv_int_pol = 0,
5697 }
5698 },
5699 };
5700
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305701#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
5702 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305703 struct pm_gpio touchdisc_intr_gpio_cfg = {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305704 .direction = PM_GPIO_DIR_IN,
5705 .pull = PM_GPIO_PULL_UP_1P5,
5706 .vin_sel = 2,
5707 .function = PM_GPIO_FUNC_NORMAL,
5708 };
5709#endif
5710
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005711#if defined(CONFIG_HAPTIC_ISA1200) || \
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305712 defined(CONFIG_HAPTIC_ISA1200_MODULE)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305713 struct pm_gpio en_hap_gpio_cfg = {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305714 .direction = PM_GPIO_DIR_OUT,
5715 .pull = PM_GPIO_PULL_NO,
5716 .out_strength = PM_GPIO_STRENGTH_HIGH,
5717 .function = PM_GPIO_FUNC_NORMAL,
5718 .inv_int_pol = 0,
5719 .vin_sel = 2,
5720 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5721 .output_value = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005722 };
5723#endif
5724
5725#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
5726 struct pm8058_gpio_cfg line_in_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305727 PM8058_GPIO_PM_TO_SYS(18),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005728 {
5729 .direction = PM_GPIO_DIR_IN,
5730 .pull = PM_GPIO_PULL_UP_1P5,
5731 .vin_sel = 2,
5732 .function = PM_GPIO_FUNC_NORMAL,
5733 .inv_int_pol = 0,
5734 }
5735 };
5736#endif
5737
5738#if defined(CONFIG_QS_S5K4E1)
5739 {
5740 struct pm8058_gpio_cfg qs_hc37_cam_pd_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305741 PM8058_GPIO_PM_TO_SYS(26),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005742 {
5743 .direction = PM_GPIO_DIR_OUT,
5744 .output_value = 0,
5745 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5746 .pull = PM_GPIO_PULL_DN,
5747 .out_strength = PM_GPIO_STRENGTH_HIGH,
5748 .function = PM_GPIO_FUNC_NORMAL,
5749 .vin_sel = 2,
5750 .inv_int_pol = 0,
5751 }
5752 };
5753#endif
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005754#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5755 struct pm8058_gpio_cfg pmic_lcdc_nt35582_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305756 PM8058_GPIO_PM_TO_SYS(GPIO_NT35582_BL_EN_HW_PIN - 1),
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005757 {
5758 .direction = PM_GPIO_DIR_OUT,
5759 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5760 .output_value = 1,
5761 .pull = PM_GPIO_PULL_UP_30,
5762 /* 2.9V PM_GPIO_VIN_L2, which gives 2.6V */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305763 .vin_sel = PM8058_GPIO_VIN_L5,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005764 .out_strength = PM_GPIO_STRENGTH_HIGH,
5765 .function = PM_GPIO_FUNC_NORMAL,
5766 .inv_int_pol = 0,
5767 }
5768 };
5769#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005770#if defined(CONFIG_HAPTIC_ISA1200) || \
5771 defined(CONFIG_HAPTIC_ISA1200_MODULE)
5772 if (machine_is_msm8x60_fluid()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305773 rc = pm8xxx_gpio_config(
5774 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_ENABLE),
5775 &en_hap_gpio_cfg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005776 if (rc < 0) {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305777 pr_err("%s: pmic haptics gpio config failed\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005778 __func__);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305779 }
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305780 rc = pm8xxx_gpio_config(
5781 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_LDO_ENABLE),
5782 &en_hap_gpio_cfg);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305783 if (rc < 0) {
5784 pr_err("%s: pmic haptics ldo gpio config failed\n",
5785 __func__);
5786 }
5787
5788 }
5789#endif
5790
5791#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
5792 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
5793 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_surf() ||
5794 machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305795 rc = pm8xxx_gpio_config(
5796 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_TOUCH_DISC_INTR),
5797 &touchdisc_intr_gpio_cfg);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305798 if (rc < 0) {
5799 pr_err("%s: Touchdisc interrupt gpio config failed\n",
5800 __func__);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005801 }
5802 }
5803#endif
5804
5805#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
5806 /* Line_in only for 8660 ffa & surf */
5807 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_surf() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04005808 machine_is_msm8x60_fusion() || machine_is_msm8x60_dragon() ||
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005809 machine_is_msm8x60_fusn_ffa()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305810 rc = pm8xxx_gpio_config(line_in_gpio_cfg.gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005811 &line_in_gpio_cfg.cfg);
5812 if (rc < 0) {
5813 pr_err("%s pmic line_in gpio config failed\n",
5814 __func__);
5815 return rc;
5816 }
5817 }
5818#endif
5819
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005820#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5821 if (machine_is_msm8x60_dragon()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305822 rc = pm8xxx_gpio_config(pmic_lcdc_nt35582_gpio_cfg.gpio,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005823 &pmic_lcdc_nt35582_gpio_cfg.cfg);
5824 if (rc < 0) {
5825 pr_err("%s pmic gpio config failed\n", __func__);
5826 return rc;
5827 }
5828 }
5829#endif
5830
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005831#if defined(CONFIG_QS_S5K4E1)
5832 /* qs_cam_hc37_cam_pd only for 8660 fluid qs camera*/
5833 if (machine_is_msm8x60_fluid()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305834 rc = pm8xxx_gpio_config(qs_hc37_cam_pd_gpio_cfg.gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005835 &qs_hc37_cam_pd_gpio_cfg.cfg);
5836 if (rc < 0) {
5837 pr_err("%s pmic qs_hc37_cam_pd gpio config failed\n",
5838 __func__);
5839 return rc;
5840 }
5841 }
5842 }
5843#endif
5844
5845 for (i = 0; i < ARRAY_SIZE(gpio_cfgs); ++i) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305846 rc = pm8xxx_gpio_config(gpio_cfgs[i].gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005847 &gpio_cfgs[i].cfg);
5848 if (rc < 0) {
5849 pr_err("%s pmic gpio config failed\n",
5850 __func__);
5851 return rc;
5852 }
5853 }
5854
5855 return 0;
5856}
5857
5858static const unsigned int ffa_keymap[] = {
5859 KEY(0, 0, KEY_FN_F1), /* LS - PUSH1 */
5860 KEY(0, 1, KEY_UP), /* NAV - UP */
5861 KEY(0, 2, KEY_LEFT), /* NAV - LEFT */
5862 KEY(0, 3, KEY_VOLUMEUP), /* Shuttle SW_UP */
5863
5864 KEY(1, 0, KEY_FN_F2), /* LS - PUSH2 */
5865 KEY(1, 1, KEY_RIGHT), /* NAV - RIGHT */
5866 KEY(1, 2, KEY_DOWN), /* NAV - DOWN */
5867 KEY(1, 3, KEY_VOLUMEDOWN),
5868
5869 KEY(2, 3, KEY_ENTER), /* SW_PUSH key */
5870
5871 KEY(4, 0, KEY_CAMERA_FOCUS), /* RS - PUSH1 */
5872 KEY(4, 1, KEY_UP), /* USER_UP */
5873 KEY(4, 2, KEY_LEFT), /* USER_LEFT */
5874 KEY(4, 3, KEY_HOME), /* Right switch: MIC Bd */
5875 KEY(4, 4, KEY_FN_F3), /* Reserved MIC */
5876
5877 KEY(5, 0, KEY_CAMERA), /* RS - PUSH2 */
5878 KEY(5, 1, KEY_RIGHT), /* USER_RIGHT */
5879 KEY(5, 2, KEY_DOWN), /* USER_DOWN */
5880 KEY(5, 3, KEY_BACK), /* Left switch: MIC */
5881 KEY(5, 4, KEY_MENU), /* Center switch: MIC */
5882};
5883
Zhang Chang Ken683be172011-08-10 17:45:34 -04005884static const unsigned int dragon_keymap[] = {
5885 KEY(0, 0, KEY_MENU),
5886 KEY(0, 2, KEY_1),
5887 KEY(0, 3, KEY_4),
5888 KEY(0, 4, KEY_7),
5889
5890 KEY(1, 0, KEY_UP),
5891 KEY(1, 1, KEY_LEFT),
5892 KEY(1, 2, KEY_DOWN),
5893 KEY(1, 3, KEY_5),
5894 KEY(1, 4, KEY_8),
5895
5896 KEY(2, 0, KEY_HOME),
5897 KEY(2, 1, KEY_REPLY),
5898 KEY(2, 2, KEY_2),
5899 KEY(2, 3, KEY_6),
5900 KEY(2, 4, KEY_0),
5901
5902 KEY(3, 0, KEY_VOLUMEUP),
5903 KEY(3, 1, KEY_RIGHT),
5904 KEY(3, 2, KEY_3),
5905 KEY(3, 3, KEY_9),
5906 KEY(3, 4, KEY_SWITCHVIDEOMODE),
5907
5908 KEY(4, 0, KEY_VOLUMEDOWN),
5909 KEY(4, 1, KEY_BACK),
5910 KEY(4, 2, KEY_CAMERA),
5911 KEY(4, 3, KEY_KBDILLUMTOGGLE),
5912};
5913
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005914static struct matrix_keymap_data ffa_keymap_data = {
5915 .keymap_size = ARRAY_SIZE(ffa_keymap),
5916 .keymap = ffa_keymap,
5917};
5918
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305919static struct pm8xxx_keypad_platform_data ffa_keypad_data = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005920 .input_name = "ffa-keypad",
5921 .input_phys_device = "ffa-keypad/input0",
5922 .num_rows = 6,
5923 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305924 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5925 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5926 .debounce_ms = 15,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005927 .scan_delay_ms = 32,
5928 .row_hold_ns = 91500,
5929 .wakeup = 1,
5930 .keymap_data = &ffa_keymap_data,
5931};
5932
Zhang Chang Ken683be172011-08-10 17:45:34 -04005933static struct matrix_keymap_data dragon_keymap_data = {
5934 .keymap_size = ARRAY_SIZE(dragon_keymap),
5935 .keymap = dragon_keymap,
5936};
5937
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305938static struct pm8xxx_keypad_platform_data dragon_keypad_data = {
Zhang Chang Ken683be172011-08-10 17:45:34 -04005939 .input_name = "dragon-keypad",
5940 .input_phys_device = "dragon-keypad/input0",
5941 .num_rows = 6,
5942 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305943 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5944 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5945 .debounce_ms = 15,
Zhang Chang Ken683be172011-08-10 17:45:34 -04005946 .scan_delay_ms = 32,
5947 .row_hold_ns = 91500,
5948 .wakeup = 1,
5949 .keymap_data = &dragon_keymap_data,
5950};
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305951
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005952static const unsigned int fluid_keymap[] = {
5953 KEY(0, 0, KEY_FN_F1), /* LS - PUSH1 */
5954 KEY(0, 1, KEY_UP), /* NAV - UP */
5955 KEY(0, 2, KEY_LEFT), /* NAV - LEFT */
5956 KEY(0, 3, KEY_VOLUMEDOWN), /* Shuttle SW_UP */
5957
5958 KEY(1, 0, KEY_FN_F2), /* LS - PUSH2 */
5959 KEY(1, 1, KEY_RIGHT), /* NAV - RIGHT */
5960 KEY(1, 2, KEY_DOWN), /* NAV - DOWN */
5961 KEY(1, 3, KEY_VOLUMEUP),
5962
5963 KEY(2, 3, KEY_ENTER), /* SW_PUSH key */
5964
5965 KEY(4, 0, KEY_CAMERA_FOCUS), /* RS - PUSH1 */
5966 KEY(4, 1, KEY_UP), /* USER_UP */
5967 KEY(4, 2, KEY_LEFT), /* USER_LEFT */
5968 KEY(4, 3, KEY_HOME), /* Right switch: MIC Bd */
5969 KEY(4, 4, KEY_FN_F3), /* Reserved MIC */
5970
Jilai Wang9a895102011-07-12 14:00:35 -04005971 KEY(5, 0, KEY_CAMERA), /* RS - PUSH2 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005972 KEY(5, 1, KEY_RIGHT), /* USER_RIGHT */
5973 KEY(5, 2, KEY_DOWN), /* USER_DOWN */
5974 KEY(5, 3, KEY_BACK), /* Left switch: MIC */
5975 KEY(5, 4, KEY_MENU), /* Center switch: MIC */
5976};
5977
5978static struct matrix_keymap_data fluid_keymap_data = {
5979 .keymap_size = ARRAY_SIZE(fluid_keymap),
5980 .keymap = fluid_keymap,
5981};
5982
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305983static struct pm8xxx_keypad_platform_data fluid_keypad_data = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005984 .input_name = "fluid-keypad",
5985 .input_phys_device = "fluid-keypad/input0",
5986 .num_rows = 6,
5987 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305988 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5989 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5990 .debounce_ms = 15,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005991 .scan_delay_ms = 32,
5992 .row_hold_ns = 91500,
5993 .wakeup = 1,
5994 .keymap_data = &fluid_keymap_data,
5995};
5996
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305997static struct pm8xxx_vibrator_platform_data pm8058_vib_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005998 .initial_vibrate_ms = 500,
5999 .level_mV = 3000,
6000 .max_timeout_ms = 15000,
6001};
6002
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306003static struct pm8xxx_rtc_platform_data pm8058_rtc_pdata = {
6004 .rtc_write_enable = false,
6005 .rtc_alarm_powerup = false,
6006};
6007
6008static struct pm8xxx_pwrkey_platform_data pm8058_pwrkey_pdata = {
6009 .pull_up = 1,
Jing Lineecdc062011-11-17 09:47:09 -08006010 .kpd_trigger_delay_us = 15625,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306011 .wakeup = 1,
6012};
6013
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006014#define PM8058_LINE_IN_DET_GPIO PM8058_GPIO_PM_TO_SYS(18)
6015
6016static struct othc_accessory_info othc_accessories[] = {
6017 {
6018 .accessory = OTHC_SVIDEO_OUT,
6019 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_SWITCH_DETECT
6020 | OTHC_ADC_DETECT,
6021 .key_code = SW_VIDEOOUT_INSERT,
6022 .enabled = false,
6023 .adc_thres = {
6024 .min_threshold = 20,
6025 .max_threshold = 40,
6026 },
6027 },
6028 {
6029 .accessory = OTHC_ANC_HEADPHONE,
6030 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_GPIO_DETECT |
6031 OTHC_SWITCH_DETECT,
6032 .gpio = PM8058_LINE_IN_DET_GPIO,
6033 .active_low = 1,
6034 .key_code = SW_HEADPHONE_INSERT,
6035 .enabled = true,
6036 },
6037 {
6038 .accessory = OTHC_ANC_HEADSET,
6039 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_GPIO_DETECT,
6040 .gpio = PM8058_LINE_IN_DET_GPIO,
6041 .active_low = 1,
6042 .key_code = SW_HEADPHONE_INSERT,
6043 .enabled = true,
6044 },
6045 {
6046 .accessory = OTHC_HEADPHONE,
6047 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_SWITCH_DETECT,
6048 .key_code = SW_HEADPHONE_INSERT,
6049 .enabled = true,
6050 },
6051 {
6052 .accessory = OTHC_MICROPHONE,
6053 .detect_flags = OTHC_GPIO_DETECT,
6054 .gpio = PM8058_LINE_IN_DET_GPIO,
6055 .active_low = 1,
6056 .key_code = SW_MICROPHONE_INSERT,
6057 .enabled = true,
6058 },
6059 {
6060 .accessory = OTHC_HEADSET,
6061 .detect_flags = OTHC_MICBIAS_DETECT,
6062 .key_code = SW_HEADPHONE_INSERT,
6063 .enabled = true,
6064 },
6065};
6066
6067static struct othc_switch_info switch_info[] = {
6068 {
6069 .min_adc_threshold = 0,
6070 .max_adc_threshold = 100,
6071 .key_code = KEY_PLAYPAUSE,
6072 },
6073 {
6074 .min_adc_threshold = 100,
6075 .max_adc_threshold = 200,
6076 .key_code = KEY_REWIND,
6077 },
6078 {
6079 .min_adc_threshold = 200,
6080 .max_adc_threshold = 500,
6081 .key_code = KEY_FASTFORWARD,
6082 },
6083};
6084
6085static struct othc_n_switch_config switch_config = {
6086 .voltage_settling_time_ms = 0,
6087 .num_adc_samples = 3,
6088 .adc_channel = CHANNEL_ADC_HDSET,
6089 .switch_info = switch_info,
6090 .num_keys = ARRAY_SIZE(switch_info),
6091 .default_sw_en = true,
6092 .default_sw_idx = 0,
6093};
6094
6095static struct hsed_bias_config hsed_bias_config = {
6096 /* HSED mic bias config info */
6097 .othc_headset = OTHC_HEADSET_NO,
6098 .othc_lowcurr_thresh_uA = 100,
6099 .othc_highcurr_thresh_uA = 600,
6100 .othc_hyst_prediv_us = 7800,
6101 .othc_period_clkdiv_us = 62500,
6102 .othc_hyst_clk_us = 121000,
6103 .othc_period_clk_us = 312500,
6104 .othc_wakeup = 1,
6105};
6106
6107static struct othc_hsed_config hsed_config_1 = {
6108 .hsed_bias_config = &hsed_bias_config,
6109 /*
6110 * The detection delay and switch reporting delay are
6111 * required to encounter a hardware bug (spurious switch
6112 * interrupts on slow insertion/removal of the headset).
6113 * This will introduce a delay in reporting the accessory
6114 * insertion and removal to the userspace.
6115 */
6116 .detection_delay_ms = 1500,
6117 /* Switch info */
6118 .switch_debounce_ms = 1500,
6119 .othc_support_n_switch = false,
6120 .switch_config = &switch_config,
6121 .ir_gpio = -1,
6122 /* Accessory info */
6123 .accessories_support = true,
6124 .accessories = othc_accessories,
6125 .othc_num_accessories = ARRAY_SIZE(othc_accessories),
6126};
6127
6128static struct othc_regulator_config othc_reg = {
6129 .regulator = "8058_l5",
6130 .max_uV = 2850000,
6131 .min_uV = 2850000,
6132};
6133
6134/* MIC_BIAS0 is configured as normal MIC BIAS */
6135static struct pmic8058_othc_config_pdata othc_config_pdata_0 = {
6136 .micbias_select = OTHC_MICBIAS_0,
6137 .micbias_capability = OTHC_MICBIAS,
6138 .micbias_enable = OTHC_SIGNAL_OFF,
6139 .micbias_regulator = &othc_reg,
6140};
6141
6142/* MIC_BIAS1 is configured as HSED_BIAS for OTHC */
6143static struct pmic8058_othc_config_pdata othc_config_pdata_1 = {
6144 .micbias_select = OTHC_MICBIAS_1,
6145 .micbias_capability = OTHC_MICBIAS_HSED,
6146 .micbias_enable = OTHC_SIGNAL_PWM_TCXO,
6147 .micbias_regulator = &othc_reg,
6148 .hsed_config = &hsed_config_1,
6149 .hsed_name = "8660_handset",
6150};
6151
6152/* MIC_BIAS2 is configured as normal MIC BIAS */
6153static struct pmic8058_othc_config_pdata othc_config_pdata_2 = {
6154 .micbias_select = OTHC_MICBIAS_2,
6155 .micbias_capability = OTHC_MICBIAS,
6156 .micbias_enable = OTHC_SIGNAL_OFF,
6157 .micbias_regulator = &othc_reg,
6158};
6159
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006160
6161static void __init msm8x60_init_pm8058_othc(void)
6162{
6163 int i;
6164
6165 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2 ||
6166 machine_is_msm8x60_fluid() || machine_is_msm8x60_fusion() ||
6167 machine_is_msm8x60_fusn_ffa()) {
6168 /* 3-switch headset supported only by V2 FFA and FLUID */
6169 hsed_config_1.accessories_adc_support = true,
6170 /* ADC based accessory detection works only on V2 and FLUID */
6171 hsed_config_1.accessories_adc_channel = CHANNEL_ADC_HDSET,
6172 hsed_config_1.othc_support_n_switch = true;
6173 }
6174
6175 /* IR GPIO is absent on FLUID */
6176 if (machine_is_msm8x60_fluid())
6177 hsed_config_1.ir_gpio = -1;
6178
6179 for (i = 0; i < ARRAY_SIZE(othc_accessories); i++) {
6180 if (machine_is_msm8x60_fluid()) {
6181 switch (othc_accessories[i].accessory) {
6182 case OTHC_ANC_HEADPHONE:
6183 case OTHC_ANC_HEADSET:
6184 othc_accessories[i].gpio = GPIO_HEADSET_DET_N;
6185 break;
6186 case OTHC_MICROPHONE:
6187 othc_accessories[i].enabled = false;
6188 break;
6189 case OTHC_SVIDEO_OUT:
6190 othc_accessories[i].enabled = true;
6191 hsed_config_1.video_out_gpio = GPIO_HS_SW_DIR;
6192 break;
6193 }
6194 }
6195 }
6196}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006197
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006198
6199static int pm8058_pwm_config(struct pwm_device *pwm, int ch, int on)
6200{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306201 struct pm_gpio pwm_gpio_config = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006202 .direction = PM_GPIO_DIR_OUT,
6203 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
6204 .output_value = 0,
6205 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306206 .vin_sel = PM8058_GPIO_VIN_VPH,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006207 .out_strength = PM_GPIO_STRENGTH_HIGH,
6208 .function = PM_GPIO_FUNC_2,
6209 };
6210
6211 int rc = -EINVAL;
6212 int id, mode, max_mA;
6213
6214 id = mode = max_mA = 0;
6215 switch (ch) {
6216 case 0:
6217 case 1:
6218 case 2:
6219 if (on) {
6220 id = 24 + ch;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306221 rc = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(id - 1),
6222 &pwm_gpio_config);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006223 if (rc)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306224 pr_err("%s: pm8xxx_gpio_config(%d): rc=%d\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006225 __func__, id, rc);
6226 }
6227 break;
6228
6229 case 6:
6230 id = PM_PWM_LED_FLASH;
6231 mode = PM_PWM_CONF_PWM1;
6232 max_mA = 300;
6233 break;
6234
6235 case 7:
6236 id = PM_PWM_LED_FLASH1;
6237 mode = PM_PWM_CONF_PWM1;
6238 max_mA = 300;
6239 break;
6240
6241 default:
6242 break;
6243 }
6244
6245 if (ch >= 6 && ch <= 7) {
6246 if (!on) {
6247 mode = PM_PWM_CONF_NONE;
6248 max_mA = 0;
6249 }
6250 rc = pm8058_pwm_config_led(pwm, id, mode, max_mA);
6251 if (rc)
6252 pr_err("%s: pm8058_pwm_config_led(ch=%d): rc=%d\n",
6253 __func__, ch, rc);
6254 }
6255 return rc;
6256
6257}
6258
6259static struct pm8058_pwm_pdata pm8058_pwm_data = {
6260 .config = pm8058_pwm_config,
6261};
6262
6263#define PM8058_GPIO_INT 88
6264
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006265static struct pmic8058_led pmic8058_flash_leds[] = {
6266 [0] = {
6267 .name = "camera:flash0",
6268 .max_brightness = 15,
6269 .id = PMIC8058_ID_FLASH_LED_0,
6270 },
6271 [1] = {
6272 .name = "camera:flash1",
6273 .max_brightness = 15,
6274 .id = PMIC8058_ID_FLASH_LED_1,
6275 },
6276};
6277
6278static struct pmic8058_leds_platform_data pm8058_flash_leds_data = {
6279 .num_leds = ARRAY_SIZE(pmic8058_flash_leds),
6280 .leds = pmic8058_flash_leds,
6281};
6282
Terence Hampsonc0b6dfb2011-07-15 11:07:17 -04006283static struct pmic8058_led pmic8058_dragon_leds[] = {
6284 [0] = {
6285 /* RED */
6286 .name = "led_drv0",
6287 .max_brightness = 15,
6288 .id = PMIC8058_ID_LED_0,
6289 },/* 300 mA flash led0 drv sink */
6290 [1] = {
6291 /* Yellow */
6292 .name = "led_drv1",
6293 .max_brightness = 15,
6294 .id = PMIC8058_ID_LED_1,
6295 },/* 300 mA flash led0 drv sink */
6296 [2] = {
6297 /* Green */
6298 .name = "led_drv2",
6299 .max_brightness = 15,
6300 .id = PMIC8058_ID_LED_2,
6301 },/* 300 mA flash led0 drv sink */
6302 [3] = {
6303 .name = "led_psensor",
6304 .max_brightness = 15,
6305 .id = PMIC8058_ID_LED_KB_LIGHT,
6306 },/* 300 mA flash led0 drv sink */
6307};
6308
6309static struct pmic8058_leds_platform_data pm8058_dragon_leds_data = {
6310 .num_leds = ARRAY_SIZE(pmic8058_dragon_leds),
6311 .leds = pmic8058_dragon_leds,
6312};
6313
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006314static struct pmic8058_led pmic8058_fluid_flash_leds[] = {
6315 [0] = {
6316 .name = "led:drv0",
6317 .max_brightness = 15,
6318 .id = PMIC8058_ID_FLASH_LED_0,
6319 },/* 300 mA flash led0 drv sink */
6320 [1] = {
6321 .name = "led:drv1",
6322 .max_brightness = 15,
6323 .id = PMIC8058_ID_FLASH_LED_1,
6324 },/* 300 mA flash led1 sink */
6325 [2] = {
6326 .name = "led:drv2",
6327 .max_brightness = 20,
6328 .id = PMIC8058_ID_LED_0,
6329 },/* 40 mA led0 sink */
6330 [3] = {
6331 .name = "keypad:drv",
6332 .max_brightness = 15,
6333 .id = PMIC8058_ID_LED_KB_LIGHT,
6334 },/* 300 mA keypad drv sink */
6335};
6336
6337static struct pmic8058_leds_platform_data pm8058_fluid_flash_leds_data = {
6338 .num_leds = ARRAY_SIZE(pmic8058_fluid_flash_leds),
6339 .leds = pmic8058_fluid_flash_leds,
6340};
6341
Terence Hampson90508a92011-08-09 10:40:08 -04006342static struct pmic8058_charger_data pmic8058_charger_dragon = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306343 .charger_data_valid = true,
Terence Hampson90508a92011-08-09 10:40:08 -04006344 .max_source_current = 1800,
6345 .charger_type = CHG_TYPE_AC,
6346};
6347
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306348static struct pmic8058_charger_data pmic8058_charger_ffa_surf = {
6349 .charger_data_valid = false,
6350};
6351
6352static struct pm8xxx_misc_platform_data pm8058_misc_pdata = {
6353 .priority = 0,
6354};
6355
6356static struct pm8xxx_irq_platform_data pm8058_irq_pdata = {
6357 .irq_base = PM8058_IRQ_BASE,
6358 .devirq = MSM_GPIO_TO_INT(PM8058_GPIO_INT),
6359 .irq_trigger_flag = IRQF_TRIGGER_LOW,
6360};
6361
6362static struct pm8xxx_gpio_platform_data pm8058_gpio_pdata = {
6363 .gpio_base = PM8058_GPIO_PM_TO_SYS(0),
6364};
6365
6366static struct pm8xxx_mpp_platform_data pm8058_mpp_pdata = {
6367 .mpp_base = PM8058_MPP_PM_TO_SYS(0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006368};
6369
6370static struct pm8058_platform_data pm8058_platform_data = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306371 .irq_pdata = &pm8058_irq_pdata,
6372 .gpio_pdata = &pm8058_gpio_pdata,
6373 .mpp_pdata = &pm8058_mpp_pdata,
6374 .rtc_pdata = &pm8058_rtc_pdata,
6375 .pwrkey_pdata = &pm8058_pwrkey_pdata,
6376 .othc0_pdata = &othc_config_pdata_0,
6377 .othc1_pdata = &othc_config_pdata_1,
6378 .othc2_pdata = &othc_config_pdata_2,
6379 .pwm_pdata = &pm8058_pwm_data,
6380 .misc_pdata = &pm8058_misc_pdata,
6381#ifdef CONFIG_SENSORS_MSM_ADC
6382 .xoadc_pdata = &pm8058_xoadc_pdata,
6383#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006384};
6385
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05306386#ifdef CONFIG_MSM_SSBI
6387static struct msm_ssbi_platform_data msm8x60_ssbi_pm8058_pdata __devinitdata = {
6388 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
6389 .slave = {
6390 .name = "pm8058-core",
6391 .platform_data = &pm8058_platform_data,
6392 },
6393};
6394#endif
6395#endif /* CONFIG_PMIC8058 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006396
6397#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
6398 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
6399#define TDISC_I2C_SLAVE_ADDR 0x67
6400#define PMIC_GPIO_TDISC PM8058_GPIO_PM_TO_SYS(5)
6401#define TDISC_INT PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 5)
6402
6403static const char *vregs_tdisc_name[] = {
6404 "8058_l5",
6405 "8058_s3",
6406};
6407
6408static const int vregs_tdisc_val[] = {
6409 2850000,/* uV */
6410 1800000,
6411};
6412static struct regulator *vregs_tdisc[ARRAY_SIZE(vregs_tdisc_name)];
6413
6414static int tdisc_shinetsu_setup(void)
6415{
6416 int rc, i;
6417
6418 rc = gpio_request(PMIC_GPIO_TDISC, "tdisc_interrupt");
6419 if (rc) {
6420 pr_err("%s: gpio_request failed for PMIC_GPIO_TDISC\n",
6421 __func__);
6422 return rc;
6423 }
6424
6425 rc = gpio_request(GPIO_JOYSTICK_EN, "tdisc_oe");
6426 if (rc) {
6427 pr_err("%s: gpio_request failed for GPIO_JOYSTICK_EN\n",
6428 __func__);
6429 goto fail_gpio_oe;
6430 }
6431
6432 rc = gpio_direction_output(GPIO_JOYSTICK_EN, 1);
6433 if (rc) {
6434 pr_err("%s: gpio_direction_output failed for GPIO_JOYSTICK_EN\n",
6435 __func__);
6436 gpio_free(GPIO_JOYSTICK_EN);
6437 goto fail_gpio_oe;
6438 }
6439
6440 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6441 vregs_tdisc[i] = regulator_get(NULL, vregs_tdisc_name[i]);
6442 if (IS_ERR(vregs_tdisc[i])) {
6443 printk(KERN_ERR "%s: regulator get %s failed (%ld)\n",
6444 __func__, vregs_tdisc_name[i],
6445 PTR_ERR(vregs_tdisc[i]));
6446 rc = PTR_ERR(vregs_tdisc[i]);
6447 goto vreg_get_fail;
6448 }
6449
6450 rc = regulator_set_voltage(vregs_tdisc[i],
6451 vregs_tdisc_val[i], vregs_tdisc_val[i]);
6452 if (rc) {
6453 printk(KERN_ERR "%s: regulator_set_voltage() = %d\n",
6454 __func__, rc);
6455 goto vreg_set_voltage_fail;
6456 }
6457 }
6458
6459 return rc;
6460vreg_set_voltage_fail:
6461 i++;
6462vreg_get_fail:
6463 while (i)
6464 regulator_put(vregs_tdisc[--i]);
6465fail_gpio_oe:
6466 gpio_free(PMIC_GPIO_TDISC);
6467 return rc;
6468}
6469
6470static void tdisc_shinetsu_release(void)
6471{
6472 int i;
6473
6474 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++)
6475 regulator_put(vregs_tdisc[i]);
6476
6477 gpio_free(PMIC_GPIO_TDISC);
6478 gpio_free(GPIO_JOYSTICK_EN);
6479}
6480
6481static int tdisc_shinetsu_enable(void)
6482{
6483 int i, rc = -EINVAL;
6484
6485 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6486 rc = regulator_enable(vregs_tdisc[i]);
6487 if (rc < 0) {
6488 printk(KERN_ERR "%s: vreg %s enable failed (%d)\n",
6489 __func__, vregs_tdisc_name[i], rc);
6490 goto vreg_fail;
6491 }
6492 }
6493
6494 /* Enable the OE (output enable) gpio */
6495 gpio_set_value_cansleep(GPIO_JOYSTICK_EN, 1);
6496 /* voltage and gpio stabilization delay */
6497 msleep(50);
6498
6499 return 0;
6500vreg_fail:
6501 while (i)
6502 regulator_disable(vregs_tdisc[--i]);
6503 return rc;
6504}
6505
6506static int tdisc_shinetsu_disable(void)
6507{
6508 int i, rc;
6509
6510 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6511 rc = regulator_disable(vregs_tdisc[i]);
6512 if (rc < 0) {
6513 printk(KERN_ERR "%s: vreg %s disable failed (%d)\n",
6514 __func__, vregs_tdisc_name[i], rc);
6515 goto tdisc_reg_fail;
6516 }
6517 }
6518
6519 /* Disable the OE (output enable) gpio */
6520 gpio_set_value_cansleep(GPIO_JOYSTICK_EN, 0);
6521
6522 return 0;
6523
6524tdisc_reg_fail:
6525 while (i)
6526 regulator_enable(vregs_tdisc[--i]);
6527 return rc;
6528}
6529
6530static struct tdisc_abs_values tdisc_abs = {
6531 .x_max = 32,
6532 .y_max = 32,
6533 .x_min = -32,
6534 .y_min = -32,
6535 .pressure_max = 32,
6536 .pressure_min = 0,
6537};
6538
6539static struct tdisc_platform_data tdisc_data = {
6540 .tdisc_setup = tdisc_shinetsu_setup,
6541 .tdisc_release = tdisc_shinetsu_release,
6542 .tdisc_enable = tdisc_shinetsu_enable,
6543 .tdisc_disable = tdisc_shinetsu_disable,
6544 .tdisc_wakeup = 0,
6545 .tdisc_gpio = PMIC_GPIO_TDISC,
6546 .tdisc_report_keys = true,
6547 .tdisc_report_relative = true,
6548 .tdisc_report_absolute = false,
6549 .tdisc_report_wheel = false,
6550 .tdisc_reverse_x = false,
6551 .tdisc_reverse_y = true,
6552 .tdisc_abs = &tdisc_abs,
6553};
6554
6555static struct i2c_board_info msm_i2c_gsbi3_tdisc_info[] = {
6556 {
6557 I2C_BOARD_INFO("vtd518", TDISC_I2C_SLAVE_ADDR),
6558 .irq = TDISC_INT,
6559 .platform_data = &tdisc_data,
6560 },
6561};
6562#endif
6563
6564#define PM_GPIO_CDC_RST_N 20
6565#define GPIO_CDC_RST_N PM8058_GPIO_PM_TO_SYS(PM_GPIO_CDC_RST_N)
6566
6567static struct regulator *vreg_timpani_1;
6568static struct regulator *vreg_timpani_2;
6569
6570static unsigned int msm_timpani_setup_power(void)
6571{
6572 int rc;
6573
6574 vreg_timpani_1 = regulator_get(NULL, "8058_l0");
6575 if (IS_ERR(vreg_timpani_1)) {
6576 pr_err("%s: Unable to get 8058_l0\n", __func__);
6577 return -ENODEV;
6578 }
6579
6580 vreg_timpani_2 = regulator_get(NULL, "8058_s3");
6581 if (IS_ERR(vreg_timpani_2)) {
6582 pr_err("%s: Unable to get 8058_s3\n", __func__);
6583 regulator_put(vreg_timpani_1);
6584 return -ENODEV;
6585 }
6586
6587 rc = regulator_set_voltage(vreg_timpani_1, 1200000, 1200000);
6588 if (rc) {
6589 pr_err("%s: unable to set L0 voltage to 1.2V\n", __func__);
6590 goto fail;
6591 }
6592
6593 rc = regulator_set_voltage(vreg_timpani_2, 1800000, 1800000);
6594 if (rc) {
6595 pr_err("%s: unable to set S3 voltage to 1.8V\n", __func__);
6596 goto fail;
6597 }
6598
6599 rc = regulator_enable(vreg_timpani_1);
6600 if (rc) {
6601 pr_err("%s: Enable regulator 8058_l0 failed\n", __func__);
6602 goto fail;
6603 }
6604
6605 /* The settings for LDO0 should be set such that
6606 * it doesn't require to reset the timpani. */
6607 rc = regulator_set_optimum_mode(vreg_timpani_1, 5000);
6608 if (rc < 0) {
6609 pr_err("Timpani regulator optimum mode setting failed\n");
6610 goto fail;
6611 }
6612
6613 rc = regulator_enable(vreg_timpani_2);
6614 if (rc) {
6615 pr_err("%s: Enable regulator 8058_s3 failed\n", __func__);
6616 regulator_disable(vreg_timpani_1);
6617 goto fail;
6618 }
6619
6620 rc = gpio_request(GPIO_CDC_RST_N, "CDC_RST_N");
6621 if (rc) {
6622 pr_err("%s: GPIO Request %d failed\n", __func__,
6623 GPIO_CDC_RST_N);
6624 regulator_disable(vreg_timpani_1);
6625 regulator_disable(vreg_timpani_2);
6626 goto fail;
6627 } else {
6628 gpio_direction_output(GPIO_CDC_RST_N, 1);
6629 usleep_range(1000, 1050);
6630 gpio_direction_output(GPIO_CDC_RST_N, 0);
6631 usleep_range(1000, 1050);
6632 gpio_direction_output(GPIO_CDC_RST_N, 1);
6633 gpio_free(GPIO_CDC_RST_N);
6634 }
6635 return rc;
6636
6637fail:
6638 regulator_put(vreg_timpani_1);
6639 regulator_put(vreg_timpani_2);
6640 return rc;
6641}
6642
6643static void msm_timpani_shutdown_power(void)
6644{
6645 int rc;
6646
6647 rc = regulator_disable(vreg_timpani_1);
6648 if (rc)
6649 pr_err("%s: Disable regulator 8058_l0 failed\n", __func__);
6650
6651 regulator_put(vreg_timpani_1);
6652
6653 rc = regulator_disable(vreg_timpani_2);
6654 if (rc)
6655 pr_err("%s: Disable regulator 8058_s3 failed\n", __func__);
6656
6657 regulator_put(vreg_timpani_2);
6658}
6659
6660/* Power analog function of codec */
6661static struct regulator *vreg_timpani_cdc_apwr;
6662static int msm_timpani_codec_power(int vreg_on)
6663{
6664 int rc = 0;
6665
6666 if (!vreg_timpani_cdc_apwr) {
6667
6668 vreg_timpani_cdc_apwr = regulator_get(NULL, "8058_s4");
6669
6670 if (IS_ERR(vreg_timpani_cdc_apwr)) {
6671 pr_err("%s: vreg_get failed (%ld)\n",
6672 __func__, PTR_ERR(vreg_timpani_cdc_apwr));
6673 rc = PTR_ERR(vreg_timpani_cdc_apwr);
6674 return rc;
6675 }
6676 }
6677
6678 if (vreg_on) {
6679
6680 rc = regulator_set_voltage(vreg_timpani_cdc_apwr,
6681 2200000, 2200000);
6682 if (rc) {
6683 pr_err("%s: unable to set 8058_s4 voltage to 2.2 V\n",
6684 __func__);
6685 goto vreg_fail;
6686 }
6687
6688 rc = regulator_enable(vreg_timpani_cdc_apwr);
6689 if (rc) {
6690 pr_err("%s: vreg_enable failed %d\n", __func__, rc);
6691 goto vreg_fail;
6692 }
6693 } else {
6694 rc = regulator_disable(vreg_timpani_cdc_apwr);
6695 if (rc) {
6696 pr_err("%s: vreg_disable failed %d\n",
6697 __func__, rc);
6698 goto vreg_fail;
6699 }
6700 }
6701
6702 return 0;
6703
6704vreg_fail:
6705 regulator_put(vreg_timpani_cdc_apwr);
6706 vreg_timpani_cdc_apwr = NULL;
6707 return rc;
6708}
6709
6710static struct marimba_codec_platform_data timpani_codec_pdata = {
6711 .marimba_codec_power = msm_timpani_codec_power,
6712};
6713
6714#define TIMPANI_SLAVE_ID_CDC_ADDR 0X77
6715#define TIMPANI_SLAVE_ID_QMEMBIST_ADDR 0X66
6716
6717static struct marimba_platform_data timpani_pdata = {
6718 .slave_id[MARIMBA_SLAVE_ID_CDC] = TIMPANI_SLAVE_ID_CDC_ADDR,
6719 .slave_id[MARIMBA_SLAVE_ID_QMEMBIST] = TIMPANI_SLAVE_ID_QMEMBIST_ADDR,
6720 .marimba_setup = msm_timpani_setup_power,
6721 .marimba_shutdown = msm_timpani_shutdown_power,
6722 .codec = &timpani_codec_pdata,
6723 .tsadc_ssbi_adap = MARIMBA_SSBI_ADAP,
6724};
6725
6726#define TIMPANI_I2C_SLAVE_ADDR 0xD
6727
6728static struct i2c_board_info msm_i2c_gsbi7_timpani_info[] = {
6729 {
6730 I2C_BOARD_INFO("timpani", TIMPANI_I2C_SLAVE_ADDR),
6731 .platform_data = &timpani_pdata,
6732 },
6733};
6734
Lei Zhou338cab82011-08-19 13:38:17 -04006735#ifdef CONFIG_SND_SOC_WM8903
6736static struct wm8903_platform_data wm8903_pdata = {
6737 .gpio_cfg[2] = 0x3A8,
6738};
6739
6740#define WM8903_I2C_SLAVE_ADDR 0x34
6741static struct i2c_board_info wm8903_codec_i2c_info[] = {
6742 {
6743 I2C_BOARD_INFO("wm8903", WM8903_I2C_SLAVE_ADDR >> 1),
6744 .platform_data = &wm8903_pdata,
6745 },
6746};
6747#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006748#ifdef CONFIG_PMIC8901
6749
6750#define PM8901_GPIO_INT 91
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006751/*
6752 * Consumer specific regulator names:
6753 * regulator name consumer dev_name
6754 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006755static struct regulator_consumer_supply vreg_consumers_8901_USB_OTG[] = {
6756 REGULATOR_SUPPLY("8901_usb_otg", NULL),
6757};
6758static struct regulator_consumer_supply vreg_consumers_8901_HDMI_MVS[] = {
6759 REGULATOR_SUPPLY("8901_hdmi_mvs", NULL),
6760};
6761
6762#define PM8901_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306763 _always_on) \
6764 { \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006765 .init_data = { \
6766 .constraints = { \
6767 .valid_modes_mask = _modes, \
6768 .valid_ops_mask = _ops, \
6769 .min_uV = _min_uV, \
6770 .max_uV = _max_uV, \
6771 .input_uV = _min_uV, \
6772 .apply_uV = _apply_uV, \
6773 .always_on = _always_on, \
6774 }, \
6775 .consumer_supplies = vreg_consumers_8901_##_id, \
6776 .num_consumer_supplies = \
6777 ARRAY_SIZE(vreg_consumers_8901_##_id), \
6778 }, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306779 .id = PM8901_VREG_ID_##_id, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006780 }
6781
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006782#define PM8901_VREG_INIT_VS(_id) \
6783 PM8901_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306784 REGULATOR_CHANGE_STATUS, 0, 0)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006785
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306786static struct pm8901_vreg_pdata pm8901_vreg_init[] = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006787 PM8901_VREG_INIT_VS(USB_OTG),
6788 PM8901_VREG_INIT_VS(HDMI_MVS),
6789};
6790
Anirudh Ghayalb6c98092011-12-13 14:06:48 +05306791static struct pm8xxx_misc_platform_data pm8901_misc_pdata = {
6792 .priority = 1,
6793};
6794
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306795static struct pm8xxx_irq_platform_data pm8901_irq_pdata = {
6796 .irq_base = PM8901_IRQ_BASE,
6797 .devirq = MSM_GPIO_TO_INT(PM8901_GPIO_INT),
6798 .irq_trigger_flag = IRQF_TRIGGER_LOW,
6799};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006800
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306801static struct pm8xxx_mpp_platform_data pm8901_mpp_pdata = {
6802 .mpp_base = PM8901_MPP_PM_TO_SYS(0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006803};
6804
6805static struct pm8901_platform_data pm8901_platform_data = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306806 .irq_pdata = &pm8901_irq_pdata,
6807 .mpp_pdata = &pm8901_mpp_pdata,
6808 .regulator_pdatas = pm8901_vreg_init,
6809 .num_regulators = ARRAY_SIZE(pm8901_vreg_init),
Anirudh Ghayalb6c98092011-12-13 14:06:48 +05306810 .misc_pdata = &pm8901_misc_pdata,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006811};
6812
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05306813static struct msm_ssbi_platform_data msm8x60_ssbi_pm8901_pdata __devinitdata = {
6814 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
6815 .slave = {
6816 .name = "pm8901-core",
6817 .platform_data = &pm8901_platform_data,
6818 },
6819};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006820#endif /* CONFIG_PMIC8901 */
6821
6822#if defined(CONFIG_MARIMBA_CORE) && (defined(CONFIG_GPIO_SX150X) \
6823 || defined(CONFIG_GPIO_SX150X_MODULE))
6824
6825static struct regulator *vreg_bahama;
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006826static int msm_bahama_sys_rst = GPIO_MS_SYS_RESET_N;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006827
6828struct bahama_config_register{
6829 u8 reg;
6830 u8 value;
6831 u8 mask;
6832};
6833
6834enum version{
6835 VER_1_0,
6836 VER_2_0,
6837 VER_UNSUPPORTED = 0xFF
6838};
6839
6840static u8 read_bahama_ver(void)
6841{
6842 int rc;
6843 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA };
6844 u8 bahama_version;
6845
6846 rc = marimba_read_bit_mask(&config, 0x00, &bahama_version, 1, 0x1F);
6847 if (rc < 0) {
6848 printk(KERN_ERR
6849 "%s: version read failed: %d\n",
6850 __func__, rc);
6851 return VER_UNSUPPORTED;
6852 } else {
6853 printk(KERN_INFO
6854 "%s: version read got: 0x%x\n",
6855 __func__, bahama_version);
6856 }
6857
6858 switch (bahama_version) {
6859 case 0x08: /* varient of bahama v1 */
6860 case 0x10:
6861 case 0x00:
6862 return VER_1_0;
6863 case 0x09: /* variant of bahama v2 */
6864 return VER_2_0;
6865 default:
6866 return VER_UNSUPPORTED;
6867 }
6868}
6869
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006870static int msm_bahama_setup_power_enable;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006871static unsigned int msm_bahama_setup_power(void)
6872{
6873 int rc = 0;
6874 const char *msm_bahama_regulator = "8058_s3";
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006875
6876 if (machine_is_msm8x60_dragon())
6877 msm_bahama_sys_rst = GPIO_CDC_RST_N;
6878
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006879 vreg_bahama = regulator_get(NULL, msm_bahama_regulator);
6880
6881 if (IS_ERR(vreg_bahama)) {
6882 rc = PTR_ERR(vreg_bahama);
6883 pr_err("%s: regulator_get %s = %d\n", __func__,
6884 msm_bahama_regulator, rc);
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006885 return rc;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006886 }
6887
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006888 rc = regulator_set_voltage(vreg_bahama, 1800000, 1800000);
6889 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006890 pr_err("%s: regulator_set_voltage %s = %d\n", __func__,
6891 msm_bahama_regulator, rc);
6892 goto unget;
6893 }
6894
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006895 rc = regulator_enable(vreg_bahama);
6896 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006897 pr_err("%s: regulator_enable %s = %d\n", __func__,
6898 msm_bahama_regulator, rc);
6899 goto unget;
6900 }
6901
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006902 rc = gpio_request(msm_bahama_sys_rst, "bahama sys_rst_n");
6903 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006904 pr_err("%s: gpio_request %d = %d\n", __func__,
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006905 msm_bahama_sys_rst, rc);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006906 goto unenable;
6907 }
6908
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006909 gpio_direction_output(msm_bahama_sys_rst, 0);
6910 usleep_range(1000, 1050);
6911 gpio_set_value_cansleep(msm_bahama_sys_rst, 1);
6912 usleep_range(1000, 1050);
6913 msm_bahama_setup_power_enable = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006914 return rc;
6915
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006916unenable:
6917 regulator_disable(vreg_bahama);
6918unget:
6919 regulator_put(vreg_bahama);
6920 return rc;
6921};
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006922
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006923static unsigned int msm_bahama_shutdown_power(int value)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006924{
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006925 if (msm_bahama_setup_power_enable) {
6926 gpio_set_value_cansleep(msm_bahama_sys_rst, 0);
6927 gpio_free(msm_bahama_sys_rst);
6928 regulator_disable(vreg_bahama);
6929 regulator_put(vreg_bahama);
6930 msm_bahama_setup_power_enable = 0;
6931 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006932
6933 return 0;
6934};
6935
6936static unsigned int msm_bahama_core_config(int type)
6937{
6938 int rc = 0;
6939
6940 if (type == BAHAMA_ID) {
6941
6942 int i;
6943 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA };
6944
6945 const struct bahama_config_register v20_init[] = {
6946 /* reg, value, mask */
6947 { 0xF4, 0x84, 0xFF }, /* AREG */
6948 { 0xF0, 0x04, 0xFF } /* DREG */
6949 };
6950
6951 if (read_bahama_ver() == VER_2_0) {
6952 for (i = 0; i < ARRAY_SIZE(v20_init); i++) {
6953 u8 value = v20_init[i].value;
6954 rc = marimba_write_bit_mask(&config,
6955 v20_init[i].reg,
6956 &value,
6957 sizeof(v20_init[i].value),
6958 v20_init[i].mask);
6959 if (rc < 0) {
6960 printk(KERN_ERR
6961 "%s: reg %d write failed: %d\n",
6962 __func__, v20_init[i].reg, rc);
6963 return rc;
6964 }
6965 printk(KERN_INFO "%s: reg 0x%02x value 0x%02x"
6966 " mask 0x%02x\n",
6967 __func__, v20_init[i].reg,
6968 v20_init[i].value, v20_init[i].mask);
6969 }
6970 }
6971 }
6972 printk(KERN_INFO "core type: %d\n", type);
6973
6974 return rc;
6975}
6976
6977static struct regulator *fm_regulator_s3;
6978static struct msm_xo_voter *fm_clock;
6979
6980static int fm_radio_setup(struct marimba_fm_platform_data *pdata)
6981{
6982 int rc = 0;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306983 struct pm_gpio cfg = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006984 .direction = PM_GPIO_DIR_IN,
6985 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306986 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006987 .function = PM_GPIO_FUNC_NORMAL,
6988 .inv_int_pol = 0,
6989 };
6990
6991 if (!fm_regulator_s3) {
6992 fm_regulator_s3 = regulator_get(NULL, "8058_s3");
6993 if (IS_ERR(fm_regulator_s3)) {
6994 rc = PTR_ERR(fm_regulator_s3);
6995 printk(KERN_ERR "%s: regulator get s3 (%d)\n",
6996 __func__, rc);
6997 goto out;
6998 }
6999 }
7000
7001
7002 rc = regulator_set_voltage(fm_regulator_s3, 1800000, 1800000);
7003 if (rc < 0) {
7004 printk(KERN_ERR "%s: regulator set voltage failed (%d)\n",
7005 __func__, rc);
7006 goto fm_fail_put;
7007 }
7008
7009 rc = regulator_enable(fm_regulator_s3);
7010 if (rc < 0) {
7011 printk(KERN_ERR "%s: regulator s3 enable failed (%d)\n",
7012 __func__, rc);
7013 goto fm_fail_put;
7014 }
7015
7016 /*Vote for XO clock*/
7017 fm_clock = msm_xo_get(MSM_XO_TCXO_D0, "fm_power");
7018
7019 if (IS_ERR(fm_clock)) {
7020 rc = PTR_ERR(fm_clock);
7021 printk(KERN_ERR "%s: Couldn't get TCXO_D0 vote for FM (%d)\n",
7022 __func__, rc);
7023 goto fm_fail_switch;
7024 }
7025
7026 rc = msm_xo_mode_vote(fm_clock, MSM_XO_MODE_ON);
7027 if (rc < 0) {
7028 printk(KERN_ERR "%s: Failed to vote for TCX0_D0 ON (%d)\n",
7029 __func__, rc);
7030 goto fm_fail_vote;
7031 }
7032
7033 /*GPIO 18 on PMIC is FM_IRQ*/
Anirudh Ghayalc2019332011-11-12 06:29:10 +05307034 rc = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(FM_GPIO), &cfg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007035 if (rc) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05307036 printk(KERN_ERR "%s: return val of pm8xxx_gpio_config: %d\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007037 __func__, rc);
7038 goto fm_fail_clock;
7039 }
7040 goto out;
7041
7042fm_fail_clock:
7043 msm_xo_mode_vote(fm_clock, MSM_XO_MODE_OFF);
7044fm_fail_vote:
7045 msm_xo_put(fm_clock);
7046fm_fail_switch:
7047 regulator_disable(fm_regulator_s3);
7048fm_fail_put:
7049 regulator_put(fm_regulator_s3);
7050out:
7051 return rc;
7052};
7053
7054static void fm_radio_shutdown(struct marimba_fm_platform_data *pdata)
7055{
7056 int rc = 0;
7057 if (fm_regulator_s3 != NULL) {
7058 rc = regulator_disable(fm_regulator_s3);
7059 if (rc < 0) {
7060 printk(KERN_ERR "%s: regulator s3 disable (%d)\n",
7061 __func__, rc);
7062 }
7063 regulator_put(fm_regulator_s3);
7064 fm_regulator_s3 = NULL;
7065 }
7066 printk(KERN_ERR "%s: Voting off for XO", __func__);
7067
7068 if (fm_clock != NULL) {
7069 rc = msm_xo_mode_vote(fm_clock, MSM_XO_MODE_OFF);
7070 if (rc < 0) {
7071 printk(KERN_ERR "%s: Voting off XO clock (%d)\n",
7072 __func__, rc);
7073 }
7074 msm_xo_put(fm_clock);
7075 }
7076 printk(KERN_ERR "%s: coming out of fm_radio_shutdown", __func__);
7077}
7078
7079/* Slave id address for FM/CDC/QMEMBIST
7080 * Values can be programmed using Marimba slave id 0
7081 * should there be a conflict with other I2C devices
7082 * */
7083#define BAHAMA_SLAVE_ID_FM_ADDR 0x2A
7084#define BAHAMA_SLAVE_ID_QMEMBIST_ADDR 0x7B
7085
7086static struct marimba_fm_platform_data marimba_fm_pdata = {
7087 .fm_setup = fm_radio_setup,
7088 .fm_shutdown = fm_radio_shutdown,
7089 .irq = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, FM_GPIO),
7090 .is_fm_soc_i2s_master = false,
7091 .config_i2s_gpio = NULL,
7092};
7093
7094/*
7095Just initializing the BAHAMA related slave
7096*/
7097static struct marimba_platform_data marimba_pdata = {
7098 .slave_id[SLAVE_ID_BAHAMA_FM] = BAHAMA_SLAVE_ID_FM_ADDR,
7099 .slave_id[SLAVE_ID_BAHAMA_QMEMBIST] = BAHAMA_SLAVE_ID_QMEMBIST_ADDR,
7100 .bahama_setup = msm_bahama_setup_power,
7101 .bahama_shutdown = msm_bahama_shutdown_power,
7102 .bahama_core_config = msm_bahama_core_config,
7103 .fm = &marimba_fm_pdata,
7104 .tsadc_ssbi_adap = MARIMBA_SSBI_ADAP,
7105};
7106
7107
7108static struct i2c_board_info msm_marimba_board_info[] = {
7109 {
7110 I2C_BOARD_INFO("marimba", 0xc),
7111 .platform_data = &marimba_pdata,
7112 }
7113};
7114#endif /* CONFIG_MAIMBA_CORE */
7115
7116#ifdef CONFIG_I2C
7117#define I2C_SURF 1
7118#define I2C_FFA (1 << 1)
7119#define I2C_RUMI (1 << 2)
7120#define I2C_SIM (1 << 3)
7121#define I2C_FLUID (1 << 4)
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007122#define I2C_DRAGON (1 << 5)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007123
7124struct i2c_registry {
7125 u8 machs;
7126 int bus;
7127 struct i2c_board_info *info;
7128 int len;
7129};
7130
7131static struct i2c_registry msm8x60_i2c_devices[] __initdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007132#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
7133 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007134 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007135 MSM_GSBI8_QUP_I2C_BUS_ID,
7136 core_expander_i2c_info,
7137 ARRAY_SIZE(core_expander_i2c_info),
7138 },
7139 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007140 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007141 MSM_GSBI8_QUP_I2C_BUS_ID,
7142 docking_expander_i2c_info,
7143 ARRAY_SIZE(docking_expander_i2c_info),
7144 },
7145 {
7146 I2C_SURF,
7147 MSM_GSBI8_QUP_I2C_BUS_ID,
7148 surf_expanders_i2c_info,
7149 ARRAY_SIZE(surf_expanders_i2c_info),
7150 },
7151 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007152 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007153 MSM_GSBI3_QUP_I2C_BUS_ID,
7154 fha_expanders_i2c_info,
7155 ARRAY_SIZE(fha_expanders_i2c_info),
7156 },
7157 {
7158 I2C_FLUID,
7159 MSM_GSBI3_QUP_I2C_BUS_ID,
7160 fluid_expanders_i2c_info,
7161 ARRAY_SIZE(fluid_expanders_i2c_info),
7162 },
7163 {
7164 I2C_FLUID,
7165 MSM_GSBI8_QUP_I2C_BUS_ID,
7166 fluid_core_expander_i2c_info,
7167 ARRAY_SIZE(fluid_core_expander_i2c_info),
7168 },
7169#endif
7170#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
7171 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
7172 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007173 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007174 MSM_GSBI3_QUP_I2C_BUS_ID,
7175 msm_i2c_gsbi3_tdisc_info,
7176 ARRAY_SIZE(msm_i2c_gsbi3_tdisc_info),
7177 },
7178#endif
7179 {
Zhang Chang Ken211df572011-07-05 19:16:39 -04007180 I2C_SURF | I2C_FFA | I2C_FLUID,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007181 MSM_GSBI3_QUP_I2C_BUS_ID,
7182 cy8ctmg200_board_info,
7183 ARRAY_SIZE(cy8ctmg200_board_info),
7184 },
Zhang Chang Ken211df572011-07-05 19:16:39 -04007185 {
7186 I2C_DRAGON,
7187 MSM_GSBI3_QUP_I2C_BUS_ID,
7188 cy8ctma340_dragon_board_info,
7189 ARRAY_SIZE(cy8ctma340_dragon_board_info),
7190 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007191#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
7192 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
7193 {
7194 I2C_FLUID,
7195 MSM_GSBI3_QUP_I2C_BUS_ID,
7196 cyttsp_fluid_info,
7197 ARRAY_SIZE(cyttsp_fluid_info),
7198 },
7199 {
7200 I2C_FFA | I2C_SURF,
7201 MSM_GSBI3_QUP_I2C_BUS_ID,
7202 cyttsp_ffa_info,
7203 ARRAY_SIZE(cyttsp_ffa_info),
7204 },
7205#endif
7206#ifdef CONFIG_MSM_CAMERA
Kevin Chan3be11612012-03-22 20:05:40 -07007207#ifndef CONFIG_MSM_CAMERA_V4L2
Jilai Wang971f97f2011-07-13 14:25:25 -04007208 {
7209 I2C_SURF | I2C_FFA | I2C_FLUID ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007210 MSM_GSBI4_QUP_I2C_BUS_ID,
7211 msm_camera_boardinfo,
7212 ARRAY_SIZE(msm_camera_boardinfo),
7213 },
Jilai Wang971f97f2011-07-13 14:25:25 -04007214 {
7215 I2C_DRAGON,
7216 MSM_GSBI4_QUP_I2C_BUS_ID,
7217 msm_camera_dragon_boardinfo,
7218 ARRAY_SIZE(msm_camera_dragon_boardinfo),
7219 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007220#endif
Kevin Chan3be11612012-03-22 20:05:40 -07007221#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007222 {
7223 I2C_SURF | I2C_FFA | I2C_FLUID,
7224 MSM_GSBI7_QUP_I2C_BUS_ID,
7225 msm_i2c_gsbi7_timpani_info,
7226 ARRAY_SIZE(msm_i2c_gsbi7_timpani_info),
7227 },
7228#if defined(CONFIG_MARIMBA_CORE)
7229 {
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04007230 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007231 MSM_GSBI7_QUP_I2C_BUS_ID,
7232 msm_marimba_board_info,
7233 ARRAY_SIZE(msm_marimba_board_info),
7234 },
7235#endif /* CONFIG_MARIMBA_CORE */
7236#ifdef CONFIG_ISL9519_CHARGER
7237 {
7238 I2C_SURF | I2C_FFA,
7239 MSM_GSBI8_QUP_I2C_BUS_ID,
7240 isl_charger_i2c_info,
7241 ARRAY_SIZE(isl_charger_i2c_info),
7242 },
7243#endif
7244#if defined(CONFIG_HAPTIC_ISA1200) || \
7245 defined(CONFIG_HAPTIC_ISA1200_MODULE)
7246 {
7247 I2C_FLUID,
7248 MSM_GSBI8_QUP_I2C_BUS_ID,
7249 msm_isa1200_board_info,
7250 ARRAY_SIZE(msm_isa1200_board_info),
7251 },
7252#endif
7253#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
7254 {
7255 I2C_FLUID,
7256 MSM_GSBI8_QUP_I2C_BUS_ID,
7257 smb137b_charger_i2c_info,
7258 ARRAY_SIZE(smb137b_charger_i2c_info),
7259 },
7260#endif
7261#if defined(CONFIG_BATTERY_BQ27520) || \
7262 defined(CONFIG_BATTERY_BQ27520_MODULE)
7263 {
7264 I2C_FLUID,
7265 MSM_GSBI8_QUP_I2C_BUS_ID,
7266 msm_bq27520_board_info,
7267 ARRAY_SIZE(msm_bq27520_board_info),
7268 },
7269#endif
Lei Zhou338cab82011-08-19 13:38:17 -04007270#if defined(CONFIG_SND_SOC_WM8903) || defined(CONFIG_SND_SOC_WM8903_MODULE)
7271 {
7272 I2C_DRAGON,
7273 MSM_GSBI8_QUP_I2C_BUS_ID,
7274 wm8903_codec_i2c_info,
7275 ARRAY_SIZE(wm8903_codec_i2c_info),
7276 },
7277#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007278};
7279#endif /* CONFIG_I2C */
7280
Stephen Boyd668d7652012-04-25 11:31:01 -07007281static void __init fixup_i2c_configs(void)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007282{
7283#ifdef CONFIG_I2C
7284#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
7285 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion())
7286 sx150x_data[SX150X_CORE].irq_summary =
7287 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT2_N);
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007288 else if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa() ||
7289 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007290 sx150x_data[SX150X_CORE].irq_summary =
7291 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT1_N);
7292 else if (machine_is_msm8x60_fluid())
7293 sx150x_data[SX150X_CORE_FLUID].irq_summary =
7294 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT1_N);
7295#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007296#endif
7297}
7298
Stephen Boyd668d7652012-04-25 11:31:01 -07007299static void __init register_i2c_devices(void)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007300{
7301#ifdef CONFIG_I2C
7302 u8 mach_mask = 0;
7303 int i;
Kevin Chan3be11612012-03-22 20:05:40 -07007304#ifdef CONFIG_MSM_CAMERA_V4L2
7305 struct i2c_registry msm8x60_camera_i2c_devices = {
7306 I2C_SURF | I2C_FFA | I2C_FLUID,
7307 MSM_GSBI4_QUP_I2C_BUS_ID,
7308 msm8x60_camera_board_info.board_info,
7309 msm8x60_camera_board_info.num_i2c_board_info,
7310 };
7311#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007312
7313 /* Build the matching 'supported_machs' bitmask */
7314 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion())
7315 mach_mask = I2C_SURF;
7316 else if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa())
7317 mach_mask = I2C_FFA;
7318 else if (machine_is_msm8x60_rumi3())
7319 mach_mask = I2C_RUMI;
7320 else if (machine_is_msm8x60_sim())
7321 mach_mask = I2C_SIM;
7322 else if (machine_is_msm8x60_fluid())
7323 mach_mask = I2C_FLUID;
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007324 else if (machine_is_msm8x60_dragon())
7325 mach_mask = I2C_DRAGON;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007326 else
7327 pr_err("unmatched machine ID in register_i2c_devices\n");
7328
7329 /* Run the array and install devices as appropriate */
7330 for (i = 0; i < ARRAY_SIZE(msm8x60_i2c_devices); ++i) {
7331 if (msm8x60_i2c_devices[i].machs & mach_mask)
7332 i2c_register_board_info(msm8x60_i2c_devices[i].bus,
7333 msm8x60_i2c_devices[i].info,
7334 msm8x60_i2c_devices[i].len);
7335 }
Kevin Chan3be11612012-03-22 20:05:40 -07007336#ifdef CONFIG_MSM_CAMERA_V4L2
7337 if (msm8x60_camera_i2c_devices.machs & mach_mask)
7338 i2c_register_board_info(msm8x60_camera_i2c_devices.bus,
7339 msm8x60_camera_i2c_devices.info,
7340 msm8x60_camera_i2c_devices.len);
7341#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007342#endif
7343}
7344
7345static void __init msm8x60_init_uart12dm(void)
7346{
7347#if !defined(CONFIG_USB_PEHCI_HCD) && !defined(CONFIG_USB_PEHCI_HCD_MODULE)
7348 /* 0x1D000000 now belongs to EBI2:CS3 i.e. USB ISP Controller */
7349 void *fpga_mem = ioremap_nocache(0x1D000000, SZ_4K);
7350
7351 if (!fpga_mem)
7352 pr_err("%s(): Error getting memory\n", __func__);
7353
7354 /* Advanced mode */
7355 writew(0xFFFF, fpga_mem + 0x15C);
7356 /* FPGA_UART_SEL */
7357 writew(0, fpga_mem + 0x172);
7358 /* FPGA_GPIO_CONFIG_117 */
7359 writew(1, fpga_mem + 0xEA);
7360 /* FPGA_GPIO_CONFIG_118 */
7361 writew(1, fpga_mem + 0xEC);
7362 mb();
7363 iounmap(fpga_mem);
7364#endif
7365}
7366
7367#define MSM_GSBI9_PHYS 0x19900000
7368#define GSBI_DUAL_MODE_CODE 0x60
7369
7370static void __init msm8x60_init_buses(void)
7371{
7372#ifdef CONFIG_I2C_QUP
7373 void *gsbi_mem = ioremap_nocache(0x19C00000, 4);
7374 /* Setting protocol code to 0x60 for dual UART/I2C in GSBI12 */
7375 writel_relaxed(0x6 << 4, gsbi_mem);
7376 /* Ensure protocol code is written before proceeding further */
7377 mb();
7378 iounmap(gsbi_mem);
7379
7380 msm_gsbi3_qup_i2c_device.dev.platform_data = &msm_gsbi3_qup_i2c_pdata;
7381 msm_gsbi4_qup_i2c_device.dev.platform_data = &msm_gsbi4_qup_i2c_pdata;
7382 msm_gsbi7_qup_i2c_device.dev.platform_data = &msm_gsbi7_qup_i2c_pdata;
7383 msm_gsbi8_qup_i2c_device.dev.platform_data = &msm_gsbi8_qup_i2c_pdata;
7384
7385#ifdef CONFIG_MSM_GSBI9_UART
7386 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
7387 /* Setting protocol code to 0x60 for dual UART/I2C in GSBI9 */
7388 gsbi_mem = ioremap_nocache(MSM_GSBI9_PHYS, 4);
7389 writel_relaxed(GSBI_DUAL_MODE_CODE, gsbi_mem);
7390 iounmap(gsbi_mem);
7391 msm_gsbi9_qup_i2c_pdata.use_gsbi_shared_mode = 1;
7392 }
7393#endif
7394 msm_gsbi9_qup_i2c_device.dev.platform_data = &msm_gsbi9_qup_i2c_pdata;
7395 msm_gsbi12_qup_i2c_device.dev.platform_data = &msm_gsbi12_qup_i2c_pdata;
7396#endif
7397#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
7398 msm_gsbi1_qup_spi_device.dev.platform_data = &msm_gsbi1_qup_spi_pdata;
7399#endif
7400#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007401 msm_device_ssbi3.dev.platform_data = &msm_ssbi3_pdata;
7402#endif
7403
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05307404#ifdef CONFIG_MSM_SSBI
7405 msm_device_ssbi_pmic1.dev.platform_data =
7406 &msm8x60_ssbi_pm8058_pdata;
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05307407 msm_device_ssbi_pmic2.dev.platform_data =
7408 &msm8x60_ssbi_pm8901_pdata;
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05307409#endif
7410
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007411 if (machine_is_msm8x60_fluid()) {
7412#if (defined(CONFIG_USB_EHCI_MSM_72K) && \
7413 (defined(CONFIG_SMB137B_CHARGER) || \
7414 defined(CONFIG_SMB137B_CHARGER_MODULE)))
7415 msm_otg_pdata.vbus_power = msm_hsusb_smb137b_vbus_power;
7416#endif
7417#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
7418 msm_gsbi10_qup_spi_device.dev.platform_data =
7419 &msm_gsbi10_qup_spi_pdata;
7420#endif
7421 }
7422
Lena Salman57d167e2012-03-21 19:46:38 +02007423#if defined(CONFIG_USB_MSM_72K) || defined(CONFIG_USB_EHCI_HCD)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007424 /*
7425 * We can not put USB regulators (8058_l6 and 8058_l7) in LPM
7426 * when we depend on USB PHY for VBUS/ID notifications. VBUS
7427 * and ID notifications are available only on V2 surf and FFA
7428 * with a hardware workaround.
7429 */
7430 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2 &&
7431 (machine_is_msm8x60_surf() ||
7432 (machine_is_msm8x60_ffa() &&
7433 pmic_id_notif_supported)))
7434 msm_otg_pdata.phy_can_powercollapse = 1;
7435 msm_device_otg.dev.platform_data = &msm_otg_pdata;
7436#endif
7437
Lena Salman57d167e2012-03-21 19:46:38 +02007438#ifdef CONFIG_USB_MSM_72K
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007439 msm_device_gadget_peripheral.dev.platform_data = &msm_gadget_pdata;
7440#endif
7441
7442#ifdef CONFIG_SERIAL_MSM_HS
7443 msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(54); /* GSBI6(2) */
7444 msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
7445#endif
7446#ifdef CONFIG_MSM_GSBI9_UART
7447 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
7448 msm_device_uart_gsbi9 = msm_add_gsbi9_uart();
7449 if (IS_ERR(msm_device_uart_gsbi9))
7450 pr_err("%s(): Failed to create uart gsbi9 device\n",
7451 __func__);
7452 }
7453#endif
7454
7455#ifdef CONFIG_MSM_BUS_SCALING
7456
7457 /* RPM calls are only enabled on V2 */
7458 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2) {
7459 msm_bus_apps_fabric_pdata.rpm_enabled = 1;
7460 msm_bus_sys_fabric_pdata.rpm_enabled = 1;
7461 msm_bus_mm_fabric_pdata.rpm_enabled = 1;
7462 msm_bus_sys_fpb_pdata.rpm_enabled = 1;
7463 msm_bus_cpss_fpb_pdata.rpm_enabled = 1;
7464 }
7465
7466 msm_bus_apps_fabric.dev.platform_data = &msm_bus_apps_fabric_pdata;
7467 msm_bus_sys_fabric.dev.platform_data = &msm_bus_sys_fabric_pdata;
7468 msm_bus_mm_fabric.dev.platform_data = &msm_bus_mm_fabric_pdata;
7469 msm_bus_sys_fpb.dev.platform_data = &msm_bus_sys_fpb_pdata;
7470 msm_bus_cpss_fpb.dev.platform_data = &msm_bus_cpss_fpb_pdata;
7471#endif
7472}
7473
7474static void __init msm8x60_map_io(void)
7475{
7476 msm_shared_ram_phys = MSM_SHARED_RAM_PHYS;
7477 msm_map_msm8x60_io();
Jeff Ohlstein3a77f9f2011-09-06 14:50:20 -07007478
7479 if (socinfo_init() < 0)
7480 pr_err("socinfo_init() failed!\n");
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007481}
7482
7483/*
7484 * Most segments of the EBI2 bus are disabled by default.
7485 */
7486static void __init msm8x60_init_ebi2(void)
7487{
7488 uint32_t ebi2_cfg;
7489 void *ebi2_cfg_ptr;
Terence Hampsonb36a38c2011-09-19 19:10:40 -04007490 struct clk *mem_clk = clk_get_sys("msm_ebi2", "mem_clk");
7491
7492 if (IS_ERR(mem_clk)) {
7493 pr_err("%s: clk_get_sys(%s,%s), failed", __func__,
7494 "msm_ebi2", "mem_clk");
7495 return;
7496 }
7497 clk_enable(mem_clk);
7498 clk_put(mem_clk);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007499
7500 ebi2_cfg_ptr = ioremap_nocache(0x1a100000, sizeof(uint32_t));
7501 if (ebi2_cfg_ptr != 0) {
7502 ebi2_cfg = readl_relaxed(ebi2_cfg_ptr);
7503
7504 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007505 machine_is_msm8x60_fluid() ||
7506 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007507 ebi2_cfg |= (1 << 4) | (1 << 5); /* CS2, CS3 */
7508 else if (machine_is_msm8x60_sim())
7509 ebi2_cfg |= (1 << 4); /* CS2 */
7510 else if (machine_is_msm8x60_rumi3())
7511 ebi2_cfg |= (1 << 5); /* CS3 */
7512
7513 writel_relaxed(ebi2_cfg, ebi2_cfg_ptr);
7514 iounmap(ebi2_cfg_ptr);
7515 }
7516
7517 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007518 machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon()) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007519 ebi2_cfg_ptr = ioremap_nocache(0x1a110000, SZ_4K);
7520 if (ebi2_cfg_ptr != 0) {
7521 /* EBI2_XMEM_CFG:PWRSAVE_MODE off */
7522 writel_relaxed(0UL, ebi2_cfg_ptr);
7523
7524 /* CS2: Delay 9 cycles (140ns@64MHz) between SMSC
7525 * LAN9221 Ethernet controller reads and writes.
7526 * The lowest 4 bits are the read delay, the next
7527 * 4 are the write delay. */
7528 writel_relaxed(0x031F1C99, ebi2_cfg_ptr + 0x10);
7529#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
7530 /*
7531 * RECOVERY=5, HOLD_WR=1
7532 * INIT_LATENCY_WR=1, INIT_LATENCY_RD=1
7533 * WAIT_WR=1, WAIT_RD=2
7534 */
7535 writel_relaxed(0x51010112, ebi2_cfg_ptr + 0x14);
7536 /*
7537 * HOLD_RD=1
7538 * ADV_OE_RECOVERY=0, ADDR_HOLD_ENA=1
7539 */
7540 writel_relaxed(0x01000020, ebi2_cfg_ptr + 0x34);
7541#else
7542 /* EBI2 CS3 muxed address/data,
7543 * two cyc addr enable */
7544 writel_relaxed(0xA3030020, ebi2_cfg_ptr + 0x34);
7545
7546#endif
7547 iounmap(ebi2_cfg_ptr);
7548 }
7549 }
7550}
7551
7552static void __init msm8x60_configure_smc91x(void)
7553{
7554 if (machine_is_msm8x60_sim()) {
7555
7556 smc91x_resources[0].start = 0x1b800300;
7557 smc91x_resources[0].end = 0x1b8003ff;
7558
7559 smc91x_resources[1].start = (NR_MSM_IRQS + 40);
7560 smc91x_resources[1].end = (NR_MSM_IRQS + 40);
7561
7562 } else if (machine_is_msm8x60_rumi3()) {
7563
7564 smc91x_resources[0].start = 0x1d000300;
7565 smc91x_resources[0].end = 0x1d0003ff;
7566
7567 smc91x_resources[1].start = TLMM_MSM_DIR_CONN_IRQ_0;
7568 smc91x_resources[1].end = TLMM_MSM_DIR_CONN_IRQ_0;
7569 }
7570}
7571
7572static void __init msm8x60_init_tlmm(void)
7573{
7574 if (machine_is_msm8x60_rumi3())
7575 msm_gpio_install_direct_irq(0, 0, 1);
7576}
7577
7578#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
7579 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
7580 || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
7581 || defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
7582 || defined(CONFIG_MMC_MSM_SDC5_SUPPORT))
7583
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007584/* 8x60 has 5 SDCC controllers */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007585#define MAX_SDCC_CONTROLLER 5
7586
7587struct msm_sdcc_gpio {
7588 /* maximum 10 GPIOs per SDCC controller */
7589 s16 no;
7590 /* name of this GPIO */
7591 const char *name;
7592 bool always_on;
7593 bool is_enabled;
7594};
7595
7596#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
7597static struct msm_sdcc_gpio sdc1_gpio_cfg[] = {
7598 {159, "sdc1_dat_0"},
7599 {160, "sdc1_dat_1"},
7600 {161, "sdc1_dat_2"},
7601 {162, "sdc1_dat_3"},
7602#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
7603 {163, "sdc1_dat_4"},
7604 {164, "sdc1_dat_5"},
7605 {165, "sdc1_dat_6"},
7606 {166, "sdc1_dat_7"},
7607#endif
7608 {167, "sdc1_clk"},
7609 {168, "sdc1_cmd"}
7610};
7611#endif
7612
7613#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
7614static struct msm_sdcc_gpio sdc2_gpio_cfg[] = {
7615 {143, "sdc2_dat_0"},
7616 {144, "sdc2_dat_1", 1},
7617 {145, "sdc2_dat_2"},
7618 {146, "sdc2_dat_3"},
7619#ifdef CONFIG_MMC_MSM_SDC2_8_BIT_SUPPORT
7620 {147, "sdc2_dat_4"},
7621 {148, "sdc2_dat_5"},
7622 {149, "sdc2_dat_6"},
7623 {150, "sdc2_dat_7"},
7624#endif
7625 {151, "sdc2_cmd"},
7626 {152, "sdc2_clk", 1}
7627};
7628#endif
7629
7630#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
7631static struct msm_sdcc_gpio sdc5_gpio_cfg[] = {
7632 {95, "sdc5_cmd"},
7633 {96, "sdc5_dat_3"},
7634 {97, "sdc5_clk", 1},
7635 {98, "sdc5_dat_2"},
7636 {99, "sdc5_dat_1", 1},
7637 {100, "sdc5_dat_0"}
7638};
7639#endif
7640
7641struct msm_sdcc_pad_pull_cfg {
7642 enum msm_tlmm_pull_tgt pull;
7643 u32 pull_val;
7644};
7645
7646struct msm_sdcc_pad_drv_cfg {
7647 enum msm_tlmm_hdrive_tgt drv;
7648 u32 drv_val;
7649};
7650
7651#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
7652static struct msm_sdcc_pad_drv_cfg sdc3_pad_on_drv_cfg[] = {
7653 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_8MA},
7654 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_8MA},
7655 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_8MA}
7656};
7657
7658static struct msm_sdcc_pad_pull_cfg sdc3_pad_on_pull_cfg[] = {
7659 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_UP},
7660 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_UP}
7661};
7662
7663static struct msm_sdcc_pad_drv_cfg sdc3_pad_off_drv_cfg[] = {
7664 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_2MA},
7665 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_2MA},
7666 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_2MA}
7667};
7668
7669static struct msm_sdcc_pad_pull_cfg sdc3_pad_off_pull_cfg[] = {
7670 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_DOWN},
7671 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_DOWN}
7672};
7673#endif
7674
7675#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
7676static struct msm_sdcc_pad_drv_cfg sdc4_pad_on_drv_cfg[] = {
7677 {TLMM_HDRV_SDC4_CLK, GPIO_CFG_8MA},
7678 {TLMM_HDRV_SDC4_CMD, GPIO_CFG_8MA},
7679 {TLMM_HDRV_SDC4_DATA, GPIO_CFG_8MA}
7680};
7681
7682static struct msm_sdcc_pad_pull_cfg sdc4_pad_on_pull_cfg[] = {
7683 {TLMM_PULL_SDC4_CMD, GPIO_CFG_PULL_UP},
7684 {TLMM_PULL_SDC4_DATA, GPIO_CFG_PULL_UP}
7685};
7686
7687static struct msm_sdcc_pad_drv_cfg sdc4_pad_off_drv_cfg[] = {
7688 {TLMM_HDRV_SDC4_CLK, GPIO_CFG_2MA},
7689 {TLMM_HDRV_SDC4_CMD, GPIO_CFG_2MA},
7690 {TLMM_HDRV_SDC4_DATA, GPIO_CFG_2MA}
7691};
7692
7693static struct msm_sdcc_pad_pull_cfg sdc4_pad_off_pull_cfg[] = {
7694 {TLMM_PULL_SDC4_CMD, GPIO_CFG_PULL_DOWN},
7695 {TLMM_PULL_SDC4_DATA, GPIO_CFG_PULL_DOWN}
7696};
7697#endif
7698
7699struct msm_sdcc_pin_cfg {
7700 /*
7701 * = 1 if controller pins are using gpios
7702 * = 0 if controller has dedicated MSM pins
7703 */
7704 u8 is_gpio;
7705 u8 cfg_sts;
7706 u8 gpio_data_size;
7707 struct msm_sdcc_gpio *gpio_data;
7708 struct msm_sdcc_pad_drv_cfg *pad_drv_on_data;
7709 struct msm_sdcc_pad_drv_cfg *pad_drv_off_data;
7710 struct msm_sdcc_pad_pull_cfg *pad_pull_on_data;
7711 struct msm_sdcc_pad_pull_cfg *pad_pull_off_data;
7712 u8 pad_drv_data_size;
7713 u8 pad_pull_data_size;
7714 u8 sdio_lpm_gpio_cfg;
7715};
7716
7717
7718static struct msm_sdcc_pin_cfg sdcc_pin_cfg_data[MAX_SDCC_CONTROLLER] = {
7719#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
7720 [0] = {
7721 .is_gpio = 1,
7722 .gpio_data_size = ARRAY_SIZE(sdc1_gpio_cfg),
7723 .gpio_data = sdc1_gpio_cfg
7724 },
7725#endif
7726#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
7727 [1] = {
7728 .is_gpio = 1,
7729 .gpio_data_size = ARRAY_SIZE(sdc2_gpio_cfg),
7730 .gpio_data = sdc2_gpio_cfg
7731 },
7732#endif
7733#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
7734 [2] = {
7735 .is_gpio = 0,
7736 .pad_drv_on_data = sdc3_pad_on_drv_cfg,
7737 .pad_drv_off_data = sdc3_pad_off_drv_cfg,
7738 .pad_pull_on_data = sdc3_pad_on_pull_cfg,
7739 .pad_pull_off_data = sdc3_pad_off_pull_cfg,
7740 .pad_drv_data_size = ARRAY_SIZE(sdc3_pad_on_drv_cfg),
7741 .pad_pull_data_size = ARRAY_SIZE(sdc3_pad_on_pull_cfg)
7742 },
7743#endif
7744#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
7745 [3] = {
7746 .is_gpio = 0,
7747 .pad_drv_on_data = sdc4_pad_on_drv_cfg,
7748 .pad_drv_off_data = sdc4_pad_off_drv_cfg,
7749 .pad_pull_on_data = sdc4_pad_on_pull_cfg,
7750 .pad_pull_off_data = sdc4_pad_off_pull_cfg,
7751 .pad_drv_data_size = ARRAY_SIZE(sdc4_pad_on_drv_cfg),
7752 .pad_pull_data_size = ARRAY_SIZE(sdc4_pad_on_pull_cfg)
7753 },
7754#endif
7755#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
7756 [4] = {
7757 .is_gpio = 1,
7758 .gpio_data_size = ARRAY_SIZE(sdc5_gpio_cfg),
7759 .gpio_data = sdc5_gpio_cfg
7760 }
7761#endif
7762};
7763
7764static int msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
7765{
7766 int rc = 0;
7767 struct msm_sdcc_pin_cfg *curr;
7768 int n;
7769
7770 curr = &sdcc_pin_cfg_data[dev_id - 1];
7771 if (!curr->gpio_data)
7772 goto out;
7773
7774 for (n = 0; n < curr->gpio_data_size; n++) {
7775 if (enable) {
7776
7777 if (curr->gpio_data[n].always_on &&
7778 curr->gpio_data[n].is_enabled)
7779 continue;
7780 pr_debug("%s: enable: %s\n", __func__,
7781 curr->gpio_data[n].name);
7782 rc = gpio_request(curr->gpio_data[n].no,
7783 curr->gpio_data[n].name);
7784 if (rc) {
7785 pr_err("%s: gpio_request(%d, %s)"
7786 "failed", __func__,
7787 curr->gpio_data[n].no,
7788 curr->gpio_data[n].name);
7789 goto free_gpios;
7790 }
7791 /* set direction as output for all GPIOs */
7792 rc = gpio_direction_output(
7793 curr->gpio_data[n].no, 1);
7794 if (rc) {
7795 pr_err("%s: gpio_direction_output"
7796 "(%d, 1) failed\n", __func__,
7797 curr->gpio_data[n].no);
7798 goto free_gpios;
7799 }
7800 curr->gpio_data[n].is_enabled = 1;
7801 } else {
7802 /*
7803 * now free this GPIO which will put GPIO
7804 * in low power mode and will also put GPIO
7805 * in input mode
7806 */
7807 if (curr->gpio_data[n].always_on)
7808 continue;
7809 pr_debug("%s: disable: %s\n", __func__,
7810 curr->gpio_data[n].name);
7811 gpio_free(curr->gpio_data[n].no);
7812 curr->gpio_data[n].is_enabled = 0;
7813 }
7814 }
7815 curr->cfg_sts = enable;
7816 goto out;
7817
7818free_gpios:
7819 for (; n >= 0; n--)
7820 gpio_free(curr->gpio_data[n].no);
7821out:
7822 return rc;
7823}
7824
7825static int msm_sdcc_setup_pad(int dev_id, unsigned int enable)
7826{
7827 int rc = 0;
7828 struct msm_sdcc_pin_cfg *curr;
7829 int n;
7830
7831 curr = &sdcc_pin_cfg_data[dev_id - 1];
7832 if (!curr->pad_drv_on_data || !curr->pad_pull_on_data)
7833 goto out;
7834
7835 if (enable) {
7836 /*
7837 * set up the normal driver strength and
7838 * pull config for pads
7839 */
7840 for (n = 0; n < curr->pad_drv_data_size; n++) {
7841 if (curr->sdio_lpm_gpio_cfg) {
7842 if (curr->pad_drv_on_data[n].drv ==
7843 TLMM_HDRV_SDC4_DATA)
7844 continue;
7845 }
7846 msm_tlmm_set_hdrive(curr->pad_drv_on_data[n].drv,
7847 curr->pad_drv_on_data[n].drv_val);
7848 }
7849 for (n = 0; n < curr->pad_pull_data_size; n++) {
7850 if (curr->sdio_lpm_gpio_cfg) {
7851 if (curr->pad_pull_on_data[n].pull ==
7852 TLMM_PULL_SDC4_DATA)
7853 continue;
7854 }
7855 msm_tlmm_set_pull(curr->pad_pull_on_data[n].pull,
7856 curr->pad_pull_on_data[n].pull_val);
7857 }
7858 } else {
7859 /* set the low power config for pads */
7860 for (n = 0; n < curr->pad_drv_data_size; n++) {
7861 if (curr->sdio_lpm_gpio_cfg) {
7862 if (curr->pad_drv_off_data[n].drv ==
7863 TLMM_HDRV_SDC4_DATA)
7864 continue;
7865 }
7866 msm_tlmm_set_hdrive(
7867 curr->pad_drv_off_data[n].drv,
7868 curr->pad_drv_off_data[n].drv_val);
7869 }
7870 for (n = 0; n < curr->pad_pull_data_size; n++) {
7871 if (curr->sdio_lpm_gpio_cfg) {
7872 if (curr->pad_pull_off_data[n].pull ==
7873 TLMM_PULL_SDC4_DATA)
7874 continue;
7875 }
7876 msm_tlmm_set_pull(
7877 curr->pad_pull_off_data[n].pull,
7878 curr->pad_pull_off_data[n].pull_val);
7879 }
7880 }
7881 curr->cfg_sts = enable;
7882out:
7883 return rc;
7884}
7885
7886struct sdcc_reg {
7887 /* VDD/VCC/VCCQ regulator name on PMIC8058/PMIC8089*/
7888 const char *reg_name;
7889 /*
7890 * is set voltage supported for this regulator?
7891 * 0 = not supported, 1 = supported
7892 */
7893 unsigned char set_voltage_sup;
7894 /* voltage level to be set */
7895 unsigned int level;
7896 /* VDD/VCC/VCCQ voltage regulator handle */
7897 struct regulator *reg;
7898 /* is this regulator enabled? */
7899 bool enabled;
7900 /* is this regulator needs to be always on? */
7901 bool always_on;
7902 /* is operating power mode setting required for this regulator? */
7903 bool op_pwr_mode_sup;
7904 /* Load values for low power and high power mode */
7905 unsigned int lpm_uA;
7906 unsigned int hpm_uA;
7907};
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007908/* all SDCC controllers require VDD/VCC voltage */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007909static struct sdcc_reg sdcc_vdd_reg_data[MAX_SDCC_CONTROLLER];
7910/* only SDCC1 requires VCCQ voltage */
7911static struct sdcc_reg sdcc_vccq_reg_data[1];
7912/* all SDCC controllers may require voting for VDD PAD voltage */
7913static struct sdcc_reg sdcc_vddp_reg_data[MAX_SDCC_CONTROLLER];
7914
7915struct sdcc_reg_data {
7916 struct sdcc_reg *vdd_data; /* keeps VDD/VCC regulator info */
7917 struct sdcc_reg *vccq_data; /* keeps VCCQ regulator info */
7918 struct sdcc_reg *vddp_data; /* keeps VDD Pad regulator info */
7919 unsigned char sts; /* regulator enable/disable status */
7920};
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007921/* msm8x60 has 5 SDCC controllers */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007922static struct sdcc_reg_data sdcc_vreg_data[MAX_SDCC_CONTROLLER];
7923
7924static int msm_sdcc_vreg_init_reg(struct sdcc_reg *vreg)
7925{
7926 int rc = 0;
7927
7928 /* Get the regulator handle */
7929 vreg->reg = regulator_get(NULL, vreg->reg_name);
7930 if (IS_ERR(vreg->reg)) {
7931 rc = PTR_ERR(vreg->reg);
7932 pr_err("%s: regulator_get(%s) failed. rc=%d\n",
7933 __func__, vreg->reg_name, rc);
7934 goto out;
7935 }
7936
7937 /* Set the voltage level if required */
7938 if (vreg->set_voltage_sup) {
7939 rc = regulator_set_voltage(vreg->reg, vreg->level,
7940 vreg->level);
7941 if (rc) {
7942 pr_err("%s: regulator_set_voltage(%s) failed rc=%d\n",
7943 __func__, vreg->reg_name, rc);
7944 goto vreg_put;
7945 }
7946 }
7947 goto out;
7948
7949vreg_put:
7950 regulator_put(vreg->reg);
7951out:
7952 return rc;
7953}
7954
7955static inline void msm_sdcc_vreg_deinit_reg(struct sdcc_reg *vreg)
7956{
7957 regulator_put(vreg->reg);
7958}
7959
7960/* this init function should be called only once for each SDCC */
7961static int msm_sdcc_vreg_init(int dev_id, unsigned char init)
7962{
7963 int rc = 0;
7964 struct sdcc_reg *curr_vdd_reg, *curr_vccq_reg, *curr_vddp_reg;
7965 struct sdcc_reg_data *curr;
7966
7967 curr = &sdcc_vreg_data[dev_id - 1];
7968 curr_vdd_reg = curr->vdd_data;
7969 curr_vccq_reg = curr->vccq_data;
7970 curr_vddp_reg = curr->vddp_data;
7971
7972 if (init) {
7973 /*
7974 * get the regulator handle from voltage regulator framework
7975 * and then try to set the voltage level for the regulator
7976 */
7977 if (curr_vdd_reg) {
7978 rc = msm_sdcc_vreg_init_reg(curr_vdd_reg);
7979 if (rc)
7980 goto out;
7981 }
7982 if (curr_vccq_reg) {
7983 rc = msm_sdcc_vreg_init_reg(curr_vccq_reg);
7984 if (rc)
7985 goto vdd_reg_deinit;
7986 }
7987 if (curr_vddp_reg) {
7988 rc = msm_sdcc_vreg_init_reg(curr_vddp_reg);
7989 if (rc)
7990 goto vccq_reg_deinit;
7991 }
7992 goto out;
7993 } else
7994 /* deregister with all regulators from regulator framework */
7995 goto vddp_reg_deinit;
7996
7997vddp_reg_deinit:
7998 if (curr_vddp_reg)
7999 msm_sdcc_vreg_deinit_reg(curr_vddp_reg);
8000vccq_reg_deinit:
8001 if (curr_vccq_reg)
8002 msm_sdcc_vreg_deinit_reg(curr_vccq_reg);
8003vdd_reg_deinit:
8004 if (curr_vdd_reg)
8005 msm_sdcc_vreg_deinit_reg(curr_vdd_reg);
8006out:
8007 return rc;
8008}
8009
8010static int msm_sdcc_vreg_enable(struct sdcc_reg *vreg)
8011{
8012 int rc;
8013
8014 if (!vreg->enabled) {
8015 rc = regulator_enable(vreg->reg);
8016 if (rc) {
8017 pr_err("%s: regulator_enable(%s) failed. rc=%d\n",
8018 __func__, vreg->reg_name, rc);
8019 goto out;
8020 }
8021 vreg->enabled = 1;
8022 }
8023
8024 /* Put always_on regulator in HPM (high power mode) */
8025 if (vreg->always_on && vreg->op_pwr_mode_sup) {
8026 rc = regulator_set_optimum_mode(vreg->reg, vreg->hpm_uA);
8027 if (rc < 0) {
8028 pr_err("%s: reg=%s: HPM setting failed"
8029 " hpm_uA=%d, rc=%d\n",
8030 __func__, vreg->reg_name,
8031 vreg->hpm_uA, rc);
8032 goto vreg_disable;
8033 }
8034 rc = 0;
8035 }
8036 goto out;
8037
8038vreg_disable:
8039 regulator_disable(vreg->reg);
8040 vreg->enabled = 0;
8041out:
8042 return rc;
8043}
8044
8045static int msm_sdcc_vreg_disable(struct sdcc_reg *vreg)
8046{
8047 int rc;
8048
8049 /* Never disable always_on regulator */
8050 if (!vreg->always_on) {
8051 rc = regulator_disable(vreg->reg);
8052 if (rc) {
8053 pr_err("%s: regulator_disable(%s) failed. rc=%d\n",
8054 __func__, vreg->reg_name, rc);
8055 goto out;
8056 }
8057 vreg->enabled = 0;
8058 }
8059
8060 /* Put always_on regulator in LPM (low power mode) */
8061 if (vreg->always_on && vreg->op_pwr_mode_sup) {
8062 rc = regulator_set_optimum_mode(vreg->reg, vreg->lpm_uA);
8063 if (rc < 0) {
8064 pr_err("%s: reg=%s: LPM setting failed"
8065 " lpm_uA=%d, rc=%d\n",
8066 __func__,
8067 vreg->reg_name,
8068 vreg->lpm_uA, rc);
8069 goto out;
8070 }
8071 rc = 0;
8072 }
8073
8074out:
8075 return rc;
8076}
8077
8078static int msm_sdcc_setup_vreg(int dev_id, unsigned char enable)
8079{
8080 int rc = 0;
8081 struct sdcc_reg *curr_vdd_reg, *curr_vccq_reg, *curr_vddp_reg;
8082 struct sdcc_reg_data *curr;
8083
8084 curr = &sdcc_vreg_data[dev_id - 1];
8085 curr_vdd_reg = curr->vdd_data;
8086 curr_vccq_reg = curr->vccq_data;
8087 curr_vddp_reg = curr->vddp_data;
8088
8089 /* check if regulators are initialized or not? */
8090 if ((curr_vdd_reg && !curr_vdd_reg->reg) ||
8091 (curr_vccq_reg && !curr_vccq_reg->reg) ||
8092 (curr_vddp_reg && !curr_vddp_reg->reg)) {
8093 /* initialize voltage regulators required for this SDCC */
8094 rc = msm_sdcc_vreg_init(dev_id, 1);
8095 if (rc) {
8096 pr_err("%s: regulator init failed = %d\n",
8097 __func__, rc);
8098 goto out;
8099 }
8100 }
8101
8102 if (curr->sts == enable)
8103 goto out;
8104
8105 if (curr_vdd_reg) {
8106 if (enable)
8107 rc = msm_sdcc_vreg_enable(curr_vdd_reg);
8108 else
8109 rc = msm_sdcc_vreg_disable(curr_vdd_reg);
8110 if (rc)
8111 goto out;
8112 }
8113
8114 if (curr_vccq_reg) {
8115 if (enable)
8116 rc = msm_sdcc_vreg_enable(curr_vccq_reg);
8117 else
8118 rc = msm_sdcc_vreg_disable(curr_vccq_reg);
8119 if (rc)
8120 goto out;
8121 }
8122
8123 if (curr_vddp_reg) {
8124 if (enable)
8125 rc = msm_sdcc_vreg_enable(curr_vddp_reg);
8126 else
8127 rc = msm_sdcc_vreg_disable(curr_vddp_reg);
8128 if (rc)
8129 goto out;
8130 }
8131 curr->sts = enable;
8132
8133out:
8134 return rc;
8135}
8136
8137static u32 msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
8138{
8139 u32 rc_pin_cfg = 0;
8140 u32 rc_vreg_cfg = 0;
8141 u32 rc = 0;
8142 struct platform_device *pdev;
8143 struct msm_sdcc_pin_cfg *curr_pin_cfg;
8144
8145 pdev = container_of(dv, struct platform_device, dev);
8146
8147 /* setup gpio/pad */
8148 curr_pin_cfg = &sdcc_pin_cfg_data[pdev->id - 1];
8149 if (curr_pin_cfg->cfg_sts == !!vdd)
8150 goto setup_vreg;
8151
8152 if (curr_pin_cfg->is_gpio)
8153 rc_pin_cfg = msm_sdcc_setup_gpio(pdev->id, !!vdd);
8154 else
8155 rc_pin_cfg = msm_sdcc_setup_pad(pdev->id, !!vdd);
8156
8157setup_vreg:
8158 /* setup voltage regulators */
8159 rc_vreg_cfg = msm_sdcc_setup_vreg(pdev->id, !!vdd);
8160
8161 if (rc_pin_cfg || rc_vreg_cfg)
8162 rc = rc_pin_cfg ? rc_pin_cfg : rc_vreg_cfg;
8163
8164 return rc;
8165}
8166
8167static void msm_sdcc_sdio_lpm_gpio(struct device *dv, unsigned int active)
8168{
8169 struct msm_sdcc_pin_cfg *curr_pin_cfg;
8170 struct platform_device *pdev;
8171
8172 pdev = container_of(dv, struct platform_device, dev);
8173 /* setup gpio/pad */
8174 curr_pin_cfg = &sdcc_pin_cfg_data[pdev->id - 1];
8175
8176 if (curr_pin_cfg->cfg_sts == active)
8177 return;
8178
8179 curr_pin_cfg->sdio_lpm_gpio_cfg = 1;
8180 if (curr_pin_cfg->is_gpio)
8181 msm_sdcc_setup_gpio(pdev->id, active);
8182 else
8183 msm_sdcc_setup_pad(pdev->id, active);
8184 curr_pin_cfg->sdio_lpm_gpio_cfg = 0;
8185}
8186
8187static int msm_sdc3_get_wpswitch(struct device *dev)
8188{
8189 struct platform_device *pdev;
8190 int status;
8191 pdev = container_of(dev, struct platform_device, dev);
8192
8193 status = gpio_request(GPIO_SDC_WP, "SD_WP_Switch");
8194 if (status) {
8195 pr_err("%s:Failed to request GPIO %d\n",
8196 __func__, GPIO_SDC_WP);
8197 } else {
8198 status = gpio_direction_input(GPIO_SDC_WP);
8199 if (!status) {
8200 status = gpio_get_value_cansleep(GPIO_SDC_WP);
8201 pr_info("%s: WP Status for Slot %d = %d\n",
8202 __func__, pdev->id, status);
8203 }
8204 gpio_free(GPIO_SDC_WP);
8205 }
8206 return status;
8207}
8208
8209#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8210int sdc5_register_status_notify(void (*callback)(int, void *),
8211 void *dev_id)
8212{
8213 sdc5_status_notify_cb = callback;
8214 sdc5_status_notify_cb_devid = dev_id;
8215 return 0;
8216}
8217#endif
8218
8219#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8220int sdc2_register_status_notify(void (*callback)(int, void *),
8221 void *dev_id)
8222{
8223 sdc2_status_notify_cb = callback;
8224 sdc2_status_notify_cb_devid = dev_id;
8225 return 0;
8226}
8227#endif
8228
8229/* Interrupt handler for SDC2 and SDC5 detection
8230 * This function uses dual-edge interrputs settings in order
8231 * to get SDIO detection when the GPIO is rising and SDIO removal
8232 * when the GPIO is falling */
8233static irqreturn_t msm8x60_multi_sdio_slot_status_irq(int irq, void *dev_id)
8234{
8235 int status;
8236
8237 if (!machine_is_msm8x60_fusion() &&
8238 !machine_is_msm8x60_fusn_ffa())
8239 return IRQ_NONE;
8240
8241 status = gpio_get_value(MDM2AP_SYNC);
8242 pr_info("%s: MDM2AP_SYNC Status = %d\n",
8243 __func__, status);
8244
8245#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8246 if (sdc2_status_notify_cb) {
8247 pr_info("%s: calling sdc2_status_notify_cb\n", __func__);
8248 sdc2_status_notify_cb(status,
8249 sdc2_status_notify_cb_devid);
8250 }
8251#endif
8252
8253#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8254 if (sdc5_status_notify_cb) {
8255 pr_info("%s: calling sdc5_status_notify_cb\n", __func__);
8256 sdc5_status_notify_cb(status,
8257 sdc5_status_notify_cb_devid);
8258 }
8259#endif
8260 return IRQ_HANDLED;
8261}
8262
8263static int msm8x60_multi_sdio_init(void)
8264{
8265 int ret, irq_num;
8266
8267 if (!machine_is_msm8x60_fusion() &&
8268 !machine_is_msm8x60_fusn_ffa())
8269 return 0;
8270
8271 ret = msm_gpiomux_get(MDM2AP_SYNC);
8272 if (ret) {
8273 pr_err("%s:Failed to request GPIO %d, ret=%d\n",
8274 __func__, MDM2AP_SYNC, ret);
8275 return ret;
8276 }
8277
8278 irq_num = gpio_to_irq(MDM2AP_SYNC);
8279
8280 ret = request_irq(irq_num,
8281 msm8x60_multi_sdio_slot_status_irq,
8282 IRQ_TYPE_EDGE_BOTH,
8283 "sdio_multidetection", NULL);
8284
8285 if (ret) {
8286 pr_err("%s:Failed to request irq, ret=%d\n",
8287 __func__, ret);
8288 return ret;
8289 }
8290
8291 return ret;
8292}
8293
8294#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8295#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
8296static unsigned int msm8x60_sdcc_slot_status(struct device *dev)
8297{
8298 int status;
8299
8300 status = gpio_request(PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1)
8301 , "SD_HW_Detect");
8302 if (status) {
8303 pr_err("%s:Failed to request GPIO %d\n", __func__,
8304 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8305 } else {
8306 status = gpio_direction_input(
8307 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8308 if (!status)
8309 status = !(gpio_get_value_cansleep(
8310 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1)));
8311 gpio_free(PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8312 }
8313 return (unsigned int) status;
8314}
8315#endif
8316#endif
Subhash Jadavanic9b85752012-04-13 11:16:49 +05308317#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008318
Subhash Jadavanic9b85752012-04-13 11:16:49 +05308319#define MSM_MPM_PIN_SDC3_DAT1 21
Subhash Jadavanife608a22012-04-13 10:45:53 +05308320#define MSM_MPM_PIN_SDC4_DAT1 23
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008321
8322#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
8323static struct mmc_platform_data msm8x60_sdc1_data = {
8324 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8325 .translate_vdd = msm_sdcc_setup_power,
8326#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
8327 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
8328#else
8329 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8330#endif
8331 .msmsdcc_fmin = 400000,
8332 .msmsdcc_fmid = 24000000,
8333 .msmsdcc_fmax = 48000000,
8334 .nonremovable = 1,
8335 .pclk_src_dfab = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008336};
8337#endif
8338
8339#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8340static struct mmc_platform_data msm8x60_sdc2_data = {
8341 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_165_195,
8342 .translate_vdd = msm_sdcc_setup_power,
8343 .sdio_lpm_gpio_setup = msm_sdcc_sdio_lpm_gpio,
8344 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
8345 .msmsdcc_fmin = 400000,
8346 .msmsdcc_fmid = 24000000,
8347 .msmsdcc_fmax = 48000000,
8348 .nonremovable = 0,
8349 .pclk_src_dfab = 1,
8350 .register_status_notify = sdc2_register_status_notify,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008351#ifdef CONFIG_MSM_SDIO_AL
8352 .is_sdio_al_client = 1,
8353#endif
8354};
8355#endif
8356
8357#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8358static struct mmc_platform_data msm8x60_sdc3_data = {
8359 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8360 .translate_vdd = msm_sdcc_setup_power,
8361 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8362 .wpswitch = msm_sdc3_get_wpswitch,
8363#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
8364 .status = msm8x60_sdcc_slot_status,
8365 .status_irq = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
8366 PMIC_GPIO_SDC3_DET - 1),
8367 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
8368#endif
8369 .msmsdcc_fmin = 400000,
8370 .msmsdcc_fmid = 24000000,
8371 .msmsdcc_fmax = 48000000,
8372 .nonremovable = 0,
8373 .pclk_src_dfab = 1,
Subhash Jadavani55e188e2012-04-13 11:31:08 +05308374 .mpm_sdiowakeup_int = MSM_MPM_PIN_SDC3_DAT1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008375};
8376#endif
8377
8378#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8379static struct mmc_platform_data msm8x60_sdc4_data = {
8380 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8381 .translate_vdd = msm_sdcc_setup_power,
8382 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8383 .msmsdcc_fmin = 400000,
8384 .msmsdcc_fmid = 24000000,
8385 .msmsdcc_fmax = 48000000,
8386 .nonremovable = 0,
8387 .pclk_src_dfab = 1,
Subhash Jadavanic9b85752012-04-13 11:16:49 +05308388 .mpm_sdiowakeup_int = MSM_MPM_PIN_SDC4_DAT1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008389};
8390#endif
8391
8392#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8393static struct mmc_platform_data msm8x60_sdc5_data = {
8394 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_165_195,
8395 .translate_vdd = msm_sdcc_setup_power,
8396 .sdio_lpm_gpio_setup = msm_sdcc_sdio_lpm_gpio,
8397 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8398 .msmsdcc_fmin = 400000,
8399 .msmsdcc_fmid = 24000000,
8400 .msmsdcc_fmax = 48000000,
8401 .nonremovable = 0,
8402 .pclk_src_dfab = 1,
8403 .register_status_notify = sdc5_register_status_notify,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008404#ifdef CONFIG_MSM_SDIO_AL
8405 .is_sdio_al_client = 1,
8406#endif
8407};
8408#endif
8409
8410static void __init msm8x60_init_mmc(void)
8411{
8412#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
8413 /* SDCC1 : eMMC card connected */
8414 sdcc_vreg_data[0].vdd_data = &sdcc_vdd_reg_data[0];
8415 sdcc_vreg_data[0].vdd_data->reg_name = "8901_l5";
8416 sdcc_vreg_data[0].vdd_data->set_voltage_sup = 1;
8417 sdcc_vreg_data[0].vdd_data->level = 2850000;
Subhash Jadavania8482a32011-08-08 11:01:44 +05308418 sdcc_vreg_data[0].vdd_data->always_on = 1;
8419 sdcc_vreg_data[0].vdd_data->op_pwr_mode_sup = 1;
8420 sdcc_vreg_data[0].vdd_data->lpm_uA = 9000;
8421 sdcc_vreg_data[0].vdd_data->hpm_uA = 200000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008422
8423 sdcc_vreg_data[0].vccq_data = &sdcc_vccq_reg_data[0];
8424 sdcc_vreg_data[0].vccq_data->reg_name = "8901_lvs0";
8425 sdcc_vreg_data[0].vccq_data->set_voltage_sup = 0;
8426 sdcc_vreg_data[0].vccq_data->always_on = 1;
8427
8428 msm_add_sdcc(1, &msm8x60_sdc1_data);
8429#endif
8430#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8431 /*
8432 * MDM SDIO client is connected to SDC2 on charm SURF/FFA
8433 * and no card is connected on 8660 SURF/FFA/FLUID.
8434 */
8435 sdcc_vreg_data[1].vdd_data = &sdcc_vdd_reg_data[1];
8436 sdcc_vreg_data[1].vdd_data->reg_name = "8058_s3";
8437 sdcc_vreg_data[1].vdd_data->set_voltage_sup = 1;
8438 sdcc_vreg_data[1].vdd_data->level = 1800000;
8439
8440 sdcc_vreg_data[1].vccq_data = NULL;
8441
8442 if (machine_is_msm8x60_fusion())
8443 msm8x60_sdc2_data.msmsdcc_fmax = 24000000;
8444 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008445 msm8x60_sdc2_data.sdiowakeup_irq = gpio_to_irq(144);
8446 msm_sdcc_setup_gpio(2, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008447 msm_add_sdcc(2, &msm8x60_sdc2_data);
8448 }
8449#endif
8450#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8451 /* SDCC3 : External card slot connected */
8452 sdcc_vreg_data[2].vdd_data = &sdcc_vdd_reg_data[2];
8453 sdcc_vreg_data[2].vdd_data->reg_name = "8058_l14";
8454 sdcc_vreg_data[2].vdd_data->set_voltage_sup = 1;
8455 sdcc_vreg_data[2].vdd_data->level = 2850000;
8456 sdcc_vreg_data[2].vdd_data->always_on = 1;
8457 sdcc_vreg_data[2].vdd_data->op_pwr_mode_sup = 1;
8458 sdcc_vreg_data[2].vdd_data->lpm_uA = 9000;
8459 sdcc_vreg_data[2].vdd_data->hpm_uA = 200000;
8460
8461 sdcc_vreg_data[2].vccq_data = NULL;
8462
8463 sdcc_vreg_data[2].vddp_data = &sdcc_vddp_reg_data[2];
8464 sdcc_vreg_data[2].vddp_data->reg_name = "8058_l5";
8465 sdcc_vreg_data[2].vddp_data->set_voltage_sup = 1;
8466 sdcc_vreg_data[2].vddp_data->level = 2850000;
8467 sdcc_vreg_data[2].vddp_data->always_on = 1;
8468 sdcc_vreg_data[2].vddp_data->op_pwr_mode_sup = 1;
8469 /* Sleep current required is ~300 uA. But min. RPM
8470 * vote can be in terms of mA (min. 1 mA).
8471 * So let's vote for 2 mA during sleep.
8472 */
8473 sdcc_vreg_data[2].vddp_data->lpm_uA = 2000;
8474 /* Max. Active current required is 16 mA */
8475 sdcc_vreg_data[2].vddp_data->hpm_uA = 16000;
8476
8477 if (machine_is_msm8x60_fluid())
8478 msm8x60_sdc3_data.wpswitch = NULL;
8479 msm_add_sdcc(3, &msm8x60_sdc3_data);
8480#endif
8481#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8482 /* SDCC4 : WLAN WCN1314 chip is connected */
8483 sdcc_vreg_data[3].vdd_data = &sdcc_vdd_reg_data[3];
8484 sdcc_vreg_data[3].vdd_data->reg_name = "8058_s3";
8485 sdcc_vreg_data[3].vdd_data->set_voltage_sup = 1;
8486 sdcc_vreg_data[3].vdd_data->level = 1800000;
8487
8488 sdcc_vreg_data[3].vccq_data = NULL;
8489
8490 msm_add_sdcc(4, &msm8x60_sdc4_data);
8491#endif
8492#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8493 /*
8494 * MDM SDIO client is connected to SDC5 on charm SURF/FFA
8495 * and no card is connected on 8660 SURF/FFA/FLUID.
8496 */
8497 sdcc_vreg_data[4].vdd_data = &sdcc_vdd_reg_data[4];
8498 sdcc_vreg_data[4].vdd_data->reg_name = "8058_s3";
8499 sdcc_vreg_data[4].vdd_data->set_voltage_sup = 1;
8500 sdcc_vreg_data[4].vdd_data->level = 1800000;
8501
8502 sdcc_vreg_data[4].vccq_data = NULL;
8503
8504 if (machine_is_msm8x60_fusion())
8505 msm8x60_sdc5_data.msmsdcc_fmax = 24000000;
8506 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008507 msm8x60_sdc5_data.sdiowakeup_irq = gpio_to_irq(99);
8508 msm_sdcc_setup_gpio(5, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008509 msm_add_sdcc(5, &msm8x60_sdc5_data);
8510 }
8511#endif
8512}
8513
8514#if !defined(CONFIG_GPIO_SX150X) && !defined(CONFIG_GPIO_SX150X_MODULE)
8515static inline void display_common_power(int on) {}
8516#else
8517
8518#define _GET_REGULATOR(var, name) do { \
8519 if (var == NULL) { \
8520 var = regulator_get(NULL, name); \
8521 if (IS_ERR(var)) { \
8522 pr_err("'%s' regulator not found, rc=%ld\n", \
8523 name, PTR_ERR(var)); \
8524 var = NULL; \
8525 } \
8526 } \
8527} while (0)
8528
8529static int dsub_regulator(int on)
8530{
8531 static struct regulator *dsub_reg;
8532 static struct regulator *mpp0_reg;
8533 static int dsub_reg_enabled;
8534 int rc = 0;
8535
8536 _GET_REGULATOR(dsub_reg, "8901_l3");
8537 if (IS_ERR(dsub_reg)) {
8538 printk(KERN_ERR "%s: failed to get reg 8901_l3 err=%ld",
8539 __func__, PTR_ERR(dsub_reg));
8540 return PTR_ERR(dsub_reg);
8541 }
8542
8543 _GET_REGULATOR(mpp0_reg, "8901_mpp0");
8544 if (IS_ERR(mpp0_reg)) {
8545 printk(KERN_ERR "%s: failed to get reg 8901_mpp0 err=%ld",
8546 __func__, PTR_ERR(mpp0_reg));
8547 return PTR_ERR(mpp0_reg);
8548 }
8549
8550 if (on && !dsub_reg_enabled) {
8551 rc = regulator_set_voltage(dsub_reg, 3300000, 3300000);
8552 if (rc) {
8553 printk(KERN_ERR "%s: failed to set reg 8901_l3 voltage"
8554 " err=%d", __func__, rc);
8555 goto dsub_regulator_err;
8556 }
8557 rc = regulator_enable(dsub_reg);
8558 if (rc) {
8559 printk(KERN_ERR "%s: failed to enable reg 8901_l3"
8560 " err=%d", __func__, rc);
8561 goto dsub_regulator_err;
8562 }
8563 rc = regulator_enable(mpp0_reg);
8564 if (rc) {
8565 printk(KERN_ERR "%s: failed to enable reg 8901_mpp0"
8566 " err=%d", __func__, rc);
8567 goto dsub_regulator_err;
8568 }
8569 dsub_reg_enabled = 1;
8570 } else if (!on && dsub_reg_enabled) {
8571 rc = regulator_disable(dsub_reg);
8572 if (rc)
8573 printk(KERN_WARNING "%s: failed to disable reg 8901_l3"
8574 " err=%d", __func__, rc);
8575 rc = regulator_disable(mpp0_reg);
8576 if (rc)
8577 printk(KERN_WARNING "%s: failed to disable reg "
8578 "8901_mpp0 err=%d", __func__, rc);
8579 dsub_reg_enabled = 0;
8580 }
8581
8582 return rc;
8583
8584dsub_regulator_err:
8585 regulator_put(mpp0_reg);
8586 regulator_put(dsub_reg);
8587 return rc;
8588}
8589
8590static int display_power_on;
8591static void setup_display_power(void)
8592{
8593 if (display_power_on)
8594 if (lcdc_vga_enabled) {
8595 dsub_regulator(1);
8596 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 0);
8597 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 0);
8598 if (machine_is_msm8x60_ffa() ||
8599 machine_is_msm8x60_fusn_ffa())
8600 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 1);
8601 } else {
8602 dsub_regulator(0);
8603 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 1);
8604 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 1);
8605 if (machine_is_msm8x60_ffa() ||
8606 machine_is_msm8x60_fusn_ffa())
8607 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 0);
8608 }
8609 else {
8610 dsub_regulator(0);
8611 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa())
8612 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 0);
8613 /* BACKLIGHT */
8614 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 0);
8615 /* LVDS */
8616 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 0);
8617 }
8618}
8619
8620#define _GET_REGULATOR(var, name) do { \
8621 if (var == NULL) { \
8622 var = regulator_get(NULL, name); \
8623 if (IS_ERR(var)) { \
8624 pr_err("'%s' regulator not found, rc=%ld\n", \
8625 name, PTR_ERR(var)); \
8626 var = NULL; \
8627 } \
8628 } \
8629} while (0)
8630
8631#define GPIO_RESX_N (GPIO_EXPANDER_GPIO_BASE + 2)
8632
8633static void display_common_power(int on)
8634{
8635 int rc;
8636 static struct regulator *display_reg;
8637
8638 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
8639 machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8640 if (on) {
8641 /* LVDS */
8642 _GET_REGULATOR(display_reg, "8901_l2");
8643 if (!display_reg)
8644 return;
8645 rc = regulator_set_voltage(display_reg,
8646 3300000, 3300000);
8647 if (rc)
8648 goto out;
8649 rc = regulator_enable(display_reg);
8650 if (rc)
8651 goto out;
8652 rc = gpio_request(GPIO_LVDS_SHUTDOWN_N,
8653 "LVDS_STDN_OUT_N");
8654 if (rc) {
8655 printk(KERN_ERR "%s: LVDS gpio %d request"
8656 "failed\n", __func__,
8657 GPIO_LVDS_SHUTDOWN_N);
8658 goto out2;
8659 }
8660
8661 /* BACKLIGHT */
8662 rc = gpio_request(GPIO_BACKLIGHT_EN, "BACKLIGHT_EN");
8663 if (rc) {
8664 printk(KERN_ERR "%s: BACKLIGHT gpio %d request"
8665 "failed\n", __func__,
8666 GPIO_BACKLIGHT_EN);
8667 goto out3;
8668 }
8669
8670 if (machine_is_msm8x60_ffa() ||
8671 machine_is_msm8x60_fusn_ffa()) {
8672 rc = gpio_request(GPIO_DONGLE_PWR_EN,
8673 "DONGLE_PWR_EN");
8674 if (rc) {
8675 printk(KERN_ERR "%s: DONGLE_PWR_EN gpio"
8676 " %d request failed\n", __func__,
8677 GPIO_DONGLE_PWR_EN);
8678 goto out4;
8679 }
8680 }
8681
8682 gpio_direction_output(GPIO_LVDS_SHUTDOWN_N, 0);
8683 gpio_direction_output(GPIO_BACKLIGHT_EN, 0);
8684 if (machine_is_msm8x60_ffa() ||
8685 machine_is_msm8x60_fusn_ffa())
8686 gpio_direction_output(GPIO_DONGLE_PWR_EN, 0);
8687 mdelay(20);
8688 display_power_on = 1;
8689 setup_display_power();
8690 } else {
8691 if (display_power_on) {
8692 display_power_on = 0;
8693 setup_display_power();
8694 mdelay(20);
8695 if (machine_is_msm8x60_ffa() ||
8696 machine_is_msm8x60_fusn_ffa())
8697 gpio_free(GPIO_DONGLE_PWR_EN);
8698 goto out4;
8699 }
8700 }
8701 }
8702#if defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
8703 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA)
8704 else if (machine_is_msm8x60_fluid()) {
8705 static struct regulator *fluid_reg;
8706 static struct regulator *fluid_reg2;
8707
8708 if (on) {
8709 _GET_REGULATOR(fluid_reg, "8901_l2");
8710 if (!fluid_reg)
8711 return;
8712 _GET_REGULATOR(fluid_reg2, "8058_s3");
8713 if (!fluid_reg2) {
8714 regulator_put(fluid_reg);
8715 return;
8716 }
8717 rc = gpio_request(GPIO_RESX_N, "RESX_N");
8718 if (rc) {
8719 regulator_put(fluid_reg2);
8720 regulator_put(fluid_reg);
8721 return;
8722 }
8723 regulator_set_voltage(fluid_reg, 2850000, 2850000);
8724 regulator_set_voltage(fluid_reg2, 1800000, 1800000);
8725 regulator_enable(fluid_reg);
8726 regulator_enable(fluid_reg2);
8727 msleep(20);
8728 gpio_direction_output(GPIO_RESX_N, 0);
8729 udelay(10);
8730 gpio_set_value_cansleep(GPIO_RESX_N, 1);
8731 display_power_on = 1;
8732 setup_display_power();
8733 } else {
8734 gpio_set_value_cansleep(GPIO_RESX_N, 0);
8735 gpio_free(GPIO_RESX_N);
8736 msleep(20);
8737 regulator_disable(fluid_reg2);
8738 regulator_disable(fluid_reg);
8739 regulator_put(fluid_reg2);
8740 regulator_put(fluid_reg);
8741 display_power_on = 0;
8742 setup_display_power();
8743 fluid_reg = NULL;
8744 fluid_reg2 = NULL;
8745 }
8746 }
8747#endif
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04008748#if defined(CONFIG_FB_MSM_LCDC_NT35582_WVGA)
8749 else if (machine_is_msm8x60_dragon()) {
8750 static struct regulator *dragon_reg;
8751 static struct regulator *dragon_reg2;
8752
8753 if (on) {
8754 _GET_REGULATOR(dragon_reg, "8901_l2");
8755 if (!dragon_reg)
8756 return;
8757 _GET_REGULATOR(dragon_reg2, "8058_l16");
8758 if (!dragon_reg2) {
8759 regulator_put(dragon_reg);
8760 dragon_reg = NULL;
8761 return;
8762 }
8763
8764 rc = gpio_request(GPIO_NT35582_BL_EN, "lcdc_bl_en");
8765 if (rc) {
8766 pr_err("%s: gpio %d request failed with rc=%d\n",
8767 __func__, GPIO_NT35582_BL_EN, rc);
8768 regulator_put(dragon_reg);
8769 regulator_put(dragon_reg2);
8770 dragon_reg = NULL;
8771 dragon_reg2 = NULL;
8772 return;
8773 }
8774
8775 if (gpio_tlmm_config(GPIO_CFG(GPIO_NT35582_RESET, 0,
8776 GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN,
8777 GPIO_CFG_16MA), GPIO_CFG_ENABLE)) {
8778 pr_err("%s: config gpio '%d' failed!\n",
8779 __func__, GPIO_NT35582_RESET);
8780 gpio_free(GPIO_NT35582_BL_EN);
8781 regulator_put(dragon_reg);
8782 regulator_put(dragon_reg2);
8783 dragon_reg = NULL;
8784 dragon_reg2 = NULL;
8785 return;
8786 }
8787
8788 rc = gpio_request(GPIO_NT35582_RESET, "lcdc_reset");
8789 if (rc) {
8790 pr_err("%s: unable to request gpio %d (rc=%d)\n",
8791 __func__, GPIO_NT35582_RESET, rc);
8792 gpio_free(GPIO_NT35582_BL_EN);
8793 regulator_put(dragon_reg);
8794 regulator_put(dragon_reg2);
8795 dragon_reg = NULL;
8796 dragon_reg2 = NULL;
8797 return;
8798 }
8799
8800 regulator_set_voltage(dragon_reg, 3300000, 3300000);
8801 regulator_set_voltage(dragon_reg2, 1800000, 1800000);
8802 regulator_enable(dragon_reg);
8803 regulator_enable(dragon_reg2);
8804 msleep(20);
8805
8806 gpio_set_value_cansleep(GPIO_NT35582_RESET, 1);
8807 msleep(20);
8808 gpio_set_value_cansleep(GPIO_NT35582_RESET, 0);
8809 msleep(20);
8810 gpio_set_value_cansleep(GPIO_NT35582_RESET, 1);
8811 msleep(50);
8812
8813 gpio_set_value_cansleep(GPIO_NT35582_BL_EN, 1);
8814
8815 display_power_on = 1;
8816 } else if ((dragon_reg != NULL) && (dragon_reg2 != NULL)) {
8817 gpio_free(GPIO_NT35582_RESET);
8818 gpio_free(GPIO_NT35582_BL_EN);
8819 regulator_disable(dragon_reg2);
8820 regulator_disable(dragon_reg);
8821 regulator_put(dragon_reg2);
8822 regulator_put(dragon_reg);
8823 display_power_on = 0;
8824 dragon_reg = NULL;
8825 dragon_reg2 = NULL;
8826 }
8827 }
8828#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008829 return;
8830
8831out4:
8832 gpio_free(GPIO_BACKLIGHT_EN);
8833out3:
8834 gpio_free(GPIO_LVDS_SHUTDOWN_N);
8835out2:
8836 regulator_disable(display_reg);
8837out:
8838 regulator_put(display_reg);
8839 display_reg = NULL;
8840}
8841#undef _GET_REGULATOR
8842#endif
8843
8844static int mipi_dsi_panel_power(int on);
8845
8846#define LCDC_NUM_GPIO 28
8847#define LCDC_GPIO_START 0
8848
8849static void lcdc_samsung_panel_power(int on)
8850{
8851 int n, ret = 0;
8852
8853 display_common_power(on);
8854
8855 for (n = 0; n < LCDC_NUM_GPIO; n++) {
8856 if (on) {
8857 ret = gpio_request(LCDC_GPIO_START + n, "LCDC_GPIO");
8858 if (unlikely(ret)) {
8859 pr_err("%s not able to get gpio\n", __func__);
8860 break;
8861 }
8862 } else
8863 gpio_free(LCDC_GPIO_START + n);
8864 }
8865
8866 if (ret) {
8867 for (n--; n >= 0; n--)
8868 gpio_free(LCDC_GPIO_START + n);
8869 }
8870
8871 mipi_dsi_panel_power(0); /* set 8058_ldo0 to LPM */
8872}
8873
8874#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
8875#define _GET_REGULATOR(var, name) do { \
8876 var = regulator_get(NULL, name); \
8877 if (IS_ERR(var)) { \
8878 pr_err("'%s' regulator not found, rc=%ld\n", \
8879 name, IS_ERR(var)); \
8880 var = NULL; \
8881 return -ENODEV; \
8882 } \
8883} while (0)
8884
8885static int hdmi_enable_5v(int on)
8886{
8887 static struct regulator *reg_8901_hdmi_mvs; /* HDMI_5V */
8888 static struct regulator *reg_8901_mpp0; /* External 5V */
8889 static int prev_on;
8890 int rc;
8891
8892 if (on == prev_on)
8893 return 0;
8894
8895 if (!reg_8901_hdmi_mvs)
8896 _GET_REGULATOR(reg_8901_hdmi_mvs, "8901_hdmi_mvs");
8897 if (!reg_8901_mpp0)
8898 _GET_REGULATOR(reg_8901_mpp0, "8901_mpp0");
8899
8900 if (on) {
8901 rc = regulator_enable(reg_8901_mpp0);
8902 if (rc) {
8903 pr_err("'%s' regulator enable failed, rc=%d\n",
8904 "reg_8901_mpp0", rc);
8905 return rc;
8906 }
8907 rc = regulator_enable(reg_8901_hdmi_mvs);
8908 if (rc) {
8909 pr_err("'%s' regulator enable failed, rc=%d\n",
8910 "8901_hdmi_mvs", rc);
8911 return rc;
8912 }
8913 pr_info("%s(on): success\n", __func__);
8914 } else {
8915 rc = regulator_disable(reg_8901_hdmi_mvs);
8916 if (rc)
8917 pr_warning("'%s' regulator disable failed, rc=%d\n",
8918 "8901_hdmi_mvs", rc);
8919 rc = regulator_disable(reg_8901_mpp0);
8920 if (rc)
8921 pr_warning("'%s' regulator disable failed, rc=%d\n",
8922 "reg_8901_mpp0", rc);
8923 pr_info("%s(off): success\n", __func__);
8924 }
8925
8926 prev_on = on;
8927
8928 return 0;
8929}
8930
8931static int hdmi_core_power(int on, int show)
8932{
8933 static struct regulator *reg_8058_l16; /* VDD_HDMI */
8934 static int prev_on;
8935 int rc;
8936
8937 if (on == prev_on)
8938 return 0;
8939
8940 if (!reg_8058_l16)
8941 _GET_REGULATOR(reg_8058_l16, "8058_l16");
8942
8943 if (on) {
8944 rc = regulator_set_voltage(reg_8058_l16, 1800000, 1800000);
8945 if (!rc)
8946 rc = regulator_enable(reg_8058_l16);
8947 if (rc) {
8948 pr_err("'%s' regulator enable failed, rc=%d\n",
8949 "8058_l16", rc);
8950 return rc;
8951 }
8952 rc = gpio_request(170, "HDMI_DDC_CLK");
8953 if (rc) {
8954 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8955 "HDMI_DDC_CLK", 170, rc);
8956 goto error1;
8957 }
8958 rc = gpio_request(171, "HDMI_DDC_DATA");
8959 if (rc) {
8960 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8961 "HDMI_DDC_DATA", 171, rc);
8962 goto error2;
8963 }
8964 rc = gpio_request(172, "HDMI_HPD");
8965 if (rc) {
8966 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8967 "HDMI_HPD", 172, rc);
8968 goto error3;
8969 }
8970 pr_info("%s(on): success\n", __func__);
8971 } else {
8972 gpio_free(170);
8973 gpio_free(171);
8974 gpio_free(172);
8975 rc = regulator_disable(reg_8058_l16);
8976 if (rc)
8977 pr_warning("'%s' regulator disable failed, rc=%d\n",
8978 "8058_l16", rc);
8979 pr_info("%s(off): success\n", __func__);
8980 }
8981
8982 prev_on = on;
8983
8984 return 0;
8985
8986error3:
8987 gpio_free(171);
8988error2:
8989 gpio_free(170);
8990error1:
8991 regulator_disable(reg_8058_l16);
8992 return rc;
8993}
8994
8995static int hdmi_cec_power(int on)
8996{
8997 static struct regulator *reg_8901_l3; /* HDMI_CEC */
8998 static int prev_on;
8999 int rc;
9000
9001 if (on == prev_on)
9002 return 0;
9003
9004 if (!reg_8901_l3)
9005 _GET_REGULATOR(reg_8901_l3, "8901_l3");
9006
9007 if (on) {
9008 rc = regulator_set_voltage(reg_8901_l3, 3300000, 3300000);
9009 if (!rc)
9010 rc = regulator_enable(reg_8901_l3);
9011 if (rc) {
9012 pr_err("'%s' regulator enable failed, rc=%d\n",
9013 "8901_l3", rc);
9014 return rc;
9015 }
9016 rc = gpio_request(169, "HDMI_CEC_VAR");
9017 if (rc) {
9018 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
9019 "HDMI_CEC_VAR", 169, rc);
9020 goto error;
9021 }
9022 pr_info("%s(on): success\n", __func__);
9023 } else {
9024 gpio_free(169);
9025 rc = regulator_disable(reg_8901_l3);
9026 if (rc)
9027 pr_warning("'%s' regulator disable failed, rc=%d\n",
9028 "8901_l3", rc);
9029 pr_info("%s(off): success\n", __func__);
9030 }
9031
9032 prev_on = on;
9033
9034 return 0;
9035error:
9036 regulator_disable(reg_8901_l3);
9037 return rc;
9038}
9039
9040#undef _GET_REGULATOR
9041
9042#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
9043
9044static int lcdc_panel_power(int on)
9045{
9046 int flag_on = !!on;
9047 static int lcdc_power_save_on;
9048
9049 if (lcdc_power_save_on == flag_on)
9050 return 0;
9051
9052 lcdc_power_save_on = flag_on;
9053
9054 lcdc_samsung_panel_power(on);
9055
9056 return 0;
9057}
9058
9059#ifdef CONFIG_MSM_BUS_SCALING
Nagamalleswararao Ganji5fabbd62011-11-06 23:10:43 -08009060
9061static struct msm_bus_vectors rotator_init_vectors[] = {
9062 {
9063 .src = MSM_BUS_MASTER_ROTATOR,
9064 .dst = MSM_BUS_SLAVE_SMI,
9065 .ab = 0,
9066 .ib = 0,
9067 },
9068 {
9069 .src = MSM_BUS_MASTER_ROTATOR,
9070 .dst = MSM_BUS_SLAVE_EBI_CH0,
9071 .ab = 0,
9072 .ib = 0,
9073 },
9074};
9075
9076static struct msm_bus_vectors rotator_ui_vectors[] = {
9077 {
9078 .src = MSM_BUS_MASTER_ROTATOR,
9079 .dst = MSM_BUS_SLAVE_SMI,
9080 .ab = 0,
9081 .ib = 0,
9082 },
9083 {
9084 .src = MSM_BUS_MASTER_ROTATOR,
9085 .dst = MSM_BUS_SLAVE_EBI_CH0,
9086 .ab = (1024 * 600 * 4 * 2 * 60),
9087 .ib = (1024 * 600 * 4 * 2 * 60 * 1.5),
9088 },
9089};
9090
9091static struct msm_bus_vectors rotator_vga_vectors[] = {
9092 {
9093 .src = MSM_BUS_MASTER_ROTATOR,
9094 .dst = MSM_BUS_SLAVE_SMI,
9095 .ab = (640 * 480 * 2 * 2 * 30),
9096 .ib = (640 * 480 * 2 * 2 * 30 * 1.5),
9097 },
9098 {
9099 .src = MSM_BUS_MASTER_ROTATOR,
9100 .dst = MSM_BUS_SLAVE_EBI_CH0,
9101 .ab = (640 * 480 * 2 * 2 * 30),
9102 .ib = (640 * 480 * 2 * 2 * 30 * 1.5),
9103 },
9104};
9105
9106static struct msm_bus_vectors rotator_720p_vectors[] = {
9107 {
9108 .src = MSM_BUS_MASTER_ROTATOR,
9109 .dst = MSM_BUS_SLAVE_SMI,
9110 .ab = (1280 * 736 * 2 * 2 * 30),
9111 .ib = (1280 * 736 * 2 * 2 * 30 * 1.5),
9112 },
9113 {
9114 .src = MSM_BUS_MASTER_ROTATOR,
9115 .dst = MSM_BUS_SLAVE_EBI_CH0,
9116 .ab = (1280 * 736 * 2 * 2 * 30),
9117 .ib = (1280 * 736 * 2 * 2 * 30 * 1.5),
9118 },
9119};
9120
9121static struct msm_bus_vectors rotator_1080p_vectors[] = {
9122 {
9123 .src = MSM_BUS_MASTER_ROTATOR,
9124 .dst = MSM_BUS_SLAVE_SMI,
9125 .ab = (1920 * 1088 * 2 * 2 * 30),
9126 .ib = (1920 * 1088 * 2 * 2 * 30 * 1.5),
9127 },
9128 {
9129 .src = MSM_BUS_MASTER_ROTATOR,
9130 .dst = MSM_BUS_SLAVE_EBI_CH0,
9131 .ab = (1920 * 1088 * 2 * 2 * 30),
9132 .ib = (1920 * 1088 * 2 * 2 * 30 * 1.5),
9133 },
9134};
9135
9136static struct msm_bus_paths rotator_bus_scale_usecases[] = {
9137 {
9138 ARRAY_SIZE(rotator_init_vectors),
9139 rotator_init_vectors,
9140 },
9141 {
9142 ARRAY_SIZE(rotator_ui_vectors),
9143 rotator_ui_vectors,
9144 },
9145 {
9146 ARRAY_SIZE(rotator_vga_vectors),
9147 rotator_vga_vectors,
9148 },
9149 {
9150 ARRAY_SIZE(rotator_720p_vectors),
9151 rotator_720p_vectors,
9152 },
9153 {
9154 ARRAY_SIZE(rotator_1080p_vectors),
9155 rotator_1080p_vectors,
9156 },
9157};
9158
9159struct msm_bus_scale_pdata rotator_bus_scale_pdata = {
9160 rotator_bus_scale_usecases,
9161 ARRAY_SIZE(rotator_bus_scale_usecases),
9162 .name = "rotator",
9163};
9164
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009165static struct msm_bus_vectors mdp_init_vectors[] = {
9166 /* For now, 0th array entry is reserved.
9167 * Please leave 0 as is and don't use it
9168 */
9169 {
9170 .src = MSM_BUS_MASTER_MDP_PORT0,
9171 .dst = MSM_BUS_SLAVE_SMI,
9172 .ab = 0,
9173 .ib = 0,
9174 },
9175 /* Master and slaves can be from different fabrics */
9176 {
9177 .src = MSM_BUS_MASTER_MDP_PORT0,
9178 .dst = MSM_BUS_SLAVE_EBI_CH0,
9179 .ab = 0,
9180 .ib = 0,
9181 },
9182};
9183
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009184#ifdef CONFIG_FB_MSM_LCDC_DSUB
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009185static struct msm_bus_vectors mdp_sd_smi_vectors[] = {
9186 /* Default case static display/UI/2d/3d if FB SMI */
9187 {
9188 .src = MSM_BUS_MASTER_MDP_PORT0,
9189 .dst = MSM_BUS_SLAVE_SMI,
9190 .ab = 388800000,
9191 .ib = 486000000,
9192 },
9193 /* Master and slaves can be from different fabrics */
9194 {
9195 .src = MSM_BUS_MASTER_MDP_PORT0,
9196 .dst = MSM_BUS_SLAVE_EBI_CH0,
9197 .ab = 0,
9198 .ib = 0,
9199 },
9200};
9201
9202static struct msm_bus_vectors mdp_sd_ebi_vectors[] = {
9203 /* Default case static display/UI/2d/3d if FB SMI */
9204 {
9205 .src = MSM_BUS_MASTER_MDP_PORT0,
9206 .dst = MSM_BUS_SLAVE_SMI,
9207 .ab = 0,
9208 .ib = 0,
9209 },
9210 /* Master and slaves can be from different fabrics */
9211 {
9212 .src = MSM_BUS_MASTER_MDP_PORT0,
9213 .dst = MSM_BUS_SLAVE_EBI_CH0,
9214 .ab = 388800000,
9215 .ib = 486000000 * 2,
9216 },
9217};
9218static struct msm_bus_vectors mdp_vga_vectors[] = {
9219 /* VGA and less video */
9220 {
9221 .src = MSM_BUS_MASTER_MDP_PORT0,
9222 .dst = MSM_BUS_SLAVE_SMI,
9223 .ab = 458092800,
9224 .ib = 572616000,
9225 },
9226 {
9227 .src = MSM_BUS_MASTER_MDP_PORT0,
9228 .dst = MSM_BUS_SLAVE_EBI_CH0,
9229 .ab = 458092800,
9230 .ib = 572616000 * 2,
9231 },
9232};
9233static struct msm_bus_vectors mdp_720p_vectors[] = {
9234 /* 720p and less video */
9235 {
9236 .src = MSM_BUS_MASTER_MDP_PORT0,
9237 .dst = MSM_BUS_SLAVE_SMI,
9238 .ab = 471744000,
9239 .ib = 589680000,
9240 },
9241 /* Master and slaves can be from different fabrics */
9242 {
9243 .src = MSM_BUS_MASTER_MDP_PORT0,
9244 .dst = MSM_BUS_SLAVE_EBI_CH0,
9245 .ab = 471744000,
9246 .ib = 589680000 * 2,
9247 },
9248};
9249
9250static struct msm_bus_vectors mdp_1080p_vectors[] = {
9251 /* 1080p and less video */
9252 {
9253 .src = MSM_BUS_MASTER_MDP_PORT0,
9254 .dst = MSM_BUS_SLAVE_SMI,
9255 .ab = 575424000,
9256 .ib = 719280000,
9257 },
9258 /* Master and slaves can be from different fabrics */
9259 {
9260 .src = MSM_BUS_MASTER_MDP_PORT0,
9261 .dst = MSM_BUS_SLAVE_EBI_CH0,
9262 .ab = 575424000,
9263 .ib = 719280000 * 2,
9264 },
9265};
9266
9267#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009268static struct msm_bus_vectors mdp_sd_smi_vectors[] = {
9269 /* Default case static display/UI/2d/3d if FB SMI */
9270 {
9271 .src = MSM_BUS_MASTER_MDP_PORT0,
9272 .dst = MSM_BUS_SLAVE_SMI,
9273 .ab = 175110000,
9274 .ib = 218887500,
9275 },
9276 /* Master and slaves can be from different fabrics */
9277 {
9278 .src = MSM_BUS_MASTER_MDP_PORT0,
9279 .dst = MSM_BUS_SLAVE_EBI_CH0,
9280 .ab = 0,
9281 .ib = 0,
9282 },
9283};
9284
9285static struct msm_bus_vectors mdp_sd_ebi_vectors[] = {
9286 /* Default case static display/UI/2d/3d if FB SMI */
9287 {
9288 .src = MSM_BUS_MASTER_MDP_PORT0,
9289 .dst = MSM_BUS_SLAVE_SMI,
9290 .ab = 0,
9291 .ib = 0,
9292 },
9293 /* Master and slaves can be from different fabrics */
9294 {
9295 .src = MSM_BUS_MASTER_MDP_PORT0,
9296 .dst = MSM_BUS_SLAVE_EBI_CH0,
9297 .ab = 216000000,
9298 .ib = 270000000 * 2,
9299 },
9300};
9301static struct msm_bus_vectors mdp_vga_vectors[] = {
9302 /* VGA and less video */
9303 {
9304 .src = MSM_BUS_MASTER_MDP_PORT0,
9305 .dst = MSM_BUS_SLAVE_SMI,
9306 .ab = 216000000,
9307 .ib = 270000000,
9308 },
9309 {
9310 .src = MSM_BUS_MASTER_MDP_PORT0,
9311 .dst = MSM_BUS_SLAVE_EBI_CH0,
9312 .ab = 216000000,
9313 .ib = 270000000 * 2,
9314 },
9315};
9316
9317static struct msm_bus_vectors mdp_720p_vectors[] = {
9318 /* 720p and less video */
9319 {
9320 .src = MSM_BUS_MASTER_MDP_PORT0,
9321 .dst = MSM_BUS_SLAVE_SMI,
9322 .ab = 230400000,
9323 .ib = 288000000,
9324 },
9325 /* Master and slaves can be from different fabrics */
9326 {
9327 .src = MSM_BUS_MASTER_MDP_PORT0,
9328 .dst = MSM_BUS_SLAVE_EBI_CH0,
9329 .ab = 230400000,
9330 .ib = 288000000 * 2,
9331 },
9332};
9333
9334static struct msm_bus_vectors mdp_1080p_vectors[] = {
9335 /* 1080p and less video */
9336 {
9337 .src = MSM_BUS_MASTER_MDP_PORT0,
9338 .dst = MSM_BUS_SLAVE_SMI,
9339 .ab = 334080000,
9340 .ib = 417600000,
9341 },
9342 /* Master and slaves can be from different fabrics */
9343 {
9344 .src = MSM_BUS_MASTER_MDP_PORT0,
9345 .dst = MSM_BUS_SLAVE_EBI_CH0,
9346 .ab = 334080000,
Ravishangar Kalyanam731beb92011-07-07 18:27:32 -07009347 .ib = 550000000 * 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009348 },
9349};
9350
9351#endif
9352static struct msm_bus_paths mdp_bus_scale_usecases[] = {
9353 {
9354 ARRAY_SIZE(mdp_init_vectors),
9355 mdp_init_vectors,
9356 },
9357 {
9358 ARRAY_SIZE(mdp_sd_smi_vectors),
9359 mdp_sd_smi_vectors,
9360 },
9361 {
9362 ARRAY_SIZE(mdp_sd_ebi_vectors),
9363 mdp_sd_ebi_vectors,
9364 },
9365 {
9366 ARRAY_SIZE(mdp_vga_vectors),
9367 mdp_vga_vectors,
9368 },
9369 {
9370 ARRAY_SIZE(mdp_720p_vectors),
9371 mdp_720p_vectors,
9372 },
9373 {
9374 ARRAY_SIZE(mdp_1080p_vectors),
9375 mdp_1080p_vectors,
9376 },
9377};
9378static struct msm_bus_scale_pdata mdp_bus_scale_pdata = {
9379 mdp_bus_scale_usecases,
9380 ARRAY_SIZE(mdp_bus_scale_usecases),
9381 .name = "mdp",
9382};
9383
9384#endif
9385#ifdef CONFIG_MSM_BUS_SCALING
9386static struct msm_bus_vectors dtv_bus_init_vectors[] = {
9387 /* For now, 0th array entry is reserved.
9388 * Please leave 0 as is and don't use it
9389 */
9390 {
9391 .src = MSM_BUS_MASTER_MDP_PORT0,
9392 .dst = MSM_BUS_SLAVE_SMI,
9393 .ab = 0,
9394 .ib = 0,
9395 },
9396 /* Master and slaves can be from different fabrics */
9397 {
9398 .src = MSM_BUS_MASTER_MDP_PORT0,
9399 .dst = MSM_BUS_SLAVE_EBI_CH0,
9400 .ab = 0,
9401 .ib = 0,
9402 },
9403};
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08009404
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009405static struct msm_bus_vectors dtv_bus_def_vectors[] = {
9406 /* For now, 0th array entry is reserved.
9407 * Please leave 0 as is and don't use it
9408 */
9409 {
9410 .src = MSM_BUS_MASTER_MDP_PORT0,
9411 .dst = MSM_BUS_SLAVE_SMI,
9412 .ab = 566092800,
9413 .ib = 707616000,
9414 },
9415 /* Master and slaves can be from different fabrics */
9416 {
9417 .src = MSM_BUS_MASTER_MDP_PORT0,
9418 .dst = MSM_BUS_SLAVE_EBI_CH0,
9419 .ab = 566092800,
9420 .ib = 707616000,
9421 },
9422};
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08009423
9424static struct msm_bus_vectors dtv_bus_hdmi_prim_vectors[] = {
9425 /* For now, 0th array entry is reserved.
9426 * Please leave 0 as is and don't use it
9427 */
9428 {
9429 .src = MSM_BUS_MASTER_MDP_PORT0,
9430 .dst = MSM_BUS_SLAVE_SMI,
9431 .ab = 2000000000,
9432 .ib = 2000000000,
9433 },
9434 /* Master and slaves can be from different fabrics */
9435 {
9436 .src = MSM_BUS_MASTER_MDP_PORT0,
9437 .dst = MSM_BUS_SLAVE_EBI_CH0,
9438 .ab = 2000000000,
9439 .ib = 2000000000,
9440 },
9441};
9442
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009443static struct msm_bus_paths dtv_bus_scale_usecases[] = {
9444 {
9445 ARRAY_SIZE(dtv_bus_init_vectors),
9446 dtv_bus_init_vectors,
9447 },
9448 {
9449 ARRAY_SIZE(dtv_bus_def_vectors),
9450 dtv_bus_def_vectors,
9451 },
9452};
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08009453
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009454static struct msm_bus_scale_pdata dtv_bus_scale_pdata = {
9455 dtv_bus_scale_usecases,
9456 ARRAY_SIZE(dtv_bus_scale_usecases),
9457 .name = "dtv",
9458};
9459
9460static struct lcdc_platform_data dtv_pdata = {
9461 .bus_scale_table = &dtv_bus_scale_pdata,
9462};
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08009463
9464static struct msm_bus_paths dtv_hdmi_prim_bus_scale_usecases[] = {
9465 {
9466 ARRAY_SIZE(dtv_bus_init_vectors),
9467 dtv_bus_init_vectors,
9468 },
9469 {
9470 ARRAY_SIZE(dtv_bus_hdmi_prim_vectors),
9471 dtv_bus_hdmi_prim_vectors,
9472 },
9473};
9474
9475static struct msm_bus_scale_pdata dtv_hdmi_prim_bus_scale_pdata = {
9476 dtv_hdmi_prim_bus_scale_usecases,
9477 ARRAY_SIZE(dtv_hdmi_prim_bus_scale_usecases),
9478 .name = "dtv",
9479};
9480
9481static struct lcdc_platform_data dtv_hdmi_prim_pdata = {
9482 .bus_scale_table = &dtv_hdmi_prim_bus_scale_pdata,
9483};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009484#endif
9485
9486
9487static struct lcdc_platform_data lcdc_pdata = {
9488 .lcdc_power_save = lcdc_panel_power,
9489};
9490
9491
9492#define MDP_VSYNC_GPIO 28
9493
9494/*
9495 * MIPI_DSI only use 8058_LDO0 which need always on
9496 * therefore it need to be put at low power mode if
9497 * it was not used instead of turn it off.
9498 */
9499static int mipi_dsi_panel_power(int on)
9500{
9501 int flag_on = !!on;
9502 static int mipi_dsi_power_save_on;
9503 static struct regulator *ldo0;
9504 int rc = 0;
9505
9506 if (mipi_dsi_power_save_on == flag_on)
9507 return 0;
9508
9509 mipi_dsi_power_save_on = flag_on;
9510
9511 if (ldo0 == NULL) { /* init */
9512 ldo0 = regulator_get(NULL, "8058_l0");
9513 if (IS_ERR(ldo0)) {
9514 pr_debug("%s: LDO0 failed\n", __func__);
9515 rc = PTR_ERR(ldo0);
9516 return rc;
9517 }
9518
9519 rc = regulator_set_voltage(ldo0, 1200000, 1200000);
9520 if (rc)
9521 goto out;
9522
9523 rc = regulator_enable(ldo0);
9524 if (rc)
9525 goto out;
9526 }
9527
9528 if (on) {
9529 /* set ldo0 to HPM */
9530 rc = regulator_set_optimum_mode(ldo0, 100000);
9531 if (rc < 0)
9532 goto out;
9533 } else {
9534 /* set ldo0 to LPM */
Padmanabhan Komanduru0b478ff2011-11-22 19:15:40 +05309535 rc = regulator_set_optimum_mode(ldo0, 1000);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009536 if (rc < 0)
9537 goto out;
9538 }
9539
9540 return 0;
9541out:
9542 regulator_disable(ldo0);
9543 regulator_put(ldo0);
9544 ldo0 = NULL;
9545 return rc;
9546}
9547
9548static struct mipi_dsi_platform_data mipi_dsi_pdata = {
9549 .vsync_gpio = MDP_VSYNC_GPIO,
9550 .dsi_power_save = mipi_dsi_panel_power,
9551};
9552
9553#ifdef CONFIG_FB_MSM_TVOUT
9554static struct regulator *reg_8058_l13;
9555
9556static int atv_dac_power(int on)
9557{
9558 int rc = 0;
9559 #define _GET_REGULATOR(var, name) do { \
9560 var = regulator_get(NULL, name); \
9561 if (IS_ERR(var)) { \
9562 pr_info("'%s' regulator not found, rc=%ld\n", \
9563 name, IS_ERR(var)); \
9564 var = NULL; \
9565 return -ENODEV; \
9566 } \
9567 } while (0)
9568
9569 if (!reg_8058_l13)
9570 _GET_REGULATOR(reg_8058_l13, "8058_l13");
9571 #undef _GET_REGULATOR
9572
9573 if (on) {
9574 rc = regulator_set_voltage(reg_8058_l13, 2050000, 2050000);
9575 if (rc) {
9576 pr_info("%s: '%s' regulator set voltage failed,\
9577 rc=%d\n", __func__, "8058_l13", rc);
9578 return rc;
9579 }
9580
9581 rc = regulator_enable(reg_8058_l13);
9582 if (rc) {
9583 pr_err("%s: '%s' regulator enable failed,\
9584 rc=%d\n", __func__, "8058_l13", rc);
9585 return rc;
9586 }
9587 } else {
9588 rc = regulator_force_disable(reg_8058_l13);
9589 if (rc)
9590 pr_warning("%s: '%s' regulator disable failed, rc=%d\n",
9591 __func__, "8058_l13", rc);
9592 }
9593 return rc;
9594
9595}
9596#endif
9597
9598#ifdef CONFIG_FB_MSM_MIPI_DSI
9599int mdp_core_clk_rate_table[] = {
9600 85330000,
Huaibin Yang1f180ee2012-01-30 16:23:06 -08009601 128000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009602 160000000,
9603 200000000,
9604};
9605#else
9606int mdp_core_clk_rate_table[] = {
9607 59080000,
Huaibin Yang1f180ee2012-01-30 16:23:06 -08009608 128000000,
kuogee hsieh26791a92011-08-01 18:35:58 -07009609 128000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009610 200000000,
9611};
9612#endif
9613
9614static struct msm_panel_common_pdata mdp_pdata = {
9615 .gpio = MDP_VSYNC_GPIO,
9616 .mdp_core_clk_rate = 59080000,
9617 .mdp_core_clk_table = mdp_core_clk_rate_table,
9618 .num_mdp_clk = ARRAY_SIZE(mdp_core_clk_rate_table),
9619#ifdef CONFIG_MSM_BUS_SCALING
9620 .mdp_bus_scale_table = &mdp_bus_scale_pdata,
9621#endif
9622 .mdp_rev = MDP_REV_41,
Nagamalleswararao Ganji937a1192011-12-07 19:00:52 -08009623#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
Ravishangar Kalyanama3b168b2012-03-26 11:13:11 -07009624 .mem_hid = BIT(ION_CP_WB_HEAP_ID),
Nagamalleswararao Ganji937a1192011-12-07 19:00:52 -08009625#else
9626 .mem_hid = MEMTYPE_EBI1,
9627#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009628};
9629
Huaibin Yanga5419422011-12-08 23:52:10 -08009630static void __init reserve_mdp_memory(void)
9631{
Nagamalleswararao Ganji937a1192011-12-07 19:00:52 -08009632 mdp_pdata.ov0_wb_size = MSM_FB_OVERLAY0_WRITEBACK_SIZE;
9633 mdp_pdata.ov1_wb_size = MSM_FB_OVERLAY1_WRITEBACK_SIZE;
9634#if defined(CONFIG_ANDROID_PMEM) && !defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
9635 msm8x60_reserve_table[mdp_pdata.mem_hid].size +=
9636 mdp_pdata.ov0_wb_size;
9637 msm8x60_reserve_table[mdp_pdata.mem_hid].size +=
9638 mdp_pdata.ov1_wb_size;
9639#endif
Huaibin Yanga5419422011-12-08 23:52:10 -08009640}
9641
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009642#ifdef CONFIG_FB_MSM_TVOUT
9643
9644#ifdef CONFIG_MSM_BUS_SCALING
9645static struct msm_bus_vectors atv_bus_init_vectors[] = {
9646 /* For now, 0th array entry is reserved.
9647 * Please leave 0 as is and don't use it
9648 */
9649 {
9650 .src = MSM_BUS_MASTER_MDP_PORT0,
9651 .dst = MSM_BUS_SLAVE_SMI,
9652 .ab = 0,
9653 .ib = 0,
9654 },
9655 /* Master and slaves can be from different fabrics */
9656 {
9657 .src = MSM_BUS_MASTER_MDP_PORT0,
9658 .dst = MSM_BUS_SLAVE_EBI_CH0,
9659 .ab = 0,
9660 .ib = 0,
9661 },
9662};
9663static struct msm_bus_vectors atv_bus_def_vectors[] = {
9664 /* For now, 0th array entry is reserved.
9665 * Please leave 0 as is and don't use it
9666 */
9667 {
9668 .src = MSM_BUS_MASTER_MDP_PORT0,
9669 .dst = MSM_BUS_SLAVE_SMI,
9670 .ab = 236390400,
9671 .ib = 265939200,
9672 },
9673 /* Master and slaves can be from different fabrics */
9674 {
9675 .src = MSM_BUS_MASTER_MDP_PORT0,
9676 .dst = MSM_BUS_SLAVE_EBI_CH0,
9677 .ab = 236390400,
9678 .ib = 265939200,
9679 },
9680};
9681static struct msm_bus_paths atv_bus_scale_usecases[] = {
9682 {
9683 ARRAY_SIZE(atv_bus_init_vectors),
9684 atv_bus_init_vectors,
9685 },
9686 {
9687 ARRAY_SIZE(atv_bus_def_vectors),
9688 atv_bus_def_vectors,
9689 },
9690};
9691static struct msm_bus_scale_pdata atv_bus_scale_pdata = {
9692 atv_bus_scale_usecases,
9693 ARRAY_SIZE(atv_bus_scale_usecases),
9694 .name = "atv",
9695};
9696#endif
9697
9698static struct tvenc_platform_data atv_pdata = {
9699 .poll = 0,
9700 .pm_vid_en = atv_dac_power,
9701#ifdef CONFIG_MSM_BUS_SCALING
9702 .bus_scale_table = &atv_bus_scale_pdata,
9703#endif
9704};
9705#endif
9706
9707static void __init msm_fb_add_devices(void)
9708{
9709#ifdef CONFIG_FB_MSM_LCDC_DSUB
9710 mdp_pdata.mdp_core_clk_table = NULL;
9711 mdp_pdata.num_mdp_clk = 0;
9712 mdp_pdata.mdp_core_clk_rate = 200000000;
9713#endif
9714 if (machine_is_msm8x60_rumi3())
9715 msm_fb_register_device("mdp", NULL);
9716 else
9717 msm_fb_register_device("mdp", &mdp_pdata);
9718
9719 msm_fb_register_device("lcdc", &lcdc_pdata);
9720 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
9721#ifdef CONFIG_MSM_BUS_SCALING
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08009722 if (hdmi_is_primary)
9723 msm_fb_register_device("dtv", &dtv_hdmi_prim_pdata);
9724 else
9725 msm_fb_register_device("dtv", &dtv_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009726#endif
9727#ifdef CONFIG_FB_MSM_TVOUT
9728 msm_fb_register_device("tvenc", &atv_pdata);
9729 msm_fb_register_device("tvout_device", NULL);
9730#endif
9731}
9732
Ravishangar Kalyanam5f0c6412012-03-15 17:24:11 -07009733/**
9734 * Set MDP clocks to high frequency to avoid underflow when
9735 * using high resolution 1200x1920 WUXGA/HDMI as primary panels
9736 */
9737static void set_mdp_clocks_for_wuxga(void)
9738{
9739 int i;
9740
9741 mdp_sd_smi_vectors[0].ab = 2000000000;
9742 mdp_sd_smi_vectors[0].ib = 2000000000;
9743 mdp_sd_smi_vectors[1].ab = 2000000000;
9744 mdp_sd_smi_vectors[1].ib = 2000000000;
9745
9746 mdp_sd_ebi_vectors[0].ab = 2000000000;
9747 mdp_sd_ebi_vectors[0].ib = 2000000000;
9748 mdp_sd_ebi_vectors[1].ab = 2000000000;
9749 mdp_sd_ebi_vectors[1].ib = 2000000000;
9750
9751 mdp_vga_vectors[0].ab = 2000000000;
9752 mdp_vga_vectors[0].ib = 2000000000;
9753 mdp_vga_vectors[1].ab = 2000000000;
9754 mdp_vga_vectors[1].ib = 2000000000;
9755
9756 mdp_720p_vectors[0].ab = 2000000000;
9757 mdp_720p_vectors[0].ib = 2000000000;
9758 mdp_720p_vectors[1].ab = 2000000000;
9759 mdp_720p_vectors[1].ib = 2000000000;
9760
9761 mdp_1080p_vectors[0].ab = 2000000000;
9762 mdp_1080p_vectors[0].ib = 2000000000;
9763 mdp_1080p_vectors[1].ab = 2000000000;
9764 mdp_1080p_vectors[1].ib = 2000000000;
9765
9766 mdp_pdata.mdp_core_clk_rate = 200000000;
9767
9768 for (i = 0; i < ARRAY_SIZE(mdp_core_clk_rate_table); i++)
9769 mdp_core_clk_rate_table[i] = 200000000;
9770}
9771
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009772#if (defined(CONFIG_MARIMBA_CORE)) && \
9773 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
9774
9775static const struct {
9776 char *name;
9777 int vmin;
9778 int vmax;
9779} bt_regs_info[] = {
9780 { "8058_s3", 1800000, 1800000 },
9781 { "8058_s2", 1300000, 1300000 },
9782 { "8058_l8", 2900000, 3050000 },
9783};
9784
9785static struct {
9786 bool enabled;
9787} bt_regs_status[] = {
9788 { false },
9789 { false },
9790 { false },
9791};
9792static struct regulator *bt_regs[ARRAY_SIZE(bt_regs_info)];
9793
9794static int bahama_bt(int on)
9795{
9796 int rc;
9797 int i;
9798 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
9799
9800 struct bahama_variant_register {
9801 const size_t size;
9802 const struct bahama_config_register *set;
9803 };
9804
9805 const struct bahama_config_register *p;
9806
9807 u8 version;
9808
9809 const struct bahama_config_register v10_bt_on[] = {
9810 { 0xE9, 0x00, 0xFF },
9811 { 0xF4, 0x80, 0xFF },
9812 { 0xE4, 0x00, 0xFF },
9813 { 0xE5, 0x00, 0x0F },
9814#ifdef CONFIG_WLAN
9815 { 0xE6, 0x38, 0x7F },
9816 { 0xE7, 0x06, 0xFF },
9817#endif
9818 { 0xE9, 0x21, 0xFF },
9819 { 0x01, 0x0C, 0x1F },
9820 { 0x01, 0x08, 0x1F },
9821 };
9822
9823 const struct bahama_config_register v20_bt_on_fm_off[] = {
9824 { 0x11, 0x0C, 0xFF },
9825 { 0x13, 0x01, 0xFF },
9826 { 0xF4, 0x80, 0xFF },
9827 { 0xF0, 0x00, 0xFF },
9828 { 0xE9, 0x00, 0xFF },
9829#ifdef CONFIG_WLAN
9830 { 0x81, 0x00, 0x7F },
9831 { 0x82, 0x00, 0xFF },
9832 { 0xE6, 0x38, 0x7F },
9833 { 0xE7, 0x06, 0xFF },
9834#endif
9835 { 0xE9, 0x21, 0xFF },
9836 };
9837
9838 const struct bahama_config_register v20_bt_on_fm_on[] = {
9839 { 0x11, 0x0C, 0xFF },
9840 { 0x13, 0x01, 0xFF },
9841 { 0xF4, 0x86, 0xFF },
9842 { 0xF0, 0x06, 0xFF },
9843 { 0xE9, 0x00, 0xFF },
9844#ifdef CONFIG_WLAN
9845 { 0x81, 0x00, 0x7F },
9846 { 0x82, 0x00, 0xFF },
9847 { 0xE6, 0x38, 0x7F },
9848 { 0xE7, 0x06, 0xFF },
9849#endif
9850 { 0xE9, 0x21, 0xFF },
9851 };
9852
9853 const struct bahama_config_register v10_bt_off[] = {
9854 { 0xE9, 0x00, 0xFF },
9855 };
9856
9857 const struct bahama_config_register v20_bt_off_fm_off[] = {
9858 { 0xF4, 0x84, 0xFF },
9859 { 0xF0, 0x04, 0xFF },
9860 { 0xE9, 0x00, 0xFF }
9861 };
9862
9863 const struct bahama_config_register v20_bt_off_fm_on[] = {
9864 { 0xF4, 0x86, 0xFF },
9865 { 0xF0, 0x06, 0xFF },
9866 { 0xE9, 0x00, 0xFF }
9867 };
9868 const struct bahama_variant_register bt_bahama[2][3] = {
9869 {
9870 { ARRAY_SIZE(v10_bt_off), v10_bt_off },
9871 { ARRAY_SIZE(v20_bt_off_fm_off), v20_bt_off_fm_off },
9872 { ARRAY_SIZE(v20_bt_off_fm_on), v20_bt_off_fm_on }
9873 },
9874 {
9875 { ARRAY_SIZE(v10_bt_on), v10_bt_on },
9876 { ARRAY_SIZE(v20_bt_on_fm_off), v20_bt_on_fm_off },
9877 { ARRAY_SIZE(v20_bt_on_fm_on), v20_bt_on_fm_on }
9878 }
9879 };
9880
9881 u8 offset = 0; /* index into bahama configs */
9882
9883 on = on ? 1 : 0;
9884 version = read_bahama_ver();
9885
9886 if (version == VER_UNSUPPORTED) {
9887 dev_err(&msm_bt_power_device.dev,
9888 "%s: unsupported version\n",
9889 __func__);
9890 return -EIO;
9891 }
9892
9893 if (version == VER_2_0) {
9894 if (marimba_get_fm_status(&config))
9895 offset = 0x01;
9896 }
9897
9898 /* Voting off 1.3V S2 Regulator,BahamaV2 used in Normal mode */
9899 if (on && (version == VER_2_0)) {
9900 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9901 if ((!strcmp(bt_regs_info[i].name, "8058_s2"))
9902 && (bt_regs_status[i].enabled == true)) {
9903 if (regulator_disable(bt_regs[i])) {
9904 dev_err(&msm_bt_power_device.dev,
9905 "%s: regulator disable failed",
9906 __func__);
9907 }
9908 bt_regs_status[i].enabled = false;
9909 break;
9910 }
9911 }
9912 }
9913
9914 p = bt_bahama[on][version + offset].set;
9915
9916 dev_info(&msm_bt_power_device.dev,
9917 "%s: found version %d\n", __func__, version);
9918
9919 for (i = 0; i < bt_bahama[on][version + offset].size; i++) {
9920 u8 value = (p+i)->value;
9921 rc = marimba_write_bit_mask(&config,
9922 (p+i)->reg,
9923 &value,
9924 sizeof((p+i)->value),
9925 (p+i)->mask);
9926 if (rc < 0) {
9927 dev_err(&msm_bt_power_device.dev,
9928 "%s: reg %d write failed: %d\n",
9929 __func__, (p+i)->reg, rc);
9930 return rc;
9931 }
9932 dev_dbg(&msm_bt_power_device.dev,
9933 "%s: reg 0x%02x write value 0x%02x mask 0x%02x\n",
9934 __func__, (p+i)->reg,
9935 value, (p+i)->mask);
9936 }
9937 /* Update BT Status */
9938 if (on)
9939 marimba_set_bt_status(&config, true);
9940 else
9941 marimba_set_bt_status(&config, false);
9942
9943 return 0;
9944}
9945
9946static int bluetooth_use_regulators(int on)
9947{
9948 int i, recover = -1, rc = 0;
9949
9950 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9951 bt_regs[i] = on ? regulator_get(&msm_bt_power_device.dev,
9952 bt_regs_info[i].name) :
9953 (regulator_put(bt_regs[i]), NULL);
9954 if (IS_ERR(bt_regs[i])) {
9955 rc = PTR_ERR(bt_regs[i]);
9956 dev_err(&msm_bt_power_device.dev,
9957 "regulator %s get failed (%d)\n",
9958 bt_regs_info[i].name, rc);
9959 recover = i - 1;
9960 bt_regs[i] = NULL;
9961 break;
9962 }
9963
9964 if (!on)
9965 continue;
9966
9967 rc = regulator_set_voltage(bt_regs[i],
9968 bt_regs_info[i].vmin,
9969 bt_regs_info[i].vmax);
9970 if (rc < 0) {
9971 dev_err(&msm_bt_power_device.dev,
9972 "regulator %s voltage set (%d)\n",
9973 bt_regs_info[i].name, rc);
9974 recover = i;
9975 break;
9976 }
9977 }
9978
9979 if (on && (recover > -1))
9980 for (i = recover; i >= 0; i--) {
9981 regulator_put(bt_regs[i]);
9982 bt_regs[i] = NULL;
9983 }
9984
9985 return rc;
9986}
9987
9988static int bluetooth_switch_regulators(int on)
9989{
9990 int i, rc = 0;
9991
9992 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9993 if (on && (bt_regs_status[i].enabled == false)) {
9994 rc = regulator_enable(bt_regs[i]);
9995 if (rc < 0) {
9996 dev_err(&msm_bt_power_device.dev,
9997 "regulator %s %s failed (%d)\n",
9998 bt_regs_info[i].name,
9999 "enable", rc);
10000 if (i > 0) {
10001 while (--i) {
10002 regulator_disable(bt_regs[i]);
10003 bt_regs_status[i].enabled
10004 = false;
10005 }
10006 break;
10007 }
10008 }
10009 bt_regs_status[i].enabled = true;
10010 } else if (!on && (bt_regs_status[i].enabled == true)) {
10011 rc = regulator_disable(bt_regs[i]);
10012 if (rc < 0) {
10013 dev_err(&msm_bt_power_device.dev,
10014 "regulator %s %s failed (%d)\n",
10015 bt_regs_info[i].name,
10016 "disable", rc);
10017 break;
10018 }
10019 bt_regs_status[i].enabled = false;
10020 }
10021 }
10022 return rc;
10023}
10024
10025static struct msm_xo_voter *bt_clock;
10026
10027static int bluetooth_power(int on)
10028{
10029 int rc = 0;
10030 int id;
10031
10032 /* In case probe function fails, cur_connv_type would be -1 */
10033 id = adie_get_detected_connectivity_type();
10034 if (id != BAHAMA_ID) {
10035 pr_err("%s: unexpected adie connectivity type: %d\n",
10036 __func__, id);
10037 return -ENODEV;
10038 }
10039
10040 if (on) {
10041
10042 rc = bluetooth_use_regulators(1);
10043 if (rc < 0)
10044 goto out;
10045
10046 rc = bluetooth_switch_regulators(1);
10047
10048 if (rc < 0)
10049 goto fail_put;
10050
10051 bt_clock = msm_xo_get(MSM_XO_TCXO_D0, "bt_power");
10052
10053 if (IS_ERR(bt_clock)) {
10054 pr_err("Couldn't get TCXO_D0 voter\n");
10055 goto fail_switch;
10056 }
10057
10058 rc = msm_xo_mode_vote(bt_clock, MSM_XO_MODE_ON);
10059
10060 if (rc < 0) {
10061 pr_err("Failed to vote for TCXO_DO ON\n");
10062 goto fail_vote;
10063 }
10064
10065 rc = bahama_bt(1);
10066
10067 if (rc < 0)
10068 goto fail_clock;
10069
10070 msleep(10);
10071
10072 rc = msm_xo_mode_vote(bt_clock, MSM_XO_MODE_PIN_CTRL);
10073
10074 if (rc < 0) {
10075 pr_err("Failed to vote for TCXO_DO pin control\n");
10076 goto fail_vote;
10077 }
10078 } else {
10079 /* check for initial RFKILL block (power off) */
10080 /* some RFKILL versions/configurations rfkill_register */
10081 /* calls here for an initial set_block */
10082 /* avoid calling i2c and regulator before unblock (on) */
10083 if (platform_get_drvdata(&msm_bt_power_device) == NULL) {
10084 dev_info(&msm_bt_power_device.dev,
10085 "%s: initialized OFF/blocked\n", __func__);
10086 goto out;
10087 }
10088
10089 bahama_bt(0);
10090
10091fail_clock:
10092 msm_xo_mode_vote(bt_clock, MSM_XO_MODE_OFF);
10093fail_vote:
10094 msm_xo_put(bt_clock);
10095fail_switch:
10096 bluetooth_switch_regulators(0);
10097fail_put:
10098 bluetooth_use_regulators(0);
10099 }
10100
10101out:
10102 if (rc < 0)
10103 on = 0;
10104 dev_info(&msm_bt_power_device.dev,
10105 "Bluetooth power switch: state %d result %d\n", on, rc);
10106
10107 return rc;
10108}
10109
10110#endif /*CONFIG_MARIMBA_CORE, CONFIG_MSM_BT_POWER, CONFIG_MSM_BT_POWER_MODULE*/
10111
10112static void __init msm8x60_cfg_smsc911x(void)
10113{
10114 smsc911x_resources[1].start =
10115 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 6);
10116 smsc911x_resources[1].end =
10117 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 6);
10118}
10119
Laura Abbott5d2d1e62011-08-10 16:27:35 -070010120void msm_fusion_setup_pinctrl(void)
10121{
10122 struct msm_xo_voter *a1;
10123
10124 if (socinfo_get_platform_subtype() == 0x3) {
10125 /*
10126 * Vote for the A1 clock to be in pin control mode before
10127 * the external images are loaded.
10128 */
10129 a1 = msm_xo_get(MSM_XO_TCXO_A1, "mdm");
10130 BUG_ON(!a1);
10131 msm_xo_mode_vote(a1, MSM_XO_MODE_PIN_CTRL);
10132 }
10133}
10134
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010135struct msm_board_data {
10136 struct msm_gpiomux_configs *gpiomux_cfgs;
10137};
10138
10139static struct msm_board_data msm8x60_rumi3_board_data __initdata = {
10140 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
10141};
10142
10143static struct msm_board_data msm8x60_sim_board_data __initdata = {
10144 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
10145};
10146
10147static struct msm_board_data msm8x60_surf_board_data __initdata = {
10148 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
10149};
10150
10151static struct msm_board_data msm8x60_ffa_board_data __initdata = {
10152 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
10153};
10154
10155static struct msm_board_data msm8x60_fluid_board_data __initdata = {
10156 .gpiomux_cfgs = msm8x60_fluid_gpiomux_cfgs,
10157};
10158
10159static struct msm_board_data msm8x60_charm_surf_board_data __initdata = {
10160 .gpiomux_cfgs = msm8x60_charm_gpiomux_cfgs,
10161};
10162
10163static struct msm_board_data msm8x60_charm_ffa_board_data __initdata = {
10164 .gpiomux_cfgs = msm8x60_charm_gpiomux_cfgs,
10165};
10166
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010167static struct msm_board_data msm8x60_dragon_board_data __initdata = {
10168 .gpiomux_cfgs = msm8x60_dragon_gpiomux_cfgs,
10169};
10170
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010171static void __init msm8x60_init(struct msm_board_data *board_data)
10172{
10173 uint32_t soc_platform_version;
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010174#ifdef CONFIG_USB_EHCI_MSM_72K
10175 struct pm8xxx_mpp_config_data hsusb_phy_mpp = {
10176 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
10177 .level = PM8901_MPP_DIG_LEVEL_L5,
10178 .control = PM8XXX_MPP_DOUT_CTRL_HIGH,
10179 };
10180#endif
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010181 pmic_reset_irq = PM8058_IRQ_BASE + PM8058_RESOUT_IRQ;
Abhijeet Dharmapurikar6d565fd2011-09-15 18:49:56 -070010182
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010183 /*
10184 * Initialize RPM first as other drivers and devices may need
10185 * it for their initialization.
10186 */
Praveen Chidambaram78499012011-11-01 17:15:17 -060010187 BUG_ON(msm_rpm_init(&msm8660_rpm_data));
10188 BUG_ON(msm_rpmrs_levels_init(&msm_rpmrs_data));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010189 if (msm_xo_init())
10190 pr_err("Failed to initialize XO votes\n");
10191
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010192 msm8x60_check_2d_hardware();
10193
10194 /* Change SPM handling of core 1 if PMM 8160 is present. */
10195 soc_platform_version = socinfo_get_platform_version();
10196 if (SOCINFO_VERSION_MAJOR(soc_platform_version) == 1 &&
10197 SOCINFO_VERSION_MINOR(soc_platform_version) >= 2) {
10198 struct msm_spm_platform_data *spm_data;
10199
10200 spm_data = &msm_spm_data_v1[1];
10201 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] &= ~0x0F00UL;
10202 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] |= 0x0100UL;
10203
10204 spm_data = &msm_spm_data[1];
10205 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] &= ~0x0F00UL;
10206 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] |= 0x0100UL;
10207 }
10208
10209 /*
10210 * Initialize SPM before acpuclock as the latter calls into SPM
10211 * driver to set ACPU voltages.
10212 */
10213 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 1)
10214 msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
10215 else
10216 msm_spm_init(msm_spm_data_v1, ARRAY_SIZE(msm_spm_data_v1));
10217
10218 /*
10219 * Set regulators 8901_l4 and 8901_l6 to be always on in HPM for SURF
10220 * devices so that the RPM doesn't drop into a low power mode that an
10221 * un-reworked SURF cannot resume from.
10222 */
10223 if (machine_is_msm8x60_surf()) {
David Collins6f032ba2011-08-31 14:08:15 -070010224 int i;
10225
10226 for (i = 0; i < ARRAY_SIZE(rpm_regulator_init_data); i++)
10227 if (rpm_regulator_init_data[i].id
10228 == RPM_VREG_ID_PM8901_L4
10229 || rpm_regulator_init_data[i].id
10230 == RPM_VREG_ID_PM8901_L6)
10231 rpm_regulator_init_data[i]
10232 .init_data.constraints.always_on = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010233 }
10234
10235 /*
10236 * Disable regulator info printing so that regulator registration
10237 * messages do not enter the kmsg log.
10238 */
10239 regulator_suppress_info_printing();
10240
10241 /* Initialize regulators needed for clock_init. */
10242 platform_add_devices(early_regulators, ARRAY_SIZE(early_regulators));
10243
Stephen Boydbb600ae2011-08-02 20:11:40 -070010244 msm_clock_init(&msm8x60_clock_init_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010245
10246 /* Buses need to be initialized before early-device registration
10247 * to get the platform data for fabrics.
10248 */
10249 msm8x60_init_buses();
10250 platform_add_devices(early_devices, ARRAY_SIZE(early_devices));
10251 /* CPU frequency control is not supported on simulated targets. */
10252 if (!machine_is_msm8x60_rumi3() && !machine_is_msm8x60_sim())
Matt Wagantallec57f062011-08-16 23:54:46 -070010253 acpuclk_init(&acpuclk_8x60_soc_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010254
Terence Hampsonb36a38c2011-09-19 19:10:40 -040010255 /*
10256 * Enable EBI2 only for boards which make use of it. Leave
10257 * it disabled for all others for additional power savings.
10258 */
10259 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10260 machine_is_msm8x60_rumi3() ||
10261 machine_is_msm8x60_sim() ||
10262 machine_is_msm8x60_fluid() ||
10263 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010264 msm8x60_init_ebi2();
10265 msm8x60_init_tlmm();
10266 msm8x60_init_gpiomux(board_data->gpiomux_cfgs);
10267 msm8x60_init_uart12dm();
Kevin Chan3be11612012-03-22 20:05:40 -070010268#ifdef CONFIG_MSM_CAMERA_V4L2
10269 msm8x60_init_cam();
10270#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010271 msm8x60_init_mmc();
10272
Kevin Chan3be11612012-03-22 20:05:40 -070010273
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010274#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
10275 msm8x60_init_pm8058_othc();
10276#endif
10277
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010278 if (machine_is_msm8x60_fluid())
10279 pm8058_platform_data.keypad_pdata = &fluid_keypad_data;
10280 else if (machine_is_msm8x60_dragon())
10281 pm8058_platform_data.keypad_pdata = &dragon_keypad_data;
10282 else
10283 pm8058_platform_data.keypad_pdata = &ffa_keypad_data;
Kevin Chan3be11612012-03-22 20:05:40 -070010284#ifndef CONFIG_MSM_CAMERA_V4L2
Jilai Wang53d27a82011-07-13 14:32:58 -040010285 /* Specify reset pin for OV9726 */
10286 if (machine_is_msm8x60_dragon()) {
10287 msm_camera_sensor_ov9726_data.sensor_reset = 62;
10288 ov9726_sensor_8660_info.mount_angle = 270;
10289 }
Kevin Chan3be11612012-03-22 20:05:40 -070010290#endif
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010291#ifdef CONFIG_BATTERY_MSM8X60
10292 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10293 machine_is_msm8x60_fusion() || machine_is_msm8x60_dragon() ||
10294 machine_is_msm8x60_fusn_ffa() || machine_is_msm8x60_fluid())
10295 platform_device_register(&msm_charger_device);
10296#endif
10297
10298 if (machine_is_msm8x60_dragon())
10299 pm8058_platform_data.charger_pdata = &pmic8058_charger_dragon;
10300 if (!machine_is_msm8x60_fluid())
10301 pm8058_platform_data.charger_pdata = &pmic8058_charger_ffa_surf;
10302
10303 /* configure pmic leds */
10304 if (machine_is_msm8x60_fluid())
10305 pm8058_platform_data.leds_pdata = &pm8058_fluid_flash_leds_data;
10306 else if (machine_is_msm8x60_dragon())
10307 pm8058_platform_data.leds_pdata = &pm8058_dragon_leds_data;
10308 else
10309 pm8058_platform_data.leds_pdata = &pm8058_flash_leds_data;
10310
10311 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa() ||
10312 machine_is_msm8x60_dragon()) {
10313 pm8058_platform_data.vibrator_pdata = &pm8058_vib_pdata;
10314 }
10315
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010316 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10317 machine_is_msm8x60_fluid() || machine_is_msm8x60_fusion() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -040010318 machine_is_msm8x60_fusn_ffa() || machine_is_msm8x60_dragon()) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010319 msm8x60_cfg_smsc911x();
10320 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 1)
Matt Wagantall1f65d9d2012-04-25 14:24:20 -070010321 platform_add_devices(msm8660_footswitch,
10322 msm8660_num_footswitch);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010323 platform_add_devices(surf_devices,
10324 ARRAY_SIZE(surf_devices));
10325
10326#ifdef CONFIG_MSM_DSPS
10327 if (machine_is_msm8x60_fluid()) {
10328 platform_device_unregister(&msm_gsbi12_qup_i2c_device);
10329 msm8x60_init_dsps();
10330 }
10331#endif
10332
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010333 pm8901_vreg_mpp0_init();
10334
10335 platform_device_register(&msm8x60_8901_mpp_vreg);
10336
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010337#ifdef CONFIG_USB_EHCI_MSM_72K
10338 /*
10339 * Drive MPP2 pin HIGH for PHY to generate ID interrupts on 8660
10340 * fluid
10341 */
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010342 if (machine_is_msm8x60_fluid())
10343 pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1), &hsusb_phy_mpp);
10344 msm_add_host(0, &msm_usb_host_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010345#endif
Lei Zhou338cab82011-08-19 13:38:17 -040010346
10347#ifdef CONFIG_SND_SOC_MSM8660_APQ
10348 if (machine_is_msm8x60_dragon())
10349 platform_add_devices(dragon_alsa_devices,
10350 ARRAY_SIZE(dragon_alsa_devices));
10351 else
10352#endif
10353 platform_add_devices(asoc_devices,
10354 ARRAY_SIZE(asoc_devices));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010355 } else {
10356 msm8x60_configure_smc91x();
10357 platform_add_devices(rumi_sim_devices,
10358 ARRAY_SIZE(rumi_sim_devices));
10359 }
10360#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
Zhang Chang Ken6baadf02011-08-05 09:48:15 -040010361 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10362 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010363 msm8x60_cfg_isp1763();
10364#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010365
10366 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
10367 platform_add_devices(charm_devices, ARRAY_SIZE(charm_devices));
10368
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010369
10370#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
10371 if (machine_is_msm8x60_fluid())
10372 platform_device_register(&msm_gsbi10_qup_spi_device);
10373 else
10374 platform_device_register(&msm_gsbi1_qup_spi_device);
10375#endif
10376
10377#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
10378 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
10379 if (machine_is_msm8x60_fluid())
10380 cyttsp_set_params();
10381#endif
10382 if (!machine_is_msm8x60_sim())
10383 msm_fb_add_devices();
10384 fixup_i2c_configs();
10385 register_i2c_devices();
10386
Terence Hampson1c73fef2011-07-19 17:10:49 -040010387 if (machine_is_msm8x60_dragon())
10388 smsc911x_config.reset_gpio
10389 = GPIO_ETHERNET_RESET_N_DRAGON;
10390
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010391 platform_device_register(&smsc911x_device);
10392
10393#if (defined(CONFIG_SPI_QUP)) && \
10394 (defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -040010395 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA) || \
10396 defined(CONFIG_FB_MSM_LCDC_NT35582_WVGA))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010397
10398 if (machine_is_msm8x60_fluid()) {
10399#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
10400 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3) {
10401 spi_register_board_info(lcdc_samsung_spi_board_info,
10402 ARRAY_SIZE(lcdc_samsung_spi_board_info));
10403 } else
10404#endif
10405 {
10406#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
10407 spi_register_board_info(lcdc_auo_spi_board_info,
10408 ARRAY_SIZE(lcdc_auo_spi_board_info));
10409#endif
10410 }
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -040010411#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
10412 } else if (machine_is_msm8x60_dragon()) {
10413 spi_register_board_info(lcdc_nt35582_spi_board_info,
10414 ARRAY_SIZE(lcdc_nt35582_spi_board_info));
10415#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010416 }
10417#endif
10418
Maheshkumar Sivasubramanianc6c55032011-10-25 16:01:32 -060010419 BUG_ON(msm_pm_boot_init(&msm_pm_boot_pdata));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010420
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010421 pm8058_gpios_init();
10422
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010423#ifdef CONFIG_SENSORS_MSM_ADC
10424 if (machine_is_msm8x60_fluid()) {
10425 msm_adc_pdata.dev_names = msm_adc_fluid_device_names;
10426 msm_adc_pdata.num_adc = ARRAY_SIZE(msm_adc_fluid_device_names);
10427 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3)
10428 msm_adc_pdata.gpio_config = APROC_CONFIG;
10429 else
10430 msm_adc_pdata.gpio_config = MPROC_CONFIG;
10431 }
10432 msm_adc_pdata.target_hw = MSM_8x60;
10433#endif
10434#ifdef CONFIG_MSM8X60_AUDIO
10435 msm_snddev_init();
10436#endif
10437#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
10438 if (machine_is_msm8x60_fluid())
10439 platform_device_register(&fluid_leds_gpio);
10440 else
10441 platform_device_register(&gpio_leds);
10442#endif
10443
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010444 msm8x60_multi_sdio_init();
Laura Abbott5d2d1e62011-08-10 16:27:35 -070010445
10446 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
10447 msm_fusion_setup_pinctrl();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010448}
10449
10450static void __init msm8x60_rumi3_init(void)
10451{
10452 msm8x60_init(&msm8x60_rumi3_board_data);
10453}
10454
10455static void __init msm8x60_sim_init(void)
10456{
10457 msm8x60_init(&msm8x60_sim_board_data);
10458}
10459
10460static void __init msm8x60_surf_init(void)
10461{
10462 msm8x60_init(&msm8x60_surf_board_data);
10463}
10464
10465static void __init msm8x60_ffa_init(void)
10466{
10467 msm8x60_init(&msm8x60_ffa_board_data);
10468}
10469
10470static void __init msm8x60_fluid_init(void)
10471{
10472 msm8x60_init(&msm8x60_fluid_board_data);
10473}
10474
10475static void __init msm8x60_charm_surf_init(void)
10476{
10477 msm8x60_init(&msm8x60_charm_surf_board_data);
10478}
10479
10480static void __init msm8x60_charm_ffa_init(void)
10481{
10482 msm8x60_init(&msm8x60_charm_ffa_board_data);
10483}
10484
10485static void __init msm8x60_charm_init_early(void)
10486{
10487 msm8x60_allocate_memory_regions();
Steve Mucklea55df6e2010-01-07 12:43:24 -080010488}
10489
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010490static void __init msm8x60_dragon_init(void)
10491{
10492 msm8x60_init(&msm8x60_dragon_board_data);
10493}
10494
Steve Mucklea55df6e2010-01-07 12:43:24 -080010495MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
10496 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010497 .reserve = msm8x60_reserve,
Steve Mucklea55df6e2010-01-07 12:43:24 -080010498 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010499 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010500 .init_machine = msm8x60_rumi3_init,
Steve Mucklea55df6e2010-01-07 12:43:24 -080010501 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010502 .init_early = msm8x60_charm_init_early,
Steve Muckle49b76f72010-03-19 17:00:08 -070010503MACHINE_END
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010504
10505MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
10506 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010507 .reserve = msm8x60_reserve,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010508 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010509 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010510 .init_machine = msm8x60_sim_init,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010511 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010512 .init_early = msm8x60_charm_init_early,
10513MACHINE_END
10514
10515MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
10516 .map_io = msm8x60_map_io,
10517 .reserve = msm8x60_reserve,
10518 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010519 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010520 .init_machine = msm8x60_surf_init,
10521 .timer = &msm_timer,
10522 .init_early = msm8x60_charm_init_early,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010523MACHINE_END
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010524
10525MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
10526 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010527 .reserve = msm8x60_reserve,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010528 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010529 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010530 .init_machine = msm8x60_ffa_init,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010531 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010532 .init_early = msm8x60_charm_init_early,
10533MACHINE_END
10534
10535MACHINE_START(MSM8X60_FLUID, "QCT MSM8X60 FLUID")
10536 .map_io = msm8x60_map_io,
10537 .reserve = msm8x60_reserve,
10538 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010539 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010540 .init_machine = msm8x60_fluid_init,
10541 .timer = &msm_timer,
10542 .init_early = msm8x60_charm_init_early,
10543MACHINE_END
10544
10545MACHINE_START(MSM8X60_FUSION, "QCT MSM8X60 FUSION SURF")
10546 .map_io = msm8x60_map_io,
10547 .reserve = msm8x60_reserve,
10548 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010549 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010550 .init_machine = msm8x60_charm_surf_init,
10551 .timer = &msm_timer,
10552 .init_early = msm8x60_charm_init_early,
10553MACHINE_END
10554
10555MACHINE_START(MSM8X60_FUSN_FFA, "QCT MSM8X60 FUSION FFA")
10556 .map_io = msm8x60_map_io,
10557 .reserve = msm8x60_reserve,
10558 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010559 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010560 .init_machine = msm8x60_charm_ffa_init,
10561 .timer = &msm_timer,
10562 .init_early = msm8x60_charm_init_early,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010563MACHINE_END
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010564
10565MACHINE_START(MSM8X60_DRAGON, "QCT MSM8X60 DRAGON")
10566 .map_io = msm8x60_map_io,
10567 .reserve = msm8x60_reserve,
10568 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010569 .handle_irq = gic_handle_irq,
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010570 .init_machine = msm8x60_dragon_init,
10571 .timer = &msm_timer,
10572 .init_early = msm8x60_charm_init_early,
10573MACHINE_END