blob: b27debc2143268df36f301a927891d1602a61b19 [file] [log] [blame]
Kiran Kumar H Ndd128472011-12-01 09:35:34 -08001/* Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070013#ifndef __LINUX_MSM_CAMERA_H
14#define __LINUX_MSM_CAMERA_H
15
16#ifdef MSM_CAMERA_BIONIC
17#include <sys/types.h>
18#endif
19#include <linux/types.h>
20#include <linux/ioctl.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070021#ifdef __KERNEL__
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070022#include <linux/cdev.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070023#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070024#ifdef MSM_CAMERA_GCC
25#include <time.h>
26#else
27#include <linux/time.h>
28#endif
29
Ankit Premrajka3e90b9f2011-11-01 18:48:45 -070030#include <linux/ion.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070031
Nishant Pandit5dd54422012-06-26 22:52:44 +053032#define BIT(nr) (1UL << (nr))
33
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070034#define MSM_CAM_IOCTL_MAGIC 'm'
35
36#define MSM_CAM_IOCTL_GET_SENSOR_INFO \
37 _IOR(MSM_CAM_IOCTL_MAGIC, 1, struct msm_camsensor_info *)
38
39#define MSM_CAM_IOCTL_REGISTER_PMEM \
40 _IOW(MSM_CAM_IOCTL_MAGIC, 2, struct msm_pmem_info *)
41
42#define MSM_CAM_IOCTL_UNREGISTER_PMEM \
43 _IOW(MSM_CAM_IOCTL_MAGIC, 3, unsigned)
44
45#define MSM_CAM_IOCTL_CTRL_COMMAND \
46 _IOW(MSM_CAM_IOCTL_MAGIC, 4, struct msm_ctrl_cmd *)
47
48#define MSM_CAM_IOCTL_CONFIG_VFE \
49 _IOW(MSM_CAM_IOCTL_MAGIC, 5, struct msm_camera_vfe_cfg_cmd *)
50
51#define MSM_CAM_IOCTL_GET_STATS \
52 _IOR(MSM_CAM_IOCTL_MAGIC, 6, struct msm_camera_stats_event_ctrl *)
53
54#define MSM_CAM_IOCTL_GETFRAME \
55 _IOR(MSM_CAM_IOCTL_MAGIC, 7, struct msm_camera_get_frame *)
56
57#define MSM_CAM_IOCTL_ENABLE_VFE \
58 _IOW(MSM_CAM_IOCTL_MAGIC, 8, struct camera_enable_cmd *)
59
60#define MSM_CAM_IOCTL_CTRL_CMD_DONE \
61 _IOW(MSM_CAM_IOCTL_MAGIC, 9, struct camera_cmd *)
62
63#define MSM_CAM_IOCTL_CONFIG_CMD \
64 _IOW(MSM_CAM_IOCTL_MAGIC, 10, struct camera_cmd *)
65
66#define MSM_CAM_IOCTL_DISABLE_VFE \
67 _IOW(MSM_CAM_IOCTL_MAGIC, 11, struct camera_enable_cmd *)
68
69#define MSM_CAM_IOCTL_PAD_REG_RESET2 \
70 _IOW(MSM_CAM_IOCTL_MAGIC, 12, struct camera_enable_cmd *)
71
72#define MSM_CAM_IOCTL_VFE_APPS_RESET \
73 _IOW(MSM_CAM_IOCTL_MAGIC, 13, struct camera_enable_cmd *)
74
75#define MSM_CAM_IOCTL_RELEASE_FRAME_BUFFER \
76 _IOW(MSM_CAM_IOCTL_MAGIC, 14, struct camera_enable_cmd *)
77
78#define MSM_CAM_IOCTL_RELEASE_STATS_BUFFER \
79 _IOW(MSM_CAM_IOCTL_MAGIC, 15, struct msm_stats_buf *)
80
81#define MSM_CAM_IOCTL_AXI_CONFIG \
82 _IOW(MSM_CAM_IOCTL_MAGIC, 16, struct msm_camera_vfe_cfg_cmd *)
83
84#define MSM_CAM_IOCTL_GET_PICTURE \
85 _IOW(MSM_CAM_IOCTL_MAGIC, 17, struct msm_frame *)
86
87#define MSM_CAM_IOCTL_SET_CROP \
88 _IOW(MSM_CAM_IOCTL_MAGIC, 18, struct crop_info *)
89
90#define MSM_CAM_IOCTL_PICT_PP \
91 _IOW(MSM_CAM_IOCTL_MAGIC, 19, uint8_t *)
92
93#define MSM_CAM_IOCTL_PICT_PP_DONE \
94 _IOW(MSM_CAM_IOCTL_MAGIC, 20, struct msm_snapshot_pp_status *)
95
96#define MSM_CAM_IOCTL_SENSOR_IO_CFG \
97 _IOW(MSM_CAM_IOCTL_MAGIC, 21, struct sensor_cfg_data *)
98
99#define MSM_CAM_IOCTL_FLASH_LED_CFG \
100 _IOW(MSM_CAM_IOCTL_MAGIC, 22, unsigned *)
101
102#define MSM_CAM_IOCTL_UNBLOCK_POLL_FRAME \
103 _IO(MSM_CAM_IOCTL_MAGIC, 23)
104
105#define MSM_CAM_IOCTL_CTRL_COMMAND_2 \
106 _IOW(MSM_CAM_IOCTL_MAGIC, 24, struct msm_ctrl_cmd *)
107
108#define MSM_CAM_IOCTL_AF_CTRL \
109 _IOR(MSM_CAM_IOCTL_MAGIC, 25, struct msm_ctrl_cmt_t *)
110
111#define MSM_CAM_IOCTL_AF_CTRL_DONE \
112 _IOW(MSM_CAM_IOCTL_MAGIC, 26, struct msm_ctrl_cmt_t *)
113
114#define MSM_CAM_IOCTL_CONFIG_VPE \
115 _IOW(MSM_CAM_IOCTL_MAGIC, 27, struct msm_camera_vpe_cfg_cmd *)
116
117#define MSM_CAM_IOCTL_AXI_VPE_CONFIG \
118 _IOW(MSM_CAM_IOCTL_MAGIC, 28, struct msm_camera_vpe_cfg_cmd *)
119
120#define MSM_CAM_IOCTL_STROBE_FLASH_CFG \
121 _IOW(MSM_CAM_IOCTL_MAGIC, 29, uint32_t *)
122
123#define MSM_CAM_IOCTL_STROBE_FLASH_CHARGE \
124 _IOW(MSM_CAM_IOCTL_MAGIC, 30, uint32_t *)
125
126#define MSM_CAM_IOCTL_STROBE_FLASH_RELEASE \
127 _IO(MSM_CAM_IOCTL_MAGIC, 31)
128
129#define MSM_CAM_IOCTL_FLASH_CTRL \
130 _IOW(MSM_CAM_IOCTL_MAGIC, 32, struct flash_ctrl_data *)
131
132#define MSM_CAM_IOCTL_ERROR_CONFIG \
133 _IOW(MSM_CAM_IOCTL_MAGIC, 33, uint32_t *)
134
135#define MSM_CAM_IOCTL_ABORT_CAPTURE \
136 _IO(MSM_CAM_IOCTL_MAGIC, 34)
137
138#define MSM_CAM_IOCTL_SET_FD_ROI \
139 _IOW(MSM_CAM_IOCTL_MAGIC, 35, struct fd_roi_info *)
140
141#define MSM_CAM_IOCTL_GET_CAMERA_INFO \
142 _IOR(MSM_CAM_IOCTL_MAGIC, 36, struct msm_camera_info *)
143
144#define MSM_CAM_IOCTL_UNBLOCK_POLL_PIC_FRAME \
145 _IO(MSM_CAM_IOCTL_MAGIC, 37)
146
147#define MSM_CAM_IOCTL_RELEASE_PIC_BUFFER \
148 _IOW(MSM_CAM_IOCTL_MAGIC, 38, struct camera_enable_cmd *)
149
150#define MSM_CAM_IOCTL_PUT_ST_FRAME \
151 _IOW(MSM_CAM_IOCTL_MAGIC, 39, struct msm_camera_st_frame *)
152
Mansoor Aftab5d418372011-07-26 17:01:26 -0700153#define MSM_CAM_IOCTL_V4L2_EVT_NOTIFY \
Kevin Chan94b4c832012-03-02 21:27:16 -0800154 _IOR(MSM_CAM_IOCTL_MAGIC, 40, struct v4l2_event *)
Mansoor Aftab5d418372011-07-26 17:01:26 -0700155
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700156#define MSM_CAM_IOCTL_SET_MEM_MAP_INFO \
Kevin Chan94b4c832012-03-02 21:27:16 -0800157 _IOR(MSM_CAM_IOCTL_MAGIC, 41, struct msm_mem_map_info *)
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700158
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -0700159#define MSM_CAM_IOCTL_ACTUATOR_IO_CFG \
Kevin Chan94b4c832012-03-02 21:27:16 -0800160 _IOW(MSM_CAM_IOCTL_MAGIC, 42, struct msm_actuator_cfg_data *)
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -0700161
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700162#define MSM_CAM_IOCTL_MCTL_POST_PROC \
Kevin Chan94b4c832012-03-02 21:27:16 -0800163 _IOW(MSM_CAM_IOCTL_MAGIC, 43, struct msm_mctl_post_proc_cmd *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700164
165#define MSM_CAM_IOCTL_RESERVE_FREE_FRAME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800166 _IOW(MSM_CAM_IOCTL_MAGIC, 44, struct msm_cam_evt_divert_frame *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700167
168#define MSM_CAM_IOCTL_RELEASE_FREE_FRAME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800169 _IOR(MSM_CAM_IOCTL_MAGIC, 45, struct msm_cam_evt_divert_frame *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700170
Mingcheng Zhu8feaa3f2011-11-23 11:33:52 -0800171#define MSM_CAM_IOCTL_PICT_PP_DIVERT_DONE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800172 _IOR(MSM_CAM_IOCTL_MAGIC, 46, struct msm_pp_frame *)
Mingcheng Zhu8feaa3f2011-11-23 11:33:52 -0800173
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800174#define MSM_CAM_IOCTL_SENSOR_V4l2_S_CTRL \
Kevin Chan94b4c832012-03-02 21:27:16 -0800175 _IOR(MSM_CAM_IOCTL_MAGIC, 47, struct v4l2_control)
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800176
177#define MSM_CAM_IOCTL_SENSOR_V4l2_QUERY_CTRL \
Kevin Chan94b4c832012-03-02 21:27:16 -0800178 _IOR(MSM_CAM_IOCTL_MAGIC, 48, struct v4l2_queryctrl)
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800179
Guruprasad Gaonkar4c7758f2011-12-16 17:30:00 -0800180#define MSM_CAM_IOCTL_GET_KERNEL_SYSTEM_TIME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800181 _IOW(MSM_CAM_IOCTL_MAGIC, 49, struct timeval *)
Guruprasad Gaonkar4c7758f2011-12-16 17:30:00 -0800182
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800183#define MSM_CAM_IOCTL_SET_VFE_OUTPUT_TYPE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800184 _IOW(MSM_CAM_IOCTL_MAGIC, 50, uint32_t *)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800185
186#define MSM_CAM_IOCTL_MCTL_DIVERT_DONE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800187 _IOR(MSM_CAM_IOCTL_MAGIC, 51, struct msm_cam_evt_divert_frame *)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800188
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800189#define MSM_CAM_IOCTL_GET_ACTUATOR_INFO \
Kevin Chan94b4c832012-03-02 21:27:16 -0800190 _IOW(MSM_CAM_IOCTL_MAGIC, 52, struct msm_actuator_cfg_data *)
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800191
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700192#define MSM_CAM_IOCTL_EEPROM_IO_CFG \
193 _IOW(MSM_CAM_IOCTL_MAGIC, 53, struct msm_eeprom_cfg_data *)
194
Nishant Panditb2157c92012-04-25 01:09:28 +0530195#define MSM_CAM_IOCTL_ISPIF_IO_CFG \
196 _IOR(MSM_CAM_IOCTL_MAGIC, 54, struct ispif_cfg_data *)
197
Lakshmi Narayana Kalavala2db33842012-06-26 22:41:32 -0700198#define MSM_CAM_IOCTL_STATS_REQBUF \
199 _IOR(MSM_CAM_IOCTL_MAGIC, 55, struct msm_stats_reqbuf *)
200
201#define MSM_CAM_IOCTL_STATS_ENQUEUEBUF \
202 _IOR(MSM_CAM_IOCTL_MAGIC, 56, struct msm_stats_buf_info *)
203
204#define MSM_CAM_IOCTL_STATS_FLUSH_BUFQ \
205 _IOR(MSM_CAM_IOCTL_MAGIC, 57, struct msm_stats_flush_bufq *)
206
Ankit Premrajka4b3443f2012-06-11 14:06:31 -0700207#define MSM_CAM_IOCTL_SET_MCTL_SDEV \
208 _IOW(MSM_CAM_IOCTL_MAGIC, 58, struct msm_mctl_set_sdev_data *)
209
210#define MSM_CAM_IOCTL_UNSET_MCTL_SDEV \
211 _IOW(MSM_CAM_IOCTL_MAGIC, 59, struct msm_mctl_set_sdev_data *)
212
Kiran Kumar H N90785902012-07-05 13:59:38 -0700213#define MSM_CAM_IOCTL_GET_INST_HANDLE \
214 _IOR(MSM_CAM_IOCTL_MAGIC, 60, uint32_t *)
215
Lakshmi Narayana Kalavala58243db2012-07-24 00:06:27 -0700216#define MSM_CAM_IOCTL_STATS_UNREG_BUF \
217 _IOR(MSM_CAM_IOCTL_MAGIC, 61, struct msm_stats_flush_bufq *)
218
219
Lakshmi Narayana Kalavala2db33842012-06-26 22:41:32 -0700220struct msm_stats_reqbuf {
221 int num_buf; /* how many buffers requested */
222 int stats_type; /* stats type */
223};
224
225struct msm_stats_flush_bufq {
226 int stats_type; /* enum msm_stats_enum_type */
227};
228
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700229struct msm_mctl_pp_cmd {
230 int32_t id;
231 uint16_t length;
232 void *value;
233};
234
235struct msm_mctl_post_proc_cmd {
236 int32_t type;
237 struct msm_mctl_pp_cmd cmd;
238};
239
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700240#define MSM_CAMERA_LED_OFF 0
241#define MSM_CAMERA_LED_LOW 1
242#define MSM_CAMERA_LED_HIGH 2
Nishant Pandit474f2252011-07-23 23:17:56 +0530243#define MSM_CAMERA_LED_INIT 3
244#define MSM_CAMERA_LED_RELEASE 4
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700245
246#define MSM_CAMERA_STROBE_FLASH_NONE 0
247#define MSM_CAMERA_STROBE_FLASH_XENON 1
248
249#define MSM_MAX_CAMERA_SENSORS 5
250#define MAX_SENSOR_NAME 32
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800251#define MAX_CAM_NAME_SIZE 32
252#define MAX_ACT_MOD_NAME_SIZE 32
253#define MAX_ACT_NAME_SIZE 32
254#define NUM_ACTUATOR_DIR 2
255#define MAX_ACTUATOR_SCENARIO 8
256#define MAX_ACTUATOR_REGION 5
257#define MAX_ACTUATOR_INIT_SET 12
258#define MAX_ACTUATOR_TYPE_SIZE 32
259#define MAX_ACTUATOR_REG_TBL_SIZE 8
260
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700261
262#define MSM_MAX_CAMERA_CONFIGS 2
263
264#define PP_SNAP 0x01
265#define PP_RAW_SNAP ((0x01)<<1)
266#define PP_PREV ((0x01)<<2)
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800267#define PP_THUMB ((0x01)<<3)
268#define PP_MASK (PP_SNAP|PP_RAW_SNAP|PP_PREV|PP_THUMB)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700269
270#define MSM_CAM_CTRL_CMD_DONE 0
271#define MSM_CAM_SENSOR_VFE_CMD 1
272
Kiran Kumar H Nceea7622011-08-23 14:01:03 -0700273/* Should be same as VIDEO_MAX_PLANES in videodev2.h */
274#define MAX_PLANES 8
275
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700276/*****************************************************
277 * structure
278 *****************************************************/
279
280/* define five type of structures for userspace <==> kernel
281 * space communication:
282 * command 1 - 2 are from userspace ==> kernel
283 * command 3 - 4 are from kernel ==> userspace
284 *
285 * 1. control command: control command(from control thread),
286 * control status (from config thread);
287 */
288struct msm_ctrl_cmd {
289 uint16_t type;
290 uint16_t length;
291 void *value;
292 uint16_t status;
293 uint32_t timeout_ms;
294 int resp_fd; /* FIXME: to be used by the kernel, pass-through for now */
295 int vnode_id; /* video dev id. Can we overload resp_fd? */
Kevin Chan94b4c832012-03-02 21:27:16 -0800296 int queue_idx;
297 uint32_t evt_id;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700298 uint32_t stream_type; /* used to pass value to qcamera server */
Ankit Premrajkaf94bcc62011-08-22 15:23:53 -0700299 int config_ident; /*used as identifier for config node*/
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700300};
301
302struct msm_cam_evt_msg {
303 unsigned short type; /* 1 == event (RPC), 0 == message (adsp) */
304 unsigned short msg_id;
305 unsigned int len; /* size in, number of bytes out */
306 uint32_t frame_id;
307 void *data;
Ninad Mahimkaree55c192012-04-25 14:36:17 -0700308 struct timespec timestamp;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700309};
310
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700311struct msm_pp_frame_sp {
312 /* phy addr of the buffer */
313 unsigned long phy_addr;
314 uint32_t y_off;
315 uint32_t cbcr_off;
316 /* buffer length */
317 uint32_t length;
318 int32_t fd;
319 uint32_t addr_offset;
320 /* mapped addr */
321 unsigned long vaddr;
322};
323
324struct msm_pp_frame_mp {
325 /* phy addr of the plane */
326 unsigned long phy_addr;
327 /* offset of plane data */
328 uint32_t data_offset;
329 /* plane length */
330 uint32_t length;
331 int32_t fd;
332 uint32_t addr_offset;
333 /* mapped addr */
334 unsigned long vaddr;
335};
336
337struct msm_pp_frame {
338 uint32_t handle; /* stores vb cookie */
339 uint32_t frame_id;
Kevin Chan318d7cb2011-11-29 14:24:26 -0800340 unsigned short buf_idx;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700341 int path;
342 unsigned short image_type;
343 unsigned short num_planes; /* 1 for sp */
344 struct timeval timestamp;
345 union {
346 struct msm_pp_frame_sp sp;
347 struct msm_pp_frame_mp mp[MAX_PLANES];
348 };
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800349 int node_type;
Kiran Kumar H N90785902012-07-05 13:59:38 -0700350 uint32_t inst_handle;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700351};
352
Mingcheng Zhu49505502011-07-19 20:44:36 -0700353struct msm_cam_evt_divert_frame {
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700354 unsigned short image_mode;
355 unsigned short op_mode;
Mingcheng Zhu49505502011-07-19 20:44:36 -0700356 unsigned short inst_idx;
357 unsigned short node_idx;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700358 struct msm_pp_frame frame;
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700359 int do_pp;
Mingcheng Zhu49505502011-07-19 20:44:36 -0700360};
361
Kiran Kumar H N0b517802011-10-05 09:49:51 -0700362struct msm_mctl_pp_cmd_ack_event {
363 uint32_t cmd; /* VPE_CMD_ZOOM? */
364 int status; /* 0 done, < 0 err */
365 uint32_t cookie; /* daemon's cookie */
366};
367
368struct msm_mctl_pp_event_info {
369 int32_t event;
370 union {
371 struct msm_mctl_pp_cmd_ack_event ack;
372 };
373};
374
375struct msm_isp_event_ctrl {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700376 unsigned short resptype;
377 union {
378 struct msm_cam_evt_msg isp_msg;
379 struct msm_ctrl_cmd ctrl;
Kiran Kumar H N0b517802011-10-05 09:49:51 -0700380 struct msm_cam_evt_divert_frame div_frame;
381 struct msm_mctl_pp_event_info pp_event_info;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700382 } isp_data;
383};
384
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700385#define MSM_CAM_RESP_CTRL 0
386#define MSM_CAM_RESP_STAT_EVT_MSG 1
387#define MSM_CAM_RESP_STEREO_OP_1 2
388#define MSM_CAM_RESP_STEREO_OP_2 3
389#define MSM_CAM_RESP_V4L2 4
Mingcheng Zhu49505502011-07-19 20:44:36 -0700390#define MSM_CAM_RESP_DIV_FRAME_EVT_MSG 5
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700391#define MSM_CAM_RESP_DONE_EVENT 6
392#define MSM_CAM_RESP_MCTL_PP_EVENT 7
393#define MSM_CAM_RESP_MAX 8
Mingcheng Zhu49505502011-07-19 20:44:36 -0700394
Mingcheng Zhu270813a2011-08-10 17:23:18 -0700395#define MSM_CAM_APP_NOTIFY_EVENT 0
Kevin Chan4bb6ead2012-02-29 01:01:41 -0800396#define MSM_CAM_APP_NOTIFY_ERROR_EVENT 1
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700397
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700398/* this one is used to send ctrl/status up to config thread */
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700399
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700400struct msm_stats_event_ctrl {
401 /* 0 - ctrl_cmd from control thread,
402 * 1 - stats/event kernel,
403 * 2 - V4L control or read request */
404 int resptype;
405 int timeout_ms;
406 struct msm_ctrl_cmd ctrl_cmd;
407 /* struct vfe_event_t stats_event; */
408 struct msm_cam_evt_msg stats_event;
409};
410
411/* 2. config command: config command(from config thread); */
412struct msm_camera_cfg_cmd {
413 /* what to config:
414 * 1 - sensor config, 2 - vfe config */
415 uint16_t cfg_type;
416
417 /* sensor config type */
418 uint16_t cmd_type;
419 uint16_t queue;
420 uint16_t length;
421 void *value;
422};
423
424#define CMD_GENERAL 0
425#define CMD_AXI_CFG_OUT1 1
426#define CMD_AXI_CFG_SNAP_O1_AND_O2 2
427#define CMD_AXI_CFG_OUT2 3
428#define CMD_PICT_T_AXI_CFG 4
429#define CMD_PICT_M_AXI_CFG 5
430#define CMD_RAW_PICT_AXI_CFG 6
431
432#define CMD_FRAME_BUF_RELEASE 7
433#define CMD_PREV_BUF_CFG 8
434#define CMD_SNAP_BUF_RELEASE 9
435#define CMD_SNAP_BUF_CFG 10
436#define CMD_STATS_DISABLE 11
437#define CMD_STATS_AEC_AWB_ENABLE 12
438#define CMD_STATS_AF_ENABLE 13
439#define CMD_STATS_AEC_ENABLE 14
440#define CMD_STATS_AWB_ENABLE 15
441#define CMD_STATS_ENABLE 16
442
443#define CMD_STATS_AXI_CFG 17
444#define CMD_STATS_AEC_AXI_CFG 18
445#define CMD_STATS_AF_AXI_CFG 19
446#define CMD_STATS_AWB_AXI_CFG 20
447#define CMD_STATS_RS_AXI_CFG 21
448#define CMD_STATS_CS_AXI_CFG 22
449#define CMD_STATS_IHIST_AXI_CFG 23
450#define CMD_STATS_SKIN_AXI_CFG 24
451
452#define CMD_STATS_BUF_RELEASE 25
453#define CMD_STATS_AEC_BUF_RELEASE 26
454#define CMD_STATS_AF_BUF_RELEASE 27
455#define CMD_STATS_AWB_BUF_RELEASE 28
456#define CMD_STATS_RS_BUF_RELEASE 29
457#define CMD_STATS_CS_BUF_RELEASE 30
458#define CMD_STATS_IHIST_BUF_RELEASE 31
459#define CMD_STATS_SKIN_BUF_RELEASE 32
460
461#define UPDATE_STATS_INVALID 33
462#define CMD_AXI_CFG_SNAP_GEMINI 34
463#define CMD_AXI_CFG_SNAP 35
464#define CMD_AXI_CFG_PREVIEW 36
465#define CMD_AXI_CFG_VIDEO 37
466
467#define CMD_STATS_IHIST_ENABLE 38
468#define CMD_STATS_RS_ENABLE 39
469#define CMD_STATS_CS_ENABLE 40
470#define CMD_VPE 41
471#define CMD_AXI_CFG_VPE 42
472#define CMD_AXI_CFG_ZSL 43
473#define CMD_AXI_CFG_SNAP_VPE 44
474#define CMD_AXI_CFG_SNAP_THUMB_VPE 45
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -0700475
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530476#define CMD_CONFIG_PING_ADDR 46
477#define CMD_CONFIG_PONG_ADDR 47
478#define CMD_CONFIG_FREE_BUF_ADDR 48
479#define CMD_AXI_CFG_ZSL_ALL_CHNLS 49
480#define CMD_AXI_CFG_VIDEO_ALL_CHNLS 50
Suresh Vankadara055cb8e2012-01-18 00:50:04 +0530481#define CMD_VFE_BUFFER_RELEASE 51
Kevin Chancf264862012-04-19 19:10:38 -0700482#define CMD_VFE_PROCESS_IRQ 52
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -0700483#define CMD_STATS_BG_ENABLE 53
484#define CMD_STATS_BF_ENABLE 54
485#define CMD_STATS_BHIST_ENABLE 55
486#define CMD_STATS_BG_BUF_RELEASE 56
487#define CMD_STATS_BF_BUF_RELEASE 57
488#define CMD_STATS_BHIST_BUF_RELEASE 58
Peter Liud34791b2012-06-11 18:47:36 -0700489#define CMD_VFE_SOF_COUNT_UPDATE 59
490#define CMD_VFE_COUNT_SOF_ENABLE 60
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700491
Nishant Pandit5dd54422012-06-26 22:52:44 +0530492#define CMD_AXI_CFG_PRIM BIT(8)
493#define CMD_AXI_CFG_PRIM_ALL_CHNLS BIT(9)
494#define CMD_AXI_CFG_SEC BIT(10)
495#define CMD_AXI_CFG_SEC_ALL_CHNLS BIT(11)
496#define CMD_AXI_CFG_TERT1 BIT(12)
497#define CMD_AXI_CFG_TERT2 BIT(13)
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800498
Azam Sadiq Pasha Kapatrala Syed7c815182012-05-31 19:28:09 -0700499#define CMD_AXI_START 0xE1
500#define CMD_AXI_STOP 0xE2
Shuzhen Wang109c2112012-07-23 17:28:11 -0700501#define CMD_AXI_RESET 0xE3
Azam Sadiq Pasha Kapatrala Syed7c815182012-05-31 19:28:09 -0700502
Lakshmi Narayana Kalavalacd3d81e2012-07-31 13:04:03 -0700503
504#define AXI_CMD_PREVIEW BIT(0)
505#define AXI_CMD_CAPTURE BIT(1)
506#define AXI_CMD_RECORD BIT(2)
507#define AXI_CMD_ZSL BIT(3)
508#define AXI_CMD_RAW_CAPTURE BIT(4)
Lakshmi Narayana Kalavala3e8a1d12012-07-31 15:00:09 -0700509#define AXI_CMD_LIVESHOT BIT(5)
Lakshmi Narayana Kalavalacd3d81e2012-07-31 13:04:03 -0700510
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700511/* vfe config command: config command(from config thread)*/
512struct msm_vfe_cfg_cmd {
513 int cmd_type;
514 uint16_t length;
515 void *value;
516};
517
518struct msm_vpe_cfg_cmd {
519 int cmd_type;
520 uint16_t length;
521 void *value;
522};
523
524#define MAX_CAMERA_ENABLE_NAME_LEN 32
525struct camera_enable_cmd {
526 char name[MAX_CAMERA_ENABLE_NAME_LEN];
527};
528
529#define MSM_PMEM_OUTPUT1 0
530#define MSM_PMEM_OUTPUT2 1
531#define MSM_PMEM_OUTPUT1_OUTPUT2 2
532#define MSM_PMEM_THUMBNAIL 3
533#define MSM_PMEM_MAINIMG 4
534#define MSM_PMEM_RAW_MAINIMG 5
535#define MSM_PMEM_AEC_AWB 6
536#define MSM_PMEM_AF 7
537#define MSM_PMEM_AEC 8
538#define MSM_PMEM_AWB 9
539#define MSM_PMEM_RS 10
540#define MSM_PMEM_CS 11
541#define MSM_PMEM_IHIST 12
542#define MSM_PMEM_SKIN 13
543#define MSM_PMEM_VIDEO 14
544#define MSM_PMEM_PREVIEW 15
545#define MSM_PMEM_VIDEO_VPE 16
546#define MSM_PMEM_C2D 17
547#define MSM_PMEM_MAINIMG_VPE 18
548#define MSM_PMEM_THUMBNAIL_VPE 19
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -0700549#define MSM_PMEM_BAYER_GRID 20
550#define MSM_PMEM_BAYER_FOCUS 21
551#define MSM_PMEM_BAYER_HIST 22
552#define MSM_PMEM_MAX 23
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700553
554#define STAT_AEAW 0
555#define STAT_AEC 1
556#define STAT_AF 2
557#define STAT_AWB 3
558#define STAT_RS 4
559#define STAT_CS 5
560#define STAT_IHIST 6
561#define STAT_SKIN 7
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -0700562#define STAT_BG 8
563#define STAT_BF 9
564#define STAT_BHIST 10
565#define STAT_MAX 11
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700566
567#define FRAME_PREVIEW_OUTPUT1 0
568#define FRAME_PREVIEW_OUTPUT2 1
569#define FRAME_SNAPSHOT 2
570#define FRAME_THUMBNAIL 3
571#define FRAME_RAW_SNAPSHOT 4
572#define FRAME_MAX 5
573
Lakshmi Narayana Kalavala2db33842012-06-26 22:41:32 -0700574enum msm_stats_enum_type {
575 MSM_STATS_TYPE_AEC, /* legacy based AEC */
576 MSM_STATS_TYPE_AF, /* legacy based AF */
577 MSM_STATS_TYPE_AWB, /* legacy based AWB */
578 MSM_STATS_TYPE_RS, /* legacy based RS */
579 MSM_STATS_TYPE_CS, /* legacy based CS */
580 MSM_STATS_TYPE_IHIST, /* legacy based HIST */
581 MSM_STATS_TYPE_SKIN, /* legacy based SKIN */
582 MSM_STATS_TYPE_BG, /* Bayer Grids */
583 MSM_STATS_TYPE_BF, /* Bayer Focus */
584 MSM_STATS_TYPE_BHIST, /* Bayer Hist */
585 MSM_STATS_TYPE_AE_AW, /* legacy stats for vfe 2.x*/
586 MSM_STATS_TYPE_MAX /* MAX */
587};
588
589struct msm_stats_buf_info {
590 int type; /* msm_stats_enum_type */
591 int fd;
592 void *vaddr;
593 uint32_t offset;
594 uint32_t len;
595 uint32_t y_off;
596 uint32_t cbcr_off;
597 uint32_t planar0_off;
598 uint32_t planar1_off;
599 uint32_t planar2_off;
600 uint8_t active;
601 int buf_idx;
602};
603
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700604struct msm_pmem_info {
605 int type;
606 int fd;
607 void *vaddr;
608 uint32_t offset;
609 uint32_t len;
Kiran Kumar H N5a19c682011-07-23 11:34:34 -0700610 uint32_t y_off;
611 uint32_t cbcr_off;
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530612 uint32_t planar0_off;
613 uint32_t planar1_off;
614 uint32_t planar2_off;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700615 uint8_t active;
616};
617
618struct outputCfg {
619 uint32_t height;
620 uint32_t width;
621
622 uint32_t window_height_firstline;
623 uint32_t window_height_lastline;
624};
625
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800626#define VIDEO_NODE 0
627#define MCTL_NODE 1
628
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700629#define OUTPUT_1 0
630#define OUTPUT_2 1
631#define OUTPUT_1_AND_2 2 /* snapshot only */
632#define OUTPUT_1_AND_3 3 /* video */
633#define CAMIF_TO_AXI_VIA_OUTPUT_2 4
634#define OUTPUT_1_AND_CAMIF_TO_AXI_VIA_OUTPUT_2 5
635#define OUTPUT_2_AND_CAMIF_TO_AXI_VIA_OUTPUT_1 6
636#define OUTPUT_1_2_AND_3 7
Kiran Kumar H N4cff94a2011-10-17 11:37:33 -0700637#define OUTPUT_ALL_CHNLS 8
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530638#define OUTPUT_VIDEO_ALL_CHNLS 9
639#define OUTPUT_ZSL_ALL_CHNLS 10
640#define LAST_AXI_OUTPUT_MODE_ENUM = OUTPUT_ZSL_ALL_CHNLS
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700641
Nishant Pandit5dd54422012-06-26 22:52:44 +0530642#define OUTPUT_PRIM BIT(8)
643#define OUTPUT_PRIM_ALL_CHNLS BIT(9)
644#define OUTPUT_SEC BIT(10)
645#define OUTPUT_SEC_ALL_CHNLS BIT(11)
646#define OUTPUT_TERT1 BIT(12)
647#define OUTPUT_TERT2 BIT(13)
648
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800649
650
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700651#define MSM_FRAME_PREV_1 0
652#define MSM_FRAME_PREV_2 1
653#define MSM_FRAME_ENC 2
654
Nishant Pandit5dd54422012-06-26 22:52:44 +0530655#define OUTPUT_TYPE_P BIT(0)
656#define OUTPUT_TYPE_T BIT(1)
657#define OUTPUT_TYPE_S BIT(2)
658#define OUTPUT_TYPE_V BIT(3)
659#define OUTPUT_TYPE_L BIT(4)
660#define OUTPUT_TYPE_ST_L BIT(5)
661#define OUTPUT_TYPE_ST_R BIT(6)
662#define OUTPUT_TYPE_ST_D BIT(7)
663#define OUTPUT_TYPE_R BIT(8)
664#define OUTPUT_TYPE_R1 BIT(9)
665
666
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700667
668struct fd_roi_info {
669 void *info;
670 int info_len;
671};
672
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700673struct msm_mem_map_info {
674 uint32_t cookie;
675 uint32_t length;
Mingcheng Zhufe7abc02011-08-09 13:27:39 -0700676 uint32_t mem_type;
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700677};
678
Mingcheng Zhu49505502011-07-19 20:44:36 -0700679#define MSM_MEM_MMAP 0
680#define MSM_MEM_USERPTR 1
681#define MSM_PLANE_MAX 8
682#define MSM_PLANE_Y 0
683#define MSM_PLANE_UV 1
684
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700685struct msm_frame {
686 struct timespec ts;
687 int path;
688 int type;
689 unsigned long buffer;
690 uint32_t phy_offset;
Kiran Kumar H N5a19c682011-07-23 11:34:34 -0700691 uint32_t y_off;
692 uint32_t cbcr_off;
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530693 uint32_t planar0_off;
694 uint32_t planar1_off;
695 uint32_t planar2_off;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700696 int fd;
697
698 void *cropinfo;
699 int croplen;
700 uint32_t error_code;
701 struct fd_roi_info roi_info;
702 uint32_t frame_id;
703 int stcam_quality_ind;
704 uint32_t stcam_conv_value;
Ankit Premrajka3e90b9f2011-11-01 18:48:45 -0700705
706 struct ion_allocation_data ion_alloc;
707 struct ion_fd_data fd_data;
Ankit Premrajkae2c9c0b2012-06-07 17:18:25 -0700708 int ion_dev_fd;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700709};
710
711enum msm_st_frame_packing {
712 SIDE_BY_SIDE_HALF,
713 SIDE_BY_SIDE_FULL,
714 TOP_DOWN_HALF,
715 TOP_DOWN_FULL,
716};
717
718struct msm_st_crop {
719 uint32_t in_w;
720 uint32_t in_h;
721 uint32_t out_w;
722 uint32_t out_h;
723};
724
725struct msm_st_half {
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530726 uint32_t buf_p0_off;
727 uint32_t buf_p1_off;
728 uint32_t buf_p0_stride;
729 uint32_t buf_p1_stride;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700730 uint32_t pix_x_off;
731 uint32_t pix_y_off;
732 struct msm_st_crop stCropInfo;
733};
734
735struct msm_st_frame {
736 struct msm_frame buf_info;
737 int type;
738 enum msm_st_frame_packing packing;
739 struct msm_st_half L;
740 struct msm_st_half R;
741 int frame_id;
742};
743
744#define MSM_CAMERA_ERR_MASK (0xFFFFFFFF & 1)
745
746struct stats_buff {
747 unsigned long buff;
748 int fd;
749};
750
751struct msm_stats_buf {
Lakshmi Narayana Kalavala4ab97a92011-07-26 15:30:14 -0700752 uint8_t awb_ymin;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700753 struct stats_buff aec;
754 struct stats_buff awb;
755 struct stats_buff af;
756 struct stats_buff ihist;
757 struct stats_buff rs;
758 struct stats_buff cs;
759 struct stats_buff skin;
760 int type;
761 uint32_t status_bits;
762 unsigned long buffer;
763 int fd;
Ankit Premrajka073e0ca2012-03-06 12:26:08 -0800764 int length;
765 struct ion_handle *handle;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700766 uint32_t frame_id;
Lakshmi Narayana Kalavala2db33842012-06-26 22:41:32 -0700767 int buf_idx;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700768};
769#define MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT 0
770/* video capture mode in VIDIOC_S_PARM */
771#define MSM_V4L2_EXT_CAPTURE_MODE_PREVIEW \
772 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+1)
773/* extendedmode for video recording in VIDIOC_S_PARM */
774#define MSM_V4L2_EXT_CAPTURE_MODE_VIDEO \
775 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+2)
776/* extendedmode for the full size main image in VIDIOC_S_PARM */
777#define MSM_V4L2_EXT_CAPTURE_MODE_MAIN (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+3)
778/* extendedmode for the thumb nail image in VIDIOC_S_PARM */
779#define MSM_V4L2_EXT_CAPTURE_MODE_THUMBNAIL \
780 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+4)
781#define MSM_V4L2_EXT_CAPTURE_MODE_RAW \
782 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+5)
Nishant Pandit5dd54422012-06-26 22:52:44 +0530783#define MSM_V4L2_EXT_CAPTURE_MODE_RDI \
784 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+6)
785#define MSM_V4L2_EXT_CAPTURE_MODE_RDI1 \
786 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+7)
787#define MSM_V4L2_EXT_CAPTURE_MODE_RDI2 \
788 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+8)
Mingcheng Zhu96458e22012-08-07 21:45:43 -0700789#define MSM_V4L2_EXT_CAPTURE_MODE_AEC \
790 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+9)
791#define MSM_V4L2_EXT_CAPTURE_MODE_AWB \
792 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+10)
793#define MSM_V4L2_EXT_CAPTURE_MODE_AF \
794 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+11)
795#define MSM_V4L2_EXT_CAPTURE_MODE_IHIST \
796 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+12)
797#define MSM_V4L2_EXT_CAPTURE_MODE_CS \
798 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+13)
799#define MSM_V4L2_EXT_CAPTURE_MODE_RS \
800 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+14)
801#define MSM_V4L2_EXT_CAPTURE_MODE_MAX (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+15)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700802
803#define MSM_V4L2_PID_MOTION_ISO V4L2_CID_PRIVATE_BASE
804#define MSM_V4L2_PID_EFFECT (V4L2_CID_PRIVATE_BASE+1)
805#define MSM_V4L2_PID_HJR (V4L2_CID_PRIVATE_BASE+2)
806#define MSM_V4L2_PID_LED_MODE (V4L2_CID_PRIVATE_BASE+3)
807#define MSM_V4L2_PID_PREP_SNAPSHOT (V4L2_CID_PRIVATE_BASE+4)
808#define MSM_V4L2_PID_EXP_METERING (V4L2_CID_PRIVATE_BASE+5)
809#define MSM_V4L2_PID_ISO (V4L2_CID_PRIVATE_BASE+6)
810#define MSM_V4L2_PID_CAM_MODE (V4L2_CID_PRIVATE_BASE+7)
811#define MSM_V4L2_PID_LUMA_ADAPTATION (V4L2_CID_PRIVATE_BASE+8)
812#define MSM_V4L2_PID_BEST_SHOT (V4L2_CID_PRIVATE_BASE+9)
813#define MSM_V4L2_PID_FOCUS_MODE (V4L2_CID_PRIVATE_BASE+10)
814#define MSM_V4L2_PID_BL_DETECTION (V4L2_CID_PRIVATE_BASE+11)
815#define MSM_V4L2_PID_SNOW_DETECTION (V4L2_CID_PRIVATE_BASE+12)
816#define MSM_V4L2_PID_CTRL_CMD (V4L2_CID_PRIVATE_BASE+13)
817#define MSM_V4L2_PID_EVT_SUB_INFO (V4L2_CID_PRIVATE_BASE+14)
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700818#define MSM_V4L2_PID_STROBE_FLASH (V4L2_CID_PRIVATE_BASE+15)
Kiran Kumar H N90785902012-07-05 13:59:38 -0700819#define MSM_V4L2_PID_INST_HANDLE (V4L2_CID_PRIVATE_BASE+16)
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700820#define MSM_V4L2_PID_MMAP_INST (V4L2_CID_PRIVATE_BASE+17)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800821#define MSM_V4L2_PID_PP_PLANE_INFO (V4L2_CID_PRIVATE_BASE+18)
822#define MSM_V4L2_PID_MAX MSM_V4L2_PID_PP_PLANE_INFO
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700823
824/* camera operation mode for video recording - two frame output queues */
825#define MSM_V4L2_CAM_OP_DEFAULT 0
826/* camera operation mode for video recording - two frame output queues */
827#define MSM_V4L2_CAM_OP_PREVIEW (MSM_V4L2_CAM_OP_DEFAULT+1)
828/* camera operation mode for video recording - two frame output queues */
829#define MSM_V4L2_CAM_OP_VIDEO (MSM_V4L2_CAM_OP_DEFAULT+2)
830/* camera operation mode for standard shapshot - two frame output queues */
831#define MSM_V4L2_CAM_OP_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT+3)
832/* camera operation mode for zsl shapshot - three output queues */
833#define MSM_V4L2_CAM_OP_ZSL (MSM_V4L2_CAM_OP_DEFAULT+4)
834/* camera operation mode for raw snapshot - one frame output queue */
835#define MSM_V4L2_CAM_OP_RAW (MSM_V4L2_CAM_OP_DEFAULT+5)
Jignesh Mehta6cf8a742012-02-04 23:40:50 -0800836/* camera operation mode for jpeg snapshot - one frame output queue */
837#define MSM_V4L2_CAM_OP_JPEG_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT+6)
838
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700839
840#define MSM_V4L2_VID_CAP_TYPE 0
841#define MSM_V4L2_STREAM_ON 1
842#define MSM_V4L2_STREAM_OFF 2
843#define MSM_V4L2_SNAPSHOT 3
844#define MSM_V4L2_QUERY_CTRL 4
845#define MSM_V4L2_GET_CTRL 5
846#define MSM_V4L2_SET_CTRL 6
847#define MSM_V4L2_QUERY 7
848#define MSM_V4L2_GET_CROP 8
849#define MSM_V4L2_SET_CROP 9
850#define MSM_V4L2_OPEN 10
851#define MSM_V4L2_CLOSE 11
852#define MSM_V4L2_SET_CTRL_CMD 12
853#define MSM_V4L2_EVT_SUB_MASK 13
854#define MSM_V4L2_MAX 14
855#define V4L2_CAMERA_EXIT 43
856
857struct crop_info {
858 void *info;
859 int len;
860};
861
862struct msm_postproc {
863 int ftnum;
864 struct msm_frame fthumnail;
865 int fmnum;
866 struct msm_frame fmain;
867};
868
869struct msm_snapshot_pp_status {
870 void *status;
871};
872
873#define CFG_SET_MODE 0
874#define CFG_SET_EFFECT 1
875#define CFG_START 2
876#define CFG_PWR_UP 3
877#define CFG_PWR_DOWN 4
878#define CFG_WRITE_EXPOSURE_GAIN 5
879#define CFG_SET_DEFAULT_FOCUS 6
880#define CFG_MOVE_FOCUS 7
881#define CFG_REGISTER_TO_REAL_GAIN 8
882#define CFG_REAL_TO_REGISTER_GAIN 9
883#define CFG_SET_FPS 10
884#define CFG_SET_PICT_FPS 11
885#define CFG_SET_BRIGHTNESS 12
886#define CFG_SET_CONTRAST 13
887#define CFG_SET_ZOOM 14
888#define CFG_SET_EXPOSURE_MODE 15
889#define CFG_SET_WB 16
890#define CFG_SET_ANTIBANDING 17
891#define CFG_SET_EXP_GAIN 18
892#define CFG_SET_PICT_EXP_GAIN 19
893#define CFG_SET_LENS_SHADING 20
894#define CFG_GET_PICT_FPS 21
895#define CFG_GET_PREV_L_PF 22
896#define CFG_GET_PREV_P_PL 23
897#define CFG_GET_PICT_L_PF 24
898#define CFG_GET_PICT_P_PL 25
899#define CFG_GET_AF_MAX_STEPS 26
900#define CFG_GET_PICT_MAX_EXP_LC 27
901#define CFG_SEND_WB_INFO 28
902#define CFG_SENSOR_INIT 29
903#define CFG_GET_3D_CALI_DATA 30
904#define CFG_GET_CALIB_DATA 31
Kevin Chana980f392011-08-01 20:55:00 -0700905#define CFG_GET_OUTPUT_INFO 32
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700906#define CFG_GET_EEPROM_INFO 33
907#define CFG_GET_EEPROM_DATA 34
908#define CFG_SET_ACTUATOR_INFO 35
909#define CFG_GET_ACTUATOR_INFO 36
Su Liu6c3bb322012-02-14 02:15:05 +0530910/* TBD: QRD */
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700911#define CFG_SET_SATURATION 37
912#define CFG_SET_SHARPNESS 38
913#define CFG_SET_TOUCHAEC 39
914#define CFG_SET_AUTO_FOCUS 40
915#define CFG_SET_AUTOFLASH 41
916#define CFG_SET_EXPOSURE_COMPENSATION 42
917#define CFG_SET_ISO 43
Nishant Panditb2157c92012-04-25 01:09:28 +0530918#define CFG_START_STREAM 44
919#define CFG_STOP_STREAM 45
920#define CFG_GET_CSI_PARAMS 46
921#define CFG_MAX 47
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700922
923
924#define MOVE_NEAR 0
925#define MOVE_FAR 1
926
927#define SENSOR_PREVIEW_MODE 0
928#define SENSOR_SNAPSHOT_MODE 1
929#define SENSOR_RAW_SNAPSHOT_MODE 2
930#define SENSOR_HFR_60FPS_MODE 3
931#define SENSOR_HFR_90FPS_MODE 4
932#define SENSOR_HFR_120FPS_MODE 5
933
934#define SENSOR_QTR_SIZE 0
935#define SENSOR_FULL_SIZE 1
936#define SENSOR_QVGA_SIZE 2
937#define SENSOR_INVALID_SIZE 3
938
939#define CAMERA_EFFECT_OFF 0
940#define CAMERA_EFFECT_MONO 1
941#define CAMERA_EFFECT_NEGATIVE 2
942#define CAMERA_EFFECT_SOLARIZE 3
943#define CAMERA_EFFECT_SEPIA 4
944#define CAMERA_EFFECT_POSTERIZE 5
945#define CAMERA_EFFECT_WHITEBOARD 6
946#define CAMERA_EFFECT_BLACKBOARD 7
947#define CAMERA_EFFECT_AQUA 8
Yonggui Maoc0055a12011-09-29 19:31:47 -0700948#define CAMERA_EFFECT_EMBOSS 9
949#define CAMERA_EFFECT_SKETCH 10
950#define CAMERA_EFFECT_NEON 11
951#define CAMERA_EFFECT_MAX 12
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700952
Taniya Dasa9bdb012011-09-08 11:21:33 +0530953/* QRD */
954#define CAMERA_EFFECT_BW 10
955#define CAMERA_EFFECT_BLUISH 12
956#define CAMERA_EFFECT_REDDISH 13
957#define CAMERA_EFFECT_GREENISH 14
958
959/* QRD */
960#define CAMERA_ANTIBANDING_OFF 0
961#define CAMERA_ANTIBANDING_50HZ 2
962#define CAMERA_ANTIBANDING_60HZ 1
963#define CAMERA_ANTIBANDING_AUTO 3
964
965#define CAMERA_CONTRAST_LV0 0
966#define CAMERA_CONTRAST_LV1 1
967#define CAMERA_CONTRAST_LV2 2
968#define CAMERA_CONTRAST_LV3 3
969#define CAMERA_CONTRAST_LV4 4
970#define CAMERA_CONTRAST_LV5 5
971#define CAMERA_CONTRAST_LV6 6
972#define CAMERA_CONTRAST_LV7 7
973#define CAMERA_CONTRAST_LV8 8
974#define CAMERA_CONTRAST_LV9 9
975
976#define CAMERA_BRIGHTNESS_LV0 0
977#define CAMERA_BRIGHTNESS_LV1 1
978#define CAMERA_BRIGHTNESS_LV2 2
979#define CAMERA_BRIGHTNESS_LV3 3
980#define CAMERA_BRIGHTNESS_LV4 4
981#define CAMERA_BRIGHTNESS_LV5 5
982#define CAMERA_BRIGHTNESS_LV6 6
983#define CAMERA_BRIGHTNESS_LV7 7
984#define CAMERA_BRIGHTNESS_LV8 8
985
986
987#define CAMERA_SATURATION_LV0 0
988#define CAMERA_SATURATION_LV1 1
989#define CAMERA_SATURATION_LV2 2
990#define CAMERA_SATURATION_LV3 3
991#define CAMERA_SATURATION_LV4 4
992#define CAMERA_SATURATION_LV5 5
993#define CAMERA_SATURATION_LV6 6
994#define CAMERA_SATURATION_LV7 7
995#define CAMERA_SATURATION_LV8 8
996
997#define CAMERA_SHARPNESS_LV0 0
998#define CAMERA_SHARPNESS_LV1 3
999#define CAMERA_SHARPNESS_LV2 6
1000#define CAMERA_SHARPNESS_LV3 9
1001#define CAMERA_SHARPNESS_LV4 12
1002#define CAMERA_SHARPNESS_LV5 15
1003#define CAMERA_SHARPNESS_LV6 18
1004#define CAMERA_SHARPNESS_LV7 21
1005#define CAMERA_SHARPNESS_LV8 24
1006#define CAMERA_SHARPNESS_LV9 27
1007#define CAMERA_SHARPNESS_LV10 30
1008
1009#define CAMERA_SETAE_AVERAGE 0
1010#define CAMERA_SETAE_CENWEIGHT 1
1011
Taniya Dasa9bdb012011-09-08 11:21:33 +05301012#define CAMERA_WB_AUTO 1 /* This list must match aeecamera.h */
1013#define CAMERA_WB_CUSTOM 2
1014#define CAMERA_WB_INCANDESCENT 3
1015#define CAMERA_WB_FLUORESCENT 4
1016#define CAMERA_WB_DAYLIGHT 5
1017#define CAMERA_WB_CLOUDY_DAYLIGHT 6
1018#define CAMERA_WB_TWILIGHT 7
1019#define CAMERA_WB_SHADE 8
1020
1021#define CAMERA_EXPOSURE_COMPENSATION_LV0 12
1022#define CAMERA_EXPOSURE_COMPENSATION_LV1 6
1023#define CAMERA_EXPOSURE_COMPENSATION_LV2 0
1024#define CAMERA_EXPOSURE_COMPENSATION_LV3 -6
1025#define CAMERA_EXPOSURE_COMPENSATION_LV4 -12
1026
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001027enum msm_v4l2_saturation_level {
1028 MSM_V4L2_SATURATION_L0,
1029 MSM_V4L2_SATURATION_L1,
1030 MSM_V4L2_SATURATION_L2,
1031 MSM_V4L2_SATURATION_L3,
1032 MSM_V4L2_SATURATION_L4,
1033 MSM_V4L2_SATURATION_L5,
1034 MSM_V4L2_SATURATION_L6,
1035 MSM_V4L2_SATURATION_L7,
1036 MSM_V4L2_SATURATION_L8,
1037 MSM_V4L2_SATURATION_L9,
1038 MSM_V4L2_SATURATION_L10,
1039};
1040
Suresh Vankadara212d9722012-05-30 15:51:20 +05301041enum msm_v4l2_contrast_level {
1042 MSM_V4L2_CONTRAST_L0,
1043 MSM_V4L2_CONTRAST_L1,
1044 MSM_V4L2_CONTRAST_L2,
1045 MSM_V4L2_CONTRAST_L3,
1046 MSM_V4L2_CONTRAST_L4,
1047 MSM_V4L2_CONTRAST_L5,
1048 MSM_V4L2_CONTRAST_L6,
1049 MSM_V4L2_CONTRAST_L7,
1050 MSM_V4L2_CONTRAST_L8,
1051 MSM_V4L2_CONTRAST_L9,
1052 MSM_V4L2_CONTRAST_L10,
1053};
1054
1055
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001056enum msm_v4l2_exposure_level {
1057 MSM_V4L2_EXPOSURE_N2,
1058 MSM_V4L2_EXPOSURE_N1,
1059 MSM_V4L2_EXPOSURE_D,
1060 MSM_V4L2_EXPOSURE_P1,
1061 MSM_V4L2_EXPOSURE_P2,
1062};
1063
1064enum msm_v4l2_sharpness_level {
1065 MSM_V4L2_SHARPNESS_L0,
1066 MSM_V4L2_SHARPNESS_L1,
1067 MSM_V4L2_SHARPNESS_L2,
1068 MSM_V4L2_SHARPNESS_L3,
1069 MSM_V4L2_SHARPNESS_L4,
1070 MSM_V4L2_SHARPNESS_L5,
1071 MSM_V4L2_SHARPNESS_L6,
1072};
1073
1074enum msm_v4l2_expo_metering_mode {
1075 MSM_V4L2_EXP_FRAME_AVERAGE,
1076 MSM_V4L2_EXP_CENTER_WEIGHTED,
1077 MSM_V4L2_EXP_SPOT_METERING,
1078};
1079
1080enum msm_v4l2_iso_mode {
1081 MSM_V4L2_ISO_AUTO = 0,
1082 MSM_V4L2_ISO_DEBLUR,
1083 MSM_V4L2_ISO_100,
1084 MSM_V4L2_ISO_200,
1085 MSM_V4L2_ISO_400,
1086 MSM_V4L2_ISO_800,
1087 MSM_V4L2_ISO_1600,
1088};
1089
1090enum msm_v4l2_wb_mode {
Suresh Vankadara212d9722012-05-30 15:51:20 +05301091 MSM_V4L2_WB_OFF,
1092 MSM_V4L2_WB_AUTO ,
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001093 MSM_V4L2_WB_CUSTOM,
1094 MSM_V4L2_WB_INCANDESCENT,
1095 MSM_V4L2_WB_FLUORESCENT,
1096 MSM_V4L2_WB_DAYLIGHT,
1097 MSM_V4L2_WB_CLOUDY_DAYLIGHT,
Suresh Vankadara212d9722012-05-30 15:51:20 +05301098};
1099
1100enum msm_v4l2_special_effect {
1101 MSM_V4L2_EFFECT_OFF,
1102 MSM_V4L2_EFFECT_MONO,
1103 MSM_V4L2_EFFECT_NEGATIVE,
1104 MSM_V4L2_EFFECT_SOLARIZE,
1105 MSM_V4L2_EFFECT_SEPIA,
1106 MSM_V4L2_EFFECT_POSTERAIZE,
1107 MSM_V4L2_EFFECT_WHITEBOARD,
1108 MSM_V4L2_EFFECT_BLACKBOARD,
1109 MSM_V4L2_EFFECT_AQUA,
1110 MSM_V4L2_EFFECT_EMBOSS,
1111 MSM_V4L2_EFFECT_SKETCH,
1112 MSM_V4L2_EFFECT_NEON,
1113 MSM_V4L2_EFFECT_MAX,
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001114};
1115
1116enum msm_v4l2_power_line_frequency {
1117 MSM_V4L2_POWER_LINE_OFF,
1118 MSM_V4L2_POWER_LINE_60HZ,
1119 MSM_V4L2_POWER_LINE_50HZ,
1120 MSM_V4L2_POWER_LINE_AUTO,
1121};
Taniya Dasa9bdb012011-09-08 11:21:33 +05301122
Su Liu6c3bb322012-02-14 02:15:05 +05301123#define CAMERA_ISO_TYPE_AUTO 0
1124#define CAMEAR_ISO_TYPE_HJR 1
1125#define CAMEAR_ISO_TYPE_100 2
1126#define CAMERA_ISO_TYPE_200 3
1127#define CAMERA_ISO_TYPE_400 4
1128#define CAMEAR_ISO_TYPE_800 5
1129#define CAMERA_ISO_TYPE_1600 6
1130
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001131struct sensor_pict_fps {
1132 uint16_t prevfps;
1133 uint16_t pictfps;
1134};
1135
1136struct exp_gain_cfg {
1137 uint16_t gain;
1138 uint32_t line;
1139};
1140
1141struct focus_cfg {
1142 int32_t steps;
1143 int dir;
1144};
1145
1146struct fps_cfg {
1147 uint16_t f_mult;
1148 uint16_t fps_div;
1149 uint32_t pict_fps_div;
1150};
1151struct wb_info_cfg {
1152 uint16_t red_gain;
1153 uint16_t green_gain;
1154 uint16_t blue_gain;
1155};
1156struct sensor_3d_exp_cfg {
1157 uint16_t gain;
1158 uint32_t line;
1159 uint16_t r_gain;
1160 uint16_t b_gain;
1161 uint16_t gr_gain;
1162 uint16_t gb_gain;
1163 uint16_t gain_adjust;
1164};
1165struct sensor_3d_cali_data_t{
1166 unsigned char left_p_matrix[3][4][8];
1167 unsigned char right_p_matrix[3][4][8];
1168 unsigned char square_len[8];
1169 unsigned char focal_len[8];
1170 unsigned char pixel_pitch[8];
1171 uint16_t left_r;
1172 uint16_t left_b;
1173 uint16_t left_gb;
1174 uint16_t left_af_far;
1175 uint16_t left_af_mid;
1176 uint16_t left_af_short;
1177 uint16_t left_af_5um;
1178 uint16_t left_af_50up;
1179 uint16_t left_af_50down;
1180 uint16_t right_r;
1181 uint16_t right_b;
1182 uint16_t right_gb;
1183 uint16_t right_af_far;
1184 uint16_t right_af_mid;
1185 uint16_t right_af_short;
1186 uint16_t right_af_5um;
1187 uint16_t right_af_50up;
1188 uint16_t right_af_50down;
1189};
1190struct sensor_init_cfg {
1191 uint8_t prev_res;
1192 uint8_t pict_res;
1193};
1194
1195struct sensor_calib_data {
1196 /* Color Related Measurements */
1197 uint16_t r_over_g;
1198 uint16_t b_over_g;
1199 uint16_t gr_over_gb;
1200
1201 /* Lens Related Measurements */
1202 uint16_t macro_2_inf;
1203 uint16_t inf_2_macro;
1204 uint16_t stroke_amt;
1205 uint16_t af_pos_1m;
1206 uint16_t af_pos_inf;
1207};
1208
Kevin Chana980f392011-08-01 20:55:00 -07001209enum msm_sensor_resolution_t {
Kevin Chan36e2bdc2011-08-30 17:21:21 -07001210 MSM_SENSOR_RES_FULL,
1211 MSM_SENSOR_RES_QTR,
Kevin Chana980f392011-08-01 20:55:00 -07001212 MSM_SENSOR_RES_2,
1213 MSM_SENSOR_RES_3,
1214 MSM_SENSOR_RES_4,
1215 MSM_SENSOR_RES_5,
1216 MSM_SENSOR_RES_6,
1217 MSM_SENSOR_RES_7,
1218 MSM_SENSOR_INVALID_RES,
1219};
1220
1221struct msm_sensor_output_info_t {
1222 uint16_t x_output;
1223 uint16_t y_output;
1224 uint16_t line_length_pclk;
1225 uint16_t frame_length_lines;
Kevin Chane30d3692011-10-14 16:11:01 -07001226 uint32_t vt_pixel_clk;
1227 uint32_t op_pixel_clk;
Kevin Chan272f6602011-10-18 14:20:03 -07001228 uint16_t binning_factor;
Kevin Chana980f392011-08-01 20:55:00 -07001229};
1230
1231struct sensor_output_info_t {
1232 struct msm_sensor_output_info_t *output_info;
1233 uint16_t num_info;
1234};
1235
Taniya Dasa9bdb012011-09-08 11:21:33 +05301236struct mirror_flip {
1237 int32_t x_mirror;
1238 int32_t y_flip;
1239};
1240
1241struct cord {
1242 uint32_t x;
1243 uint32_t y;
1244};
1245
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001246struct msm_eeprom_data_t {
1247 void *eeprom_data;
1248 uint16_t index;
1249};
1250
Nishant Panditb2157c92012-04-25 01:09:28 +05301251struct msm_camera_csid_vc_cfg {
1252 uint8_t cid;
1253 uint8_t dt;
1254 uint8_t decode_format;
1255};
1256
1257struct csi_lane_params_t {
1258 uint8_t csi_lane_assign;
1259 uint8_t csi_lane_mask;
1260 uint8_t csi_if;
1261 uint8_t csid_core;
1262 uint32_t csid_version;
1263};
1264
1265#define CSI_EMBED_DATA 0x12
1266#define CSI_RESERVED_DATA_0 0x13
1267#define CSI_YUV422_8 0x1E
1268#define CSI_RAW8 0x2A
1269#define CSI_RAW10 0x2B
1270#define CSI_RAW12 0x2C
1271
1272#define CSI_DECODE_6BIT 0
1273#define CSI_DECODE_8BIT 1
1274#define CSI_DECODE_10BIT 2
1275#define CSI_DECODE_DPCM_10_8_10 5
1276
Sreesudhan Ramakrish Ramkumard8123212012-06-30 13:15:27 -07001277#define ISPIF_STREAM(intf, action, vfe) (((intf)<<ISPIF_S_STREAM_SHIFT)+\
1278 (action)+((vfe)<<ISPIF_VFE_INTF_SHIFT))
1279#define ISPIF_ON_FRAME_BOUNDARY (0x01 << 0)
1280#define ISPIF_OFF_FRAME_BOUNDARY (0x01 << 1)
1281#define ISPIF_OFF_IMMEDIATELY (0x01 << 2)
1282#define ISPIF_S_STREAM_SHIFT 4
1283#define ISPIF_VFE_INTF_SHIFT 12
Nishant Panditb2157c92012-04-25 01:09:28 +05301284
1285#define PIX_0 (0x01 << 0)
1286#define RDI_0 (0x01 << 1)
1287#define PIX_1 (0x01 << 2)
1288#define RDI_1 (0x01 << 3)
Sreesudhan Ramakrish Ramkumard8123212012-06-30 13:15:27 -07001289#define RDI_2 (0x01 << 4)
Nishant Panditb2157c92012-04-25 01:09:28 +05301290
Sreesudhan Ramakrish Ramkumard8123212012-06-30 13:15:27 -07001291enum msm_ispif_vfe_intf {
1292 VFE0,
1293 VFE1,
1294 VFE_MAX,
1295};
Nishant Panditb2157c92012-04-25 01:09:28 +05301296
1297enum msm_ispif_intftype {
1298 PIX0,
1299 RDI0,
1300 PIX1,
1301 RDI1,
Nishant Panditb2157c92012-04-25 01:09:28 +05301302 RDI2,
1303 INTF_MAX,
1304};
1305
1306enum msm_ispif_vc {
1307 VC0,
1308 VC1,
1309 VC2,
1310 VC3,
1311};
1312
1313enum msm_ispif_cid {
1314 CID0,
1315 CID1,
1316 CID2,
1317 CID3,
1318 CID4,
1319 CID5,
1320 CID6,
1321 CID7,
1322 CID8,
1323 CID9,
1324 CID10,
1325 CID11,
1326 CID12,
1327 CID13,
1328 CID14,
1329 CID15,
1330};
1331
1332struct msm_ispif_params {
1333 uint8_t intftype;
1334 uint16_t cid_mask;
1335 uint8_t csid;
Sreesudhan Ramakrish Ramkumard8123212012-06-30 13:15:27 -07001336 uint8_t vfe_intf;
Nishant Panditb2157c92012-04-25 01:09:28 +05301337};
1338
1339struct msm_ispif_params_list {
1340 uint32_t len;
1341 struct msm_ispif_params params[4];
1342};
1343
1344enum ispif_cfg_type_t {
1345 ISPIF_INIT,
1346 ISPIF_SET_CFG,
1347 ISPIF_SET_ON_FRAME_BOUNDARY,
1348 ISPIF_SET_OFF_FRAME_BOUNDARY,
1349 ISPIF_SET_OFF_IMMEDIATELY,
1350 ISPIF_RELEASE,
1351};
1352
1353struct ispif_cfg_data {
1354 enum ispif_cfg_type_t cfgtype;
1355 union {
1356 uint32_t csid_version;
1357 int cmd;
1358 struct msm_ispif_params_list ispif_params;
1359 } cfg;
1360};
1361
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001362struct sensor_cfg_data {
1363 int cfgtype;
1364 int mode;
1365 int rs;
1366 uint8_t max_steps;
1367
1368 union {
1369 int8_t effect;
1370 uint8_t lens_shading;
1371 uint16_t prevl_pf;
1372 uint16_t prevp_pl;
1373 uint16_t pictl_pf;
1374 uint16_t pictp_pl;
1375 uint32_t pict_max_exp_lc;
1376 uint16_t p_fps;
Su Liu6c3bb322012-02-14 02:15:05 +05301377 uint8_t iso_type;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001378 struct sensor_init_cfg init_info;
1379 struct sensor_pict_fps gfps;
1380 struct exp_gain_cfg exp_gain;
1381 struct focus_cfg focus;
1382 struct fps_cfg fps;
1383 struct wb_info_cfg wb_info;
1384 struct sensor_3d_exp_cfg sensor_3d_exp;
1385 struct sensor_calib_data calib_info;
Kevin Chana980f392011-08-01 20:55:00 -07001386 struct sensor_output_info_t output_info;
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001387 struct msm_eeprom_data_t eeprom_data;
Nishant Panditb2157c92012-04-25 01:09:28 +05301388 struct csi_lane_params_t csi_lane_params;
Taniya Dasa9bdb012011-09-08 11:21:33 +05301389 /* QRD */
1390 uint16_t antibanding;
1391 uint8_t contrast;
1392 uint8_t saturation;
1393 uint8_t sharpness;
1394 int8_t brightness;
1395 int ae_mode;
1396 uint8_t wb_val;
1397 int8_t exp_compensation;
1398 struct cord aec_cord;
1399 int is_autoflash;
1400 struct mirror_flip mirror_flip;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001401 } cfg;
1402};
1403
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001404struct damping_params_t {
1405 uint32_t damping_step;
1406 uint32_t damping_delay;
1407 uint32_t hw_params;
1408};
1409
1410enum actuator_type {
1411 ACTUATOR_VCM,
1412 ACTUATOR_PIEZO,
1413};
1414
1415enum msm_actuator_data_type {
1416 MSM_ACTUATOR_BYTE_DATA = 1,
1417 MSM_ACTUATOR_WORD_DATA,
1418};
1419
1420enum msm_actuator_addr_type {
1421 MSM_ACTUATOR_BYTE_ADDR = 1,
1422 MSM_ACTUATOR_WORD_ADDR,
1423};
1424
1425enum msm_actuator_write_type {
1426 MSM_ACTUATOR_WRITE_HW_DAMP,
1427 MSM_ACTUATOR_WRITE_DAC,
1428};
1429
1430struct msm_actuator_reg_params_t {
1431 enum msm_actuator_write_type reg_write_type;
1432 uint32_t hw_mask;
1433 uint16_t reg_addr;
1434 uint16_t hw_shift;
1435 uint16_t data_shift;
1436};
1437
1438struct reg_settings_t {
1439 uint16_t reg_addr;
1440 uint16_t reg_data;
1441};
1442
1443struct region_params_t {
1444 /* [0] = ForwardDirection Macro boundary
1445 [1] = ReverseDirection Inf boundary
1446 */
1447 uint16_t step_bound[2];
1448 uint16_t code_per_step;
1449};
1450
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001451struct msm_actuator_move_params_t {
1452 int8_t dir;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001453 int8_t sign_dir;
1454 int16_t dest_step_pos;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001455 int32_t num_steps;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001456 struct damping_params_t *ringing_params;
1457};
1458
1459struct msm_actuator_tuning_params_t {
1460 int16_t initial_code;
1461 uint16_t pwd_step;
1462 uint16_t region_size;
1463 uint32_t total_steps;
1464 struct region_params_t *region_params;
1465};
1466
1467struct msm_actuator_params_t {
1468 enum actuator_type act_type;
1469 uint8_t reg_tbl_size;
1470 uint16_t data_size;
1471 uint16_t init_setting_size;
1472 uint32_t i2c_addr;
1473 enum msm_actuator_addr_type i2c_addr_type;
1474 enum msm_actuator_data_type i2c_data_type;
1475 struct msm_actuator_reg_params_t *reg_tbl_params;
1476 struct reg_settings_t *init_settings;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001477};
1478
1479struct msm_actuator_set_info_t {
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001480 struct msm_actuator_params_t actuator_params;
1481 struct msm_actuator_tuning_params_t af_tuning_params;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001482};
1483
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001484struct msm_actuator_get_info_t {
1485 uint32_t focal_length_num;
1486 uint32_t focal_length_den;
1487 uint32_t f_number_num;
1488 uint32_t f_number_den;
1489 uint32_t f_pix_num;
1490 uint32_t f_pix_den;
1491 uint32_t total_f_dist_num;
1492 uint32_t total_f_dist_den;
Jeyaprakash Soundrapandian04592002012-02-08 10:29:50 -08001493 uint32_t hor_view_angle_num;
1494 uint32_t hor_view_angle_den;
1495 uint32_t ver_view_angle_num;
1496 uint32_t ver_view_angle_den;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001497};
1498
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001499enum af_camera_name {
1500 ACTUATOR_MAIN_CAM_0,
1501 ACTUATOR_MAIN_CAM_1,
1502 ACTUATOR_MAIN_CAM_2,
1503 ACTUATOR_MAIN_CAM_3,
1504 ACTUATOR_MAIN_CAM_4,
1505 ACTUATOR_MAIN_CAM_5,
1506 ACTUATOR_WEB_CAM_0,
1507 ACTUATOR_WEB_CAM_1,
1508 ACTUATOR_WEB_CAM_2,
1509};
1510
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001511struct msm_actuator_cfg_data {
1512 int cfgtype;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001513 uint8_t is_af_supported;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001514 union {
1515 struct msm_actuator_move_params_t move;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001516 struct msm_actuator_set_info_t set_info;
1517 struct msm_actuator_get_info_t get_info;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001518 enum af_camera_name cam_name;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001519 } cfg;
1520};
1521
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001522struct msm_eeprom_support {
1523 uint16_t is_supported;
1524 uint16_t size;
1525 uint16_t index;
1526 uint16_t qvalue;
1527};
1528
1529struct msm_calib_wb {
1530 uint16_t r_over_g;
1531 uint16_t b_over_g;
1532 uint16_t gr_over_gb;
1533};
1534
1535struct msm_calib_af {
1536 uint16_t macro_dac;
1537 uint16_t inf_dac;
1538 uint16_t start_dac;
1539};
1540
1541struct msm_calib_lsc {
1542 uint16_t r_gain[221];
1543 uint16_t b_gain[221];
1544 uint16_t gr_gain[221];
1545 uint16_t gb_gain[221];
1546};
1547
1548struct pixel_t {
1549 int x;
1550 int y;
1551};
1552
1553struct msm_calib_dpc {
1554 uint16_t validcount;
1555 struct pixel_t snapshot_coord[128];
1556 struct pixel_t preview_coord[128];
1557 struct pixel_t video_coord[128];
1558};
1559
1560struct msm_camera_eeprom_info_t {
1561 struct msm_eeprom_support af;
1562 struct msm_eeprom_support wb;
1563 struct msm_eeprom_support lsc;
1564 struct msm_eeprom_support dpc;
1565};
1566
1567struct msm_eeprom_cfg_data {
1568 int cfgtype;
1569 uint8_t is_eeprom_supported;
1570 union {
1571 struct msm_eeprom_data_t get_data;
1572 struct msm_camera_eeprom_info_t get_info;
1573 } cfg;
1574};
1575
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001576struct sensor_large_data {
1577 int cfgtype;
1578 union {
1579 struct sensor_3d_cali_data_t sensor_3d_cali_data;
1580 } data;
1581};
1582
1583enum sensor_type_t {
1584 BAYER,
1585 YUV,
1586 JPEG_SOC,
1587};
1588
1589enum flash_type {
1590 LED_FLASH,
1591 STROBE_FLASH,
1592};
1593
1594enum strobe_flash_ctrl_type {
1595 STROBE_FLASH_CTRL_INIT,
1596 STROBE_FLASH_CTRL_CHARGE,
1597 STROBE_FLASH_CTRL_RELEASE
1598};
1599
1600struct strobe_flash_ctrl_data {
1601 enum strobe_flash_ctrl_type type;
1602 int charge_en;
1603};
1604
1605struct msm_camera_info {
1606 int num_cameras;
1607 uint8_t has_3d_support[MSM_MAX_CAMERA_SENSORS];
1608 uint8_t is_internal_cam[MSM_MAX_CAMERA_SENSORS];
1609 uint32_t s_mount_angle[MSM_MAX_CAMERA_SENSORS];
1610 const char *video_dev_name[MSM_MAX_CAMERA_SENSORS];
1611 enum sensor_type_t sensor_type[MSM_MAX_CAMERA_SENSORS];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001612};
1613
1614struct msm_cam_config_dev_info {
1615 int num_config_nodes;
1616 const char *config_dev_name[MSM_MAX_CAMERA_CONFIGS];
Ankit Premrajkaf94bcc62011-08-22 15:23:53 -07001617 int config_dev_id[MSM_MAX_CAMERA_CONFIGS];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001618};
1619
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -08001620struct msm_mctl_node_info {
1621 int num_mctl_nodes;
1622 const char *mctl_node_name[MSM_MAX_CAMERA_SENSORS];
1623};
1624
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001625struct flash_ctrl_data {
1626 int flashtype;
1627 union {
1628 int led_state;
1629 struct strobe_flash_ctrl_data strobe_ctrl;
1630 } ctrl_data;
1631};
1632
1633#define GET_NAME 0
1634#define GET_PREVIEW_LINE_PER_FRAME 1
1635#define GET_PREVIEW_PIXELS_PER_LINE 2
1636#define GET_SNAPSHOT_LINE_PER_FRAME 3
1637#define GET_SNAPSHOT_PIXELS_PER_LINE 4
1638#define GET_SNAPSHOT_FPS 5
1639#define GET_SNAPSHOT_MAX_EP_LINE_CNT 6
1640
1641struct msm_camsensor_info {
1642 char name[MAX_SENSOR_NAME];
1643 uint8_t flash_enabled;
Sreesudhan Ramakrish Ramkumara2688822012-04-05 20:22:50 -07001644 uint8_t strobe_flash_enabled;
1645 uint8_t actuator_enabled;
Nishant Panditb2157c92012-04-25 01:09:28 +05301646 uint8_t ispif_supported;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001647 int8_t total_steps;
1648 uint8_t support_3d;
Mingcheng Zhuc85b8ad2012-03-08 17:47:17 -08001649 enum flash_type flashtype;
1650 enum sensor_type_t sensor_type;
1651 uint32_t pxlcode; /* enum v4l2_mbus_pixelcode */
1652 uint32_t camera_type; /* msm_camera_type */
1653 int mount_angle;
1654 uint32_t max_width;
1655 uint32_t max_height;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001656};
Kiran Kumar H Nceea7622011-08-23 14:01:03 -07001657
1658#define V4L2_SINGLE_PLANE 0
1659#define V4L2_MULTI_PLANE_Y 0
1660#define V4L2_MULTI_PLANE_CBCR 1
1661#define V4L2_MULTI_PLANE_CB 1
1662#define V4L2_MULTI_PLANE_CR 2
1663
1664struct plane_data {
1665 int plane_id;
1666 uint32_t offset;
1667 unsigned long size;
1668};
1669
1670struct img_plane_info {
1671 uint32_t width;
1672 uint32_t height;
1673 uint32_t pixelformat;
1674 uint8_t buffer_type; /*Single/Multi planar*/
1675 uint8_t output_port;
1676 uint32_t ext_mode;
1677 uint8_t num_planes;
1678 struct plane_data plane[MAX_PLANES];
Mingcheng Zhu996be182011-10-16 16:04:23 -07001679 uint32_t sp_y_offset;
Kiran Kumar H N90785902012-07-05 13:59:38 -07001680 uint32_t inst_handle;
Kiran Kumar H Nceea7622011-08-23 14:01:03 -07001681};
1682
Kevin Chan210061f2012-02-14 20:56:16 -08001683#define QCAMERA_NAME "qcamera"
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07001684#define QCAMERA_SERVER_NAME "qcamera_server"
Kevin Chan210061f2012-02-14 20:56:16 -08001685#define QCAMERA_DEVICE_GROUP_ID 1
1686#define QCAMERA_VNODE_GROUP_ID 2
1687
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07001688enum msm_cam_subdev_type {
1689 CSIPHY_DEV,
1690 CSID_DEV,
1691 CSIC_DEV,
1692 ISPIF_DEV,
1693 VFE_DEV,
1694 AXI_DEV,
1695 VPE_DEV,
1696 SENSOR_DEV,
1697 ACTUATOR_DEV,
1698 EEPROM_DEV,
1699 GESTURE_DEV,
1700 IRQ_ROUTER_DEV,
1701 CPP_DEV,
Sreesudhan Ramakrish Ramkumarc842b612012-05-21 17:23:24 -07001702 CCI_DEV,
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07001703};
1704
1705struct msm_mctl_set_sdev_data {
1706 uint32_t revision;
1707 enum msm_cam_subdev_type sdev_type;
1708};
1709
Kevin Chan94b4c832012-03-02 21:27:16 -08001710#define MSM_CAM_V4L2_IOCTL_GET_CAMERA_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07001711 _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001712
1713#define MSM_CAM_V4L2_IOCTL_GET_CONFIG_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07001714 _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001715
1716#define MSM_CAM_V4L2_IOCTL_GET_MCTL_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07001717 _IOWR('V', BASE_VIDIOC_PRIVATE + 3, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001718
1719#define MSM_CAM_V4L2_IOCTL_CTRL_CMD_DONE \
Kevin Chan41a38702012-06-06 22:25:41 -07001720 _IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001721
1722#define MSM_CAM_V4L2_IOCTL_GET_EVENT_PAYLOAD \
Kevin Chan41a38702012-06-06 22:25:41 -07001723 _IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001724
Sunid Wilson4584b5f2012-04-13 12:48:25 -07001725#define MSM_CAM_IOCTL_SEND_EVENT \
1726 _IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct v4l2_event)
1727
Kiran Kumar H N64bd23c2012-05-25 12:06:21 -07001728#define MSM_CAM_V4L2_IOCTL_CFG_VPE \
1729 _IOWR('V', BASE_VIDIOC_PRIVATE + 7, struct msm_vpe_cfg_cmd)
1730
Kevin Chan41a38702012-06-06 22:25:41 -07001731#define MSM_CAM_V4L2_IOCTL_PRIVATE_S_CTRL \
1732 _IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct msm_camera_v4l2_ioctl_t)
1733
Kiran Kumar H N90785902012-07-05 13:59:38 -07001734#define MSM_CAM_V4L2_IOCTL_PRIVATE_G_CTRL \
1735 _IOWR('V', BASE_VIDIOC_PRIVATE + 9, struct msm_camera_v4l2_ioctl_t)
1736
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07001737#define VIDIOC_MSM_VPE_INIT \
1738 _IO('V', BASE_VIDIOC_PRIVATE + 15)
1739
1740#define VIDIOC_MSM_VPE_RELEASE \
1741 _IO('V', BASE_VIDIOC_PRIVATE + 16)
1742
1743#define VIDIOC_MSM_VPE_CFG \
1744 _IOWR('V', BASE_VIDIOC_PRIVATE + 17, struct msm_mctl_pp_params *)
1745
1746#define VIDIOC_MSM_AXI_INIT \
1747 _IO('V', BASE_VIDIOC_PRIVATE + 18)
1748
1749#define VIDIOC_MSM_AXI_RELEASE \
1750 _IO('V', BASE_VIDIOC_PRIVATE + 19)
1751
1752#define VIDIOC_MSM_AXI_CFG \
1753 _IOWR('V', BASE_VIDIOC_PRIVATE + 20, void *)
1754
1755#define VIDIOC_MSM_AXI_IRQ \
1756 _IOWR('V', BASE_VIDIOC_PRIVATE + 21, void *)
1757
1758#define VIDIOC_MSM_AXI_BUF_CFG \
1759 _IOWR('V', BASE_VIDIOC_PRIVATE + 22, void *)
1760
1761#define VIDIOC_MSM_VFE_INIT \
1762 _IO('V', BASE_VIDIOC_PRIVATE + 22)
1763
1764#define VIDIOC_MSM_VFE_RELEASE \
1765 _IO('V', BASE_VIDIOC_PRIVATE + 23)
1766
Kevin Chan94b4c832012-03-02 21:27:16 -08001767struct msm_camera_v4l2_ioctl_t {
Kevin Chan41a38702012-06-06 22:25:41 -07001768 uint32_t id;
Kevin Chan94b4c832012-03-02 21:27:16 -08001769 void __user *ioctl_ptr;
Kevin Chan41a38702012-06-06 22:25:41 -07001770 uint32_t len;
Kevin Chan94b4c832012-03-02 21:27:16 -08001771};
1772
Lakshmi Narayana Kalavalacd3d81e2012-07-31 13:04:03 -07001773struct msm_camera_vfe_params_t {
1774 uint32_t operation_mode;
1775 uint32_t capture_count;
1776 uint32_t skip_abort;
1777 uint16_t port_info;
Lakshmi Narayana Kalavala3e8a1d12012-07-31 15:00:09 -07001778 uint32_t inst_handle;
Lakshmi Narayana Kalavalacd3d81e2012-07-31 13:04:03 -07001779 uint16_t cmd_type;
1780};
1781
Kiran Kumar H Nb4a278e2012-06-18 19:25:47 -07001782enum msm_camss_irq_idx {
1783 CAMERA_SS_IRQ_0,
1784 CAMERA_SS_IRQ_1,
1785 CAMERA_SS_IRQ_2,
1786 CAMERA_SS_IRQ_3,
1787 CAMERA_SS_IRQ_4,
1788 CAMERA_SS_IRQ_5,
1789 CAMERA_SS_IRQ_6,
1790 CAMERA_SS_IRQ_7,
1791 CAMERA_SS_IRQ_8,
1792 CAMERA_SS_IRQ_9,
1793 CAMERA_SS_IRQ_10,
1794 CAMERA_SS_IRQ_11,
1795 CAMERA_SS_IRQ_12,
1796 CAMERA_SS_IRQ_MAX
1797};
1798
1799enum msm_cam_hw_idx {
1800 MSM_CAM_HW_MICRO,
1801 MSM_CAM_HW_CCI,
1802 MSM_CAM_HW_CSI0,
1803 MSM_CAM_HW_CSI1,
1804 MSM_CAM_HW_CSI2,
1805 MSM_CAM_HW_CSI3,
1806 MSM_CAM_HW_ISPIF,
1807 MSM_CAM_HW_CPP,
1808 MSM_CAM_HW_VFE0,
1809 MSM_CAM_HW_VFE1,
1810 MSM_CAM_HW_JPEG0,
1811 MSM_CAM_HW_JPEG1,
1812 MSM_CAM_HW_JPEG2,
1813 MSM_CAM_HW_MAX
1814};
1815
1816struct msm_camera_irq_cfg {
1817 /* Bit mask of all the camera hardwares that needs to
1818 * be composited into a single IRQ to the MSM.
1819 * Current usage: (may be updated based on hw changes)
1820 * Bits 31:13 - Reserved.
1821 * Bits 12:0
1822 * 12 - MSM_CAM_HW_JPEG2
1823 * 11 - MSM_CAM_HW_JPEG1
1824 * 10 - MSM_CAM_HW_JPEG0
1825 * 9 - MSM_CAM_HW_VFE1
1826 * 8 - MSM_CAM_HW_VFE0
1827 * 7 - MSM_CAM_HW_CPP
1828 * 6 - MSM_CAM_HW_ISPIF
1829 * 5 - MSM_CAM_HW_CSI3
1830 * 4 - MSM_CAM_HW_CSI2
1831 * 3 - MSM_CAM_HW_CSI1
1832 * 2 - MSM_CAM_HW_CSI0
1833 * 1 - MSM_CAM_HW_CCI
1834 * 0 - MSM_CAM_HW_MICRO
1835 */
1836 uint32_t cam_hw_mask;
1837 uint8_t irq_idx;
1838 uint8_t num_hwcore;
1839};
1840
1841#define MSM_IRQROUTER_CFG_COMPIRQ \
1842 _IOWR('V', BASE_VIDIOC_PRIVATE, void __user *)
1843
Kevin Chan73ec7282012-06-07 01:32:00 -07001844#define MAX_NUM_CPP_STRIPS 8
1845
1846enum msm_cpp_frame_type {
1847 MSM_CPP_OFFLINE_FRAME,
1848 MSM_CPP_REALTIME_FRAME,
1849};
1850
1851struct msm_cpp_frame_strip_info {
1852 int scale_v_en;
1853 int scale_h_en;
1854
1855 int upscale_v_en;
1856 int upscale_h_en;
1857
1858 int src_start_x;
1859 int src_end_x;
1860 int src_start_y;
1861 int src_end_y;
1862
1863 /* Padding is required for upscaler because it does not
1864 * pad internally like other blocks, also needed for rotation
1865 * rotation expects all the blocks in the stripe to be the same size
1866 * Padding is done such that all the extra padded pixels
1867 * are on the right and bottom
1868 */
1869 int pad_bottom;
1870 int pad_top;
1871 int pad_right;
1872 int pad_left;
1873
1874 int v_init_phase;
1875 int h_init_phase;
1876 int h_phase_step;
1877 int v_phase_step;
1878
1879 int prescale_crop_width_first_pixel;
1880 int prescale_crop_width_last_pixel;
1881 int prescale_crop_height_first_line;
1882 int prescale_crop_height_last_line;
1883
1884 int postscale_crop_height_first_line;
1885 int postscale_crop_height_last_line;
1886 int postscale_crop_width_first_pixel;
1887 int postscale_crop_width_last_pixel;
1888
1889 int dst_start_x;
1890 int dst_end_x;
1891 int dst_start_y;
1892 int dst_end_y;
1893
1894 int bytes_per_pixel;
1895 unsigned int source_address;
1896 unsigned int destination_address;
1897 unsigned int src_stride;
1898 unsigned int dst_stride;
1899 int rotate_270;
1900 int horizontal_flip;
1901 int vertical_flip;
1902 int scale_output_width;
1903 int scale_output_height;
1904};
1905
1906struct msm_cpp_frame_info_t {
1907 int32_t frame_id;
1908 uint32_t inst_id;
1909 uint32_t client_id;
1910 enum msm_cpp_frame_type frame_type;
1911 uint32_t num_strips;
1912 struct msm_cpp_frame_strip_info *strip_info;
1913};
1914
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -07001915struct msm_ver_num_info {
1916 uint32_t main;
1917 uint32_t minor;
1918 uint32_t rev;
1919};
1920
Kevin Chan73ec7282012-06-07 01:32:00 -07001921#define VIDIOC_MSM_CPP_CFG \
1922 _IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_camera_v4l2_ioctl_t)
1923
1924#define VIDIOC_MSM_CPP_GET_EVENTPAYLOAD \
1925 _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t)
1926
1927#define VIDIOC_MSM_CPP_GET_INST_INFO \
1928 _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
1929
1930#define V4L2_EVENT_CPP_FRAME_DONE (V4L2_EVENT_PRIVATE_START + 0)
1931
Kiran Kumar H N90785902012-07-05 13:59:38 -07001932/* Instance Handle - inst_handle
1933 * Data bundle containing the information about where
1934 * to get a buffer for a particular camera instance.
1935 * This is a bitmask containing the following data:
1936 * Buffer Handle Bitmask:
1937 * ------------------------------------
1938 * Bits : Purpose
1939 * ------------------------------------
1940 * 31 - 24 : Reserved.
1941 * 23 : is Image mode valid?
1942 * 22 - 16 : Image mode.
1943 * 15 : is MCTL PP inst idx valid?
1944 * 14 - 8 : MCTL PP inst idx.
1945 * 7 : is Video inst idx valid?
1946 * 6 - 0 : Video inst idx.
1947 */
1948#define CLR_IMG_MODE(handle) (handle &= 0xFF00FFFF)
1949#define SET_IMG_MODE(handle, data) \
1950 (handle |= ((0x1 << 23) | ((data & 0x7F) << 16)))
1951#define GET_IMG_MODE(handle) \
1952 ((handle & 0x800000) ? ((handle & 0x7F0000) >> 16) : 0xFF)
1953
1954#define CLR_MCTLPP_INST_IDX(handle) (handle &= 0xFFFF00FF)
1955#define SET_MCTLPP_INST_IDX(handle, data) \
1956 (handle |= ((0x1 << 15) | ((data & 0x7F) << 8)))
1957#define GET_MCTLPP_INST_IDX(handle) \
1958 ((handle & 0x8000) ? ((handle & 0x7F00) >> 8) : 0xFF)
1959
1960#define CLR_VIDEO_INST_IDX(handle) (handle &= 0xFFFFFF00)
1961#define GET_VIDEO_INST_IDX(handle) \
1962 ((handle & 0x80) ? (handle & 0x7F) : 0xFF)
1963#define SET_VIDEO_INST_IDX(handle, data) \
1964 (handle |= (0x1 << 7) | (data & 0x7F))
1965
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001966#endif /* __LINUX_MSM_CAMERA_H */