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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* linux/include/asm-arm/arch-s3c2410/uncompress.h
2 *
3 * (c) 2003 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C2410 - uncompress code
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * Changelog:
13 * 22-May-2003 BJD Created
14 * 08-Sep-2003 BJD Moved to linux v2.6
15 * 12-Mar-2004 BJD Updated header protection
16 * 12-Oct-2004 BJD Take account of debug uart configuration
17 * 15-Nov-2004 BJD Fixed uart configuration
18 * 22-Feb-2005 BJD Added watchdog to uncompress
Lucas Correia Villa Realbd7b1702005-04-25 23:12:50 +010019 * 04-Apr-2005 LCVR Added support to S3C2400 (no cpuid at GSTATUS1)
Linus Torvalds1da177e2005-04-16 15:20:36 -070020*/
21
22#ifndef __ASM_ARCH_UNCOMPRESS_H
23#define __ASM_ARCH_UNCOMPRESS_H
24
25#include <linux/config.h>
26
27/* defines for UART registers */
28#include "asm/arch/regs-serial.h"
29#include "asm/arch/regs-gpio.h"
30#include "asm/arch/regs-watchdog.h"
31
32#include <asm/arch/map.h>
33
34/* working in physical space... */
35#undef S3C2410_GPIOREG
36#undef S3C2410_WDOGREG
37
Lucas Correia Villa Real0367a8d2006-01-26 15:20:50 +000038#define S3C2410_GPIOREG(x) ((S3C24XX_PA_GPIO + (x)))
39#define S3C2410_WDOGREG(x) ((S3C24XX_PA_WATCHDOG + (x)))
Linus Torvalds1da177e2005-04-16 15:20:36 -070040
41/* how many bytes we allow into the FIFO at a time in FIFO mode */
42#define FIFO_MAX (14)
43
Lucas Correia Villa Real0367a8d2006-01-26 15:20:50 +000044#define uart_base S3C24XX_PA_UART + (0x4000*CONFIG_S3C2410_LOWLEVEL_UART_PORT)
Linus Torvalds1da177e2005-04-16 15:20:36 -070045
46static __inline__ void
47uart_wr(unsigned int reg, unsigned int val)
48{
49 volatile unsigned int *ptr;
50
51 ptr = (volatile unsigned int *)(reg + uart_base);
52 *ptr = val;
53}
54
55static __inline__ unsigned int
56uart_rd(unsigned int reg)
57{
58 volatile unsigned int *ptr;
59
60 ptr = (volatile unsigned int *)(reg + uart_base);
61 return *ptr;
62}
63
64
65/* we can deal with the case the UARTs are being run
66 * in FIFO mode, so that we don't hold up our execution
67 * waiting for tx to happen...
68*/
69
Russell Kinga0815682006-03-28 10:24:33 +010070static void putc(int ch)
Linus Torvalds1da177e2005-04-16 15:20:36 -070071{
Lucas Correia Villa Realbd7b1702005-04-25 23:12:50 +010072 int cpuid = S3C2410_GSTATUS1_2410;
Linus Torvalds1da177e2005-04-16 15:20:36 -070073
Lucas Correia Villa Realbd7b1702005-04-25 23:12:50 +010074#ifndef CONFIG_CPU_S3C2400
75 cpuid = *((volatile unsigned int *)S3C2410_GSTATUS1);
Linus Torvalds1da177e2005-04-16 15:20:36 -070076 cpuid &= S3C2410_GSTATUS1_IDMASK;
Lucas Correia Villa Realbd7b1702005-04-25 23:12:50 +010077#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -070078
Linus Torvalds1da177e2005-04-16 15:20:36 -070079 if (uart_rd(S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE) {
80 int level;
81
82 while (1) {
83 level = uart_rd(S3C2410_UFSTAT);
84
Ben Dooks96ce2382006-06-18 23:06:41 +010085 if (cpuid == S3C2410_GSTATUS1_2440 ||
86 cpuid == S3C2410_GSTATUS1_2442) {
Linus Torvalds1da177e2005-04-16 15:20:36 -070087 level &= S3C2440_UFSTAT_TXMASK;
88 level >>= S3C2440_UFSTAT_TXSHIFT;
89 } else {
90 level &= S3C2410_UFSTAT_TXMASK;
91 level >>= S3C2410_UFSTAT_TXSHIFT;
92 }
93
94 if (level < FIFO_MAX)
95 break;
96 }
97
98 } else {
99 /* not using fifos */
100
Russell Kinga0815682006-03-28 10:24:33 +0100101 while ((uart_rd(S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE) != S3C2410_UTRSTAT_TXE)
102 barrier();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700103 }
104
105 /* write byte to transmission register */
106 uart_wr(S3C2410_UTXH, ch);
107}
108
Russell Kinga0815682006-03-28 10:24:33 +0100109static inline void flush(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700110{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700111}
112
Ben Dooksf8c905d2005-11-08 22:43:05 +0000113#define __raw_writel(d,ad) do { *((volatile unsigned int *)(ad)) = (d); } while(0)
114
Linus Torvalds1da177e2005-04-16 15:20:36 -0700115/* CONFIG_S3C2410_BOOT_WATCHDOG
116 *
117 * Simple boot-time watchdog setup, to reboot the system if there is
118 * any problem with the boot process
119*/
120
121#ifdef CONFIG_S3C2410_BOOT_WATCHDOG
122
123#define WDOG_COUNT (0xff00)
124
Linus Torvalds1da177e2005-04-16 15:20:36 -0700125static inline void arch_decomp_wdog(void)
126{
127 __raw_writel(WDOG_COUNT, S3C2410_WTCNT);
128}
129
130static void arch_decomp_wdog_start(void)
131{
132 __raw_writel(WDOG_COUNT, S3C2410_WTDAT);
133 __raw_writel(WDOG_COUNT, S3C2410_WTCNT);
Ben Dooks96ce2382006-06-18 23:06:41 +0100134 __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x80), S3C2410_WTCON);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700135}
136
137#else
138#define arch_decomp_wdog_start()
139#define arch_decomp_wdog()
140#endif
141
Ben Dooksf8c905d2005-11-08 22:43:05 +0000142#ifdef CONFIG_S3C2410_BOOT_ERROR_RESET
143
144static void arch_decomp_error(const char *x)
145{
146 putstr("\n\n");
147 putstr(x);
148 putstr("\n\n -- System resetting\n");
149
150 __raw_writel(0x4000, S3C2410_WTDAT);
151 __raw_writel(0x4000, S3C2410_WTCNT);
152 __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x40), S3C2410_WTCON);
153
154 while(1);
155}
156
157#define arch_error arch_decomp_error
158#endif
159
Linus Torvalds1da177e2005-04-16 15:20:36 -0700160static void error(char *err);
161
162static void
163arch_decomp_setup(void)
164{
165 /* we may need to setup the uart(s) here if we are not running
166 * on an BAST... the BAST will have left the uarts configured
167 * after calling linux.
168 */
169
170 arch_decomp_wdog_start();
171}
172
173
174#endif /* __ASM_ARCH_UNCOMPRESS_H */