| Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1 | #ifndef _MSM_VIDC_DEC_H_ | 
|  | 2 | #define _MSM_VIDC_DEC_H_ | 
|  | 3 |  | 
|  | 4 | #include <linux/types.h> | 
|  | 5 | #include <linux/ioctl.h> | 
|  | 6 |  | 
|  | 7 | /* STATUS CODES */ | 
|  | 8 | /* Base value for status codes */ | 
|  | 9 | #define VDEC_S_BASE	0x40000000 | 
|  | 10 | /* Success */ | 
|  | 11 | #define VDEC_S_SUCCESS	(VDEC_S_BASE) | 
|  | 12 | /* General failure */ | 
|  | 13 | #define VDEC_S_EFAIL	(VDEC_S_BASE + 1) | 
|  | 14 | /* Fatal irrecoverable  failure. Need to  tear down session. */ | 
|  | 15 | #define VDEC_S_EFATAL   (VDEC_S_BASE + 2) | 
|  | 16 | /* Error detected in the passed  parameters */ | 
|  | 17 | #define VDEC_S_EBADPARAM	(VDEC_S_BASE + 3) | 
|  | 18 | /* Command called in invalid  state. */ | 
|  | 19 | #define VDEC_S_EINVALSTATE	(VDEC_S_BASE + 4) | 
|  | 20 | /* Insufficient OS  resources - thread, memory etc. */ | 
|  | 21 | #define VDEC_S_ENOSWRES	(VDEC_S_BASE + 5) | 
|  | 22 | /* Insufficient HW resources -  core capacity  maxed  out. */ | 
|  | 23 | #define VDEC_S_ENOHWRES	(VDEC_S_BASE + 6) | 
|  | 24 | /* Invalid command  called */ | 
|  | 25 | #define VDEC_S_EINVALCMD	(VDEC_S_BASE + 7) | 
|  | 26 | /* Command timeout. */ | 
|  | 27 | #define VDEC_S_ETIMEOUT	(VDEC_S_BASE + 8) | 
|  | 28 | /* Pre-requirement is  not met for API. */ | 
|  | 29 | #define VDEC_S_ENOPREREQ	(VDEC_S_BASE + 9) | 
|  | 30 | /* Command queue is full. */ | 
|  | 31 | #define VDEC_S_ECMDQFULL	(VDEC_S_BASE + 10) | 
|  | 32 | /* Command is not supported  by this driver */ | 
|  | 33 | #define VDEC_S_ENOTSUPP	(VDEC_S_BASE + 11) | 
|  | 34 | /* Command is not implemented by thedriver. */ | 
|  | 35 | #define VDEC_S_ENOTIMPL	(VDEC_S_BASE + 12) | 
|  | 36 | /* Command is not implemented by the driver.  */ | 
|  | 37 | #define VDEC_S_BUSY	(VDEC_S_BASE + 13) | 
| Gopikrishnaiah Anandan | 746d9ab | 2011-07-07 11:55:13 -0700 | [diff] [blame] | 38 | #define VDEC_S_INPUT_BITSTREAM_ERR (VDEC_S_BASE + 14) | 
| Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 39 |  | 
|  | 40 | #define VDEC_INTF_VER	1 | 
|  | 41 | #define VDEC_MSG_BASE	0x0000000 | 
|  | 42 | /* Codes to identify asynchronous message responses and events that driver | 
|  | 43 | wants to communicate to the app.*/ | 
|  | 44 | #define VDEC_MSG_INVALID	(VDEC_MSG_BASE + 0) | 
|  | 45 | #define VDEC_MSG_RESP_INPUT_BUFFER_DONE	(VDEC_MSG_BASE + 1) | 
|  | 46 | #define VDEC_MSG_RESP_OUTPUT_BUFFER_DONE	(VDEC_MSG_BASE + 2) | 
|  | 47 | #define VDEC_MSG_RESP_INPUT_FLUSHED	(VDEC_MSG_BASE + 3) | 
|  | 48 | #define VDEC_MSG_RESP_OUTPUT_FLUSHED	(VDEC_MSG_BASE + 4) | 
|  | 49 | #define VDEC_MSG_RESP_FLUSH_INPUT_DONE	(VDEC_MSG_BASE + 5) | 
|  | 50 | #define VDEC_MSG_RESP_FLUSH_OUTPUT_DONE	(VDEC_MSG_BASE + 6) | 
|  | 51 | #define VDEC_MSG_RESP_START_DONE	(VDEC_MSG_BASE + 7) | 
|  | 52 | #define VDEC_MSG_RESP_STOP_DONE	(VDEC_MSG_BASE + 8) | 
|  | 53 | #define VDEC_MSG_RESP_PAUSE_DONE	(VDEC_MSG_BASE + 9) | 
|  | 54 | #define VDEC_MSG_RESP_RESUME_DONE	(VDEC_MSG_BASE + 10) | 
|  | 55 | #define VDEC_MSG_RESP_RESOURCE_LOADED	(VDEC_MSG_BASE + 11) | 
|  | 56 | #define VDEC_EVT_RESOURCES_LOST	(VDEC_MSG_BASE + 12) | 
|  | 57 | #define VDEC_MSG_EVT_CONFIG_CHANGED	(VDEC_MSG_BASE + 13) | 
|  | 58 | #define VDEC_MSG_EVT_HW_ERROR	(VDEC_MSG_BASE + 14) | 
|  | 59 | #define VDEC_MSG_EVT_INFO_CONFIG_CHANGED	(VDEC_MSG_BASE + 15) | 
| Gopikrishnaiah Anandan | 248eac2 | 2011-07-12 14:24:14 -0700 | [diff] [blame] | 60 | #define VDEC_MSG_EVT_INFO_FIELD_DROPPED	(VDEC_MSG_BASE + 16) | 
| Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 61 |  | 
|  | 62 | /*Buffer flags bits masks.*/ | 
|  | 63 | #define VDEC_BUFFERFLAG_EOS	0x00000001 | 
|  | 64 | #define VDEC_BUFFERFLAG_DECODEONLY	0x00000004 | 
|  | 65 | #define VDEC_BUFFERFLAG_DATACORRUPT	0x00000008 | 
|  | 66 | #define VDEC_BUFFERFLAG_ENDOFFRAME	0x00000010 | 
|  | 67 | #define VDEC_BUFFERFLAG_SYNCFRAME	0x00000020 | 
|  | 68 | #define VDEC_BUFFERFLAG_EXTRADATA	0x00000040 | 
|  | 69 | #define VDEC_BUFFERFLAG_CODECCONFIG	0x00000080 | 
|  | 70 |  | 
|  | 71 | /*Post processing flags bit masks*/ | 
|  | 72 | #define VDEC_EXTRADATA_NONE 0x001 | 
|  | 73 | #define VDEC_EXTRADATA_QP 0x004 | 
|  | 74 | #define VDEC_EXTRADATA_MB_ERROR_MAP 0x008 | 
|  | 75 | #define VDEC_EXTRADATA_SEI 0x010 | 
|  | 76 | #define VDEC_EXTRADATA_VUI 0x020 | 
|  | 77 | #define VDEC_EXTRADATA_VC1 0x040 | 
|  | 78 |  | 
| Shobhit Pandey | 833942e | 2012-08-01 14:02:20 +0530 | [diff] [blame] | 79 | #define VDEC_EXTRADATA_EXT_DATA          0x0800 | 
|  | 80 | #define VDEC_EXTRADATA_USER_DATA         0x1000 | 
| Deepak Verma | eb8179b | 2013-01-25 11:57:52 +0530 | [diff] [blame] | 81 | #define VDEC_EXTRADATA_EXT_BUFFER        0x2000 | 
| Shobhit Pandey | 833942e | 2012-08-01 14:02:20 +0530 | [diff] [blame] | 82 |  | 
| Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 83 | #define VDEC_CMDBASE	0x800 | 
|  | 84 | #define VDEC_CMD_SET_INTF_VERSION	(VDEC_CMDBASE) | 
|  | 85 |  | 
|  | 86 | #define VDEC_IOCTL_MAGIC 'v' | 
|  | 87 |  | 
|  | 88 | struct vdec_ioctl_msg { | 
|  | 89 | void __user *in; | 
|  | 90 | void __user *out; | 
|  | 91 | }; | 
|  | 92 |  | 
|  | 93 | /* CMD params: InputParam:enum vdec_codec | 
|  | 94 | OutputParam: struct vdec_profile_level*/ | 
|  | 95 | #define VDEC_IOCTL_GET_PROFILE_LEVEL_SUPPORTED \ | 
|  | 96 | _IOWR(VDEC_IOCTL_MAGIC, 0, struct vdec_ioctl_msg) | 
|  | 97 |  | 
|  | 98 | /*CMD params:InputParam: NULL | 
|  | 99 | OutputParam: uint32_t(bitmask)*/ | 
|  | 100 | #define VDEC_IOCTL_GET_INTERLACE_FORMAT \ | 
|  | 101 | _IOR(VDEC_IOCTL_MAGIC, 1, struct vdec_ioctl_msg) | 
|  | 102 |  | 
|  | 103 | /* CMD params: InputParam:  enum vdec_codec | 
|  | 104 | OutputParam: struct vdec_profile_level*/ | 
|  | 105 | #define VDEC_IOCTL_GET_CURRENT_PROFILE_LEVEL \ | 
|  | 106 | _IOWR(VDEC_IOCTL_MAGIC, 2, struct vdec_ioctl_msg) | 
|  | 107 |  | 
|  | 108 | /*CMD params: SET: InputParam: enum vdec_output_fromat  OutputParam: NULL | 
|  | 109 | GET:  InputParam: NULL OutputParam: enum vdec_output_fromat*/ | 
|  | 110 | #define VDEC_IOCTL_SET_OUTPUT_FORMAT \ | 
|  | 111 | _IOWR(VDEC_IOCTL_MAGIC, 3, struct vdec_ioctl_msg) | 
|  | 112 | #define VDEC_IOCTL_GET_OUTPUT_FORMAT \ | 
|  | 113 | _IOWR(VDEC_IOCTL_MAGIC, 4, struct vdec_ioctl_msg) | 
|  | 114 |  | 
|  | 115 | /*CMD params: SET: InputParam: enum vdec_codec OutputParam: NULL | 
|  | 116 | GET: InputParam: NULL OutputParam: enum vdec_codec*/ | 
|  | 117 | #define VDEC_IOCTL_SET_CODEC \ | 
|  | 118 | _IOW(VDEC_IOCTL_MAGIC, 5, struct vdec_ioctl_msg) | 
|  | 119 | #define VDEC_IOCTL_GET_CODEC \ | 
|  | 120 | _IOR(VDEC_IOCTL_MAGIC, 6, struct vdec_ioctl_msg) | 
|  | 121 |  | 
|  | 122 | /*CMD params: SET: InputParam: struct vdec_picsize outputparam: NULL | 
|  | 123 | GET: InputParam: NULL outputparam: struct vdec_picsize*/ | 
|  | 124 | #define VDEC_IOCTL_SET_PICRES \ | 
|  | 125 | _IOW(VDEC_IOCTL_MAGIC, 7, struct vdec_ioctl_msg) | 
|  | 126 | #define VDEC_IOCTL_GET_PICRES \ | 
|  | 127 | _IOR(VDEC_IOCTL_MAGIC, 8, struct vdec_ioctl_msg) | 
|  | 128 |  | 
|  | 129 | #define VDEC_IOCTL_SET_EXTRADATA \ | 
|  | 130 | _IOW(VDEC_IOCTL_MAGIC, 9, struct vdec_ioctl_msg) | 
|  | 131 | #define VDEC_IOCTL_GET_EXTRADATA \ | 
|  | 132 | _IOR(VDEC_IOCTL_MAGIC, 10, struct vdec_ioctl_msg) | 
|  | 133 |  | 
|  | 134 | #define VDEC_IOCTL_SET_SEQUENCE_HEADER \ | 
|  | 135 | _IOW(VDEC_IOCTL_MAGIC, 11, struct vdec_ioctl_msg) | 
|  | 136 |  | 
|  | 137 | /* CMD params: SET: InputParam - vdec_allocatorproperty, OutputParam - NULL | 
|  | 138 | GET: InputParam - NULL, OutputParam - vdec_allocatorproperty*/ | 
|  | 139 | #define VDEC_IOCTL_SET_BUFFER_REQ \ | 
|  | 140 | _IOW(VDEC_IOCTL_MAGIC, 12, struct vdec_ioctl_msg) | 
|  | 141 | #define VDEC_IOCTL_GET_BUFFER_REQ \ | 
|  | 142 | _IOR(VDEC_IOCTL_MAGIC, 13, struct vdec_ioctl_msg) | 
|  | 143 | /* CMD params: InputParam - vdec_buffer, OutputParam - uint8_t** */ | 
|  | 144 | #define VDEC_IOCTL_ALLOCATE_BUFFER \ | 
|  | 145 | _IOWR(VDEC_IOCTL_MAGIC, 14, struct vdec_ioctl_msg) | 
|  | 146 | /* CMD params: InputParam - uint8_t *, OutputParam - NULL.*/ | 
|  | 147 | #define VDEC_IOCTL_FREE_BUFFER \ | 
|  | 148 | _IOW(VDEC_IOCTL_MAGIC, 15, struct vdec_ioctl_msg) | 
|  | 149 |  | 
|  | 150 | /*CMD params: CMD: InputParam - struct vdec_setbuffer_cmd, OutputParam - NULL*/ | 
|  | 151 | #define VDEC_IOCTL_SET_BUFFER \ | 
|  | 152 | _IOW(VDEC_IOCTL_MAGIC, 16, struct vdec_ioctl_msg) | 
|  | 153 |  | 
|  | 154 | /* CMD params: InputParam - struct vdec_fillbuffer_cmd, OutputParam - NULL*/ | 
|  | 155 | #define VDEC_IOCTL_FILL_OUTPUT_BUFFER \ | 
|  | 156 | _IOW(VDEC_IOCTL_MAGIC, 17, struct vdec_ioctl_msg) | 
|  | 157 |  | 
|  | 158 | /*CMD params: InputParam - struct vdec_frameinfo , OutputParam - NULL*/ | 
|  | 159 | #define VDEC_IOCTL_DECODE_FRAME \ | 
|  | 160 | _IOW(VDEC_IOCTL_MAGIC, 18, struct vdec_ioctl_msg) | 
|  | 161 |  | 
|  | 162 | #define VDEC_IOCTL_LOAD_RESOURCES _IO(VDEC_IOCTL_MAGIC, 19) | 
|  | 163 | #define VDEC_IOCTL_CMD_START _IO(VDEC_IOCTL_MAGIC, 20) | 
|  | 164 | #define VDEC_IOCTL_CMD_STOP _IO(VDEC_IOCTL_MAGIC, 21) | 
|  | 165 | #define VDEC_IOCTL_CMD_PAUSE _IO(VDEC_IOCTL_MAGIC, 22) | 
|  | 166 | #define VDEC_IOCTL_CMD_RESUME _IO(VDEC_IOCTL_MAGIC, 23) | 
|  | 167 |  | 
|  | 168 | /*CMD params: InputParam - enum vdec_bufferflush , OutputParam - NULL */ | 
|  | 169 | #define VDEC_IOCTL_CMD_FLUSH _IOW(VDEC_IOCTL_MAGIC, 24, struct vdec_ioctl_msg) | 
|  | 170 |  | 
|  | 171 | /* ======================================================== | 
|  | 172 | * IOCTL for getting asynchronous notification from driver | 
|  | 173 | * ========================================================*/ | 
|  | 174 |  | 
|  | 175 | /*IOCTL params: InputParam - NULL, OutputParam - struct vdec_msginfo*/ | 
|  | 176 | #define VDEC_IOCTL_GET_NEXT_MSG \ | 
|  | 177 | _IOR(VDEC_IOCTL_MAGIC, 25, struct vdec_ioctl_msg) | 
|  | 178 |  | 
|  | 179 | #define VDEC_IOCTL_STOP_NEXT_MSG _IO(VDEC_IOCTL_MAGIC, 26) | 
|  | 180 |  | 
|  | 181 | #define VDEC_IOCTL_GET_NUMBER_INSTANCES \ | 
|  | 182 | _IOR(VDEC_IOCTL_MAGIC, 27, struct vdec_ioctl_msg) | 
|  | 183 |  | 
|  | 184 | #define VDEC_IOCTL_SET_PICTURE_ORDER \ | 
|  | 185 | _IOW(VDEC_IOCTL_MAGIC, 28, struct vdec_ioctl_msg) | 
|  | 186 |  | 
|  | 187 | #define VDEC_IOCTL_SET_FRAME_RATE \ | 
|  | 188 | _IOW(VDEC_IOCTL_MAGIC, 29, struct vdec_ioctl_msg) | 
|  | 189 |  | 
|  | 190 | #define VDEC_IOCTL_SET_H264_MV_BUFFER \ | 
|  | 191 | _IOW(VDEC_IOCTL_MAGIC, 30, struct vdec_ioctl_msg) | 
|  | 192 |  | 
|  | 193 | #define VDEC_IOCTL_FREE_H264_MV_BUFFER \ | 
|  | 194 | _IOW(VDEC_IOCTL_MAGIC, 31, struct vdec_ioctl_msg) | 
|  | 195 |  | 
|  | 196 | #define VDEC_IOCTL_GET_MV_BUFFER_SIZE  \ | 
|  | 197 | _IOR(VDEC_IOCTL_MAGIC, 32, struct vdec_ioctl_msg) | 
|  | 198 |  | 
|  | 199 | #define VDEC_IOCTL_SET_IDR_ONLY_DECODING \ | 
|  | 200 | _IO(VDEC_IOCTL_MAGIC, 33) | 
|  | 201 |  | 
|  | 202 | #define VDEC_IOCTL_SET_CONT_ON_RECONFIG  \ | 
|  | 203 | _IO(VDEC_IOCTL_MAGIC, 34) | 
|  | 204 |  | 
| Deepika Pepakayala | a5ede60 | 2011-12-02 11:33:26 -0800 | [diff] [blame] | 205 | #define VDEC_IOCTL_SET_DISABLE_DMX \ | 
|  | 206 | _IOW(VDEC_IOCTL_MAGIC, 35, struct vdec_ioctl_msg) | 
|  | 207 |  | 
|  | 208 | #define VDEC_IOCTL_GET_DISABLE_DMX \ | 
|  | 209 | _IOR(VDEC_IOCTL_MAGIC, 36, struct vdec_ioctl_msg) | 
|  | 210 |  | 
|  | 211 | #define VDEC_IOCTL_GET_DISABLE_DMX_SUPPORT \ | 
|  | 212 | _IOR(VDEC_IOCTL_MAGIC, 37, struct vdec_ioctl_msg) | 
|  | 213 |  | 
| Arun Menon | 152c3c7 | 2012-06-20 11:50:08 -0700 | [diff] [blame] | 214 | #define VDEC_IOCTL_SET_PERF_CLK \ | 
|  | 215 | _IOR(VDEC_IOCTL_MAGIC, 38, struct vdec_ioctl_msg) | 
|  | 216 |  | 
| Deepak Verma | eb8179b | 2013-01-25 11:57:52 +0530 | [diff] [blame] | 217 | #define VDEC_IOCTL_SET_META_BUFFERS \ | 
|  | 218 | _IOW(VDEC_IOCTL_MAGIC, 39, struct vdec_ioctl_msg) | 
|  | 219 |  | 
|  | 220 | #define VDEC_IOCTL_FREE_META_BUFFERS \ | 
|  | 221 | _IO(VDEC_IOCTL_MAGIC, 40) | 
|  | 222 |  | 
| Deepak Verma | 3883780 | 2013-02-02 00:01:05 +0530 | [diff] [blame] | 223 | #define VDEC_IOCTL_GET_ENABLE_SEC_METADATA \ | 
|  | 224 | _IOR(VDEC_IOCTL_MAGIC, 41, struct vdec_ioctl_msg) | 
|  | 225 |  | 
| Maheshwar Ajja | ad5a196 | 2013-05-22 04:25:29 +0530 | [diff] [blame] | 226 | /*IOCTL params:GET: InputData - NULL, OutputData - unsigned int.*/ | 
|  | 227 | #define VDEC_IOCTL_GET_PERF_LEVEL \ | 
|  | 228 | _IOR(VDEC_IOCTL_MAGIC, 42, struct vdec_ioctl_msg) | 
|  | 229 |  | 
| Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 230 | enum vdec_picture { | 
|  | 231 | PICTURE_TYPE_I, | 
|  | 232 | PICTURE_TYPE_P, | 
|  | 233 | PICTURE_TYPE_B, | 
|  | 234 | PICTURE_TYPE_BI, | 
|  | 235 | PICTURE_TYPE_SKIP, | 
| Maheshwar Ajja | 1d053f8 | 2011-07-20 20:45:11 +0530 | [diff] [blame] | 236 | PICTURE_TYPE_IDR, | 
| Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 237 | PICTURE_TYPE_UNKNOWN | 
|  | 238 | }; | 
|  | 239 |  | 
|  | 240 | enum vdec_buffer { | 
|  | 241 | VDEC_BUFFER_TYPE_INPUT, | 
|  | 242 | VDEC_BUFFER_TYPE_OUTPUT | 
|  | 243 | }; | 
|  | 244 |  | 
|  | 245 | struct vdec_allocatorproperty { | 
|  | 246 | enum vdec_buffer buffer_type; | 
|  | 247 | uint32_t mincount; | 
|  | 248 | uint32_t maxcount; | 
|  | 249 | uint32_t actualcount; | 
|  | 250 | size_t buffer_size; | 
|  | 251 | uint32_t alignment; | 
|  | 252 | uint32_t buf_poolid; | 
| Deepak Verma | eb8179b | 2013-01-25 11:57:52 +0530 | [diff] [blame] | 253 | size_t meta_buffer_size; | 
| Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 254 | }; | 
|  | 255 |  | 
|  | 256 | struct vdec_bufferpayload { | 
|  | 257 | void __user *bufferaddr; | 
|  | 258 | size_t buffer_len; | 
|  | 259 | int pmem_fd; | 
|  | 260 | size_t offset; | 
|  | 261 | size_t mmaped_size; | 
|  | 262 | }; | 
|  | 263 |  | 
|  | 264 | struct vdec_setbuffer_cmd { | 
|  | 265 | enum vdec_buffer buffer_type; | 
|  | 266 | struct vdec_bufferpayload buffer; | 
|  | 267 | }; | 
|  | 268 |  | 
|  | 269 | struct vdec_fillbuffer_cmd { | 
|  | 270 | struct vdec_bufferpayload buffer; | 
|  | 271 | void *client_data; | 
|  | 272 | }; | 
|  | 273 |  | 
|  | 274 | enum vdec_bufferflush { | 
|  | 275 | VDEC_FLUSH_TYPE_INPUT, | 
|  | 276 | VDEC_FLUSH_TYPE_OUTPUT, | 
|  | 277 | VDEC_FLUSH_TYPE_ALL | 
|  | 278 | }; | 
|  | 279 |  | 
|  | 280 | enum vdec_codec { | 
|  | 281 | VDEC_CODECTYPE_H264 = 0x1, | 
|  | 282 | VDEC_CODECTYPE_H263 = 0x2, | 
|  | 283 | VDEC_CODECTYPE_MPEG4 = 0x3, | 
|  | 284 | VDEC_CODECTYPE_DIVX_3 = 0x4, | 
|  | 285 | VDEC_CODECTYPE_DIVX_4 = 0x5, | 
|  | 286 | VDEC_CODECTYPE_DIVX_5 = 0x6, | 
|  | 287 | VDEC_CODECTYPE_DIVX_6 = 0x7, | 
|  | 288 | VDEC_CODECTYPE_XVID = 0x8, | 
|  | 289 | VDEC_CODECTYPE_MPEG1 = 0x9, | 
|  | 290 | VDEC_CODECTYPE_MPEG2 = 0xa, | 
|  | 291 | VDEC_CODECTYPE_VC1 = 0xb, | 
|  | 292 | VDEC_CODECTYPE_VC1_RCV = 0xc | 
|  | 293 | }; | 
|  | 294 |  | 
|  | 295 | enum vdec_mpeg2_profile { | 
|  | 296 | VDEC_MPEG2ProfileSimple = 0x1, | 
|  | 297 | VDEC_MPEG2ProfileMain = 0x2, | 
|  | 298 | VDEC_MPEG2Profile422 = 0x4, | 
|  | 299 | VDEC_MPEG2ProfileSNR = 0x8, | 
|  | 300 | VDEC_MPEG2ProfileSpatial = 0x10, | 
|  | 301 | VDEC_MPEG2ProfileHigh = 0x20, | 
|  | 302 | VDEC_MPEG2ProfileKhronosExtensions = 0x6F000000, | 
|  | 303 | VDEC_MPEG2ProfileVendorStartUnused = 0x7F000000, | 
|  | 304 | VDEC_MPEG2ProfileMax = 0x7FFFFFFF | 
|  | 305 | }; | 
|  | 306 |  | 
|  | 307 | enum vdec_mpeg2_level { | 
|  | 308 |  | 
|  | 309 | VDEC_MPEG2LevelLL = 0x1, | 
|  | 310 | VDEC_MPEG2LevelML = 0x2, | 
|  | 311 | VDEC_MPEG2LevelH14 = 0x4, | 
|  | 312 | VDEC_MPEG2LevelHL = 0x8, | 
|  | 313 | VDEC_MPEG2LevelKhronosExtensions = 0x6F000000, | 
|  | 314 | VDEC_MPEG2LevelVendorStartUnused = 0x7F000000, | 
|  | 315 | VDEC_MPEG2LevelMax = 0x7FFFFFFF | 
|  | 316 | }; | 
|  | 317 |  | 
|  | 318 | enum vdec_mpeg4_profile { | 
|  | 319 | VDEC_MPEG4ProfileSimple = 0x01, | 
|  | 320 | VDEC_MPEG4ProfileSimpleScalable = 0x02, | 
|  | 321 | VDEC_MPEG4ProfileCore = 0x04, | 
|  | 322 | VDEC_MPEG4ProfileMain = 0x08, | 
|  | 323 | VDEC_MPEG4ProfileNbit = 0x10, | 
|  | 324 | VDEC_MPEG4ProfileScalableTexture = 0x20, | 
|  | 325 | VDEC_MPEG4ProfileSimpleFace = 0x40, | 
|  | 326 | VDEC_MPEG4ProfileSimpleFBA = 0x80, | 
|  | 327 | VDEC_MPEG4ProfileBasicAnimated = 0x100, | 
|  | 328 | VDEC_MPEG4ProfileHybrid = 0x200, | 
|  | 329 | VDEC_MPEG4ProfileAdvancedRealTime = 0x400, | 
|  | 330 | VDEC_MPEG4ProfileCoreScalable = 0x800, | 
|  | 331 | VDEC_MPEG4ProfileAdvancedCoding = 0x1000, | 
|  | 332 | VDEC_MPEG4ProfileAdvancedCore = 0x2000, | 
|  | 333 | VDEC_MPEG4ProfileAdvancedScalable = 0x4000, | 
|  | 334 | VDEC_MPEG4ProfileAdvancedSimple = 0x8000, | 
|  | 335 | VDEC_MPEG4ProfileKhronosExtensions = 0x6F000000, | 
|  | 336 | VDEC_MPEG4ProfileVendorStartUnused = 0x7F000000, | 
|  | 337 | VDEC_MPEG4ProfileMax = 0x7FFFFFFF | 
|  | 338 | }; | 
|  | 339 |  | 
|  | 340 | enum vdec_mpeg4_level { | 
|  | 341 | VDEC_MPEG4Level0 = 0x01, | 
|  | 342 | VDEC_MPEG4Level0b = 0x02, | 
|  | 343 | VDEC_MPEG4Level1 = 0x04, | 
|  | 344 | VDEC_MPEG4Level2 = 0x08, | 
|  | 345 | VDEC_MPEG4Level3 = 0x10, | 
|  | 346 | VDEC_MPEG4Level4 = 0x20, | 
|  | 347 | VDEC_MPEG4Level4a = 0x40, | 
|  | 348 | VDEC_MPEG4Level5 = 0x80, | 
|  | 349 | VDEC_MPEG4LevelKhronosExtensions = 0x6F000000, | 
|  | 350 | VDEC_MPEG4LevelVendorStartUnused = 0x7F000000, | 
|  | 351 | VDEC_MPEG4LevelMax = 0x7FFFFFFF | 
|  | 352 | }; | 
|  | 353 |  | 
|  | 354 | enum vdec_avc_profile { | 
|  | 355 | VDEC_AVCProfileBaseline = 0x01, | 
|  | 356 | VDEC_AVCProfileMain = 0x02, | 
|  | 357 | VDEC_AVCProfileExtended = 0x04, | 
|  | 358 | VDEC_AVCProfileHigh = 0x08, | 
|  | 359 | VDEC_AVCProfileHigh10 = 0x10, | 
|  | 360 | VDEC_AVCProfileHigh422 = 0x20, | 
|  | 361 | VDEC_AVCProfileHigh444 = 0x40, | 
|  | 362 | VDEC_AVCProfileKhronosExtensions = 0x6F000000, | 
|  | 363 | VDEC_AVCProfileVendorStartUnused = 0x7F000000, | 
|  | 364 | VDEC_AVCProfileMax = 0x7FFFFFFF | 
|  | 365 | }; | 
|  | 366 |  | 
|  | 367 | enum vdec_avc_level { | 
|  | 368 | VDEC_AVCLevel1 = 0x01, | 
|  | 369 | VDEC_AVCLevel1b = 0x02, | 
|  | 370 | VDEC_AVCLevel11 = 0x04, | 
|  | 371 | VDEC_AVCLevel12 = 0x08, | 
|  | 372 | VDEC_AVCLevel13 = 0x10, | 
|  | 373 | VDEC_AVCLevel2 = 0x20, | 
|  | 374 | VDEC_AVCLevel21 = 0x40, | 
|  | 375 | VDEC_AVCLevel22 = 0x80, | 
|  | 376 | VDEC_AVCLevel3 = 0x100, | 
|  | 377 | VDEC_AVCLevel31 = 0x200, | 
|  | 378 | VDEC_AVCLevel32 = 0x400, | 
|  | 379 | VDEC_AVCLevel4 = 0x800, | 
|  | 380 | VDEC_AVCLevel41 = 0x1000, | 
|  | 381 | VDEC_AVCLevel42 = 0x2000, | 
|  | 382 | VDEC_AVCLevel5 = 0x4000, | 
|  | 383 | VDEC_AVCLevel51 = 0x8000, | 
|  | 384 | VDEC_AVCLevelKhronosExtensions = 0x6F000000, | 
|  | 385 | VDEC_AVCLevelVendorStartUnused = 0x7F000000, | 
|  | 386 | VDEC_AVCLevelMax = 0x7FFFFFFF | 
|  | 387 | }; | 
|  | 388 |  | 
|  | 389 | enum vdec_divx_profile { | 
|  | 390 | VDEC_DIVXProfile_qMobile = 0x01, | 
|  | 391 | VDEC_DIVXProfile_Mobile = 0x02, | 
|  | 392 | VDEC_DIVXProfile_HD = 0x04, | 
|  | 393 | VDEC_DIVXProfile_Handheld = 0x08, | 
|  | 394 | VDEC_DIVXProfile_Portable = 0x10, | 
|  | 395 | VDEC_DIVXProfile_HomeTheater = 0x20 | 
|  | 396 | }; | 
|  | 397 |  | 
|  | 398 | enum vdec_xvid_profile { | 
|  | 399 | VDEC_XVIDProfile_Simple = 0x1, | 
|  | 400 | VDEC_XVIDProfile_Advanced_Realtime_Simple = 0x2, | 
|  | 401 | VDEC_XVIDProfile_Advanced_Simple = 0x4 | 
|  | 402 | }; | 
|  | 403 |  | 
|  | 404 | enum vdec_xvid_level { | 
|  | 405 | VDEC_XVID_LEVEL_S_L0 = 0x1, | 
|  | 406 | VDEC_XVID_LEVEL_S_L1 = 0x2, | 
|  | 407 | VDEC_XVID_LEVEL_S_L2 = 0x4, | 
|  | 408 | VDEC_XVID_LEVEL_S_L3 = 0x8, | 
|  | 409 | VDEC_XVID_LEVEL_ARTS_L1 = 0x10, | 
|  | 410 | VDEC_XVID_LEVEL_ARTS_L2 = 0x20, | 
|  | 411 | VDEC_XVID_LEVEL_ARTS_L3 = 0x40, | 
|  | 412 | VDEC_XVID_LEVEL_ARTS_L4 = 0x80, | 
|  | 413 | VDEC_XVID_LEVEL_AS_L0 = 0x100, | 
|  | 414 | VDEC_XVID_LEVEL_AS_L1 = 0x200, | 
|  | 415 | VDEC_XVID_LEVEL_AS_L2 = 0x400, | 
|  | 416 | VDEC_XVID_LEVEL_AS_L3 = 0x800, | 
|  | 417 | VDEC_XVID_LEVEL_AS_L4 = 0x1000 | 
|  | 418 | }; | 
|  | 419 |  | 
|  | 420 | enum vdec_h263profile { | 
|  | 421 | VDEC_H263ProfileBaseline = 0x01, | 
|  | 422 | VDEC_H263ProfileH320Coding = 0x02, | 
|  | 423 | VDEC_H263ProfileBackwardCompatible = 0x04, | 
|  | 424 | VDEC_H263ProfileISWV2 = 0x08, | 
|  | 425 | VDEC_H263ProfileISWV3 = 0x10, | 
|  | 426 | VDEC_H263ProfileHighCompression = 0x20, | 
|  | 427 | VDEC_H263ProfileInternet = 0x40, | 
|  | 428 | VDEC_H263ProfileInterlace = 0x80, | 
|  | 429 | VDEC_H263ProfileHighLatency = 0x100, | 
|  | 430 | VDEC_H263ProfileKhronosExtensions = 0x6F000000, | 
|  | 431 | VDEC_H263ProfileVendorStartUnused = 0x7F000000, | 
|  | 432 | VDEC_H263ProfileMax = 0x7FFFFFFF | 
|  | 433 | }; | 
|  | 434 |  | 
|  | 435 | enum vdec_h263level { | 
|  | 436 | VDEC_H263Level10 = 0x01, | 
|  | 437 | VDEC_H263Level20 = 0x02, | 
|  | 438 | VDEC_H263Level30 = 0x04, | 
|  | 439 | VDEC_H263Level40 = 0x08, | 
|  | 440 | VDEC_H263Level45 = 0x10, | 
|  | 441 | VDEC_H263Level50 = 0x20, | 
|  | 442 | VDEC_H263Level60 = 0x40, | 
|  | 443 | VDEC_H263Level70 = 0x80, | 
|  | 444 | VDEC_H263LevelKhronosExtensions = 0x6F000000, | 
|  | 445 | VDEC_H263LevelVendorStartUnused = 0x7F000000, | 
|  | 446 | VDEC_H263LevelMax = 0x7FFFFFFF | 
|  | 447 | }; | 
|  | 448 |  | 
|  | 449 | enum vdec_wmv_format { | 
|  | 450 | VDEC_WMVFormatUnused = 0x01, | 
|  | 451 | VDEC_WMVFormat7 = 0x02, | 
|  | 452 | VDEC_WMVFormat8 = 0x04, | 
|  | 453 | VDEC_WMVFormat9 = 0x08, | 
|  | 454 | VDEC_WMFFormatKhronosExtensions = 0x6F000000, | 
|  | 455 | VDEC_WMFFormatVendorStartUnused = 0x7F000000, | 
|  | 456 | VDEC_WMVFormatMax = 0x7FFFFFFF | 
|  | 457 | }; | 
|  | 458 |  | 
|  | 459 | enum vdec_vc1_profile { | 
|  | 460 | VDEC_VC1ProfileSimple = 0x1, | 
|  | 461 | VDEC_VC1ProfileMain = 0x2, | 
|  | 462 | VDEC_VC1ProfileAdvanced = 0x4 | 
|  | 463 | }; | 
|  | 464 |  | 
|  | 465 | enum vdec_vc1_level { | 
|  | 466 | VDEC_VC1_LEVEL_S_Low = 0x1, | 
|  | 467 | VDEC_VC1_LEVEL_S_Medium = 0x2, | 
|  | 468 | VDEC_VC1_LEVEL_M_Low = 0x4, | 
|  | 469 | VDEC_VC1_LEVEL_M_Medium = 0x8, | 
|  | 470 | VDEC_VC1_LEVEL_M_High = 0x10, | 
|  | 471 | VDEC_VC1_LEVEL_A_L0 = 0x20, | 
|  | 472 | VDEC_VC1_LEVEL_A_L1 = 0x40, | 
|  | 473 | VDEC_VC1_LEVEL_A_L2 = 0x80, | 
|  | 474 | VDEC_VC1_LEVEL_A_L3 = 0x100, | 
|  | 475 | VDEC_VC1_LEVEL_A_L4 = 0x200 | 
|  | 476 | }; | 
|  | 477 |  | 
|  | 478 | struct vdec_profile_level { | 
|  | 479 | uint32_t profiles; | 
|  | 480 | uint32_t levels; | 
|  | 481 | }; | 
|  | 482 |  | 
|  | 483 | enum vdec_interlaced_format { | 
|  | 484 | VDEC_InterlaceFrameProgressive = 0x1, | 
|  | 485 | VDEC_InterlaceInterleaveFrameTopFieldFirst = 0x2, | 
|  | 486 | VDEC_InterlaceInterleaveFrameBottomFieldFirst = 0x4 | 
|  | 487 | }; | 
|  | 488 |  | 
|  | 489 | enum vdec_output_fromat { | 
|  | 490 | VDEC_YUV_FORMAT_NV12 = 0x1, | 
|  | 491 | VDEC_YUV_FORMAT_TILE_4x2 = 0x2 | 
|  | 492 | }; | 
|  | 493 |  | 
|  | 494 | enum vdec_output_order { | 
|  | 495 | VDEC_ORDER_DISPLAY = 0x1, | 
|  | 496 | VDEC_ORDER_DECODE = 0x2 | 
|  | 497 | }; | 
|  | 498 |  | 
|  | 499 | struct vdec_picsize { | 
|  | 500 | uint32_t frame_width; | 
|  | 501 | uint32_t frame_height; | 
|  | 502 | uint32_t stride; | 
|  | 503 | uint32_t scan_lines; | 
|  | 504 | }; | 
|  | 505 |  | 
|  | 506 | struct vdec_seqheader { | 
|  | 507 | void __user *ptr_seqheader; | 
|  | 508 | size_t seq_header_len; | 
|  | 509 | int pmem_fd; | 
|  | 510 | size_t pmem_offset; | 
|  | 511 | }; | 
|  | 512 |  | 
|  | 513 | struct vdec_mberror { | 
|  | 514 | void __user *ptr_errormap; | 
|  | 515 | size_t err_mapsize; | 
|  | 516 | }; | 
|  | 517 |  | 
|  | 518 | struct vdec_input_frameinfo { | 
|  | 519 | void __user *bufferaddr; | 
|  | 520 | size_t offset; | 
|  | 521 | size_t datalen; | 
|  | 522 | uint32_t flags; | 
|  | 523 | int64_t timestamp; | 
|  | 524 | void *client_data; | 
|  | 525 | int pmem_fd; | 
|  | 526 | size_t pmem_offset; | 
| Deepika Pepakayala | a5ede60 | 2011-12-02 11:33:26 -0800 | [diff] [blame] | 527 | void __user *desc_addr; | 
|  | 528 | uint32_t desc_size; | 
| Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 529 | }; | 
|  | 530 |  | 
|  | 531 | struct vdec_framesize { | 
|  | 532 | uint32_t   left; | 
|  | 533 | uint32_t   top; | 
|  | 534 | uint32_t   right; | 
|  | 535 | uint32_t   bottom; | 
|  | 536 | }; | 
|  | 537 |  | 
| Arun Menon | d5a0297 | 2012-03-01 10:51:06 -0800 | [diff] [blame] | 538 | struct vdec_aspectratioinfo { | 
|  | 539 | uint32_t aspect_ratio; | 
|  | 540 | uint32_t par_width; | 
|  | 541 | uint32_t par_height; | 
|  | 542 | }; | 
|  | 543 |  | 
| Deepak Verma | eb8179b | 2013-01-25 11:57:52 +0530 | [diff] [blame] | 544 | struct vdec_sep_metadatainfo { | 
|  | 545 | void __user *metabufaddr; | 
|  | 546 | uint32_t size; | 
|  | 547 | }; | 
|  | 548 |  | 
| Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 549 | struct vdec_output_frameinfo { | 
|  | 550 | void __user *bufferaddr; | 
|  | 551 | size_t offset; | 
|  | 552 | size_t len; | 
|  | 553 | uint32_t flags; | 
|  | 554 | int64_t time_stamp; | 
|  | 555 | enum vdec_picture pic_type; | 
|  | 556 | void *client_data; | 
|  | 557 | void *input_frame_clientdata; | 
|  | 558 | struct vdec_framesize framesize; | 
|  | 559 | enum vdec_interlaced_format interlaced_format; | 
| Arun Menon | d5a0297 | 2012-03-01 10:51:06 -0800 | [diff] [blame] | 560 | struct vdec_aspectratioinfo aspect_ratio_info; | 
| Deepak Verma | eb8179b | 2013-01-25 11:57:52 +0530 | [diff] [blame] | 561 | struct vdec_sep_metadatainfo metadata_info; | 
| Maheshwar Ajja | 075e865 | 2013-04-17 16:47:22 +0530 | [diff] [blame] | 562 | size_t metadata_len; | 
|  | 563 | size_t metadata_offset; | 
| Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 564 | }; | 
|  | 565 |  | 
|  | 566 | union vdec_msgdata { | 
|  | 567 | struct vdec_output_frameinfo output_frame; | 
|  | 568 | void *input_frame_clientdata; | 
|  | 569 | }; | 
|  | 570 |  | 
|  | 571 | struct vdec_msginfo { | 
|  | 572 | uint32_t status_code; | 
|  | 573 | uint32_t msgcode; | 
|  | 574 | union vdec_msgdata msgdata; | 
|  | 575 | size_t msgdatasize; | 
|  | 576 | }; | 
|  | 577 |  | 
|  | 578 | struct vdec_framerate { | 
|  | 579 | unsigned long fps_denominator; | 
|  | 580 | unsigned long fps_numerator; | 
|  | 581 | }; | 
|  | 582 |  | 
|  | 583 | struct vdec_h264_mv{ | 
|  | 584 | size_t size; | 
|  | 585 | int count; | 
|  | 586 | int pmem_fd; | 
|  | 587 | int offset; | 
|  | 588 | }; | 
|  | 589 |  | 
|  | 590 | struct vdec_mv_buff_size{ | 
|  | 591 | int width; | 
|  | 592 | int height; | 
|  | 593 | int size; | 
|  | 594 | int alignment; | 
|  | 595 | }; | 
|  | 596 |  | 
| Deepak Verma | eb8179b | 2013-01-25 11:57:52 +0530 | [diff] [blame] | 597 | struct vdec_meta_buffers { | 
|  | 598 | size_t size; | 
|  | 599 | int count; | 
|  | 600 | int pmem_fd; | 
|  | 601 | int pmem_fd_iommu; | 
|  | 602 | int offset; | 
|  | 603 | }; | 
|  | 604 |  | 
| Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 605 | #endif /* end of macro _VDECDECODER_H_ */ |