blob: 55699a216f937a0177a545a1c7349157d346ce69 [file] [log] [blame]
eric miao8f58de72007-12-19 17:14:02 +08001#include <linux/module.h>
2#include <linux/kernel.h>
3#include <linux/init.h>
4#include <linux/platform_device.h>
5#include <linux/dma-mapping.h>
6
Eric Miao80796f22008-11-25 11:03:03 +08007#include <mach/pxa-regs.h>
Russell Kinga09e64f2008-08-05 16:14:15 +01008#include <mach/udc.h>
9#include <mach/pxafb.h>
10#include <mach/mmc.h>
11#include <mach/irda.h>
12#include <mach/i2c.h>
13#include <mach/mfp-pxa27x.h>
14#include <mach/ohci.h>
15#include <mach/pxa27x_keypad.h>
16#include <mach/pxa2xx_spi.h>
17#include <mach/camera.h>
18#include <mach/audio.h>
19#include <mach/pxa3xx_nand.h>
eric miao8f58de72007-12-19 17:14:02 +080020
21#include "devices.h"
Philipp Zabelbc3a5952008-06-02 18:49:27 +010022#include "generic.h"
eric miao8f58de72007-12-19 17:14:02 +080023
24void __init pxa_register_device(struct platform_device *dev, void *data)
25{
26 int ret;
27
28 dev->dev.platform_data = data;
29
30 ret = platform_device_register(dev);
31 if (ret)
32 dev_err(&dev->dev, "unable to register device: %d\n", ret);
33}
34
35static struct resource pxamci_resources[] = {
36 [0] = {
37 .start = 0x41100000,
38 .end = 0x41100fff,
39 .flags = IORESOURCE_MEM,
40 },
41 [1] = {
42 .start = IRQ_MMC,
43 .end = IRQ_MMC,
44 .flags = IORESOURCE_IRQ,
45 },
46 [2] = {
47 .start = 21,
48 .end = 21,
49 .flags = IORESOURCE_DMA,
50 },
51 [3] = {
52 .start = 22,
53 .end = 22,
54 .flags = IORESOURCE_DMA,
55 },
56};
57
58static u64 pxamci_dmamask = 0xffffffffUL;
59
60struct platform_device pxa_device_mci = {
61 .name = "pxa2xx-mci",
Bridge Wufafc9d32007-12-21 19:00:13 +080062 .id = 0,
eric miao8f58de72007-12-19 17:14:02 +080063 .dev = {
64 .dma_mask = &pxamci_dmamask,
65 .coherent_dma_mask = 0xffffffff,
66 },
67 .num_resources = ARRAY_SIZE(pxamci_resources),
68 .resource = pxamci_resources,
69};
70
71void __init pxa_set_mci_info(struct pxamci_platform_data *info)
72{
73 pxa_register_device(&pxa_device_mci, info);
74}
75
76
77static struct pxa2xx_udc_mach_info pxa_udc_info;
78
79void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
80{
81 memcpy(&pxa_udc_info, info, sizeof *info);
82}
83
84static struct resource pxa2xx_udc_resources[] = {
85 [0] = {
86 .start = 0x40600000,
87 .end = 0x4060ffff,
88 .flags = IORESOURCE_MEM,
89 },
90 [1] = {
91 .start = IRQ_USB,
92 .end = IRQ_USB,
93 .flags = IORESOURCE_IRQ,
94 },
95};
96
97static u64 udc_dma_mask = ~(u32)0;
98
Philipp Zabel7a857622008-06-22 23:36:39 +010099struct platform_device pxa25x_device_udc = {
100 .name = "pxa25x-udc",
101 .id = -1,
102 .resource = pxa2xx_udc_resources,
103 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
104 .dev = {
105 .platform_data = &pxa_udc_info,
106 .dma_mask = &udc_dma_mask,
107 }
108};
109
110struct platform_device pxa27x_device_udc = {
111 .name = "pxa27x-udc",
eric miao8f58de72007-12-19 17:14:02 +0800112 .id = -1,
113 .resource = pxa2xx_udc_resources,
114 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
115 .dev = {
116 .platform_data = &pxa_udc_info,
117 .dma_mask = &udc_dma_mask,
118 }
119};
120
121static struct resource pxafb_resources[] = {
122 [0] = {
123 .start = 0x44000000,
124 .end = 0x4400ffff,
125 .flags = IORESOURCE_MEM,
126 },
127 [1] = {
128 .start = IRQ_LCD,
129 .end = IRQ_LCD,
130 .flags = IORESOURCE_IRQ,
131 },
132};
133
134static u64 fb_dma_mask = ~(u64)0;
135
136struct platform_device pxa_device_fb = {
137 .name = "pxa2xx-fb",
138 .id = -1,
139 .dev = {
140 .dma_mask = &fb_dma_mask,
141 .coherent_dma_mask = 0xffffffff,
142 },
143 .num_resources = ARRAY_SIZE(pxafb_resources),
144 .resource = pxafb_resources,
145};
146
147void __init set_pxa_fb_info(struct pxafb_mach_info *info)
148{
149 pxa_register_device(&pxa_device_fb, info);
150}
151
152void __init set_pxa_fb_parent(struct device *parent_dev)
153{
154 pxa_device_fb.dev.parent = parent_dev;
155}
156
157static struct resource pxa_resource_ffuart[] = {
158 {
Eric Miao02f65262008-11-28 14:08:53 +0800159 .start = 0x40100000,
160 .end = 0x40100023,
eric miao8f58de72007-12-19 17:14:02 +0800161 .flags = IORESOURCE_MEM,
162 }, {
163 .start = IRQ_FFUART,
164 .end = IRQ_FFUART,
165 .flags = IORESOURCE_IRQ,
166 }
167};
168
169struct platform_device pxa_device_ffuart= {
170 .name = "pxa2xx-uart",
171 .id = 0,
172 .resource = pxa_resource_ffuart,
173 .num_resources = ARRAY_SIZE(pxa_resource_ffuart),
174};
175
176static struct resource pxa_resource_btuart[] = {
177 {
Eric Miao02f65262008-11-28 14:08:53 +0800178 .start = 0x40200000,
179 .end = 0x40200023,
eric miao8f58de72007-12-19 17:14:02 +0800180 .flags = IORESOURCE_MEM,
181 }, {
182 .start = IRQ_BTUART,
183 .end = IRQ_BTUART,
184 .flags = IORESOURCE_IRQ,
185 }
186};
187
188struct platform_device pxa_device_btuart = {
189 .name = "pxa2xx-uart",
190 .id = 1,
191 .resource = pxa_resource_btuart,
192 .num_resources = ARRAY_SIZE(pxa_resource_btuart),
193};
194
195static struct resource pxa_resource_stuart[] = {
196 {
Eric Miao02f65262008-11-28 14:08:53 +0800197 .start = 0x40700000,
198 .end = 0x40700023,
eric miao8f58de72007-12-19 17:14:02 +0800199 .flags = IORESOURCE_MEM,
200 }, {
201 .start = IRQ_STUART,
202 .end = IRQ_STUART,
203 .flags = IORESOURCE_IRQ,
204 }
205};
206
207struct platform_device pxa_device_stuart = {
208 .name = "pxa2xx-uart",
209 .id = 2,
210 .resource = pxa_resource_stuart,
211 .num_resources = ARRAY_SIZE(pxa_resource_stuart),
212};
213
214static struct resource pxa_resource_hwuart[] = {
215 {
Eric Miao02f65262008-11-28 14:08:53 +0800216 .start = 0x41600000,
217 .end = 0x4160002F,
eric miao8f58de72007-12-19 17:14:02 +0800218 .flags = IORESOURCE_MEM,
219 }, {
220 .start = IRQ_HWUART,
221 .end = IRQ_HWUART,
222 .flags = IORESOURCE_IRQ,
223 }
224};
225
226struct platform_device pxa_device_hwuart = {
227 .name = "pxa2xx-uart",
228 .id = 3,
229 .resource = pxa_resource_hwuart,
230 .num_resources = ARRAY_SIZE(pxa_resource_hwuart),
231};
232
233static struct resource pxai2c_resources[] = {
234 {
235 .start = 0x40301680,
236 .end = 0x403016a3,
237 .flags = IORESOURCE_MEM,
238 }, {
239 .start = IRQ_I2C,
240 .end = IRQ_I2C,
241 .flags = IORESOURCE_IRQ,
242 },
243};
244
245struct platform_device pxa_device_i2c = {
246 .name = "pxa2xx-i2c",
247 .id = 0,
248 .resource = pxai2c_resources,
249 .num_resources = ARRAY_SIZE(pxai2c_resources),
250};
251
Philipp Zabelbc3a5952008-06-02 18:49:27 +0100252static unsigned long pxa27x_i2c_mfp_cfg[] = {
253 GPIO117_I2C_SCL,
254 GPIO118_I2C_SDA,
255};
256
eric miao8f58de72007-12-19 17:14:02 +0800257void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
258{
Philipp Zabelbc3a5952008-06-02 18:49:27 +0100259 if (cpu_is_pxa27x())
260 pxa2xx_mfp_config(ARRAY_AND_SIZE(pxa27x_i2c_mfp_cfg));
eric miao8f58de72007-12-19 17:14:02 +0800261 pxa_register_device(&pxa_device_i2c, info);
262}
263
Eric Miao99464292008-11-28 15:01:55 +0800264#ifdef CONFIG_PXA27x
265static struct resource pxa27x_resources_i2c_power[] = {
266 {
267 .start = 0x40f00180,
268 .end = 0x40f001a3,
269 .flags = IORESOURCE_MEM,
270 }, {
271 .start = IRQ_PWRI2C,
272 .end = IRQ_PWRI2C,
273 .flags = IORESOURCE_IRQ,
274 },
275};
276
277struct platform_device pxa27x_device_i2c_power = {
278 .name = "pxa2xx-i2c",
279 .id = 1,
280 .resource = pxa27x_resources_i2c_power,
281 .num_resources = ARRAY_SIZE(pxa27x_resources_i2c_power),
282};
283#endif
284
285#ifdef CONFIG_PXA3xx
286static struct resource pxa3xx_resources_i2c_power[] = {
287 {
288 .start = 0x40f500c0,
289 .end = 0x40f500d3,
290 .flags = IORESOURCE_MEM,
291 }, {
292 .start = IRQ_PWRI2C,
293 .end = IRQ_PWRI2C,
294 .flags = IORESOURCE_IRQ,
295 },
296};
297
298struct platform_device pxa3xx_device_i2c_power = {
299 .name = "pxa2xx-i2c",
300 .id = 1,
301 .resource = pxa3xx_resources_i2c_power,
302 .num_resources = ARRAY_SIZE(pxa3xx_resources_i2c_power),
303};
304#endif
305
eric miao8f58de72007-12-19 17:14:02 +0800306static struct resource pxai2s_resources[] = {
307 {
308 .start = 0x40400000,
309 .end = 0x40400083,
310 .flags = IORESOURCE_MEM,
311 }, {
312 .start = IRQ_I2S,
313 .end = IRQ_I2S,
314 .flags = IORESOURCE_IRQ,
315 },
316};
317
318struct platform_device pxa_device_i2s = {
319 .name = "pxa2xx-i2s",
320 .id = -1,
321 .resource = pxai2s_resources,
322 .num_resources = ARRAY_SIZE(pxai2s_resources),
323};
324
325static u64 pxaficp_dmamask = ~(u32)0;
326
327struct platform_device pxa_device_ficp = {
328 .name = "pxa2xx-ir",
329 .id = -1,
330 .dev = {
331 .dma_mask = &pxaficp_dmamask,
332 .coherent_dma_mask = 0xffffffff,
333 },
334};
335
336void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
337{
338 pxa_register_device(&pxa_device_ficp, info);
339}
340
341struct platform_device pxa_device_rtc = {
342 .name = "sa1100-rtc",
343 .id = -1,
344};
345
Mark Brown9f19d632008-06-10 12:30:05 +0100346static struct resource pxa_ac97_resources[] = {
347 [0] = {
348 .start = 0x40500000,
349 .end = 0x40500000 + 0xfff,
350 .flags = IORESOURCE_MEM,
351 },
352 [1] = {
353 .start = IRQ_AC97,
354 .end = IRQ_AC97,
355 .flags = IORESOURCE_IRQ,
356 },
357};
358
359static u64 pxa_ac97_dmamask = 0xffffffffUL;
360
361struct platform_device pxa_device_ac97 = {
362 .name = "pxa2xx-ac97",
363 .id = -1,
364 .dev = {
365 .dma_mask = &pxa_ac97_dmamask,
366 .coherent_dma_mask = 0xffffffff,
367 },
368 .num_resources = ARRAY_SIZE(pxa_ac97_resources),
369 .resource = pxa_ac97_resources,
370};
371
372void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops)
373{
374 pxa_register_device(&pxa_device_ac97, ops);
375}
376
eric miao8f58de72007-12-19 17:14:02 +0800377#ifdef CONFIG_PXA25x
378
eric miao75540c12008-04-13 21:44:04 +0100379static struct resource pxa25x_resource_pwm0[] = {
380 [0] = {
381 .start = 0x40b00000,
382 .end = 0x40b0000f,
383 .flags = IORESOURCE_MEM,
384 },
385};
386
387struct platform_device pxa25x_device_pwm0 = {
388 .name = "pxa25x-pwm",
389 .id = 0,
390 .resource = pxa25x_resource_pwm0,
391 .num_resources = ARRAY_SIZE(pxa25x_resource_pwm0),
392};
393
394static struct resource pxa25x_resource_pwm1[] = {
395 [0] = {
396 .start = 0x40c00000,
397 .end = 0x40c0000f,
398 .flags = IORESOURCE_MEM,
399 },
400};
401
402struct platform_device pxa25x_device_pwm1 = {
403 .name = "pxa25x-pwm",
404 .id = 1,
405 .resource = pxa25x_resource_pwm1,
406 .num_resources = ARRAY_SIZE(pxa25x_resource_pwm1),
407};
408
eric miao8f58de72007-12-19 17:14:02 +0800409static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
410
411static struct resource pxa25x_resource_ssp[] = {
412 [0] = {
413 .start = 0x41000000,
414 .end = 0x4100001f,
415 .flags = IORESOURCE_MEM,
416 },
417 [1] = {
418 .start = IRQ_SSP,
419 .end = IRQ_SSP,
420 .flags = IORESOURCE_IRQ,
421 },
422 [2] = {
423 /* DRCMR for RX */
424 .start = 13,
425 .end = 13,
426 .flags = IORESOURCE_DMA,
427 },
428 [3] = {
429 /* DRCMR for TX */
430 .start = 14,
431 .end = 14,
432 .flags = IORESOURCE_DMA,
433 },
434};
435
436struct platform_device pxa25x_device_ssp = {
437 .name = "pxa25x-ssp",
438 .id = 0,
439 .dev = {
440 .dma_mask = &pxa25x_ssp_dma_mask,
441 .coherent_dma_mask = DMA_BIT_MASK(32),
442 },
443 .resource = pxa25x_resource_ssp,
444 .num_resources = ARRAY_SIZE(pxa25x_resource_ssp),
445};
446
447static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
448
449static struct resource pxa25x_resource_nssp[] = {
450 [0] = {
451 .start = 0x41400000,
452 .end = 0x4140002f,
453 .flags = IORESOURCE_MEM,
454 },
455 [1] = {
456 .start = IRQ_NSSP,
457 .end = IRQ_NSSP,
458 .flags = IORESOURCE_IRQ,
459 },
460 [2] = {
461 /* DRCMR for RX */
462 .start = 15,
463 .end = 15,
464 .flags = IORESOURCE_DMA,
465 },
466 [3] = {
467 /* DRCMR for TX */
468 .start = 16,
469 .end = 16,
470 .flags = IORESOURCE_DMA,
471 },
472};
473
474struct platform_device pxa25x_device_nssp = {
475 .name = "pxa25x-nssp",
476 .id = 1,
477 .dev = {
478 .dma_mask = &pxa25x_nssp_dma_mask,
479 .coherent_dma_mask = DMA_BIT_MASK(32),
480 },
481 .resource = pxa25x_resource_nssp,
482 .num_resources = ARRAY_SIZE(pxa25x_resource_nssp),
483};
484
485static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
486
487static struct resource pxa25x_resource_assp[] = {
488 [0] = {
489 .start = 0x41500000,
490 .end = 0x4150002f,
491 .flags = IORESOURCE_MEM,
492 },
493 [1] = {
494 .start = IRQ_ASSP,
495 .end = IRQ_ASSP,
496 .flags = IORESOURCE_IRQ,
497 },
498 [2] = {
499 /* DRCMR for RX */
500 .start = 23,
501 .end = 23,
502 .flags = IORESOURCE_DMA,
503 },
504 [3] = {
505 /* DRCMR for TX */
506 .start = 24,
507 .end = 24,
508 .flags = IORESOURCE_DMA,
509 },
510};
511
512struct platform_device pxa25x_device_assp = {
513 /* ASSP is basically equivalent to NSSP */
514 .name = "pxa25x-nssp",
515 .id = 2,
516 .dev = {
517 .dma_mask = &pxa25x_assp_dma_mask,
518 .coherent_dma_mask = DMA_BIT_MASK(32),
519 },
520 .resource = pxa25x_resource_assp,
521 .num_resources = ARRAY_SIZE(pxa25x_resource_assp),
522};
523#endif /* CONFIG_PXA25x */
524
525#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
526
eric miao37320982008-01-23 13:39:13 +0800527static struct resource pxa27x_resource_keypad[] = {
528 [0] = {
529 .start = 0x41500000,
530 .end = 0x4150004c,
531 .flags = IORESOURCE_MEM,
532 },
533 [1] = {
534 .start = IRQ_KEYPAD,
535 .end = IRQ_KEYPAD,
536 .flags = IORESOURCE_IRQ,
537 },
538};
539
540struct platform_device pxa27x_device_keypad = {
541 .name = "pxa27x-keypad",
542 .id = -1,
543 .resource = pxa27x_resource_keypad,
544 .num_resources = ARRAY_SIZE(pxa27x_resource_keypad),
545};
546
547void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
548{
549 pxa_register_device(&pxa27x_device_keypad, info);
550}
551
eric miaoec68e452007-12-12 09:29:33 +0800552static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
553
554static struct resource pxa27x_resource_ohci[] = {
555 [0] = {
556 .start = 0x4C000000,
557 .end = 0x4C00ff6f,
558 .flags = IORESOURCE_MEM,
559 },
560 [1] = {
561 .start = IRQ_USBH1,
562 .end = IRQ_USBH1,
563 .flags = IORESOURCE_IRQ,
564 },
565};
566
567struct platform_device pxa27x_device_ohci = {
568 .name = "pxa27x-ohci",
569 .id = -1,
570 .dev = {
571 .dma_mask = &pxa27x_ohci_dma_mask,
572 .coherent_dma_mask = DMA_BIT_MASK(32),
573 },
574 .num_resources = ARRAY_SIZE(pxa27x_resource_ohci),
575 .resource = pxa27x_resource_ohci,
576};
577
578void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
579{
580 pxa_register_device(&pxa27x_device_ohci, info);
581}
582
eric miao8f58de72007-12-19 17:14:02 +0800583static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
584
585static struct resource pxa27x_resource_ssp1[] = {
586 [0] = {
587 .start = 0x41000000,
588 .end = 0x4100003f,
589 .flags = IORESOURCE_MEM,
590 },
591 [1] = {
592 .start = IRQ_SSP,
593 .end = IRQ_SSP,
594 .flags = IORESOURCE_IRQ,
595 },
596 [2] = {
597 /* DRCMR for RX */
598 .start = 13,
599 .end = 13,
600 .flags = IORESOURCE_DMA,
601 },
602 [3] = {
603 /* DRCMR for TX */
604 .start = 14,
605 .end = 14,
606 .flags = IORESOURCE_DMA,
607 },
608};
609
610struct platform_device pxa27x_device_ssp1 = {
611 .name = "pxa27x-ssp",
612 .id = 0,
613 .dev = {
614 .dma_mask = &pxa27x_ssp1_dma_mask,
615 .coherent_dma_mask = DMA_BIT_MASK(32),
616 },
617 .resource = pxa27x_resource_ssp1,
618 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1),
619};
620
621static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
622
623static struct resource pxa27x_resource_ssp2[] = {
624 [0] = {
625 .start = 0x41700000,
626 .end = 0x4170003f,
627 .flags = IORESOURCE_MEM,
628 },
629 [1] = {
630 .start = IRQ_SSP2,
631 .end = IRQ_SSP2,
632 .flags = IORESOURCE_IRQ,
633 },
634 [2] = {
635 /* DRCMR for RX */
636 .start = 15,
637 .end = 15,
638 .flags = IORESOURCE_DMA,
639 },
640 [3] = {
641 /* DRCMR for TX */
642 .start = 16,
643 .end = 16,
644 .flags = IORESOURCE_DMA,
645 },
646};
647
648struct platform_device pxa27x_device_ssp2 = {
649 .name = "pxa27x-ssp",
650 .id = 1,
651 .dev = {
652 .dma_mask = &pxa27x_ssp2_dma_mask,
653 .coherent_dma_mask = DMA_BIT_MASK(32),
654 },
655 .resource = pxa27x_resource_ssp2,
656 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2),
657};
658
659static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
660
661static struct resource pxa27x_resource_ssp3[] = {
662 [0] = {
663 .start = 0x41900000,
664 .end = 0x4190003f,
665 .flags = IORESOURCE_MEM,
666 },
667 [1] = {
668 .start = IRQ_SSP3,
669 .end = IRQ_SSP3,
670 .flags = IORESOURCE_IRQ,
671 },
672 [2] = {
673 /* DRCMR for RX */
674 .start = 66,
675 .end = 66,
676 .flags = IORESOURCE_DMA,
677 },
678 [3] = {
679 /* DRCMR for TX */
680 .start = 67,
681 .end = 67,
682 .flags = IORESOURCE_DMA,
683 },
684};
685
686struct platform_device pxa27x_device_ssp3 = {
687 .name = "pxa27x-ssp",
688 .id = 2,
689 .dev = {
690 .dma_mask = &pxa27x_ssp3_dma_mask,
691 .coherent_dma_mask = DMA_BIT_MASK(32),
692 },
693 .resource = pxa27x_resource_ssp3,
694 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3),
695};
Guennadi Liakhovetski3f3acef2008-04-11 22:19:45 +0200696
eric miao75540c12008-04-13 21:44:04 +0100697static struct resource pxa27x_resource_pwm0[] = {
698 [0] = {
699 .start = 0x40b00000,
700 .end = 0x40b0001f,
701 .flags = IORESOURCE_MEM,
702 },
703};
704
705struct platform_device pxa27x_device_pwm0 = {
706 .name = "pxa27x-pwm",
707 .id = 0,
708 .resource = pxa27x_resource_pwm0,
709 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm0),
710};
711
712static struct resource pxa27x_resource_pwm1[] = {
713 [0] = {
714 .start = 0x40c00000,
715 .end = 0x40c0001f,
716 .flags = IORESOURCE_MEM,
717 },
718};
719
720struct platform_device pxa27x_device_pwm1 = {
721 .name = "pxa27x-pwm",
722 .id = 1,
723 .resource = pxa27x_resource_pwm1,
724 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm1),
725};
726
Guennadi Liakhovetski3f3acef2008-04-11 22:19:45 +0200727static struct resource pxa27x_resource_camera[] = {
728 [0] = {
729 .start = 0x50000000,
730 .end = 0x50000fff,
731 .flags = IORESOURCE_MEM,
732 },
733 [1] = {
734 .start = IRQ_CAMERA,
735 .end = IRQ_CAMERA,
736 .flags = IORESOURCE_IRQ,
737 },
738};
739
740static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
741
742static struct platform_device pxa27x_device_camera = {
743 .name = "pxa27x-camera",
744 .id = 0, /* This is used to put cameras on this interface */
745 .dev = {
746 .dma_mask = &pxa27x_dma_mask_camera,
747 .coherent_dma_mask = 0xffffffff,
748 },
749 .num_resources = ARRAY_SIZE(pxa27x_resource_camera),
750 .resource = pxa27x_resource_camera,
751};
752
753void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
754{
755 pxa_register_device(&pxa27x_device_camera, info);
756}
eric miao8f58de72007-12-19 17:14:02 +0800757#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
758
759#ifdef CONFIG_PXA3xx
760static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
761
762static struct resource pxa3xx_resource_ssp4[] = {
763 [0] = {
764 .start = 0x41a00000,
765 .end = 0x41a0003f,
766 .flags = IORESOURCE_MEM,
767 },
768 [1] = {
769 .start = IRQ_SSP4,
770 .end = IRQ_SSP4,
771 .flags = IORESOURCE_IRQ,
772 },
773 [2] = {
774 /* DRCMR for RX */
775 .start = 2,
776 .end = 2,
777 .flags = IORESOURCE_DMA,
778 },
779 [3] = {
780 /* DRCMR for TX */
781 .start = 3,
782 .end = 3,
783 .flags = IORESOURCE_DMA,
784 },
785};
786
787struct platform_device pxa3xx_device_ssp4 = {
788 /* PXA3xx SSP is basically equivalent to PXA27x */
789 .name = "pxa27x-ssp",
790 .id = 3,
791 .dev = {
792 .dma_mask = &pxa3xx_ssp4_dma_mask,
793 .coherent_dma_mask = DMA_BIT_MASK(32),
794 },
795 .resource = pxa3xx_resource_ssp4,
796 .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4),
797};
Bridge Wu8d33b052007-12-21 19:15:36 +0800798
799static struct resource pxa3xx_resources_mci2[] = {
800 [0] = {
801 .start = 0x42000000,
802 .end = 0x42000fff,
803 .flags = IORESOURCE_MEM,
804 },
805 [1] = {
806 .start = IRQ_MMC2,
807 .end = IRQ_MMC2,
808 .flags = IORESOURCE_IRQ,
809 },
810 [2] = {
811 .start = 93,
812 .end = 93,
813 .flags = IORESOURCE_DMA,
814 },
815 [3] = {
816 .start = 94,
817 .end = 94,
818 .flags = IORESOURCE_DMA,
819 },
820};
821
822struct platform_device pxa3xx_device_mci2 = {
823 .name = "pxa2xx-mci",
824 .id = 1,
825 .dev = {
826 .dma_mask = &pxamci_dmamask,
827 .coherent_dma_mask = 0xffffffff,
828 },
829 .num_resources = ARRAY_SIZE(pxa3xx_resources_mci2),
830 .resource = pxa3xx_resources_mci2,
831};
832
833void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
834{
835 pxa_register_device(&pxa3xx_device_mci2, info);
836}
837
Bridge Wu5a1f21b2007-12-21 19:27:08 +0800838static struct resource pxa3xx_resources_mci3[] = {
839 [0] = {
840 .start = 0x42500000,
841 .end = 0x42500fff,
842 .flags = IORESOURCE_MEM,
843 },
844 [1] = {
845 .start = IRQ_MMC3,
846 .end = IRQ_MMC3,
847 .flags = IORESOURCE_IRQ,
848 },
849 [2] = {
850 .start = 100,
851 .end = 100,
852 .flags = IORESOURCE_DMA,
853 },
854 [3] = {
855 .start = 101,
856 .end = 101,
857 .flags = IORESOURCE_DMA,
858 },
859};
860
861struct platform_device pxa3xx_device_mci3 = {
862 .name = "pxa2xx-mci",
863 .id = 2,
864 .dev = {
865 .dma_mask = &pxamci_dmamask,
866 .coherent_dma_mask = 0xffffffff,
867 },
868 .num_resources = ARRAY_SIZE(pxa3xx_resources_mci3),
869 .resource = pxa3xx_resources_mci3,
870};
871
872void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
873{
874 pxa_register_device(&pxa3xx_device_mci3, info);
875}
876
Eric Miao9ae819a2008-06-02 15:22:03 +0800877static struct resource pxa3xx_resources_nand[] = {
878 [0] = {
879 .start = 0x43100000,
880 .end = 0x43100053,
881 .flags = IORESOURCE_MEM,
882 },
883 [1] = {
884 .start = IRQ_NAND,
885 .end = IRQ_NAND,
886 .flags = IORESOURCE_IRQ,
887 },
888 [2] = {
889 /* DRCMR for Data DMA */
890 .start = 97,
891 .end = 97,
892 .flags = IORESOURCE_DMA,
893 },
894 [3] = {
895 /* DRCMR for Command DMA */
896 .start = 99,
897 .end = 99,
898 .flags = IORESOURCE_DMA,
899 },
900};
901
902static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32);
903
904struct platform_device pxa3xx_device_nand = {
905 .name = "pxa3xx-nand",
906 .id = -1,
907 .dev = {
908 .dma_mask = &pxa3xx_nand_dma_mask,
909 .coherent_dma_mask = DMA_BIT_MASK(32),
910 },
911 .num_resources = ARRAY_SIZE(pxa3xx_resources_nand),
912 .resource = pxa3xx_resources_nand,
913};
914
915void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
916{
917 pxa_register_device(&pxa3xx_device_nand, info);
918}
eric miao8f58de72007-12-19 17:14:02 +0800919#endif /* CONFIG_PXA3xx */
Guennadi Liakhovetskie1722742008-06-13 09:17:31 +0100920
921/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
922 * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
923void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info)
924{
925 struct platform_device *pd;
926
927 pd = platform_device_alloc("pxa2xx-spi", id);
928 if (pd == NULL) {
929 printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n",
930 id);
931 return;
932 }
933
934 pd->dev.platform_data = info;
935 platform_device_add(pd);
936}