blob: 18b641fc6b923cd19ef39e0c5239235059454173 [file] [log] [blame]
Kiran Kumar H Ndd128472011-12-01 09:35:34 -08001/* Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070013#ifndef __LINUX_MSM_CAMERA_H
14#define __LINUX_MSM_CAMERA_H
15
16#ifdef MSM_CAMERA_BIONIC
17#include <sys/types.h>
18#endif
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -080019#include <linux/videodev2.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070020#include <linux/types.h>
21#include <linux/ioctl.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070022#ifdef __KERNEL__
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070023#include <linux/cdev.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070024#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070025#ifdef MSM_CAMERA_GCC
26#include <time.h>
27#else
28#include <linux/time.h>
29#endif
30
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -080031#include <linux/msm_ion.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070032
Nishant Pandit5dd54422012-06-26 22:52:44 +053033#define BIT(nr) (1UL << (nr))
34
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070035#define MSM_CAM_IOCTL_MAGIC 'm'
36
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -080037#define MAX_SERVER_PAYLOAD_LENGTH 8192
38
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070039#define MSM_CAM_IOCTL_GET_SENSOR_INFO \
40 _IOR(MSM_CAM_IOCTL_MAGIC, 1, struct msm_camsensor_info *)
41
42#define MSM_CAM_IOCTL_REGISTER_PMEM \
43 _IOW(MSM_CAM_IOCTL_MAGIC, 2, struct msm_pmem_info *)
44
45#define MSM_CAM_IOCTL_UNREGISTER_PMEM \
46 _IOW(MSM_CAM_IOCTL_MAGIC, 3, unsigned)
47
48#define MSM_CAM_IOCTL_CTRL_COMMAND \
49 _IOW(MSM_CAM_IOCTL_MAGIC, 4, struct msm_ctrl_cmd *)
50
51#define MSM_CAM_IOCTL_CONFIG_VFE \
52 _IOW(MSM_CAM_IOCTL_MAGIC, 5, struct msm_camera_vfe_cfg_cmd *)
53
54#define MSM_CAM_IOCTL_GET_STATS \
55 _IOR(MSM_CAM_IOCTL_MAGIC, 6, struct msm_camera_stats_event_ctrl *)
56
57#define MSM_CAM_IOCTL_GETFRAME \
58 _IOR(MSM_CAM_IOCTL_MAGIC, 7, struct msm_camera_get_frame *)
59
60#define MSM_CAM_IOCTL_ENABLE_VFE \
61 _IOW(MSM_CAM_IOCTL_MAGIC, 8, struct camera_enable_cmd *)
62
63#define MSM_CAM_IOCTL_CTRL_CMD_DONE \
64 _IOW(MSM_CAM_IOCTL_MAGIC, 9, struct camera_cmd *)
65
66#define MSM_CAM_IOCTL_CONFIG_CMD \
67 _IOW(MSM_CAM_IOCTL_MAGIC, 10, struct camera_cmd *)
68
69#define MSM_CAM_IOCTL_DISABLE_VFE \
70 _IOW(MSM_CAM_IOCTL_MAGIC, 11, struct camera_enable_cmd *)
71
72#define MSM_CAM_IOCTL_PAD_REG_RESET2 \
73 _IOW(MSM_CAM_IOCTL_MAGIC, 12, struct camera_enable_cmd *)
74
75#define MSM_CAM_IOCTL_VFE_APPS_RESET \
76 _IOW(MSM_CAM_IOCTL_MAGIC, 13, struct camera_enable_cmd *)
77
78#define MSM_CAM_IOCTL_RELEASE_FRAME_BUFFER \
79 _IOW(MSM_CAM_IOCTL_MAGIC, 14, struct camera_enable_cmd *)
80
81#define MSM_CAM_IOCTL_RELEASE_STATS_BUFFER \
82 _IOW(MSM_CAM_IOCTL_MAGIC, 15, struct msm_stats_buf *)
83
84#define MSM_CAM_IOCTL_AXI_CONFIG \
85 _IOW(MSM_CAM_IOCTL_MAGIC, 16, struct msm_camera_vfe_cfg_cmd *)
86
87#define MSM_CAM_IOCTL_GET_PICTURE \
88 _IOW(MSM_CAM_IOCTL_MAGIC, 17, struct msm_frame *)
89
90#define MSM_CAM_IOCTL_SET_CROP \
91 _IOW(MSM_CAM_IOCTL_MAGIC, 18, struct crop_info *)
92
93#define MSM_CAM_IOCTL_PICT_PP \
94 _IOW(MSM_CAM_IOCTL_MAGIC, 19, uint8_t *)
95
96#define MSM_CAM_IOCTL_PICT_PP_DONE \
97 _IOW(MSM_CAM_IOCTL_MAGIC, 20, struct msm_snapshot_pp_status *)
98
99#define MSM_CAM_IOCTL_SENSOR_IO_CFG \
100 _IOW(MSM_CAM_IOCTL_MAGIC, 21, struct sensor_cfg_data *)
101
102#define MSM_CAM_IOCTL_FLASH_LED_CFG \
103 _IOW(MSM_CAM_IOCTL_MAGIC, 22, unsigned *)
104
105#define MSM_CAM_IOCTL_UNBLOCK_POLL_FRAME \
106 _IO(MSM_CAM_IOCTL_MAGIC, 23)
107
108#define MSM_CAM_IOCTL_CTRL_COMMAND_2 \
109 _IOW(MSM_CAM_IOCTL_MAGIC, 24, struct msm_ctrl_cmd *)
110
111#define MSM_CAM_IOCTL_AF_CTRL \
112 _IOR(MSM_CAM_IOCTL_MAGIC, 25, struct msm_ctrl_cmt_t *)
113
114#define MSM_CAM_IOCTL_AF_CTRL_DONE \
115 _IOW(MSM_CAM_IOCTL_MAGIC, 26, struct msm_ctrl_cmt_t *)
116
117#define MSM_CAM_IOCTL_CONFIG_VPE \
118 _IOW(MSM_CAM_IOCTL_MAGIC, 27, struct msm_camera_vpe_cfg_cmd *)
119
120#define MSM_CAM_IOCTL_AXI_VPE_CONFIG \
121 _IOW(MSM_CAM_IOCTL_MAGIC, 28, struct msm_camera_vpe_cfg_cmd *)
122
123#define MSM_CAM_IOCTL_STROBE_FLASH_CFG \
124 _IOW(MSM_CAM_IOCTL_MAGIC, 29, uint32_t *)
125
126#define MSM_CAM_IOCTL_STROBE_FLASH_CHARGE \
127 _IOW(MSM_CAM_IOCTL_MAGIC, 30, uint32_t *)
128
129#define MSM_CAM_IOCTL_STROBE_FLASH_RELEASE \
130 _IO(MSM_CAM_IOCTL_MAGIC, 31)
131
132#define MSM_CAM_IOCTL_FLASH_CTRL \
133 _IOW(MSM_CAM_IOCTL_MAGIC, 32, struct flash_ctrl_data *)
134
135#define MSM_CAM_IOCTL_ERROR_CONFIG \
136 _IOW(MSM_CAM_IOCTL_MAGIC, 33, uint32_t *)
137
138#define MSM_CAM_IOCTL_ABORT_CAPTURE \
139 _IO(MSM_CAM_IOCTL_MAGIC, 34)
140
141#define MSM_CAM_IOCTL_SET_FD_ROI \
142 _IOW(MSM_CAM_IOCTL_MAGIC, 35, struct fd_roi_info *)
143
144#define MSM_CAM_IOCTL_GET_CAMERA_INFO \
145 _IOR(MSM_CAM_IOCTL_MAGIC, 36, struct msm_camera_info *)
146
147#define MSM_CAM_IOCTL_UNBLOCK_POLL_PIC_FRAME \
148 _IO(MSM_CAM_IOCTL_MAGIC, 37)
149
150#define MSM_CAM_IOCTL_RELEASE_PIC_BUFFER \
151 _IOW(MSM_CAM_IOCTL_MAGIC, 38, struct camera_enable_cmd *)
152
153#define MSM_CAM_IOCTL_PUT_ST_FRAME \
154 _IOW(MSM_CAM_IOCTL_MAGIC, 39, struct msm_camera_st_frame *)
155
Mansoor Aftab5d418372011-07-26 17:01:26 -0700156#define MSM_CAM_IOCTL_V4L2_EVT_NOTIFY \
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800157 _IOW(MSM_CAM_IOCTL_MAGIC, 40, struct v4l2_event_and_payload)
Mansoor Aftab5d418372011-07-26 17:01:26 -0700158
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700159#define MSM_CAM_IOCTL_SET_MEM_MAP_INFO \
Kevin Chan94b4c832012-03-02 21:27:16 -0800160 _IOR(MSM_CAM_IOCTL_MAGIC, 41, struct msm_mem_map_info *)
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700161
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -0700162#define MSM_CAM_IOCTL_ACTUATOR_IO_CFG \
Kevin Chan94b4c832012-03-02 21:27:16 -0800163 _IOW(MSM_CAM_IOCTL_MAGIC, 42, struct msm_actuator_cfg_data *)
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -0700164
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700165#define MSM_CAM_IOCTL_MCTL_POST_PROC \
Kevin Chan94b4c832012-03-02 21:27:16 -0800166 _IOW(MSM_CAM_IOCTL_MAGIC, 43, struct msm_mctl_post_proc_cmd *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700167
168#define MSM_CAM_IOCTL_RESERVE_FREE_FRAME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800169 _IOW(MSM_CAM_IOCTL_MAGIC, 44, struct msm_cam_evt_divert_frame *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700170
171#define MSM_CAM_IOCTL_RELEASE_FREE_FRAME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800172 _IOR(MSM_CAM_IOCTL_MAGIC, 45, struct msm_cam_evt_divert_frame *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700173
Mingcheng Zhu8feaa3f2011-11-23 11:33:52 -0800174#define MSM_CAM_IOCTL_PICT_PP_DIVERT_DONE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800175 _IOR(MSM_CAM_IOCTL_MAGIC, 46, struct msm_pp_frame *)
Mingcheng Zhu8feaa3f2011-11-23 11:33:52 -0800176
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800177#define MSM_CAM_IOCTL_SENSOR_V4l2_S_CTRL \
Kevin Chan94b4c832012-03-02 21:27:16 -0800178 _IOR(MSM_CAM_IOCTL_MAGIC, 47, struct v4l2_control)
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800179
180#define MSM_CAM_IOCTL_SENSOR_V4l2_QUERY_CTRL \
Kevin Chan94b4c832012-03-02 21:27:16 -0800181 _IOR(MSM_CAM_IOCTL_MAGIC, 48, struct v4l2_queryctrl)
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800182
Guruprasad Gaonkar4c7758f2011-12-16 17:30:00 -0800183#define MSM_CAM_IOCTL_GET_KERNEL_SYSTEM_TIME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800184 _IOW(MSM_CAM_IOCTL_MAGIC, 49, struct timeval *)
Guruprasad Gaonkar4c7758f2011-12-16 17:30:00 -0800185
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800186#define MSM_CAM_IOCTL_SET_VFE_OUTPUT_TYPE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800187 _IOW(MSM_CAM_IOCTL_MAGIC, 50, uint32_t *)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800188
189#define MSM_CAM_IOCTL_MCTL_DIVERT_DONE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800190 _IOR(MSM_CAM_IOCTL_MAGIC, 51, struct msm_cam_evt_divert_frame *)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800191
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800192#define MSM_CAM_IOCTL_GET_ACTUATOR_INFO \
Kevin Chan94b4c832012-03-02 21:27:16 -0800193 _IOW(MSM_CAM_IOCTL_MAGIC, 52, struct msm_actuator_cfg_data *)
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800194
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700195#define MSM_CAM_IOCTL_EEPROM_IO_CFG \
196 _IOW(MSM_CAM_IOCTL_MAGIC, 53, struct msm_eeprom_cfg_data *)
197
Nishant Panditb2157c92012-04-25 01:09:28 +0530198#define MSM_CAM_IOCTL_ISPIF_IO_CFG \
199 _IOR(MSM_CAM_IOCTL_MAGIC, 54, struct ispif_cfg_data *)
200
Brian Muramatsu6d869492012-08-01 22:46:50 -0700201#define MSM_CAM_IOCTL_STATS_REQBUF \
202 _IOR(MSM_CAM_IOCTL_MAGIC, 55, struct msm_stats_reqbuf *)
203
204#define MSM_CAM_IOCTL_STATS_ENQUEUEBUF \
205 _IOR(MSM_CAM_IOCTL_MAGIC, 56, struct msm_stats_buf_info *)
206
207#define MSM_CAM_IOCTL_STATS_FLUSH_BUFQ \
208 _IOR(MSM_CAM_IOCTL_MAGIC, 57, struct msm_stats_flush_bufq *)
209
Ankit Premrajka4b3443f2012-06-11 14:06:31 -0700210#define MSM_CAM_IOCTL_SET_MCTL_SDEV \
211 _IOW(MSM_CAM_IOCTL_MAGIC, 58, struct msm_mctl_set_sdev_data *)
212
213#define MSM_CAM_IOCTL_UNSET_MCTL_SDEV \
214 _IOW(MSM_CAM_IOCTL_MAGIC, 59, struct msm_mctl_set_sdev_data *)
215
Kiran Kumar H N90785902012-07-05 13:59:38 -0700216#define MSM_CAM_IOCTL_GET_INST_HANDLE \
217 _IOR(MSM_CAM_IOCTL_MAGIC, 60, uint32_t *)
218
Lakshmi Narayana Kalavala58243db2012-07-24 00:06:27 -0700219#define MSM_CAM_IOCTL_STATS_UNREG_BUF \
220 _IOR(MSM_CAM_IOCTL_MAGIC, 61, struct msm_stats_flush_bufq *)
221
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800222#define MSM_CAM_IOCTL_CSIC_IO_CFG \
223 _IOWR(MSM_CAM_IOCTL_MAGIC, 62, struct csic_cfg_data *)
224
225#define MSM_CAM_IOCTL_CSID_IO_CFG \
226 _IOWR(MSM_CAM_IOCTL_MAGIC, 63, struct csid_cfg_data *)
227
228#define MSM_CAM_IOCTL_CSIPHY_IO_CFG \
229 _IOR(MSM_CAM_IOCTL_MAGIC, 64, struct csiphy_cfg_data *)
230
231#define MSM_CAM_IOCTL_OEM \
232 _IOW(MSM_CAM_IOCTL_MAGIC, 65, struct sensor_cfg_data *)
233
234#define MSM_CAM_IOCTL_AXI_INIT \
235 _IOWR(MSM_CAM_IOCTL_MAGIC, 66, uint8_t *)
236
237#define MSM_CAM_IOCTL_AXI_RELEASE \
238 _IO(MSM_CAM_IOCTL_MAGIC, 67)
239
240#define MSM_CAM_IOCTL_V4L2_EVT_NATIVE_CMD \
241 _IOWR(MSM_CAM_IOCTL_MAGIC, 68, struct msm_camera_v4l2_ioctl_t)
242
243#define MSM_CAM_IOCTL_V4L2_EVT_NATIVE_FRONT_CMD \
244 _IOWR(MSM_CAM_IOCTL_MAGIC, 69, struct msm_camera_v4l2_ioctl_t)
245
246#define MSM_CAM_IOCTL_INTF_MCTL_MAPPING_CFG \
247 _IOR(MSM_CAM_IOCTL_MAGIC, 70, struct intf_mctl_mapping_cfg *)
248
249struct ioctl_native_cmd {
250 unsigned short mode;
251 unsigned short address;
252 unsigned short value_1;
253 unsigned short value_2;
254 unsigned short value_3;
255};
256
257struct v4l2_event_and_payload {
258 struct v4l2_event evt;
259 uint32_t payload_length;
260 uint32_t transaction_id;
261 void *payload;
262};
Lakshmi Narayana Kalavala58243db2012-07-24 00:06:27 -0700263
Brian Muramatsu6d869492012-08-01 22:46:50 -0700264struct msm_stats_reqbuf {
265 int num_buf; /* how many buffers requested */
266 int stats_type; /* stats type */
267};
268
269struct msm_stats_flush_bufq {
270 int stats_type; /* enum msm_stats_enum_type */
271};
272
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700273struct msm_mctl_pp_cmd {
274 int32_t id;
275 uint16_t length;
276 void *value;
277};
278
279struct msm_mctl_post_proc_cmd {
280 int32_t type;
281 struct msm_mctl_pp_cmd cmd;
282};
283
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700284#define MSM_CAMERA_LED_OFF 0
285#define MSM_CAMERA_LED_LOW 1
286#define MSM_CAMERA_LED_HIGH 2
Nishant Pandit474f2252011-07-23 23:17:56 +0530287#define MSM_CAMERA_LED_INIT 3
288#define MSM_CAMERA_LED_RELEASE 4
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700289
290#define MSM_CAMERA_STROBE_FLASH_NONE 0
291#define MSM_CAMERA_STROBE_FLASH_XENON 1
292
293#define MSM_MAX_CAMERA_SENSORS 5
294#define MAX_SENSOR_NAME 32
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800295#define MAX_CAM_NAME_SIZE 32
296#define MAX_ACT_MOD_NAME_SIZE 32
297#define MAX_ACT_NAME_SIZE 32
298#define NUM_ACTUATOR_DIR 2
299#define MAX_ACTUATOR_SCENARIO 8
300#define MAX_ACTUATOR_REGION 5
301#define MAX_ACTUATOR_INIT_SET 12
302#define MAX_ACTUATOR_TYPE_SIZE 32
303#define MAX_ACTUATOR_REG_TBL_SIZE 8
304
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700305
306#define MSM_MAX_CAMERA_CONFIGS 2
307
308#define PP_SNAP 0x01
309#define PP_RAW_SNAP ((0x01)<<1)
310#define PP_PREV ((0x01)<<2)
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800311#define PP_THUMB ((0x01)<<3)
312#define PP_MASK (PP_SNAP|PP_RAW_SNAP|PP_PREV|PP_THUMB)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700313
314#define MSM_CAM_CTRL_CMD_DONE 0
315#define MSM_CAM_SENSOR_VFE_CMD 1
316
Kiran Kumar H Nceea7622011-08-23 14:01:03 -0700317/* Should be same as VIDEO_MAX_PLANES in videodev2.h */
318#define MAX_PLANES 8
319
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700320/*****************************************************
321 * structure
322 *****************************************************/
323
324/* define five type of structures for userspace <==> kernel
325 * space communication:
326 * command 1 - 2 are from userspace ==> kernel
327 * command 3 - 4 are from kernel ==> userspace
328 *
329 * 1. control command: control command(from control thread),
330 * control status (from config thread);
331 */
332struct msm_ctrl_cmd {
333 uint16_t type;
334 uint16_t length;
335 void *value;
336 uint16_t status;
337 uint32_t timeout_ms;
338 int resp_fd; /* FIXME: to be used by the kernel, pass-through for now */
339 int vnode_id; /* video dev id. Can we overload resp_fd? */
Kevin Chan94b4c832012-03-02 21:27:16 -0800340 int queue_idx;
341 uint32_t evt_id;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700342 uint32_t stream_type; /* used to pass value to qcamera server */
Ankit Premrajkaf94bcc62011-08-22 15:23:53 -0700343 int config_ident; /*used as identifier for config node*/
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700344};
345
346struct msm_cam_evt_msg {
347 unsigned short type; /* 1 == event (RPC), 0 == message (adsp) */
348 unsigned short msg_id;
349 unsigned int len; /* size in, number of bytes out */
350 uint32_t frame_id;
351 void *data;
Ninad Mahimkaree55c192012-04-25 14:36:17 -0700352 struct timespec timestamp;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700353};
354
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700355struct msm_pp_frame_sp {
356 /* phy addr of the buffer */
357 unsigned long phy_addr;
358 uint32_t y_off;
359 uint32_t cbcr_off;
360 /* buffer length */
361 uint32_t length;
362 int32_t fd;
363 uint32_t addr_offset;
364 /* mapped addr */
365 unsigned long vaddr;
366};
367
368struct msm_pp_frame_mp {
369 /* phy addr of the plane */
370 unsigned long phy_addr;
371 /* offset of plane data */
372 uint32_t data_offset;
373 /* plane length */
374 uint32_t length;
375 int32_t fd;
376 uint32_t addr_offset;
377 /* mapped addr */
378 unsigned long vaddr;
379};
380
381struct msm_pp_frame {
382 uint32_t handle; /* stores vb cookie */
383 uint32_t frame_id;
Kevin Chan318d7cb2011-11-29 14:24:26 -0800384 unsigned short buf_idx;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700385 int path;
386 unsigned short image_type;
387 unsigned short num_planes; /* 1 for sp */
388 struct timeval timestamp;
389 union {
390 struct msm_pp_frame_sp sp;
391 struct msm_pp_frame_mp mp[MAX_PLANES];
392 };
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800393 int node_type;
Kiran Kumar H N90785902012-07-05 13:59:38 -0700394 uint32_t inst_handle;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700395};
396
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800397struct msm_pp_crop {
398 uint32_t src_x;
399 uint32_t src_y;
400 uint32_t src_w;
401 uint32_t src_h;
402 uint32_t dst_x;
403 uint32_t dst_y;
404 uint32_t dst_w;
405 uint32_t dst_h;
406 uint8_t update_flag;
407};
408
409struct msm_mctl_pp_frame_cmd {
410 uint32_t cookie;
411 uint8_t vpe_output_action;
412 struct msm_pp_frame src_frame;
413 struct msm_pp_frame dest_frame;
414 struct msm_pp_crop crop;
415 int path;
416};
417
Mingcheng Zhu49505502011-07-19 20:44:36 -0700418struct msm_cam_evt_divert_frame {
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700419 unsigned short image_mode;
420 unsigned short op_mode;
Mingcheng Zhu49505502011-07-19 20:44:36 -0700421 unsigned short inst_idx;
422 unsigned short node_idx;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700423 struct msm_pp_frame frame;
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700424 int do_pp;
Mingcheng Zhu49505502011-07-19 20:44:36 -0700425};
426
Kiran Kumar H N0b517802011-10-05 09:49:51 -0700427struct msm_mctl_pp_cmd_ack_event {
428 uint32_t cmd; /* VPE_CMD_ZOOM? */
429 int status; /* 0 done, < 0 err */
430 uint32_t cookie; /* daemon's cookie */
431};
432
433struct msm_mctl_pp_event_info {
434 int32_t event;
435 union {
436 struct msm_mctl_pp_cmd_ack_event ack;
437 };
438};
439
440struct msm_isp_event_ctrl {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700441 unsigned short resptype;
442 union {
443 struct msm_cam_evt_msg isp_msg;
444 struct msm_ctrl_cmd ctrl;
Kiran Kumar H N0b517802011-10-05 09:49:51 -0700445 struct msm_cam_evt_divert_frame div_frame;
446 struct msm_mctl_pp_event_info pp_event_info;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700447 } isp_data;
448};
449
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700450#define MSM_CAM_RESP_CTRL 0
451#define MSM_CAM_RESP_STAT_EVT_MSG 1
452#define MSM_CAM_RESP_STEREO_OP_1 2
453#define MSM_CAM_RESP_STEREO_OP_2 3
454#define MSM_CAM_RESP_V4L2 4
Mingcheng Zhu49505502011-07-19 20:44:36 -0700455#define MSM_CAM_RESP_DIV_FRAME_EVT_MSG 5
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700456#define MSM_CAM_RESP_DONE_EVENT 6
457#define MSM_CAM_RESP_MCTL_PP_EVENT 7
458#define MSM_CAM_RESP_MAX 8
Mingcheng Zhu49505502011-07-19 20:44:36 -0700459
Mingcheng Zhu270813a2011-08-10 17:23:18 -0700460#define MSM_CAM_APP_NOTIFY_EVENT 0
Kevin Chan4bb6ead2012-02-29 01:01:41 -0800461#define MSM_CAM_APP_NOTIFY_ERROR_EVENT 1
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700462
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700463/* this one is used to send ctrl/status up to config thread */
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700464
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700465struct msm_stats_event_ctrl {
466 /* 0 - ctrl_cmd from control thread,
467 * 1 - stats/event kernel,
468 * 2 - V4L control or read request */
469 int resptype;
470 int timeout_ms;
471 struct msm_ctrl_cmd ctrl_cmd;
472 /* struct vfe_event_t stats_event; */
473 struct msm_cam_evt_msg stats_event;
474};
475
476/* 2. config command: config command(from config thread); */
477struct msm_camera_cfg_cmd {
478 /* what to config:
479 * 1 - sensor config, 2 - vfe config */
480 uint16_t cfg_type;
481
482 /* sensor config type */
483 uint16_t cmd_type;
484 uint16_t queue;
485 uint16_t length;
486 void *value;
487};
488
489#define CMD_GENERAL 0
490#define CMD_AXI_CFG_OUT1 1
491#define CMD_AXI_CFG_SNAP_O1_AND_O2 2
492#define CMD_AXI_CFG_OUT2 3
493#define CMD_PICT_T_AXI_CFG 4
494#define CMD_PICT_M_AXI_CFG 5
495#define CMD_RAW_PICT_AXI_CFG 6
496
497#define CMD_FRAME_BUF_RELEASE 7
498#define CMD_PREV_BUF_CFG 8
499#define CMD_SNAP_BUF_RELEASE 9
500#define CMD_SNAP_BUF_CFG 10
501#define CMD_STATS_DISABLE 11
502#define CMD_STATS_AEC_AWB_ENABLE 12
503#define CMD_STATS_AF_ENABLE 13
504#define CMD_STATS_AEC_ENABLE 14
505#define CMD_STATS_AWB_ENABLE 15
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800506#define CMD_STATS_ENABLE 16
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700507
508#define CMD_STATS_AXI_CFG 17
509#define CMD_STATS_AEC_AXI_CFG 18
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800510#define CMD_STATS_AF_AXI_CFG 19
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700511#define CMD_STATS_AWB_AXI_CFG 20
512#define CMD_STATS_RS_AXI_CFG 21
513#define CMD_STATS_CS_AXI_CFG 22
514#define CMD_STATS_IHIST_AXI_CFG 23
515#define CMD_STATS_SKIN_AXI_CFG 24
516
517#define CMD_STATS_BUF_RELEASE 25
518#define CMD_STATS_AEC_BUF_RELEASE 26
519#define CMD_STATS_AF_BUF_RELEASE 27
520#define CMD_STATS_AWB_BUF_RELEASE 28
521#define CMD_STATS_RS_BUF_RELEASE 29
522#define CMD_STATS_CS_BUF_RELEASE 30
523#define CMD_STATS_IHIST_BUF_RELEASE 31
524#define CMD_STATS_SKIN_BUF_RELEASE 32
525
526#define UPDATE_STATS_INVALID 33
527#define CMD_AXI_CFG_SNAP_GEMINI 34
528#define CMD_AXI_CFG_SNAP 35
529#define CMD_AXI_CFG_PREVIEW 36
530#define CMD_AXI_CFG_VIDEO 37
531
532#define CMD_STATS_IHIST_ENABLE 38
533#define CMD_STATS_RS_ENABLE 39
534#define CMD_STATS_CS_ENABLE 40
535#define CMD_VPE 41
536#define CMD_AXI_CFG_VPE 42
537#define CMD_AXI_CFG_ZSL 43
538#define CMD_AXI_CFG_SNAP_VPE 44
539#define CMD_AXI_CFG_SNAP_THUMB_VPE 45
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -0700540
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530541#define CMD_CONFIG_PING_ADDR 46
542#define CMD_CONFIG_PONG_ADDR 47
543#define CMD_CONFIG_FREE_BUF_ADDR 48
544#define CMD_AXI_CFG_ZSL_ALL_CHNLS 49
545#define CMD_AXI_CFG_VIDEO_ALL_CHNLS 50
Suresh Vankadara055cb8e2012-01-18 00:50:04 +0530546#define CMD_VFE_BUFFER_RELEASE 51
Kevin Chancf264862012-04-19 19:10:38 -0700547#define CMD_VFE_PROCESS_IRQ 52
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -0700548#define CMD_STATS_BG_ENABLE 53
549#define CMD_STATS_BF_ENABLE 54
550#define CMD_STATS_BHIST_ENABLE 55
551#define CMD_STATS_BG_BUF_RELEASE 56
552#define CMD_STATS_BF_BUF_RELEASE 57
553#define CMD_STATS_BHIST_BUF_RELEASE 58
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800554#define CMD_VFE_PIX_SOF_COUNT_UPDATE 59
555#define CMD_VFE_COUNT_PIX_SOF_ENABLE 60
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700556
Nishant Pandit5dd54422012-06-26 22:52:44 +0530557#define CMD_AXI_CFG_PRIM BIT(8)
558#define CMD_AXI_CFG_PRIM_ALL_CHNLS BIT(9)
559#define CMD_AXI_CFG_SEC BIT(10)
560#define CMD_AXI_CFG_SEC_ALL_CHNLS BIT(11)
561#define CMD_AXI_CFG_TERT1 BIT(12)
562#define CMD_AXI_CFG_TERT2 BIT(13)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800563#define CMD_AXI_CFG_TERT3 BIT(14)
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800564
Azam Sadiq Pasha Kapatrala Syed7c815182012-05-31 19:28:09 -0700565#define CMD_AXI_START 0xE1
566#define CMD_AXI_STOP 0xE2
Shuzhen Wang109c2112012-07-23 17:28:11 -0700567#define CMD_AXI_RESET 0xE3
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800568#define CMD_AXI_ABORT 0xE4
569
Azam Sadiq Pasha Kapatrala Syed7c815182012-05-31 19:28:09 -0700570
Lakshmi Narayana Kalavalacd3d81e2012-07-31 13:04:03 -0700571
572#define AXI_CMD_PREVIEW BIT(0)
573#define AXI_CMD_CAPTURE BIT(1)
574#define AXI_CMD_RECORD BIT(2)
575#define AXI_CMD_ZSL BIT(3)
576#define AXI_CMD_RAW_CAPTURE BIT(4)
Lakshmi Narayana Kalavala3e8a1d12012-07-31 15:00:09 -0700577#define AXI_CMD_LIVESHOT BIT(5)
Lakshmi Narayana Kalavalacd3d81e2012-07-31 13:04:03 -0700578
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700579/* vfe config command: config command(from config thread)*/
580struct msm_vfe_cfg_cmd {
581 int cmd_type;
582 uint16_t length;
583 void *value;
584};
585
586struct msm_vpe_cfg_cmd {
587 int cmd_type;
588 uint16_t length;
589 void *value;
590};
591
592#define MAX_CAMERA_ENABLE_NAME_LEN 32
593struct camera_enable_cmd {
594 char name[MAX_CAMERA_ENABLE_NAME_LEN];
595};
596
597#define MSM_PMEM_OUTPUT1 0
598#define MSM_PMEM_OUTPUT2 1
599#define MSM_PMEM_OUTPUT1_OUTPUT2 2
600#define MSM_PMEM_THUMBNAIL 3
601#define MSM_PMEM_MAINIMG 4
602#define MSM_PMEM_RAW_MAINIMG 5
603#define MSM_PMEM_AEC_AWB 6
604#define MSM_PMEM_AF 7
605#define MSM_PMEM_AEC 8
606#define MSM_PMEM_AWB 9
607#define MSM_PMEM_RS 10
608#define MSM_PMEM_CS 11
609#define MSM_PMEM_IHIST 12
610#define MSM_PMEM_SKIN 13
611#define MSM_PMEM_VIDEO 14
612#define MSM_PMEM_PREVIEW 15
613#define MSM_PMEM_VIDEO_VPE 16
614#define MSM_PMEM_C2D 17
615#define MSM_PMEM_MAINIMG_VPE 18
616#define MSM_PMEM_THUMBNAIL_VPE 19
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -0700617#define MSM_PMEM_BAYER_GRID 20
618#define MSM_PMEM_BAYER_FOCUS 21
619#define MSM_PMEM_BAYER_HIST 22
620#define MSM_PMEM_MAX 23
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700621
622#define STAT_AEAW 0
623#define STAT_AEC 1
624#define STAT_AF 2
625#define STAT_AWB 3
626#define STAT_RS 4
627#define STAT_CS 5
628#define STAT_IHIST 6
629#define STAT_SKIN 7
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -0700630#define STAT_BG 8
631#define STAT_BF 9
632#define STAT_BHIST 10
633#define STAT_MAX 11
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700634
635#define FRAME_PREVIEW_OUTPUT1 0
636#define FRAME_PREVIEW_OUTPUT2 1
637#define FRAME_SNAPSHOT 2
638#define FRAME_THUMBNAIL 3
639#define FRAME_RAW_SNAPSHOT 4
640#define FRAME_MAX 5
641
Brian Muramatsu6d869492012-08-01 22:46:50 -0700642enum msm_stats_enum_type {
643 MSM_STATS_TYPE_AEC, /* legacy based AEC */
644 MSM_STATS_TYPE_AF, /* legacy based AF */
645 MSM_STATS_TYPE_AWB, /* legacy based AWB */
646 MSM_STATS_TYPE_RS, /* legacy based RS */
647 MSM_STATS_TYPE_CS, /* legacy based CS */
648 MSM_STATS_TYPE_IHIST, /* legacy based HIST */
649 MSM_STATS_TYPE_SKIN, /* legacy based SKIN */
650 MSM_STATS_TYPE_BG, /* Bayer Grids */
651 MSM_STATS_TYPE_BF, /* Bayer Focus */
652 MSM_STATS_TYPE_BHIST, /* Bayer Hist */
653 MSM_STATS_TYPE_AE_AW, /* legacy stats for vfe 2.x*/
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800654 MSM_STATS_TYPE_COMP, /* Composite stats */
Brian Muramatsu6d869492012-08-01 22:46:50 -0700655 MSM_STATS_TYPE_MAX /* MAX */
656};
657
658struct msm_stats_buf_info {
659 int type; /* msm_stats_enum_type */
660 int fd;
661 void *vaddr;
662 uint32_t offset;
663 uint32_t len;
664 uint32_t y_off;
665 uint32_t cbcr_off;
666 uint32_t planar0_off;
667 uint32_t planar1_off;
668 uint32_t planar2_off;
669 uint8_t active;
670 int buf_idx;
671};
672
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700673struct msm_pmem_info {
674 int type;
675 int fd;
676 void *vaddr;
677 uint32_t offset;
678 uint32_t len;
Kiran Kumar H N5a19c682011-07-23 11:34:34 -0700679 uint32_t y_off;
680 uint32_t cbcr_off;
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530681 uint32_t planar0_off;
682 uint32_t planar1_off;
683 uint32_t planar2_off;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700684 uint8_t active;
685};
686
687struct outputCfg {
688 uint32_t height;
689 uint32_t width;
690
691 uint32_t window_height_firstline;
692 uint32_t window_height_lastline;
693};
694
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800695#define VIDEO_NODE 0
696#define MCTL_NODE 1
697
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700698#define OUTPUT_1 0
699#define OUTPUT_2 1
700#define OUTPUT_1_AND_2 2 /* snapshot only */
701#define OUTPUT_1_AND_3 3 /* video */
702#define CAMIF_TO_AXI_VIA_OUTPUT_2 4
703#define OUTPUT_1_AND_CAMIF_TO_AXI_VIA_OUTPUT_2 5
704#define OUTPUT_2_AND_CAMIF_TO_AXI_VIA_OUTPUT_1 6
705#define OUTPUT_1_2_AND_3 7
Kiran Kumar H N4cff94a2011-10-17 11:37:33 -0700706#define OUTPUT_ALL_CHNLS 8
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530707#define OUTPUT_VIDEO_ALL_CHNLS 9
708#define OUTPUT_ZSL_ALL_CHNLS 10
709#define LAST_AXI_OUTPUT_MODE_ENUM = OUTPUT_ZSL_ALL_CHNLS
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700710
Nishant Pandit5dd54422012-06-26 22:52:44 +0530711#define OUTPUT_PRIM BIT(8)
712#define OUTPUT_PRIM_ALL_CHNLS BIT(9)
713#define OUTPUT_SEC BIT(10)
714#define OUTPUT_SEC_ALL_CHNLS BIT(11)
715#define OUTPUT_TERT1 BIT(12)
716#define OUTPUT_TERT2 BIT(13)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800717#define OUTPUT_TERT3 BIT(14)
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800718
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700719#define MSM_FRAME_PREV_1 0
720#define MSM_FRAME_PREV_2 1
721#define MSM_FRAME_ENC 2
722
Nishant Pandit5dd54422012-06-26 22:52:44 +0530723#define OUTPUT_TYPE_P BIT(0)
724#define OUTPUT_TYPE_T BIT(1)
725#define OUTPUT_TYPE_S BIT(2)
726#define OUTPUT_TYPE_V BIT(3)
727#define OUTPUT_TYPE_L BIT(4)
728#define OUTPUT_TYPE_ST_L BIT(5)
729#define OUTPUT_TYPE_ST_R BIT(6)
730#define OUTPUT_TYPE_ST_D BIT(7)
731#define OUTPUT_TYPE_R BIT(8)
732#define OUTPUT_TYPE_R1 BIT(9)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800733#define OUTPUT_TYPE_SAEC BIT(10)
734#define OUTPUT_TYPE_SAFC BIT(11)
735#define OUTPUT_TYPE_SAWB BIT(12)
736#define OUTPUT_TYPE_IHST BIT(13)
737#define OUTPUT_TYPE_CSTA BIT(14)
738#define OUTPUT_TYPE_R2 BIT(15)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700739
740struct fd_roi_info {
741 void *info;
742 int info_len;
743};
744
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700745struct msm_mem_map_info {
746 uint32_t cookie;
747 uint32_t length;
Mingcheng Zhufe7abc02011-08-09 13:27:39 -0700748 uint32_t mem_type;
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700749};
750
Mingcheng Zhu49505502011-07-19 20:44:36 -0700751#define MSM_MEM_MMAP 0
752#define MSM_MEM_USERPTR 1
753#define MSM_PLANE_MAX 8
754#define MSM_PLANE_Y 0
755#define MSM_PLANE_UV 1
756
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700757struct msm_frame {
758 struct timespec ts;
759 int path;
760 int type;
761 unsigned long buffer;
762 uint32_t phy_offset;
Kiran Kumar H N5a19c682011-07-23 11:34:34 -0700763 uint32_t y_off;
764 uint32_t cbcr_off;
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530765 uint32_t planar0_off;
766 uint32_t planar1_off;
767 uint32_t planar2_off;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700768 int fd;
769
770 void *cropinfo;
771 int croplen;
772 uint32_t error_code;
773 struct fd_roi_info roi_info;
774 uint32_t frame_id;
775 int stcam_quality_ind;
776 uint32_t stcam_conv_value;
Ankit Premrajka3e90b9f2011-11-01 18:48:45 -0700777
778 struct ion_allocation_data ion_alloc;
779 struct ion_fd_data fd_data;
Ankit Premrajkae2c9c0b2012-06-07 17:18:25 -0700780 int ion_dev_fd;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700781};
782
783enum msm_st_frame_packing {
784 SIDE_BY_SIDE_HALF,
785 SIDE_BY_SIDE_FULL,
786 TOP_DOWN_HALF,
787 TOP_DOWN_FULL,
788};
789
790struct msm_st_crop {
791 uint32_t in_w;
792 uint32_t in_h;
793 uint32_t out_w;
794 uint32_t out_h;
795};
796
797struct msm_st_half {
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530798 uint32_t buf_p0_off;
799 uint32_t buf_p1_off;
800 uint32_t buf_p0_stride;
801 uint32_t buf_p1_stride;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700802 uint32_t pix_x_off;
803 uint32_t pix_y_off;
804 struct msm_st_crop stCropInfo;
805};
806
807struct msm_st_frame {
808 struct msm_frame buf_info;
809 int type;
810 enum msm_st_frame_packing packing;
811 struct msm_st_half L;
812 struct msm_st_half R;
813 int frame_id;
814};
815
816#define MSM_CAMERA_ERR_MASK (0xFFFFFFFF & 1)
817
818struct stats_buff {
819 unsigned long buff;
820 int fd;
821};
822
823struct msm_stats_buf {
Lakshmi Narayana Kalavala4ab97a92011-07-26 15:30:14 -0700824 uint8_t awb_ymin;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700825 struct stats_buff aec;
826 struct stats_buff awb;
827 struct stats_buff af;
828 struct stats_buff ihist;
829 struct stats_buff rs;
830 struct stats_buff cs;
831 struct stats_buff skin;
832 int type;
833 uint32_t status_bits;
834 unsigned long buffer;
835 int fd;
Ankit Premrajka073e0ca2012-03-06 12:26:08 -0800836 int length;
837 struct ion_handle *handle;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700838 uint32_t frame_id;
Brian Muramatsu6d869492012-08-01 22:46:50 -0700839 int buf_idx;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700840};
841#define MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT 0
842/* video capture mode in VIDIOC_S_PARM */
843#define MSM_V4L2_EXT_CAPTURE_MODE_PREVIEW \
844 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+1)
845/* extendedmode for video recording in VIDIOC_S_PARM */
846#define MSM_V4L2_EXT_CAPTURE_MODE_VIDEO \
847 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+2)
848/* extendedmode for the full size main image in VIDIOC_S_PARM */
849#define MSM_V4L2_EXT_CAPTURE_MODE_MAIN (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+3)
850/* extendedmode for the thumb nail image in VIDIOC_S_PARM */
851#define MSM_V4L2_EXT_CAPTURE_MODE_THUMBNAIL \
852 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+4)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800853/* ISP_PIX_OUTPUT1: no pp, directly send output1 buf to user */
854#define MSM_V4L2_EXT_CAPTURE_MODE_ISP_PIX_OUTPUT1 \
Sudhir Sharma4472ce52012-12-01 14:00:27 -0800855 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+5)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800856/* ISP_PIX_OUTPUT2: no pp, directly send output2 buf to user */
857#define MSM_V4L2_EXT_CAPTURE_MODE_ISP_PIX_OUTPUT2 \
Sudhir Sharma4472ce52012-12-01 14:00:27 -0800858 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+6)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800859/* raw image type */
860#define MSM_V4L2_EXT_CAPTURE_MODE_RAW \
Sudhir Sharma4472ce52012-12-01 14:00:27 -0800861 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+7)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800862/* RDI dump */
863#define MSM_V4L2_EXT_CAPTURE_MODE_RDI \
Sudhir Sharma4472ce52012-12-01 14:00:27 -0800864 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+8)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800865/* RDI dump 1 */
866#define MSM_V4L2_EXT_CAPTURE_MODE_RDI1 \
Sudhir Sharma4472ce52012-12-01 14:00:27 -0800867 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+9)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800868/* RDI dump 2 */
869#define MSM_V4L2_EXT_CAPTURE_MODE_RDI2 \
Sudhir Sharma4472ce52012-12-01 14:00:27 -0800870 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+10)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800871#define MSM_V4L2_EXT_CAPTURE_MODE_AEC \
Sudhir Sharma4472ce52012-12-01 14:00:27 -0800872 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+11)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800873#define MSM_V4L2_EXT_CAPTURE_MODE_AWB \
Sudhir Sharma4472ce52012-12-01 14:00:27 -0800874 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+12)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800875#define MSM_V4L2_EXT_CAPTURE_MODE_AF \
Sudhir Sharma4472ce52012-12-01 14:00:27 -0800876 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+13)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800877#define MSM_V4L2_EXT_CAPTURE_MODE_IHIST \
Sudhir Sharma4472ce52012-12-01 14:00:27 -0800878 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+14)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800879#define MSM_V4L2_EXT_CAPTURE_MODE_CS \
880 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+15)
881#define MSM_V4L2_EXT_CAPTURE_MODE_RS \
882 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+16)
883#define MSM_V4L2_EXT_CAPTURE_MODE_CSTA \
884 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+17)
885#define MSM_V4L2_EXT_CAPTURE_MODE_MAX (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+18)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700886
887#define MSM_V4L2_PID_MOTION_ISO V4L2_CID_PRIVATE_BASE
888#define MSM_V4L2_PID_EFFECT (V4L2_CID_PRIVATE_BASE+1)
889#define MSM_V4L2_PID_HJR (V4L2_CID_PRIVATE_BASE+2)
890#define MSM_V4L2_PID_LED_MODE (V4L2_CID_PRIVATE_BASE+3)
891#define MSM_V4L2_PID_PREP_SNAPSHOT (V4L2_CID_PRIVATE_BASE+4)
892#define MSM_V4L2_PID_EXP_METERING (V4L2_CID_PRIVATE_BASE+5)
893#define MSM_V4L2_PID_ISO (V4L2_CID_PRIVATE_BASE+6)
894#define MSM_V4L2_PID_CAM_MODE (V4L2_CID_PRIVATE_BASE+7)
895#define MSM_V4L2_PID_LUMA_ADAPTATION (V4L2_CID_PRIVATE_BASE+8)
896#define MSM_V4L2_PID_BEST_SHOT (V4L2_CID_PRIVATE_BASE+9)
897#define MSM_V4L2_PID_FOCUS_MODE (V4L2_CID_PRIVATE_BASE+10)
898#define MSM_V4L2_PID_BL_DETECTION (V4L2_CID_PRIVATE_BASE+11)
899#define MSM_V4L2_PID_SNOW_DETECTION (V4L2_CID_PRIVATE_BASE+12)
900#define MSM_V4L2_PID_CTRL_CMD (V4L2_CID_PRIVATE_BASE+13)
901#define MSM_V4L2_PID_EVT_SUB_INFO (V4L2_CID_PRIVATE_BASE+14)
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700902#define MSM_V4L2_PID_STROBE_FLASH (V4L2_CID_PRIVATE_BASE+15)
Kiran Kumar H N90785902012-07-05 13:59:38 -0700903#define MSM_V4L2_PID_INST_HANDLE (V4L2_CID_PRIVATE_BASE+16)
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700904#define MSM_V4L2_PID_MMAP_INST (V4L2_CID_PRIVATE_BASE+17)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800905#define MSM_V4L2_PID_PP_PLANE_INFO (V4L2_CID_PRIVATE_BASE+18)
906#define MSM_V4L2_PID_MAX MSM_V4L2_PID_PP_PLANE_INFO
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700907
908/* camera operation mode for video recording - two frame output queues */
909#define MSM_V4L2_CAM_OP_DEFAULT 0
910/* camera operation mode for video recording - two frame output queues */
911#define MSM_V4L2_CAM_OP_PREVIEW (MSM_V4L2_CAM_OP_DEFAULT+1)
912/* camera operation mode for video recording - two frame output queues */
913#define MSM_V4L2_CAM_OP_VIDEO (MSM_V4L2_CAM_OP_DEFAULT+2)
914/* camera operation mode for standard shapshot - two frame output queues */
915#define MSM_V4L2_CAM_OP_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT+3)
916/* camera operation mode for zsl shapshot - three output queues */
917#define MSM_V4L2_CAM_OP_ZSL (MSM_V4L2_CAM_OP_DEFAULT+4)
918/* camera operation mode for raw snapshot - one frame output queue */
919#define MSM_V4L2_CAM_OP_RAW (MSM_V4L2_CAM_OP_DEFAULT+5)
Jignesh Mehta6cf8a742012-02-04 23:40:50 -0800920/* camera operation mode for jpeg snapshot - one frame output queue */
921#define MSM_V4L2_CAM_OP_JPEG_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT+6)
922
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700923
924#define MSM_V4L2_VID_CAP_TYPE 0
925#define MSM_V4L2_STREAM_ON 1
926#define MSM_V4L2_STREAM_OFF 2
927#define MSM_V4L2_SNAPSHOT 3
928#define MSM_V4L2_QUERY_CTRL 4
929#define MSM_V4L2_GET_CTRL 5
930#define MSM_V4L2_SET_CTRL 6
931#define MSM_V4L2_QUERY 7
932#define MSM_V4L2_GET_CROP 8
933#define MSM_V4L2_SET_CROP 9
934#define MSM_V4L2_OPEN 10
935#define MSM_V4L2_CLOSE 11
936#define MSM_V4L2_SET_CTRL_CMD 12
937#define MSM_V4L2_EVT_SUB_MASK 13
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800938#define MSM_V4L2_PRIVATE_CMD 14
939#define MSM_V4L2_MAX 15
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700940#define V4L2_CAMERA_EXIT 43
941
942struct crop_info {
943 void *info;
944 int len;
945};
946
947struct msm_postproc {
948 int ftnum;
949 struct msm_frame fthumnail;
950 int fmnum;
951 struct msm_frame fmain;
952};
953
954struct msm_snapshot_pp_status {
955 void *status;
956};
957
958#define CFG_SET_MODE 0
959#define CFG_SET_EFFECT 1
960#define CFG_START 2
961#define CFG_PWR_UP 3
962#define CFG_PWR_DOWN 4
963#define CFG_WRITE_EXPOSURE_GAIN 5
964#define CFG_SET_DEFAULT_FOCUS 6
965#define CFG_MOVE_FOCUS 7
966#define CFG_REGISTER_TO_REAL_GAIN 8
967#define CFG_REAL_TO_REGISTER_GAIN 9
968#define CFG_SET_FPS 10
969#define CFG_SET_PICT_FPS 11
970#define CFG_SET_BRIGHTNESS 12
971#define CFG_SET_CONTRAST 13
972#define CFG_SET_ZOOM 14
973#define CFG_SET_EXPOSURE_MODE 15
974#define CFG_SET_WB 16
975#define CFG_SET_ANTIBANDING 17
976#define CFG_SET_EXP_GAIN 18
977#define CFG_SET_PICT_EXP_GAIN 19
978#define CFG_SET_LENS_SHADING 20
979#define CFG_GET_PICT_FPS 21
980#define CFG_GET_PREV_L_PF 22
981#define CFG_GET_PREV_P_PL 23
982#define CFG_GET_PICT_L_PF 24
983#define CFG_GET_PICT_P_PL 25
984#define CFG_GET_AF_MAX_STEPS 26
985#define CFG_GET_PICT_MAX_EXP_LC 27
986#define CFG_SEND_WB_INFO 28
987#define CFG_SENSOR_INIT 29
988#define CFG_GET_3D_CALI_DATA 30
989#define CFG_GET_CALIB_DATA 31
Kevin Chana980f392011-08-01 20:55:00 -0700990#define CFG_GET_OUTPUT_INFO 32
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700991#define CFG_GET_EEPROM_INFO 33
992#define CFG_GET_EEPROM_DATA 34
993#define CFG_SET_ACTUATOR_INFO 35
994#define CFG_GET_ACTUATOR_INFO 36
Su Liu6c3bb322012-02-14 02:15:05 +0530995/* TBD: QRD */
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700996#define CFG_SET_SATURATION 37
997#define CFG_SET_SHARPNESS 38
998#define CFG_SET_TOUCHAEC 39
999#define CFG_SET_AUTO_FOCUS 40
1000#define CFG_SET_AUTOFLASH 41
1001#define CFG_SET_EXPOSURE_COMPENSATION 42
1002#define CFG_SET_ISO 43
Nishant Panditb2157c92012-04-25 01:09:28 +05301003#define CFG_START_STREAM 44
1004#define CFG_STOP_STREAM 45
1005#define CFG_GET_CSI_PARAMS 46
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001006#define CFG_POWER_UP 47
1007#define CFG_POWER_DOWN 48
1008#define CFG_WRITE_I2C_ARRAY 49
1009#define CFG_READ_I2C_ARRAY 50
1010#define CFG_PCLK_CHANGE 51
1011#define CFG_CONFIG_VREG_ARRAY 52
1012#define CFG_CONFIG_CLK_ARRAY 53
1013#define CFG_GPIO_OP 54
1014#define CFG_MAX 55
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001015
1016
1017#define MOVE_NEAR 0
1018#define MOVE_FAR 1
1019
1020#define SENSOR_PREVIEW_MODE 0
1021#define SENSOR_SNAPSHOT_MODE 1
1022#define SENSOR_RAW_SNAPSHOT_MODE 2
1023#define SENSOR_HFR_60FPS_MODE 3
1024#define SENSOR_HFR_90FPS_MODE 4
1025#define SENSOR_HFR_120FPS_MODE 5
1026
1027#define SENSOR_QTR_SIZE 0
1028#define SENSOR_FULL_SIZE 1
1029#define SENSOR_QVGA_SIZE 2
1030#define SENSOR_INVALID_SIZE 3
1031
1032#define CAMERA_EFFECT_OFF 0
1033#define CAMERA_EFFECT_MONO 1
1034#define CAMERA_EFFECT_NEGATIVE 2
1035#define CAMERA_EFFECT_SOLARIZE 3
1036#define CAMERA_EFFECT_SEPIA 4
1037#define CAMERA_EFFECT_POSTERIZE 5
1038#define CAMERA_EFFECT_WHITEBOARD 6
1039#define CAMERA_EFFECT_BLACKBOARD 7
1040#define CAMERA_EFFECT_AQUA 8
Yonggui Maoc0055a12011-09-29 19:31:47 -07001041#define CAMERA_EFFECT_EMBOSS 9
1042#define CAMERA_EFFECT_SKETCH 10
1043#define CAMERA_EFFECT_NEON 11
1044#define CAMERA_EFFECT_MAX 12
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001045
Taniya Dasa9bdb012011-09-08 11:21:33 +05301046/* QRD */
1047#define CAMERA_EFFECT_BW 10
1048#define CAMERA_EFFECT_BLUISH 12
1049#define CAMERA_EFFECT_REDDISH 13
1050#define CAMERA_EFFECT_GREENISH 14
1051
1052/* QRD */
1053#define CAMERA_ANTIBANDING_OFF 0
1054#define CAMERA_ANTIBANDING_50HZ 2
1055#define CAMERA_ANTIBANDING_60HZ 1
1056#define CAMERA_ANTIBANDING_AUTO 3
1057
1058#define CAMERA_CONTRAST_LV0 0
1059#define CAMERA_CONTRAST_LV1 1
1060#define CAMERA_CONTRAST_LV2 2
1061#define CAMERA_CONTRAST_LV3 3
1062#define CAMERA_CONTRAST_LV4 4
1063#define CAMERA_CONTRAST_LV5 5
1064#define CAMERA_CONTRAST_LV6 6
1065#define CAMERA_CONTRAST_LV7 7
1066#define CAMERA_CONTRAST_LV8 8
1067#define CAMERA_CONTRAST_LV9 9
1068
1069#define CAMERA_BRIGHTNESS_LV0 0
1070#define CAMERA_BRIGHTNESS_LV1 1
1071#define CAMERA_BRIGHTNESS_LV2 2
1072#define CAMERA_BRIGHTNESS_LV3 3
1073#define CAMERA_BRIGHTNESS_LV4 4
1074#define CAMERA_BRIGHTNESS_LV5 5
1075#define CAMERA_BRIGHTNESS_LV6 6
1076#define CAMERA_BRIGHTNESS_LV7 7
1077#define CAMERA_BRIGHTNESS_LV8 8
1078
1079
1080#define CAMERA_SATURATION_LV0 0
1081#define CAMERA_SATURATION_LV1 1
1082#define CAMERA_SATURATION_LV2 2
1083#define CAMERA_SATURATION_LV3 3
1084#define CAMERA_SATURATION_LV4 4
1085#define CAMERA_SATURATION_LV5 5
1086#define CAMERA_SATURATION_LV6 6
1087#define CAMERA_SATURATION_LV7 7
1088#define CAMERA_SATURATION_LV8 8
1089
1090#define CAMERA_SHARPNESS_LV0 0
1091#define CAMERA_SHARPNESS_LV1 3
1092#define CAMERA_SHARPNESS_LV2 6
1093#define CAMERA_SHARPNESS_LV3 9
1094#define CAMERA_SHARPNESS_LV4 12
1095#define CAMERA_SHARPNESS_LV5 15
1096#define CAMERA_SHARPNESS_LV6 18
1097#define CAMERA_SHARPNESS_LV7 21
1098#define CAMERA_SHARPNESS_LV8 24
1099#define CAMERA_SHARPNESS_LV9 27
1100#define CAMERA_SHARPNESS_LV10 30
1101
1102#define CAMERA_SETAE_AVERAGE 0
1103#define CAMERA_SETAE_CENWEIGHT 1
1104
Taniya Dasa9bdb012011-09-08 11:21:33 +05301105#define CAMERA_WB_AUTO 1 /* This list must match aeecamera.h */
1106#define CAMERA_WB_CUSTOM 2
1107#define CAMERA_WB_INCANDESCENT 3
1108#define CAMERA_WB_FLUORESCENT 4
1109#define CAMERA_WB_DAYLIGHT 5
1110#define CAMERA_WB_CLOUDY_DAYLIGHT 6
1111#define CAMERA_WB_TWILIGHT 7
1112#define CAMERA_WB_SHADE 8
1113
1114#define CAMERA_EXPOSURE_COMPENSATION_LV0 12
1115#define CAMERA_EXPOSURE_COMPENSATION_LV1 6
1116#define CAMERA_EXPOSURE_COMPENSATION_LV2 0
1117#define CAMERA_EXPOSURE_COMPENSATION_LV3 -6
1118#define CAMERA_EXPOSURE_COMPENSATION_LV4 -12
1119
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001120enum msm_v4l2_saturation_level {
1121 MSM_V4L2_SATURATION_L0,
1122 MSM_V4L2_SATURATION_L1,
1123 MSM_V4L2_SATURATION_L2,
1124 MSM_V4L2_SATURATION_L3,
1125 MSM_V4L2_SATURATION_L4,
1126 MSM_V4L2_SATURATION_L5,
1127 MSM_V4L2_SATURATION_L6,
1128 MSM_V4L2_SATURATION_L7,
1129 MSM_V4L2_SATURATION_L8,
1130 MSM_V4L2_SATURATION_L9,
1131 MSM_V4L2_SATURATION_L10,
1132};
1133
Suresh Vankadara212d9722012-05-30 15:51:20 +05301134enum msm_v4l2_contrast_level {
1135 MSM_V4L2_CONTRAST_L0,
1136 MSM_V4L2_CONTRAST_L1,
1137 MSM_V4L2_CONTRAST_L2,
1138 MSM_V4L2_CONTRAST_L3,
1139 MSM_V4L2_CONTRAST_L4,
1140 MSM_V4L2_CONTRAST_L5,
1141 MSM_V4L2_CONTRAST_L6,
1142 MSM_V4L2_CONTRAST_L7,
1143 MSM_V4L2_CONTRAST_L8,
1144 MSM_V4L2_CONTRAST_L9,
1145 MSM_V4L2_CONTRAST_L10,
1146};
1147
1148
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001149enum msm_v4l2_exposure_level {
1150 MSM_V4L2_EXPOSURE_N2,
1151 MSM_V4L2_EXPOSURE_N1,
1152 MSM_V4L2_EXPOSURE_D,
1153 MSM_V4L2_EXPOSURE_P1,
1154 MSM_V4L2_EXPOSURE_P2,
1155};
1156
1157enum msm_v4l2_sharpness_level {
1158 MSM_V4L2_SHARPNESS_L0,
1159 MSM_V4L2_SHARPNESS_L1,
1160 MSM_V4L2_SHARPNESS_L2,
1161 MSM_V4L2_SHARPNESS_L3,
1162 MSM_V4L2_SHARPNESS_L4,
1163 MSM_V4L2_SHARPNESS_L5,
1164 MSM_V4L2_SHARPNESS_L6,
1165};
1166
1167enum msm_v4l2_expo_metering_mode {
1168 MSM_V4L2_EXP_FRAME_AVERAGE,
1169 MSM_V4L2_EXP_CENTER_WEIGHTED,
1170 MSM_V4L2_EXP_SPOT_METERING,
1171};
1172
1173enum msm_v4l2_iso_mode {
1174 MSM_V4L2_ISO_AUTO = 0,
1175 MSM_V4L2_ISO_DEBLUR,
1176 MSM_V4L2_ISO_100,
1177 MSM_V4L2_ISO_200,
1178 MSM_V4L2_ISO_400,
1179 MSM_V4L2_ISO_800,
1180 MSM_V4L2_ISO_1600,
1181};
1182
1183enum msm_v4l2_wb_mode {
Suresh Vankadara212d9722012-05-30 15:51:20 +05301184 MSM_V4L2_WB_OFF,
1185 MSM_V4L2_WB_AUTO ,
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001186 MSM_V4L2_WB_CUSTOM,
1187 MSM_V4L2_WB_INCANDESCENT,
1188 MSM_V4L2_WB_FLUORESCENT,
1189 MSM_V4L2_WB_DAYLIGHT,
1190 MSM_V4L2_WB_CLOUDY_DAYLIGHT,
Suresh Vankadara212d9722012-05-30 15:51:20 +05301191};
1192
1193enum msm_v4l2_special_effect {
1194 MSM_V4L2_EFFECT_OFF,
1195 MSM_V4L2_EFFECT_MONO,
1196 MSM_V4L2_EFFECT_NEGATIVE,
1197 MSM_V4L2_EFFECT_SOLARIZE,
1198 MSM_V4L2_EFFECT_SEPIA,
1199 MSM_V4L2_EFFECT_POSTERAIZE,
1200 MSM_V4L2_EFFECT_WHITEBOARD,
1201 MSM_V4L2_EFFECT_BLACKBOARD,
1202 MSM_V4L2_EFFECT_AQUA,
1203 MSM_V4L2_EFFECT_EMBOSS,
1204 MSM_V4L2_EFFECT_SKETCH,
1205 MSM_V4L2_EFFECT_NEON,
1206 MSM_V4L2_EFFECT_MAX,
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001207};
1208
1209enum msm_v4l2_power_line_frequency {
1210 MSM_V4L2_POWER_LINE_OFF,
1211 MSM_V4L2_POWER_LINE_60HZ,
1212 MSM_V4L2_POWER_LINE_50HZ,
1213 MSM_V4L2_POWER_LINE_AUTO,
1214};
Taniya Dasa9bdb012011-09-08 11:21:33 +05301215
Su Liu6c3bb322012-02-14 02:15:05 +05301216#define CAMERA_ISO_TYPE_AUTO 0
1217#define CAMEAR_ISO_TYPE_HJR 1
1218#define CAMEAR_ISO_TYPE_100 2
1219#define CAMERA_ISO_TYPE_200 3
1220#define CAMERA_ISO_TYPE_400 4
1221#define CAMEAR_ISO_TYPE_800 5
1222#define CAMERA_ISO_TYPE_1600 6
1223
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001224struct sensor_pict_fps {
1225 uint16_t prevfps;
1226 uint16_t pictfps;
1227};
1228
1229struct exp_gain_cfg {
1230 uint16_t gain;
1231 uint32_t line;
1232};
1233
1234struct focus_cfg {
1235 int32_t steps;
1236 int dir;
1237};
1238
1239struct fps_cfg {
1240 uint16_t f_mult;
1241 uint16_t fps_div;
1242 uint32_t pict_fps_div;
1243};
1244struct wb_info_cfg {
1245 uint16_t red_gain;
1246 uint16_t green_gain;
1247 uint16_t blue_gain;
1248};
1249struct sensor_3d_exp_cfg {
1250 uint16_t gain;
1251 uint32_t line;
1252 uint16_t r_gain;
1253 uint16_t b_gain;
1254 uint16_t gr_gain;
1255 uint16_t gb_gain;
1256 uint16_t gain_adjust;
1257};
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001258struct sensor_3d_cali_data_t {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001259 unsigned char left_p_matrix[3][4][8];
1260 unsigned char right_p_matrix[3][4][8];
1261 unsigned char square_len[8];
1262 unsigned char focal_len[8];
1263 unsigned char pixel_pitch[8];
1264 uint16_t left_r;
1265 uint16_t left_b;
1266 uint16_t left_gb;
1267 uint16_t left_af_far;
1268 uint16_t left_af_mid;
1269 uint16_t left_af_short;
1270 uint16_t left_af_5um;
1271 uint16_t left_af_50up;
1272 uint16_t left_af_50down;
1273 uint16_t right_r;
1274 uint16_t right_b;
1275 uint16_t right_gb;
1276 uint16_t right_af_far;
1277 uint16_t right_af_mid;
1278 uint16_t right_af_short;
1279 uint16_t right_af_5um;
1280 uint16_t right_af_50up;
1281 uint16_t right_af_50down;
1282};
1283struct sensor_init_cfg {
1284 uint8_t prev_res;
1285 uint8_t pict_res;
1286};
1287
1288struct sensor_calib_data {
1289 /* Color Related Measurements */
1290 uint16_t r_over_g;
1291 uint16_t b_over_g;
1292 uint16_t gr_over_gb;
1293
1294 /* Lens Related Measurements */
1295 uint16_t macro_2_inf;
1296 uint16_t inf_2_macro;
1297 uint16_t stroke_amt;
1298 uint16_t af_pos_1m;
1299 uint16_t af_pos_inf;
1300};
1301
Kevin Chana980f392011-08-01 20:55:00 -07001302enum msm_sensor_resolution_t {
Kevin Chan36e2bdc2011-08-30 17:21:21 -07001303 MSM_SENSOR_RES_FULL,
1304 MSM_SENSOR_RES_QTR,
Kevin Chana980f392011-08-01 20:55:00 -07001305 MSM_SENSOR_RES_2,
1306 MSM_SENSOR_RES_3,
1307 MSM_SENSOR_RES_4,
1308 MSM_SENSOR_RES_5,
1309 MSM_SENSOR_RES_6,
1310 MSM_SENSOR_RES_7,
1311 MSM_SENSOR_INVALID_RES,
1312};
1313
1314struct msm_sensor_output_info_t {
1315 uint16_t x_output;
1316 uint16_t y_output;
1317 uint16_t line_length_pclk;
1318 uint16_t frame_length_lines;
Kevin Chane30d3692011-10-14 16:11:01 -07001319 uint32_t vt_pixel_clk;
1320 uint32_t op_pixel_clk;
Kevin Chan272f6602011-10-18 14:20:03 -07001321 uint16_t binning_factor;
Kevin Chana980f392011-08-01 20:55:00 -07001322};
1323
1324struct sensor_output_info_t {
1325 struct msm_sensor_output_info_t *output_info;
1326 uint16_t num_info;
1327};
1328
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001329struct msm_sensor_exp_gain_info_t {
1330 uint16_t coarse_int_time_addr;
1331 uint16_t global_gain_addr;
1332 uint16_t vert_offset;
1333};
1334
1335struct msm_sensor_output_reg_addr_t {
1336 uint16_t x_output;
1337 uint16_t y_output;
1338 uint16_t line_length_pclk;
1339 uint16_t frame_length_lines;
1340};
1341
1342struct sensor_driver_params_type {
1343 struct msm_camera_i2c_reg_setting *init_settings;
1344 uint16_t init_settings_size;
1345 struct msm_camera_i2c_reg_setting *mode_settings;
1346 uint16_t mode_settings_size;
1347 struct msm_sensor_output_reg_addr_t *sensor_output_reg_addr;
1348 struct msm_camera_i2c_reg_setting *start_settings;
1349 struct msm_camera_i2c_reg_setting *stop_settings;
1350 struct msm_camera_i2c_reg_setting *groupon_settings;
1351 struct msm_camera_i2c_reg_setting *groupoff_settings;
1352 struct msm_sensor_exp_gain_info_t *sensor_exp_gain_info;
1353 struct msm_sensor_output_info_t *output_info;
1354};
1355
Taniya Dasa9bdb012011-09-08 11:21:33 +05301356struct mirror_flip {
1357 int32_t x_mirror;
1358 int32_t y_flip;
1359};
1360
1361struct cord {
1362 uint32_t x;
1363 uint32_t y;
1364};
1365
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001366struct msm_eeprom_data_t {
1367 void *eeprom_data;
1368 uint16_t index;
1369};
1370
Nishant Panditb2157c92012-04-25 01:09:28 +05301371struct msm_camera_csid_vc_cfg {
1372 uint8_t cid;
1373 uint8_t dt;
1374 uint8_t decode_format;
1375};
1376
1377struct csi_lane_params_t {
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001378 uint16_t csi_lane_assign;
Nishant Panditb2157c92012-04-25 01:09:28 +05301379 uint8_t csi_lane_mask;
1380 uint8_t csi_if;
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001381 uint8_t csid_core[2];
1382 uint8_t csi_phy_sel;
1383};
1384
1385struct msm_camera_csid_lut_params {
1386 uint8_t num_cid;
1387 struct msm_camera_csid_vc_cfg *vc_cfg;
1388};
1389
1390struct msm_camera_csid_params {
1391 uint8_t lane_cnt;
1392 uint16_t lane_assign;
1393 uint8_t phy_sel;
1394 struct msm_camera_csid_lut_params lut_params;
1395};
1396
1397struct msm_camera_csiphy_params {
1398 uint8_t lane_cnt;
1399 uint8_t settle_cnt;
1400 uint16_t lane_mask;
1401 uint8_t combo_mode;
1402};
1403
1404struct msm_camera_csi2_params {
1405 struct msm_camera_csid_params csid_params;
1406 struct msm_camera_csiphy_params csiphy_params;
1407};
1408
1409enum msm_camera_csi_data_format {
1410 CSI_8BIT,
1411 CSI_10BIT,
1412 CSI_12BIT,
1413};
1414
1415struct msm_camera_csi_params {
1416 enum msm_camera_csi_data_format data_format;
1417 uint8_t lane_cnt;
1418 uint8_t lane_assign;
1419 uint8_t settle_cnt;
1420 uint8_t dpcm_scheme;
1421};
1422
1423enum csic_cfg_type_t {
1424 CSIC_INIT,
1425 CSIC_CFG,
1426};
1427
1428struct csic_cfg_data {
1429 enum csic_cfg_type_t cfgtype;
1430 struct msm_camera_csi_params *csic_params;
1431};
1432
1433enum csid_cfg_type_t {
1434 CSID_INIT,
1435 CSID_CFG,
1436};
1437
1438struct csid_cfg_data {
1439 enum csid_cfg_type_t cfgtype;
1440 union {
1441 uint32_t csid_version;
1442 struct msm_camera_csid_params *csid_params;
1443 } cfg;
1444};
1445
1446enum csiphy_cfg_type_t {
1447 CSIPHY_INIT,
1448 CSIPHY_CFG,
1449};
1450
1451struct csiphy_cfg_data {
1452 enum csiphy_cfg_type_t cfgtype;
1453 struct msm_camera_csiphy_params *csiphy_params;
Nishant Panditb2157c92012-04-25 01:09:28 +05301454};
1455
1456#define CSI_EMBED_DATA 0x12
1457#define CSI_RESERVED_DATA_0 0x13
1458#define CSI_YUV422_8 0x1E
1459#define CSI_RAW8 0x2A
1460#define CSI_RAW10 0x2B
1461#define CSI_RAW12 0x2C
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001462#define CSI_YUV420_Y_8 0x30
1463#define CSI_YUV420_UV_8 0x31
1464#define CSI_YUV420_JM_8 0x32
Nishant Panditb2157c92012-04-25 01:09:28 +05301465
1466#define CSI_DECODE_6BIT 0
1467#define CSI_DECODE_8BIT 1
1468#define CSI_DECODE_10BIT 2
1469#define CSI_DECODE_DPCM_10_8_10 5
1470
Sreesudhan Ramakrish Ramkumard8123212012-06-30 13:15:27 -07001471#define ISPIF_STREAM(intf, action, vfe) (((intf)<<ISPIF_S_STREAM_SHIFT)+\
1472 (action)+((vfe)<<ISPIF_VFE_INTF_SHIFT))
1473#define ISPIF_ON_FRAME_BOUNDARY (0x01 << 0)
1474#define ISPIF_OFF_FRAME_BOUNDARY (0x01 << 1)
1475#define ISPIF_OFF_IMMEDIATELY (0x01 << 2)
1476#define ISPIF_S_STREAM_SHIFT 4
1477#define ISPIF_VFE_INTF_SHIFT 12
Nishant Panditb2157c92012-04-25 01:09:28 +05301478
1479#define PIX_0 (0x01 << 0)
1480#define RDI_0 (0x01 << 1)
1481#define PIX_1 (0x01 << 2)
1482#define RDI_1 (0x01 << 3)
Sreesudhan Ramakrish Ramkumard8123212012-06-30 13:15:27 -07001483#define RDI_2 (0x01 << 4)
Nishant Panditb2157c92012-04-25 01:09:28 +05301484
Sreesudhan Ramakrish Ramkumard8123212012-06-30 13:15:27 -07001485enum msm_ispif_vfe_intf {
1486 VFE0,
1487 VFE1,
1488 VFE_MAX,
1489};
Nishant Panditb2157c92012-04-25 01:09:28 +05301490
1491enum msm_ispif_intftype {
1492 PIX0,
1493 RDI0,
1494 PIX1,
1495 RDI1,
Nishant Panditb2157c92012-04-25 01:09:28 +05301496 RDI2,
1497 INTF_MAX,
1498};
1499
1500enum msm_ispif_vc {
1501 VC0,
1502 VC1,
1503 VC2,
1504 VC3,
1505};
1506
1507enum msm_ispif_cid {
1508 CID0,
1509 CID1,
1510 CID2,
1511 CID3,
1512 CID4,
1513 CID5,
1514 CID6,
1515 CID7,
1516 CID8,
1517 CID9,
1518 CID10,
1519 CID11,
1520 CID12,
1521 CID13,
1522 CID14,
1523 CID15,
1524};
1525
1526struct msm_ispif_params {
1527 uint8_t intftype;
1528 uint16_t cid_mask;
1529 uint8_t csid;
Sreesudhan Ramakrish Ramkumard8123212012-06-30 13:15:27 -07001530 uint8_t vfe_intf;
Nishant Panditb2157c92012-04-25 01:09:28 +05301531};
1532
1533struct msm_ispif_params_list {
1534 uint32_t len;
1535 struct msm_ispif_params params[4];
1536};
1537
1538enum ispif_cfg_type_t {
1539 ISPIF_INIT,
1540 ISPIF_SET_CFG,
1541 ISPIF_SET_ON_FRAME_BOUNDARY,
1542 ISPIF_SET_OFF_FRAME_BOUNDARY,
1543 ISPIF_SET_OFF_IMMEDIATELY,
1544 ISPIF_RELEASE,
1545};
1546
1547struct ispif_cfg_data {
1548 enum ispif_cfg_type_t cfgtype;
1549 union {
1550 uint32_t csid_version;
1551 int cmd;
1552 struct msm_ispif_params_list ispif_params;
1553 } cfg;
1554};
1555
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001556enum msm_camera_i2c_reg_addr_type {
1557 MSM_CAMERA_I2C_BYTE_ADDR = 1,
1558 MSM_CAMERA_I2C_WORD_ADDR,
1559};
1560
1561struct msm_camera_i2c_reg_array {
1562 uint16_t reg_addr;
1563 uint16_t reg_data;
1564};
1565
1566enum msm_camera_i2c_data_type {
1567 MSM_CAMERA_I2C_BYTE_DATA = 1,
1568 MSM_CAMERA_I2C_WORD_DATA,
1569 MSM_CAMERA_I2C_SET_BYTE_MASK,
1570 MSM_CAMERA_I2C_UNSET_BYTE_MASK,
1571 MSM_CAMERA_I2C_SET_WORD_MASK,
1572 MSM_CAMERA_I2C_UNSET_WORD_MASK,
1573 MSM_CAMERA_I2C_SET_BYTE_WRITE_MASK_DATA,
1574};
1575
1576struct msm_camera_i2c_reg_setting {
1577 struct msm_camera_i2c_reg_array *reg_setting;
1578 uint16_t size;
1579 enum msm_camera_i2c_reg_addr_type addr_type;
1580 enum msm_camera_i2c_data_type data_type;
1581 uint16_t delay;
1582};
1583
1584enum oem_setting_type {
1585 I2C_READ = 1,
1586 I2C_WRITE,
1587 GPIO_OP,
1588 EEPROM_READ,
1589 VREG_SET,
1590 CLK_SET,
1591};
1592
1593struct sensor_oem_setting {
1594 enum oem_setting_type type;
1595 void *data;
1596};
1597
1598enum camera_vreg_type {
1599 REG_LDO,
1600 REG_VS,
1601 REG_GPIO,
1602};
1603
1604struct camera_vreg_t {
1605 const char *reg_name;
1606 enum camera_vreg_type type;
1607 int min_voltage;
1608 int max_voltage;
1609 int op_mode;
1610 uint32_t delay;
1611};
1612
1613struct msm_camera_vreg_setting {
1614 struct camera_vreg_t *cam_vreg;
1615 uint16_t num_vreg;
1616 uint8_t enable;
1617};
1618
1619struct msm_cam_clk_info {
1620 const char *clk_name;
1621 long clk_rate;
1622 uint32_t delay;
1623};
1624
1625struct msm_cam_clk_setting {
1626 struct msm_cam_clk_info *clk_info;
1627 uint16_t num_clk_info;
1628 uint8_t enable;
1629};
1630
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001631struct sensor_cfg_data {
1632 int cfgtype;
1633 int mode;
1634 int rs;
1635 uint8_t max_steps;
1636
1637 union {
1638 int8_t effect;
1639 uint8_t lens_shading;
1640 uint16_t prevl_pf;
1641 uint16_t prevp_pl;
1642 uint16_t pictl_pf;
1643 uint16_t pictp_pl;
1644 uint32_t pict_max_exp_lc;
1645 uint16_t p_fps;
Su Liu6c3bb322012-02-14 02:15:05 +05301646 uint8_t iso_type;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001647 struct sensor_init_cfg init_info;
1648 struct sensor_pict_fps gfps;
1649 struct exp_gain_cfg exp_gain;
1650 struct focus_cfg focus;
1651 struct fps_cfg fps;
1652 struct wb_info_cfg wb_info;
1653 struct sensor_3d_exp_cfg sensor_3d_exp;
1654 struct sensor_calib_data calib_info;
Kevin Chana980f392011-08-01 20:55:00 -07001655 struct sensor_output_info_t output_info;
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001656 struct msm_eeprom_data_t eeprom_data;
Nishant Panditb2157c92012-04-25 01:09:28 +05301657 struct csi_lane_params_t csi_lane_params;
Taniya Dasa9bdb012011-09-08 11:21:33 +05301658 /* QRD */
1659 uint16_t antibanding;
1660 uint8_t contrast;
1661 uint8_t saturation;
1662 uint8_t sharpness;
1663 int8_t brightness;
1664 int ae_mode;
1665 uint8_t wb_val;
1666 int8_t exp_compensation;
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001667 uint32_t pclk;
Taniya Dasa9bdb012011-09-08 11:21:33 +05301668 struct cord aec_cord;
1669 int is_autoflash;
1670 struct mirror_flip mirror_flip;
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001671 void *setting;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001672 } cfg;
1673};
1674
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001675enum gpio_operation_type {
1676 GPIO_REQUEST,
1677 GPIO_FREE,
1678 GPIO_SET_DIRECTION_OUTPUT,
1679 GPIO_SET_DIRECTION_INPUT,
1680 GPIO_GET_VALUE,
1681 GPIO_SET_VALUE,
1682};
1683
1684struct msm_cam_gpio_operation {
1685 enum gpio_operation_type op_type;
1686 unsigned address;
1687 int value;
1688 const char *tag;
1689};
1690
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001691struct damping_params_t {
1692 uint32_t damping_step;
1693 uint32_t damping_delay;
1694 uint32_t hw_params;
1695};
1696
1697enum actuator_type {
1698 ACTUATOR_VCM,
1699 ACTUATOR_PIEZO,
1700};
1701
1702enum msm_actuator_data_type {
1703 MSM_ACTUATOR_BYTE_DATA = 1,
1704 MSM_ACTUATOR_WORD_DATA,
1705};
1706
1707enum msm_actuator_addr_type {
1708 MSM_ACTUATOR_BYTE_ADDR = 1,
1709 MSM_ACTUATOR_WORD_ADDR,
1710};
1711
1712enum msm_actuator_write_type {
1713 MSM_ACTUATOR_WRITE_HW_DAMP,
1714 MSM_ACTUATOR_WRITE_DAC,
1715};
1716
1717struct msm_actuator_reg_params_t {
1718 enum msm_actuator_write_type reg_write_type;
1719 uint32_t hw_mask;
1720 uint16_t reg_addr;
1721 uint16_t hw_shift;
1722 uint16_t data_shift;
1723};
1724
1725struct reg_settings_t {
1726 uint16_t reg_addr;
1727 uint16_t reg_data;
1728};
1729
1730struct region_params_t {
1731 /* [0] = ForwardDirection Macro boundary
1732 [1] = ReverseDirection Inf boundary
1733 */
1734 uint16_t step_bound[2];
1735 uint16_t code_per_step;
1736};
1737
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001738struct msm_actuator_move_params_t {
1739 int8_t dir;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001740 int8_t sign_dir;
1741 int16_t dest_step_pos;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001742 int32_t num_steps;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001743 struct damping_params_t *ringing_params;
1744};
1745
1746struct msm_actuator_tuning_params_t {
1747 int16_t initial_code;
1748 uint16_t pwd_step;
1749 uint16_t region_size;
1750 uint32_t total_steps;
1751 struct region_params_t *region_params;
1752};
1753
1754struct msm_actuator_params_t {
1755 enum actuator_type act_type;
1756 uint8_t reg_tbl_size;
1757 uint16_t data_size;
1758 uint16_t init_setting_size;
1759 uint32_t i2c_addr;
1760 enum msm_actuator_addr_type i2c_addr_type;
1761 enum msm_actuator_data_type i2c_data_type;
1762 struct msm_actuator_reg_params_t *reg_tbl_params;
1763 struct reg_settings_t *init_settings;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001764};
1765
1766struct msm_actuator_set_info_t {
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001767 struct msm_actuator_params_t actuator_params;
1768 struct msm_actuator_tuning_params_t af_tuning_params;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001769};
1770
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001771struct msm_actuator_get_info_t {
1772 uint32_t focal_length_num;
1773 uint32_t focal_length_den;
1774 uint32_t f_number_num;
1775 uint32_t f_number_den;
1776 uint32_t f_pix_num;
1777 uint32_t f_pix_den;
1778 uint32_t total_f_dist_num;
1779 uint32_t total_f_dist_den;
Jeyaprakash Soundrapandian04592002012-02-08 10:29:50 -08001780 uint32_t hor_view_angle_num;
1781 uint32_t hor_view_angle_den;
1782 uint32_t ver_view_angle_num;
1783 uint32_t ver_view_angle_den;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001784};
1785
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001786enum af_camera_name {
1787 ACTUATOR_MAIN_CAM_0,
1788 ACTUATOR_MAIN_CAM_1,
1789 ACTUATOR_MAIN_CAM_2,
1790 ACTUATOR_MAIN_CAM_3,
1791 ACTUATOR_MAIN_CAM_4,
1792 ACTUATOR_MAIN_CAM_5,
1793 ACTUATOR_WEB_CAM_0,
1794 ACTUATOR_WEB_CAM_1,
1795 ACTUATOR_WEB_CAM_2,
1796};
1797
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001798struct msm_actuator_cfg_data {
1799 int cfgtype;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001800 uint8_t is_af_supported;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001801 union {
1802 struct msm_actuator_move_params_t move;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001803 struct msm_actuator_set_info_t set_info;
1804 struct msm_actuator_get_info_t get_info;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001805 enum af_camera_name cam_name;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001806 } cfg;
1807};
1808
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001809struct msm_eeprom_support {
1810 uint16_t is_supported;
1811 uint16_t size;
1812 uint16_t index;
1813 uint16_t qvalue;
1814};
1815
1816struct msm_calib_wb {
1817 uint16_t r_over_g;
1818 uint16_t b_over_g;
1819 uint16_t gr_over_gb;
1820};
1821
1822struct msm_calib_af {
1823 uint16_t macro_dac;
1824 uint16_t inf_dac;
1825 uint16_t start_dac;
1826};
1827
1828struct msm_calib_lsc {
1829 uint16_t r_gain[221];
1830 uint16_t b_gain[221];
1831 uint16_t gr_gain[221];
1832 uint16_t gb_gain[221];
1833};
1834
1835struct pixel_t {
1836 int x;
1837 int y;
1838};
1839
1840struct msm_calib_dpc {
1841 uint16_t validcount;
1842 struct pixel_t snapshot_coord[128];
1843 struct pixel_t preview_coord[128];
1844 struct pixel_t video_coord[128];
1845};
1846
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001847struct msm_calib_raw {
1848 uint8_t *data;
1849 uint32_t size;
1850};
1851
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001852struct msm_camera_eeprom_info_t {
1853 struct msm_eeprom_support af;
1854 struct msm_eeprom_support wb;
1855 struct msm_eeprom_support lsc;
1856 struct msm_eeprom_support dpc;
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001857 struct msm_eeprom_support raw;
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001858};
1859
1860struct msm_eeprom_cfg_data {
1861 int cfgtype;
1862 uint8_t is_eeprom_supported;
1863 union {
1864 struct msm_eeprom_data_t get_data;
1865 struct msm_camera_eeprom_info_t get_info;
1866 } cfg;
1867};
1868
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001869struct sensor_large_data {
1870 int cfgtype;
1871 union {
1872 struct sensor_3d_cali_data_t sensor_3d_cali_data;
1873 } data;
1874};
1875
1876enum sensor_type_t {
1877 BAYER,
1878 YUV,
1879 JPEG_SOC,
1880};
1881
1882enum flash_type {
1883 LED_FLASH,
1884 STROBE_FLASH,
1885};
1886
1887enum strobe_flash_ctrl_type {
1888 STROBE_FLASH_CTRL_INIT,
1889 STROBE_FLASH_CTRL_CHARGE,
1890 STROBE_FLASH_CTRL_RELEASE
1891};
1892
1893struct strobe_flash_ctrl_data {
1894 enum strobe_flash_ctrl_type type;
1895 int charge_en;
1896};
1897
1898struct msm_camera_info {
1899 int num_cameras;
1900 uint8_t has_3d_support[MSM_MAX_CAMERA_SENSORS];
1901 uint8_t is_internal_cam[MSM_MAX_CAMERA_SENSORS];
1902 uint32_t s_mount_angle[MSM_MAX_CAMERA_SENSORS];
1903 const char *video_dev_name[MSM_MAX_CAMERA_SENSORS];
1904 enum sensor_type_t sensor_type[MSM_MAX_CAMERA_SENSORS];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001905};
1906
1907struct msm_cam_config_dev_info {
1908 int num_config_nodes;
1909 const char *config_dev_name[MSM_MAX_CAMERA_CONFIGS];
Ankit Premrajkaf94bcc62011-08-22 15:23:53 -07001910 int config_dev_id[MSM_MAX_CAMERA_CONFIGS];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001911};
1912
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -08001913struct msm_mctl_node_info {
1914 int num_mctl_nodes;
1915 const char *mctl_node_name[MSM_MAX_CAMERA_SENSORS];
1916};
1917
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001918struct flash_ctrl_data {
1919 int flashtype;
1920 union {
1921 int led_state;
1922 struct strobe_flash_ctrl_data strobe_ctrl;
1923 } ctrl_data;
1924};
1925
1926#define GET_NAME 0
1927#define GET_PREVIEW_LINE_PER_FRAME 1
1928#define GET_PREVIEW_PIXELS_PER_LINE 2
1929#define GET_SNAPSHOT_LINE_PER_FRAME 3
1930#define GET_SNAPSHOT_PIXELS_PER_LINE 4
1931#define GET_SNAPSHOT_FPS 5
1932#define GET_SNAPSHOT_MAX_EP_LINE_CNT 6
1933
1934struct msm_camsensor_info {
1935 char name[MAX_SENSOR_NAME];
1936 uint8_t flash_enabled;
Sreesudhan Ramakrish Ramkumara2688822012-04-05 20:22:50 -07001937 uint8_t strobe_flash_enabled;
1938 uint8_t actuator_enabled;
Nishant Panditb2157c92012-04-25 01:09:28 +05301939 uint8_t ispif_supported;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001940 int8_t total_steps;
1941 uint8_t support_3d;
Mingcheng Zhuc85b8ad2012-03-08 17:47:17 -08001942 enum flash_type flashtype;
1943 enum sensor_type_t sensor_type;
1944 uint32_t pxlcode; /* enum v4l2_mbus_pixelcode */
1945 uint32_t camera_type; /* msm_camera_type */
1946 int mount_angle;
1947 uint32_t max_width;
1948 uint32_t max_height;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001949};
Kiran Kumar H Nceea7622011-08-23 14:01:03 -07001950
1951#define V4L2_SINGLE_PLANE 0
1952#define V4L2_MULTI_PLANE_Y 0
1953#define V4L2_MULTI_PLANE_CBCR 1
1954#define V4L2_MULTI_PLANE_CB 1
1955#define V4L2_MULTI_PLANE_CR 2
1956
1957struct plane_data {
1958 int plane_id;
1959 uint32_t offset;
1960 unsigned long size;
1961};
1962
1963struct img_plane_info {
1964 uint32_t width;
1965 uint32_t height;
1966 uint32_t pixelformat;
1967 uint8_t buffer_type; /*Single/Multi planar*/
1968 uint8_t output_port;
1969 uint32_t ext_mode;
1970 uint8_t num_planes;
1971 struct plane_data plane[MAX_PLANES];
Mingcheng Zhu996be182011-10-16 16:04:23 -07001972 uint32_t sp_y_offset;
Kiran Kumar H N90785902012-07-05 13:59:38 -07001973 uint32_t inst_handle;
Kiran Kumar H Nceea7622011-08-23 14:01:03 -07001974};
1975
Kevin Chan210061f2012-02-14 20:56:16 -08001976#define QCAMERA_NAME "qcamera"
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07001977#define QCAMERA_SERVER_NAME "qcamera_server"
Kevin Chan210061f2012-02-14 20:56:16 -08001978#define QCAMERA_DEVICE_GROUP_ID 1
1979#define QCAMERA_VNODE_GROUP_ID 2
1980
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07001981enum msm_cam_subdev_type {
1982 CSIPHY_DEV,
1983 CSID_DEV,
1984 CSIC_DEV,
1985 ISPIF_DEV,
1986 VFE_DEV,
1987 AXI_DEV,
1988 VPE_DEV,
1989 SENSOR_DEV,
1990 ACTUATOR_DEV,
1991 EEPROM_DEV,
1992 GESTURE_DEV,
1993 IRQ_ROUTER_DEV,
1994 CPP_DEV,
Sreesudhan Ramakrish Ramkumarc842b612012-05-21 17:23:24 -07001995 CCI_DEV,
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07001996};
1997
1998struct msm_mctl_set_sdev_data {
1999 uint32_t revision;
2000 enum msm_cam_subdev_type sdev_type;
2001};
2002
Kevin Chan94b4c832012-03-02 21:27:16 -08002003#define MSM_CAM_V4L2_IOCTL_GET_CAMERA_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07002004 _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08002005
2006#define MSM_CAM_V4L2_IOCTL_GET_CONFIG_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07002007 _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08002008
2009#define MSM_CAM_V4L2_IOCTL_GET_MCTL_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07002010 _IOWR('V', BASE_VIDIOC_PRIVATE + 3, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08002011
2012#define MSM_CAM_V4L2_IOCTL_CTRL_CMD_DONE \
Kevin Chan41a38702012-06-06 22:25:41 -07002013 _IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08002014
2015#define MSM_CAM_V4L2_IOCTL_GET_EVENT_PAYLOAD \
Kevin Chan41a38702012-06-06 22:25:41 -07002016 _IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08002017
Sunid Wilson4584b5f2012-04-13 12:48:25 -07002018#define MSM_CAM_IOCTL_SEND_EVENT \
2019 _IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct v4l2_event)
2020
Kiran Kumar H N64bd23c2012-05-25 12:06:21 -07002021#define MSM_CAM_V4L2_IOCTL_CFG_VPE \
2022 _IOWR('V', BASE_VIDIOC_PRIVATE + 7, struct msm_vpe_cfg_cmd)
2023
Kevin Chan41a38702012-06-06 22:25:41 -07002024#define MSM_CAM_V4L2_IOCTL_PRIVATE_S_CTRL \
2025 _IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct msm_camera_v4l2_ioctl_t)
2026
Kiran Kumar H N90785902012-07-05 13:59:38 -07002027#define MSM_CAM_V4L2_IOCTL_PRIVATE_G_CTRL \
2028 _IOWR('V', BASE_VIDIOC_PRIVATE + 9, struct msm_camera_v4l2_ioctl_t)
2029
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08002030#define MSM_CAM_V4L2_IOCTL_PRIVATE_GENERAL \
2031 _IOW('V', BASE_VIDIOC_PRIVATE + 10, struct msm_camera_v4l2_ioctl_t)
2032
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07002033#define VIDIOC_MSM_VPE_INIT \
2034 _IO('V', BASE_VIDIOC_PRIVATE + 15)
2035
2036#define VIDIOC_MSM_VPE_RELEASE \
2037 _IO('V', BASE_VIDIOC_PRIVATE + 16)
2038
2039#define VIDIOC_MSM_VPE_CFG \
2040 _IOWR('V', BASE_VIDIOC_PRIVATE + 17, struct msm_mctl_pp_params *)
2041
2042#define VIDIOC_MSM_AXI_INIT \
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08002043 _IOWR('V', BASE_VIDIOC_PRIVATE + 18, uint8_t *)
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07002044
2045#define VIDIOC_MSM_AXI_RELEASE \
2046 _IO('V', BASE_VIDIOC_PRIVATE + 19)
2047
2048#define VIDIOC_MSM_AXI_CFG \
2049 _IOWR('V', BASE_VIDIOC_PRIVATE + 20, void *)
2050
2051#define VIDIOC_MSM_AXI_IRQ \
2052 _IOWR('V', BASE_VIDIOC_PRIVATE + 21, void *)
2053
2054#define VIDIOC_MSM_AXI_BUF_CFG \
2055 _IOWR('V', BASE_VIDIOC_PRIVATE + 22, void *)
2056
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08002057#define VIDIOC_MSM_AXI_RDI_COUNT_UPDATE \
2058 _IOWR('V', BASE_VIDIOC_PRIVATE + 23, struct rdi_count_msg)
2059
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07002060#define VIDIOC_MSM_VFE_INIT \
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08002061 _IO('V', BASE_VIDIOC_PRIVATE + 24)
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07002062
2063#define VIDIOC_MSM_VFE_RELEASE \
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08002064 _IO('V', BASE_VIDIOC_PRIVATE + 25)
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07002065
Kevin Chan94b4c832012-03-02 21:27:16 -08002066struct msm_camera_v4l2_ioctl_t {
Kevin Chan41a38702012-06-06 22:25:41 -07002067 uint32_t id;
Sudhir Sharma4472ce52012-12-01 14:00:27 -08002068 uint32_t len;
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08002069 uint32_t trans_code;
2070 void __user *ioctl_ptr;
Kevin Chan94b4c832012-03-02 21:27:16 -08002071};
2072
Lakshmi Narayana Kalavalacd3d81e2012-07-31 13:04:03 -07002073struct msm_camera_vfe_params_t {
2074 uint32_t operation_mode;
2075 uint32_t capture_count;
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08002076 uint8_t skip_reset;
2077 uint8_t stop_immediately;
Lakshmi Narayana Kalavalacd3d81e2012-07-31 13:04:03 -07002078 uint16_t port_info;
Lakshmi Narayana Kalavala3e8a1d12012-07-31 15:00:09 -07002079 uint32_t inst_handle;
Lakshmi Narayana Kalavalacd3d81e2012-07-31 13:04:03 -07002080 uint16_t cmd_type;
Azam Sadiq Pasha Kapatrala Syed99861662012-12-02 22:05:25 -08002081 uint8_t stream_error;
Lakshmi Narayana Kalavalacd3d81e2012-07-31 13:04:03 -07002082};
2083
Kiran Kumar H Nb4a278e2012-06-18 19:25:47 -07002084enum msm_camss_irq_idx {
2085 CAMERA_SS_IRQ_0,
2086 CAMERA_SS_IRQ_1,
2087 CAMERA_SS_IRQ_2,
2088 CAMERA_SS_IRQ_3,
2089 CAMERA_SS_IRQ_4,
2090 CAMERA_SS_IRQ_5,
2091 CAMERA_SS_IRQ_6,
2092 CAMERA_SS_IRQ_7,
2093 CAMERA_SS_IRQ_8,
2094 CAMERA_SS_IRQ_9,
2095 CAMERA_SS_IRQ_10,
2096 CAMERA_SS_IRQ_11,
2097 CAMERA_SS_IRQ_12,
2098 CAMERA_SS_IRQ_MAX
2099};
2100
2101enum msm_cam_hw_idx {
2102 MSM_CAM_HW_MICRO,
2103 MSM_CAM_HW_CCI,
2104 MSM_CAM_HW_CSI0,
2105 MSM_CAM_HW_CSI1,
2106 MSM_CAM_HW_CSI2,
2107 MSM_CAM_HW_CSI3,
2108 MSM_CAM_HW_ISPIF,
2109 MSM_CAM_HW_CPP,
2110 MSM_CAM_HW_VFE0,
2111 MSM_CAM_HW_VFE1,
2112 MSM_CAM_HW_JPEG0,
2113 MSM_CAM_HW_JPEG1,
2114 MSM_CAM_HW_JPEG2,
2115 MSM_CAM_HW_MAX
2116};
2117
2118struct msm_camera_irq_cfg {
2119 /* Bit mask of all the camera hardwares that needs to
2120 * be composited into a single IRQ to the MSM.
2121 * Current usage: (may be updated based on hw changes)
2122 * Bits 31:13 - Reserved.
2123 * Bits 12:0
2124 * 12 - MSM_CAM_HW_JPEG2
2125 * 11 - MSM_CAM_HW_JPEG1
2126 * 10 - MSM_CAM_HW_JPEG0
2127 * 9 - MSM_CAM_HW_VFE1
2128 * 8 - MSM_CAM_HW_VFE0
2129 * 7 - MSM_CAM_HW_CPP
2130 * 6 - MSM_CAM_HW_ISPIF
2131 * 5 - MSM_CAM_HW_CSI3
2132 * 4 - MSM_CAM_HW_CSI2
2133 * 3 - MSM_CAM_HW_CSI1
2134 * 2 - MSM_CAM_HW_CSI0
2135 * 1 - MSM_CAM_HW_CCI
2136 * 0 - MSM_CAM_HW_MICRO
2137 */
2138 uint32_t cam_hw_mask;
2139 uint8_t irq_idx;
2140 uint8_t num_hwcore;
2141};
2142
2143#define MSM_IRQROUTER_CFG_COMPIRQ \
2144 _IOWR('V', BASE_VIDIOC_PRIVATE, void __user *)
2145
Kevin Chan73ec7282012-06-07 01:32:00 -07002146#define MAX_NUM_CPP_STRIPS 8
2147
2148enum msm_cpp_frame_type {
2149 MSM_CPP_OFFLINE_FRAME,
2150 MSM_CPP_REALTIME_FRAME,
2151};
2152
2153struct msm_cpp_frame_strip_info {
2154 int scale_v_en;
2155 int scale_h_en;
2156
2157 int upscale_v_en;
2158 int upscale_h_en;
2159
2160 int src_start_x;
2161 int src_end_x;
2162 int src_start_y;
2163 int src_end_y;
2164
2165 /* Padding is required for upscaler because it does not
2166 * pad internally like other blocks, also needed for rotation
2167 * rotation expects all the blocks in the stripe to be the same size
2168 * Padding is done such that all the extra padded pixels
2169 * are on the right and bottom
2170 */
2171 int pad_bottom;
2172 int pad_top;
2173 int pad_right;
2174 int pad_left;
2175
2176 int v_init_phase;
2177 int h_init_phase;
2178 int h_phase_step;
2179 int v_phase_step;
2180
2181 int prescale_crop_width_first_pixel;
2182 int prescale_crop_width_last_pixel;
2183 int prescale_crop_height_first_line;
2184 int prescale_crop_height_last_line;
2185
2186 int postscale_crop_height_first_line;
2187 int postscale_crop_height_last_line;
2188 int postscale_crop_width_first_pixel;
2189 int postscale_crop_width_last_pixel;
2190
2191 int dst_start_x;
2192 int dst_end_x;
2193 int dst_start_y;
2194 int dst_end_y;
2195
2196 int bytes_per_pixel;
2197 unsigned int source_address;
2198 unsigned int destination_address;
2199 unsigned int src_stride;
2200 unsigned int dst_stride;
2201 int rotate_270;
2202 int horizontal_flip;
2203 int vertical_flip;
2204 int scale_output_width;
2205 int scale_output_height;
2206};
2207
2208struct msm_cpp_frame_info_t {
2209 int32_t frame_id;
2210 uint32_t inst_id;
2211 uint32_t client_id;
2212 enum msm_cpp_frame_type frame_type;
2213 uint32_t num_strips;
2214 struct msm_cpp_frame_strip_info *strip_info;
2215};
2216
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -07002217struct msm_ver_num_info {
2218 uint32_t main;
2219 uint32_t minor;
2220 uint32_t rev;
2221};
2222
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08002223struct intf_mctl_mapping_cfg {
2224 int is_bayer_sensor;
2225 int vnode_id;
2226 int num_entries;
2227 uint32_t image_modes[MSM_V4L2_EXT_CAPTURE_MODE_MAX];
2228};
2229
Kevin Chan73ec7282012-06-07 01:32:00 -07002230#define VIDIOC_MSM_CPP_CFG \
2231 _IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_camera_v4l2_ioctl_t)
2232
2233#define VIDIOC_MSM_CPP_GET_EVENTPAYLOAD \
2234 _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t)
2235
2236#define VIDIOC_MSM_CPP_GET_INST_INFO \
2237 _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
2238
2239#define V4L2_EVENT_CPP_FRAME_DONE (V4L2_EVENT_PRIVATE_START + 0)
2240
Kiran Kumar H N90785902012-07-05 13:59:38 -07002241/* Instance Handle - inst_handle
2242 * Data bundle containing the information about where
2243 * to get a buffer for a particular camera instance.
2244 * This is a bitmask containing the following data:
2245 * Buffer Handle Bitmask:
2246 * ------------------------------------
2247 * Bits : Purpose
2248 * ------------------------------------
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08002249 * 31 : is Dev ID valid?
2250 * 30 - 24 : Dev ID.
Kiran Kumar H N90785902012-07-05 13:59:38 -07002251 * 23 : is Image mode valid?
2252 * 22 - 16 : Image mode.
2253 * 15 : is MCTL PP inst idx valid?
2254 * 14 - 8 : MCTL PP inst idx.
2255 * 7 : is Video inst idx valid?
2256 * 6 - 0 : Video inst idx.
2257 */
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08002258#define CLR_DEVID_MODE(handle) (handle &= 0x00FFFFFF)
2259#define SET_DEVID_MODE(handle, data) \
2260 (handle |= ((0x1 << 31) | ((data & 0x7F) << 24)))
2261#define GET_DEVID_MODE(handle) \
2262 ((handle & 0x80000000) ? ((handle & 0x7F000000) >> 24) : 0xFF)
2263
Kiran Kumar H N90785902012-07-05 13:59:38 -07002264#define CLR_IMG_MODE(handle) (handle &= 0xFF00FFFF)
2265#define SET_IMG_MODE(handle, data) \
2266 (handle |= ((0x1 << 23) | ((data & 0x7F) << 16)))
2267#define GET_IMG_MODE(handle) \
2268 ((handle & 0x800000) ? ((handle & 0x7F0000) >> 16) : 0xFF)
2269
2270#define CLR_MCTLPP_INST_IDX(handle) (handle &= 0xFFFF00FF)
2271#define SET_MCTLPP_INST_IDX(handle, data) \
2272 (handle |= ((0x1 << 15) | ((data & 0x7F) << 8)))
2273#define GET_MCTLPP_INST_IDX(handle) \
2274 ((handle & 0x8000) ? ((handle & 0x7F00) >> 8) : 0xFF)
2275
2276#define CLR_VIDEO_INST_IDX(handle) (handle &= 0xFFFFFF00)
2277#define GET_VIDEO_INST_IDX(handle) \
2278 ((handle & 0x80) ? (handle & 0x7F) : 0xFF)
2279#define SET_VIDEO_INST_IDX(handle, data) \
2280 (handle |= (0x1 << 7) | (data & 0x7F))
2281
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002282#endif /* __LINUX_MSM_CAMERA_H */