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Brian Swetland30421022007-11-26 04:11:43 -08001/* arch/arm/mach-msm/io.c
2 *
Daniel Walkercf62ffa2010-05-04 15:12:27 -07003 * MSM7K, QSD io support
Brian Swetland30421022007-11-26 04:11:43 -08004 *
5 * Copyright (C) 2007 Google, Inc.
David Brown8c27e6f2011-01-07 10:20:49 -08006 * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
Brian Swetland30421022007-11-26 04:11:43 -08007 * Author: Brian Swetland <swetland@google.com>
8 *
9 * This software is licensed under the terms of the GNU General Public
10 * License version 2, as published by the Free Software Foundation, and
11 * may be copied, distributed, and modified under those terms.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 */
19
20#include <linux/kernel.h>
21#include <linux/init.h>
Russell Kingfced80c2008-09-06 12:10:45 +010022#include <linux/io.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070023#include <linux/module.h>
Brian Swetland30421022007-11-26 04:11:43 -080024
Russell Kinga09e64f2008-08-05 16:14:15 +010025#include <mach/hardware.h>
Brian Swetland30421022007-11-26 04:11:43 -080026#include <asm/page.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010027#include <mach/msm_iomap.h>
Brian Swetland30421022007-11-26 04:11:43 -080028#include <asm/mach/map.h>
29
Russell Kinga09e64f2008-08-05 16:14:15 +010030#include <mach/board.h>
Brian Swetland30421022007-11-26 04:11:43 -080031
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070032#define MSM_CHIP_DEVICE(name, chip) { \
Brian Swetlandbcc0f6a2008-09-10 14:00:53 -070033 .virtual = (unsigned long) MSM_##name##_BASE, \
David Brown8c27e6f2011-01-07 10:20:49 -080034 .pfn = __phys_to_pfn(chip##_##name##_PHYS), \
35 .length = chip##_##name##_SIZE, \
Brian Swetland30421022007-11-26 04:11:43 -080036 .type = MT_DEVICE_NONSHARED, \
37 }
38
David Brown8c27e6f2011-01-07 10:20:49 -080039#define MSM_DEVICE(name) MSM_CHIP_DEVICE(name, MSM)
40
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070041/* msm_shared_ram_phys default value of 0x00100000 is the most common value
42 * and should work as-is for any target without stacked memory.
43 */
44unsigned int msm_shared_ram_phys = 0x00100000;
45
46static void msm_map_io(struct map_desc *io_desc, int size)
47{
48 int i;
49
50 BUG_ON(!size);
51 for (i = 0; i < size; i++)
52 if (io_desc[i].virtual == (unsigned long)MSM_SHARED_RAM_BASE)
53 io_desc[i].pfn = __phys_to_pfn(msm_shared_ram_phys);
54
55 iotable_init(io_desc, size);
56}
57
58#if defined(CONFIG_ARCH_MSM7X01A) || defined(CONFIG_ARCH_MSM7X27) \
Daniel Walkercf62ffa2010-05-04 15:12:27 -070059 || defined(CONFIG_ARCH_MSM7X25)
Brian Swetland30421022007-11-26 04:11:43 -080060static struct map_desc msm_io_desc[] __initdata = {
61 MSM_DEVICE(VIC),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070062 MSM_DEVICE(CSR),
63 MSM_DEVICE(TMR),
Brian Swetland30421022007-11-26 04:11:43 -080064 MSM_DEVICE(DMOV),
Brian Swetland30421022007-11-26 04:11:43 -080065 MSM_DEVICE(GPIO1),
66 MSM_DEVICE(GPIO2),
Brian Swetland30421022007-11-26 04:11:43 -080067 MSM_DEVICE(CLK_CTL),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070068 MSM_DEVICE(AD5),
69 MSM_DEVICE(MDC),
Pavel Machek6339f662009-11-02 11:48:29 +010070#ifdef CONFIG_MSM_DEBUG_UART
71 MSM_DEVICE(DEBUG_UART),
72#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070073#ifdef CONFIG_CACHE_L2X0
74 {
75 .virtual = (unsigned long) MSM_L2CC_BASE,
76 .pfn = __phys_to_pfn(MSM_L2CC_PHYS),
77 .length = MSM_L2CC_SIZE,
78 .type = MT_DEVICE,
79 },
Dima Zavinb42dc442010-01-29 11:43:42 -080080#endif
Brian Swetland30421022007-11-26 04:11:43 -080081 {
Brian Swetlandbcc0f6a2008-09-10 14:00:53 -070082 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
Brian Swetland30421022007-11-26 04:11:43 -080083 .length = MSM_SHARED_RAM_SIZE,
84 .type = MT_DEVICE,
85 },
86};
87
88void __init msm_map_common_io(void)
89{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070090 /*Peripheral port memory remap, nothing looks to be there for
91 * cortex a5.
92 */
93#ifndef CONFIG_ARCH_MSM_CORTEX_A5
Brian Swetland30421022007-11-26 04:11:43 -080094 /* Make sure the peripheral register window is closed, since
95 * we will use PTE flags (TEX[1]=1,B=0,C=1) to determine which
96 * pages are peripheral interface or not.
97 */
98 asm("mcr p15, 0, %0, c15, c2, 4" : : "r" (0));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070099#endif
100 msm_map_io(msm_io_desc, ARRAY_SIZE(msm_io_desc));
Brian Swetland30421022007-11-26 04:11:43 -0800101}
Daniel Walkercf62ffa2010-05-04 15:12:27 -0700102#endif
103
104#ifdef CONFIG_ARCH_QSD8X50
105static struct map_desc qsd8x50_io_desc[] __initdata = {
106 MSM_DEVICE(VIC),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700107 MSM_DEVICE(CSR),
108 MSM_DEVICE(TMR),
Daniel Walkercf62ffa2010-05-04 15:12:27 -0700109 MSM_DEVICE(DMOV),
110 MSM_DEVICE(GPIO1),
111 MSM_DEVICE(GPIO2),
112 MSM_DEVICE(CLK_CTL),
113 MSM_DEVICE(SIRC),
114 MSM_DEVICE(SCPLL),
115 MSM_DEVICE(AD5),
116 MSM_DEVICE(MDC),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700117 MSM_DEVICE(TCSR),
Daniel Walkercf62ffa2010-05-04 15:12:27 -0700118#ifdef CONFIG_MSM_DEBUG_UART
119 MSM_DEVICE(DEBUG_UART),
120#endif
121 {
122 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
Daniel Walkercf62ffa2010-05-04 15:12:27 -0700123 .length = MSM_SHARED_RAM_SIZE,
124 .type = MT_DEVICE,
125 },
126};
127
128void __init msm_map_qsd8x50_io(void)
129{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700130 msm_map_io(qsd8x50_io_desc, ARRAY_SIZE(qsd8x50_io_desc));
Daniel Walkercf62ffa2010-05-04 15:12:27 -0700131}
132#endif /* CONFIG_ARCH_QSD8X50 */
Brian Swetland30421022007-11-26 04:11:43 -0800133
Steve Muckle6cf6dfe2010-01-06 14:55:24 -0800134#ifdef CONFIG_ARCH_MSM8X60
135static struct map_desc msm8x60_io_desc[] __initdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700136 MSM_DEVICE(QGIC_DIST),
137 MSM_DEVICE(QGIC_CPU),
138 MSM_DEVICE(TMR),
139 MSM_DEVICE(TMR0),
140 MSM_DEVICE(RPM_MPM),
Steve Muckle6cf6dfe2010-01-06 14:55:24 -0800141 MSM_DEVICE(ACC),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700142 MSM_DEVICE(ACC0),
143 MSM_DEVICE(ACC1),
144 MSM_DEVICE(SAW0),
145 MSM_DEVICE(SAW1),
Steve Muckle6cf6dfe2010-01-06 14:55:24 -0800146 MSM_DEVICE(GCC),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700147 MSM_DEVICE(TLMM),
148 MSM_DEVICE(DMOV_ADM0),
149 MSM_DEVICE(DMOV_ADM1),
150 MSM_DEVICE(SCPLL),
151 MSM_DEVICE(RPM),
152 MSM_DEVICE(CLK_CTL),
153 MSM_DEVICE(MMSS_CLK_CTL),
154 MSM_DEVICE(LPASS_CLK_CTL),
155 MSM_DEVICE(TCSR),
156 MSM_DEVICE(IMEM),
157 MSM_DEVICE(HDMI),
158#ifdef CONFIG_MSM_DEBUG_UART
159 MSM_DEVICE(DEBUG_UART),
160#endif
161 MSM_DEVICE(SIC_NON_SECURE),
162 {
163 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
164 .length = MSM_SHARED_RAM_SIZE,
165 .type = MT_DEVICE,
166 },
167 MSM_DEVICE(QFPROM),
Steve Muckle6cf6dfe2010-01-06 14:55:24 -0800168};
169
170void __init msm_map_msm8x60_io(void)
171{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700172 msm_map_io(msm8x60_io_desc, ARRAY_SIZE(msm8x60_io_desc));
Steve Muckle6cf6dfe2010-01-06 14:55:24 -0800173}
174#endif /* CONFIG_ARCH_MSM8X60 */
175
Stepan Moskovchenko5d0afd72010-12-01 19:05:49 -0800176#ifdef CONFIG_ARCH_MSM8960
177static struct map_desc msm8960_io_desc[] __initdata = {
178 MSM_CHIP_DEVICE(QGIC_DIST, MSM8960),
179 MSM_CHIP_DEVICE(QGIC_CPU, MSM8960),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700180 MSM_CHIP_DEVICE(ACC0, MSM8960),
181 MSM_CHIP_DEVICE(ACC1, MSM8960),
Stepan Moskovchenko5d0afd72010-12-01 19:05:49 -0800182 MSM_CHIP_DEVICE(TMR, MSM8960),
183 MSM_CHIP_DEVICE(TMR0, MSM8960),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700184 MSM_CHIP_DEVICE(RPM_MPM, MSM8960),
185 MSM_CHIP_DEVICE(CLK_CTL, MSM8960),
186 MSM_CHIP_DEVICE(MMSS_CLK_CTL, MSM8960),
187 MSM_CHIP_DEVICE(LPASS_CLK_CTL, MSM8960),
188 MSM_CHIP_DEVICE(RPM, MSM8960),
189 MSM_CHIP_DEVICE(DMOV, MSM8960),
190 MSM_CHIP_DEVICE(TLMM, MSM8960),
191 MSM_CHIP_DEVICE(HFPLL, MSM8960),
192 MSM_CHIP_DEVICE(SAW0, MSM8960),
193 MSM_CHIP_DEVICE(SAW1, MSM8960),
194 MSM_CHIP_DEVICE(SAW_L2, MSM8960),
195 MSM_CHIP_DEVICE(SIC_NON_SECURE, MSM8960),
196 MSM_CHIP_DEVICE(APCS_GCC, MSM8960),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700197 MSM_CHIP_DEVICE(IMEM, MSM8960),
198 MSM_CHIP_DEVICE(HDMI, MSM8960),
199 {
200 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
201 .length = MSM_SHARED_RAM_SIZE,
202 .type = MT_DEVICE,
203 },
204#ifdef CONFIG_MSM_DEBUG_UART
205 MSM_DEVICE(DEBUG_UART),
206#endif
Siddartha Mohanadossce1315a2011-04-21 15:25:55 -0700207 MSM_CHIP_DEVICE(QFPROM, MSM8960),
Stepan Moskovchenko5d0afd72010-12-01 19:05:49 -0800208};
209
210void __init msm_map_msm8960_io(void)
211{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700212 msm_map_io(msm8960_io_desc, ARRAY_SIZE(msm8960_io_desc));
Stepan Moskovchenko5d0afd72010-12-01 19:05:49 -0800213}
214#endif /* CONFIG_ARCH_MSM8960 */
215
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700216#ifdef CONFIG_ARCH_APQ8064
217static struct map_desc apq8064_io_desc[] __initdata = {
218 MSM_CHIP_DEVICE(QGIC_DIST, APQ8064),
219 MSM_CHIP_DEVICE(QGIC_CPU, APQ8064),
220 MSM_CHIP_DEVICE(TMR, APQ8064),
221 MSM_CHIP_DEVICE(TMR0, APQ8064),
Joel King0581896d2011-07-19 16:43:28 -0700222 MSM_CHIP_DEVICE(DMOV, APQ8064),
Joel King4ebccc62011-07-22 09:43:22 -0700223 MSM_CHIP_DEVICE(TLMM, APQ8064),
Vikram Mulukutlabb408eb2011-08-04 09:28:56 -0700224 MSM_CHIP_DEVICE(ACC0, APQ8064),
225 MSM_CHIP_DEVICE(ACC1, APQ8064),
226 MSM_CHIP_DEVICE(ACC2, APQ8064),
227 MSM_CHIP_DEVICE(ACC3, APQ8064),
228 MSM_CHIP_DEVICE(HFPLL, APQ8064),
229 MSM_CHIP_DEVICE(APCS_GCC, APQ8064),
Stepan Moskovchenko3e444e52011-08-05 17:59:48 -0700230 MSM_CHIP_DEVICE(IMEM, APQ8064),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700231 {
232 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
233 .length = MSM_SHARED_RAM_SIZE,
234 .type = MT_DEVICE,
235 },
236};
237
238void __init msm_map_apq8064_io(void)
239{
240 msm_map_io(apq8064_io_desc, ARRAY_SIZE(apq8064_io_desc));
241}
242#endif /* CONFIG_ARCH_APQ8064 */
243
Daniel Walkerc83b2bf2010-05-04 15:26:13 -0700244#ifdef CONFIG_ARCH_MSM7X30
245static struct map_desc msm7x30_io_desc[] __initdata = {
246 MSM_DEVICE(VIC),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700247 MSM_DEVICE(CSR),
248 MSM_DEVICE(TMR),
Daniel Walkerc83b2bf2010-05-04 15:26:13 -0700249 MSM_DEVICE(DMOV),
250 MSM_DEVICE(GPIO1),
251 MSM_DEVICE(GPIO2),
252 MSM_DEVICE(CLK_CTL),
253 MSM_DEVICE(CLK_CTL_SH2),
254 MSM_DEVICE(AD5),
255 MSM_DEVICE(MDC),
256 MSM_DEVICE(ACC),
257 MSM_DEVICE(SAW),
258 MSM_DEVICE(GCC),
259 MSM_DEVICE(TCSR),
260#ifdef CONFIG_MSM_DEBUG_UART
261 MSM_DEVICE(DEBUG_UART),
262#endif
263 {
264 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
Daniel Walkerc83b2bf2010-05-04 15:26:13 -0700265 .length = MSM_SHARED_RAM_SIZE,
266 .type = MT_DEVICE,
267 },
268};
269
270void __init msm_map_msm7x30_io(void)
271{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700272 msm_map_io(msm7x30_io_desc, ARRAY_SIZE(msm7x30_io_desc));
Daniel Walkerc83b2bf2010-05-04 15:26:13 -0700273}
274#endif /* CONFIG_ARCH_MSM7X30 */
275
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700276#ifdef CONFIG_ARCH_FSM9XXX
277static struct map_desc fsm9xxx_io_desc[] __initdata = {
278 MSM_DEVICE(VIC),
279 MSM_DEVICE(SIRC),
280 MSM_DEVICE(CSR),
281 MSM_DEVICE(TLMM),
282 MSM_DEVICE(TCSR),
283 MSM_DEVICE(CLK_CTL),
284 MSM_DEVICE(ACC),
285 MSM_DEVICE(SAW),
286 MSM_DEVICE(GCC),
287 MSM_DEVICE(GRFC),
288 MSM_DEVICE(DMOV_SD0),
289 MSM_DEVICE(DMOV_SD1),
290 MSM_DEVICE(DMOV_SD2),
291 MSM_DEVICE(DMOV_SD3),
292 MSM_DEVICE(QFP_FUSE),
293 MSM_DEVICE(HH),
294#ifdef CONFIG_MSM_DEBUG_UART
295 MSM_DEVICE(DEBUG_UART),
296#endif
297 {
298 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
299 .length = MSM_SHARED_RAM_SIZE,
300 .type = MT_DEVICE,
301 },
302};
303
304void __init msm_map_fsm9xxx_io(void)
305{
306 msm_map_io(fsm9xxx_io_desc, ARRAY_SIZE(fsm9xxx_io_desc));
307}
308#endif /* CONFIG_ARCH_FSM9XXX */
309
Rohit Vaswani99fb6f22011-08-15 13:37:32 -0700310#ifdef CONFIG_ARCH_MSM9615
311static struct map_desc msm9615_io_desc[] __initdata = {
312 MSM_CHIP_DEVICE(QGIC_DIST, MSM9615),
313 MSM_CHIP_DEVICE(QGIC_CPU, MSM9615),
314 MSM_CHIP_DEVICE(ACC0, MSM9615),
315 MSM_CHIP_DEVICE(TMR, MSM9615),
316 MSM_CHIP_DEVICE(DMOV, MSM9615),
317 MSM_CHIP_DEVICE(TLMM, MSM9615),
318 MSM_CHIP_DEVICE(SAW0, MSM9615),
319 MSM_CHIP_DEVICE(APCS_GCC, MSM9615),
320 MSM_CHIP_DEVICE(TCSR, MSM9615),
321 {
322 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
323 .length = MSM_SHARED_RAM_SIZE,
324 .type = MT_DEVICE,
325 },
326};
327
328void __init msm_map_msm9615_io(void)
329{
330 msm_map_io(msm9615_io_desc, ARRAY_SIZE(msm9615_io_desc));
331}
332#endif /* CONFIG_ARCH_MSM9615 */
333
Brian Swetland30421022007-11-26 04:11:43 -0800334void __iomem *
335__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
336{
337 if (mtype == MT_DEVICE) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700338 /* The peripherals in the 88000000 - F0000000 range
339 * are only accessable by type MT_DEVICE_NONSHARED.
Brian Swetland30421022007-11-26 04:11:43 -0800340 * Adjust mtype as necessary to make this "just work."
341 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700342 if ((phys_addr >= 0x88000000) && (phys_addr < 0xF0000000))
Brian Swetland30421022007-11-26 04:11:43 -0800343 mtype = MT_DEVICE_NONSHARED;
344 }
345
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700346 return __arm_ioremap(phys_addr, size, mtype);
Brian Swetland30421022007-11-26 04:11:43 -0800347}
Pavankumar Kondeti4916a102010-11-09 15:41:29 +0530348EXPORT_SYMBOL(__msm_ioremap);