| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | #ifndef _TDFX_H | 
 | 2 | #define _TDFX_H | 
 | 3 |  | 
| Krzysztof Helt | feff388 | 2009-04-06 19:01:03 -0700 | [diff] [blame] | 4 | #include <linux/i2c.h> | 
 | 5 | #include <linux/i2c-algo-bit.h> | 
 | 6 |  | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7 | /* membase0 register offsets */ | 
| Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 8 | #define STATUS		0x00 | 
 | 9 | #define PCIINIT0	0x04 | 
 | 10 | #define SIPMONITOR	0x08 | 
 | 11 | #define LFBMEMORYCONFIG	0x0c | 
 | 12 | #define MISCINIT0	0x10 | 
 | 13 | #define MISCINIT1	0x14 | 
 | 14 | #define DRAMINIT0	0x18 | 
 | 15 | #define DRAMINIT1	0x1c | 
 | 16 | #define AGPINIT		0x20 | 
 | 17 | #define TMUGBEINIT	0x24 | 
 | 18 | #define VGAINIT0	0x28 | 
 | 19 | #define VGAINIT1	0x2c | 
 | 20 | #define DRAMCOMMAND	0x30 | 
 | 21 | #define DRAMDATA	0x34 | 
 | 22 | /* reserved	0x38 */ | 
 | 23 | /* reserved	0x3c */ | 
 | 24 | #define PLLCTRL0	0x40 | 
 | 25 | #define PLLCTRL1	0x44 | 
 | 26 | #define PLLCTRL2	0x48 | 
 | 27 | #define DACMODE		0x4c | 
 | 28 | #define DACADDR		0x50 | 
 | 29 | #define DACDATA		0x54 | 
 | 30 | #define RGBMAXDELTA	0x58 | 
 | 31 | #define VIDPROCCFG	0x5c | 
 | 32 | #define HWCURPATADDR	0x60 | 
 | 33 | #define HWCURLOC	0x64 | 
 | 34 | #define HWCURC0		0x68 | 
 | 35 | #define HWCURC1		0x6c | 
 | 36 | #define VIDINFORMAT	0x70 | 
 | 37 | #define VIDINSTATUS	0x74 | 
 | 38 | #define VIDSERPARPORT	0x78 | 
 | 39 | #define VIDINXDELTA	0x7c | 
 | 40 | #define VIDININITERR	0x80 | 
 | 41 | #define VIDINYDELTA	0x84 | 
 | 42 | #define VIDPIXBUFTHOLD	0x88 | 
 | 43 | #define VIDCHRMIN	0x8c | 
 | 44 | #define VIDCHRMAX	0x90 | 
 | 45 | #define VIDCURLIN	0x94 | 
 | 46 | #define VIDSCREENSIZE	0x98 | 
 | 47 | #define VIDOVRSTARTCRD	0x9c | 
 | 48 | #define VIDOVRENDCRD	0xa0 | 
 | 49 | #define VIDOVRDUDX	0xa4 | 
 | 50 | #define VIDOVRDUDXOFF	0xa8 | 
 | 51 | #define VIDOVRDVDY	0xac | 
 | 52 | /* ... */ | 
 | 53 | #define VIDOVRDVDYOFF	0xe0 | 
 | 54 | #define VIDDESKSTART	0xe4 | 
 | 55 | #define VIDDESKSTRIDE	0xe8 | 
 | 56 | #define VIDINADDR0	0xec | 
 | 57 | #define VIDINADDR1	0xf0 | 
 | 58 | #define VIDINADDR2	0xf4 | 
 | 59 | #define VIDINSTRIDE	0xf8 | 
 | 60 | #define VIDCUROVRSTART	0xfc | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 61 |  | 
| Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 62 | #define INTCTRL		(0x00100000 + 0x04) | 
 | 63 | #define CLIP0MIN	(0x00100000 + 0x08) | 
 | 64 | #define CLIP0MAX	(0x00100000 + 0x0c) | 
 | 65 | #define DSTBASE		(0x00100000 + 0x10) | 
 | 66 | #define DSTFORMAT	(0x00100000 + 0x14) | 
 | 67 | #define SRCBASE		(0x00100000 + 0x34) | 
 | 68 | #define COMMANDEXTRA_2D	(0x00100000 + 0x38) | 
 | 69 | #define CLIP1MIN	(0x00100000 + 0x4c) | 
 | 70 | #define CLIP1MAX	(0x00100000 + 0x50) | 
 | 71 | #define SRCFORMAT	(0x00100000 + 0x54) | 
 | 72 | #define SRCSIZE		(0x00100000 + 0x58) | 
 | 73 | #define SRCXY		(0x00100000 + 0x5c) | 
 | 74 | #define COLORBACK	(0x00100000 + 0x60) | 
 | 75 | #define COLORFORE	(0x00100000 + 0x64) | 
 | 76 | #define DSTSIZE		(0x00100000 + 0x68) | 
 | 77 | #define DSTXY		(0x00100000 + 0x6c) | 
 | 78 | #define COMMAND_2D	(0x00100000 + 0x70) | 
 | 79 | #define LAUNCH_2D	(0x00100000 + 0x80) | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 80 |  | 
| Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 81 | #define COMMAND_3D	(0x00200000 + 0x120) | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 82 |  | 
 | 83 | /* register bitfields (not all, only as needed) */ | 
 | 84 |  | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 85 | /* COMMAND_2D reg. values */ | 
| Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 86 | #define TDFX_ROP_COPY		0xcc	/* src */ | 
 | 87 | #define TDFX_ROP_INVERT		0x55	/* NOT dst */ | 
 | 88 | #define TDFX_ROP_XOR		0x66	/* src XOR dst */ | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 89 |  | 
| Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 90 | #define AUTOINC_DSTX			BIT(10) | 
 | 91 | #define AUTOINC_DSTY			BIT(11) | 
 | 92 | #define COMMAND_2D_FILLRECT		0x05 | 
 | 93 | #define COMMAND_2D_S2S_BITBLT		0x01	/* screen to screen */ | 
 | 94 | #define COMMAND_2D_H2S_BITBLT		0x03	/* host to screen */ | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 95 |  | 
| Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 96 | #define COMMAND_3D_NOP			0x00 | 
 | 97 | #define STATUS_RETRACE			BIT(6) | 
 | 98 | #define STATUS_BUSY			BIT(9) | 
 | 99 | #define MISCINIT1_CLUT_INV		BIT(0) | 
 | 100 | #define MISCINIT1_2DBLOCK_DIS		BIT(15) | 
 | 101 | #define DRAMINIT0_SGRAM_NUM		BIT(26) | 
 | 102 | #define DRAMINIT0_SGRAM_TYPE		BIT(27) | 
 | 103 | #define DRAMINIT0_SGRAM_TYPE_MASK       (BIT(27) | BIT(28) | BIT(29)) | 
| Richard Drummond | 333f981 | 2005-05-01 08:59:25 -0700 | [diff] [blame] | 104 | #define DRAMINIT0_SGRAM_TYPE_SHIFT      27 | 
| Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 105 | #define DRAMINIT1_MEM_SDRAM		BIT(30) | 
 | 106 | #define VGAINIT0_VGA_DISABLE		BIT(0) | 
 | 107 | #define VGAINIT0_EXT_TIMING		BIT(1) | 
 | 108 | #define VGAINIT0_8BIT_DAC		BIT(2) | 
 | 109 | #define VGAINIT0_EXT_ENABLE		BIT(6) | 
 | 110 | #define VGAINIT0_WAKEUP_3C3		BIT(8) | 
 | 111 | #define VGAINIT0_LEGACY_DISABLE		BIT(9) | 
 | 112 | #define VGAINIT0_ALT_READBACK		BIT(10) | 
 | 113 | #define VGAINIT0_FAST_BLINK		BIT(11) | 
 | 114 | #define VGAINIT0_EXTSHIFTOUT		BIT(12) | 
 | 115 | #define VGAINIT0_DECODE_3C6		BIT(13) | 
 | 116 | #define VGAINIT0_SGRAM_HBLANK_DISABLE	BIT(22) | 
 | 117 | #define VGAINIT1_MASK			0x1fffff | 
 | 118 | #define VIDCFG_VIDPROC_ENABLE		BIT(0) | 
 | 119 | #define VIDCFG_CURS_X11			BIT(1) | 
 | 120 | #define VIDCFG_INTERLACE		BIT(3) | 
 | 121 | #define VIDCFG_HALF_MODE		BIT(4) | 
 | 122 | #define VIDCFG_DESK_ENABLE		BIT(7) | 
 | 123 | #define VIDCFG_CLUT_BYPASS		BIT(10) | 
 | 124 | #define VIDCFG_2X			BIT(26) | 
 | 125 | #define VIDCFG_HWCURSOR_ENABLE		BIT(27) | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 126 | #define VIDCFG_PIXFMT_SHIFT             18 | 
| Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 127 | #define DACMODE_2X			BIT(0) | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 128 |  | 
| Krzysztof Helt | feff388 | 2009-04-06 19:01:03 -0700 | [diff] [blame] | 129 | /* I2C bit locations in the VIDSERPARPORT register */ | 
 | 130 | #define DDC_ENAB	0x00040000 | 
 | 131 | #define DDC_SCL_OUT	0x00080000 | 
 | 132 | #define DDC_SDA_OUT	0x00100000 | 
 | 133 | #define DDC_SCL_IN	0x00200000 | 
 | 134 | #define DDC_SDA_IN	0x00400000 | 
 | 135 | #define I2C_ENAB	0x00800000 | 
 | 136 | #define I2C_SCL_OUT	0x01000000 | 
 | 137 | #define I2C_SDA_OUT	0x02000000 | 
 | 138 | #define I2C_SCL_IN	0x04000000 | 
 | 139 | #define I2C_SDA_IN	0x08000000 | 
 | 140 |  | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 141 | /* VGA rubbish, need to change this for multihead support */ | 
| Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 142 | #define MISC_W		0x3c2 | 
 | 143 | #define MISC_R		0x3cc | 
 | 144 | #define SEQ_I		0x3c4 | 
 | 145 | #define SEQ_D		0x3c5 | 
 | 146 | #define CRT_I		0x3d4 | 
 | 147 | #define CRT_D		0x3d5 | 
 | 148 | #define ATT_IW		0x3c0 | 
 | 149 | #define IS1_R		0x3da | 
 | 150 | #define GRA_I		0x3ce | 
 | 151 | #define GRA_D		0x3cf | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 152 |  | 
 | 153 | #ifdef __KERNEL__ | 
 | 154 |  | 
 | 155 | struct banshee_reg { | 
| Antonino A. Daplas | a807f61 | 2006-01-09 20:53:11 -0800 | [diff] [blame] | 156 | 	/* VGA rubbish */ | 
 | 157 | 	unsigned char att[21]; | 
 | 158 | 	unsigned char crt[25]; | 
| Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 159 | 	unsigned char gra[9]; | 
| Antonino A. Daplas | a807f61 | 2006-01-09 20:53:11 -0800 | [diff] [blame] | 160 | 	unsigned char misc[1]; | 
| Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 161 | 	unsigned char seq[5]; | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 162 |  | 
| Antonino A. Daplas | a807f61 | 2006-01-09 20:53:11 -0800 | [diff] [blame] | 163 | 	/* Banshee extensions */ | 
 | 164 | 	unsigned char ext[2]; | 
 | 165 | 	unsigned long vidcfg; | 
 | 166 | 	unsigned long vidpll; | 
 | 167 | 	unsigned long mempll; | 
 | 168 | 	unsigned long gfxpll; | 
 | 169 | 	unsigned long dacmode; | 
 | 170 | 	unsigned long vgainit0; | 
 | 171 | 	unsigned long vgainit1; | 
 | 172 | 	unsigned long screensize; | 
 | 173 | 	unsigned long stride; | 
 | 174 | 	unsigned long cursloc; | 
 | 175 | 	unsigned long curspataddr; | 
 | 176 | 	unsigned long cursc0; | 
 | 177 | 	unsigned long cursc1; | 
 | 178 | 	unsigned long startaddr; | 
 | 179 | 	unsigned long clip0min; | 
 | 180 | 	unsigned long clip0max; | 
 | 181 | 	unsigned long clip1min; | 
 | 182 | 	unsigned long clip1max; | 
| Antonino A. Daplas | a807f61 | 2006-01-09 20:53:11 -0800 | [diff] [blame] | 183 | 	unsigned long miscinit0; | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 184 | }; | 
 | 185 |  | 
| Krzysztof Helt | feff388 | 2009-04-06 19:01:03 -0700 | [diff] [blame] | 186 | struct tdfx_par; | 
 | 187 |  | 
 | 188 | struct tdfxfb_i2c_chan { | 
 | 189 | 	struct tdfx_par *par; | 
 | 190 | 	struct i2c_adapter adapter; | 
 | 191 | 	struct i2c_algo_bit_data algo; | 
 | 192 | }; | 
 | 193 |  | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 194 | struct tdfx_par { | 
| Antonino A. Daplas | a807f61 | 2006-01-09 20:53:11 -0800 | [diff] [blame] | 195 | 	u32 max_pixclock; | 
 | 196 | 	u32 palette[16]; | 
 | 197 | 	void __iomem *regbase_virt; | 
 | 198 | 	unsigned long iobase; | 
| Krzysztof Helt | 0960bd3 | 2007-10-16 01:28:49 -0700 | [diff] [blame] | 199 | 	int mtrr_handle; | 
| Krzysztof Helt | feff388 | 2009-04-06 19:01:03 -0700 | [diff] [blame] | 200 | #ifdef CONFIG_FB_3DFX_I2C | 
 | 201 | 	struct tdfxfb_i2c_chan chan[2]; | 
 | 202 | #endif | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 203 | }; | 
 | 204 |  | 
| Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 205 | #endif	/* __KERNEL__ */ | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 206 |  | 
| Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 207 | #endif	/* _TDFX_H */ | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 208 |  |