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Russell Kingbce495d2005-04-26 15:21:02 +01001#include <linux/init.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -07002#include <linux/linkage.h>
3
4#include <asm/assembler.h>
Sam Ravnborge6ae7442005-09-09 21:08:59 +02005#include <asm/asm-offsets.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -07006#include <asm/errno.h>
Russell Kingbce495d2005-04-26 15:21:02 +01007#include <asm/thread_info.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -07008
9@ Bad Abort numbers
10@ -----------------
11@
12#define BAD_PREFETCH 0
13#define BAD_DATA 1
14#define BAD_ADDREXCPTN 2
15#define BAD_IRQ 3
16#define BAD_UNDEFINSTR 4
17
Linus Torvalds1da177e2005-04-16 15:20:36 -070018@
Russell King925c8a12005-04-26 15:18:59 +010019@ Most of the stack format comes from struct pt_regs, but with
20@ the addition of 8 bytes for storing syscall args 5 and 6.
Nicolas Pitre2dede2d2006-01-14 16:18:08 +000021@ This _must_ remain a multiple of 8 for EABI.
Linus Torvalds1da177e2005-04-16 15:20:36 -070022@
Linus Torvalds1da177e2005-04-16 15:20:36 -070023#define S_OFF 8
24
Russell King925c8a12005-04-26 15:18:59 +010025/*
26 * The SWI code relies on the fact that R0 is at the bottom of the stack
27 * (due to slow/fast restore user regs).
28 */
29#if S_R0 != 0
30#error "Please fix"
31#endif
32
Russell Kingbce495d2005-04-26 15:21:02 +010033 .macro zero_fp
34#ifdef CONFIG_FRAME_POINTER
35 mov fp, #0
36#endif
37 .endm
38
Russell King49f680e2005-05-31 18:02:00 +010039 .macro alignment_trap, rtemp
Linus Torvalds1da177e2005-04-16 15:20:36 -070040#ifdef CONFIG_ALIGNMENT_TRAP
Russell King49f680e2005-05-31 18:02:00 +010041 ldr \rtemp, .LCcralign
42 ldr \rtemp, [\rtemp]
Linus Torvalds1da177e2005-04-16 15:20:36 -070043 mcr p15, 0, \rtemp, c1, c0
44#endif
45 .endm
46
Catalin Marinasb86040a2009-07-24 12:32:54 +010047 @
48 @ Store/load the USER SP and LR registers by switching to the SYS
49 @ mode. Useful in Thumb-2 mode where "stm/ldm rd, {sp, lr}^" is not
50 @ available. Should only be called from SVC mode
51 @
52 .macro store_user_sp_lr, rd, rtemp, offset = 0
53 mrs \rtemp, cpsr
54 eor \rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE)
55 msr cpsr_c, \rtemp @ switch to the SYS mode
56
57 str sp, [\rd, #\offset] @ save sp_usr
58 str lr, [\rd, #\offset + 4] @ save lr_usr
59
60 eor \rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE)
61 msr cpsr_c, \rtemp @ switch back to the SVC mode
62 .endm
63
64 .macro load_user_sp_lr, rd, rtemp, offset = 0
65 mrs \rtemp, cpsr
66 eor \rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE)
67 msr cpsr_c, \rtemp @ switch to the SYS mode
68
69 ldr sp, [\rd, #\offset] @ load sp_usr
70 ldr lr, [\rd, #\offset + 4] @ load lr_usr
71
72 eor \rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE)
73 msr cpsr_c, \rtemp @ switch back to the SVC mode
74 .endm
75
76#ifndef CONFIG_THUMB2_KERNEL
77 .macro svc_exit, rpsr
78 msr spsr_cxsf, \rpsr
Catalin Marinas200b8122009-09-18 23:27:05 +010079#if defined(CONFIG_CPU_32v6K)
80 clrex @ clear the exclusive monitor
Catalin Marinasb86040a2009-07-24 12:32:54 +010081 ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
Catalin Marinas200b8122009-09-18 23:27:05 +010082#elif defined (CONFIG_CPU_V6)
83 ldr r0, [sp]
84 strex r1, r2, [sp] @ clear the exclusive monitor
85 ldmib sp, {r1 - pc}^ @ load r1 - pc, cpsr
Nicolas Pitre9e6ec392009-09-25 16:28:02 -040086#else
87 ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
Catalin Marinas200b8122009-09-18 23:27:05 +010088#endif
Catalin Marinasb86040a2009-07-24 12:32:54 +010089 .endm
90
91 .macro restore_user_regs, fast = 0, offset = 0
92 ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr
93 ldr lr, [sp, #\offset + S_PC]! @ get pc
94 msr spsr_cxsf, r1 @ save in spsr_svc
Catalin Marinas200b8122009-09-18 23:27:05 +010095#if defined(CONFIG_CPU_32v6K)
96 clrex @ clear the exclusive monitor
97#elif defined (CONFIG_CPU_V6)
98 strex r1, r2, [sp] @ clear the exclusive monitor
99#endif
Catalin Marinasb86040a2009-07-24 12:32:54 +0100100 .if \fast
101 ldmdb sp, {r1 - lr}^ @ get calling r1 - lr
102 .else
103 ldmdb sp, {r0 - lr}^ @ get calling r0 - lr
104 .endif
105 add sp, sp, #S_FRAME_SIZE - S_PC
106 movs pc, lr @ return & move spsr_svc into cpsr
107 .endm
108
109 .macro get_thread_info, rd
110 mov \rd, sp, lsr #13
111 mov \rd, \rd, lsl #13
112 .endm
113#else /* CONFIG_THUMB2_KERNEL */
114 .macro svc_exit, rpsr
Catalin Marinas200b8122009-09-18 23:27:05 +0100115 clrex @ clear the exclusive monitor
Catalin Marinasb86040a2009-07-24 12:32:54 +0100116 ldr r0, [sp, #S_SP] @ top of the stack
117 ldr r1, [sp, #S_PC] @ return address
118 tst r0, #4 @ orig stack 8-byte aligned?
119 stmdb r0, {r1, \rpsr} @ rfe context
120 ldmia sp, {r0 - r12}
121 ldr lr, [sp, #S_LR]
122 addeq sp, sp, #S_FRAME_SIZE - 8 @ aligned
123 addne sp, sp, #S_FRAME_SIZE - 4 @ not aligned
124 rfeia sp!
125 .endm
126
127 .macro restore_user_regs, fast = 0, offset = 0
Catalin Marinas200b8122009-09-18 23:27:05 +0100128 clrex @ clear the exclusive monitor
Catalin Marinasb86040a2009-07-24 12:32:54 +0100129 mov r2, sp
130 load_user_sp_lr r2, r3, \offset + S_SP @ calling sp, lr
131 ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr
132 ldr lr, [sp, #\offset + S_PC] @ get pc
133 add sp, sp, #\offset + S_SP
134 msr spsr_cxsf, r1 @ save in spsr_svc
135 .if \fast
136 ldmdb sp, {r1 - r12} @ get calling r1 - r12
137 .else
138 ldmdb sp, {r0 - r12} @ get calling r0 - r12
139 .endif
140 add sp, sp, #S_FRAME_SIZE - S_SP
141 movs pc, lr @ return & move spsr_svc into cpsr
142 .endm
143
144 .macro get_thread_info, rd
145 mov \rd, sp
146 lsr \rd, \rd, #13
147 mov \rd, \rd, lsl #13
148 .endm
149#endif /* !CONFIG_THUMB2_KERNEL */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700150
151/*
152 * These are the registers used in the syscall handler, and allow us to
153 * have in theory up to 7 arguments to a function - r0 to r6.
154 *
155 * r7 is reserved for the system call number for thumb mode.
156 *
157 * Note that tbl == why is intentional.
158 *
159 * We must set at least "tsk" and "why" when calling ret_with_reschedule.
160 */
161scno .req r7 @ syscall number
162tbl .req r8 @ syscall table pointer
163why .req r8 @ Linux syscall (!= 0)
164tsk .req r9 @ current thread_info