Frank Mandarino | 9f0ac6e | 2006-11-24 15:49:39 +0100 | [diff] [blame^] | 1 | /* |
| 2 | * at91-pcm.h - ALSA PCM interface for the Atmel AT91 SoC |
| 3 | * |
| 4 | * Author: Frank Mandarino <fmandarino@endrelia.com> |
| 5 | * Endrelia Technologies Inc. |
| 6 | * Created: Mar 3, 2006 |
| 7 | * |
| 8 | * Based on pxa2xx-pcm.h by: |
| 9 | * |
| 10 | * Author: Nicolas Pitre |
| 11 | * Created: Nov 30, 2004 |
| 12 | * Copyright: MontaVista Software, Inc. |
| 13 | * |
| 14 | * This program is free software; you can redistribute it and/or modify |
| 15 | * it under the terms of the GNU General Public License version 2 as |
| 16 | * published by the Free Software Foundation. |
| 17 | */ |
| 18 | |
| 19 | #include <asm/arch/hardware.h> |
| 20 | |
| 21 | struct at91_ssc_periph { |
| 22 | void __iomem *base; |
| 23 | u32 pid; |
| 24 | }; |
| 25 | |
| 26 | |
| 27 | /* |
| 28 | * Registers and status bits that are required by the PCM driver. |
| 29 | */ |
| 30 | struct at91_pdc_regs { |
| 31 | unsigned int xpr; /* PDC recv/trans pointer */ |
| 32 | unsigned int xcr; /* PDC recv/trans counter */ |
| 33 | unsigned int xnpr; /* PDC next recv/trans pointer */ |
| 34 | unsigned int xncr; /* PDC next recv/trans counter */ |
| 35 | unsigned int ptcr; /* PDC transfer control */ |
| 36 | }; |
| 37 | |
| 38 | struct at91_ssc_mask { |
| 39 | u32 ssc_enable; /* SSC recv/trans enable */ |
| 40 | u32 ssc_disable; /* SSC recv/trans disable */ |
| 41 | u32 ssc_endx; /* SSC ENDTX or ENDRX */ |
| 42 | u32 ssc_endbuf; /* SSC TXBUFE or RXBUFF */ |
| 43 | u32 pdc_enable; /* PDC recv/trans enable */ |
| 44 | u32 pdc_disable; /* PDC recv/trans disable */ |
| 45 | }; |
| 46 | |
| 47 | |
| 48 | /* |
| 49 | * This structure, shared between the PCM driver and the interface, |
| 50 | * contains all information required by the PCM driver to perform the |
| 51 | * PDC DMA operation. All fields except dma_intr_handler() are initialized |
| 52 | * by the interface. The dms_intr_handler() pointer is set by the PCM |
| 53 | * driver and called by the interface SSC interrupt handler if it is |
| 54 | * non-NULL. |
| 55 | */ |
| 56 | struct at91_pcm_dma_params { |
| 57 | char *name; /* stream identifier */ |
| 58 | int pdc_xfer_size; /* PDC counter increment in bytes */ |
| 59 | void __iomem *ssc_base; /* SSC base address */ |
| 60 | struct at91_pdc_regs *pdc; /* PDC receive or transmit registers */ |
| 61 | struct at91_ssc_mask *mask;/* SSC & PDC status bits */ |
| 62 | struct snd_pcm_substream *substream; |
| 63 | void (*dma_intr_handler)(u32, struct snd_pcm_substream *); |
| 64 | }; |
| 65 | |
| 66 | extern struct snd_soc_cpu_dai at91_i2s_dai[3]; |
| 67 | extern struct snd_soc_platform at91_soc_platform; |
| 68 | |
| 69 | |
| 70 | #define at91_ssc_read(a) ((unsigned long) __raw_readl(a)) |
| 71 | #define at91_ssc_write(a,v) __raw_writel((v),(a)) |