blob: a6f2390ce662de674a520aca8bed2d5623148c0b [file] [log] [blame]
eric miao8f58de72007-12-19 17:14:02 +08001#include <linux/module.h>
2#include <linux/kernel.h>
3#include <linux/init.h>
4#include <linux/platform_device.h>
5#include <linux/dma-mapping.h>
6
7#include <asm/arch/gpio.h>
8#include <asm/arch/udc.h>
9#include <asm/arch/pxafb.h>
10#include <asm/arch/mmc.h>
11#include <asm/arch/irda.h>
12#include <asm/arch/i2c.h>
Philipp Zabelbc3a5952008-06-02 18:49:27 +010013#include <asm/arch/mfp-pxa27x.h>
eric miaocd5604d2008-01-29 09:00:19 +080014#include <asm/arch/ohci.h>
eric miao37320982008-01-23 13:39:13 +080015#include <asm/arch/pxa27x_keypad.h>
Guennadi Liakhovetski3f3acef2008-04-11 22:19:45 +020016#include <asm/arch/camera.h>
Mark Brown9f19d632008-06-10 12:30:05 +010017#include <asm/arch/audio.h>
eric miao8f58de72007-12-19 17:14:02 +080018
19#include "devices.h"
Philipp Zabelbc3a5952008-06-02 18:49:27 +010020#include "generic.h"
eric miao8f58de72007-12-19 17:14:02 +080021
22void __init pxa_register_device(struct platform_device *dev, void *data)
23{
24 int ret;
25
26 dev->dev.platform_data = data;
27
28 ret = platform_device_register(dev);
29 if (ret)
30 dev_err(&dev->dev, "unable to register device: %d\n", ret);
31}
32
33static struct resource pxamci_resources[] = {
34 [0] = {
35 .start = 0x41100000,
36 .end = 0x41100fff,
37 .flags = IORESOURCE_MEM,
38 },
39 [1] = {
40 .start = IRQ_MMC,
41 .end = IRQ_MMC,
42 .flags = IORESOURCE_IRQ,
43 },
44 [2] = {
45 .start = 21,
46 .end = 21,
47 .flags = IORESOURCE_DMA,
48 },
49 [3] = {
50 .start = 22,
51 .end = 22,
52 .flags = IORESOURCE_DMA,
53 },
54};
55
56static u64 pxamci_dmamask = 0xffffffffUL;
57
58struct platform_device pxa_device_mci = {
59 .name = "pxa2xx-mci",
Bridge Wufafc9d32007-12-21 19:00:13 +080060 .id = 0,
eric miao8f58de72007-12-19 17:14:02 +080061 .dev = {
62 .dma_mask = &pxamci_dmamask,
63 .coherent_dma_mask = 0xffffffff,
64 },
65 .num_resources = ARRAY_SIZE(pxamci_resources),
66 .resource = pxamci_resources,
67};
68
69void __init pxa_set_mci_info(struct pxamci_platform_data *info)
70{
71 pxa_register_device(&pxa_device_mci, info);
72}
73
74
75static struct pxa2xx_udc_mach_info pxa_udc_info;
76
77void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
78{
79 memcpy(&pxa_udc_info, info, sizeof *info);
80}
81
82static struct resource pxa2xx_udc_resources[] = {
83 [0] = {
84 .start = 0x40600000,
85 .end = 0x4060ffff,
86 .flags = IORESOURCE_MEM,
87 },
88 [1] = {
89 .start = IRQ_USB,
90 .end = IRQ_USB,
91 .flags = IORESOURCE_IRQ,
92 },
93};
94
95static u64 udc_dma_mask = ~(u32)0;
96
Philipp Zabel7a857622008-06-22 23:36:39 +010097struct platform_device pxa25x_device_udc = {
98 .name = "pxa25x-udc",
99 .id = -1,
100 .resource = pxa2xx_udc_resources,
101 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
102 .dev = {
103 .platform_data = &pxa_udc_info,
104 .dma_mask = &udc_dma_mask,
105 }
106};
107
108struct platform_device pxa27x_device_udc = {
109 .name = "pxa27x-udc",
eric miao8f58de72007-12-19 17:14:02 +0800110 .id = -1,
111 .resource = pxa2xx_udc_resources,
112 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
113 .dev = {
114 .platform_data = &pxa_udc_info,
115 .dma_mask = &udc_dma_mask,
116 }
117};
118
119static struct resource pxafb_resources[] = {
120 [0] = {
121 .start = 0x44000000,
122 .end = 0x4400ffff,
123 .flags = IORESOURCE_MEM,
124 },
125 [1] = {
126 .start = IRQ_LCD,
127 .end = IRQ_LCD,
128 .flags = IORESOURCE_IRQ,
129 },
130};
131
132static u64 fb_dma_mask = ~(u64)0;
133
134struct platform_device pxa_device_fb = {
135 .name = "pxa2xx-fb",
136 .id = -1,
137 .dev = {
138 .dma_mask = &fb_dma_mask,
139 .coherent_dma_mask = 0xffffffff,
140 },
141 .num_resources = ARRAY_SIZE(pxafb_resources),
142 .resource = pxafb_resources,
143};
144
145void __init set_pxa_fb_info(struct pxafb_mach_info *info)
146{
147 pxa_register_device(&pxa_device_fb, info);
148}
149
150void __init set_pxa_fb_parent(struct device *parent_dev)
151{
152 pxa_device_fb.dev.parent = parent_dev;
153}
154
155static struct resource pxa_resource_ffuart[] = {
156 {
157 .start = __PREG(FFUART),
158 .end = __PREG(FFUART) + 35,
159 .flags = IORESOURCE_MEM,
160 }, {
161 .start = IRQ_FFUART,
162 .end = IRQ_FFUART,
163 .flags = IORESOURCE_IRQ,
164 }
165};
166
167struct platform_device pxa_device_ffuart= {
168 .name = "pxa2xx-uart",
169 .id = 0,
170 .resource = pxa_resource_ffuart,
171 .num_resources = ARRAY_SIZE(pxa_resource_ffuart),
172};
173
174static struct resource pxa_resource_btuart[] = {
175 {
176 .start = __PREG(BTUART),
177 .end = __PREG(BTUART) + 35,
178 .flags = IORESOURCE_MEM,
179 }, {
180 .start = IRQ_BTUART,
181 .end = IRQ_BTUART,
182 .flags = IORESOURCE_IRQ,
183 }
184};
185
186struct platform_device pxa_device_btuart = {
187 .name = "pxa2xx-uart",
188 .id = 1,
189 .resource = pxa_resource_btuart,
190 .num_resources = ARRAY_SIZE(pxa_resource_btuart),
191};
192
193static struct resource pxa_resource_stuart[] = {
194 {
195 .start = __PREG(STUART),
196 .end = __PREG(STUART) + 35,
197 .flags = IORESOURCE_MEM,
198 }, {
199 .start = IRQ_STUART,
200 .end = IRQ_STUART,
201 .flags = IORESOURCE_IRQ,
202 }
203};
204
205struct platform_device pxa_device_stuart = {
206 .name = "pxa2xx-uart",
207 .id = 2,
208 .resource = pxa_resource_stuart,
209 .num_resources = ARRAY_SIZE(pxa_resource_stuart),
210};
211
212static struct resource pxa_resource_hwuart[] = {
213 {
214 .start = __PREG(HWUART),
215 .end = __PREG(HWUART) + 47,
216 .flags = IORESOURCE_MEM,
217 }, {
218 .start = IRQ_HWUART,
219 .end = IRQ_HWUART,
220 .flags = IORESOURCE_IRQ,
221 }
222};
223
224struct platform_device pxa_device_hwuart = {
225 .name = "pxa2xx-uart",
226 .id = 3,
227 .resource = pxa_resource_hwuart,
228 .num_resources = ARRAY_SIZE(pxa_resource_hwuart),
229};
230
231static struct resource pxai2c_resources[] = {
232 {
233 .start = 0x40301680,
234 .end = 0x403016a3,
235 .flags = IORESOURCE_MEM,
236 }, {
237 .start = IRQ_I2C,
238 .end = IRQ_I2C,
239 .flags = IORESOURCE_IRQ,
240 },
241};
242
243struct platform_device pxa_device_i2c = {
244 .name = "pxa2xx-i2c",
245 .id = 0,
246 .resource = pxai2c_resources,
247 .num_resources = ARRAY_SIZE(pxai2c_resources),
248};
249
Philipp Zabelbc3a5952008-06-02 18:49:27 +0100250static unsigned long pxa27x_i2c_mfp_cfg[] = {
251 GPIO117_I2C_SCL,
252 GPIO118_I2C_SDA,
253};
254
eric miao8f58de72007-12-19 17:14:02 +0800255void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
256{
Philipp Zabelbc3a5952008-06-02 18:49:27 +0100257 if (cpu_is_pxa27x())
258 pxa2xx_mfp_config(ARRAY_AND_SIZE(pxa27x_i2c_mfp_cfg));
eric miao8f58de72007-12-19 17:14:02 +0800259 pxa_register_device(&pxa_device_i2c, info);
260}
261
262static struct resource pxai2s_resources[] = {
263 {
264 .start = 0x40400000,
265 .end = 0x40400083,
266 .flags = IORESOURCE_MEM,
267 }, {
268 .start = IRQ_I2S,
269 .end = IRQ_I2S,
270 .flags = IORESOURCE_IRQ,
271 },
272};
273
274struct platform_device pxa_device_i2s = {
275 .name = "pxa2xx-i2s",
276 .id = -1,
277 .resource = pxai2s_resources,
278 .num_resources = ARRAY_SIZE(pxai2s_resources),
279};
280
281static u64 pxaficp_dmamask = ~(u32)0;
282
283struct platform_device pxa_device_ficp = {
284 .name = "pxa2xx-ir",
285 .id = -1,
286 .dev = {
287 .dma_mask = &pxaficp_dmamask,
288 .coherent_dma_mask = 0xffffffff,
289 },
290};
291
292void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
293{
294 pxa_register_device(&pxa_device_ficp, info);
295}
296
297struct platform_device pxa_device_rtc = {
298 .name = "sa1100-rtc",
299 .id = -1,
300};
301
Mark Brown9f19d632008-06-10 12:30:05 +0100302static struct resource pxa_ac97_resources[] = {
303 [0] = {
304 .start = 0x40500000,
305 .end = 0x40500000 + 0xfff,
306 .flags = IORESOURCE_MEM,
307 },
308 [1] = {
309 .start = IRQ_AC97,
310 .end = IRQ_AC97,
311 .flags = IORESOURCE_IRQ,
312 },
313};
314
315static u64 pxa_ac97_dmamask = 0xffffffffUL;
316
317struct platform_device pxa_device_ac97 = {
318 .name = "pxa2xx-ac97",
319 .id = -1,
320 .dev = {
321 .dma_mask = &pxa_ac97_dmamask,
322 .coherent_dma_mask = 0xffffffff,
323 },
324 .num_resources = ARRAY_SIZE(pxa_ac97_resources),
325 .resource = pxa_ac97_resources,
326};
327
328void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops)
329{
330 pxa_register_device(&pxa_device_ac97, ops);
331}
332
eric miao8f58de72007-12-19 17:14:02 +0800333#ifdef CONFIG_PXA25x
334
eric miao75540c12008-04-13 21:44:04 +0100335static struct resource pxa25x_resource_pwm0[] = {
336 [0] = {
337 .start = 0x40b00000,
338 .end = 0x40b0000f,
339 .flags = IORESOURCE_MEM,
340 },
341};
342
343struct platform_device pxa25x_device_pwm0 = {
344 .name = "pxa25x-pwm",
345 .id = 0,
346 .resource = pxa25x_resource_pwm0,
347 .num_resources = ARRAY_SIZE(pxa25x_resource_pwm0),
348};
349
350static struct resource pxa25x_resource_pwm1[] = {
351 [0] = {
352 .start = 0x40c00000,
353 .end = 0x40c0000f,
354 .flags = IORESOURCE_MEM,
355 },
356};
357
358struct platform_device pxa25x_device_pwm1 = {
359 .name = "pxa25x-pwm",
360 .id = 1,
361 .resource = pxa25x_resource_pwm1,
362 .num_resources = ARRAY_SIZE(pxa25x_resource_pwm1),
363};
364
eric miao8f58de72007-12-19 17:14:02 +0800365static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
366
367static struct resource pxa25x_resource_ssp[] = {
368 [0] = {
369 .start = 0x41000000,
370 .end = 0x4100001f,
371 .flags = IORESOURCE_MEM,
372 },
373 [1] = {
374 .start = IRQ_SSP,
375 .end = IRQ_SSP,
376 .flags = IORESOURCE_IRQ,
377 },
378 [2] = {
379 /* DRCMR for RX */
380 .start = 13,
381 .end = 13,
382 .flags = IORESOURCE_DMA,
383 },
384 [3] = {
385 /* DRCMR for TX */
386 .start = 14,
387 .end = 14,
388 .flags = IORESOURCE_DMA,
389 },
390};
391
392struct platform_device pxa25x_device_ssp = {
393 .name = "pxa25x-ssp",
394 .id = 0,
395 .dev = {
396 .dma_mask = &pxa25x_ssp_dma_mask,
397 .coherent_dma_mask = DMA_BIT_MASK(32),
398 },
399 .resource = pxa25x_resource_ssp,
400 .num_resources = ARRAY_SIZE(pxa25x_resource_ssp),
401};
402
403static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
404
405static struct resource pxa25x_resource_nssp[] = {
406 [0] = {
407 .start = 0x41400000,
408 .end = 0x4140002f,
409 .flags = IORESOURCE_MEM,
410 },
411 [1] = {
412 .start = IRQ_NSSP,
413 .end = IRQ_NSSP,
414 .flags = IORESOURCE_IRQ,
415 },
416 [2] = {
417 /* DRCMR for RX */
418 .start = 15,
419 .end = 15,
420 .flags = IORESOURCE_DMA,
421 },
422 [3] = {
423 /* DRCMR for TX */
424 .start = 16,
425 .end = 16,
426 .flags = IORESOURCE_DMA,
427 },
428};
429
430struct platform_device pxa25x_device_nssp = {
431 .name = "pxa25x-nssp",
432 .id = 1,
433 .dev = {
434 .dma_mask = &pxa25x_nssp_dma_mask,
435 .coherent_dma_mask = DMA_BIT_MASK(32),
436 },
437 .resource = pxa25x_resource_nssp,
438 .num_resources = ARRAY_SIZE(pxa25x_resource_nssp),
439};
440
441static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
442
443static struct resource pxa25x_resource_assp[] = {
444 [0] = {
445 .start = 0x41500000,
446 .end = 0x4150002f,
447 .flags = IORESOURCE_MEM,
448 },
449 [1] = {
450 .start = IRQ_ASSP,
451 .end = IRQ_ASSP,
452 .flags = IORESOURCE_IRQ,
453 },
454 [2] = {
455 /* DRCMR for RX */
456 .start = 23,
457 .end = 23,
458 .flags = IORESOURCE_DMA,
459 },
460 [3] = {
461 /* DRCMR for TX */
462 .start = 24,
463 .end = 24,
464 .flags = IORESOURCE_DMA,
465 },
466};
467
468struct platform_device pxa25x_device_assp = {
469 /* ASSP is basically equivalent to NSSP */
470 .name = "pxa25x-nssp",
471 .id = 2,
472 .dev = {
473 .dma_mask = &pxa25x_assp_dma_mask,
474 .coherent_dma_mask = DMA_BIT_MASK(32),
475 },
476 .resource = pxa25x_resource_assp,
477 .num_resources = ARRAY_SIZE(pxa25x_resource_assp),
478};
479#endif /* CONFIG_PXA25x */
480
481#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
482
eric miao37320982008-01-23 13:39:13 +0800483static struct resource pxa27x_resource_keypad[] = {
484 [0] = {
485 .start = 0x41500000,
486 .end = 0x4150004c,
487 .flags = IORESOURCE_MEM,
488 },
489 [1] = {
490 .start = IRQ_KEYPAD,
491 .end = IRQ_KEYPAD,
492 .flags = IORESOURCE_IRQ,
493 },
494};
495
496struct platform_device pxa27x_device_keypad = {
497 .name = "pxa27x-keypad",
498 .id = -1,
499 .resource = pxa27x_resource_keypad,
500 .num_resources = ARRAY_SIZE(pxa27x_resource_keypad),
501};
502
503void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
504{
505 pxa_register_device(&pxa27x_device_keypad, info);
506}
507
eric miaoec68e452007-12-12 09:29:33 +0800508static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
509
510static struct resource pxa27x_resource_ohci[] = {
511 [0] = {
512 .start = 0x4C000000,
513 .end = 0x4C00ff6f,
514 .flags = IORESOURCE_MEM,
515 },
516 [1] = {
517 .start = IRQ_USBH1,
518 .end = IRQ_USBH1,
519 .flags = IORESOURCE_IRQ,
520 },
521};
522
523struct platform_device pxa27x_device_ohci = {
524 .name = "pxa27x-ohci",
525 .id = -1,
526 .dev = {
527 .dma_mask = &pxa27x_ohci_dma_mask,
528 .coherent_dma_mask = DMA_BIT_MASK(32),
529 },
530 .num_resources = ARRAY_SIZE(pxa27x_resource_ohci),
531 .resource = pxa27x_resource_ohci,
532};
533
534void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
535{
536 pxa_register_device(&pxa27x_device_ohci, info);
537}
538
eric miao8f58de72007-12-19 17:14:02 +0800539static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
540
541static struct resource pxa27x_resource_ssp1[] = {
542 [0] = {
543 .start = 0x41000000,
544 .end = 0x4100003f,
545 .flags = IORESOURCE_MEM,
546 },
547 [1] = {
548 .start = IRQ_SSP,
549 .end = IRQ_SSP,
550 .flags = IORESOURCE_IRQ,
551 },
552 [2] = {
553 /* DRCMR for RX */
554 .start = 13,
555 .end = 13,
556 .flags = IORESOURCE_DMA,
557 },
558 [3] = {
559 /* DRCMR for TX */
560 .start = 14,
561 .end = 14,
562 .flags = IORESOURCE_DMA,
563 },
564};
565
566struct platform_device pxa27x_device_ssp1 = {
567 .name = "pxa27x-ssp",
568 .id = 0,
569 .dev = {
570 .dma_mask = &pxa27x_ssp1_dma_mask,
571 .coherent_dma_mask = DMA_BIT_MASK(32),
572 },
573 .resource = pxa27x_resource_ssp1,
574 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1),
575};
576
577static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
578
579static struct resource pxa27x_resource_ssp2[] = {
580 [0] = {
581 .start = 0x41700000,
582 .end = 0x4170003f,
583 .flags = IORESOURCE_MEM,
584 },
585 [1] = {
586 .start = IRQ_SSP2,
587 .end = IRQ_SSP2,
588 .flags = IORESOURCE_IRQ,
589 },
590 [2] = {
591 /* DRCMR for RX */
592 .start = 15,
593 .end = 15,
594 .flags = IORESOURCE_DMA,
595 },
596 [3] = {
597 /* DRCMR for TX */
598 .start = 16,
599 .end = 16,
600 .flags = IORESOURCE_DMA,
601 },
602};
603
604struct platform_device pxa27x_device_ssp2 = {
605 .name = "pxa27x-ssp",
606 .id = 1,
607 .dev = {
608 .dma_mask = &pxa27x_ssp2_dma_mask,
609 .coherent_dma_mask = DMA_BIT_MASK(32),
610 },
611 .resource = pxa27x_resource_ssp2,
612 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2),
613};
614
615static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
616
617static struct resource pxa27x_resource_ssp3[] = {
618 [0] = {
619 .start = 0x41900000,
620 .end = 0x4190003f,
621 .flags = IORESOURCE_MEM,
622 },
623 [1] = {
624 .start = IRQ_SSP3,
625 .end = IRQ_SSP3,
626 .flags = IORESOURCE_IRQ,
627 },
628 [2] = {
629 /* DRCMR for RX */
630 .start = 66,
631 .end = 66,
632 .flags = IORESOURCE_DMA,
633 },
634 [3] = {
635 /* DRCMR for TX */
636 .start = 67,
637 .end = 67,
638 .flags = IORESOURCE_DMA,
639 },
640};
641
642struct platform_device pxa27x_device_ssp3 = {
643 .name = "pxa27x-ssp",
644 .id = 2,
645 .dev = {
646 .dma_mask = &pxa27x_ssp3_dma_mask,
647 .coherent_dma_mask = DMA_BIT_MASK(32),
648 },
649 .resource = pxa27x_resource_ssp3,
650 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3),
651};
Guennadi Liakhovetski3f3acef2008-04-11 22:19:45 +0200652
eric miao75540c12008-04-13 21:44:04 +0100653static struct resource pxa27x_resource_pwm0[] = {
654 [0] = {
655 .start = 0x40b00000,
656 .end = 0x40b0001f,
657 .flags = IORESOURCE_MEM,
658 },
659};
660
661struct platform_device pxa27x_device_pwm0 = {
662 .name = "pxa27x-pwm",
663 .id = 0,
664 .resource = pxa27x_resource_pwm0,
665 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm0),
666};
667
668static struct resource pxa27x_resource_pwm1[] = {
669 [0] = {
670 .start = 0x40c00000,
671 .end = 0x40c0001f,
672 .flags = IORESOURCE_MEM,
673 },
674};
675
676struct platform_device pxa27x_device_pwm1 = {
677 .name = "pxa27x-pwm",
678 .id = 1,
679 .resource = pxa27x_resource_pwm1,
680 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm1),
681};
682
Guennadi Liakhovetski3f3acef2008-04-11 22:19:45 +0200683static struct resource pxa27x_resource_camera[] = {
684 [0] = {
685 .start = 0x50000000,
686 .end = 0x50000fff,
687 .flags = IORESOURCE_MEM,
688 },
689 [1] = {
690 .start = IRQ_CAMERA,
691 .end = IRQ_CAMERA,
692 .flags = IORESOURCE_IRQ,
693 },
694};
695
696static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
697
698static struct platform_device pxa27x_device_camera = {
699 .name = "pxa27x-camera",
700 .id = 0, /* This is used to put cameras on this interface */
701 .dev = {
702 .dma_mask = &pxa27x_dma_mask_camera,
703 .coherent_dma_mask = 0xffffffff,
704 },
705 .num_resources = ARRAY_SIZE(pxa27x_resource_camera),
706 .resource = pxa27x_resource_camera,
707};
708
709void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
710{
711 pxa_register_device(&pxa27x_device_camera, info);
712}
eric miao8f58de72007-12-19 17:14:02 +0800713#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
714
715#ifdef CONFIG_PXA3xx
716static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
717
718static struct resource pxa3xx_resource_ssp4[] = {
719 [0] = {
720 .start = 0x41a00000,
721 .end = 0x41a0003f,
722 .flags = IORESOURCE_MEM,
723 },
724 [1] = {
725 .start = IRQ_SSP4,
726 .end = IRQ_SSP4,
727 .flags = IORESOURCE_IRQ,
728 },
729 [2] = {
730 /* DRCMR for RX */
731 .start = 2,
732 .end = 2,
733 .flags = IORESOURCE_DMA,
734 },
735 [3] = {
736 /* DRCMR for TX */
737 .start = 3,
738 .end = 3,
739 .flags = IORESOURCE_DMA,
740 },
741};
742
743struct platform_device pxa3xx_device_ssp4 = {
744 /* PXA3xx SSP is basically equivalent to PXA27x */
745 .name = "pxa27x-ssp",
746 .id = 3,
747 .dev = {
748 .dma_mask = &pxa3xx_ssp4_dma_mask,
749 .coherent_dma_mask = DMA_BIT_MASK(32),
750 },
751 .resource = pxa3xx_resource_ssp4,
752 .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4),
753};
Bridge Wu8d33b052007-12-21 19:15:36 +0800754
755static struct resource pxa3xx_resources_mci2[] = {
756 [0] = {
757 .start = 0x42000000,
758 .end = 0x42000fff,
759 .flags = IORESOURCE_MEM,
760 },
761 [1] = {
762 .start = IRQ_MMC2,
763 .end = IRQ_MMC2,
764 .flags = IORESOURCE_IRQ,
765 },
766 [2] = {
767 .start = 93,
768 .end = 93,
769 .flags = IORESOURCE_DMA,
770 },
771 [3] = {
772 .start = 94,
773 .end = 94,
774 .flags = IORESOURCE_DMA,
775 },
776};
777
778struct platform_device pxa3xx_device_mci2 = {
779 .name = "pxa2xx-mci",
780 .id = 1,
781 .dev = {
782 .dma_mask = &pxamci_dmamask,
783 .coherent_dma_mask = 0xffffffff,
784 },
785 .num_resources = ARRAY_SIZE(pxa3xx_resources_mci2),
786 .resource = pxa3xx_resources_mci2,
787};
788
789void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
790{
791 pxa_register_device(&pxa3xx_device_mci2, info);
792}
793
Bridge Wu5a1f21b2007-12-21 19:27:08 +0800794static struct resource pxa3xx_resources_mci3[] = {
795 [0] = {
796 .start = 0x42500000,
797 .end = 0x42500fff,
798 .flags = IORESOURCE_MEM,
799 },
800 [1] = {
801 .start = IRQ_MMC3,
802 .end = IRQ_MMC3,
803 .flags = IORESOURCE_IRQ,
804 },
805 [2] = {
806 .start = 100,
807 .end = 100,
808 .flags = IORESOURCE_DMA,
809 },
810 [3] = {
811 .start = 101,
812 .end = 101,
813 .flags = IORESOURCE_DMA,
814 },
815};
816
817struct platform_device pxa3xx_device_mci3 = {
818 .name = "pxa2xx-mci",
819 .id = 2,
820 .dev = {
821 .dma_mask = &pxamci_dmamask,
822 .coherent_dma_mask = 0xffffffff,
823 },
824 .num_resources = ARRAY_SIZE(pxa3xx_resources_mci3),
825 .resource = pxa3xx_resources_mci3,
826};
827
828void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
829{
830 pxa_register_device(&pxa3xx_device_mci3, info);
831}
832
eric miao8f58de72007-12-19 17:14:02 +0800833#endif /* CONFIG_PXA3xx */