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Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
Steve Mucklea55df6e2010-01-07 12:43:24 -08002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
Steve Mucklea55df6e2010-01-07 12:43:24 -080012 */
13
14#include <linux/kernel.h>
15#include <linux/platform_device.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070016#include <linux/gpio.h>
Steve Muckle9161d302010-02-11 11:50:40 -080017#include <linux/irq.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018#include <linux/io.h>
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +053019#include <linux/msm_ssbi.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070020#include <linux/mfd/pmic8058.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080021
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070022#include <linux/leds.h>
23#include <linux/pmic8058-othc.h>
24#include <linux/mfd/pmic8901.h>
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053025#include <linux/regulator/gpio-regulator.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070026#include <linux/regulator/pmic8901-regulator.h>
27#include <linux/bootmem.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070028#include <linux/msm_adc.h>
29#include <linux/m_adcproc.h>
30#include <linux/mfd/marimba.h>
31#include <linux/msm-charger.h>
32#include <linux/i2c.h>
33#include <linux/i2c/sx150x.h>
34#include <linux/smsc911x.h>
35#include <linux/spi/spi.h>
36#include <linux/input/tdisc_shinetsu.h>
37#include <linux/input/cy8c_ts.h>
38#include <linux/cyttsp.h>
39#include <linux/i2c/isa1200.h>
40#include <linux/dma-mapping.h>
41#include <linux/i2c/bq27520.h>
42
43#ifdef CONFIG_ANDROID_PMEM
44#include <linux/android_pmem.h>
45#endif
46
47#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
48#include <linux/i2c/smb137b.h>
49#endif
Lei Zhou338cab82011-08-19 13:38:17 -040050#ifdef CONFIG_SND_SOC_WM8903
51#include <sound/wm8903.h>
52#endif
Steve Mucklea55df6e2010-01-07 12:43:24 -080053#include <asm/mach-types.h>
54#include <asm/mach/arch.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070055#include <asm/setup.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080056
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070057#include <mach/dma.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080058#include <mach/board.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070059#include <mach/irqs.h>
60#include <mach/msm_spi.h>
61#include <mach/msm_serial_hs.h>
62#include <mach/msm_serial_hs_lite.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080063#include <mach/msm_iomap.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070064#include <mach/msm_memtypes.h>
65#include <asm/mach/mmc.h>
66#include <mach/msm_battery.h>
67#include <mach/msm_hsusb.h>
Rohit Vaswania513aa8d2011-07-18 15:14:28 -070068#include <mach/gpiomux.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070069#ifdef CONFIG_MSM_DSPS
70#include <mach/msm_dsps.h>
71#endif
72#include <mach/msm_xo.h>
73#include <mach/msm_bus_board.h>
74#include <mach/socinfo.h>
75#include <linux/i2c/isl9519.h>
76#ifdef CONFIG_USB_G_ANDROID
77#include <linux/usb/android.h>
78#include <mach/usbdiag.h>
79#endif
80#include <linux/regulator/consumer.h>
81#include <linux/regulator/machine.h>
82#include <mach/sdio_al.h>
83#include <mach/rpm.h>
84#include <mach/rpm-regulator.h>
Abhijeet Dharmapurikar6d565fd2011-09-15 18:49:56 -070085#include <mach/restart.h>
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053086#include <mach/board-msm8660.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080087
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070088#include "devices.h"
89#include "devices-msm8x60.h"
90#include "cpuidle.h"
91#include "pm.h"
92#include "mpm.h"
93#include "spm.h"
94#include "rpm_log.h"
95#include "timer.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070096#include "gpiomux-8x60.h"
97#include "rpm_stats.h"
98#include "peripheral-loader.h"
99#include <linux/platform_data/qcom_crypto_device.h>
100#include "rpm_resources.h"
Matt Wagantall6d9ebee2011-08-26 12:15:24 -0700101#include "acpuclock.h"
Maheshkumar Sivasubramanian8ccc16e2011-10-25 15:59:57 -0600102#include "pm-boot.h"
Laura Abbott63cfd7e2011-10-10 18:21:01 -0700103
104#include <linux/ion.h>
105#include <mach/ion.h>
106
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700107#define MSM_SHARED_RAM_PHYS 0x40000000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700108#define MDM2AP_SYNC 129
109
Terence Hampson1c73fef2011-07-19 17:10:49 -0400110#define GPIO_ETHERNET_RESET_N_DRAGON 30
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700111#define LCDC_SPI_GPIO_CLK 73
112#define LCDC_SPI_GPIO_CS 72
113#define LCDC_SPI_GPIO_MOSI 70
114#define LCDC_AUO_PANEL_NAME "lcdc_auo_wvga"
115#define LCDC_SAMSUNG_OLED_PANEL_NAME "lcdc_samsung_oled"
116#define LCDC_SAMSUNG_WSVGA_PANEL_NAME "lcdc_samsung_wsvga"
117#define LCDC_SAMSUNG_SPI_DEVICE_NAME "lcdc_samsung_ams367pe02"
118#define LCDC_AUO_SPI_DEVICE_NAME "lcdc_auo_nt35582"
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -0400119#define LCDC_NT35582_PANEL_NAME "lcdc_nt35582_wvga"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700120
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -0700121#define PANEL_NAME_MAX_LEN 30
122#define MIPI_CMD_NOVATEK_QHD_PANEL_NAME "mipi_cmd_novatek_qhd"
123#define MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME "mipi_video_novatek_qhd"
124#define MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME "mipi_video_toshiba_wvga"
125#define HDMI_PANEL_NAME "hdmi_msm"
126#define TVOUT_PANEL_NAME "tvout_msm"
127
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700128#define DSPS_PIL_GENERIC_NAME "dsps"
129#define DSPS_PIL_FLUID_NAME "dsps_fluid"
130
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -0800131#ifdef CONFIG_ION_MSM
132static struct platform_device ion_dev;
133#endif
134
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700135enum {
136 GPIO_EXPANDER_IRQ_BASE = PM8901_IRQ_BASE + NR_PMIC8901_IRQS,
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530137 GPIO_EXPANDER_GPIO_BASE = PM8901_MPP_BASE + PM8901_MPPS,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700138 /* CORE expander */
139 GPIO_CORE_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE,
140 GPIO_CLASS_D1_EN = GPIO_CORE_EXPANDER_BASE,
141 GPIO_WLAN_DEEP_SLEEP_N,
142 GPIO_LVDS_SHUTDOWN_N,
143 GPIO_DISP_RESX_N = GPIO_LVDS_SHUTDOWN_N,
144 GPIO_MS_SYS_RESET_N,
145 GPIO_CAP_TS_RESOUT_N,
146 GPIO_CAP_GAUGE_BI_TOUT,
147 GPIO_ETHERNET_PME,
148 GPIO_EXT_GPS_LNA_EN,
149 GPIO_MSM_WAKES_BT,
150 GPIO_ETHERNET_RESET_N,
151 GPIO_HEADSET_DET_N,
152 GPIO_USB_UICC_EN,
153 GPIO_BACKLIGHT_EN,
154 GPIO_EXT_CAMIF_PWR_EN,
155 GPIO_BATT_GAUGE_INT_N,
156 GPIO_BATT_GAUGE_EN,
157 /* DOCKING expander */
158 GPIO_DOCKING_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + 16,
159 GPIO_MIPI_DSI_RST_N = GPIO_DOCKING_EXPANDER_BASE,
160 GPIO_AUX_JTAG_DET_N,
161 GPIO_DONGLE_DET_N,
162 GPIO_SVIDEO_LOAD_DET,
163 GPIO_SVID_AMP_SHUTDOWN1_N,
164 GPIO_SVID_AMP_SHUTDOWN0_N,
165 GPIO_SDC_WP,
166 GPIO_IRDA_PWDN,
167 GPIO_IRDA_RESET_N,
168 GPIO_DONGLE_GPIO0,
169 GPIO_DONGLE_GPIO1,
170 GPIO_DONGLE_GPIO2,
171 GPIO_DONGLE_GPIO3,
172 GPIO_DONGLE_PWR_EN,
173 GPIO_EMMC_RESET_N,
174 GPIO_TP_EXP2_IO15,
175 /* SURF expander */
176 GPIO_SURF_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 2),
177 GPIO_SD_CARD_DET_1 = GPIO_SURF_EXPANDER_BASE,
178 GPIO_SD_CARD_DET_2,
179 GPIO_SD_CARD_DET_4,
180 GPIO_SD_CARD_DET_5,
181 GPIO_UIM3_RST,
182 GPIO_SURF_EXPANDER_IO5,
183 GPIO_SURF_EXPANDER_IO6,
184 GPIO_ADC_I2C_EN,
185 GPIO_SURF_EXPANDER_IO8,
186 GPIO_SURF_EXPANDER_IO9,
187 GPIO_SURF_EXPANDER_IO10,
188 GPIO_SURF_EXPANDER_IO11,
189 GPIO_SURF_EXPANDER_IO12,
190 GPIO_SURF_EXPANDER_IO13,
191 GPIO_SURF_EXPANDER_IO14,
192 GPIO_SURF_EXPANDER_IO15,
193 /* LEFT KB IO expander */
194 GPIO_LEFT_KB_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 3),
195 GPIO_LEFT_LED_1 = GPIO_LEFT_KB_EXPANDER_BASE,
196 GPIO_LEFT_LED_2,
197 GPIO_LEFT_LED_3,
198 GPIO_LEFT_LED_WLAN,
199 GPIO_JOYSTICK_EN,
200 GPIO_CAP_TS_SLEEP,
201 GPIO_LEFT_KB_IO6,
202 GPIO_LEFT_LED_5,
203 /* RIGHT KB IO expander */
204 GPIO_RIGHT_KB_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 3) + 8,
205 GPIO_RIGHT_LED_1 = GPIO_RIGHT_KB_EXPANDER_BASE,
206 GPIO_RIGHT_LED_2,
207 GPIO_RIGHT_LED_3,
208 GPIO_RIGHT_LED_BT,
209 GPIO_WEB_CAMIF_STANDBY,
210 GPIO_COMPASS_RST_N,
211 GPIO_WEB_CAMIF_RESET_N,
212 GPIO_RIGHT_LED_5,
213 GPIO_R_ALTIMETER_RESET_N,
214 /* FLUID S IO expander */
215 GPIO_SOUTH_EXPANDER_BASE,
216 GPIO_MIC2_ANCR_SEL = GPIO_SOUTH_EXPANDER_BASE,
217 GPIO_MIC1_ANCL_SEL,
218 GPIO_HS_MIC4_SEL,
219 GPIO_FML_MIC3_SEL,
220 GPIO_FMR_MIC5_SEL,
221 GPIO_TS_SLEEP,
222 GPIO_HAP_SHIFT_LVL_OE,
223 GPIO_HS_SW_DIR,
224 /* FLUID N IO expander */
225 GPIO_NORTH_EXPANDER_BASE,
226 GPIO_EPM_3_3V_EN = GPIO_NORTH_EXPANDER_BASE,
227 GPIO_EPM_5V_BOOST_EN,
228 GPIO_AUX_CAM_2P7_EN,
229 GPIO_LED_FLASH_EN,
230 GPIO_LED1_GREEN_N,
231 GPIO_LED2_RED_N,
232 GPIO_FRONT_CAM_RESET_N,
233 GPIO_EPM_LVLSFT_EN,
234 GPIO_N_ALTIMETER_RESET_N,
235 /* EPM expander */
236 GPIO_EPM_EXPANDER_BASE,
237 GPIO_PWR_MON_START = GPIO_EPM_EXPANDER_BASE,
238 GPIO_PWR_MON_RESET_N,
239 GPIO_ADC1_PWDN_N,
240 GPIO_ADC2_PWDN_N,
241 GPIO_EPM_EXPANDER_IO4,
242 GPIO_ADC1_MUX_SPI_INT_N_3_3V,
243 GPIO_ADC2_MUX_SPI_INT_N,
244 GPIO_EPM_EXPANDER_IO7,
245 GPIO_PWR_MON_ENABLE,
246 GPIO_EPM_SPI_ADC1_CS_N,
247 GPIO_EPM_SPI_ADC2_CS_N,
248 GPIO_EPM_EXPANDER_IO11,
249 GPIO_EPM_EXPANDER_IO12,
250 GPIO_EPM_EXPANDER_IO13,
251 GPIO_EPM_EXPANDER_IO14,
252 GPIO_EPM_EXPANDER_IO15,
253};
254
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530255struct pm8xxx_mpp_init_info {
256 unsigned mpp;
257 struct pm8xxx_mpp_config_data config;
258};
259
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530260#define PM8058_MPP_INIT(_mpp, _type, _level, _control) \
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530261{ \
262 .mpp = PM8058_MPP_PM_TO_SYS(_mpp), \
263 .config = { \
264 .type = PM8XXX_MPP_TYPE_##_type, \
265 .level = _level, \
266 .control = PM8XXX_MPP_##_control, \
267 } \
268}
269
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530270#define PM8901_MPP_INIT(_mpp, _type, _level, _control) \
271{ \
272 .mpp = PM8901_MPP_PM_TO_SYS(_mpp), \
273 .config = { \
274 .type = PM8XXX_MPP_TYPE_##_type, \
275 .level = _level, \
276 .control = PM8XXX_MPP_##_control, \
277 } \
278}
279
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700280/*
281 * The UI_INTx_N lines are pmic gpio lines which connect i2c
282 * gpio expanders to the pm8058.
283 */
284#define UI_INT1_N 25
285#define UI_INT2_N 34
286#define UI_INT3_N 14
287/*
288FM GPIO is GPIO 18 on PMIC 8058.
289As the index starts from 0 in the PMIC driver, and hence 17
290corresponds to GPIO 18 on PMIC 8058.
291*/
292#define FM_GPIO 17
293
294#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
295static void (*sdc2_status_notify_cb)(int card_present, void *dev_id);
296static void *sdc2_status_notify_cb_devid;
297#endif
298
299#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
300static void (*sdc5_status_notify_cb)(int card_present, void *dev_id);
301static void *sdc5_status_notify_cb_devid;
302#endif
303
304static struct msm_spm_platform_data msm_spm_data_v1[] __initdata = {
305 [0] = {
306 .reg_base_addr = MSM_SAW0_BASE,
307
308#ifdef CONFIG_MSM_AVS_HW
309 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
310#endif
311 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x0F,
312 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
313 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0xFFFFFFFF,
314 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0xFFFFFFFF,
315
316 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x01,
317 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
318 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
319
320 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
321 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
322 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
323
324 .awake_vlevel = 0x94,
325 .retention_vlevel = 0x81,
326 .collapse_vlevel = 0x20,
327 .retention_mid_vlevel = 0x94,
328 .collapse_mid_vlevel = 0x8C,
329
330 .vctl_timeout_us = 50,
331 },
332
333 [1] = {
334 .reg_base_addr = MSM_SAW1_BASE,
335
336#ifdef CONFIG_MSM_AVS_HW
337 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
338#endif
339 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x0F,
340 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
341 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0xFFFFFFFF,
342 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0xFFFFFFFF,
343
344 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x13,
345 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
346 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
347
348 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
349 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
350 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
351
352 .awake_vlevel = 0x94,
353 .retention_vlevel = 0x81,
354 .collapse_vlevel = 0x20,
355 .retention_mid_vlevel = 0x94,
356 .collapse_mid_vlevel = 0x8C,
357
358 .vctl_timeout_us = 50,
359 },
360};
361
362static struct msm_spm_platform_data msm_spm_data[] __initdata = {
363 [0] = {
364 .reg_base_addr = MSM_SAW0_BASE,
365
366#ifdef CONFIG_MSM_AVS_HW
367 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
368#endif
369 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x1C,
370 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
371 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0x0C0CFFFF,
372 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0x78780FFF,
373
374 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x01,
375 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
376 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
377
378 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
379 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
380 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
381
382 .awake_vlevel = 0xA0,
383 .retention_vlevel = 0x89,
384 .collapse_vlevel = 0x20,
385 .retention_mid_vlevel = 0x89,
386 .collapse_mid_vlevel = 0x89,
387
388 .vctl_timeout_us = 50,
389 },
390
391 [1] = {
392 .reg_base_addr = MSM_SAW1_BASE,
393
394#ifdef CONFIG_MSM_AVS_HW
395 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
396#endif
397 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x1C,
398 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
399 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0x0C0CFFFF,
400 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0x78780FFF,
401
402 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x13,
403 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
404 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
405
406 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
407 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
408 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
409
410 .awake_vlevel = 0xA0,
411 .retention_vlevel = 0x89,
412 .collapse_vlevel = 0x20,
413 .retention_mid_vlevel = 0x89,
414 .collapse_mid_vlevel = 0x89,
415
416 .vctl_timeout_us = 50,
417 },
418};
419
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700420/*
421 * Consumer specific regulator names:
422 * regulator name consumer dev_name
423 */
424static struct regulator_consumer_supply vreg_consumers_8901_S0[] = {
425 REGULATOR_SUPPLY("8901_s0", NULL),
426};
427static struct regulator_consumer_supply vreg_consumers_8901_S1[] = {
428 REGULATOR_SUPPLY("8901_s1", NULL),
429};
430
431static struct regulator_init_data saw_s0_init_data = {
432 .constraints = {
433 .name = "8901_s0",
434 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
Tianyi Gou7c81dfa2011-07-27 12:15:24 -0700435 .min_uV = 800000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700436 .max_uV = 1250000,
437 },
438 .consumer_supplies = vreg_consumers_8901_S0,
439 .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S0),
440};
441
442static struct regulator_init_data saw_s1_init_data = {
443 .constraints = {
444 .name = "8901_s1",
445 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
Tianyi Gou7c81dfa2011-07-27 12:15:24 -0700446 .min_uV = 800000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700447 .max_uV = 1250000,
448 },
449 .consumer_supplies = vreg_consumers_8901_S1,
450 .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S1),
451};
452
453static struct platform_device msm_device_saw_s0 = {
454 .name = "saw-regulator",
455 .id = 0,
456 .dev = {
457 .platform_data = &saw_s0_init_data,
458 },
459};
460
461static struct platform_device msm_device_saw_s1 = {
462 .name = "saw-regulator",
463 .id = 1,
464 .dev = {
465 .platform_data = &saw_s1_init_data,
466 },
467};
468
469/*
470 * The smc91x configuration varies depending on platform.
471 * The resources data structure is filled in at runtime.
472 */
473static struct resource smc91x_resources[] = {
474 [0] = {
475 .flags = IORESOURCE_MEM,
476 },
477 [1] = {
478 .flags = IORESOURCE_IRQ,
479 },
480};
481
482static struct platform_device smc91x_device = {
483 .name = "smc91x",
484 .id = 0,
485 .num_resources = ARRAY_SIZE(smc91x_resources),
486 .resource = smc91x_resources,
487};
488
489static struct resource smsc911x_resources[] = {
490 [0] = {
491 .flags = IORESOURCE_MEM,
492 .start = 0x1b800000,
493 .end = 0x1b8000ff
494 },
495 [1] = {
496 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
497 },
498};
499
500static struct smsc911x_platform_config smsc911x_config = {
501 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
502 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
503 .flags = SMSC911X_USE_16BIT,
504 .has_reset_gpio = 1,
505 .reset_gpio = GPIO_ETHERNET_RESET_N
506};
507
508static struct platform_device smsc911x_device = {
509 .name = "smsc911x",
510 .id = 0,
511 .num_resources = ARRAY_SIZE(smsc911x_resources),
512 .resource = smsc911x_resources,
513 .dev = {
514 .platform_data = &smsc911x_config
515 }
516};
517
518#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
519 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE) || \
520 defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
521 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
522
523#define QCE_SIZE 0x10000
524#define QCE_0_BASE 0x18500000
525
526#define QCE_HW_KEY_SUPPORT 0
527#define QCE_SHA_HMAC_SUPPORT 0
528#define QCE_SHARE_CE_RESOURCE 2
529#define QCE_CE_SHARED 1
530
531static struct resource qcrypto_resources[] = {
532 [0] = {
533 .start = QCE_0_BASE,
534 .end = QCE_0_BASE + QCE_SIZE - 1,
535 .flags = IORESOURCE_MEM,
536 },
537 [1] = {
538 .name = "crypto_channels",
539 .start = DMOV_CE_IN_CHAN,
540 .end = DMOV_CE_OUT_CHAN,
541 .flags = IORESOURCE_DMA,
542 },
543 [2] = {
544 .name = "crypto_crci_in",
545 .start = DMOV_CE_IN_CRCI,
546 .end = DMOV_CE_IN_CRCI,
547 .flags = IORESOURCE_DMA,
548 },
549 [3] = {
550 .name = "crypto_crci_out",
551 .start = DMOV_CE_OUT_CRCI,
552 .end = DMOV_CE_OUT_CRCI,
553 .flags = IORESOURCE_DMA,
554 },
555 [4] = {
556 .name = "crypto_crci_hash",
557 .start = DMOV_CE_HASH_CRCI,
558 .end = DMOV_CE_HASH_CRCI,
559 .flags = IORESOURCE_DMA,
560 },
561};
562
563static struct resource qcedev_resources[] = {
564 [0] = {
565 .start = QCE_0_BASE,
566 .end = QCE_0_BASE + QCE_SIZE - 1,
567 .flags = IORESOURCE_MEM,
568 },
569 [1] = {
570 .name = "crypto_channels",
571 .start = DMOV_CE_IN_CHAN,
572 .end = DMOV_CE_OUT_CHAN,
573 .flags = IORESOURCE_DMA,
574 },
575 [2] = {
576 .name = "crypto_crci_in",
577 .start = DMOV_CE_IN_CRCI,
578 .end = DMOV_CE_IN_CRCI,
579 .flags = IORESOURCE_DMA,
580 },
581 [3] = {
582 .name = "crypto_crci_out",
583 .start = DMOV_CE_OUT_CRCI,
584 .end = DMOV_CE_OUT_CRCI,
585 .flags = IORESOURCE_DMA,
586 },
587 [4] = {
588 .name = "crypto_crci_hash",
589 .start = DMOV_CE_HASH_CRCI,
590 .end = DMOV_CE_HASH_CRCI,
591 .flags = IORESOURCE_DMA,
592 },
593};
594
595#endif
596
597#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
598 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
599
600static struct msm_ce_hw_support qcrypto_ce_hw_suppport = {
601 .ce_shared = QCE_CE_SHARED,
602 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
603 .hw_key_support = QCE_HW_KEY_SUPPORT,
604 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
605};
606
607static struct platform_device qcrypto_device = {
608 .name = "qcrypto",
609 .id = 0,
610 .num_resources = ARRAY_SIZE(qcrypto_resources),
611 .resource = qcrypto_resources,
612 .dev = {
613 .coherent_dma_mask = DMA_BIT_MASK(32),
614 .platform_data = &qcrypto_ce_hw_suppport,
615 },
616};
617#endif
618
619#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
620 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
621
622static struct msm_ce_hw_support qcedev_ce_hw_suppport = {
623 .ce_shared = QCE_CE_SHARED,
624 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
625 .hw_key_support = QCE_HW_KEY_SUPPORT,
626 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
627};
628
629static struct platform_device qcedev_device = {
630 .name = "qce",
631 .id = 0,
632 .num_resources = ARRAY_SIZE(qcedev_resources),
633 .resource = qcedev_resources,
634 .dev = {
635 .coherent_dma_mask = DMA_BIT_MASK(32),
636 .platform_data = &qcedev_ce_hw_suppport,
637 },
638};
639#endif
640
641#if defined(CONFIG_HAPTIC_ISA1200) || \
642 defined(CONFIG_HAPTIC_ISA1200_MODULE)
643
644static const char *vregs_isa1200_name[] = {
645 "8058_s3",
646 "8901_l4",
647};
648
649static const int vregs_isa1200_val[] = {
650 1800000,/* uV */
651 2600000,
652};
653static struct regulator *vregs_isa1200[ARRAY_SIZE(vregs_isa1200_name)];
654static struct msm_xo_voter *xo_handle_a1;
655
656static int isa1200_power(int vreg_on)
Steve Mucklea55df6e2010-01-07 12:43:24 -0800657{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700658 int i, rc = 0;
659
660 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++) {
661 rc = vreg_on ? regulator_enable(vregs_isa1200[i]) :
662 regulator_disable(vregs_isa1200[i]);
663 if (rc < 0) {
664 pr_err("%s: vreg %s %s failed (%d)\n",
665 __func__, vregs_isa1200_name[i],
666 vreg_on ? "enable" : "disable", rc);
667 goto vreg_fail;
668 }
669 }
670
671 rc = vreg_on ? msm_xo_mode_vote(xo_handle_a1, MSM_XO_MODE_ON) :
672 msm_xo_mode_vote(xo_handle_a1, MSM_XO_MODE_OFF);
673 if (rc < 0) {
674 pr_err("%s: failed to %svote for TCXO A1 buffer%d\n",
675 __func__, vreg_on ? "" : "de-", rc);
676 goto vreg_fail;
677 }
678 return 0;
679
680vreg_fail:
681 while (i--)
682 !vreg_on ? regulator_enable(vregs_isa1200[i]) :
683 regulator_disable(vregs_isa1200[i]);
684 return rc;
Steve Mucklea55df6e2010-01-07 12:43:24 -0800685}
686
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700687static int isa1200_dev_setup(bool enable)
Steve Mucklea55df6e2010-01-07 12:43:24 -0800688{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700689 int i, rc;
Steve Muckle9161d302010-02-11 11:50:40 -0800690
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700691 if (enable == true) {
692 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++) {
693 vregs_isa1200[i] = regulator_get(NULL,
694 vregs_isa1200_name[i]);
695 if (IS_ERR(vregs_isa1200[i])) {
696 pr_err("%s: regulator get of %s failed (%ld)\n",
697 __func__, vregs_isa1200_name[i],
698 PTR_ERR(vregs_isa1200[i]));
699 rc = PTR_ERR(vregs_isa1200[i]);
700 goto vreg_get_fail;
701 }
702 rc = regulator_set_voltage(vregs_isa1200[i],
703 vregs_isa1200_val[i], vregs_isa1200_val[i]);
704 if (rc) {
705 pr_err("%s: regulator_set_voltage(%s) failed\n",
706 __func__, vregs_isa1200_name[i]);
707 goto vreg_get_fail;
708 }
709 }
Steve Muckle9161d302010-02-11 11:50:40 -0800710
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700711 rc = gpio_request(GPIO_HAP_SHIFT_LVL_OE, "haptics_shft_lvl_oe");
712 if (rc) {
713 pr_err("%s: unable to request gpio %d (%d)\n",
714 __func__, GPIO_HAP_SHIFT_LVL_OE, rc);
715 goto vreg_get_fail;
716 }
Steve Muckle9161d302010-02-11 11:50:40 -0800717
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700718 rc = gpio_direction_output(GPIO_HAP_SHIFT_LVL_OE, 1);
719 if (rc) {
720 pr_err("%s: Unable to set direction\n", __func__);;
721 goto free_gpio;
722 }
723
724 xo_handle_a1 = msm_xo_get(MSM_XO_TCXO_A1, "isa1200");
725 if (IS_ERR(xo_handle_a1)) {
726 rc = PTR_ERR(xo_handle_a1);
727 pr_err("%s: failed to get the handle for A1(%d)\n",
728 __func__, rc);
729 goto gpio_set_dir;
730 }
731 } else {
732 gpio_set_value(GPIO_HAP_SHIFT_LVL_OE, 0);
733 gpio_free(GPIO_HAP_SHIFT_LVL_OE);
734
735 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++)
736 regulator_put(vregs_isa1200[i]);
737
738 msm_xo_put(xo_handle_a1);
739 }
740
741 return 0;
742gpio_set_dir:
743 gpio_set_value(GPIO_HAP_SHIFT_LVL_OE, 0);
744free_gpio:
745 gpio_free(GPIO_HAP_SHIFT_LVL_OE);
746vreg_get_fail:
747 while (i)
748 regulator_put(vregs_isa1200[--i]);
749 return rc;
750}
751
752#define PMIC_GPIO_HAP_ENABLE 18 /* PMIC GPIO Number 19 */
Mohan Pallaka4a1160d2011-09-09 15:17:45 +0530753#define PMIC_GPIO_HAP_LDO_ENABLE 5 /* PMIC GPIO Number 6 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700754static struct isa1200_platform_data isa1200_1_pdata = {
755 .name = "vibrator",
756 .power_on = isa1200_power,
757 .dev_setup = isa1200_dev_setup,
758 /*gpio to enable haptic*/
759 .hap_en_gpio = PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_ENABLE),
Mohan Pallaka4a1160d2011-09-09 15:17:45 +0530760 .hap_len_gpio = PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_LDO_ENABLE),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700761 .max_timeout = 15000,
762 .mode_ctrl = PWM_GEN_MODE,
763 .pwm_fd = {
764 .pwm_div = 256,
765 },
766 .is_erm = false,
767 .smart_en = true,
768 .ext_clk_en = true,
769 .chip_en = 1,
770};
771
772static struct i2c_board_info msm_isa1200_board_info[] = {
773 {
774 I2C_BOARD_INFO("isa1200_1", 0x90>>1),
775 .platform_data = &isa1200_1_pdata,
776 },
777};
778#endif
779
780#if defined(CONFIG_BATTERY_BQ27520) || \
781 defined(CONFIG_BATTERY_BQ27520_MODULE)
782static struct bq27520_platform_data bq27520_pdata = {
783 .name = "fuel-gauge",
784 .vreg_name = "8058_s3",
785 .vreg_value = 1800000,
786 .soc_int = GPIO_BATT_GAUGE_INT_N,
787 .bi_tout = GPIO_CAP_GAUGE_BI_TOUT,
788 .chip_en = GPIO_BATT_GAUGE_EN,
789 .enable_dlog = 0, /* if enable coulomb counter logger */
790};
791
792static struct i2c_board_info msm_bq27520_board_info[] = {
793 {
794 I2C_BOARD_INFO("bq27520", 0xaa>>1),
795 .platform_data = &bq27520_pdata,
796 },
797};
798#endif
799
800static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR * 2] = {
801 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
802 .idle_supported = 1,
803 .suspend_supported = 1,
804 .idle_enabled = 0,
805 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700806 },
807
808 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
809 .idle_supported = 1,
810 .suspend_supported = 1,
811 .idle_enabled = 0,
812 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700813 },
814
815 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
816 .idle_supported = 1,
817 .suspend_supported = 1,
818 .idle_enabled = 1,
819 .suspend_enabled = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700820 },
821
822 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
823 .idle_supported = 1,
824 .suspend_supported = 1,
825 .idle_enabled = 0,
826 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700827 },
828
829 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
830 .idle_supported = 1,
831 .suspend_supported = 1,
832 .idle_enabled = 0,
833 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700834 },
835
836 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
837 .idle_supported = 1,
838 .suspend_supported = 1,
839 .idle_enabled = 1,
840 .suspend_enabled = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700841 },
842};
843
844static struct msm_cpuidle_state msm_cstates[] __initdata = {
845 {0, 0, "C0", "WFI",
846 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
847
848 {0, 1, "C1", "STANDALONE_POWER_COLLAPSE",
849 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
850
851 {0, 2, "C2", "POWER_COLLAPSE",
852 MSM_PM_SLEEP_MODE_POWER_COLLAPSE},
853
854 {1, 0, "C0", "WFI",
855 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
856
857 {1, 1, "C1", "STANDALONE_POWER_COLLAPSE",
858 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
859};
860
861static struct msm_rpmrs_level msm_rpmrs_levels[] __initdata = {
862 {
863 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT,
864 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
865 true,
866 1, 8000, 100000, 1,
867 },
868
869 {
870 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE,
871 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
872 true,
873 1500, 5000, 60100000, 3000,
874 },
875
876 {
877 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
878 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
879 false,
880 1800, 5000, 60350000, 3500,
881 },
882 {
883 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
884 MSM_RPMRS_LIMITS(OFF, ACTIVE, MAX, ACTIVE),
885 false,
886 3800, 4500, 65350000, 5500,
887 },
888
889 {
890 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
891 MSM_RPMRS_LIMITS(ON, HSFS_OPEN, MAX, ACTIVE),
892 false,
893 2800, 2500, 66850000, 4800,
894 },
895
896 {
897 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
898 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, MAX, ACTIVE),
899 false,
900 4800, 2000, 71850000, 6800,
901 },
902
903 {
904 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
905 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, ACTIVE, RET_HIGH),
906 false,
907 6800, 500, 75850000, 8800,
908 },
909
910 {
911 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
912 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, RET_HIGH, RET_LOW),
913 false,
914 7800, 0, 76350000, 9800,
915 },
916};
917
918#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
919
920#define ISP1763_INT_GPIO 117
921#define ISP1763_RST_GPIO 152
922static struct resource isp1763_resources[] = {
923 [0] = {
924 .flags = IORESOURCE_MEM,
925 .start = 0x1D000000,
926 .end = 0x1D005FFF, /* 24KB */
927 },
928 [1] = {
929 .flags = IORESOURCE_IRQ,
930 },
931};
932static void __init msm8x60_cfg_isp1763(void)
933{
934 isp1763_resources[1].start = gpio_to_irq(ISP1763_INT_GPIO);
935 isp1763_resources[1].end = gpio_to_irq(ISP1763_INT_GPIO);
936}
937
938static int isp1763_setup_gpio(int enable)
939{
940 int status = 0;
941
942 if (enable) {
943 status = gpio_request(ISP1763_INT_GPIO, "isp1763_usb");
944 if (status) {
945 pr_err("%s:Failed to request GPIO %d\n",
946 __func__, ISP1763_INT_GPIO);
947 return status;
948 }
949 status = gpio_direction_input(ISP1763_INT_GPIO);
950 if (status) {
951 pr_err("%s:Failed to configure GPIO %d\n",
952 __func__, ISP1763_INT_GPIO);
953 goto gpio_free_int;
954 }
955 status = gpio_request(ISP1763_RST_GPIO, "isp1763_usb");
956 if (status) {
957 pr_err("%s:Failed to request GPIO %d\n",
958 __func__, ISP1763_RST_GPIO);
959 goto gpio_free_int;
960 }
961 status = gpio_direction_output(ISP1763_RST_GPIO, 1);
962 if (status) {
963 pr_err("%s:Failed to configure GPIO %d\n",
964 __func__, ISP1763_RST_GPIO);
965 goto gpio_free_rst;
966 }
967 pr_debug("\nISP GPIO configuration done\n");
968 return status;
969 }
970
971gpio_free_rst:
972 gpio_free(ISP1763_RST_GPIO);
973gpio_free_int:
974 gpio_free(ISP1763_INT_GPIO);
975
976 return status;
977}
978static struct isp1763_platform_data isp1763_pdata = {
979 .reset_gpio = ISP1763_RST_GPIO,
980 .setup_gpio = isp1763_setup_gpio
981};
982
983static struct platform_device isp1763_device = {
984 .name = "isp1763_usb",
985 .num_resources = ARRAY_SIZE(isp1763_resources),
986 .resource = isp1763_resources,
987 .dev = {
988 .platform_data = &isp1763_pdata
989 }
990};
991#endif
992
993#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_MSM_72K)
Anji jonnalaeb9e60d2011-10-05 12:19:46 +0530994static struct msm_otg_platform_data msm_otg_pdata;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700995static struct regulator *ldo6_3p3;
996static struct regulator *ldo7_1p8;
997static struct regulator *vdd_cx;
998#define PMICID_INT PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 36)
Anji jonnalaae745e92011-11-14 18:34:31 +0530999#define PMIC_ID_GPIO 36
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001000notify_vbus_state notify_vbus_state_func_ptr;
1001static int usb_phy_susp_dig_vol = 750000;
1002static int pmic_id_notif_supported;
1003
1004#ifdef CONFIG_USB_EHCI_MSM_72K
1005#define USB_PMIC_ID_DET_DELAY msecs_to_jiffies(100)
1006struct delayed_work pmic_id_det;
1007
1008static int __init usb_id_pin_rework_setup(char *support)
1009{
1010 if (strncmp(support, "true", 4) == 0)
1011 pmic_id_notif_supported = 1;
1012
1013 return 1;
1014}
1015__setup("usb_id_pin_rework=", usb_id_pin_rework_setup);
1016
1017static void pmic_id_detect(struct work_struct *w)
1018{
1019 int val = gpio_get_value_cansleep(PM8058_GPIO_PM_TO_SYS(36));
1020 pr_debug("%s(): gpio_read_value = %d\n", __func__, val);
1021
1022 if (notify_vbus_state_func_ptr)
1023 (*notify_vbus_state_func_ptr) (val);
1024}
1025
1026static irqreturn_t pmic_id_on_irq(int irq, void *data)
1027{
1028 /*
1029 * Spurious interrupts are observed on pmic gpio line
1030 * even though there is no state change on USB ID. Schedule the
1031 * work to to allow debounce on gpio
Steve Muckle9161d302010-02-11 11:50:40 -08001032 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001033 schedule_delayed_work(&pmic_id_det, USB_PMIC_ID_DET_DELAY);
Steve Muckle9161d302010-02-11 11:50:40 -08001034
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001035 return IRQ_HANDLED;
1036}
1037
Anji jonnalaae745e92011-11-14 18:34:31 +05301038static int msm_hsusb_phy_id_setup_init(int init)
1039{
1040 unsigned ret;
1041
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301042 struct pm8xxx_mpp_config_data hsusb_phy_mpp = {
1043 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
1044 .level = PM8901_MPP_DIG_LEVEL_L5,
1045 };
1046
Anji jonnalaae745e92011-11-14 18:34:31 +05301047 if (init) {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301048 hsusb_phy_mpp.control = PM8XXX_MPP_DOUT_CTRL_HIGH;
1049 ret = pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1),
1050 &hsusb_phy_mpp);
Anji jonnalaae745e92011-11-14 18:34:31 +05301051 if (ret < 0)
1052 pr_err("%s:MPP2 configuration failed\n", __func__);
1053 } else {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301054 hsusb_phy_mpp.control = PM8XXX_MPP_DOUT_CTRL_LOW;
1055 ret = pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1),
1056 &hsusb_phy_mpp);
Anji jonnalaae745e92011-11-14 18:34:31 +05301057 if (ret < 0)
1058 pr_err("%s:MPP2 un config failed\n", __func__);
1059 }
1060 return ret;
1061}
1062
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001063static int msm_hsusb_pmic_id_notif_init(void (*callback)(int online), int init)
1064{
1065 unsigned ret = -ENODEV;
1066
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301067 struct pm_gpio pmic_id_cfg = {
Anji jonnalaae745e92011-11-14 18:34:31 +05301068 .direction = PM_GPIO_DIR_IN,
1069 .pull = PM_GPIO_PULL_UP_1P5,
1070 .function = PM_GPIO_FUNC_NORMAL,
1071 .vin_sel = 2,
1072 .inv_int_pol = 0,
1073 };
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301074 struct pm_gpio pmic_id_uncfg = {
Anji jonnalaae745e92011-11-14 18:34:31 +05301075 .direction = PM_GPIO_DIR_IN,
1076 .pull = PM_GPIO_PULL_NO,
1077 .function = PM_GPIO_FUNC_NORMAL,
1078 .vin_sel = 2,
1079 .inv_int_pol = 0,
1080 };
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001081 if (!callback)
1082 return -EINVAL;
1083
1084 if (machine_is_msm8x60_fluid())
1085 return -ENOTSUPP;
1086
1087 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 2) {
1088 pr_debug("%s: USB_ID pin is not routed to PMIC"
1089 "on V1 surf/ffa\n", __func__);
1090 return -ENOTSUPP;
1091 }
1092
Manu Gautam62158eb2011-11-24 16:20:46 +05301093 if ((machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa() ||
1094 machine_is_msm8x60_ffa()) && !pmic_id_notif_supported) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001095 pr_debug("%s: USB_ID is not routed to PMIC"
1096 "on V2 ffa\n", __func__);
1097 return -ENOTSUPP;
1098 }
1099
1100 usb_phy_susp_dig_vol = 500000;
1101
1102 if (init) {
1103 notify_vbus_state_func_ptr = callback;
Manu Gautame8420ef2011-11-11 15:37:21 +05301104 INIT_DELAYED_WORK(&pmic_id_det, pmic_id_detect);
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301105 ret = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(PMIC_ID_GPIO),
1106 &pmic_id_cfg);
Anji jonnalaae745e92011-11-14 18:34:31 +05301107 if (ret) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301108 pr_err("%s:return val of pm8xxx_gpio_config: %d\n",
Anji jonnalaae745e92011-11-14 18:34:31 +05301109 __func__, ret);
1110 return ret;
1111 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001112 ret = request_threaded_irq(PMICID_INT, NULL, pmic_id_on_irq,
1113 (IRQF_TRIGGER_RISING|IRQF_TRIGGER_FALLING),
1114 "msm_otg_id", NULL);
1115 if (ret) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001116 pr_err("%s:pmic_usb_id interrupt registration failed",
1117 __func__);
1118 return ret;
1119 }
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301120 msm_otg_pdata.pmic_id_irq = PMICID_INT;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001121 } else {
Anji jonnalaae745e92011-11-14 18:34:31 +05301122 usb_phy_susp_dig_vol = 750000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001123 free_irq(PMICID_INT, 0);
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301124 ret = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(PMIC_ID_GPIO),
1125 &pmic_id_uncfg);
Anji jonnalaae745e92011-11-14 18:34:31 +05301126 if (ret) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301127 pr_err("%s: return val of pm8xxx_gpio_config: %d\n",
Anji jonnalaae745e92011-11-14 18:34:31 +05301128 __func__, ret);
1129 return ret;
1130 }
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301131 msm_otg_pdata.pmic_id_irq = 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001132 cancel_delayed_work_sync(&pmic_id_det);
1133 notify_vbus_state_func_ptr = NULL;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001134 }
1135 return 0;
1136}
1137#endif
1138
1139#define USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL 1000000
1140#define USB_PHY_MAX_VDD_DIG_VOL 1320000
1141static int msm_hsusb_init_vddcx(int init)
1142{
1143 int ret = 0;
1144
1145 if (init) {
1146 vdd_cx = regulator_get(NULL, "8058_s1");
1147 if (IS_ERR(vdd_cx)) {
1148 return PTR_ERR(vdd_cx);
1149 }
1150
1151 ret = regulator_set_voltage(vdd_cx,
1152 USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL,
1153 USB_PHY_MAX_VDD_DIG_VOL);
1154 if (ret) {
1155 pr_err("%s: unable to set the voltage for regulator"
1156 "vdd_cx\n", __func__);
1157 regulator_put(vdd_cx);
1158 return ret;
1159 }
1160
1161 ret = regulator_enable(vdd_cx);
1162 if (ret) {
1163 pr_err("%s: unable to enable regulator"
1164 "vdd_cx\n", __func__);
1165 regulator_put(vdd_cx);
1166 }
1167 } else {
1168 ret = regulator_disable(vdd_cx);
1169 if (ret) {
1170 pr_err("%s: Unable to disable the regulator:"
1171 "vdd_cx\n", __func__);
1172 return ret;
1173 }
1174
1175 regulator_put(vdd_cx);
1176 }
1177
1178 return ret;
1179}
1180
1181static int msm_hsusb_config_vddcx(int high)
1182{
1183 int max_vol = USB_PHY_MAX_VDD_DIG_VOL;
1184 int min_vol;
1185 int ret;
1186
1187 if (high)
1188 min_vol = USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL;
1189 else
1190 min_vol = usb_phy_susp_dig_vol;
1191
1192 ret = regulator_set_voltage(vdd_cx, min_vol, max_vol);
1193 if (ret) {
1194 pr_err("%s: unable to set the voltage for regulator"
1195 "vdd_cx\n", __func__);
1196 return ret;
1197 }
1198
1199 pr_debug("%s: min_vol:%d max_vol:%d\n", __func__, min_vol, max_vol);
1200
1201 return ret;
1202}
1203
1204#define USB_PHY_3P3_VOL_MIN 3050000 /* uV */
1205#define USB_PHY_3P3_VOL_MAX 3050000 /* uV */
1206#define USB_PHY_3P3_HPM_LOAD 50000 /* uA */
1207#define USB_PHY_3P3_LPM_LOAD 4000 /* uA */
1208
1209#define USB_PHY_1P8_VOL_MIN 1800000 /* uV */
1210#define USB_PHY_1P8_VOL_MAX 1800000 /* uV */
1211#define USB_PHY_1P8_HPM_LOAD 50000 /* uA */
1212#define USB_PHY_1P8_LPM_LOAD 4000 /* uA */
1213static int msm_hsusb_ldo_init(int init)
1214{
1215 int rc = 0;
1216
1217 if (init) {
1218 ldo6_3p3 = regulator_get(NULL, "8058_l6");
1219 if (IS_ERR(ldo6_3p3))
1220 return PTR_ERR(ldo6_3p3);
1221
1222 ldo7_1p8 = regulator_get(NULL, "8058_l7");
1223 if (IS_ERR(ldo7_1p8)) {
1224 rc = PTR_ERR(ldo7_1p8);
1225 goto put_3p3;
1226 }
1227
1228 rc = regulator_set_voltage(ldo6_3p3, USB_PHY_3P3_VOL_MIN,
1229 USB_PHY_3P3_VOL_MAX);
1230 if (rc) {
1231 pr_err("%s: Unable to set voltage level for"
1232 "ldo6_3p3 regulator\n", __func__);
1233 goto put_1p8;
1234 }
1235 rc = regulator_enable(ldo6_3p3);
1236 if (rc) {
1237 pr_err("%s: Unable to enable the regulator:"
1238 "ldo6_3p3\n", __func__);
1239 goto put_1p8;
1240 }
1241 rc = regulator_set_voltage(ldo7_1p8, USB_PHY_1P8_VOL_MIN,
1242 USB_PHY_1P8_VOL_MAX);
1243 if (rc) {
1244 pr_err("%s: Unable to set voltage level for"
1245 "ldo7_1p8 regulator\n", __func__);
1246 goto disable_3p3;
1247 }
1248 rc = regulator_enable(ldo7_1p8);
1249 if (rc) {
1250 pr_err("%s: Unable to enable the regulator:"
1251 "ldo7_1p8\n", __func__);
1252 goto disable_3p3;
1253 }
1254
1255 return 0;
1256 }
1257
1258 regulator_disable(ldo7_1p8);
1259disable_3p3:
1260 regulator_disable(ldo6_3p3);
1261put_1p8:
1262 regulator_put(ldo7_1p8);
1263put_3p3:
1264 regulator_put(ldo6_3p3);
1265 return rc;
1266}
1267
1268static int msm_hsusb_ldo_enable(int on)
1269{
1270 int ret = 0;
1271
1272 if (!ldo7_1p8 || IS_ERR(ldo7_1p8)) {
1273 pr_err("%s: ldo7_1p8 is not initialized\n", __func__);
1274 return -ENODEV;
1275 }
1276
1277 if (!ldo6_3p3 || IS_ERR(ldo6_3p3)) {
1278 pr_err("%s: ldo6_3p3 is not initialized\n", __func__);
1279 return -ENODEV;
1280 }
1281
1282 if (on) {
1283 ret = regulator_set_optimum_mode(ldo7_1p8,
1284 USB_PHY_1P8_HPM_LOAD);
1285 if (ret < 0) {
1286 pr_err("%s: Unable to set HPM of the regulator:"
1287 "ldo7_1p8\n", __func__);
1288 return ret;
1289 }
1290 ret = regulator_set_optimum_mode(ldo6_3p3,
1291 USB_PHY_3P3_HPM_LOAD);
1292 if (ret < 0) {
1293 pr_err("%s: Unable to set HPM of the regulator:"
1294 "ldo6_3p3\n", __func__);
1295 regulator_set_optimum_mode(ldo7_1p8,
1296 USB_PHY_1P8_LPM_LOAD);
1297 return ret;
1298 }
1299 } else {
1300 ret = regulator_set_optimum_mode(ldo7_1p8,
1301 USB_PHY_1P8_LPM_LOAD);
1302 if (ret < 0)
1303 pr_err("%s: Unable to set LPM of the regulator:"
1304 "ldo7_1p8\n", __func__);
1305 ret = regulator_set_optimum_mode(ldo6_3p3,
1306 USB_PHY_3P3_LPM_LOAD);
1307 if (ret < 0)
1308 pr_err("%s: Unable to set LPM of the regulator:"
1309 "ldo6_3p3\n", __func__);
1310 }
1311
1312 pr_debug("reg (%s)\n", on ? "HPM" : "LPM");
1313 return ret < 0 ? ret : 0;
1314 }
1315#endif
1316#ifdef CONFIG_USB_EHCI_MSM_72K
1317#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
1318static void msm_hsusb_smb137b_vbus_power(unsigned phy_info, int on)
1319{
1320 static int vbus_is_on;
1321
1322 /* If VBUS is already on (or off), do nothing. */
1323 if (on == vbus_is_on)
1324 return;
1325 smb137b_otg_power(on);
1326 vbus_is_on = on;
1327}
1328#endif
1329static void msm_hsusb_vbus_power(unsigned phy_info, int on)
1330{
1331 static struct regulator *votg_5v_switch;
1332 static struct regulator *ext_5v_reg;
1333 static int vbus_is_on;
1334
1335 /* If VBUS is already on (or off), do nothing. */
1336 if (on == vbus_is_on)
1337 return;
1338
1339 if (!votg_5v_switch) {
1340 votg_5v_switch = regulator_get(NULL, "8901_usb_otg");
1341 if (IS_ERR(votg_5v_switch)) {
1342 pr_err("%s: unable to get votg_5v_switch\n", __func__);
1343 return;
1344 }
1345 }
1346 if (!ext_5v_reg) {
1347 ext_5v_reg = regulator_get(NULL, "8901_mpp0");
1348 if (IS_ERR(ext_5v_reg)) {
1349 pr_err("%s: unable to get ext_5v_reg\n", __func__);
1350 return;
1351 }
1352 }
1353 if (on) {
1354 if (regulator_enable(ext_5v_reg)) {
1355 pr_err("%s: Unable to enable the regulator:"
1356 " ext_5v_reg\n", __func__);
1357 return;
1358 }
1359 if (regulator_enable(votg_5v_switch)) {
1360 pr_err("%s: Unable to enable the regulator:"
1361 " votg_5v_switch\n", __func__);
1362 return;
1363 }
1364 } else {
1365 if (regulator_disable(votg_5v_switch))
1366 pr_err("%s: Unable to enable the regulator:"
1367 " votg_5v_switch\n", __func__);
1368 if (regulator_disable(ext_5v_reg))
1369 pr_err("%s: Unable to enable the regulator:"
1370 " ext_5v_reg\n", __func__);
1371 }
1372
1373 vbus_is_on = on;
1374}
1375
1376static struct msm_usb_host_platform_data msm_usb_host_pdata = {
1377 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_45NM),
1378 .power_budget = 390,
1379};
1380#endif
1381
1382#ifdef CONFIG_BATTERY_MSM8X60
1383static int msm_hsusb_pmic_vbus_notif_init(void (*callback)(int online),
1384 int init)
1385{
1386 int ret = -ENOTSUPP;
1387
1388#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
1389 if (machine_is_msm8x60_fluid()) {
1390 if (init)
1391 msm_charger_register_vbus_sn(callback);
1392 else
1393 msm_charger_unregister_vbus_sn(callback);
1394 return 0;
1395 }
1396#endif
1397 /* ID and VBUS lines are connected to pmic on 8660.V2.SURF,
1398 * hence, irrespective of either peripheral only mode or
1399 * OTG (host and peripheral) modes, can depend on pmic for
1400 * vbus notifications
Steve Muckle9161d302010-02-11 11:50:40 -08001401 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001402 if ((SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2)
1403 && (machine_is_msm8x60_surf() ||
1404 pmic_id_notif_supported)) {
1405 if (init)
1406 ret = msm_charger_register_vbus_sn(callback);
1407 else {
1408 msm_charger_unregister_vbus_sn(callback);
1409 ret = 0;
1410 }
1411 } else {
1412#if !defined(CONFIG_USB_EHCI_MSM_72K)
1413 if (init)
1414 ret = msm_charger_register_vbus_sn(callback);
1415 else {
1416 msm_charger_unregister_vbus_sn(callback);
1417 ret = 0;
1418 }
1419#endif
1420 }
1421 return ret;
1422}
1423#endif
1424
1425#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_MSM_72K)
1426static struct msm_otg_platform_data msm_otg_pdata = {
1427 /* if usb link is in sps there is no need for
1428 * usb pclk as dayatona fabric clock will be
1429 * used instead
1430 */
1431 .pclk_src_name = "dfab_usb_hs_clk",
1432 .pemp_level = PRE_EMPHASIS_WITH_20_PERCENT,
1433 .cdr_autoreset = CDR_AUTO_RESET_DISABLE,
1434 .se1_gating = SE1_GATING_DISABLE,
Chandra Devireddyb3fc78c2011-08-30 17:25:55 +05301435 .bam_disable = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001436#ifdef CONFIG_USB_EHCI_MSM_72K
1437 .pmic_id_notif_init = msm_hsusb_pmic_id_notif_init,
Anji jonnalaae745e92011-11-14 18:34:31 +05301438 .phy_id_setup_init = msm_hsusb_phy_id_setup_init,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001439#endif
1440#ifdef CONFIG_USB_EHCI_MSM_72K
1441 .vbus_power = msm_hsusb_vbus_power,
1442#endif
1443#ifdef CONFIG_BATTERY_MSM8X60
1444 .pmic_vbus_notif_init = msm_hsusb_pmic_vbus_notif_init,
1445#endif
1446 .ldo_init = msm_hsusb_ldo_init,
1447 .ldo_enable = msm_hsusb_ldo_enable,
1448 .config_vddcx = msm_hsusb_config_vddcx,
1449 .init_vddcx = msm_hsusb_init_vddcx,
1450#ifdef CONFIG_BATTERY_MSM8X60
1451 .chg_vbus_draw = msm_charger_vbus_draw,
1452#endif
1453};
1454#endif
1455
1456#ifdef CONFIG_USB_GADGET_MSM_72K
1457static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = {
1458 .is_phy_status_timer_on = 1,
1459};
1460#endif
1461
1462#ifdef CONFIG_USB_G_ANDROID
1463
1464#define PID_MAGIC_ID 0x71432909
1465#define SERIAL_NUM_MAGIC_ID 0x61945374
1466#define SERIAL_NUMBER_LENGTH 127
1467#define DLOAD_USB_BASE_ADD 0x2A05F0C8
1468
1469struct magic_num_struct {
1470 uint32_t pid;
1471 uint32_t serial_num;
1472};
1473
1474struct dload_struct {
1475 uint32_t reserved1;
1476 uint32_t reserved2;
1477 uint32_t reserved3;
1478 uint16_t reserved4;
1479 uint16_t pid;
1480 char serial_number[SERIAL_NUMBER_LENGTH];
1481 uint16_t reserved5;
1482 struct magic_num_struct
1483 magic_struct;
1484};
1485
1486static int usb_diag_update_pid_and_serial_num(uint32_t pid, const char *snum)
1487{
1488 struct dload_struct __iomem *dload = 0;
1489
1490 dload = ioremap(DLOAD_USB_BASE_ADD, sizeof(*dload));
1491 if (!dload) {
1492 pr_err("%s: cannot remap I/O memory region: %08x\n",
1493 __func__, DLOAD_USB_BASE_ADD);
1494 return -ENXIO;
1495 }
1496
1497 pr_debug("%s: dload:%p pid:%x serial_num:%s\n",
1498 __func__, dload, pid, snum);
1499 /* update pid */
1500 dload->magic_struct.pid = PID_MAGIC_ID;
1501 dload->pid = pid;
1502
1503 /* update serial number */
1504 dload->magic_struct.serial_num = 0;
1505 if (!snum)
1506 return 0;
1507
1508 dload->magic_struct.serial_num = SERIAL_NUM_MAGIC_ID;
1509 strncpy(dload->serial_number, snum, SERIAL_NUMBER_LENGTH);
1510 dload->serial_number[SERIAL_NUMBER_LENGTH - 1] = '\0';
1511
1512 iounmap(dload);
1513
1514 return 0;
1515}
1516
1517static struct android_usb_platform_data android_usb_pdata = {
1518 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
1519};
1520
1521static struct platform_device android_usb_device = {
1522 .name = "android_usb",
1523 .id = -1,
1524 .dev = {
1525 .platform_data = &android_usb_pdata,
1526 },
1527};
1528
1529
1530#endif
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08001531
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001532#ifdef CONFIG_MSM_VPE
1533static struct resource msm_vpe_resources[] = {
1534 {
1535 .start = 0x05300000,
1536 .end = 0x05300000 + SZ_1M - 1,
1537 .flags = IORESOURCE_MEM,
1538 },
1539 {
1540 .start = INT_VPE,
1541 .end = INT_VPE,
1542 .flags = IORESOURCE_IRQ,
1543 },
1544};
1545
1546static struct platform_device msm_vpe_device = {
1547 .name = "msm_vpe",
1548 .id = 0,
1549 .num_resources = ARRAY_SIZE(msm_vpe_resources),
1550 .resource = msm_vpe_resources,
1551};
1552#endif
1553
1554#ifdef CONFIG_MSM_CAMERA
1555#ifdef CONFIG_MSM_CAMERA_FLASH
1556#define VFE_CAMIF_TIMER1_GPIO 29
1557#define VFE_CAMIF_TIMER2_GPIO 30
1558#define VFE_CAMIF_TIMER3_GPIO_INT 31
1559#define FUSION_VFE_CAMIF_TIMER1_GPIO 42
1560static struct msm_camera_sensor_flash_src msm_flash_src = {
1561 .flash_sr_type = MSM_CAMERA_FLASH_SRC_PMIC,
1562 ._fsrc.pmic_src.num_of_src = 2,
1563 ._fsrc.pmic_src.low_current = 100,
1564 ._fsrc.pmic_src.high_current = 300,
1565 ._fsrc.pmic_src.led_src_1 = PMIC8058_ID_FLASH_LED_0,
1566 ._fsrc.pmic_src.led_src_2 = PMIC8058_ID_FLASH_LED_1,
1567 ._fsrc.pmic_src.pmic_set_current = pm8058_set_flash_led_current,
1568};
1569#ifdef CONFIG_IMX074
1570static struct msm_camera_sensor_strobe_flash_data strobe_flash_xenon = {
1571 .flash_trigger = VFE_CAMIF_TIMER2_GPIO,
1572 .flash_charge = VFE_CAMIF_TIMER1_GPIO,
1573 .flash_charge_done = VFE_CAMIF_TIMER3_GPIO_INT,
1574 .flash_recharge_duration = 50000,
1575 .irq = MSM_GPIO_TO_INT(VFE_CAMIF_TIMER3_GPIO_INT),
1576};
1577#endif
1578#endif
1579
1580int msm_cam_gpio_tbl[] = {
1581 32,/*CAMIF_MCLK*/
1582 47,/*CAMIF_I2C_DATA*/
1583 48,/*CAMIF_I2C_CLK*/
1584 105,/*STANDBY*/
1585};
1586
1587enum msm_cam_stat{
1588 MSM_CAM_OFF,
1589 MSM_CAM_ON,
1590};
1591
1592static int config_gpio_table(enum msm_cam_stat stat)
1593{
1594 int rc = 0, i = 0;
1595 if (stat == MSM_CAM_ON) {
1596 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++) {
1597 rc = gpio_request(msm_cam_gpio_tbl[i], "CAM_GPIO");
1598 if (unlikely(rc < 0)) {
1599 pr_err("%s not able to get gpio\n", __func__);
1600 for (i--; i >= 0; i--)
1601 gpio_free(msm_cam_gpio_tbl[i]);
1602 break;
1603 }
1604 }
1605 } else {
1606 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++)
1607 gpio_free(msm_cam_gpio_tbl[i]);
1608 }
1609 return rc;
1610}
1611
1612static struct msm_camera_sensor_platform_info sensor_board_info = {
1613 .mount_angle = 0
1614};
1615
1616/*external regulator VREG_5V*/
1617static struct regulator *reg_flash_5V;
1618
1619static int config_camera_on_gpios_fluid(void)
1620{
1621 int rc = 0;
1622
1623 reg_flash_5V = regulator_get(NULL, "8901_mpp0");
1624 if (IS_ERR(reg_flash_5V)) {
1625 pr_err("'%s' regulator not found, rc=%ld\n",
1626 "8901_mpp0", IS_ERR(reg_flash_5V));
1627 return -ENODEV;
1628 }
1629
1630 rc = regulator_enable(reg_flash_5V);
1631 if (rc) {
1632 pr_err("'%s' regulator enable failed, rc=%d\n",
1633 "8901_mpp0", rc);
1634 regulator_put(reg_flash_5V);
1635 return rc;
1636 }
1637
1638#ifdef CONFIG_IMX074
1639 sensor_board_info.mount_angle = 90;
1640#endif
1641 rc = config_gpio_table(MSM_CAM_ON);
1642 if (rc < 0) {
1643 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1644 "failed\n", __func__);
1645 return rc;
1646 }
1647
1648 rc = gpio_request(GPIO_EXT_CAMIF_PWR_EN, "CAM_EN");
1649 if (rc < 0) {
1650 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1651 "failed\n", __func__, GPIO_EXT_CAMIF_PWR_EN);
1652 regulator_disable(reg_flash_5V);
1653 regulator_put(reg_flash_5V);
1654 return rc;
1655 }
1656 gpio_direction_output(GPIO_EXT_CAMIF_PWR_EN, 0);
1657 msleep(20);
1658 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 1);
1659
1660
1661 /*Enable LED_FLASH_EN*/
1662 rc = gpio_request(GPIO_LED_FLASH_EN, "LED_FLASH_EN");
1663 if (rc < 0) {
1664 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1665 "failed\n", __func__, GPIO_LED_FLASH_EN);
1666
1667 regulator_disable(reg_flash_5V);
1668 regulator_put(reg_flash_5V);
1669 config_gpio_table(MSM_CAM_OFF);
1670 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1671 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1672 return rc;
1673 }
1674 gpio_direction_output(GPIO_LED_FLASH_EN, 1);
1675 msleep(20);
1676 return rc;
1677}
1678
1679
1680static void config_camera_off_gpios_fluid(void)
1681{
1682 regulator_disable(reg_flash_5V);
1683 regulator_put(reg_flash_5V);
1684
1685 gpio_direction_output(GPIO_LED_FLASH_EN, 0);
1686 gpio_free(GPIO_LED_FLASH_EN);
1687
1688 config_gpio_table(MSM_CAM_OFF);
1689
1690 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1691 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1692}
1693static int config_camera_on_gpios(void)
1694{
1695 int rc = 0;
1696
1697 if (machine_is_msm8x60_fluid())
1698 return config_camera_on_gpios_fluid();
1699
1700 rc = config_gpio_table(MSM_CAM_ON);
1701 if (rc < 0) {
1702 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1703 "failed\n", __func__);
1704 return rc;
1705 }
1706
Jilai Wang971f97f2011-07-13 14:25:25 -04001707 if (!machine_is_msm8x60_dragon()) {
1708 rc = gpio_request(GPIO_EXT_CAMIF_PWR_EN, "CAM_EN");
1709 if (rc < 0) {
1710 config_gpio_table(MSM_CAM_OFF);
1711 pr_err("%s: CAMSENSOR gpio %d request"
1712 "failed\n", __func__, GPIO_EXT_CAMIF_PWR_EN);
1713 return rc;
1714 }
1715 gpio_direction_output(GPIO_EXT_CAMIF_PWR_EN, 0);
1716 msleep(20);
1717 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001718 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001719
1720#ifdef CONFIG_MSM_CAMERA_FLASH
1721#ifdef CONFIG_IMX074
1722 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
1723 strobe_flash_xenon.flash_charge = FUSION_VFE_CAMIF_TIMER1_GPIO;
1724#endif
1725#endif
1726 return rc;
1727}
1728
1729static void config_camera_off_gpios(void)
1730{
1731 if (machine_is_msm8x60_fluid())
1732 return config_camera_off_gpios_fluid();
1733
1734
1735 config_gpio_table(MSM_CAM_OFF);
1736
Jilai Wang971f97f2011-07-13 14:25:25 -04001737 if (!machine_is_msm8x60_dragon()) {
1738 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1739 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1740 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001741}
1742
1743#ifdef CONFIG_QS_S5K4E1
1744
1745#define QS_CAM_HC37_CAM_PD PM8058_GPIO_PM_TO_SYS(26)
1746
1747static int config_camera_on_gpios_qs_cam_fluid(void)
1748{
1749 int rc = 0;
1750
1751 /* request QS_CAM_HC37_CAM_PD as an output to HC37 ASIC pin CAM_PD */
1752 rc = gpio_request(QS_CAM_HC37_CAM_PD, "QS_CAM_HC37_CAM_PD");
1753 if (rc < 0) {
1754 printk(KERN_ERR "%s: QS_CAM_HC37_CAM_PD gpio %d request"
1755 " failed\n", __func__, QS_CAM_HC37_CAM_PD);
1756 return rc;
1757 }
1758 gpio_direction_output(QS_CAM_HC37_CAM_PD, 0);
1759 msleep(20);
1760 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 1);
1761 msleep(20);
1762
1763 /*
1764 * Set GPIO_AUX_CAM_2P7_EN to 1 on North Expander IO2
1765 * to enable 2.7V power to Camera
1766 */
1767 rc = gpio_request(GPIO_AUX_CAM_2P7_EN, "CAM_2P7_EN");
1768 if (rc < 0) {
1769 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1770 " failed\n", __func__, GPIO_AUX_CAM_2P7_EN);
1771 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1772 gpio_free(QS_CAM_HC37_CAM_PD);
1773 return rc;
1774 }
1775 gpio_direction_output(GPIO_AUX_CAM_2P7_EN, 0);
1776 msleep(20);
1777 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 1);
1778 msleep(20);
1779
1780 rc = config_camera_on_gpios_fluid();
1781 if (rc < 0) {
1782 printk(KERN_ERR "%s: config_camera_on_gpios_fluid"
1783 " failed\n", __func__);
1784 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1785 gpio_free(QS_CAM_HC37_CAM_PD);
1786 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 0);
1787 gpio_free(GPIO_AUX_CAM_2P7_EN);
1788 return rc;
1789 }
1790 return rc;
1791}
1792
1793static void config_camera_off_gpios_qs_cam_fluid(void)
1794{
1795 /*
1796 * Set GPIO_AUX_CAM_2P7_EN to 0 on North Expander IO2
1797 * to disable 2.7V power to Camera
1798 */
1799 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 0);
1800 gpio_free(GPIO_AUX_CAM_2P7_EN);
1801
1802 /* set QS_CAM_HC37_CAM_PD to 0 to power off HC37 ASIC*/
1803 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1804 gpio_free(QS_CAM_HC37_CAM_PD);
1805
1806 config_camera_off_gpios_fluid();
1807 return;
1808}
1809
1810static int config_camera_on_gpios_qs_cam(void)
1811{
1812 int rc = 0;
1813
1814 if (machine_is_msm8x60_fluid())
1815 return config_camera_on_gpios_qs_cam_fluid();
1816
1817 rc = config_camera_on_gpios();
1818 return rc;
1819}
1820
1821static void config_camera_off_gpios_qs_cam(void)
1822{
1823 if (machine_is_msm8x60_fluid())
1824 return config_camera_off_gpios_qs_cam_fluid();
1825
1826 config_camera_off_gpios();
1827 return;
1828}
1829#endif
1830
1831static int config_camera_on_gpios_web_cam(void)
1832{
1833 int rc = 0;
1834 rc = config_gpio_table(MSM_CAM_ON);
1835 if (rc < 0) {
1836 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1837 "failed\n", __func__);
1838 return rc;
1839 }
1840
Jilai Wang53d27a82011-07-13 14:32:58 -04001841 if (!(machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon())) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001842 rc = gpio_request(GPIO_WEB_CAMIF_STANDBY, "CAM_EN");
1843 if (rc < 0) {
1844 config_gpio_table(MSM_CAM_OFF);
1845 pr_err(KERN_ERR "%s: CAMSENSOR gpio %d request"
1846 "failed\n", __func__, GPIO_WEB_CAMIF_STANDBY);
1847 return rc;
1848 }
1849 gpio_direction_output(GPIO_WEB_CAMIF_STANDBY, 0);
1850 }
1851 return rc;
1852}
1853
1854static void config_camera_off_gpios_web_cam(void)
1855{
1856 config_gpio_table(MSM_CAM_OFF);
Jilai Wang53d27a82011-07-13 14:32:58 -04001857 if (!(machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon())) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001858 gpio_set_value_cansleep(GPIO_WEB_CAMIF_STANDBY, 1);
1859 gpio_free(GPIO_WEB_CAMIF_STANDBY);
1860 }
1861 return;
1862}
1863
1864#ifdef CONFIG_MSM_BUS_SCALING
1865static struct msm_bus_vectors cam_init_vectors[] = {
1866 {
1867 .src = MSM_BUS_MASTER_VFE,
1868 .dst = MSM_BUS_SLAVE_SMI,
1869 .ab = 0,
1870 .ib = 0,
1871 },
1872 {
1873 .src = MSM_BUS_MASTER_VFE,
1874 .dst = MSM_BUS_SLAVE_EBI_CH0,
1875 .ab = 0,
1876 .ib = 0,
1877 },
1878 {
1879 .src = MSM_BUS_MASTER_VPE,
1880 .dst = MSM_BUS_SLAVE_SMI,
1881 .ab = 0,
1882 .ib = 0,
1883 },
1884 {
1885 .src = MSM_BUS_MASTER_VPE,
1886 .dst = MSM_BUS_SLAVE_EBI_CH0,
1887 .ab = 0,
1888 .ib = 0,
1889 },
1890 {
1891 .src = MSM_BUS_MASTER_JPEG_ENC,
1892 .dst = MSM_BUS_SLAVE_SMI,
1893 .ab = 0,
1894 .ib = 0,
1895 },
1896 {
1897 .src = MSM_BUS_MASTER_JPEG_ENC,
1898 .dst = MSM_BUS_SLAVE_EBI_CH0,
1899 .ab = 0,
1900 .ib = 0,
1901 },
1902};
1903
1904static struct msm_bus_vectors cam_preview_vectors[] = {
1905 {
1906 .src = MSM_BUS_MASTER_VFE,
1907 .dst = MSM_BUS_SLAVE_SMI,
1908 .ab = 0,
1909 .ib = 0,
1910 },
1911 {
1912 .src = MSM_BUS_MASTER_VFE,
1913 .dst = MSM_BUS_SLAVE_EBI_CH0,
1914 .ab = 283115520,
1915 .ib = 452984832,
1916 },
1917 {
1918 .src = MSM_BUS_MASTER_VPE,
1919 .dst = MSM_BUS_SLAVE_SMI,
1920 .ab = 0,
1921 .ib = 0,
1922 },
1923 {
1924 .src = MSM_BUS_MASTER_VPE,
1925 .dst = MSM_BUS_SLAVE_EBI_CH0,
1926 .ab = 0,
1927 .ib = 0,
1928 },
1929 {
1930 .src = MSM_BUS_MASTER_JPEG_ENC,
1931 .dst = MSM_BUS_SLAVE_SMI,
1932 .ab = 0,
1933 .ib = 0,
1934 },
1935 {
1936 .src = MSM_BUS_MASTER_JPEG_ENC,
1937 .dst = MSM_BUS_SLAVE_EBI_CH0,
1938 .ab = 0,
1939 .ib = 0,
1940 },
1941};
1942
1943static struct msm_bus_vectors cam_video_vectors[] = {
1944 {
1945 .src = MSM_BUS_MASTER_VFE,
1946 .dst = MSM_BUS_SLAVE_SMI,
1947 .ab = 283115520,
1948 .ib = 452984832,
1949 },
1950 {
1951 .src = MSM_BUS_MASTER_VFE,
1952 .dst = MSM_BUS_SLAVE_EBI_CH0,
1953 .ab = 283115520,
1954 .ib = 452984832,
1955 },
1956 {
1957 .src = MSM_BUS_MASTER_VPE,
1958 .dst = MSM_BUS_SLAVE_SMI,
1959 .ab = 319610880,
1960 .ib = 511377408,
1961 },
1962 {
1963 .src = MSM_BUS_MASTER_VPE,
1964 .dst = MSM_BUS_SLAVE_EBI_CH0,
1965 .ab = 0,
1966 .ib = 0,
1967 },
1968 {
1969 .src = MSM_BUS_MASTER_JPEG_ENC,
1970 .dst = MSM_BUS_SLAVE_SMI,
1971 .ab = 0,
1972 .ib = 0,
1973 },
1974 {
1975 .src = MSM_BUS_MASTER_JPEG_ENC,
1976 .dst = MSM_BUS_SLAVE_EBI_CH0,
1977 .ab = 0,
1978 .ib = 0,
1979 },
1980};
1981
1982static struct msm_bus_vectors cam_snapshot_vectors[] = {
1983 {
1984 .src = MSM_BUS_MASTER_VFE,
1985 .dst = MSM_BUS_SLAVE_SMI,
1986 .ab = 566231040,
1987 .ib = 905969664,
1988 },
1989 {
1990 .src = MSM_BUS_MASTER_VFE,
1991 .dst = MSM_BUS_SLAVE_EBI_CH0,
1992 .ab = 69984000,
1993 .ib = 111974400,
1994 },
1995 {
1996 .src = MSM_BUS_MASTER_VPE,
1997 .dst = MSM_BUS_SLAVE_SMI,
1998 .ab = 0,
1999 .ib = 0,
2000 },
2001 {
2002 .src = MSM_BUS_MASTER_VPE,
2003 .dst = MSM_BUS_SLAVE_EBI_CH0,
2004 .ab = 0,
2005 .ib = 0,
2006 },
2007 {
2008 .src = MSM_BUS_MASTER_JPEG_ENC,
2009 .dst = MSM_BUS_SLAVE_SMI,
2010 .ab = 320864256,
2011 .ib = 513382810,
2012 },
2013 {
2014 .src = MSM_BUS_MASTER_JPEG_ENC,
2015 .dst = MSM_BUS_SLAVE_EBI_CH0,
2016 .ab = 320864256,
2017 .ib = 513382810,
2018 },
2019};
2020
2021static struct msm_bus_vectors cam_zsl_vectors[] = {
2022 {
2023 .src = MSM_BUS_MASTER_VFE,
2024 .dst = MSM_BUS_SLAVE_SMI,
2025 .ab = 566231040,
2026 .ib = 905969664,
2027 },
2028 {
2029 .src = MSM_BUS_MASTER_VFE,
2030 .dst = MSM_BUS_SLAVE_EBI_CH0,
2031 .ab = 706199040,
2032 .ib = 1129918464,
2033 },
2034 {
2035 .src = MSM_BUS_MASTER_VPE,
2036 .dst = MSM_BUS_SLAVE_SMI,
2037 .ab = 0,
2038 .ib = 0,
2039 },
2040 {
2041 .src = MSM_BUS_MASTER_VPE,
2042 .dst = MSM_BUS_SLAVE_EBI_CH0,
2043 .ab = 0,
2044 .ib = 0,
2045 },
2046 {
2047 .src = MSM_BUS_MASTER_JPEG_ENC,
2048 .dst = MSM_BUS_SLAVE_SMI,
2049 .ab = 320864256,
2050 .ib = 513382810,
2051 },
2052 {
2053 .src = MSM_BUS_MASTER_JPEG_ENC,
2054 .dst = MSM_BUS_SLAVE_EBI_CH0,
2055 .ab = 320864256,
2056 .ib = 513382810,
2057 },
2058};
2059
2060static struct msm_bus_vectors cam_stereo_video_vectors[] = {
2061 {
2062 .src = MSM_BUS_MASTER_VFE,
2063 .dst = MSM_BUS_SLAVE_SMI,
2064 .ab = 212336640,
2065 .ib = 339738624,
2066 },
2067 {
2068 .src = MSM_BUS_MASTER_VFE,
2069 .dst = MSM_BUS_SLAVE_EBI_CH0,
2070 .ab = 25090560,
2071 .ib = 40144896,
2072 },
2073 {
2074 .src = MSM_BUS_MASTER_VPE,
2075 .dst = MSM_BUS_SLAVE_SMI,
2076 .ab = 239708160,
2077 .ib = 383533056,
2078 },
2079 {
2080 .src = MSM_BUS_MASTER_VPE,
2081 .dst = MSM_BUS_SLAVE_EBI_CH0,
2082 .ab = 79902720,
2083 .ib = 127844352,
2084 },
2085 {
2086 .src = MSM_BUS_MASTER_JPEG_ENC,
2087 .dst = MSM_BUS_SLAVE_SMI,
2088 .ab = 0,
2089 .ib = 0,
2090 },
2091 {
2092 .src = MSM_BUS_MASTER_JPEG_ENC,
2093 .dst = MSM_BUS_SLAVE_EBI_CH0,
2094 .ab = 0,
2095 .ib = 0,
2096 },
2097};
2098
2099static struct msm_bus_vectors cam_stereo_snapshot_vectors[] = {
2100 {
2101 .src = MSM_BUS_MASTER_VFE,
2102 .dst = MSM_BUS_SLAVE_SMI,
2103 .ab = 0,
2104 .ib = 0,
2105 },
2106 {
2107 .src = MSM_BUS_MASTER_VFE,
2108 .dst = MSM_BUS_SLAVE_EBI_CH0,
2109 .ab = 300902400,
2110 .ib = 481443840,
2111 },
2112 {
2113 .src = MSM_BUS_MASTER_VPE,
2114 .dst = MSM_BUS_SLAVE_SMI,
2115 .ab = 230307840,
2116 .ib = 368492544,
2117 },
2118 {
2119 .src = MSM_BUS_MASTER_VPE,
2120 .dst = MSM_BUS_SLAVE_EBI_CH0,
2121 .ab = 245113344,
2122 .ib = 392181351,
2123 },
2124 {
2125 .src = MSM_BUS_MASTER_JPEG_ENC,
2126 .dst = MSM_BUS_SLAVE_SMI,
2127 .ab = 106536960,
2128 .ib = 170459136,
2129 },
2130 {
2131 .src = MSM_BUS_MASTER_JPEG_ENC,
2132 .dst = MSM_BUS_SLAVE_EBI_CH0,
2133 .ab = 106536960,
2134 .ib = 170459136,
2135 },
2136};
2137
2138static struct msm_bus_paths cam_bus_client_config[] = {
2139 {
2140 ARRAY_SIZE(cam_init_vectors),
2141 cam_init_vectors,
2142 },
2143 {
2144 ARRAY_SIZE(cam_preview_vectors),
2145 cam_preview_vectors,
2146 },
2147 {
2148 ARRAY_SIZE(cam_video_vectors),
2149 cam_video_vectors,
2150 },
2151 {
2152 ARRAY_SIZE(cam_snapshot_vectors),
2153 cam_snapshot_vectors,
2154 },
2155 {
2156 ARRAY_SIZE(cam_zsl_vectors),
2157 cam_zsl_vectors,
2158 },
2159 {
2160 ARRAY_SIZE(cam_stereo_video_vectors),
2161 cam_stereo_video_vectors,
2162 },
2163 {
2164 ARRAY_SIZE(cam_stereo_snapshot_vectors),
2165 cam_stereo_snapshot_vectors,
2166 },
2167};
2168
2169static struct msm_bus_scale_pdata cam_bus_client_pdata = {
2170 cam_bus_client_config,
2171 ARRAY_SIZE(cam_bus_client_config),
2172 .name = "msm_camera",
2173};
2174#endif
2175
2176struct msm_camera_device_platform_data msm_camera_device_data = {
2177 .camera_gpio_on = config_camera_on_gpios,
2178 .camera_gpio_off = config_camera_off_gpios,
2179 .ioext.csiphy = 0x04800000,
2180 .ioext.csisz = 0x00000400,
2181 .ioext.csiirq = CSI_0_IRQ,
2182 .ioclk.mclk_clk_rate = 24000000,
2183 .ioclk.vfe_clk_rate = 228570000,
2184#ifdef CONFIG_MSM_BUS_SCALING
2185 .cam_bus_scale_table = &cam_bus_client_pdata,
2186#endif
2187};
2188
2189#ifdef CONFIG_QS_S5K4E1
2190struct msm_camera_device_platform_data msm_camera_device_data_qs_cam = {
2191 .camera_gpio_on = config_camera_on_gpios_qs_cam,
2192 .camera_gpio_off = config_camera_off_gpios_qs_cam,
2193 .ioext.csiphy = 0x04800000,
2194 .ioext.csisz = 0x00000400,
2195 .ioext.csiirq = CSI_0_IRQ,
2196 .ioclk.mclk_clk_rate = 24000000,
2197 .ioclk.vfe_clk_rate = 228570000,
2198#ifdef CONFIG_MSM_BUS_SCALING
2199 .cam_bus_scale_table = &cam_bus_client_pdata,
2200#endif
2201};
2202#endif
2203
2204struct msm_camera_device_platform_data msm_camera_device_data_web_cam = {
2205 .camera_gpio_on = config_camera_on_gpios_web_cam,
2206 .camera_gpio_off = config_camera_off_gpios_web_cam,
2207 .ioext.csiphy = 0x04900000,
2208 .ioext.csisz = 0x00000400,
2209 .ioext.csiirq = CSI_1_IRQ,
2210 .ioclk.mclk_clk_rate = 24000000,
2211 .ioclk.vfe_clk_rate = 228570000,
2212#ifdef CONFIG_MSM_BUS_SCALING
2213 .cam_bus_scale_table = &cam_bus_client_pdata,
2214#endif
2215};
2216
2217struct resource msm_camera_resources[] = {
2218 {
2219 .start = 0x04500000,
2220 .end = 0x04500000 + SZ_1M - 1,
2221 .flags = IORESOURCE_MEM,
2222 },
2223 {
2224 .start = VFE_IRQ,
2225 .end = VFE_IRQ,
2226 .flags = IORESOURCE_IRQ,
2227 },
2228};
2229#ifdef CONFIG_MT9E013
2230static struct msm_camera_sensor_platform_info mt9e013_sensor_8660_info = {
2231 .mount_angle = 0
2232};
2233
2234static struct msm_camera_sensor_flash_data flash_mt9e013 = {
2235 .flash_type = MSM_CAMERA_FLASH_LED,
2236 .flash_src = &msm_flash_src
2237};
2238
2239static struct msm_camera_sensor_info msm_camera_sensor_mt9e013_data = {
2240 .sensor_name = "mt9e013",
2241 .sensor_reset = 106,
2242 .sensor_pwd = 85,
2243 .vcm_pwd = 1,
2244 .vcm_enable = 0,
2245 .pdata = &msm_camera_device_data,
2246 .resource = msm_camera_resources,
2247 .num_resources = ARRAY_SIZE(msm_camera_resources),
2248 .flash_data = &flash_mt9e013,
2249 .strobe_flash_data = &strobe_flash_xenon,
2250 .sensor_platform_info = &mt9e013_sensor_8660_info,
2251 .csi_if = 1
2252};
2253struct platform_device msm_camera_sensor_mt9e013 = {
2254 .name = "msm_camera_mt9e013",
2255 .dev = {
2256 .platform_data = &msm_camera_sensor_mt9e013_data,
2257 },
2258};
2259#endif
2260
2261#ifdef CONFIG_IMX074
Roja Rani Yarubandi68ebb4d2011-10-20 10:33:16 +05302262static struct msm_camera_sensor_platform_info imx074_sensor_board_info = {
2263 .mount_angle = 180
2264};
2265
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002266static struct msm_camera_sensor_flash_data flash_imx074 = {
2267 .flash_type = MSM_CAMERA_FLASH_LED,
2268 .flash_src = &msm_flash_src
2269};
2270
2271static struct msm_camera_sensor_info msm_camera_sensor_imx074_data = {
2272 .sensor_name = "imx074",
2273 .sensor_reset = 106,
2274 .sensor_pwd = 85,
2275 .vcm_pwd = GPIO_AUX_CAM_2P7_EN,
2276 .vcm_enable = 1,
2277 .pdata = &msm_camera_device_data,
2278 .resource = msm_camera_resources,
2279 .num_resources = ARRAY_SIZE(msm_camera_resources),
2280 .flash_data = &flash_imx074,
2281 .strobe_flash_data = &strobe_flash_xenon,
Roja Rani Yarubandi68ebb4d2011-10-20 10:33:16 +05302282 .sensor_platform_info = &imx074_sensor_board_info,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002283 .csi_if = 1
2284};
2285struct platform_device msm_camera_sensor_imx074 = {
2286 .name = "msm_camera_imx074",
2287 .dev = {
2288 .platform_data = &msm_camera_sensor_imx074_data,
2289 },
2290};
2291#endif
2292#ifdef CONFIG_WEBCAM_OV9726
2293
2294static struct msm_camera_sensor_platform_info ov9726_sensor_8660_info = {
2295 .mount_angle = 0
2296};
2297
2298static struct msm_camera_sensor_flash_data flash_ov9726 = {
2299 .flash_type = MSM_CAMERA_FLASH_LED,
2300 .flash_src = &msm_flash_src
2301};
2302static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data = {
2303 .sensor_name = "ov9726",
Kevin Chan3382c512011-07-19 21:00:45 -07002304 .sensor_reset_enable = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002305 .sensor_reset = GPIO_FRONT_CAM_RESET_N,
2306 .sensor_pwd = 85,
2307 .vcm_pwd = 1,
2308 .vcm_enable = 0,
2309 .pdata = &msm_camera_device_data_web_cam,
2310 .resource = msm_camera_resources,
2311 .num_resources = ARRAY_SIZE(msm_camera_resources),
2312 .flash_data = &flash_ov9726,
2313 .sensor_platform_info = &ov9726_sensor_8660_info,
2314 .csi_if = 1
2315};
2316struct platform_device msm_camera_sensor_webcam_ov9726 = {
2317 .name = "msm_camera_ov9726",
2318 .dev = {
2319 .platform_data = &msm_camera_sensor_ov9726_data,
2320 },
2321};
2322#endif
2323#ifdef CONFIG_WEBCAM_OV7692
2324static struct msm_camera_sensor_flash_data flash_ov7692 = {
2325 .flash_type = MSM_CAMERA_FLASH_LED,
2326 .flash_src = &msm_flash_src
2327};
2328static struct msm_camera_sensor_info msm_camera_sensor_ov7692_data = {
2329 .sensor_name = "ov7692",
2330 .sensor_reset = GPIO_WEB_CAMIF_RESET_N,
2331 .sensor_pwd = 85,
2332 .vcm_pwd = 1,
2333 .vcm_enable = 0,
2334 .pdata = &msm_camera_device_data_web_cam,
2335 .resource = msm_camera_resources,
2336 .num_resources = ARRAY_SIZE(msm_camera_resources),
2337 .flash_data = &flash_ov7692,
2338 .csi_if = 1
2339};
2340
2341static struct platform_device msm_camera_sensor_webcam_ov7692 = {
2342 .name = "msm_camera_ov7692",
2343 .dev = {
2344 .platform_data = &msm_camera_sensor_ov7692_data,
2345 },
2346};
2347#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04002348#ifdef CONFIG_VX6953
2349static struct msm_camera_sensor_platform_info vx6953_sensor_8660_info = {
2350 .mount_angle = 270
2351};
2352
2353static struct msm_camera_sensor_flash_data flash_vx6953 = {
2354 .flash_type = MSM_CAMERA_FLASH_NONE,
2355 .flash_src = &msm_flash_src
2356};
2357
2358static struct msm_camera_sensor_info msm_camera_sensor_vx6953_data = {
2359 .sensor_name = "vx6953",
2360 .sensor_reset = 63,
2361 .sensor_pwd = 63,
2362 .vcm_pwd = GPIO_AUX_CAM_2P7_EN,
2363 .vcm_enable = 1,
2364 .pdata = &msm_camera_device_data,
2365 .resource = msm_camera_resources,
2366 .num_resources = ARRAY_SIZE(msm_camera_resources),
2367 .flash_data = &flash_vx6953,
2368 .sensor_platform_info = &vx6953_sensor_8660_info,
2369 .csi_if = 1
2370};
2371struct platform_device msm_camera_sensor_vx6953 = {
2372 .name = "msm_camera_vx6953",
2373 .dev = {
2374 .platform_data = &msm_camera_sensor_vx6953_data,
2375 },
2376};
2377#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002378#ifdef CONFIG_QS_S5K4E1
2379
Nishant Pandit613ab7a2011-09-02 03:36:01 +05302380static struct msm_camera_sensor_platform_info qs_s5k4e1_sensor_8660_info = {
2381#ifdef CONFIG_FB_MSM_MIPI_NOVATEK_CMD_QHD_PT
2382 .mount_angle = 90
2383#else
2384 .mount_angle = 0
2385#endif
2386};
2387
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002388static char eeprom_data[864];
2389static struct msm_camera_sensor_flash_data flash_qs_s5k4e1 = {
2390 .flash_type = MSM_CAMERA_FLASH_LED,
2391 .flash_src = &msm_flash_src
2392};
2393
2394static struct msm_camera_sensor_info msm_camera_sensor_qs_s5k4e1_data = {
2395 .sensor_name = "qs_s5k4e1",
2396 .sensor_reset = 106,
2397 .sensor_pwd = 85,
2398 .vcm_pwd = 1,
2399 .vcm_enable = 0,
2400 .pdata = &msm_camera_device_data_qs_cam,
2401 .resource = msm_camera_resources,
2402 .num_resources = ARRAY_SIZE(msm_camera_resources),
2403 .flash_data = &flash_qs_s5k4e1,
2404 .strobe_flash_data = &strobe_flash_xenon,
Nishant Pandit613ab7a2011-09-02 03:36:01 +05302405 .sensor_platform_info = &qs_s5k4e1_sensor_8660_info,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002406 .csi_if = 1,
2407 .eeprom_data = eeprom_data,
2408};
2409struct platform_device msm_camera_sensor_qs_s5k4e1 = {
2410 .name = "msm_camera_qs_s5k4e1",
2411 .dev = {
2412 .platform_data = &msm_camera_sensor_qs_s5k4e1_data,
2413 },
2414};
2415#endif
2416static struct i2c_board_info msm_camera_boardinfo[] __initdata = {
2417 #ifdef CONFIG_MT9E013
2418 {
2419 I2C_BOARD_INFO("mt9e013", 0x6C >> 2),
2420 },
2421 #endif
2422 #ifdef CONFIG_IMX074
2423 {
2424 I2C_BOARD_INFO("imx074", 0x1A),
2425 },
2426 #endif
2427 #ifdef CONFIG_WEBCAM_OV7692
2428 {
2429 I2C_BOARD_INFO("ov7692", 0x78),
2430 },
2431 #endif
2432 #ifdef CONFIG_WEBCAM_OV9726
2433 {
2434 I2C_BOARD_INFO("ov9726", 0x10),
2435 },
2436 #endif
2437 #ifdef CONFIG_QS_S5K4E1
2438 {
2439 I2C_BOARD_INFO("qs_s5k4e1", 0x20),
2440 },
2441 #endif
2442};
Jilai Wang971f97f2011-07-13 14:25:25 -04002443
2444static struct i2c_board_info msm_camera_dragon_boardinfo[] __initdata = {
Jilai Wang53d27a82011-07-13 14:32:58 -04002445 #ifdef CONFIG_WEBCAM_OV9726
2446 {
2447 I2C_BOARD_INFO("ov9726", 0x10),
2448 },
2449 #endif
Jilai Wang971f97f2011-07-13 14:25:25 -04002450 #ifdef CONFIG_VX6953
2451 {
2452 I2C_BOARD_INFO("vx6953", 0x20),
2453 },
2454 #endif
2455};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002456#endif
2457
2458#ifdef CONFIG_MSM_GEMINI
2459static struct resource msm_gemini_resources[] = {
2460 {
2461 .start = 0x04600000,
2462 .end = 0x04600000 + SZ_1M - 1,
2463 .flags = IORESOURCE_MEM,
2464 },
2465 {
2466 .start = INT_JPEG,
2467 .end = INT_JPEG,
2468 .flags = IORESOURCE_IRQ,
2469 },
2470};
2471
2472static struct platform_device msm_gemini_device = {
2473 .name = "msm_gemini",
2474 .resource = msm_gemini_resources,
2475 .num_resources = ARRAY_SIZE(msm_gemini_resources),
2476};
2477#endif
2478
2479#ifdef CONFIG_I2C_QUP
2480static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
2481{
2482}
2483
2484static struct msm_i2c_platform_data msm_gsbi3_qup_i2c_pdata = {
2485 .clk_freq = 384000,
2486 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002487 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2488};
2489
2490static struct msm_i2c_platform_data msm_gsbi4_qup_i2c_pdata = {
2491 .clk_freq = 100000,
2492 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002493 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2494};
2495
2496static struct msm_i2c_platform_data msm_gsbi7_qup_i2c_pdata = {
2497 .clk_freq = 100000,
2498 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002499 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2500};
2501
2502static struct msm_i2c_platform_data msm_gsbi8_qup_i2c_pdata = {
2503 .clk_freq = 100000,
2504 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002505 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2506};
2507
2508static struct msm_i2c_platform_data msm_gsbi9_qup_i2c_pdata = {
2509 .clk_freq = 100000,
2510 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002511 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2512};
2513
2514static struct msm_i2c_platform_data msm_gsbi12_qup_i2c_pdata = {
2515 .clk_freq = 100000,
2516 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002517 .use_gsbi_shared_mode = 1,
2518 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2519};
2520#endif
2521
2522#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
2523static struct msm_spi_platform_data msm_gsbi1_qup_spi_pdata = {
2524 .max_clock_speed = 24000000,
2525};
2526
2527static struct msm_spi_platform_data msm_gsbi10_qup_spi_pdata = {
2528 .max_clock_speed = 24000000,
2529};
2530#endif
2531
2532#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002533/* CODEC/TSSC SSBI */
2534static struct msm_i2c_ssbi_platform_data msm_ssbi3_pdata = {
2535 .controller_type = MSM_SBI_CTRL_SSBI,
2536};
2537#endif
2538
2539#ifdef CONFIG_BATTERY_MSM
2540/* Use basic value for fake MSM battery */
2541static struct msm_psy_batt_pdata msm_psy_batt_data = {
2542 .avail_chg_sources = AC_CHG,
2543};
2544
2545static struct platform_device msm_batt_device = {
2546 .name = "msm-battery",
2547 .id = -1,
2548 .dev.platform_data = &msm_psy_batt_data,
2549};
2550#endif
2551
2552#ifdef CONFIG_FB_MSM_LCDC_DSUB
2553/* VGA = 1440 x 900 x 4(bpp) x 2(pages)
2554 prim = 1024 x 600 x 4(bpp) x 2(pages)
2555 This is the difference. */
2556#define MSM_FB_DSUB_PMEM_ADDER (0xA32000-0x4B0000)
2557#else
2558#define MSM_FB_DSUB_PMEM_ADDER (0)
2559#endif
2560
2561/* Sensors DSPS platform data */
2562#ifdef CONFIG_MSM_DSPS
2563
2564static struct dsps_gpio_info dsps_surf_gpios[] = {
2565 {
2566 .name = "compass_rst_n",
2567 .num = GPIO_COMPASS_RST_N,
2568 .on_val = 1, /* device not in reset */
2569 .off_val = 0, /* device in reset */
2570 },
2571 {
2572 .name = "gpio_r_altimeter_reset_n",
2573 .num = GPIO_R_ALTIMETER_RESET_N,
2574 .on_val = 1, /* device not in reset */
2575 .off_val = 0, /* device in reset */
2576 }
2577};
2578
2579static struct dsps_gpio_info dsps_fluid_gpios[] = {
2580 {
2581 .name = "gpio_n_altimeter_reset_n",
2582 .num = GPIO_N_ALTIMETER_RESET_N,
2583 .on_val = 1, /* device not in reset */
2584 .off_val = 0, /* device in reset */
2585 }
2586};
2587
2588static void __init msm8x60_init_dsps(void)
2589{
2590 struct msm_dsps_platform_data *pdata =
2591 msm_dsps_device.dev.platform_data;
2592 /*
2593 * On Fluid the Compass sensor Chip-Select (CS) is directly connected
2594 * to the power supply and not controled via GPIOs. Fluid uses a
2595 * different IO-Expender (north) than used on surf/ffa.
2596 */
2597 if (machine_is_msm8x60_fluid()) {
2598 /* fluid has different firmware, gpios */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002599 pdata->pil_name = DSPS_PIL_FLUID_NAME;
2600 pdata->gpios = dsps_fluid_gpios;
2601 pdata->gpios_num = ARRAY_SIZE(dsps_fluid_gpios);
2602 } else {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002603 pdata->pil_name = DSPS_PIL_GENERIC_NAME;
2604 pdata->gpios = dsps_surf_gpios;
2605 pdata->gpios_num = ARRAY_SIZE(dsps_surf_gpios);
2606 }
2607
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002608 platform_device_register(&msm_dsps_device);
2609}
2610#endif /* CONFIG_MSM_DSPS */
2611
2612#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002613#define MSM_FB_PRIM_BUF_SIZE (1024 * 600 * 4 * 3) /* 4 bpp x 3 pages */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002614#else
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002615#define MSM_FB_PRIM_BUF_SIZE (1024 * 600 * 4 * 2) /* 4 bpp x 2 pages */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002616#endif
2617
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002618#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
2619#define MSM_FB_EXT_BUF_SIZE (1920 * 1080 * 2 * 1) /* 2 bpp x 1 page */
2620#elif defined(CONFIG_FB_MSM_TVOUT)
2621#define MSM_FB_EXT_BUF_SIZE (720 * 576 * 2 * 2) /* 2 bpp x 2 pages */
2622#else
2623#define MSM_FB_EXT_BUFT_SIZE 0
2624#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002625
Huaibin Yang335f4012011-12-02 14:11:48 -08002626#ifdef CONFIG_FB_MSM_OVERLAY0_WRITEBACK
kuogee hsieha39040b2011-08-11 15:40:45 -07002627/* width x height x 3 bpp x 2 frame buffer */
2628#define MSM_FB_WRITEBACK_SIZE (1024 * 600 * 3 * 2)
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002629#define MSM_FB_WRITEBACK_OFFSET \
2630 (MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002631#else
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002632#define MSM_FB_WRITEBACK_SIZE 0
2633#define MSM_FB_WRITEBACK_OFFSET 0
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002634#endif
2635
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002636#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
2637/* 4 bpp x 2 page HDMI case */
2638#define MSM_FB_SIZE roundup((1920 * 1088 * 4 * 2), 4096)
2639#else
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002640/* Note: must be multiple of 4096 */
2641#define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE + \
2642 MSM_FB_WRITEBACK_SIZE + \
2643 MSM_FB_DSUB_PMEM_ADDER, 4096)
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002644#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002645
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002646#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
2647#define MSM_PMEM_SF_SIZE 0x8000000 /* 128 Mbytes */
2648#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002649#define MSM_PMEM_SF_SIZE 0x4000000 /* 64 Mbytes */
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002650#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002651
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002652static int writeback_offset(void)
2653{
2654 return MSM_FB_WRITEBACK_OFFSET;
2655}
2656
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002657#define MSM_PMEM_KERNEL_EBI1_SIZE 0x600000
2658#define MSM_PMEM_ADSP_SIZE 0x2000000
Ben Romberger09e462d2011-08-09 15:24:37 -07002659#define MSM_PMEM_AUDIO_SIZE 0x28B000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002660
2661#define MSM_SMI_BASE 0x38000000
2662#define MSM_SMI_SIZE 0x4000000
2663
2664#define KERNEL_SMI_BASE (MSM_SMI_BASE)
Maheshwar Ajjac60c0462011-11-29 17:46:57 -08002665#define KERNEL_SMI_SIZE 0x600000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002666
2667#define USER_SMI_BASE (KERNEL_SMI_BASE + KERNEL_SMI_SIZE)
2668#define USER_SMI_SIZE (MSM_SMI_SIZE - KERNEL_SMI_SIZE)
2669#define MSM_PMEM_SMIPOOL_SIZE USER_SMI_SIZE
2670
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002671#define MSM_ION_EBI_SIZE MSM_PMEM_SF_SIZE
2672#define MSM_ION_ADSP_SIZE MSM_PMEM_ADSP_SIZE
Laura Abbottdf8b8a82011-11-02 23:13:45 -07002673#define MSM_ION_SMI_SIZE MSM_PMEM_SMIPOOL_SIZE
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002674
2675#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
2676#define MSM_ION_HEAP_NUM 5
2677#else
2678#define MSM_ION_HEAP_NUM 2
2679#endif
2680
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002681static unsigned fb_size;
2682static int __init fb_size_setup(char *p)
2683{
2684 fb_size = memparse(p, NULL);
2685 return 0;
2686}
2687early_param("fb_size", fb_size_setup);
2688
2689static unsigned pmem_kernel_ebi1_size = MSM_PMEM_KERNEL_EBI1_SIZE;
2690static int __init pmem_kernel_ebi1_size_setup(char *p)
2691{
2692 pmem_kernel_ebi1_size = memparse(p, NULL);
2693 return 0;
2694}
2695early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
2696
2697#ifdef CONFIG_ANDROID_PMEM
2698static unsigned pmem_sf_size = MSM_PMEM_SF_SIZE;
2699static int __init pmem_sf_size_setup(char *p)
2700{
2701 pmem_sf_size = memparse(p, NULL);
2702 return 0;
2703}
2704early_param("pmem_sf_size", pmem_sf_size_setup);
2705
2706static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
2707
2708static int __init pmem_adsp_size_setup(char *p)
2709{
2710 pmem_adsp_size = memparse(p, NULL);
2711 return 0;
2712}
2713early_param("pmem_adsp_size", pmem_adsp_size_setup);
2714
2715static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
2716
2717static int __init pmem_audio_size_setup(char *p)
2718{
2719 pmem_audio_size = memparse(p, NULL);
2720 return 0;
2721}
2722early_param("pmem_audio_size", pmem_audio_size_setup);
2723#endif
2724
2725static struct resource msm_fb_resources[] = {
2726 {
2727 .flags = IORESOURCE_DMA,
2728 }
2729};
2730
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002731static int msm_fb_detect_panel(const char *name)
2732{
2733 if (machine_is_msm8x60_fluid()) {
2734 uint32_t soc_platform_version = socinfo_get_platform_version();
2735 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3) {
2736#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
2737 if (!strncmp(name, LCDC_SAMSUNG_OLED_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002738 strnlen(LCDC_SAMSUNG_OLED_PANEL_NAME,
2739 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002740 return 0;
2741#endif
2742 } else { /*P3 and up use AUO panel */
2743#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
2744 if (!strncmp(name, LCDC_AUO_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002745 strnlen(LCDC_AUO_PANEL_NAME,
2746 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002747 return 0;
2748#endif
2749 }
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04002750#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
2751 } else if machine_is_msm8x60_dragon() {
2752 if (!strncmp(name, LCDC_NT35582_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002753 strnlen(LCDC_NT35582_PANEL_NAME,
2754 PANEL_NAME_MAX_LEN)))
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04002755 return 0;
2756#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002757 } else {
2758 if (!strncmp(name, LCDC_SAMSUNG_WSVGA_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002759 strnlen(LCDC_SAMSUNG_WSVGA_PANEL_NAME,
2760 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002761 return 0;
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002762
2763#if !defined(CONFIG_FB_MSM_LCDC_AUTO_DETECT) && \
2764 !defined(CONFIG_FB_MSM_MIPI_PANEL_AUTO_DETECT) && \
2765 !defined(CONFIG_FB_MSM_LCDC_MIPI_PANEL_AUTO_DETECT)
2766 if (!strncmp(name, MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME,
2767 strnlen(MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME,
2768 PANEL_NAME_MAX_LEN)))
2769 return 0;
2770
2771 if (!strncmp(name, MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
2772 strnlen(MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
2773 PANEL_NAME_MAX_LEN)))
2774 return 0;
2775
2776 if (!strncmp(name, MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
2777 strnlen(MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
2778 PANEL_NAME_MAX_LEN)))
2779 return 0;
2780#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002781 }
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002782
2783 if (!strncmp(name, HDMI_PANEL_NAME,
2784 strnlen(HDMI_PANEL_NAME,
2785 PANEL_NAME_MAX_LEN)))
2786 return 0;
2787
2788 if (!strncmp(name, TVOUT_PANEL_NAME,
2789 strnlen(TVOUT_PANEL_NAME,
2790 PANEL_NAME_MAX_LEN)))
2791 return 0;
2792
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002793 pr_warning("%s: not supported '%s'", __func__, name);
2794 return -ENODEV;
2795}
2796
2797static struct msm_fb_platform_data msm_fb_pdata = {
2798 .detect_client = msm_fb_detect_panel,
2799};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002800
2801static struct platform_device msm_fb_device = {
2802 .name = "msm_fb",
2803 .id = 0,
2804 .num_resources = ARRAY_SIZE(msm_fb_resources),
2805 .resource = msm_fb_resources,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002806 .dev.platform_data = &msm_fb_pdata,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002807};
2808
2809#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002810#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002811static struct android_pmem_platform_data android_pmem_pdata = {
2812 .name = "pmem",
2813 .allocator_type = PMEM_ALLOCATORTYPE_ALLORNOTHING,
2814 .cached = 1,
2815 .memory_type = MEMTYPE_EBI1,
2816};
2817
2818static struct platform_device android_pmem_device = {
2819 .name = "android_pmem",
2820 .id = 0,
2821 .dev = {.platform_data = &android_pmem_pdata},
2822};
2823
2824static struct android_pmem_platform_data android_pmem_adsp_pdata = {
2825 .name = "pmem_adsp",
2826 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2827 .cached = 0,
2828 .memory_type = MEMTYPE_EBI1,
2829};
2830
2831static struct platform_device android_pmem_adsp_device = {
2832 .name = "android_pmem",
2833 .id = 2,
2834 .dev = { .platform_data = &android_pmem_adsp_pdata },
2835};
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002836#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002837static struct android_pmem_platform_data android_pmem_audio_pdata = {
2838 .name = "pmem_audio",
2839 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2840 .cached = 0,
2841 .memory_type = MEMTYPE_EBI1,
2842};
2843
2844static struct platform_device android_pmem_audio_device = {
2845 .name = "android_pmem",
2846 .id = 4,
2847 .dev = { .platform_data = &android_pmem_audio_pdata },
2848};
2849
Laura Abbott1e36a022011-06-22 17:08:13 -07002850#define PMEM_BUS_WIDTH(_bw) \
2851 { \
2852 .vectors = &(struct msm_bus_vectors){ \
2853 .src = MSM_BUS_MASTER_AMPSS_M0, \
2854 .dst = MSM_BUS_SLAVE_SMI, \
2855 .ib = (_bw), \
2856 .ab = 0, \
2857 }, \
2858 .num_paths = 1, \
2859 }
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002860#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Laura Abbott1e36a022011-06-22 17:08:13 -07002861static struct msm_bus_paths pmem_smi_table[] = {
2862 [0] = PMEM_BUS_WIDTH(0), /* Off */
2863 [1] = PMEM_BUS_WIDTH(1), /* On */
2864};
2865
2866static struct msm_bus_scale_pdata smi_client_pdata = {
2867 .usecase = pmem_smi_table,
2868 .num_usecases = ARRAY_SIZE(pmem_smi_table),
2869 .name = "pmem_smi",
2870};
2871
Alex Bird199980e2011-10-21 11:29:27 -07002872void request_smi_region(void *data)
Laura Abbott1e36a022011-06-22 17:08:13 -07002873{
2874 int bus_id = (int) data;
2875
2876 msm_bus_scale_client_update_request(bus_id, 1);
2877}
2878
Alex Bird199980e2011-10-21 11:29:27 -07002879void release_smi_region(void *data)
Laura Abbott1e36a022011-06-22 17:08:13 -07002880{
2881 int bus_id = (int) data;
2882
2883 msm_bus_scale_client_update_request(bus_id, 0);
2884}
2885
Alex Bird199980e2011-10-21 11:29:27 -07002886void *setup_smi_region(void)
Laura Abbott1e36a022011-06-22 17:08:13 -07002887{
2888 return (void *)msm_bus_scale_register_client(&smi_client_pdata);
2889}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002890static struct android_pmem_platform_data android_pmem_smipool_pdata = {
2891 .name = "pmem_smipool",
2892 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2893 .cached = 0,
2894 .memory_type = MEMTYPE_SMI,
Alex Bird199980e2011-10-21 11:29:27 -07002895 .request_region = request_smi_region,
2896 .release_region = release_smi_region,
2897 .setup_region = setup_smi_region,
Laura Abbott1e36a022011-06-22 17:08:13 -07002898 .map_on_demand = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002899};
2900static struct platform_device android_pmem_smipool_device = {
2901 .name = "android_pmem",
2902 .id = 7,
2903 .dev = { .platform_data = &android_pmem_smipool_pdata },
2904};
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002905#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002906#endif
2907
2908#define GPIO_DONGLE_PWR_EN 258
2909static void setup_display_power(void);
2910static int lcdc_vga_enabled;
2911static int vga_enable_request(int enable)
2912{
2913 if (enable)
2914 lcdc_vga_enabled = 1;
2915 else
2916 lcdc_vga_enabled = 0;
2917 setup_display_power();
2918
2919 return 0;
2920}
2921
2922#define GPIO_BACKLIGHT_PWM0 0
2923#define GPIO_BACKLIGHT_PWM1 1
2924
2925static int pmic_backlight_gpio[2]
2926 = { GPIO_BACKLIGHT_PWM0, GPIO_BACKLIGHT_PWM1 };
2927static struct msm_panel_common_pdata lcdc_samsung_panel_data = {
2928 .gpio_num = pmic_backlight_gpio, /* two LPG CHANNELS for backlight */
2929 .vga_switch = vga_enable_request,
2930};
2931
2932static struct platform_device lcdc_samsung_panel_device = {
2933 .name = LCDC_SAMSUNG_WSVGA_PANEL_NAME,
2934 .id = 0,
2935 .dev = {
2936 .platform_data = &lcdc_samsung_panel_data,
2937 }
2938};
2939#if (!defined(CONFIG_SPI_QUP)) && \
2940 (defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
2941 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA))
2942
2943static int lcdc_spi_gpio_array_num[] = {
2944 LCDC_SPI_GPIO_CLK,
2945 LCDC_SPI_GPIO_CS,
2946 LCDC_SPI_GPIO_MOSI,
2947};
2948
2949static uint32_t lcdc_spi_gpio_config_data[] = {
2950 GPIO_CFG(LCDC_SPI_GPIO_CLK, 0,
2951 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2952 GPIO_CFG(LCDC_SPI_GPIO_CS, 0,
2953 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2954 GPIO_CFG(LCDC_SPI_GPIO_MOSI, 0,
2955 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2956};
2957
2958static void lcdc_config_spi_gpios(int enable)
2959{
2960 int n;
2961 for (n = 0; n < ARRAY_SIZE(lcdc_spi_gpio_config_data); ++n)
2962 gpio_tlmm_config(lcdc_spi_gpio_config_data[n], 0);
2963}
2964#endif
2965
2966#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
2967#ifdef CONFIG_SPI_QUP
2968static struct spi_board_info lcdc_samsung_spi_board_info[] __initdata = {
2969 {
2970 .modalias = LCDC_SAMSUNG_SPI_DEVICE_NAME,
2971 .mode = SPI_MODE_3,
2972 .bus_num = 1,
2973 .chip_select = 0,
2974 .max_speed_hz = 10800000,
2975 }
2976};
2977#endif /* CONFIG_SPI_QUP */
2978
2979static struct msm_panel_common_pdata lcdc_samsung_oled_panel_data = {
2980#ifndef CONFIG_SPI_QUP
2981 .panel_config_gpio = lcdc_config_spi_gpios,
2982 .gpio_num = lcdc_spi_gpio_array_num,
2983#endif
2984};
2985
2986static struct platform_device lcdc_samsung_oled_panel_device = {
2987 .name = LCDC_SAMSUNG_OLED_PANEL_NAME,
2988 .id = 0,
2989 .dev.platform_data = &lcdc_samsung_oled_panel_data,
2990};
2991#endif /*CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT */
2992
2993#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
2994#ifdef CONFIG_SPI_QUP
2995static struct spi_board_info lcdc_auo_spi_board_info[] __initdata = {
2996 {
2997 .modalias = LCDC_AUO_SPI_DEVICE_NAME,
2998 .mode = SPI_MODE_3,
2999 .bus_num = 1,
3000 .chip_select = 0,
3001 .max_speed_hz = 10800000,
3002 }
3003};
3004#endif
3005
3006static struct msm_panel_common_pdata lcdc_auo_wvga_panel_data = {
3007#ifndef CONFIG_SPI_QUP
3008 .panel_config_gpio = lcdc_config_spi_gpios,
3009 .gpio_num = lcdc_spi_gpio_array_num,
3010#endif
3011};
3012
3013static struct platform_device lcdc_auo_wvga_panel_device = {
3014 .name = LCDC_AUO_PANEL_NAME,
3015 .id = 0,
3016 .dev.platform_data = &lcdc_auo_wvga_panel_data,
3017};
3018#endif /*CONFIG_FB_MSM_LCDC_AUO_WVGA*/
3019
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04003020#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
3021
3022#define GPIO_NT35582_RESET 94
3023#define GPIO_NT35582_BL_EN_HW_PIN 24
3024#define GPIO_NT35582_BL_EN \
3025 PM8058_GPIO_PM_TO_SYS(GPIO_NT35582_BL_EN_HW_PIN - 1)
3026
3027static int lcdc_nt35582_pmic_gpio[] = {GPIO_NT35582_BL_EN };
3028
3029static struct msm_panel_common_pdata lcdc_nt35582_panel_data = {
3030 .gpio_num = lcdc_nt35582_pmic_gpio,
3031};
3032
3033static struct platform_device lcdc_nt35582_panel_device = {
3034 .name = LCDC_NT35582_PANEL_NAME,
3035 .id = 0,
3036 .dev = {
3037 .platform_data = &lcdc_nt35582_panel_data,
3038 }
3039};
3040
3041static struct spi_board_info lcdc_nt35582_spi_board_info[] __initdata = {
3042 {
3043 .modalias = "lcdc_nt35582_spi",
3044 .mode = SPI_MODE_0,
3045 .bus_num = 0,
3046 .chip_select = 0,
3047 .max_speed_hz = 1100000,
3048 }
3049};
3050#endif
3051
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003052#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
3053static struct resource hdmi_msm_resources[] = {
3054 {
3055 .name = "hdmi_msm_qfprom_addr",
3056 .start = 0x00700000,
3057 .end = 0x007060FF,
3058 .flags = IORESOURCE_MEM,
3059 },
3060 {
3061 .name = "hdmi_msm_hdmi_addr",
3062 .start = 0x04A00000,
3063 .end = 0x04A00FFF,
3064 .flags = IORESOURCE_MEM,
3065 },
3066 {
3067 .name = "hdmi_msm_irq",
3068 .start = HDMI_IRQ,
3069 .end = HDMI_IRQ,
3070 .flags = IORESOURCE_IRQ,
3071 },
3072};
3073
3074static int hdmi_enable_5v(int on);
3075static int hdmi_core_power(int on, int show);
3076static int hdmi_cec_power(int on);
3077
3078static struct msm_hdmi_platform_data hdmi_msm_data = {
3079 .irq = HDMI_IRQ,
3080 .enable_5v = hdmi_enable_5v,
3081 .core_power = hdmi_core_power,
3082 .cec_power = hdmi_cec_power,
3083};
3084
3085static struct platform_device hdmi_msm_device = {
3086 .name = "hdmi_msm",
3087 .id = 0,
3088 .num_resources = ARRAY_SIZE(hdmi_msm_resources),
3089 .resource = hdmi_msm_resources,
3090 .dev.platform_data = &hdmi_msm_data,
3091};
3092#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
3093
3094#ifdef CONFIG_FB_MSM_MIPI_DSI
3095static struct platform_device mipi_dsi_toshiba_panel_device = {
3096 .name = "mipi_toshiba",
3097 .id = 0,
3098};
3099
3100#define FPGA_3D_GPIO_CONFIG_ADDR 0x1D00017A
3101
Nagamalleswararao Ganjieac5dfa2011-07-23 17:31:16 -07003102static struct mipi_dsi_panel_platform_data novatek_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003103 .fpga_3d_config_addr = FPGA_3D_GPIO_CONFIG_ADDR,
Chandan Uddaraju83eac3c2011-09-11 18:32:23 -07003104 .fpga_ctrl_mode = FPGA_EBI2_INTF,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003105};
3106
3107static struct platform_device mipi_dsi_novatek_panel_device = {
3108 .name = "mipi_novatek",
3109 .id = 0,
3110 .dev = {
3111 .platform_data = &novatek_pdata,
3112 }
3113};
3114#endif
3115
3116static void __init msm8x60_allocate_memory_regions(void)
3117{
3118 void *addr;
3119 unsigned long size;
3120
3121 size = MSM_FB_SIZE;
3122 addr = alloc_bootmem_align(size, 0x1000);
3123 msm_fb_resources[0].start = __pa(addr);
3124 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
3125 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
3126 size, addr, __pa(addr));
3127
3128}
3129
3130#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
3131 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
3132/*virtual key support */
3133static ssize_t tma300_vkeys_show(struct kobject *kobj,
3134 struct kobj_attribute *attr, char *buf)
3135{
3136 return sprintf(buf,
3137 __stringify(EV_KEY) ":" __stringify(KEY_BACK) ":60:900:90:120"
3138 ":" __stringify(EV_KEY) ":" __stringify(KEY_MENU) ":180:900:90:120"
3139 ":" __stringify(EV_KEY) ":" __stringify(KEY_HOME) ":300:900:90:120"
3140 ":" __stringify(EV_KEY) ":" __stringify(KEY_SEARCH) ":420:900:90:120"
3141 "\n");
3142}
3143
3144static struct kobj_attribute tma300_vkeys_attr = {
3145 .attr = {
3146 .mode = S_IRUGO,
3147 },
3148 .show = &tma300_vkeys_show,
3149};
3150
3151static struct attribute *tma300_properties_attrs[] = {
3152 &tma300_vkeys_attr.attr,
3153 NULL
3154};
3155
3156static struct attribute_group tma300_properties_attr_group = {
3157 .attrs = tma300_properties_attrs,
3158};
3159
3160static struct kobject *properties_kobj;
3161
3162
3163
3164#define CYTTSP_TS_GPIO_IRQ 61
3165static int cyttsp_platform_init(struct i2c_client *client)
3166{
3167 int rc = -EINVAL;
3168 struct regulator *pm8058_l5 = NULL, *pm8058_s3;
3169
3170 if (machine_is_msm8x60_fluid()) {
3171 pm8058_l5 = regulator_get(NULL, "8058_l5");
3172 if (IS_ERR(pm8058_l5)) {
3173 pr_err("%s: regulator get of 8058_l5 failed (%ld)\n",
3174 __func__, PTR_ERR(pm8058_l5));
3175 rc = PTR_ERR(pm8058_l5);
3176 return rc;
3177 }
3178 rc = regulator_set_voltage(pm8058_l5, 2850000, 2850000);
3179 if (rc) {
3180 pr_err("%s: regulator_set_voltage of 8058_l5 failed(%d)\n",
3181 __func__, rc);
3182 goto reg_l5_put;
3183 }
3184
3185 rc = regulator_enable(pm8058_l5);
3186 if (rc) {
3187 pr_err("%s: regulator_enable of 8058_l5 failed(%d)\n",
3188 __func__, rc);
3189 goto reg_l5_put;
3190 }
3191 }
3192 /* vote for s3 to enable i2c communication lines */
3193 pm8058_s3 = regulator_get(NULL, "8058_s3");
3194 if (IS_ERR(pm8058_s3)) {
3195 pr_err("%s: regulator get of 8058_s3 failed (%ld)\n",
3196 __func__, PTR_ERR(pm8058_s3));
3197 rc = PTR_ERR(pm8058_s3);
3198 goto reg_l5_disable;
3199 }
3200
3201 rc = regulator_set_voltage(pm8058_s3, 1800000, 1800000);
3202 if (rc) {
3203 pr_err("%s: regulator_set_voltage() = %d\n",
3204 __func__, rc);
3205 goto reg_s3_put;
3206 }
3207
3208 rc = regulator_enable(pm8058_s3);
3209 if (rc) {
3210 pr_err("%s: regulator_enable of 8058_l5 failed(%d)\n",
3211 __func__, rc);
3212 goto reg_s3_put;
3213 }
3214
3215 /* wait for vregs to stabilize */
3216 usleep_range(10000, 10000);
3217
3218 /* check this device active by reading first byte/register */
3219 rc = i2c_smbus_read_byte_data(client, 0x01);
3220 if (rc < 0) {
3221 pr_err("%s: i2c sanity check failed\n", __func__);
3222 goto reg_s3_disable;
3223 }
3224
3225 /* virtual keys */
3226 if (machine_is_msm8x60_fluid()) {
3227 tma300_vkeys_attr.attr.name = "virtualkeys.cyttsp-i2c";
3228 properties_kobj = kobject_create_and_add("board_properties",
3229 NULL);
3230 if (properties_kobj)
3231 rc = sysfs_create_group(properties_kobj,
3232 &tma300_properties_attr_group);
3233 if (!properties_kobj || rc)
3234 pr_err("%s: failed to create board_properties\n",
3235 __func__);
3236 }
3237 return CY_OK;
3238
3239reg_s3_disable:
3240 regulator_disable(pm8058_s3);
3241reg_s3_put:
3242 regulator_put(pm8058_s3);
3243reg_l5_disable:
3244 if (machine_is_msm8x60_fluid())
3245 regulator_disable(pm8058_l5);
3246reg_l5_put:
3247 if (machine_is_msm8x60_fluid())
3248 regulator_put(pm8058_l5);
3249 return rc;
3250}
3251
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303252/* TODO: Put the regulator to LPM / HPM in suspend/resume*/
3253static int cyttsp_platform_suspend(struct i2c_client *client)
3254{
3255 msleep(20);
3256
3257 return CY_OK;
3258}
3259
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003260static int cyttsp_platform_resume(struct i2c_client *client)
3261{
3262 /* add any special code to strobe a wakeup pin or chip reset */
3263 msleep(10);
3264
3265 return CY_OK;
3266}
3267
3268static struct cyttsp_platform_data cyttsp_fluid_pdata = {
3269 .flags = 0x04,
3270 .gen = CY_GEN3, /* or */
3271 .use_st = CY_USE_ST,
3272 .use_mt = CY_USE_MT,
3273 .use_hndshk = CY_SEND_HNDSHK,
3274 .use_trk_id = CY_USE_TRACKING_ID,
Anirudh Ghayal15187772011-06-22 17:39:41 +05303275 .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003276 .use_gestures = CY_USE_GESTURES,
3277 /* activate up to 4 groups
3278 * and set active distance
3279 */
3280 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
3281 CY_GEST_GRP3 | CY_GEST_GRP4 |
3282 CY_ACT_DIST,
3283 /* change act_intrvl to customize the Active power state
3284 * scanning/processing refresh interval for Operating mode
3285 */
3286 .act_intrvl = CY_ACT_INTRVL_DFLT,
3287 /* change tch_tmout to customize the touch timeout for the
3288 * Active power state for Operating mode
3289 */
3290 .tch_tmout = CY_TCH_TMOUT_DFLT,
3291 /* change lp_intrvl to customize the Low Power power state
3292 * scanning/processing refresh interval for Operating mode
3293 */
3294 .lp_intrvl = CY_LP_INTRVL_DFLT,
3295 .sleep_gpio = -1,
3296 .resout_gpio = -1,
3297 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
3298 .resume = cyttsp_platform_resume,
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303299 .suspend = cyttsp_platform_suspend,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003300 .init = cyttsp_platform_init,
3301};
3302
3303static struct cyttsp_platform_data cyttsp_tmg240_pdata = {
3304 .panel_maxx = 1083,
3305 .panel_maxy = 659,
3306 .disp_minx = 30,
3307 .disp_maxx = 1053,
3308 .disp_miny = 30,
3309 .disp_maxy = 629,
3310 .correct_fw_ver = 8,
3311 .fw_fname = "cyttsp_8660_ffa.hex",
3312 .flags = 0x00,
3313 .gen = CY_GEN2, /* or */
3314 .use_st = CY_USE_ST,
3315 .use_mt = CY_USE_MT,
3316 .use_hndshk = CY_SEND_HNDSHK,
3317 .use_trk_id = CY_USE_TRACKING_ID,
Anirudh Ghayal15187772011-06-22 17:39:41 +05303318 .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003319 .use_gestures = CY_USE_GESTURES,
3320 /* activate up to 4 groups
3321 * and set active distance
3322 */
3323 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
3324 CY_GEST_GRP3 | CY_GEST_GRP4 |
3325 CY_ACT_DIST,
3326 /* change act_intrvl to customize the Active power state
3327 * scanning/processing refresh interval for Operating mode
3328 */
3329 .act_intrvl = CY_ACT_INTRVL_DFLT,
3330 /* change tch_tmout to customize the touch timeout for the
3331 * Active power state for Operating mode
3332 */
3333 .tch_tmout = CY_TCH_TMOUT_DFLT,
3334 /* change lp_intrvl to customize the Low Power power state
3335 * scanning/processing refresh interval for Operating mode
3336 */
3337 .lp_intrvl = CY_LP_INTRVL_DFLT,
3338 .sleep_gpio = -1,
3339 .resout_gpio = -1,
3340 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
3341 .resume = cyttsp_platform_resume,
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303342 .suspend = cyttsp_platform_suspend,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003343 .init = cyttsp_platform_init,
Mohan Pallaka1ea7d8a2011-08-18 15:06:00 +05303344 .disable_ghost_det = true,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003345};
3346static void cyttsp_set_params(void)
3347{
3348 if (SOCINFO_VERSION_MAJOR(socinfo_get_platform_version()) < 3) {
3349 cyttsp_fluid_pdata.fw_fname = "cyttsp_8660_fluid_p2.hex";
3350 cyttsp_fluid_pdata.panel_maxx = 539;
3351 cyttsp_fluid_pdata.panel_maxy = 994;
3352 cyttsp_fluid_pdata.disp_minx = 30;
3353 cyttsp_fluid_pdata.disp_maxx = 509;
3354 cyttsp_fluid_pdata.disp_miny = 60;
3355 cyttsp_fluid_pdata.disp_maxy = 859;
3356 cyttsp_fluid_pdata.correct_fw_ver = 4;
3357 } else {
3358 cyttsp_fluid_pdata.fw_fname = "cyttsp_8660_fluid_p3.hex";
3359 cyttsp_fluid_pdata.panel_maxx = 550;
3360 cyttsp_fluid_pdata.panel_maxy = 1013;
3361 cyttsp_fluid_pdata.disp_minx = 35;
3362 cyttsp_fluid_pdata.disp_maxx = 515;
3363 cyttsp_fluid_pdata.disp_miny = 69;
3364 cyttsp_fluid_pdata.disp_maxy = 869;
3365 cyttsp_fluid_pdata.correct_fw_ver = 5;
3366 }
3367
3368}
3369
3370static struct i2c_board_info cyttsp_fluid_info[] __initdata = {
3371 {
3372 I2C_BOARD_INFO(CY_I2C_NAME, 0x24),
3373 .platform_data = &cyttsp_fluid_pdata,
3374#ifndef CY_USE_TIMER
3375 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
3376#endif /* CY_USE_TIMER */
3377 },
3378};
3379
3380static struct i2c_board_info cyttsp_ffa_info[] __initdata = {
3381 {
3382 I2C_BOARD_INFO(CY_I2C_NAME, 0x3b),
3383 .platform_data = &cyttsp_tmg240_pdata,
3384#ifndef CY_USE_TIMER
3385 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
3386#endif /* CY_USE_TIMER */
3387 },
3388};
3389#endif
3390
3391static struct regulator *vreg_tmg200;
3392
3393#define TS_PEN_IRQ_GPIO 61
3394static int tmg200_power(int vreg_on)
3395{
3396 int rc = -EINVAL;
3397
3398 if (!vreg_tmg200) {
3399 printk(KERN_ERR "%s: regulator 8058_s3 not found (%d)\n",
3400 __func__, rc);
3401 return rc;
3402 }
3403
3404 rc = vreg_on ? regulator_enable(vreg_tmg200) :
3405 regulator_disable(vreg_tmg200);
3406 if (rc < 0)
3407 printk(KERN_ERR "%s: vreg 8058_s3 %s failed (%d)\n",
3408 __func__, vreg_on ? "enable" : "disable", rc);
3409
3410 /* wait for vregs to stabilize */
Amy Maloche12b5d4e2011-08-03 15:42:28 -07003411 msleep(20);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003412
3413 return rc;
3414}
3415
3416static int tmg200_dev_setup(bool enable)
3417{
3418 int rc;
3419
3420 if (enable) {
3421 vreg_tmg200 = regulator_get(NULL, "8058_s3");
3422 if (IS_ERR(vreg_tmg200)) {
3423 pr_err("%s: regulator get of 8058_s3 failed (%ld)\n",
3424 __func__, PTR_ERR(vreg_tmg200));
3425 rc = PTR_ERR(vreg_tmg200);
3426 return rc;
3427 }
3428
3429 rc = regulator_set_voltage(vreg_tmg200, 1800000, 1800000);
3430 if (rc) {
3431 pr_err("%s: regulator_set_voltage() = %d\n",
3432 __func__, rc);
3433 goto reg_put;
3434 }
3435 } else {
3436 /* put voltage sources */
3437 regulator_put(vreg_tmg200);
3438 }
3439 return 0;
3440reg_put:
3441 regulator_put(vreg_tmg200);
3442 return rc;
3443}
3444
3445static struct cy8c_ts_platform_data cy8ctmg200_pdata = {
3446 .ts_name = "msm_tmg200_ts",
3447 .dis_min_x = 0,
3448 .dis_max_x = 1023,
3449 .dis_min_y = 0,
3450 .dis_max_y = 599,
3451 .min_tid = 0,
3452 .max_tid = 255,
3453 .min_touch = 0,
3454 .max_touch = 255,
3455 .min_width = 0,
3456 .max_width = 255,
3457 .power_on = tmg200_power,
3458 .dev_setup = tmg200_dev_setup,
3459 .nfingers = 2,
3460 .irq_gpio = TS_PEN_IRQ_GPIO,
3461 .resout_gpio = GPIO_CAP_TS_RESOUT_N,
3462};
3463
3464static struct i2c_board_info cy8ctmg200_board_info[] = {
3465 {
3466 I2C_BOARD_INFO("cy8ctmg200", 0x2),
3467 .platform_data = &cy8ctmg200_pdata,
3468 }
3469};
3470
Zhang Chang Ken211df572011-07-05 19:16:39 -04003471static struct regulator *vreg_tma340;
3472
3473static int tma340_power(int vreg_on)
3474{
3475 int rc = -EINVAL;
3476
3477 if (!vreg_tma340) {
3478 pr_err("%s: regulator 8901_l2 not found (%d)\n",
3479 __func__, rc);
3480 return rc;
3481 }
3482
3483 rc = vreg_on ? regulator_enable(vreg_tma340) :
3484 regulator_disable(vreg_tma340);
3485 if (rc < 0)
3486 pr_err("%s: vreg 8901_l2 %s failed (%d)\n",
3487 __func__, vreg_on ? "enable" : "disable", rc);
3488
3489 /* wait for vregs to stabilize */
Amy Malocheb5c67e8d2011-08-18 16:39:35 -07003490 msleep(100);
Zhang Chang Ken211df572011-07-05 19:16:39 -04003491
3492 return rc;
3493}
3494
3495static struct kobject *tma340_prop_kobj;
3496
3497static int tma340_dragon_dev_setup(bool enable)
3498{
3499 int rc;
3500
3501 if (enable) {
3502 vreg_tma340 = regulator_get(NULL, "8901_l2");
3503 if (IS_ERR(vreg_tma340)) {
3504 pr_err("%s: regulator get of 8901_l2 failed (%ld)\n",
3505 __func__, PTR_ERR(vreg_tma340));
3506 rc = PTR_ERR(vreg_tma340);
3507 return rc;
3508 }
3509
3510 rc = regulator_set_voltage(vreg_tma340, 3300000, 3300000);
3511 if (rc) {
3512 pr_err("%s: regulator_set_voltage() = %d\n",
3513 __func__, rc);
3514 goto reg_put;
3515 }
3516 tma300_vkeys_attr.attr.name = "virtualkeys.cy8ctma340";
3517 tma340_prop_kobj = kobject_create_and_add("board_properties",
3518 NULL);
3519 if (tma340_prop_kobj) {
3520 rc = sysfs_create_group(tma340_prop_kobj,
3521 &tma300_properties_attr_group);
3522 if (rc) {
3523 kobject_put(tma340_prop_kobj);
3524 pr_err("%s: failed to create board_properties\n",
3525 __func__);
3526 goto reg_put;
3527 }
3528 }
3529
3530 } else {
3531 /* put voltage sources */
3532 regulator_put(vreg_tma340);
3533 /* destroy virtual keys */
3534 if (tma340_prop_kobj) {
3535 sysfs_remove_group(tma340_prop_kobj,
3536 &tma300_properties_attr_group);
3537 kobject_put(tma340_prop_kobj);
3538 }
3539 }
3540 return 0;
3541reg_put:
3542 regulator_put(vreg_tma340);
3543 return rc;
3544}
3545
3546
3547static struct cy8c_ts_platform_data cy8ctma340_dragon_pdata = {
3548 .ts_name = "cy8ctma340",
3549 .dis_min_x = 0,
3550 .dis_max_x = 479,
3551 .dis_min_y = 0,
3552 .dis_max_y = 799,
3553 .min_tid = 0,
3554 .max_tid = 255,
3555 .min_touch = 0,
3556 .max_touch = 255,
3557 .min_width = 0,
3558 .max_width = 255,
3559 .power_on = tma340_power,
3560 .dev_setup = tma340_dragon_dev_setup,
3561 .nfingers = 2,
3562 .irq_gpio = TS_PEN_IRQ_GPIO,
3563 .resout_gpio = -1,
3564};
3565
3566static struct i2c_board_info cy8ctma340_dragon_board_info[] = {
3567 {
3568 I2C_BOARD_INFO("cy8ctma340", 0x24),
3569 .platform_data = &cy8ctma340_dragon_pdata,
3570 }
3571};
3572
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003573#ifdef CONFIG_SERIAL_MSM_HS
3574static int configure_uart_gpios(int on)
3575{
3576 int ret = 0, i;
3577 int uart_gpios[] = {53, 54, 55, 56};
3578 for (i = 0; i < ARRAY_SIZE(uart_gpios); i++) {
3579 if (on) {
3580 ret = msm_gpiomux_get(uart_gpios[i]);
3581 if (unlikely(ret))
3582 break;
3583 } else {
3584 ret = msm_gpiomux_put(uart_gpios[i]);
3585 if (unlikely(ret))
3586 return ret;
3587 }
3588 }
3589 if (ret)
3590 for (; i >= 0; i--)
3591 msm_gpiomux_put(uart_gpios[i]);
3592 return ret;
3593}
3594static struct msm_serial_hs_platform_data msm_uart_dm1_pdata = {
3595 .inject_rx_on_wakeup = 1,
3596 .rx_to_inject = 0xFD,
3597 .gpio_config = configure_uart_gpios,
3598};
3599#endif
3600
3601
3602#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
3603
3604static struct gpio_led gpio_exp_leds_config[] = {
3605 {
3606 .name = "left_led1:green",
3607 .gpio = GPIO_LEFT_LED_1,
3608 .active_low = 1,
3609 .retain_state_suspended = 0,
3610 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3611 },
3612 {
3613 .name = "left_led2:red",
3614 .gpio = GPIO_LEFT_LED_2,
3615 .active_low = 1,
3616 .retain_state_suspended = 0,
3617 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3618 },
3619 {
3620 .name = "left_led3:green",
3621 .gpio = GPIO_LEFT_LED_3,
3622 .active_low = 1,
3623 .retain_state_suspended = 0,
3624 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3625 },
3626 {
3627 .name = "wlan_led:orange",
3628 .gpio = GPIO_LEFT_LED_WLAN,
3629 .active_low = 1,
3630 .retain_state_suspended = 0,
3631 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3632 },
3633 {
3634 .name = "left_led5:green",
3635 .gpio = GPIO_LEFT_LED_5,
3636 .active_low = 1,
3637 .retain_state_suspended = 0,
3638 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3639 },
3640 {
3641 .name = "right_led1:green",
3642 .gpio = GPIO_RIGHT_LED_1,
3643 .active_low = 1,
3644 .retain_state_suspended = 0,
3645 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3646 },
3647 {
3648 .name = "right_led2:red",
3649 .gpio = GPIO_RIGHT_LED_2,
3650 .active_low = 1,
3651 .retain_state_suspended = 0,
3652 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3653 },
3654 {
3655 .name = "right_led3:green",
3656 .gpio = GPIO_RIGHT_LED_3,
3657 .active_low = 1,
3658 .retain_state_suspended = 0,
3659 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3660 },
3661 {
3662 .name = "bt_led:blue",
3663 .gpio = GPIO_RIGHT_LED_BT,
3664 .active_low = 1,
3665 .retain_state_suspended = 0,
3666 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3667 },
3668 {
3669 .name = "right_led5:green",
3670 .gpio = GPIO_RIGHT_LED_5,
3671 .active_low = 1,
3672 .retain_state_suspended = 0,
3673 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3674 },
3675};
3676
3677static struct gpio_led_platform_data gpio_leds_pdata = {
3678 .num_leds = ARRAY_SIZE(gpio_exp_leds_config),
3679 .leds = gpio_exp_leds_config,
3680};
3681
3682static struct platform_device gpio_leds = {
3683 .name = "leds-gpio",
3684 .id = -1,
3685 .dev = {
3686 .platform_data = &gpio_leds_pdata,
3687 },
3688};
3689
3690static struct gpio_led fluid_gpio_leds[] = {
3691 {
3692 .name = "dual_led:green",
3693 .gpio = GPIO_LED1_GREEN_N,
3694 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3695 .active_low = 1,
3696 .retain_state_suspended = 0,
3697 },
3698 {
3699 .name = "dual_led:red",
3700 .gpio = GPIO_LED2_RED_N,
3701 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3702 .active_low = 1,
3703 .retain_state_suspended = 0,
3704 },
3705};
3706
3707static struct gpio_led_platform_data gpio_led_pdata = {
3708 .leds = fluid_gpio_leds,
3709 .num_leds = ARRAY_SIZE(fluid_gpio_leds),
3710};
3711
3712static struct platform_device fluid_leds_gpio = {
3713 .name = "leds-gpio",
3714 .id = -1,
3715 .dev = {
3716 .platform_data = &gpio_led_pdata,
3717 },
3718};
3719
3720#endif
3721
3722#if defined(CONFIG_MSM_RPM_LOG) || defined(CONFIG_MSM_RPM_LOG_MODULE)
3723
3724static struct msm_rpm_log_platform_data msm_rpm_log_pdata = {
3725 .phys_addr_base = 0x00106000,
3726 .reg_offsets = {
3727 [MSM_RPM_LOG_PAGE_INDICES] = 0x00000C80,
3728 [MSM_RPM_LOG_PAGE_BUFFER] = 0x00000CA0,
3729 },
3730 .phys_size = SZ_8K,
3731 .log_len = 4096, /* log's buffer length in bytes */
3732 .log_len_mask = (4096 >> 2) - 1, /* length mask in units of u32 */
3733};
3734
3735static struct platform_device msm_rpm_log_device = {
3736 .name = "msm_rpm_log",
3737 .id = -1,
3738 .dev = {
3739 .platform_data = &msm_rpm_log_pdata,
3740 },
3741};
3742#endif
3743
3744#ifdef CONFIG_BATTERY_MSM8X60
3745static struct msm_charger_platform_data msm_charger_data = {
3746 .safety_time = 180,
3747 .update_time = 1,
3748 .max_voltage = 4200,
3749 .min_voltage = 3200,
3750};
3751
3752static struct platform_device msm_charger_device = {
3753 .name = "msm-charger",
3754 .id = -1,
3755 .dev = {
3756 .platform_data = &msm_charger_data,
3757 }
3758};
3759#endif
3760
3761/*
3762 * Consumer specific regulator names:
3763 * regulator name consumer dev_name
3764 */
3765static struct regulator_consumer_supply vreg_consumers_PM8058_L0[] = {
3766 REGULATOR_SUPPLY("8058_l0", NULL),
3767};
3768static struct regulator_consumer_supply vreg_consumers_PM8058_L1[] = {
3769 REGULATOR_SUPPLY("8058_l1", NULL),
3770};
3771static struct regulator_consumer_supply vreg_consumers_PM8058_L2[] = {
3772 REGULATOR_SUPPLY("8058_l2", NULL),
3773};
3774static struct regulator_consumer_supply vreg_consumers_PM8058_L3[] = {
3775 REGULATOR_SUPPLY("8058_l3", NULL),
3776};
3777static struct regulator_consumer_supply vreg_consumers_PM8058_L4[] = {
3778 REGULATOR_SUPPLY("8058_l4", NULL),
3779};
3780static struct regulator_consumer_supply vreg_consumers_PM8058_L5[] = {
3781 REGULATOR_SUPPLY("8058_l5", NULL),
3782};
3783static struct regulator_consumer_supply vreg_consumers_PM8058_L6[] = {
3784 REGULATOR_SUPPLY("8058_l6", NULL),
3785};
3786static struct regulator_consumer_supply vreg_consumers_PM8058_L7[] = {
3787 REGULATOR_SUPPLY("8058_l7", NULL),
3788};
3789static struct regulator_consumer_supply vreg_consumers_PM8058_L8[] = {
3790 REGULATOR_SUPPLY("8058_l8", NULL),
3791};
3792static struct regulator_consumer_supply vreg_consumers_PM8058_L9[] = {
3793 REGULATOR_SUPPLY("8058_l9", NULL),
3794};
3795static struct regulator_consumer_supply vreg_consumers_PM8058_L10[] = {
3796 REGULATOR_SUPPLY("8058_l10", NULL),
3797};
3798static struct regulator_consumer_supply vreg_consumers_PM8058_L11[] = {
3799 REGULATOR_SUPPLY("8058_l11", NULL),
3800};
3801static struct regulator_consumer_supply vreg_consumers_PM8058_L12[] = {
3802 REGULATOR_SUPPLY("8058_l12", NULL),
3803};
3804static struct regulator_consumer_supply vreg_consumers_PM8058_L13[] = {
3805 REGULATOR_SUPPLY("8058_l13", NULL),
3806};
3807static struct regulator_consumer_supply vreg_consumers_PM8058_L14[] = {
3808 REGULATOR_SUPPLY("8058_l14", NULL),
3809};
3810static struct regulator_consumer_supply vreg_consumers_PM8058_L15[] = {
3811 REGULATOR_SUPPLY("8058_l15", NULL),
3812};
3813static struct regulator_consumer_supply vreg_consumers_PM8058_L16[] = {
3814 REGULATOR_SUPPLY("8058_l16", NULL),
3815};
3816static struct regulator_consumer_supply vreg_consumers_PM8058_L17[] = {
3817 REGULATOR_SUPPLY("8058_l17", NULL),
3818};
3819static struct regulator_consumer_supply vreg_consumers_PM8058_L18[] = {
3820 REGULATOR_SUPPLY("8058_l18", NULL),
3821};
3822static struct regulator_consumer_supply vreg_consumers_PM8058_L19[] = {
3823 REGULATOR_SUPPLY("8058_l19", NULL),
3824};
3825static struct regulator_consumer_supply vreg_consumers_PM8058_L20[] = {
3826 REGULATOR_SUPPLY("8058_l20", NULL),
3827};
3828static struct regulator_consumer_supply vreg_consumers_PM8058_L21[] = {
3829 REGULATOR_SUPPLY("8058_l21", NULL),
3830};
3831static struct regulator_consumer_supply vreg_consumers_PM8058_L22[] = {
3832 REGULATOR_SUPPLY("8058_l22", NULL),
3833};
3834static struct regulator_consumer_supply vreg_consumers_PM8058_L23[] = {
3835 REGULATOR_SUPPLY("8058_l23", NULL),
3836};
3837static struct regulator_consumer_supply vreg_consumers_PM8058_L24[] = {
3838 REGULATOR_SUPPLY("8058_l24", NULL),
3839};
3840static struct regulator_consumer_supply vreg_consumers_PM8058_L25[] = {
3841 REGULATOR_SUPPLY("8058_l25", NULL),
3842};
3843static struct regulator_consumer_supply vreg_consumers_PM8058_S0[] = {
3844 REGULATOR_SUPPLY("8058_s0", NULL),
3845};
3846static struct regulator_consumer_supply vreg_consumers_PM8058_S1[] = {
3847 REGULATOR_SUPPLY("8058_s1", NULL),
3848};
3849static struct regulator_consumer_supply vreg_consumers_PM8058_S2[] = {
3850 REGULATOR_SUPPLY("8058_s2", NULL),
3851};
3852static struct regulator_consumer_supply vreg_consumers_PM8058_S3[] = {
3853 REGULATOR_SUPPLY("8058_s3", NULL),
3854};
3855static struct regulator_consumer_supply vreg_consumers_PM8058_S4[] = {
3856 REGULATOR_SUPPLY("8058_s4", NULL),
3857};
3858static struct regulator_consumer_supply vreg_consumers_PM8058_LVS0[] = {
3859 REGULATOR_SUPPLY("8058_lvs0", NULL),
3860};
3861static struct regulator_consumer_supply vreg_consumers_PM8058_LVS1[] = {
3862 REGULATOR_SUPPLY("8058_lvs1", NULL),
3863};
3864static struct regulator_consumer_supply vreg_consumers_PM8058_NCP[] = {
3865 REGULATOR_SUPPLY("8058_ncp", NULL),
3866};
3867
3868static struct regulator_consumer_supply vreg_consumers_PM8901_L0[] = {
3869 REGULATOR_SUPPLY("8901_l0", NULL),
3870};
3871static struct regulator_consumer_supply vreg_consumers_PM8901_L1[] = {
3872 REGULATOR_SUPPLY("8901_l1", NULL),
3873};
3874static struct regulator_consumer_supply vreg_consumers_PM8901_L2[] = {
3875 REGULATOR_SUPPLY("8901_l2", NULL),
3876};
3877static struct regulator_consumer_supply vreg_consumers_PM8901_L3[] = {
3878 REGULATOR_SUPPLY("8901_l3", NULL),
3879};
3880static struct regulator_consumer_supply vreg_consumers_PM8901_L4[] = {
3881 REGULATOR_SUPPLY("8901_l4", NULL),
3882};
3883static struct regulator_consumer_supply vreg_consumers_PM8901_L5[] = {
3884 REGULATOR_SUPPLY("8901_l5", NULL),
3885};
3886static struct regulator_consumer_supply vreg_consumers_PM8901_L6[] = {
3887 REGULATOR_SUPPLY("8901_l6", NULL),
3888};
3889static struct regulator_consumer_supply vreg_consumers_PM8901_S2[] = {
3890 REGULATOR_SUPPLY("8901_s2", NULL),
3891};
3892static struct regulator_consumer_supply vreg_consumers_PM8901_S3[] = {
3893 REGULATOR_SUPPLY("8901_s3", NULL),
3894};
3895static struct regulator_consumer_supply vreg_consumers_PM8901_S4[] = {
3896 REGULATOR_SUPPLY("8901_s4", NULL),
3897};
3898static struct regulator_consumer_supply vreg_consumers_PM8901_LVS0[] = {
3899 REGULATOR_SUPPLY("8901_lvs0", NULL),
3900};
3901static struct regulator_consumer_supply vreg_consumers_PM8901_LVS1[] = {
3902 REGULATOR_SUPPLY("8901_lvs1", NULL),
3903};
3904static struct regulator_consumer_supply vreg_consumers_PM8901_LVS2[] = {
3905 REGULATOR_SUPPLY("8901_lvs2", NULL),
3906};
3907static struct regulator_consumer_supply vreg_consumers_PM8901_LVS3[] = {
3908 REGULATOR_SUPPLY("8901_lvs3", NULL),
3909};
3910static struct regulator_consumer_supply vreg_consumers_PM8901_MVS0[] = {
3911 REGULATOR_SUPPLY("8901_mvs0", NULL),
3912};
3913
David Collins6f032ba2011-08-31 14:08:15 -07003914/* Pin control regulators */
3915static struct regulator_consumer_supply vreg_consumers_PM8058_L8_PC[] = {
3916 REGULATOR_SUPPLY("8058_l8_pc", NULL),
3917};
3918static struct regulator_consumer_supply vreg_consumers_PM8058_L20_PC[] = {
3919 REGULATOR_SUPPLY("8058_l20_pc", NULL),
3920};
3921static struct regulator_consumer_supply vreg_consumers_PM8058_L21_PC[] = {
3922 REGULATOR_SUPPLY("8058_l21_pc", NULL),
3923};
3924static struct regulator_consumer_supply vreg_consumers_PM8058_S2_PC[] = {
3925 REGULATOR_SUPPLY("8058_s2_pc", NULL),
3926};
3927static struct regulator_consumer_supply vreg_consumers_PM8901_L0_PC[] = {
3928 REGULATOR_SUPPLY("8901_l0_pc", NULL),
3929};
3930static struct regulator_consumer_supply vreg_consumers_PM8901_S4_PC[] = {
3931 REGULATOR_SUPPLY("8901_s4_pc", NULL),
3932};
3933
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003934#define RPM_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
3935 _default_uV, _peak_uA, _avg_uA, _pull_down, _pin_ctrl, \
David Collins6f032ba2011-08-31 14:08:15 -07003936 _freq, _pin_fn, _force_mode, _state, _sleep_selectable, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003937 _always_on) \
David Collins6f032ba2011-08-31 14:08:15 -07003938 { \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003939 .init_data = { \
3940 .constraints = { \
David Collins6f032ba2011-08-31 14:08:15 -07003941 .valid_modes_mask = _modes, \
3942 .valid_ops_mask = _ops, \
3943 .min_uV = _min_uV, \
3944 .max_uV = _max_uV, \
3945 .input_uV = _min_uV, \
3946 .apply_uV = _apply_uV, \
3947 .always_on = _always_on, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003948 }, \
David Collins6f032ba2011-08-31 14:08:15 -07003949 .consumer_supplies = vreg_consumers_##_id, \
3950 .num_consumer_supplies = \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003951 ARRAY_SIZE(vreg_consumers_##_id), \
3952 }, \
David Collins6f032ba2011-08-31 14:08:15 -07003953 .id = RPM_VREG_ID_##_id, \
3954 .default_uV = _default_uV, \
3955 .peak_uA = _peak_uA, \
3956 .avg_uA = _avg_uA, \
3957 .pull_down_enable = _pull_down, \
3958 .pin_ctrl = _pin_ctrl, \
3959 .freq = RPM_VREG_FREQ_##_freq, \
3960 .pin_fn = _pin_fn, \
3961 .force_mode = _force_mode, \
3962 .state = _state, \
3963 .sleep_selectable = _sleep_selectable, \
3964 }
3965
3966/* Pin control initialization */
3967#define RPM_PC(_id, _always_on, _pin_fn, _pin_ctrl) \
3968 { \
3969 .init_data = { \
3970 .constraints = { \
3971 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
3972 .always_on = _always_on, \
3973 }, \
3974 .num_consumer_supplies = \
3975 ARRAY_SIZE(vreg_consumers_##_id##_PC), \
3976 .consumer_supplies = vreg_consumers_##_id##_PC, \
3977 }, \
3978 .id = RPM_VREG_ID_##_id##_PC, \
3979 .pin_fn = RPM_VREG_PIN_FN_8660_##_pin_fn, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003980 .pin_ctrl = _pin_ctrl, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003981 }
3982
3983/*
3984 * The default LPM/HPM state of an RPM controlled regulator can be controlled
3985 * via the peak_uA value specified in the table below. If the value is less
3986 * than the high power min threshold for the regulator, then the regulator will
3987 * be set to LPM. Otherwise, it will be set to HPM.
3988 *
3989 * This value can be further overridden by specifying an initial mode via
3990 * .init_data.constraints.initial_mode.
3991 */
3992
David Collins6f032ba2011-08-31 14:08:15 -07003993#define RPM_LDO(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
3994 _init_peak_uA) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003995 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_FAST | \
3996 REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE | \
3997 REGULATOR_MODE_STANDBY, REGULATOR_CHANGE_VOLTAGE | \
3998 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
3999 REGULATOR_CHANGE_DRMS, 0, _min_uV, _init_peak_uA, \
David Collins6f032ba2011-08-31 14:08:15 -07004000 _init_peak_uA, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4001 RPM_VREG_PIN_FN_8660_ENABLE, \
4002 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004003 _sleep_selectable, _always_on)
4004
David Collins6f032ba2011-08-31 14:08:15 -07004005#define RPM_SMPS(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
4006 _init_peak_uA, _freq) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004007 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_FAST | \
4008 REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE | \
4009 REGULATOR_MODE_STANDBY, REGULATOR_CHANGE_VOLTAGE | \
4010 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
4011 REGULATOR_CHANGE_DRMS, 0, _min_uV, _init_peak_uA, \
David Collins6f032ba2011-08-31 14:08:15 -07004012 _init_peak_uA, _pd, RPM_VREG_PIN_CTRL_NONE, _freq, \
4013 RPM_VREG_PIN_FN_8660_ENABLE, \
4014 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4015 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004016
David Collins6f032ba2011-08-31 14:08:15 -07004017#define RPM_VS(_id, _always_on, _pd, _sleep_selectable) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004018 RPM_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE, \
4019 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE, 0, 0, \
David Collins6f032ba2011-08-31 14:08:15 -07004020 1000, 1000, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4021 RPM_VREG_PIN_FN_8660_ENABLE, \
4022 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4023 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004024
David Collins6f032ba2011-08-31 14:08:15 -07004025#define RPM_NCP(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004026 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_NORMAL, \
4027 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, 0, \
David Collins6f032ba2011-08-31 14:08:15 -07004028 _min_uV, 1000, 1000, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4029 RPM_VREG_PIN_FN_8660_ENABLE, \
4030 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4031 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004032
David Collins6f032ba2011-08-31 14:08:15 -07004033#define LDO50HMIN RPM_VREG_8660_LDO_50_HPM_MIN_LOAD
4034#define LDO150HMIN RPM_VREG_8660_LDO_150_HPM_MIN_LOAD
4035#define LDO300HMIN RPM_VREG_8660_LDO_300_HPM_MIN_LOAD
4036#define SMPS_HMIN RPM_VREG_8660_SMPS_HPM_MIN_LOAD
4037#define FTS_HMIN RPM_VREG_8660_FTSMPS_HPM_MIN_LOAD
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004038
David Collins6f032ba2011-08-31 14:08:15 -07004039/* RPM early regulator constraints */
4040static struct rpm_regulator_init_data rpm_regulator_early_init_data[] = {
4041 /* ID a_on pd ss min_uV max_uV init_ip freq */
4042 RPM_SMPS(PM8058_S0, 0, 1, 1, 500000, 1250000, SMPS_HMIN, 1p60),
4043 RPM_SMPS(PM8058_S1, 0, 1, 1, 500000, 1250000, SMPS_HMIN, 1p60),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004044};
4045
David Collins6f032ba2011-08-31 14:08:15 -07004046/* RPM regulator constraints */
4047static struct rpm_regulator_init_data rpm_regulator_init_data[] = {
4048 /* ID a_on pd ss min_uV max_uV init_ip */
4049 RPM_LDO(PM8058_L0, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
4050 RPM_LDO(PM8058_L1, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4051 RPM_LDO(PM8058_L2, 0, 1, 0, 1800000, 2600000, LDO300HMIN),
4052 RPM_LDO(PM8058_L3, 0, 1, 0, 1800000, 1800000, LDO150HMIN),
4053 RPM_LDO(PM8058_L4, 0, 1, 0, 2850000, 2850000, LDO50HMIN),
4054 RPM_LDO(PM8058_L5, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4055 RPM_LDO(PM8058_L6, 0, 1, 0, 3000000, 3600000, LDO50HMIN),
4056 RPM_LDO(PM8058_L7, 0, 1, 0, 1800000, 1800000, LDO50HMIN),
4057 RPM_LDO(PM8058_L8, 0, 1, 0, 2900000, 3050000, LDO300HMIN),
4058 RPM_LDO(PM8058_L9, 0, 1, 0, 1800000, 1800000, LDO300HMIN),
4059 RPM_LDO(PM8058_L10, 0, 1, 0, 2600000, 2600000, LDO300HMIN),
4060 RPM_LDO(PM8058_L11, 0, 1, 0, 1500000, 1500000, LDO150HMIN),
4061 RPM_LDO(PM8058_L12, 0, 1, 0, 2900000, 2900000, LDO150HMIN),
4062 RPM_LDO(PM8058_L13, 0, 1, 0, 2050000, 2050000, LDO300HMIN),
4063 RPM_LDO(PM8058_L14, 0, 0, 0, 2850000, 2850000, LDO300HMIN),
4064 RPM_LDO(PM8058_L15, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4065 RPM_LDO(PM8058_L16, 1, 1, 0, 1800000, 1800000, LDO300HMIN),
4066 RPM_LDO(PM8058_L17, 0, 1, 0, 2600000, 2600000, LDO150HMIN),
4067 RPM_LDO(PM8058_L18, 0, 1, 0, 2200000, 2200000, LDO150HMIN),
4068 RPM_LDO(PM8058_L19, 0, 1, 0, 2500000, 2500000, LDO150HMIN),
4069 RPM_LDO(PM8058_L20, 0, 1, 0, 1800000, 1800000, LDO150HMIN),
4070 RPM_LDO(PM8058_L21, 1, 1, 0, 1200000, 1200000, LDO150HMIN),
4071 RPM_LDO(PM8058_L22, 0, 1, 0, 1150000, 1150000, LDO300HMIN),
4072 RPM_LDO(PM8058_L23, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4073 RPM_LDO(PM8058_L24, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
4074 RPM_LDO(PM8058_L25, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004075
David Collins6f032ba2011-08-31 14:08:15 -07004076 /* ID a_on pd ss min_uV max_uV init_ip freq */
4077 RPM_SMPS(PM8058_S2, 0, 1, 1, 1200000, 1400000, SMPS_HMIN, 1p60),
4078 RPM_SMPS(PM8058_S3, 1, 1, 0, 1800000, 1800000, SMPS_HMIN, 1p60),
4079 RPM_SMPS(PM8058_S4, 1, 1, 0, 2200000, 2200000, SMPS_HMIN, 1p60),
4080
4081 /* ID a_on pd ss */
4082 RPM_VS(PM8058_LVS0, 0, 1, 0),
4083 RPM_VS(PM8058_LVS1, 0, 1, 0),
4084
4085 /* ID a_on pd ss min_uV max_uV */
4086 RPM_NCP(PM8058_NCP, 0, 1, 0, 1800000, 1800000),
4087
4088 /* ID a_on pd ss min_uV max_uV init_ip */
4089 RPM_LDO(PM8901_L0, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4090 RPM_LDO(PM8901_L1, 0, 1, 0, 3300000, 3300000, LDO300HMIN),
4091 RPM_LDO(PM8901_L2, 0, 1, 0, 2850000, 3300000, LDO300HMIN),
4092 RPM_LDO(PM8901_L3, 0, 1, 0, 3300000, 3300000, LDO300HMIN),
4093 RPM_LDO(PM8901_L4, 0, 1, 0, 2600000, 2600000, LDO300HMIN),
4094 RPM_LDO(PM8901_L5, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4095 RPM_LDO(PM8901_L6, 0, 1, 0, 2200000, 2200000, LDO300HMIN),
4096
4097 /* ID a_on pd ss min_uV max_uV init_ip freq */
4098 RPM_SMPS(PM8901_S2, 0, 1, 0, 1300000, 1300000, FTS_HMIN, 1p60),
4099 RPM_SMPS(PM8901_S3, 0, 1, 0, 1100000, 1100000, FTS_HMIN, 1p60),
4100 RPM_SMPS(PM8901_S4, 0, 1, 0, 1225000, 1225000, FTS_HMIN, 1p60),
4101
4102 /* ID a_on pd ss */
4103 RPM_VS(PM8901_LVS0, 1, 1, 0),
4104 RPM_VS(PM8901_LVS1, 0, 1, 0),
4105 RPM_VS(PM8901_LVS2, 0, 1, 0),
4106 RPM_VS(PM8901_LVS3, 0, 1, 0),
4107 RPM_VS(PM8901_MVS0, 0, 1, 0),
4108
4109 /* ID a_on pin_func pin_ctrl */
4110 RPM_PC(PM8058_L8, 0, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4111 RPM_PC(PM8058_L20, 0, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4112 RPM_PC(PM8058_L21, 1, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4113 RPM_PC(PM8058_S2, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8058_A0),
4114 RPM_PC(PM8901_L0, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8901_A0),
4115 RPM_PC(PM8901_S4, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8901_A0),
4116};
4117
4118static struct rpm_regulator_platform_data rpm_regulator_early_pdata = {
4119 .init_data = rpm_regulator_early_init_data,
4120 .num_regulators = ARRAY_SIZE(rpm_regulator_early_init_data),
4121 .version = RPM_VREG_VERSION_8660,
4122 .vreg_id_vdd_mem = RPM_VREG_ID_PM8058_S0,
4123 .vreg_id_vdd_dig = RPM_VREG_ID_PM8058_S1,
4124};
4125
4126static struct rpm_regulator_platform_data rpm_regulator_pdata = {
4127 .init_data = rpm_regulator_init_data,
4128 .num_regulators = ARRAY_SIZE(rpm_regulator_init_data),
4129 .version = RPM_VREG_VERSION_8660,
4130};
4131
4132static struct platform_device rpm_regulator_early_device = {
4133 .name = "rpm-regulator",
4134 .id = 0,
4135 .dev = {
4136 .platform_data = &rpm_regulator_early_pdata,
4137 },
4138};
4139
4140static struct platform_device rpm_regulator_device = {
4141 .name = "rpm-regulator",
4142 .id = 1,
4143 .dev = {
4144 .platform_data = &rpm_regulator_pdata,
4145 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004146};
4147
4148static struct platform_device *early_regulators[] __initdata = {
4149 &msm_device_saw_s0,
4150 &msm_device_saw_s1,
David Collins6f032ba2011-08-31 14:08:15 -07004151 &rpm_regulator_early_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004152};
4153
4154static struct platform_device *early_devices[] __initdata = {
4155#ifdef CONFIG_MSM_BUS_SCALING
4156 &msm_bus_apps_fabric,
4157 &msm_bus_sys_fabric,
4158 &msm_bus_mm_fabric,
4159 &msm_bus_sys_fpb,
4160 &msm_bus_cpss_fpb,
4161#endif
4162 &msm_device_dmov_adm0,
4163 &msm_device_dmov_adm1,
4164};
4165
4166#if (defined(CONFIG_MARIMBA_CORE)) && \
4167 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
4168
4169static int bluetooth_power(int);
4170static struct platform_device msm_bt_power_device = {
4171 .name = "bt_power",
4172 .id = -1,
4173 .dev = {
4174 .platform_data = &bluetooth_power,
4175 },
4176};
4177#endif
4178
4179static struct platform_device msm_tsens_device = {
4180 .name = "tsens-tm",
4181 .id = -1,
4182};
4183
4184static struct platform_device *rumi_sim_devices[] __initdata = {
4185 &smc91x_device,
4186 &msm_device_uart_dm12,
4187#ifdef CONFIG_I2C_QUP
4188 &msm_gsbi3_qup_i2c_device,
4189 &msm_gsbi4_qup_i2c_device,
4190 &msm_gsbi7_qup_i2c_device,
4191 &msm_gsbi8_qup_i2c_device,
4192 &msm_gsbi9_qup_i2c_device,
4193 &msm_gsbi12_qup_i2c_device,
4194#endif
4195#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004196 &msm_device_ssbi3,
4197#endif
4198#ifdef CONFIG_ANDROID_PMEM
Laura Abbottdf8b8a82011-11-02 23:13:45 -07004199#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004200 &android_pmem_device,
4201 &android_pmem_adsp_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004202 &android_pmem_smipool_device,
4203#endif
Laura Abbottdf8b8a82011-11-02 23:13:45 -07004204 &android_pmem_audio_device,
4205#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004206#ifdef CONFIG_MSM_ROTATOR
4207 &msm_rotator_device,
4208#endif
4209 &msm_fb_device,
4210 &msm_kgsl_3d0,
4211 &msm_kgsl_2d0,
4212 &msm_kgsl_2d1,
4213 &lcdc_samsung_panel_device,
4214#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
4215 &hdmi_msm_device,
4216#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
4217#ifdef CONFIG_MSM_CAMERA
4218#ifdef CONFIG_MT9E013
4219 &msm_camera_sensor_mt9e013,
4220#endif
4221#ifdef CONFIG_IMX074
4222 &msm_camera_sensor_imx074,
4223#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04004224#ifdef CONFIG_VX6953
4225 &msm_camera_sensor_vx6953,
4226#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004227#ifdef CONFIG_WEBCAM_OV7692
4228 &msm_camera_sensor_webcam_ov7692,
4229#endif
4230#ifdef CONFIG_WEBCAM_OV9726
4231 &msm_camera_sensor_webcam_ov9726,
4232#endif
4233#ifdef CONFIG_QS_S5K4E1
4234 &msm_camera_sensor_qs_s5k4e1,
4235#endif
4236#endif
4237#ifdef CONFIG_MSM_GEMINI
4238 &msm_gemini_device,
4239#endif
4240#ifdef CONFIG_MSM_VPE
4241 &msm_vpe_device,
4242#endif
4243 &msm_device_vidc,
4244};
4245
4246#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
4247enum {
4248 SX150X_CORE,
4249 SX150X_DOCKING,
4250 SX150X_SURF,
4251 SX150X_LEFT_FHA,
4252 SX150X_RIGHT_FHA,
4253 SX150X_SOUTH,
4254 SX150X_NORTH,
4255 SX150X_CORE_FLUID,
4256};
4257
4258static struct sx150x_platform_data sx150x_data[] __initdata = {
4259 [SX150X_CORE] = {
4260 .gpio_base = GPIO_CORE_EXPANDER_BASE,
4261 .oscio_is_gpo = false,
4262 .io_pullup_ena = 0x0c08,
4263 .io_pulldn_ena = 0x4060,
4264 .io_open_drain_ena = 0x000c,
4265 .io_polarity = 0,
4266 .irq_summary = -1, /* see fixup_i2c_configs() */
4267 .irq_base = GPIO_EXPANDER_IRQ_BASE,
4268 },
4269 [SX150X_DOCKING] = {
4270 .gpio_base = GPIO_DOCKING_EXPANDER_BASE,
4271 .oscio_is_gpo = false,
4272 .io_pullup_ena = 0x5e06,
4273 .io_pulldn_ena = 0x81b8,
4274 .io_open_drain_ena = 0,
4275 .io_polarity = 0,
4276 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4277 UI_INT2_N),
4278 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4279 GPIO_DOCKING_EXPANDER_BASE -
4280 GPIO_EXPANDER_GPIO_BASE,
4281 },
4282 [SX150X_SURF] = {
4283 .gpio_base = GPIO_SURF_EXPANDER_BASE,
4284 .oscio_is_gpo = false,
4285 .io_pullup_ena = 0,
4286 .io_pulldn_ena = 0,
4287 .io_open_drain_ena = 0,
4288 .io_polarity = 0,
4289 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4290 UI_INT1_N),
4291 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4292 GPIO_SURF_EXPANDER_BASE -
4293 GPIO_EXPANDER_GPIO_BASE,
4294 },
4295 [SX150X_LEFT_FHA] = {
4296 .gpio_base = GPIO_LEFT_KB_EXPANDER_BASE,
4297 .oscio_is_gpo = false,
4298 .io_pullup_ena = 0,
4299 .io_pulldn_ena = 0x40,
4300 .io_open_drain_ena = 0,
4301 .io_polarity = 0,
4302 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4303 UI_INT3_N),
4304 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4305 GPIO_LEFT_KB_EXPANDER_BASE -
4306 GPIO_EXPANDER_GPIO_BASE,
4307 },
4308 [SX150X_RIGHT_FHA] = {
4309 .gpio_base = GPIO_RIGHT_KB_EXPANDER_BASE,
4310 .oscio_is_gpo = true,
4311 .io_pullup_ena = 0,
4312 .io_pulldn_ena = 0,
4313 .io_open_drain_ena = 0,
4314 .io_polarity = 0,
4315 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4316 UI_INT3_N),
4317 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4318 GPIO_RIGHT_KB_EXPANDER_BASE -
4319 GPIO_EXPANDER_GPIO_BASE,
4320 },
4321 [SX150X_SOUTH] = {
4322 .gpio_base = GPIO_SOUTH_EXPANDER_BASE,
4323 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4324 GPIO_SOUTH_EXPANDER_BASE -
4325 GPIO_EXPANDER_GPIO_BASE,
4326 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT3_N),
4327 },
4328 [SX150X_NORTH] = {
4329 .gpio_base = GPIO_NORTH_EXPANDER_BASE,
4330 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4331 GPIO_NORTH_EXPANDER_BASE -
4332 GPIO_EXPANDER_GPIO_BASE,
4333 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT3_N),
4334 .oscio_is_gpo = true,
4335 .io_open_drain_ena = 0x30,
4336 },
4337 [SX150X_CORE_FLUID] = {
4338 .gpio_base = GPIO_CORE_EXPANDER_BASE,
4339 .oscio_is_gpo = false,
4340 .io_pullup_ena = 0x0408,
4341 .io_pulldn_ena = 0x4060,
4342 .io_open_drain_ena = 0x0008,
4343 .io_polarity = 0,
4344 .irq_summary = -1, /* see fixup_i2c_configs() */
4345 .irq_base = GPIO_EXPANDER_IRQ_BASE,
4346 },
4347};
4348
4349#ifdef CONFIG_SENSORS_MSM_ADC
4350/* Configuration of EPM expander is done when client
4351 * request an adc read
4352 */
4353static struct sx150x_platform_data sx150x_epmdata = {
4354 .gpio_base = GPIO_EPM_EXPANDER_BASE,
4355 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4356 GPIO_EPM_EXPANDER_BASE -
4357 GPIO_EXPANDER_GPIO_BASE,
4358 .irq_summary = -1,
4359};
4360#endif
4361
4362/* sx150x_low_power_cfg
4363 *
4364 * This data and init function are used to put unused gpio-expander output
4365 * lines into their low-power states at boot. The init
4366 * function must be deferred until a later init stage because the i2c
4367 * gpio expander drivers do not probe until after they are registered
4368 * (see register_i2c_devices) and the work-queues for those registrations
4369 * are processed. Because these lines are unused, there is no risk of
4370 * competing with a device driver for the gpio.
4371 *
4372 * gpio lines whose low-power states are input are naturally in their low-
4373 * power configurations once probed, see the platform data structures above.
4374 */
4375struct sx150x_low_power_cfg {
4376 unsigned gpio;
4377 unsigned val;
4378};
4379
4380static struct sx150x_low_power_cfg
4381common_sx150x_lp_cfgs[] __initdata = {
4382 {GPIO_WLAN_DEEP_SLEEP_N, 0},
4383 {GPIO_EXT_GPS_LNA_EN, 0},
4384 {GPIO_MSM_WAKES_BT, 0},
4385 {GPIO_USB_UICC_EN, 0},
4386 {GPIO_BATT_GAUGE_EN, 0},
4387};
4388
4389static struct sx150x_low_power_cfg
4390surf_ffa_sx150x_lp_cfgs[] __initdata = {
4391 {GPIO_MIPI_DSI_RST_N, 0},
4392 {GPIO_DONGLE_PWR_EN, 0},
4393 {GPIO_CAP_TS_SLEEP, 1},
4394 {GPIO_WEB_CAMIF_RESET_N, 0},
4395};
4396
4397static void __init
4398cfg_gpio_low_power(struct sx150x_low_power_cfg *cfgs, unsigned nelems)
4399{
4400 unsigned n;
4401 int rc;
4402
4403 for (n = 0; n < nelems; ++n) {
4404 rc = gpio_request(cfgs[n].gpio, NULL);
4405 if (!rc) {
4406 rc = gpio_direction_output(cfgs[n].gpio, cfgs[n].val);
4407 gpio_free(cfgs[n].gpio);
4408 }
4409
4410 if (rc) {
4411 printk(KERN_NOTICE "%s: failed to sleep gpio %d: %d\n",
4412 __func__, cfgs[n].gpio, rc);
4413 }
Steve Muckle9161d302010-02-11 11:50:40 -08004414 }
Steve Mucklea55df6e2010-01-07 12:43:24 -08004415}
4416
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004417static int __init cfg_sx150xs_low_power(void)
Steve Mucklea55df6e2010-01-07 12:43:24 -08004418{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004419 cfg_gpio_low_power(common_sx150x_lp_cfgs,
4420 ARRAY_SIZE(common_sx150x_lp_cfgs));
4421 if (!machine_is_msm8x60_fluid())
4422 cfg_gpio_low_power(surf_ffa_sx150x_lp_cfgs,
4423 ARRAY_SIZE(surf_ffa_sx150x_lp_cfgs));
4424 return 0;
4425}
4426module_init(cfg_sx150xs_low_power);
4427
4428#ifdef CONFIG_I2C
4429static struct i2c_board_info core_expander_i2c_info[] __initdata = {
4430 {
4431 I2C_BOARD_INFO("sx1509q", 0x3e),
4432 .platform_data = &sx150x_data[SX150X_CORE]
4433 },
4434};
4435
4436static struct i2c_board_info docking_expander_i2c_info[] __initdata = {
4437 {
4438 I2C_BOARD_INFO("sx1509q", 0x3f),
4439 .platform_data = &sx150x_data[SX150X_DOCKING]
4440 },
4441};
4442
4443static struct i2c_board_info surf_expanders_i2c_info[] __initdata = {
4444 {
4445 I2C_BOARD_INFO("sx1509q", 0x70),
4446 .platform_data = &sx150x_data[SX150X_SURF]
4447 }
4448};
4449
4450static struct i2c_board_info fha_expanders_i2c_info[] __initdata = {
4451 {
4452 I2C_BOARD_INFO("sx1508q", 0x21),
4453 .platform_data = &sx150x_data[SX150X_LEFT_FHA]
4454 },
4455 {
4456 I2C_BOARD_INFO("sx1508q", 0x22),
4457 .platform_data = &sx150x_data[SX150X_RIGHT_FHA]
4458 }
4459};
4460
4461static struct i2c_board_info fluid_expanders_i2c_info[] __initdata = {
4462 {
4463 I2C_BOARD_INFO("sx1508q", 0x23),
4464 .platform_data = &sx150x_data[SX150X_SOUTH]
4465 },
4466 {
4467 I2C_BOARD_INFO("sx1508q", 0x20),
4468 .platform_data = &sx150x_data[SX150X_NORTH]
4469 }
4470};
4471
4472static struct i2c_board_info fluid_core_expander_i2c_info[] __initdata = {
4473 {
4474 I2C_BOARD_INFO("sx1509q", 0x3e),
4475 .platform_data = &sx150x_data[SX150X_CORE_FLUID]
4476 },
4477};
4478
4479#ifdef CONFIG_SENSORS_MSM_ADC
4480static struct i2c_board_info fluid_expanders_i2c_epm_info[] = {
4481 {
4482 I2C_BOARD_INFO("sx1509q", 0x3e),
4483 .platform_data = &sx150x_epmdata
4484 },
4485};
4486#endif
4487#endif
4488#endif
4489
4490#ifdef CONFIG_SENSORS_MSM_ADC
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004491
4492static struct adc_access_fn xoadc_fn = {
4493 pm8058_xoadc_select_chan_and_start_conv,
4494 pm8058_xoadc_read_adc_code,
4495 pm8058_xoadc_get_properties,
4496 pm8058_xoadc_slot_request,
4497 pm8058_xoadc_restore_slot,
4498 pm8058_xoadc_calibrate,
4499};
4500
4501#if defined(CONFIG_I2C) && \
4502 (defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE))
4503static struct regulator *vreg_adc_epm1;
4504
4505static struct i2c_client *epm_expander_i2c_register_board(void)
4506
4507{
4508 struct i2c_adapter *i2c_adap;
4509 struct i2c_client *client = NULL;
4510 i2c_adap = i2c_get_adapter(0x0);
4511
4512 if (i2c_adap == NULL)
4513 printk(KERN_ERR "\nepm_expander_i2c_adapter is NULL\n");
4514
4515 if (i2c_adap != NULL)
4516 client = i2c_new_device(i2c_adap,
4517 &fluid_expanders_i2c_epm_info[0]);
4518 return client;
4519
4520}
4521
4522static unsigned int msm_adc_gpio_configure_expander_enable(void)
4523{
4524 int rc = 0;
4525 static struct i2c_client *epm_i2c_client;
4526
4527 printk(KERN_DEBUG "Enter msm_adc_gpio_configure_expander_enable\n");
4528
4529 vreg_adc_epm1 = regulator_get(NULL, "8058_s3");
4530
4531 if (IS_ERR(vreg_adc_epm1)) {
4532 printk(KERN_ERR "%s: Unable to get 8058_s3\n", __func__);
4533 return 0;
4534 }
4535
4536 rc = regulator_set_voltage(vreg_adc_epm1, 1800000, 1800000);
4537 if (rc)
4538 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4539 "regulator set voltage failed\n");
4540
4541 rc = regulator_enable(vreg_adc_epm1);
4542 if (rc) {
4543 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4544 "Error while enabling regulator for epm s3 %d\n", rc);
4545 return rc;
4546 }
4547
4548 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: Start"
4549 " setting the value of the EPM 3.3, 5v and lvlsft\n");
4550
4551 msleep(1000);
4552
4553 rc = gpio_request(GPIO_EPM_5V_BOOST_EN, "boost_epm_5v");
4554 if (!rc) {
4555 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4556 "Configure 5v boost\n");
4557 gpio_direction_output(GPIO_EPM_5V_BOOST_EN, 1);
4558 } else {
4559 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4560 "Error for epm 5v boost en\n");
4561 goto exit_vreg_epm;
4562 }
4563
4564 msleep(500);
4565
4566 rc = gpio_request(GPIO_EPM_3_3V_EN, "epm_3_3v");
4567 if (!rc) {
4568 gpio_direction_output(GPIO_EPM_3_3V_EN, 1);
4569 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4570 "Configure epm 3.3v\n");
4571 } else {
4572 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4573 "Error for gpio 3.3ven\n");
4574 goto exit_vreg_epm;
4575 }
4576 msleep(500);
4577
4578 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4579 "Trying to request EPM LVLSFT_EN\n");
4580 rc = gpio_request(GPIO_EPM_LVLSFT_EN, "lvsft_en");
4581 if (!rc) {
4582 gpio_direction_output(GPIO_EPM_LVLSFT_EN, 1);
4583 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4584 "Configure the lvlsft\n");
4585 } else {
4586 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4587 "Error for epm lvlsft_en\n");
4588 goto exit_vreg_epm;
4589 }
4590
4591 msleep(500);
4592
4593 if (!epm_i2c_client)
4594 epm_i2c_client = epm_expander_i2c_register_board();
4595
4596 rc = gpio_request(GPIO_PWR_MON_ENABLE, "pwr_mon_enable");
4597 if (!rc)
4598 rc = gpio_direction_output(GPIO_PWR_MON_ENABLE, 1);
4599 if (rc) {
4600 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4601 ": GPIO PWR MON Enable issue\n");
4602 goto exit_vreg_epm;
4603 }
4604
4605 msleep(1000);
4606
4607 rc = gpio_request(GPIO_ADC1_PWDN_N, "adc1_pwdn");
4608 if (!rc) {
4609 rc = gpio_direction_output(GPIO_ADC1_PWDN_N, 1);
4610 if (rc) {
4611 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4612 ": ADC1_PWDN error direction out\n");
4613 goto exit_vreg_epm;
4614 }
4615 }
4616
4617 msleep(100);
4618
4619 rc = gpio_request(GPIO_ADC2_PWDN_N, "adc2_pwdn");
4620 if (!rc) {
4621 rc = gpio_direction_output(GPIO_ADC2_PWDN_N, 1);
4622 if (rc) {
4623 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4624 ": ADC2_PWD error direction out\n");
4625 goto exit_vreg_epm;
4626 }
4627 }
4628
4629 msleep(1000);
4630
4631 rc = gpio_request(GPIO_PWR_MON_START, "pwr_mon_start");
4632 if (!rc) {
4633 rc = gpio_direction_output(GPIO_PWR_MON_START, 0);
4634 if (rc) {
4635 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4636 "Gpio request problem %d\n", rc);
4637 goto exit_vreg_epm;
4638 }
4639 }
4640
4641 rc = gpio_request(GPIO_EPM_SPI_ADC1_CS_N, "spi_adc1_cs");
4642 if (!rc) {
4643 rc = gpio_direction_output(GPIO_EPM_SPI_ADC1_CS_N, 0);
4644 if (rc) {
4645 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4646 ": EPM_SPI_ADC1_CS_N error\n");
4647 goto exit_vreg_epm;
4648 }
4649 }
4650
4651 rc = gpio_request(GPIO_EPM_SPI_ADC2_CS_N, "spi_adc2_cs");
4652 if (!rc) {
4653 rc = gpio_direction_output(GPIO_EPM_SPI_ADC2_CS_N, 0);
4654 if (rc) {
4655 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4656 ": EPM_SPI_ADC2_Cs_N error\n");
4657 goto exit_vreg_epm;
4658 }
4659 }
4660
4661 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: Set "
4662 "the power monitor reset for epm\n");
4663
4664 rc = gpio_request(GPIO_PWR_MON_RESET_N, "pwr_mon_reset_n");
4665 if (!rc) {
4666 gpio_direction_output(GPIO_PWR_MON_RESET_N, 0);
4667 if (rc) {
4668 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4669 ": Error in the power mon reset\n");
4670 goto exit_vreg_epm;
4671 }
4672 }
4673
4674 msleep(1000);
4675
4676 gpio_set_value_cansleep(GPIO_PWR_MON_RESET_N, 1);
4677
4678 msleep(500);
4679
4680 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4681
4682 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4683
4684 return rc;
4685
4686exit_vreg_epm:
4687 regulator_disable(vreg_adc_epm1);
4688
4689 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: Exit."
4690 " rc = %d.\n", rc);
4691 return rc;
4692};
4693
4694static unsigned int msm_adc_gpio_configure_expander_disable(void)
4695{
4696 int rc = 0;
4697
4698 gpio_set_value_cansleep(GPIO_PWR_MON_RESET_N, 0);
4699 gpio_free(GPIO_PWR_MON_RESET_N);
4700
4701 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 0);
4702 gpio_free(GPIO_EPM_SPI_ADC1_CS_N);
4703
4704 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 0);
4705 gpio_free(GPIO_EPM_SPI_ADC2_CS_N);
4706
4707 gpio_set_value_cansleep(GPIO_PWR_MON_START, 0);
4708 gpio_free(GPIO_PWR_MON_START);
4709
4710 gpio_direction_output(GPIO_ADC1_PWDN_N, 0);
4711 gpio_free(GPIO_ADC1_PWDN_N);
4712
4713 gpio_direction_output(GPIO_ADC2_PWDN_N, 0);
4714 gpio_free(GPIO_ADC2_PWDN_N);
4715
4716 gpio_set_value_cansleep(GPIO_PWR_MON_ENABLE, 0);
4717 gpio_free(GPIO_PWR_MON_ENABLE);
4718
4719 gpio_set_value_cansleep(GPIO_EPM_LVLSFT_EN, 0);
4720 gpio_free(GPIO_EPM_LVLSFT_EN);
4721
4722 gpio_set_value_cansleep(GPIO_EPM_5V_BOOST_EN, 0);
4723 gpio_free(GPIO_EPM_5V_BOOST_EN);
4724
4725 gpio_set_value_cansleep(GPIO_EPM_3_3V_EN, 0);
4726 gpio_free(GPIO_EPM_3_3V_EN);
4727
4728 rc = regulator_disable(vreg_adc_epm1);
4729 if (rc)
4730 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_disable: "
4731 "Error while enabling regulator for epm s3 %d\n", rc);
4732 regulator_put(vreg_adc_epm1);
4733
4734 printk(KERN_DEBUG "Exi msm_adc_gpio_configure_expander_disable\n");
4735 return rc;
4736};
4737
4738unsigned int msm_adc_gpio_expander_enable(int cs_enable)
4739{
4740 int rc = 0;
4741
4742 printk(KERN_DEBUG "msm_adc_gpio_expander_enable: cs_enable = %d",
4743 cs_enable);
4744
4745 if (cs_enable < 16) {
4746 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 0);
4747 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4748 } else {
4749 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 0);
4750 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4751 }
4752 return rc;
4753};
4754
4755unsigned int msm_adc_gpio_expander_disable(int cs_disable)
4756{
4757 int rc = 0;
4758
4759 printk(KERN_DEBUG "Enter msm_adc_gpio_expander_disable.\n");
4760
4761 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4762
4763 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4764
4765 return rc;
4766};
4767#endif
4768
4769static struct msm_adc_channels msm_adc_channels_data[] = {
4770 {"vbatt", CHANNEL_ADC_VBATT, 0, &xoadc_fn, CHAN_PATH_TYPE2,
4771 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4772 {"vcoin", CHANNEL_ADC_VCOIN, 0, &xoadc_fn, CHAN_PATH_TYPE1,
4773 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4774 {"vcharger_channel", CHANNEL_ADC_VCHG, 0, &xoadc_fn, CHAN_PATH_TYPE3,
4775 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE4, scale_default},
4776 {"charger_current_monitor", CHANNEL_ADC_CHG_MONITOR, 0, &xoadc_fn,
4777 CHAN_PATH_TYPE4,
4778 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_default},
4779 {"vph_pwr", CHANNEL_ADC_VPH_PWR, 0, &xoadc_fn, CHAN_PATH_TYPE5,
4780 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4781 {"usb_vbus", CHANNEL_ADC_USB_VBUS, 0, &xoadc_fn, CHAN_PATH_TYPE11,
4782 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4783 {"pmic_therm", CHANNEL_ADC_DIE_TEMP, 0, &xoadc_fn, CHAN_PATH_TYPE12,
4784 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_pmic_therm},
4785 {"pmic_therm_4K", CHANNEL_ADC_DIE_TEMP_4K, 0, &xoadc_fn,
4786 CHAN_PATH_TYPE12,
4787 ADC_CONFIG_TYPE1, ADC_CALIB_CONFIG_TYPE7, scale_pmic_therm},
4788 {"xo_therm", CHANNEL_ADC_XOTHERM, 0, &xoadc_fn, CHAN_PATH_TYPE_NONE,
4789 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE5, tdkntcgtherm},
4790 {"xo_therm_4K", CHANNEL_ADC_XOTHERM_4K, 0, &xoadc_fn,
4791 CHAN_PATH_TYPE_NONE,
4792 ADC_CONFIG_TYPE1, ADC_CALIB_CONFIG_TYPE6, tdkntcgtherm},
4793 {"hdset_detect", CHANNEL_ADC_HDSET, 0, &xoadc_fn, CHAN_PATH_TYPE6,
4794 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_default},
4795 {"chg_batt_amon", CHANNEL_ADC_BATT_AMON, 0, &xoadc_fn, CHAN_PATH_TYPE10,
4796 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1,
4797 scale_xtern_chgr_cur},
4798 {"msm_therm", CHANNEL_ADC_MSM_THERM, 0, &xoadc_fn, CHAN_PATH_TYPE8,
4799 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_msm_therm},
4800 {"batt_therm", CHANNEL_ADC_BATT_THERM, 0, &xoadc_fn, CHAN_PATH_TYPE7,
4801 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_batt_therm},
4802 {"batt_id", CHANNEL_ADC_BATT_ID, 0, &xoadc_fn, CHAN_PATH_TYPE9,
4803 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4804 {"ref_625mv", CHANNEL_ADC_625_REF, 0, &xoadc_fn, CHAN_PATH_TYPE15,
4805 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4806 {"ref_1250mv", CHANNEL_ADC_1250_REF, 0, &xoadc_fn, CHAN_PATH_TYPE13,
4807 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4808 {"ref_325mv", CHANNEL_ADC_325_REF, 0, &xoadc_fn, CHAN_PATH_TYPE14,
4809 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4810};
4811
4812static char *msm_adc_fluid_device_names[] = {
4813 "ADS_ADC1",
4814 "ADS_ADC2",
4815};
4816
4817static struct msm_adc_platform_data msm_adc_pdata = {
4818 .channel = msm_adc_channels_data,
4819 .num_chan_supported = ARRAY_SIZE(msm_adc_channels_data),
4820#if defined(CONFIG_I2C) && \
4821 (defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE))
4822 .adc_gpio_enable = msm_adc_gpio_expander_enable,
4823 .adc_gpio_disable = msm_adc_gpio_expander_disable,
4824 .adc_fluid_enable = msm_adc_gpio_configure_expander_enable,
4825 .adc_fluid_disable = msm_adc_gpio_configure_expander_disable,
4826#endif
4827};
4828
4829static struct platform_device msm_adc_device = {
4830 .name = "msm_adc",
4831 .id = -1,
4832 .dev = {
4833 .platform_data = &msm_adc_pdata,
4834 },
4835};
4836
4837static void pmic8058_xoadc_mpp_config(void)
4838{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304839 int rc, i;
4840 struct pm8xxx_mpp_init_info xoadc_mpps[] = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304841 PM8058_MPP_INIT(XOADC_MPP_3, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304842 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304843 PM8058_MPP_INIT(XOADC_MPP_5, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH9,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304844 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304845 PM8058_MPP_INIT(XOADC_MPP_7, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH6,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304846 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304847 PM8058_MPP_INIT(XOADC_MPP_8, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH8,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304848 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304849 PM8058_MPP_INIT(XOADC_MPP_10, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH7,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304850 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304851 PM8901_MPP_INIT(XOADC_MPP_4, D_OUTPUT, PM8901_MPP_DIG_LEVEL_S4,
4852 DOUT_CTRL_LOW),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304853 };
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004854
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304855 for (i = 0; i < ARRAY_SIZE(xoadc_mpps); i++) {
4856 rc = pm8xxx_mpp_config(xoadc_mpps[i].mpp,
4857 &xoadc_mpps[i].config);
4858 if (rc) {
4859 pr_err("%s: Config MPP %d of PM8058 failed\n",
4860 __func__, xoadc_mpps[i].mpp);
4861 }
4862 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004863}
4864
4865static struct regulator *vreg_ldo18_adc;
4866
4867static int pmic8058_xoadc_vreg_config(int on)
4868{
4869 int rc;
4870
4871 if (on) {
4872 rc = regulator_enable(vreg_ldo18_adc);
4873 if (rc)
4874 pr_err("%s: Enable of regulator ldo18_adc "
4875 "failed\n", __func__);
4876 } else {
4877 rc = regulator_disable(vreg_ldo18_adc);
4878 if (rc)
4879 pr_err("%s: Disable of regulator ldo18_adc "
4880 "failed\n", __func__);
4881 }
4882
4883 return rc;
4884}
4885
4886static int pmic8058_xoadc_vreg_setup(void)
4887{
4888 int rc;
4889
4890 vreg_ldo18_adc = regulator_get(NULL, "8058_l18");
4891 if (IS_ERR(vreg_ldo18_adc)) {
4892 printk(KERN_ERR "%s: vreg get failed (%ld)\n",
4893 __func__, PTR_ERR(vreg_ldo18_adc));
4894 rc = PTR_ERR(vreg_ldo18_adc);
4895 goto fail;
4896 }
4897
4898 rc = regulator_set_voltage(vreg_ldo18_adc, 2200000, 2200000);
4899 if (rc) {
4900 pr_err("%s: unable to set ldo18 voltage to 2.2V\n", __func__);
4901 goto fail;
4902 }
4903
4904 return rc;
4905fail:
4906 regulator_put(vreg_ldo18_adc);
4907 return rc;
4908}
4909
4910static void pmic8058_xoadc_vreg_shutdown(void)
4911{
4912 regulator_put(vreg_ldo18_adc);
4913}
4914
4915/* usec. For this ADC,
4916 * this time represents clk rate @ txco w/ 1024 decimation ratio.
4917 * Each channel has different configuration, thus at the time of starting
4918 * the conversion, xoadc will return actual conversion time
4919 * */
4920static struct adc_properties pm8058_xoadc_data = {
4921 .adc_reference = 2200, /* milli-voltage for this adc */
4922 .bitresolution = 15,
4923 .bipolar = 0,
4924 .conversiontime = 54,
4925};
4926
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304927static struct xoadc_platform_data pm8058_xoadc_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004928 .xoadc_prop = &pm8058_xoadc_data,
4929 .xoadc_mpp_config = pmic8058_xoadc_mpp_config,
4930 .xoadc_vreg_set = pmic8058_xoadc_vreg_config,
4931 .xoadc_num = XOADC_PMIC_0,
4932 .xoadc_vreg_setup = pmic8058_xoadc_vreg_setup,
4933 .xoadc_vreg_shutdown = pmic8058_xoadc_vreg_shutdown,
4934};
4935#endif
4936
4937#ifdef CONFIG_MSM_SDIO_AL
4938
4939static unsigned mdm2ap_status = 140;
4940
4941static int configure_mdm2ap_status(int on)
4942{
4943 int ret = 0;
4944 if (on)
4945 ret = msm_gpiomux_get(mdm2ap_status);
4946 else
4947 ret = msm_gpiomux_put(mdm2ap_status);
4948
4949 if (ret)
4950 pr_err("%s: mdm2ap_status config failed, on = %d\n", __func__,
4951 on);
4952
4953 return ret;
4954}
4955
4956
4957static int get_mdm2ap_status(void)
4958{
4959 return gpio_get_value(mdm2ap_status);
4960}
4961
4962static struct sdio_al_platform_data sdio_al_pdata = {
4963 .config_mdm2ap_status = configure_mdm2ap_status,
4964 .get_mdm2ap_status = get_mdm2ap_status,
4965 .allow_sdioc_version_major_2 = 0,
Konstantin Dorfmanee2e3082011-08-16 15:12:01 +03004966 .peer_sdioc_version_minor = 0x0202,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004967 .peer_sdioc_version_major = 0x0004,
4968 .peer_sdioc_boot_version_minor = 0x0001,
4969 .peer_sdioc_boot_version_major = 0x0003
4970};
4971
4972struct platform_device msm_device_sdio_al = {
4973 .name = "msm_sdio_al",
4974 .id = -1,
4975 .dev = {
Maya Erez6862b142011-08-22 09:07:07 +03004976 .parent = &msm_charm_modem.dev,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004977 .platform_data = &sdio_al_pdata,
4978 },
4979};
4980
4981#endif /* CONFIG_MSM_SDIO_AL */
4982
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304983#define GPIO_VREG_ID_EXT_5V 0
4984
4985static struct regulator_consumer_supply vreg_consumers_EXT_5V[] = {
4986 REGULATOR_SUPPLY("ext_5v", NULL),
4987 REGULATOR_SUPPLY("8901_mpp0", NULL),
4988};
4989
4990#define GPIO_VREG_INIT(_id, _reg_name, _gpio_label, _gpio, _active_low) \
4991 [GPIO_VREG_ID_##_id] = { \
4992 .init_data = { \
4993 .constraints = { \
4994 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
4995 }, \
4996 .num_consumer_supplies = \
4997 ARRAY_SIZE(vreg_consumers_##_id), \
4998 .consumer_supplies = vreg_consumers_##_id, \
4999 }, \
5000 .regulator_name = _reg_name, \
5001 .active_low = _active_low, \
5002 .gpio_label = _gpio_label, \
5003 .gpio = _gpio, \
5004 }
5005
5006/* GPIO regulator constraints */
5007static struct gpio_regulator_platform_data msm_gpio_regulator_pdata[] = {
5008 GPIO_VREG_INIT(EXT_5V, "ext_5v", "ext_5v_en",
5009 PM8901_MPP_PM_TO_SYS(0), 0),
5010};
5011
5012/* GPIO regulator */
5013static struct platform_device msm8x60_8901_mpp_vreg __devinitdata = {
5014 .name = GPIO_REGULATOR_DEV_NAME,
5015 .id = PM8901_MPP_PM_TO_SYS(0),
5016 .dev = {
5017 .platform_data =
5018 &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V],
5019 },
5020};
5021
5022static void __init pm8901_vreg_mpp0_init(void)
5023{
5024 int rc;
5025
5026 struct pm8xxx_mpp_init_info pm8901_vreg_mpp0 = {
5027 .mpp = PM8901_MPP_PM_TO_SYS(0),
5028 .config = {
5029 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
5030 .level = PM8901_MPP_DIG_LEVEL_VPH,
5031 },
5032 };
5033
5034 /*
5035 * Set PMIC 8901 MPP0 active_high to 0 for surf and charm_surf. This
5036 * implies that the regulator connected to MPP0 is enabled when
5037 * MPP0 is low.
5038 */
5039 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion()) {
5040 msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V].active_low = 1;
5041 pm8901_vreg_mpp0.config.control = PM8XXX_MPP_DOUT_CTRL_HIGH;
5042 } else {
5043 msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V].active_low = 0;
5044 pm8901_vreg_mpp0.config.control = PM8XXX_MPP_DOUT_CTRL_LOW;
5045 }
5046
5047 rc = pm8xxx_mpp_config(pm8901_vreg_mpp0.mpp, &pm8901_vreg_mpp0.config);
5048 if (rc)
5049 pr_err("%s: pm8xxx_mpp_config: rc=%d\n", __func__, rc);
5050}
5051
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005052static struct platform_device *charm_devices[] __initdata = {
5053 &msm_charm_modem,
5054#ifdef CONFIG_MSM_SDIO_AL
5055 &msm_device_sdio_al,
5056#endif
5057};
5058
Lei Zhou338cab82011-08-19 13:38:17 -04005059#ifdef CONFIG_SND_SOC_MSM8660_APQ
5060static struct platform_device *dragon_alsa_devices[] __initdata = {
5061 &msm_pcm,
5062 &msm_pcm_routing,
5063 &msm_cpudai0,
5064 &msm_cpudai1,
5065 &msm_cpudai_hdmi_rx,
5066 &msm_cpudai_bt_rx,
5067 &msm_cpudai_bt_tx,
5068 &msm_cpudai_fm_rx,
5069 &msm_cpudai_fm_tx,
5070 &msm_cpu_fe,
5071 &msm_stub_codec,
5072 &msm_lpa_pcm,
5073};
5074#endif
5075
5076static struct platform_device *asoc_devices[] __initdata = {
5077 &asoc_msm_pcm,
5078 &asoc_msm_dai0,
5079 &asoc_msm_dai1,
5080};
5081
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005082static struct platform_device *surf_devices[] __initdata = {
5083 &msm_device_smd,
5084 &msm_device_uart_dm12,
5085#ifdef CONFIG_I2C_QUP
5086 &msm_gsbi3_qup_i2c_device,
5087 &msm_gsbi4_qup_i2c_device,
5088 &msm_gsbi7_qup_i2c_device,
5089 &msm_gsbi8_qup_i2c_device,
5090 &msm_gsbi9_qup_i2c_device,
5091 &msm_gsbi12_qup_i2c_device,
5092#endif
5093#ifdef CONFIG_SERIAL_MSM_HS
5094 &msm_device_uart_dm1,
5095#endif
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05305096#ifdef CONFIG_MSM_SSBI
5097 &msm_device_ssbi_pmic1,
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05305098 &msm_device_ssbi_pmic2,
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05305099#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005100#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005101 &msm_device_ssbi3,
5102#endif
5103#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
5104 &isp1763_device,
5105#endif
5106
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005107#if defined (CONFIG_MSM_8x60_VOIP)
5108 &asoc_msm_mvs,
5109 &asoc_mvs_dai0,
5110 &asoc_mvs_dai1,
5111#endif
Lei Zhou338cab82011-08-19 13:38:17 -04005112
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005113#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_HCD)
5114 &msm_device_otg,
5115#endif
5116#ifdef CONFIG_USB_GADGET_MSM_72K
5117 &msm_device_gadget_peripheral,
5118#endif
5119#ifdef CONFIG_USB_G_ANDROID
5120 &android_usb_device,
5121#endif
5122#ifdef CONFIG_BATTERY_MSM
5123 &msm_batt_device,
5124#endif
5125#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005126#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005127 &android_pmem_device,
5128 &android_pmem_adsp_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005129 &android_pmem_smipool_device,
5130#endif
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005131 &android_pmem_audio_device,
5132#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005133#ifdef CONFIG_MSM_ROTATOR
5134 &msm_rotator_device,
5135#endif
5136 &msm_fb_device,
5137 &msm_kgsl_3d0,
5138 &msm_kgsl_2d0,
5139 &msm_kgsl_2d1,
5140 &lcdc_samsung_panel_device,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005141#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5142 &lcdc_nt35582_panel_device,
5143#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005144#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
5145 &lcdc_samsung_oled_panel_device,
5146#endif
5147#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
5148 &lcdc_auo_wvga_panel_device,
5149#endif
5150#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
5151 &hdmi_msm_device,
5152#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
5153#ifdef CONFIG_FB_MSM_MIPI_DSI
5154 &mipi_dsi_toshiba_panel_device,
5155 &mipi_dsi_novatek_panel_device,
5156#endif
5157#ifdef CONFIG_MSM_CAMERA
5158#ifdef CONFIG_MT9E013
5159 &msm_camera_sensor_mt9e013,
5160#endif
5161#ifdef CONFIG_IMX074
5162 &msm_camera_sensor_imx074,
5163#endif
5164#ifdef CONFIG_WEBCAM_OV7692
5165 &msm_camera_sensor_webcam_ov7692,
5166#endif
5167#ifdef CONFIG_WEBCAM_OV9726
5168 &msm_camera_sensor_webcam_ov9726,
5169#endif
5170#ifdef CONFIG_QS_S5K4E1
5171 &msm_camera_sensor_qs_s5k4e1,
5172#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04005173#ifdef CONFIG_VX6953
5174 &msm_camera_sensor_vx6953,
5175#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005176#endif
5177#ifdef CONFIG_MSM_GEMINI
5178 &msm_gemini_device,
5179#endif
5180#ifdef CONFIG_MSM_VPE
5181 &msm_vpe_device,
5182#endif
5183
5184#if defined(CONFIG_MSM_RPM_LOG) || defined(CONFIG_MSM_RPM_LOG_MODULE)
5185 &msm_rpm_log_device,
5186#endif
5187#if defined(CONFIG_MSM_RPM_STATS_LOG)
5188 &msm_rpm_stat_device,
5189#endif
5190 &msm_device_vidc,
5191#if (defined(CONFIG_MARIMBA_CORE)) && \
5192 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
5193 &msm_bt_power_device,
5194#endif
5195#ifdef CONFIG_SENSORS_MSM_ADC
5196 &msm_adc_device,
5197#endif
David Collins6f032ba2011-08-31 14:08:15 -07005198 &rpm_regulator_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005199
5200#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
5201 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
5202 &qcrypto_device,
5203#endif
5204
5205#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
5206 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
5207 &qcedev_device,
5208#endif
5209
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005210
5211#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
5212#ifdef CONFIG_MSM_USE_TSIF1
5213 &msm_device_tsif[1],
5214#else
5215 &msm_device_tsif[0],
5216#endif /* CONFIG_MSM_USE_TSIF1 */
5217#endif /* CONFIG_TSIF */
5218
5219#ifdef CONFIG_HW_RANDOM_MSM
5220 &msm_device_rng,
5221#endif
5222
5223 &msm_tsens_device,
Praveen Chidambaram043f4ce2011-08-02 09:37:59 -06005224 &msm_rpm_device,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005225#ifdef CONFIG_ION_MSM
5226 &ion_dev,
5227#endif
Jeff Ohlstein7e668552011-10-06 16:17:25 -07005228 &msm8660_device_watchdog,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005229};
5230
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005231#ifdef CONFIG_ION_MSM
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08005232static struct ion_platform_data ion_pdata = {
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005233 .nr = MSM_ION_HEAP_NUM,
5234 .heaps = {
5235 {
5236 .id = ION_HEAP_SYSTEM_ID,
5237 .type = ION_HEAP_TYPE_SYSTEM,
5238 .name = ION_VMALLOC_HEAP_NAME,
5239 },
5240 {
5241 .id = ION_HEAP_SYSTEM_CONTIG_ID,
5242 .type = ION_HEAP_TYPE_SYSTEM_CONTIG,
5243 .name = ION_KMALLOC_HEAP_NAME,
5244 },
5245#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
5246 {
5247 .id = ION_HEAP_EBI_ID,
5248 .type = ION_HEAP_TYPE_CARVEOUT,
5249 .name = ION_EBI1_HEAP_NAME,
5250 .size = MSM_ION_EBI_SIZE,
5251 .memory_type = ION_EBI_TYPE,
5252 },
5253 {
5254 .id = ION_HEAP_ADSP_ID,
5255 .type = ION_HEAP_TYPE_CARVEOUT,
5256 .name = ION_ADSP_HEAP_NAME,
5257 .size = MSM_ION_ADSP_SIZE,
5258 .memory_type = ION_EBI_TYPE,
5259 },
5260 {
5261 .id = ION_HEAP_SMI_ID,
5262 .type = ION_HEAP_TYPE_CARVEOUT,
5263 .name = ION_SMI_HEAP_NAME,
5264 .size = MSM_ION_SMI_SIZE,
5265 .memory_type = ION_SMI_TYPE,
5266 },
5267#endif
5268 }
5269};
5270
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08005271static struct platform_device ion_dev = {
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005272 .name = "ion-msm",
5273 .id = 1,
5274 .dev = { .platform_data = &ion_pdata },
5275};
5276#endif
5277
5278
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005279static struct memtype_reserve msm8x60_reserve_table[] __initdata = {
5280 /* Kernel SMI memory pool for video core, used for firmware */
5281 /* and encoder, decoder scratch buffers */
5282 /* Kernel SMI memory pool should always precede the user space */
5283 /* SMI memory pool, as the video core will use offset address */
5284 /* from the Firmware base */
5285 [MEMTYPE_SMI_KERNEL] = {
5286 .start = KERNEL_SMI_BASE,
5287 .limit = KERNEL_SMI_SIZE,
5288 .size = KERNEL_SMI_SIZE,
5289 .flags = MEMTYPE_FLAGS_FIXED,
5290 },
5291 /* User space SMI memory pool for video core */
5292 /* used for encoder, decoder input & output buffers */
5293 [MEMTYPE_SMI] = {
5294 .start = USER_SMI_BASE,
5295 .limit = USER_SMI_SIZE,
5296 .flags = MEMTYPE_FLAGS_FIXED,
5297 },
5298 [MEMTYPE_EBI0] = {
5299 .flags = MEMTYPE_FLAGS_1M_ALIGN,
5300 },
5301 [MEMTYPE_EBI1] = {
5302 .flags = MEMTYPE_FLAGS_1M_ALIGN,
5303 },
5304};
5305
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005306static void reserve_ion_memory(void)
5307{
5308#if defined(CONFIG_ION_MSM) && defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
5309 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_EBI_SIZE;
5310 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_ADSP_SIZE;
5311 msm8x60_reserve_table[MEMTYPE_SMI].size += MSM_ION_SMI_SIZE;
5312#endif
5313}
5314
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005315static void __init size_pmem_devices(void)
5316{
5317#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005318#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005319 android_pmem_adsp_pdata.size = pmem_adsp_size;
5320 android_pmem_smipool_pdata.size = MSM_PMEM_SMIPOOL_SIZE;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005321 android_pmem_pdata.size = pmem_sf_size;
5322#endif
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005323 android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE;
5324#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005325}
5326
5327static void __init reserve_memory_for(struct android_pmem_platform_data *p)
5328{
5329 msm8x60_reserve_table[p->memory_type].size += p->size;
5330}
5331
5332static void __init reserve_pmem_memory(void)
5333{
5334#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005335#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005336 reserve_memory_for(&android_pmem_adsp_pdata);
5337 reserve_memory_for(&android_pmem_smipool_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005338 reserve_memory_for(&android_pmem_pdata);
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005339#endif
5340 reserve_memory_for(&android_pmem_audio_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005341 msm8x60_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
5342#endif
5343}
5344
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005345
5346
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005347static void __init msm8x60_calculate_reserve_sizes(void)
5348{
5349 size_pmem_devices();
5350 reserve_pmem_memory();
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005351 reserve_ion_memory();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005352}
5353
5354static int msm8x60_paddr_to_memtype(unsigned int paddr)
5355{
5356 if (paddr >= 0x40000000 && paddr < 0x60000000)
5357 return MEMTYPE_EBI1;
5358 if (paddr >= 0x38000000 && paddr < 0x40000000)
5359 return MEMTYPE_SMI;
5360 return MEMTYPE_NONE;
5361}
5362
5363static struct reserve_info msm8x60_reserve_info __initdata = {
5364 .memtype_reserve_table = msm8x60_reserve_table,
5365 .calculate_reserve_sizes = msm8x60_calculate_reserve_sizes,
5366 .paddr_to_memtype = msm8x60_paddr_to_memtype,
5367};
5368
5369static void __init msm8x60_reserve(void)
5370{
5371 reserve_info = &msm8x60_reserve_info;
5372 msm_reserve();
5373}
5374
5375#define EXT_CHG_VALID_MPP 10
5376#define EXT_CHG_VALID_MPP_2 11
5377
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305378static struct pm8xxx_mpp_init_info isl_mpp[] = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05305379 PM8058_MPP_INIT(EXT_CHG_VALID_MPP, D_INPUT,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305380 PM8058_MPP_DIG_LEVEL_S3, DIN_TO_INT),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05305381 PM8058_MPP_INIT(EXT_CHG_VALID_MPP_2, D_BI_DIR,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305382 PM8058_MPP_DIG_LEVEL_S3, BI_PULLUP_10KOHM),
5383};
5384
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005385#ifdef CONFIG_ISL9519_CHARGER
5386static int isl_detection_setup(void)
5387{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305388 int ret = 0, i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005389
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305390 for (i = 0; i < ARRAY_SIZE(isl_mpp); i++) {
5391 ret = pm8xxx_mpp_config(isl_mpp[i].mpp,
5392 &isl_mpp[i].config);
5393 if (ret) {
5394 pr_err("%s: Config MPP %d of PM8058 failed\n",
5395 __func__, isl_mpp[i].mpp);
5396 return ret;
5397 }
5398 }
5399
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005400 return ret;
5401}
5402
5403static struct isl_platform_data isl_data __initdata = {
5404 .chgcurrent = 700,
5405 .valid_n_gpio = PM8058_MPP_PM_TO_SYS(10),
5406 .chg_detection_config = isl_detection_setup,
5407 .max_system_voltage = 4200,
5408 .min_system_voltage = 3200,
5409 .term_current = 120,
5410 .input_current = 2048,
5411};
5412
5413static struct i2c_board_info isl_charger_i2c_info[] __initdata = {
5414 {
5415 I2C_BOARD_INFO("isl9519q", 0x9),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305416 .irq = PM8058_IRQ_BASE + PM8058_CBLPWR_IRQ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005417 .platform_data = &isl_data,
5418 },
5419};
5420#endif
5421
5422#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
5423static int smb137b_detection_setup(void)
5424{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305425 int ret = 0, i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005426
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305427 for (i = 0; i < ARRAY_SIZE(isl_mpp); i++) {
5428 ret = pm8xxx_mpp_config(isl_mpp[i].mpp,
5429 &isl_mpp[i].config);
5430 if (ret) {
5431 pr_err("%s: Config MPP %d of PM8058 failed\n",
5432 __func__, isl_mpp[i].mpp);
5433 return ret;
5434 }
5435 }
5436
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005437 return ret;
5438}
5439
5440static struct smb137b_platform_data smb137b_data __initdata = {
5441 .chg_detection_config = smb137b_detection_setup,
5442 .valid_n_gpio = PM8058_MPP_PM_TO_SYS(10),
5443 .batt_mah_rating = 950,
5444};
5445
5446static struct i2c_board_info smb137b_charger_i2c_info[] __initdata = {
5447 {
5448 I2C_BOARD_INFO("smb137b", 0x08),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305449 .irq = PM8058_IRQ_BASE + PM8058_CBLPWR_IRQ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005450 .platform_data = &smb137b_data,
5451 },
5452};
5453#endif
5454
5455#ifdef CONFIG_PMIC8058
5456#define PMIC_GPIO_SDC3_DET 22
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305457#define PMIC_GPIO_TOUCH_DISC_INTR 5
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005458
5459static int pm8058_gpios_init(void)
5460{
5461 int i;
5462 int rc;
5463 struct pm8058_gpio_cfg {
5464 int gpio;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305465 struct pm_gpio cfg;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005466 };
5467
5468 struct pm8058_gpio_cfg gpio_cfgs[] = {
5469 { /* FFA ethernet */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305470 PM8058_GPIO_PM_TO_SYS(6),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005471 {
5472 .direction = PM_GPIO_DIR_IN,
5473 .pull = PM_GPIO_PULL_DN,
5474 .vin_sel = 2,
5475 .function = PM_GPIO_FUNC_NORMAL,
5476 .inv_int_pol = 0,
5477 },
5478 },
5479#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
5480 {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305481 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005482 {
5483 .direction = PM_GPIO_DIR_IN,
5484 .pull = PM_GPIO_PULL_UP_30,
5485 .vin_sel = 2,
5486 .function = PM_GPIO_FUNC_NORMAL,
5487 .inv_int_pol = 0,
5488 },
5489 },
5490#endif
5491 { /* core&surf gpio expander */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305492 PM8058_GPIO_PM_TO_SYS(UI_INT1_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005493 {
5494 .direction = PM_GPIO_DIR_IN,
5495 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305496 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005497 .function = PM_GPIO_FUNC_NORMAL,
5498 .inv_int_pol = 0,
5499 },
5500 },
5501 { /* docking gpio expander */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305502 PM8058_GPIO_PM_TO_SYS(UI_INT2_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005503 {
5504 .direction = PM_GPIO_DIR_IN,
5505 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305506 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005507 .function = PM_GPIO_FUNC_NORMAL,
5508 .inv_int_pol = 0,
5509 },
5510 },
5511 { /* FHA/keypad gpio expanders */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305512 PM8058_GPIO_PM_TO_SYS(UI_INT3_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005513 {
5514 .direction = PM_GPIO_DIR_IN,
5515 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305516 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005517 .function = PM_GPIO_FUNC_NORMAL,
5518 .inv_int_pol = 0,
5519 },
5520 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005521 { /* Timpani Reset */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305522 PM8058_GPIO_PM_TO_SYS(20),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005523 {
5524 .direction = PM_GPIO_DIR_OUT,
5525 .output_value = 1,
5526 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5527 .pull = PM_GPIO_PULL_DN,
5528 .out_strength = PM_GPIO_STRENGTH_HIGH,
5529 .function = PM_GPIO_FUNC_NORMAL,
5530 .vin_sel = 2,
5531 .inv_int_pol = 0,
5532 }
5533 },
5534 { /* PMIC ID interrupt */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305535 PM8058_GPIO_PM_TO_SYS(36),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005536 {
5537 .direction = PM_GPIO_DIR_IN,
Anji jonnalaae745e92011-11-14 18:34:31 +05305538 .pull = PM_GPIO_PULL_NO,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005539 .function = PM_GPIO_FUNC_NORMAL,
5540 .vin_sel = 2,
5541 .inv_int_pol = 0,
5542 }
5543 },
5544 };
5545
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305546#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
5547 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305548 struct pm_gpio touchdisc_intr_gpio_cfg = {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305549 .direction = PM_GPIO_DIR_IN,
5550 .pull = PM_GPIO_PULL_UP_1P5,
5551 .vin_sel = 2,
5552 .function = PM_GPIO_FUNC_NORMAL,
5553 };
5554#endif
5555
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005556#if defined(CONFIG_HAPTIC_ISA1200) || \
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305557 defined(CONFIG_HAPTIC_ISA1200_MODULE)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305558 struct pm_gpio en_hap_gpio_cfg = {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305559 .direction = PM_GPIO_DIR_OUT,
5560 .pull = PM_GPIO_PULL_NO,
5561 .out_strength = PM_GPIO_STRENGTH_HIGH,
5562 .function = PM_GPIO_FUNC_NORMAL,
5563 .inv_int_pol = 0,
5564 .vin_sel = 2,
5565 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5566 .output_value = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005567 };
5568#endif
5569
5570#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
5571 struct pm8058_gpio_cfg line_in_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305572 PM8058_GPIO_PM_TO_SYS(18),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005573 {
5574 .direction = PM_GPIO_DIR_IN,
5575 .pull = PM_GPIO_PULL_UP_1P5,
5576 .vin_sel = 2,
5577 .function = PM_GPIO_FUNC_NORMAL,
5578 .inv_int_pol = 0,
5579 }
5580 };
5581#endif
5582
5583#if defined(CONFIG_QS_S5K4E1)
5584 {
5585 struct pm8058_gpio_cfg qs_hc37_cam_pd_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305586 PM8058_GPIO_PM_TO_SYS(26),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005587 {
5588 .direction = PM_GPIO_DIR_OUT,
5589 .output_value = 0,
5590 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5591 .pull = PM_GPIO_PULL_DN,
5592 .out_strength = PM_GPIO_STRENGTH_HIGH,
5593 .function = PM_GPIO_FUNC_NORMAL,
5594 .vin_sel = 2,
5595 .inv_int_pol = 0,
5596 }
5597 };
5598#endif
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005599#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5600 struct pm8058_gpio_cfg pmic_lcdc_nt35582_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305601 PM8058_GPIO_PM_TO_SYS(GPIO_NT35582_BL_EN_HW_PIN - 1),
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005602 {
5603 .direction = PM_GPIO_DIR_OUT,
5604 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5605 .output_value = 1,
5606 .pull = PM_GPIO_PULL_UP_30,
5607 /* 2.9V PM_GPIO_VIN_L2, which gives 2.6V */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305608 .vin_sel = PM8058_GPIO_VIN_L5,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005609 .out_strength = PM_GPIO_STRENGTH_HIGH,
5610 .function = PM_GPIO_FUNC_NORMAL,
5611 .inv_int_pol = 0,
5612 }
5613 };
5614#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005615#if defined(CONFIG_HAPTIC_ISA1200) || \
5616 defined(CONFIG_HAPTIC_ISA1200_MODULE)
5617 if (machine_is_msm8x60_fluid()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305618 rc = pm8xxx_gpio_config(
5619 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_ENABLE),
5620 &en_hap_gpio_cfg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005621 if (rc < 0) {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305622 pr_err("%s: pmic haptics gpio config failed\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005623 __func__);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305624 }
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305625 rc = pm8xxx_gpio_config(
5626 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_LDO_ENABLE),
5627 &en_hap_gpio_cfg);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305628 if (rc < 0) {
5629 pr_err("%s: pmic haptics ldo gpio config failed\n",
5630 __func__);
5631 }
5632
5633 }
5634#endif
5635
5636#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
5637 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
5638 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_surf() ||
5639 machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305640 rc = pm8xxx_gpio_config(
5641 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_TOUCH_DISC_INTR),
5642 &touchdisc_intr_gpio_cfg);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305643 if (rc < 0) {
5644 pr_err("%s: Touchdisc interrupt gpio config failed\n",
5645 __func__);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005646 }
5647 }
5648#endif
5649
5650#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
5651 /* Line_in only for 8660 ffa & surf */
5652 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_surf() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04005653 machine_is_msm8x60_fusion() || machine_is_msm8x60_dragon() ||
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005654 machine_is_msm8x60_fusn_ffa()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305655 rc = pm8xxx_gpio_config(line_in_gpio_cfg.gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005656 &line_in_gpio_cfg.cfg);
5657 if (rc < 0) {
5658 pr_err("%s pmic line_in gpio config failed\n",
5659 __func__);
5660 return rc;
5661 }
5662 }
5663#endif
5664
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005665#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5666 if (machine_is_msm8x60_dragon()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305667 rc = pm8xxx_gpio_config(pmic_lcdc_nt35582_gpio_cfg.gpio,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005668 &pmic_lcdc_nt35582_gpio_cfg.cfg);
5669 if (rc < 0) {
5670 pr_err("%s pmic gpio config failed\n", __func__);
5671 return rc;
5672 }
5673 }
5674#endif
5675
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005676#if defined(CONFIG_QS_S5K4E1)
5677 /* qs_cam_hc37_cam_pd only for 8660 fluid qs camera*/
5678 if (machine_is_msm8x60_fluid()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305679 rc = pm8xxx_gpio_config(qs_hc37_cam_pd_gpio_cfg.gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005680 &qs_hc37_cam_pd_gpio_cfg.cfg);
5681 if (rc < 0) {
5682 pr_err("%s pmic qs_hc37_cam_pd gpio config failed\n",
5683 __func__);
5684 return rc;
5685 }
5686 }
5687 }
5688#endif
5689
5690 for (i = 0; i < ARRAY_SIZE(gpio_cfgs); ++i) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305691 rc = pm8xxx_gpio_config(gpio_cfgs[i].gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005692 &gpio_cfgs[i].cfg);
5693 if (rc < 0) {
5694 pr_err("%s pmic gpio config failed\n",
5695 __func__);
5696 return rc;
5697 }
5698 }
5699
5700 return 0;
5701}
5702
5703static const unsigned int ffa_keymap[] = {
5704 KEY(0, 0, KEY_FN_F1), /* LS - PUSH1 */
5705 KEY(0, 1, KEY_UP), /* NAV - UP */
5706 KEY(0, 2, KEY_LEFT), /* NAV - LEFT */
5707 KEY(0, 3, KEY_VOLUMEUP), /* Shuttle SW_UP */
5708
5709 KEY(1, 0, KEY_FN_F2), /* LS - PUSH2 */
5710 KEY(1, 1, KEY_RIGHT), /* NAV - RIGHT */
5711 KEY(1, 2, KEY_DOWN), /* NAV - DOWN */
5712 KEY(1, 3, KEY_VOLUMEDOWN),
5713
5714 KEY(2, 3, KEY_ENTER), /* SW_PUSH key */
5715
5716 KEY(4, 0, KEY_CAMERA_FOCUS), /* RS - PUSH1 */
5717 KEY(4, 1, KEY_UP), /* USER_UP */
5718 KEY(4, 2, KEY_LEFT), /* USER_LEFT */
5719 KEY(4, 3, KEY_HOME), /* Right switch: MIC Bd */
5720 KEY(4, 4, KEY_FN_F3), /* Reserved MIC */
5721
5722 KEY(5, 0, KEY_CAMERA), /* RS - PUSH2 */
5723 KEY(5, 1, KEY_RIGHT), /* USER_RIGHT */
5724 KEY(5, 2, KEY_DOWN), /* USER_DOWN */
5725 KEY(5, 3, KEY_BACK), /* Left switch: MIC */
5726 KEY(5, 4, KEY_MENU), /* Center switch: MIC */
5727};
5728
Zhang Chang Ken683be172011-08-10 17:45:34 -04005729static const unsigned int dragon_keymap[] = {
5730 KEY(0, 0, KEY_MENU),
5731 KEY(0, 2, KEY_1),
5732 KEY(0, 3, KEY_4),
5733 KEY(0, 4, KEY_7),
5734
5735 KEY(1, 0, KEY_UP),
5736 KEY(1, 1, KEY_LEFT),
5737 KEY(1, 2, KEY_DOWN),
5738 KEY(1, 3, KEY_5),
5739 KEY(1, 4, KEY_8),
5740
5741 KEY(2, 0, KEY_HOME),
5742 KEY(2, 1, KEY_REPLY),
5743 KEY(2, 2, KEY_2),
5744 KEY(2, 3, KEY_6),
5745 KEY(2, 4, KEY_0),
5746
5747 KEY(3, 0, KEY_VOLUMEUP),
5748 KEY(3, 1, KEY_RIGHT),
5749 KEY(3, 2, KEY_3),
5750 KEY(3, 3, KEY_9),
5751 KEY(3, 4, KEY_SWITCHVIDEOMODE),
5752
5753 KEY(4, 0, KEY_VOLUMEDOWN),
5754 KEY(4, 1, KEY_BACK),
5755 KEY(4, 2, KEY_CAMERA),
5756 KEY(4, 3, KEY_KBDILLUMTOGGLE),
5757};
5758
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005759static struct matrix_keymap_data ffa_keymap_data = {
5760 .keymap_size = ARRAY_SIZE(ffa_keymap),
5761 .keymap = ffa_keymap,
5762};
5763
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305764static struct pm8xxx_keypad_platform_data ffa_keypad_data = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005765 .input_name = "ffa-keypad",
5766 .input_phys_device = "ffa-keypad/input0",
5767 .num_rows = 6,
5768 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305769 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5770 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5771 .debounce_ms = 15,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005772 .scan_delay_ms = 32,
5773 .row_hold_ns = 91500,
5774 .wakeup = 1,
5775 .keymap_data = &ffa_keymap_data,
5776};
5777
Zhang Chang Ken683be172011-08-10 17:45:34 -04005778static struct matrix_keymap_data dragon_keymap_data = {
5779 .keymap_size = ARRAY_SIZE(dragon_keymap),
5780 .keymap = dragon_keymap,
5781};
5782
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305783static struct pm8xxx_keypad_platform_data dragon_keypad_data = {
Zhang Chang Ken683be172011-08-10 17:45:34 -04005784 .input_name = "dragon-keypad",
5785 .input_phys_device = "dragon-keypad/input0",
5786 .num_rows = 6,
5787 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305788 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5789 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5790 .debounce_ms = 15,
Zhang Chang Ken683be172011-08-10 17:45:34 -04005791 .scan_delay_ms = 32,
5792 .row_hold_ns = 91500,
5793 .wakeup = 1,
5794 .keymap_data = &dragon_keymap_data,
5795};
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305796
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005797static const unsigned int fluid_keymap[] = {
5798 KEY(0, 0, KEY_FN_F1), /* LS - PUSH1 */
5799 KEY(0, 1, KEY_UP), /* NAV - UP */
5800 KEY(0, 2, KEY_LEFT), /* NAV - LEFT */
5801 KEY(0, 3, KEY_VOLUMEDOWN), /* Shuttle SW_UP */
5802
5803 KEY(1, 0, KEY_FN_F2), /* LS - PUSH2 */
5804 KEY(1, 1, KEY_RIGHT), /* NAV - RIGHT */
5805 KEY(1, 2, KEY_DOWN), /* NAV - DOWN */
5806 KEY(1, 3, KEY_VOLUMEUP),
5807
5808 KEY(2, 3, KEY_ENTER), /* SW_PUSH key */
5809
5810 KEY(4, 0, KEY_CAMERA_FOCUS), /* RS - PUSH1 */
5811 KEY(4, 1, KEY_UP), /* USER_UP */
5812 KEY(4, 2, KEY_LEFT), /* USER_LEFT */
5813 KEY(4, 3, KEY_HOME), /* Right switch: MIC Bd */
5814 KEY(4, 4, KEY_FN_F3), /* Reserved MIC */
5815
Jilai Wang9a895102011-07-12 14:00:35 -04005816 KEY(5, 0, KEY_CAMERA), /* RS - PUSH2 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005817 KEY(5, 1, KEY_RIGHT), /* USER_RIGHT */
5818 KEY(5, 2, KEY_DOWN), /* USER_DOWN */
5819 KEY(5, 3, KEY_BACK), /* Left switch: MIC */
5820 KEY(5, 4, KEY_MENU), /* Center switch: MIC */
5821};
5822
5823static struct matrix_keymap_data fluid_keymap_data = {
5824 .keymap_size = ARRAY_SIZE(fluid_keymap),
5825 .keymap = fluid_keymap,
5826};
5827
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305828static struct pm8xxx_keypad_platform_data fluid_keypad_data = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005829 .input_name = "fluid-keypad",
5830 .input_phys_device = "fluid-keypad/input0",
5831 .num_rows = 6,
5832 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305833 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5834 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5835 .debounce_ms = 15,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005836 .scan_delay_ms = 32,
5837 .row_hold_ns = 91500,
5838 .wakeup = 1,
5839 .keymap_data = &fluid_keymap_data,
5840};
5841
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305842static struct pm8xxx_vibrator_platform_data pm8058_vib_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005843 .initial_vibrate_ms = 500,
5844 .level_mV = 3000,
5845 .max_timeout_ms = 15000,
5846};
5847
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305848static struct pm8xxx_rtc_platform_data pm8058_rtc_pdata = {
5849 .rtc_write_enable = false,
5850 .rtc_alarm_powerup = false,
5851};
5852
5853static struct pm8xxx_pwrkey_platform_data pm8058_pwrkey_pdata = {
5854 .pull_up = 1,
Jing Lineecdc062011-11-17 09:47:09 -08005855 .kpd_trigger_delay_us = 15625,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305856 .wakeup = 1,
5857};
5858
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005859#define PM8058_LINE_IN_DET_GPIO PM8058_GPIO_PM_TO_SYS(18)
5860
5861static struct othc_accessory_info othc_accessories[] = {
5862 {
5863 .accessory = OTHC_SVIDEO_OUT,
5864 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_SWITCH_DETECT
5865 | OTHC_ADC_DETECT,
5866 .key_code = SW_VIDEOOUT_INSERT,
5867 .enabled = false,
5868 .adc_thres = {
5869 .min_threshold = 20,
5870 .max_threshold = 40,
5871 },
5872 },
5873 {
5874 .accessory = OTHC_ANC_HEADPHONE,
5875 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_GPIO_DETECT |
5876 OTHC_SWITCH_DETECT,
5877 .gpio = PM8058_LINE_IN_DET_GPIO,
5878 .active_low = 1,
5879 .key_code = SW_HEADPHONE_INSERT,
5880 .enabled = true,
5881 },
5882 {
5883 .accessory = OTHC_ANC_HEADSET,
5884 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_GPIO_DETECT,
5885 .gpio = PM8058_LINE_IN_DET_GPIO,
5886 .active_low = 1,
5887 .key_code = SW_HEADPHONE_INSERT,
5888 .enabled = true,
5889 },
5890 {
5891 .accessory = OTHC_HEADPHONE,
5892 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_SWITCH_DETECT,
5893 .key_code = SW_HEADPHONE_INSERT,
5894 .enabled = true,
5895 },
5896 {
5897 .accessory = OTHC_MICROPHONE,
5898 .detect_flags = OTHC_GPIO_DETECT,
5899 .gpio = PM8058_LINE_IN_DET_GPIO,
5900 .active_low = 1,
5901 .key_code = SW_MICROPHONE_INSERT,
5902 .enabled = true,
5903 },
5904 {
5905 .accessory = OTHC_HEADSET,
5906 .detect_flags = OTHC_MICBIAS_DETECT,
5907 .key_code = SW_HEADPHONE_INSERT,
5908 .enabled = true,
5909 },
5910};
5911
5912static struct othc_switch_info switch_info[] = {
5913 {
5914 .min_adc_threshold = 0,
5915 .max_adc_threshold = 100,
5916 .key_code = KEY_PLAYPAUSE,
5917 },
5918 {
5919 .min_adc_threshold = 100,
5920 .max_adc_threshold = 200,
5921 .key_code = KEY_REWIND,
5922 },
5923 {
5924 .min_adc_threshold = 200,
5925 .max_adc_threshold = 500,
5926 .key_code = KEY_FASTFORWARD,
5927 },
5928};
5929
5930static struct othc_n_switch_config switch_config = {
5931 .voltage_settling_time_ms = 0,
5932 .num_adc_samples = 3,
5933 .adc_channel = CHANNEL_ADC_HDSET,
5934 .switch_info = switch_info,
5935 .num_keys = ARRAY_SIZE(switch_info),
5936 .default_sw_en = true,
5937 .default_sw_idx = 0,
5938};
5939
5940static struct hsed_bias_config hsed_bias_config = {
5941 /* HSED mic bias config info */
5942 .othc_headset = OTHC_HEADSET_NO,
5943 .othc_lowcurr_thresh_uA = 100,
5944 .othc_highcurr_thresh_uA = 600,
5945 .othc_hyst_prediv_us = 7800,
5946 .othc_period_clkdiv_us = 62500,
5947 .othc_hyst_clk_us = 121000,
5948 .othc_period_clk_us = 312500,
5949 .othc_wakeup = 1,
5950};
5951
5952static struct othc_hsed_config hsed_config_1 = {
5953 .hsed_bias_config = &hsed_bias_config,
5954 /*
5955 * The detection delay and switch reporting delay are
5956 * required to encounter a hardware bug (spurious switch
5957 * interrupts on slow insertion/removal of the headset).
5958 * This will introduce a delay in reporting the accessory
5959 * insertion and removal to the userspace.
5960 */
5961 .detection_delay_ms = 1500,
5962 /* Switch info */
5963 .switch_debounce_ms = 1500,
5964 .othc_support_n_switch = false,
5965 .switch_config = &switch_config,
5966 .ir_gpio = -1,
5967 /* Accessory info */
5968 .accessories_support = true,
5969 .accessories = othc_accessories,
5970 .othc_num_accessories = ARRAY_SIZE(othc_accessories),
5971};
5972
5973static struct othc_regulator_config othc_reg = {
5974 .regulator = "8058_l5",
5975 .max_uV = 2850000,
5976 .min_uV = 2850000,
5977};
5978
5979/* MIC_BIAS0 is configured as normal MIC BIAS */
5980static struct pmic8058_othc_config_pdata othc_config_pdata_0 = {
5981 .micbias_select = OTHC_MICBIAS_0,
5982 .micbias_capability = OTHC_MICBIAS,
5983 .micbias_enable = OTHC_SIGNAL_OFF,
5984 .micbias_regulator = &othc_reg,
5985};
5986
5987/* MIC_BIAS1 is configured as HSED_BIAS for OTHC */
5988static struct pmic8058_othc_config_pdata othc_config_pdata_1 = {
5989 .micbias_select = OTHC_MICBIAS_1,
5990 .micbias_capability = OTHC_MICBIAS_HSED,
5991 .micbias_enable = OTHC_SIGNAL_PWM_TCXO,
5992 .micbias_regulator = &othc_reg,
5993 .hsed_config = &hsed_config_1,
5994 .hsed_name = "8660_handset",
5995};
5996
5997/* MIC_BIAS2 is configured as normal MIC BIAS */
5998static struct pmic8058_othc_config_pdata othc_config_pdata_2 = {
5999 .micbias_select = OTHC_MICBIAS_2,
6000 .micbias_capability = OTHC_MICBIAS,
6001 .micbias_enable = OTHC_SIGNAL_OFF,
6002 .micbias_regulator = &othc_reg,
6003};
6004
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006005
6006static void __init msm8x60_init_pm8058_othc(void)
6007{
6008 int i;
6009
6010 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2 ||
6011 machine_is_msm8x60_fluid() || machine_is_msm8x60_fusion() ||
6012 machine_is_msm8x60_fusn_ffa()) {
6013 /* 3-switch headset supported only by V2 FFA and FLUID */
6014 hsed_config_1.accessories_adc_support = true,
6015 /* ADC based accessory detection works only on V2 and FLUID */
6016 hsed_config_1.accessories_adc_channel = CHANNEL_ADC_HDSET,
6017 hsed_config_1.othc_support_n_switch = true;
6018 }
6019
6020 /* IR GPIO is absent on FLUID */
6021 if (machine_is_msm8x60_fluid())
6022 hsed_config_1.ir_gpio = -1;
6023
6024 for (i = 0; i < ARRAY_SIZE(othc_accessories); i++) {
6025 if (machine_is_msm8x60_fluid()) {
6026 switch (othc_accessories[i].accessory) {
6027 case OTHC_ANC_HEADPHONE:
6028 case OTHC_ANC_HEADSET:
6029 othc_accessories[i].gpio = GPIO_HEADSET_DET_N;
6030 break;
6031 case OTHC_MICROPHONE:
6032 othc_accessories[i].enabled = false;
6033 break;
6034 case OTHC_SVIDEO_OUT:
6035 othc_accessories[i].enabled = true;
6036 hsed_config_1.video_out_gpio = GPIO_HS_SW_DIR;
6037 break;
6038 }
6039 }
6040 }
6041}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006042
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006043
6044static int pm8058_pwm_config(struct pwm_device *pwm, int ch, int on)
6045{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306046 struct pm_gpio pwm_gpio_config = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006047 .direction = PM_GPIO_DIR_OUT,
6048 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
6049 .output_value = 0,
6050 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306051 .vin_sel = PM8058_GPIO_VIN_VPH,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006052 .out_strength = PM_GPIO_STRENGTH_HIGH,
6053 .function = PM_GPIO_FUNC_2,
6054 };
6055
6056 int rc = -EINVAL;
6057 int id, mode, max_mA;
6058
6059 id = mode = max_mA = 0;
6060 switch (ch) {
6061 case 0:
6062 case 1:
6063 case 2:
6064 if (on) {
6065 id = 24 + ch;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306066 rc = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(id - 1),
6067 &pwm_gpio_config);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006068 if (rc)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306069 pr_err("%s: pm8xxx_gpio_config(%d): rc=%d\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006070 __func__, id, rc);
6071 }
6072 break;
6073
6074 case 6:
6075 id = PM_PWM_LED_FLASH;
6076 mode = PM_PWM_CONF_PWM1;
6077 max_mA = 300;
6078 break;
6079
6080 case 7:
6081 id = PM_PWM_LED_FLASH1;
6082 mode = PM_PWM_CONF_PWM1;
6083 max_mA = 300;
6084 break;
6085
6086 default:
6087 break;
6088 }
6089
6090 if (ch >= 6 && ch <= 7) {
6091 if (!on) {
6092 mode = PM_PWM_CONF_NONE;
6093 max_mA = 0;
6094 }
6095 rc = pm8058_pwm_config_led(pwm, id, mode, max_mA);
6096 if (rc)
6097 pr_err("%s: pm8058_pwm_config_led(ch=%d): rc=%d\n",
6098 __func__, ch, rc);
6099 }
6100 return rc;
6101
6102}
6103
6104static struct pm8058_pwm_pdata pm8058_pwm_data = {
6105 .config = pm8058_pwm_config,
6106};
6107
6108#define PM8058_GPIO_INT 88
6109
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006110static struct pmic8058_led pmic8058_flash_leds[] = {
6111 [0] = {
6112 .name = "camera:flash0",
6113 .max_brightness = 15,
6114 .id = PMIC8058_ID_FLASH_LED_0,
6115 },
6116 [1] = {
6117 .name = "camera:flash1",
6118 .max_brightness = 15,
6119 .id = PMIC8058_ID_FLASH_LED_1,
6120 },
6121};
6122
6123static struct pmic8058_leds_platform_data pm8058_flash_leds_data = {
6124 .num_leds = ARRAY_SIZE(pmic8058_flash_leds),
6125 .leds = pmic8058_flash_leds,
6126};
6127
Terence Hampsonc0b6dfb2011-07-15 11:07:17 -04006128static struct pmic8058_led pmic8058_dragon_leds[] = {
6129 [0] = {
6130 /* RED */
6131 .name = "led_drv0",
6132 .max_brightness = 15,
6133 .id = PMIC8058_ID_LED_0,
6134 },/* 300 mA flash led0 drv sink */
6135 [1] = {
6136 /* Yellow */
6137 .name = "led_drv1",
6138 .max_brightness = 15,
6139 .id = PMIC8058_ID_LED_1,
6140 },/* 300 mA flash led0 drv sink */
6141 [2] = {
6142 /* Green */
6143 .name = "led_drv2",
6144 .max_brightness = 15,
6145 .id = PMIC8058_ID_LED_2,
6146 },/* 300 mA flash led0 drv sink */
6147 [3] = {
6148 .name = "led_psensor",
6149 .max_brightness = 15,
6150 .id = PMIC8058_ID_LED_KB_LIGHT,
6151 },/* 300 mA flash led0 drv sink */
6152};
6153
6154static struct pmic8058_leds_platform_data pm8058_dragon_leds_data = {
6155 .num_leds = ARRAY_SIZE(pmic8058_dragon_leds),
6156 .leds = pmic8058_dragon_leds,
6157};
6158
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006159static struct pmic8058_led pmic8058_fluid_flash_leds[] = {
6160 [0] = {
6161 .name = "led:drv0",
6162 .max_brightness = 15,
6163 .id = PMIC8058_ID_FLASH_LED_0,
6164 },/* 300 mA flash led0 drv sink */
6165 [1] = {
6166 .name = "led:drv1",
6167 .max_brightness = 15,
6168 .id = PMIC8058_ID_FLASH_LED_1,
6169 },/* 300 mA flash led1 sink */
6170 [2] = {
6171 .name = "led:drv2",
6172 .max_brightness = 20,
6173 .id = PMIC8058_ID_LED_0,
6174 },/* 40 mA led0 sink */
6175 [3] = {
6176 .name = "keypad:drv",
6177 .max_brightness = 15,
6178 .id = PMIC8058_ID_LED_KB_LIGHT,
6179 },/* 300 mA keypad drv sink */
6180};
6181
6182static struct pmic8058_leds_platform_data pm8058_fluid_flash_leds_data = {
6183 .num_leds = ARRAY_SIZE(pmic8058_fluid_flash_leds),
6184 .leds = pmic8058_fluid_flash_leds,
6185};
6186
Terence Hampson90508a92011-08-09 10:40:08 -04006187static struct pmic8058_charger_data pmic8058_charger_dragon = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306188 .charger_data_valid = true,
Terence Hampson90508a92011-08-09 10:40:08 -04006189 .max_source_current = 1800,
6190 .charger_type = CHG_TYPE_AC,
6191};
6192
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306193static struct pmic8058_charger_data pmic8058_charger_ffa_surf = {
6194 .charger_data_valid = false,
6195};
6196
6197static struct pm8xxx_misc_platform_data pm8058_misc_pdata = {
6198 .priority = 0,
6199};
6200
6201static struct pm8xxx_irq_platform_data pm8058_irq_pdata = {
6202 .irq_base = PM8058_IRQ_BASE,
6203 .devirq = MSM_GPIO_TO_INT(PM8058_GPIO_INT),
6204 .irq_trigger_flag = IRQF_TRIGGER_LOW,
6205};
6206
6207static struct pm8xxx_gpio_platform_data pm8058_gpio_pdata = {
6208 .gpio_base = PM8058_GPIO_PM_TO_SYS(0),
6209};
6210
6211static struct pm8xxx_mpp_platform_data pm8058_mpp_pdata = {
6212 .mpp_base = PM8058_MPP_PM_TO_SYS(0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006213};
6214
6215static struct pm8058_platform_data pm8058_platform_data = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306216 .irq_pdata = &pm8058_irq_pdata,
6217 .gpio_pdata = &pm8058_gpio_pdata,
6218 .mpp_pdata = &pm8058_mpp_pdata,
6219 .rtc_pdata = &pm8058_rtc_pdata,
6220 .pwrkey_pdata = &pm8058_pwrkey_pdata,
6221 .othc0_pdata = &othc_config_pdata_0,
6222 .othc1_pdata = &othc_config_pdata_1,
6223 .othc2_pdata = &othc_config_pdata_2,
6224 .pwm_pdata = &pm8058_pwm_data,
6225 .misc_pdata = &pm8058_misc_pdata,
6226#ifdef CONFIG_SENSORS_MSM_ADC
6227 .xoadc_pdata = &pm8058_xoadc_pdata,
6228#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006229};
6230
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05306231#ifdef CONFIG_MSM_SSBI
6232static struct msm_ssbi_platform_data msm8x60_ssbi_pm8058_pdata __devinitdata = {
6233 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
6234 .slave = {
6235 .name = "pm8058-core",
6236 .platform_data = &pm8058_platform_data,
6237 },
6238};
6239#endif
6240#endif /* CONFIG_PMIC8058 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006241
6242#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
6243 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
6244#define TDISC_I2C_SLAVE_ADDR 0x67
6245#define PMIC_GPIO_TDISC PM8058_GPIO_PM_TO_SYS(5)
6246#define TDISC_INT PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 5)
6247
6248static const char *vregs_tdisc_name[] = {
6249 "8058_l5",
6250 "8058_s3",
6251};
6252
6253static const int vregs_tdisc_val[] = {
6254 2850000,/* uV */
6255 1800000,
6256};
6257static struct regulator *vregs_tdisc[ARRAY_SIZE(vregs_tdisc_name)];
6258
6259static int tdisc_shinetsu_setup(void)
6260{
6261 int rc, i;
6262
6263 rc = gpio_request(PMIC_GPIO_TDISC, "tdisc_interrupt");
6264 if (rc) {
6265 pr_err("%s: gpio_request failed for PMIC_GPIO_TDISC\n",
6266 __func__);
6267 return rc;
6268 }
6269
6270 rc = gpio_request(GPIO_JOYSTICK_EN, "tdisc_oe");
6271 if (rc) {
6272 pr_err("%s: gpio_request failed for GPIO_JOYSTICK_EN\n",
6273 __func__);
6274 goto fail_gpio_oe;
6275 }
6276
6277 rc = gpio_direction_output(GPIO_JOYSTICK_EN, 1);
6278 if (rc) {
6279 pr_err("%s: gpio_direction_output failed for GPIO_JOYSTICK_EN\n",
6280 __func__);
6281 gpio_free(GPIO_JOYSTICK_EN);
6282 goto fail_gpio_oe;
6283 }
6284
6285 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6286 vregs_tdisc[i] = regulator_get(NULL, vregs_tdisc_name[i]);
6287 if (IS_ERR(vregs_tdisc[i])) {
6288 printk(KERN_ERR "%s: regulator get %s failed (%ld)\n",
6289 __func__, vregs_tdisc_name[i],
6290 PTR_ERR(vregs_tdisc[i]));
6291 rc = PTR_ERR(vregs_tdisc[i]);
6292 goto vreg_get_fail;
6293 }
6294
6295 rc = regulator_set_voltage(vregs_tdisc[i],
6296 vregs_tdisc_val[i], vregs_tdisc_val[i]);
6297 if (rc) {
6298 printk(KERN_ERR "%s: regulator_set_voltage() = %d\n",
6299 __func__, rc);
6300 goto vreg_set_voltage_fail;
6301 }
6302 }
6303
6304 return rc;
6305vreg_set_voltage_fail:
6306 i++;
6307vreg_get_fail:
6308 while (i)
6309 regulator_put(vregs_tdisc[--i]);
6310fail_gpio_oe:
6311 gpio_free(PMIC_GPIO_TDISC);
6312 return rc;
6313}
6314
6315static void tdisc_shinetsu_release(void)
6316{
6317 int i;
6318
6319 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++)
6320 regulator_put(vregs_tdisc[i]);
6321
6322 gpio_free(PMIC_GPIO_TDISC);
6323 gpio_free(GPIO_JOYSTICK_EN);
6324}
6325
6326static int tdisc_shinetsu_enable(void)
6327{
6328 int i, rc = -EINVAL;
6329
6330 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6331 rc = regulator_enable(vregs_tdisc[i]);
6332 if (rc < 0) {
6333 printk(KERN_ERR "%s: vreg %s enable failed (%d)\n",
6334 __func__, vregs_tdisc_name[i], rc);
6335 goto vreg_fail;
6336 }
6337 }
6338
6339 /* Enable the OE (output enable) gpio */
6340 gpio_set_value_cansleep(GPIO_JOYSTICK_EN, 1);
6341 /* voltage and gpio stabilization delay */
6342 msleep(50);
6343
6344 return 0;
6345vreg_fail:
6346 while (i)
6347 regulator_disable(vregs_tdisc[--i]);
6348 return rc;
6349}
6350
6351static int tdisc_shinetsu_disable(void)
6352{
6353 int i, rc;
6354
6355 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6356 rc = regulator_disable(vregs_tdisc[i]);
6357 if (rc < 0) {
6358 printk(KERN_ERR "%s: vreg %s disable failed (%d)\n",
6359 __func__, vregs_tdisc_name[i], rc);
6360 goto tdisc_reg_fail;
6361 }
6362 }
6363
6364 /* Disable the OE (output enable) gpio */
6365 gpio_set_value_cansleep(GPIO_JOYSTICK_EN, 0);
6366
6367 return 0;
6368
6369tdisc_reg_fail:
6370 while (i)
6371 regulator_enable(vregs_tdisc[--i]);
6372 return rc;
6373}
6374
6375static struct tdisc_abs_values tdisc_abs = {
6376 .x_max = 32,
6377 .y_max = 32,
6378 .x_min = -32,
6379 .y_min = -32,
6380 .pressure_max = 32,
6381 .pressure_min = 0,
6382};
6383
6384static struct tdisc_platform_data tdisc_data = {
6385 .tdisc_setup = tdisc_shinetsu_setup,
6386 .tdisc_release = tdisc_shinetsu_release,
6387 .tdisc_enable = tdisc_shinetsu_enable,
6388 .tdisc_disable = tdisc_shinetsu_disable,
6389 .tdisc_wakeup = 0,
6390 .tdisc_gpio = PMIC_GPIO_TDISC,
6391 .tdisc_report_keys = true,
6392 .tdisc_report_relative = true,
6393 .tdisc_report_absolute = false,
6394 .tdisc_report_wheel = false,
6395 .tdisc_reverse_x = false,
6396 .tdisc_reverse_y = true,
6397 .tdisc_abs = &tdisc_abs,
6398};
6399
6400static struct i2c_board_info msm_i2c_gsbi3_tdisc_info[] = {
6401 {
6402 I2C_BOARD_INFO("vtd518", TDISC_I2C_SLAVE_ADDR),
6403 .irq = TDISC_INT,
6404 .platform_data = &tdisc_data,
6405 },
6406};
6407#endif
6408
6409#define PM_GPIO_CDC_RST_N 20
6410#define GPIO_CDC_RST_N PM8058_GPIO_PM_TO_SYS(PM_GPIO_CDC_RST_N)
6411
6412static struct regulator *vreg_timpani_1;
6413static struct regulator *vreg_timpani_2;
6414
6415static unsigned int msm_timpani_setup_power(void)
6416{
6417 int rc;
6418
6419 vreg_timpani_1 = regulator_get(NULL, "8058_l0");
6420 if (IS_ERR(vreg_timpani_1)) {
6421 pr_err("%s: Unable to get 8058_l0\n", __func__);
6422 return -ENODEV;
6423 }
6424
6425 vreg_timpani_2 = regulator_get(NULL, "8058_s3");
6426 if (IS_ERR(vreg_timpani_2)) {
6427 pr_err("%s: Unable to get 8058_s3\n", __func__);
6428 regulator_put(vreg_timpani_1);
6429 return -ENODEV;
6430 }
6431
6432 rc = regulator_set_voltage(vreg_timpani_1, 1200000, 1200000);
6433 if (rc) {
6434 pr_err("%s: unable to set L0 voltage to 1.2V\n", __func__);
6435 goto fail;
6436 }
6437
6438 rc = regulator_set_voltage(vreg_timpani_2, 1800000, 1800000);
6439 if (rc) {
6440 pr_err("%s: unable to set S3 voltage to 1.8V\n", __func__);
6441 goto fail;
6442 }
6443
6444 rc = regulator_enable(vreg_timpani_1);
6445 if (rc) {
6446 pr_err("%s: Enable regulator 8058_l0 failed\n", __func__);
6447 goto fail;
6448 }
6449
6450 /* The settings for LDO0 should be set such that
6451 * it doesn't require to reset the timpani. */
6452 rc = regulator_set_optimum_mode(vreg_timpani_1, 5000);
6453 if (rc < 0) {
6454 pr_err("Timpani regulator optimum mode setting failed\n");
6455 goto fail;
6456 }
6457
6458 rc = regulator_enable(vreg_timpani_2);
6459 if (rc) {
6460 pr_err("%s: Enable regulator 8058_s3 failed\n", __func__);
6461 regulator_disable(vreg_timpani_1);
6462 goto fail;
6463 }
6464
6465 rc = gpio_request(GPIO_CDC_RST_N, "CDC_RST_N");
6466 if (rc) {
6467 pr_err("%s: GPIO Request %d failed\n", __func__,
6468 GPIO_CDC_RST_N);
6469 regulator_disable(vreg_timpani_1);
6470 regulator_disable(vreg_timpani_2);
6471 goto fail;
6472 } else {
6473 gpio_direction_output(GPIO_CDC_RST_N, 1);
6474 usleep_range(1000, 1050);
6475 gpio_direction_output(GPIO_CDC_RST_N, 0);
6476 usleep_range(1000, 1050);
6477 gpio_direction_output(GPIO_CDC_RST_N, 1);
6478 gpio_free(GPIO_CDC_RST_N);
6479 }
6480 return rc;
6481
6482fail:
6483 regulator_put(vreg_timpani_1);
6484 regulator_put(vreg_timpani_2);
6485 return rc;
6486}
6487
6488static void msm_timpani_shutdown_power(void)
6489{
6490 int rc;
6491
6492 rc = regulator_disable(vreg_timpani_1);
6493 if (rc)
6494 pr_err("%s: Disable regulator 8058_l0 failed\n", __func__);
6495
6496 regulator_put(vreg_timpani_1);
6497
6498 rc = regulator_disable(vreg_timpani_2);
6499 if (rc)
6500 pr_err("%s: Disable regulator 8058_s3 failed\n", __func__);
6501
6502 regulator_put(vreg_timpani_2);
6503}
6504
6505/* Power analog function of codec */
6506static struct regulator *vreg_timpani_cdc_apwr;
6507static int msm_timpani_codec_power(int vreg_on)
6508{
6509 int rc = 0;
6510
6511 if (!vreg_timpani_cdc_apwr) {
6512
6513 vreg_timpani_cdc_apwr = regulator_get(NULL, "8058_s4");
6514
6515 if (IS_ERR(vreg_timpani_cdc_apwr)) {
6516 pr_err("%s: vreg_get failed (%ld)\n",
6517 __func__, PTR_ERR(vreg_timpani_cdc_apwr));
6518 rc = PTR_ERR(vreg_timpani_cdc_apwr);
6519 return rc;
6520 }
6521 }
6522
6523 if (vreg_on) {
6524
6525 rc = regulator_set_voltage(vreg_timpani_cdc_apwr,
6526 2200000, 2200000);
6527 if (rc) {
6528 pr_err("%s: unable to set 8058_s4 voltage to 2.2 V\n",
6529 __func__);
6530 goto vreg_fail;
6531 }
6532
6533 rc = regulator_enable(vreg_timpani_cdc_apwr);
6534 if (rc) {
6535 pr_err("%s: vreg_enable failed %d\n", __func__, rc);
6536 goto vreg_fail;
6537 }
6538 } else {
6539 rc = regulator_disable(vreg_timpani_cdc_apwr);
6540 if (rc) {
6541 pr_err("%s: vreg_disable failed %d\n",
6542 __func__, rc);
6543 goto vreg_fail;
6544 }
6545 }
6546
6547 return 0;
6548
6549vreg_fail:
6550 regulator_put(vreg_timpani_cdc_apwr);
6551 vreg_timpani_cdc_apwr = NULL;
6552 return rc;
6553}
6554
6555static struct marimba_codec_platform_data timpani_codec_pdata = {
6556 .marimba_codec_power = msm_timpani_codec_power,
6557};
6558
6559#define TIMPANI_SLAVE_ID_CDC_ADDR 0X77
6560#define TIMPANI_SLAVE_ID_QMEMBIST_ADDR 0X66
6561
6562static struct marimba_platform_data timpani_pdata = {
6563 .slave_id[MARIMBA_SLAVE_ID_CDC] = TIMPANI_SLAVE_ID_CDC_ADDR,
6564 .slave_id[MARIMBA_SLAVE_ID_QMEMBIST] = TIMPANI_SLAVE_ID_QMEMBIST_ADDR,
6565 .marimba_setup = msm_timpani_setup_power,
6566 .marimba_shutdown = msm_timpani_shutdown_power,
6567 .codec = &timpani_codec_pdata,
6568 .tsadc_ssbi_adap = MARIMBA_SSBI_ADAP,
6569};
6570
6571#define TIMPANI_I2C_SLAVE_ADDR 0xD
6572
6573static struct i2c_board_info msm_i2c_gsbi7_timpani_info[] = {
6574 {
6575 I2C_BOARD_INFO("timpani", TIMPANI_I2C_SLAVE_ADDR),
6576 .platform_data = &timpani_pdata,
6577 },
6578};
6579
Lei Zhou338cab82011-08-19 13:38:17 -04006580#ifdef CONFIG_SND_SOC_WM8903
6581static struct wm8903_platform_data wm8903_pdata = {
6582 .gpio_cfg[2] = 0x3A8,
6583};
6584
6585#define WM8903_I2C_SLAVE_ADDR 0x34
6586static struct i2c_board_info wm8903_codec_i2c_info[] = {
6587 {
6588 I2C_BOARD_INFO("wm8903", WM8903_I2C_SLAVE_ADDR >> 1),
6589 .platform_data = &wm8903_pdata,
6590 },
6591};
6592#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006593#ifdef CONFIG_PMIC8901
6594
6595#define PM8901_GPIO_INT 91
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006596/*
6597 * Consumer specific regulator names:
6598 * regulator name consumer dev_name
6599 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006600static struct regulator_consumer_supply vreg_consumers_8901_USB_OTG[] = {
6601 REGULATOR_SUPPLY("8901_usb_otg", NULL),
6602};
6603static struct regulator_consumer_supply vreg_consumers_8901_HDMI_MVS[] = {
6604 REGULATOR_SUPPLY("8901_hdmi_mvs", NULL),
6605};
6606
6607#define PM8901_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306608 _always_on) \
6609 { \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006610 .init_data = { \
6611 .constraints = { \
6612 .valid_modes_mask = _modes, \
6613 .valid_ops_mask = _ops, \
6614 .min_uV = _min_uV, \
6615 .max_uV = _max_uV, \
6616 .input_uV = _min_uV, \
6617 .apply_uV = _apply_uV, \
6618 .always_on = _always_on, \
6619 }, \
6620 .consumer_supplies = vreg_consumers_8901_##_id, \
6621 .num_consumer_supplies = \
6622 ARRAY_SIZE(vreg_consumers_8901_##_id), \
6623 }, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306624 .id = PM8901_VREG_ID_##_id, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006625 }
6626
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006627#define PM8901_VREG_INIT_VS(_id) \
6628 PM8901_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306629 REGULATOR_CHANGE_STATUS, 0, 0)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006630
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306631static struct pm8901_vreg_pdata pm8901_vreg_init[] = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006632 PM8901_VREG_INIT_VS(USB_OTG),
6633 PM8901_VREG_INIT_VS(HDMI_MVS),
6634};
6635
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306636static struct pm8xxx_irq_platform_data pm8901_irq_pdata = {
6637 .irq_base = PM8901_IRQ_BASE,
6638 .devirq = MSM_GPIO_TO_INT(PM8901_GPIO_INT),
6639 .irq_trigger_flag = IRQF_TRIGGER_LOW,
6640};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006641
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306642static struct pm8xxx_mpp_platform_data pm8901_mpp_pdata = {
6643 .mpp_base = PM8901_MPP_PM_TO_SYS(0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006644};
6645
6646static struct pm8901_platform_data pm8901_platform_data = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306647 .irq_pdata = &pm8901_irq_pdata,
6648 .mpp_pdata = &pm8901_mpp_pdata,
6649 .regulator_pdatas = pm8901_vreg_init,
6650 .num_regulators = ARRAY_SIZE(pm8901_vreg_init),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006651};
6652
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05306653static struct msm_ssbi_platform_data msm8x60_ssbi_pm8901_pdata __devinitdata = {
6654 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
6655 .slave = {
6656 .name = "pm8901-core",
6657 .platform_data = &pm8901_platform_data,
6658 },
6659};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006660#endif /* CONFIG_PMIC8901 */
6661
6662#if defined(CONFIG_MARIMBA_CORE) && (defined(CONFIG_GPIO_SX150X) \
6663 || defined(CONFIG_GPIO_SX150X_MODULE))
6664
6665static struct regulator *vreg_bahama;
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006666static int msm_bahama_sys_rst = GPIO_MS_SYS_RESET_N;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006667
6668struct bahama_config_register{
6669 u8 reg;
6670 u8 value;
6671 u8 mask;
6672};
6673
6674enum version{
6675 VER_1_0,
6676 VER_2_0,
6677 VER_UNSUPPORTED = 0xFF
6678};
6679
6680static u8 read_bahama_ver(void)
6681{
6682 int rc;
6683 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA };
6684 u8 bahama_version;
6685
6686 rc = marimba_read_bit_mask(&config, 0x00, &bahama_version, 1, 0x1F);
6687 if (rc < 0) {
6688 printk(KERN_ERR
6689 "%s: version read failed: %d\n",
6690 __func__, rc);
6691 return VER_UNSUPPORTED;
6692 } else {
6693 printk(KERN_INFO
6694 "%s: version read got: 0x%x\n",
6695 __func__, bahama_version);
6696 }
6697
6698 switch (bahama_version) {
6699 case 0x08: /* varient of bahama v1 */
6700 case 0x10:
6701 case 0x00:
6702 return VER_1_0;
6703 case 0x09: /* variant of bahama v2 */
6704 return VER_2_0;
6705 default:
6706 return VER_UNSUPPORTED;
6707 }
6708}
6709
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006710static int msm_bahama_setup_power_enable;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006711static unsigned int msm_bahama_setup_power(void)
6712{
6713 int rc = 0;
6714 const char *msm_bahama_regulator = "8058_s3";
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006715
6716 if (machine_is_msm8x60_dragon())
6717 msm_bahama_sys_rst = GPIO_CDC_RST_N;
6718
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006719 vreg_bahama = regulator_get(NULL, msm_bahama_regulator);
6720
6721 if (IS_ERR(vreg_bahama)) {
6722 rc = PTR_ERR(vreg_bahama);
6723 pr_err("%s: regulator_get %s = %d\n", __func__,
6724 msm_bahama_regulator, rc);
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006725 return rc;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006726 }
6727
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006728 rc = regulator_set_voltage(vreg_bahama, 1800000, 1800000);
6729 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006730 pr_err("%s: regulator_set_voltage %s = %d\n", __func__,
6731 msm_bahama_regulator, rc);
6732 goto unget;
6733 }
6734
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006735 rc = regulator_enable(vreg_bahama);
6736 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006737 pr_err("%s: regulator_enable %s = %d\n", __func__,
6738 msm_bahama_regulator, rc);
6739 goto unget;
6740 }
6741
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006742 rc = gpio_request(msm_bahama_sys_rst, "bahama sys_rst_n");
6743 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006744 pr_err("%s: gpio_request %d = %d\n", __func__,
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006745 msm_bahama_sys_rst, rc);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006746 goto unenable;
6747 }
6748
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006749 gpio_direction_output(msm_bahama_sys_rst, 0);
6750 usleep_range(1000, 1050);
6751 gpio_set_value_cansleep(msm_bahama_sys_rst, 1);
6752 usleep_range(1000, 1050);
6753 msm_bahama_setup_power_enable = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006754 return rc;
6755
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006756unenable:
6757 regulator_disable(vreg_bahama);
6758unget:
6759 regulator_put(vreg_bahama);
6760 return rc;
6761};
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006762
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006763static unsigned int msm_bahama_shutdown_power(int value)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006764{
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006765 if (msm_bahama_setup_power_enable) {
6766 gpio_set_value_cansleep(msm_bahama_sys_rst, 0);
6767 gpio_free(msm_bahama_sys_rst);
6768 regulator_disable(vreg_bahama);
6769 regulator_put(vreg_bahama);
6770 msm_bahama_setup_power_enable = 0;
6771 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006772
6773 return 0;
6774};
6775
6776static unsigned int msm_bahama_core_config(int type)
6777{
6778 int rc = 0;
6779
6780 if (type == BAHAMA_ID) {
6781
6782 int i;
6783 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA };
6784
6785 const struct bahama_config_register v20_init[] = {
6786 /* reg, value, mask */
6787 { 0xF4, 0x84, 0xFF }, /* AREG */
6788 { 0xF0, 0x04, 0xFF } /* DREG */
6789 };
6790
6791 if (read_bahama_ver() == VER_2_0) {
6792 for (i = 0; i < ARRAY_SIZE(v20_init); i++) {
6793 u8 value = v20_init[i].value;
6794 rc = marimba_write_bit_mask(&config,
6795 v20_init[i].reg,
6796 &value,
6797 sizeof(v20_init[i].value),
6798 v20_init[i].mask);
6799 if (rc < 0) {
6800 printk(KERN_ERR
6801 "%s: reg %d write failed: %d\n",
6802 __func__, v20_init[i].reg, rc);
6803 return rc;
6804 }
6805 printk(KERN_INFO "%s: reg 0x%02x value 0x%02x"
6806 " mask 0x%02x\n",
6807 __func__, v20_init[i].reg,
6808 v20_init[i].value, v20_init[i].mask);
6809 }
6810 }
6811 }
6812 printk(KERN_INFO "core type: %d\n", type);
6813
6814 return rc;
6815}
6816
6817static struct regulator *fm_regulator_s3;
6818static struct msm_xo_voter *fm_clock;
6819
6820static int fm_radio_setup(struct marimba_fm_platform_data *pdata)
6821{
6822 int rc = 0;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306823 struct pm_gpio cfg = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006824 .direction = PM_GPIO_DIR_IN,
6825 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306826 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006827 .function = PM_GPIO_FUNC_NORMAL,
6828 .inv_int_pol = 0,
6829 };
6830
6831 if (!fm_regulator_s3) {
6832 fm_regulator_s3 = regulator_get(NULL, "8058_s3");
6833 if (IS_ERR(fm_regulator_s3)) {
6834 rc = PTR_ERR(fm_regulator_s3);
6835 printk(KERN_ERR "%s: regulator get s3 (%d)\n",
6836 __func__, rc);
6837 goto out;
6838 }
6839 }
6840
6841
6842 rc = regulator_set_voltage(fm_regulator_s3, 1800000, 1800000);
6843 if (rc < 0) {
6844 printk(KERN_ERR "%s: regulator set voltage failed (%d)\n",
6845 __func__, rc);
6846 goto fm_fail_put;
6847 }
6848
6849 rc = regulator_enable(fm_regulator_s3);
6850 if (rc < 0) {
6851 printk(KERN_ERR "%s: regulator s3 enable failed (%d)\n",
6852 __func__, rc);
6853 goto fm_fail_put;
6854 }
6855
6856 /*Vote for XO clock*/
6857 fm_clock = msm_xo_get(MSM_XO_TCXO_D0, "fm_power");
6858
6859 if (IS_ERR(fm_clock)) {
6860 rc = PTR_ERR(fm_clock);
6861 printk(KERN_ERR "%s: Couldn't get TCXO_D0 vote for FM (%d)\n",
6862 __func__, rc);
6863 goto fm_fail_switch;
6864 }
6865
6866 rc = msm_xo_mode_vote(fm_clock, MSM_XO_MODE_ON);
6867 if (rc < 0) {
6868 printk(KERN_ERR "%s: Failed to vote for TCX0_D0 ON (%d)\n",
6869 __func__, rc);
6870 goto fm_fail_vote;
6871 }
6872
6873 /*GPIO 18 on PMIC is FM_IRQ*/
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306874 rc = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(FM_GPIO), &cfg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006875 if (rc) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306876 printk(KERN_ERR "%s: return val of pm8xxx_gpio_config: %d\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006877 __func__, rc);
6878 goto fm_fail_clock;
6879 }
6880 goto out;
6881
6882fm_fail_clock:
6883 msm_xo_mode_vote(fm_clock, MSM_XO_MODE_OFF);
6884fm_fail_vote:
6885 msm_xo_put(fm_clock);
6886fm_fail_switch:
6887 regulator_disable(fm_regulator_s3);
6888fm_fail_put:
6889 regulator_put(fm_regulator_s3);
6890out:
6891 return rc;
6892};
6893
6894static void fm_radio_shutdown(struct marimba_fm_platform_data *pdata)
6895{
6896 int rc = 0;
6897 if (fm_regulator_s3 != NULL) {
6898 rc = regulator_disable(fm_regulator_s3);
6899 if (rc < 0) {
6900 printk(KERN_ERR "%s: regulator s3 disable (%d)\n",
6901 __func__, rc);
6902 }
6903 regulator_put(fm_regulator_s3);
6904 fm_regulator_s3 = NULL;
6905 }
6906 printk(KERN_ERR "%s: Voting off for XO", __func__);
6907
6908 if (fm_clock != NULL) {
6909 rc = msm_xo_mode_vote(fm_clock, MSM_XO_MODE_OFF);
6910 if (rc < 0) {
6911 printk(KERN_ERR "%s: Voting off XO clock (%d)\n",
6912 __func__, rc);
6913 }
6914 msm_xo_put(fm_clock);
6915 }
6916 printk(KERN_ERR "%s: coming out of fm_radio_shutdown", __func__);
6917}
6918
6919/* Slave id address for FM/CDC/QMEMBIST
6920 * Values can be programmed using Marimba slave id 0
6921 * should there be a conflict with other I2C devices
6922 * */
6923#define BAHAMA_SLAVE_ID_FM_ADDR 0x2A
6924#define BAHAMA_SLAVE_ID_QMEMBIST_ADDR 0x7B
6925
6926static struct marimba_fm_platform_data marimba_fm_pdata = {
6927 .fm_setup = fm_radio_setup,
6928 .fm_shutdown = fm_radio_shutdown,
6929 .irq = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, FM_GPIO),
6930 .is_fm_soc_i2s_master = false,
6931 .config_i2s_gpio = NULL,
6932};
6933
6934/*
6935Just initializing the BAHAMA related slave
6936*/
6937static struct marimba_platform_data marimba_pdata = {
6938 .slave_id[SLAVE_ID_BAHAMA_FM] = BAHAMA_SLAVE_ID_FM_ADDR,
6939 .slave_id[SLAVE_ID_BAHAMA_QMEMBIST] = BAHAMA_SLAVE_ID_QMEMBIST_ADDR,
6940 .bahama_setup = msm_bahama_setup_power,
6941 .bahama_shutdown = msm_bahama_shutdown_power,
6942 .bahama_core_config = msm_bahama_core_config,
6943 .fm = &marimba_fm_pdata,
6944 .tsadc_ssbi_adap = MARIMBA_SSBI_ADAP,
6945};
6946
6947
6948static struct i2c_board_info msm_marimba_board_info[] = {
6949 {
6950 I2C_BOARD_INFO("marimba", 0xc),
6951 .platform_data = &marimba_pdata,
6952 }
6953};
6954#endif /* CONFIG_MAIMBA_CORE */
6955
6956#ifdef CONFIG_I2C
6957#define I2C_SURF 1
6958#define I2C_FFA (1 << 1)
6959#define I2C_RUMI (1 << 2)
6960#define I2C_SIM (1 << 3)
6961#define I2C_FLUID (1 << 4)
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04006962#define I2C_DRAGON (1 << 5)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006963
6964struct i2c_registry {
6965 u8 machs;
6966 int bus;
6967 struct i2c_board_info *info;
6968 int len;
6969};
6970
6971static struct i2c_registry msm8x60_i2c_devices[] __initdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006972#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
6973 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04006974 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006975 MSM_GSBI8_QUP_I2C_BUS_ID,
6976 core_expander_i2c_info,
6977 ARRAY_SIZE(core_expander_i2c_info),
6978 },
6979 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04006980 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006981 MSM_GSBI8_QUP_I2C_BUS_ID,
6982 docking_expander_i2c_info,
6983 ARRAY_SIZE(docking_expander_i2c_info),
6984 },
6985 {
6986 I2C_SURF,
6987 MSM_GSBI8_QUP_I2C_BUS_ID,
6988 surf_expanders_i2c_info,
6989 ARRAY_SIZE(surf_expanders_i2c_info),
6990 },
6991 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04006992 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006993 MSM_GSBI3_QUP_I2C_BUS_ID,
6994 fha_expanders_i2c_info,
6995 ARRAY_SIZE(fha_expanders_i2c_info),
6996 },
6997 {
6998 I2C_FLUID,
6999 MSM_GSBI3_QUP_I2C_BUS_ID,
7000 fluid_expanders_i2c_info,
7001 ARRAY_SIZE(fluid_expanders_i2c_info),
7002 },
7003 {
7004 I2C_FLUID,
7005 MSM_GSBI8_QUP_I2C_BUS_ID,
7006 fluid_core_expander_i2c_info,
7007 ARRAY_SIZE(fluid_core_expander_i2c_info),
7008 },
7009#endif
7010#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
7011 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
7012 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007013 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007014 MSM_GSBI3_QUP_I2C_BUS_ID,
7015 msm_i2c_gsbi3_tdisc_info,
7016 ARRAY_SIZE(msm_i2c_gsbi3_tdisc_info),
7017 },
7018#endif
7019 {
Zhang Chang Ken211df572011-07-05 19:16:39 -04007020 I2C_SURF | I2C_FFA | I2C_FLUID,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007021 MSM_GSBI3_QUP_I2C_BUS_ID,
7022 cy8ctmg200_board_info,
7023 ARRAY_SIZE(cy8ctmg200_board_info),
7024 },
Zhang Chang Ken211df572011-07-05 19:16:39 -04007025 {
7026 I2C_DRAGON,
7027 MSM_GSBI3_QUP_I2C_BUS_ID,
7028 cy8ctma340_dragon_board_info,
7029 ARRAY_SIZE(cy8ctma340_dragon_board_info),
7030 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007031#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
7032 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
7033 {
7034 I2C_FLUID,
7035 MSM_GSBI3_QUP_I2C_BUS_ID,
7036 cyttsp_fluid_info,
7037 ARRAY_SIZE(cyttsp_fluid_info),
7038 },
7039 {
7040 I2C_FFA | I2C_SURF,
7041 MSM_GSBI3_QUP_I2C_BUS_ID,
7042 cyttsp_ffa_info,
7043 ARRAY_SIZE(cyttsp_ffa_info),
7044 },
7045#endif
7046#ifdef CONFIG_MSM_CAMERA
Jilai Wang971f97f2011-07-13 14:25:25 -04007047 {
7048 I2C_SURF | I2C_FFA | I2C_FLUID ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007049 MSM_GSBI4_QUP_I2C_BUS_ID,
7050 msm_camera_boardinfo,
7051 ARRAY_SIZE(msm_camera_boardinfo),
7052 },
Jilai Wang971f97f2011-07-13 14:25:25 -04007053 {
7054 I2C_DRAGON,
7055 MSM_GSBI4_QUP_I2C_BUS_ID,
7056 msm_camera_dragon_boardinfo,
7057 ARRAY_SIZE(msm_camera_dragon_boardinfo),
7058 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007059#endif
7060 {
7061 I2C_SURF | I2C_FFA | I2C_FLUID,
7062 MSM_GSBI7_QUP_I2C_BUS_ID,
7063 msm_i2c_gsbi7_timpani_info,
7064 ARRAY_SIZE(msm_i2c_gsbi7_timpani_info),
7065 },
7066#if defined(CONFIG_MARIMBA_CORE)
7067 {
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04007068 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007069 MSM_GSBI7_QUP_I2C_BUS_ID,
7070 msm_marimba_board_info,
7071 ARRAY_SIZE(msm_marimba_board_info),
7072 },
7073#endif /* CONFIG_MARIMBA_CORE */
7074#ifdef CONFIG_ISL9519_CHARGER
7075 {
7076 I2C_SURF | I2C_FFA,
7077 MSM_GSBI8_QUP_I2C_BUS_ID,
7078 isl_charger_i2c_info,
7079 ARRAY_SIZE(isl_charger_i2c_info),
7080 },
7081#endif
7082#if defined(CONFIG_HAPTIC_ISA1200) || \
7083 defined(CONFIG_HAPTIC_ISA1200_MODULE)
7084 {
7085 I2C_FLUID,
7086 MSM_GSBI8_QUP_I2C_BUS_ID,
7087 msm_isa1200_board_info,
7088 ARRAY_SIZE(msm_isa1200_board_info),
7089 },
7090#endif
7091#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
7092 {
7093 I2C_FLUID,
7094 MSM_GSBI8_QUP_I2C_BUS_ID,
7095 smb137b_charger_i2c_info,
7096 ARRAY_SIZE(smb137b_charger_i2c_info),
7097 },
7098#endif
7099#if defined(CONFIG_BATTERY_BQ27520) || \
7100 defined(CONFIG_BATTERY_BQ27520_MODULE)
7101 {
7102 I2C_FLUID,
7103 MSM_GSBI8_QUP_I2C_BUS_ID,
7104 msm_bq27520_board_info,
7105 ARRAY_SIZE(msm_bq27520_board_info),
7106 },
7107#endif
Lei Zhou338cab82011-08-19 13:38:17 -04007108#if defined(CONFIG_SND_SOC_WM8903) || defined(CONFIG_SND_SOC_WM8903_MODULE)
7109 {
7110 I2C_DRAGON,
7111 MSM_GSBI8_QUP_I2C_BUS_ID,
7112 wm8903_codec_i2c_info,
7113 ARRAY_SIZE(wm8903_codec_i2c_info),
7114 },
7115#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007116};
7117#endif /* CONFIG_I2C */
7118
7119static void fixup_i2c_configs(void)
7120{
7121#ifdef CONFIG_I2C
7122#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
7123 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion())
7124 sx150x_data[SX150X_CORE].irq_summary =
7125 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT2_N);
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007126 else if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa() ||
7127 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007128 sx150x_data[SX150X_CORE].irq_summary =
7129 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT1_N);
7130 else if (machine_is_msm8x60_fluid())
7131 sx150x_data[SX150X_CORE_FLUID].irq_summary =
7132 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT1_N);
7133#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007134#endif
7135}
7136
7137static void register_i2c_devices(void)
7138{
7139#ifdef CONFIG_I2C
7140 u8 mach_mask = 0;
7141 int i;
7142
7143 /* Build the matching 'supported_machs' bitmask */
7144 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion())
7145 mach_mask = I2C_SURF;
7146 else if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa())
7147 mach_mask = I2C_FFA;
7148 else if (machine_is_msm8x60_rumi3())
7149 mach_mask = I2C_RUMI;
7150 else if (machine_is_msm8x60_sim())
7151 mach_mask = I2C_SIM;
7152 else if (machine_is_msm8x60_fluid())
7153 mach_mask = I2C_FLUID;
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007154 else if (machine_is_msm8x60_dragon())
7155 mach_mask = I2C_DRAGON;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007156 else
7157 pr_err("unmatched machine ID in register_i2c_devices\n");
7158
7159 /* Run the array and install devices as appropriate */
7160 for (i = 0; i < ARRAY_SIZE(msm8x60_i2c_devices); ++i) {
7161 if (msm8x60_i2c_devices[i].machs & mach_mask)
7162 i2c_register_board_info(msm8x60_i2c_devices[i].bus,
7163 msm8x60_i2c_devices[i].info,
7164 msm8x60_i2c_devices[i].len);
7165 }
7166#endif
7167}
7168
7169static void __init msm8x60_init_uart12dm(void)
7170{
7171#if !defined(CONFIG_USB_PEHCI_HCD) && !defined(CONFIG_USB_PEHCI_HCD_MODULE)
7172 /* 0x1D000000 now belongs to EBI2:CS3 i.e. USB ISP Controller */
7173 void *fpga_mem = ioremap_nocache(0x1D000000, SZ_4K);
7174
7175 if (!fpga_mem)
7176 pr_err("%s(): Error getting memory\n", __func__);
7177
7178 /* Advanced mode */
7179 writew(0xFFFF, fpga_mem + 0x15C);
7180 /* FPGA_UART_SEL */
7181 writew(0, fpga_mem + 0x172);
7182 /* FPGA_GPIO_CONFIG_117 */
7183 writew(1, fpga_mem + 0xEA);
7184 /* FPGA_GPIO_CONFIG_118 */
7185 writew(1, fpga_mem + 0xEC);
7186 mb();
7187 iounmap(fpga_mem);
7188#endif
7189}
7190
7191#define MSM_GSBI9_PHYS 0x19900000
7192#define GSBI_DUAL_MODE_CODE 0x60
7193
7194static void __init msm8x60_init_buses(void)
7195{
7196#ifdef CONFIG_I2C_QUP
7197 void *gsbi_mem = ioremap_nocache(0x19C00000, 4);
7198 /* Setting protocol code to 0x60 for dual UART/I2C in GSBI12 */
7199 writel_relaxed(0x6 << 4, gsbi_mem);
7200 /* Ensure protocol code is written before proceeding further */
7201 mb();
7202 iounmap(gsbi_mem);
7203
7204 msm_gsbi3_qup_i2c_device.dev.platform_data = &msm_gsbi3_qup_i2c_pdata;
7205 msm_gsbi4_qup_i2c_device.dev.platform_data = &msm_gsbi4_qup_i2c_pdata;
7206 msm_gsbi7_qup_i2c_device.dev.platform_data = &msm_gsbi7_qup_i2c_pdata;
7207 msm_gsbi8_qup_i2c_device.dev.platform_data = &msm_gsbi8_qup_i2c_pdata;
7208
7209#ifdef CONFIG_MSM_GSBI9_UART
7210 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
7211 /* Setting protocol code to 0x60 for dual UART/I2C in GSBI9 */
7212 gsbi_mem = ioremap_nocache(MSM_GSBI9_PHYS, 4);
7213 writel_relaxed(GSBI_DUAL_MODE_CODE, gsbi_mem);
7214 iounmap(gsbi_mem);
7215 msm_gsbi9_qup_i2c_pdata.use_gsbi_shared_mode = 1;
7216 }
7217#endif
7218 msm_gsbi9_qup_i2c_device.dev.platform_data = &msm_gsbi9_qup_i2c_pdata;
7219 msm_gsbi12_qup_i2c_device.dev.platform_data = &msm_gsbi12_qup_i2c_pdata;
7220#endif
7221#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
7222 msm_gsbi1_qup_spi_device.dev.platform_data = &msm_gsbi1_qup_spi_pdata;
7223#endif
7224#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007225 msm_device_ssbi3.dev.platform_data = &msm_ssbi3_pdata;
7226#endif
7227
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05307228#ifdef CONFIG_MSM_SSBI
7229 msm_device_ssbi_pmic1.dev.platform_data =
7230 &msm8x60_ssbi_pm8058_pdata;
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05307231 msm_device_ssbi_pmic2.dev.platform_data =
7232 &msm8x60_ssbi_pm8901_pdata;
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05307233#endif
7234
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007235 if (machine_is_msm8x60_fluid()) {
7236#if (defined(CONFIG_USB_EHCI_MSM_72K) && \
7237 (defined(CONFIG_SMB137B_CHARGER) || \
7238 defined(CONFIG_SMB137B_CHARGER_MODULE)))
7239 msm_otg_pdata.vbus_power = msm_hsusb_smb137b_vbus_power;
7240#endif
7241#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
7242 msm_gsbi10_qup_spi_device.dev.platform_data =
7243 &msm_gsbi10_qup_spi_pdata;
7244#endif
7245 }
7246
7247#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_HCD)
7248 /*
7249 * We can not put USB regulators (8058_l6 and 8058_l7) in LPM
7250 * when we depend on USB PHY for VBUS/ID notifications. VBUS
7251 * and ID notifications are available only on V2 surf and FFA
7252 * with a hardware workaround.
7253 */
7254 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2 &&
7255 (machine_is_msm8x60_surf() ||
7256 (machine_is_msm8x60_ffa() &&
7257 pmic_id_notif_supported)))
7258 msm_otg_pdata.phy_can_powercollapse = 1;
7259 msm_device_otg.dev.platform_data = &msm_otg_pdata;
7260#endif
7261
7262#ifdef CONFIG_USB_GADGET_MSM_72K
7263 msm_device_gadget_peripheral.dev.platform_data = &msm_gadget_pdata;
7264#endif
7265
7266#ifdef CONFIG_SERIAL_MSM_HS
7267 msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(54); /* GSBI6(2) */
7268 msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
7269#endif
7270#ifdef CONFIG_MSM_GSBI9_UART
7271 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
7272 msm_device_uart_gsbi9 = msm_add_gsbi9_uart();
7273 if (IS_ERR(msm_device_uart_gsbi9))
7274 pr_err("%s(): Failed to create uart gsbi9 device\n",
7275 __func__);
7276 }
7277#endif
7278
7279#ifdef CONFIG_MSM_BUS_SCALING
7280
7281 /* RPM calls are only enabled on V2 */
7282 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2) {
7283 msm_bus_apps_fabric_pdata.rpm_enabled = 1;
7284 msm_bus_sys_fabric_pdata.rpm_enabled = 1;
7285 msm_bus_mm_fabric_pdata.rpm_enabled = 1;
7286 msm_bus_sys_fpb_pdata.rpm_enabled = 1;
7287 msm_bus_cpss_fpb_pdata.rpm_enabled = 1;
7288 }
7289
7290 msm_bus_apps_fabric.dev.platform_data = &msm_bus_apps_fabric_pdata;
7291 msm_bus_sys_fabric.dev.platform_data = &msm_bus_sys_fabric_pdata;
7292 msm_bus_mm_fabric.dev.platform_data = &msm_bus_mm_fabric_pdata;
7293 msm_bus_sys_fpb.dev.platform_data = &msm_bus_sys_fpb_pdata;
7294 msm_bus_cpss_fpb.dev.platform_data = &msm_bus_cpss_fpb_pdata;
7295#endif
7296}
7297
7298static void __init msm8x60_map_io(void)
7299{
7300 msm_shared_ram_phys = MSM_SHARED_RAM_PHYS;
7301 msm_map_msm8x60_io();
Jeff Ohlstein3a77f9f2011-09-06 14:50:20 -07007302
7303 if (socinfo_init() < 0)
7304 pr_err("socinfo_init() failed!\n");
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007305}
7306
7307/*
7308 * Most segments of the EBI2 bus are disabled by default.
7309 */
7310static void __init msm8x60_init_ebi2(void)
7311{
7312 uint32_t ebi2_cfg;
7313 void *ebi2_cfg_ptr;
Terence Hampsonb36a38c2011-09-19 19:10:40 -04007314 struct clk *mem_clk = clk_get_sys("msm_ebi2", "mem_clk");
7315
7316 if (IS_ERR(mem_clk)) {
7317 pr_err("%s: clk_get_sys(%s,%s), failed", __func__,
7318 "msm_ebi2", "mem_clk");
7319 return;
7320 }
7321 clk_enable(mem_clk);
7322 clk_put(mem_clk);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007323
7324 ebi2_cfg_ptr = ioremap_nocache(0x1a100000, sizeof(uint32_t));
7325 if (ebi2_cfg_ptr != 0) {
7326 ebi2_cfg = readl_relaxed(ebi2_cfg_ptr);
7327
7328 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007329 machine_is_msm8x60_fluid() ||
7330 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007331 ebi2_cfg |= (1 << 4) | (1 << 5); /* CS2, CS3 */
7332 else if (machine_is_msm8x60_sim())
7333 ebi2_cfg |= (1 << 4); /* CS2 */
7334 else if (machine_is_msm8x60_rumi3())
7335 ebi2_cfg |= (1 << 5); /* CS3 */
7336
7337 writel_relaxed(ebi2_cfg, ebi2_cfg_ptr);
7338 iounmap(ebi2_cfg_ptr);
7339 }
7340
7341 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007342 machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon()) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007343 ebi2_cfg_ptr = ioremap_nocache(0x1a110000, SZ_4K);
7344 if (ebi2_cfg_ptr != 0) {
7345 /* EBI2_XMEM_CFG:PWRSAVE_MODE off */
7346 writel_relaxed(0UL, ebi2_cfg_ptr);
7347
7348 /* CS2: Delay 9 cycles (140ns@64MHz) between SMSC
7349 * LAN9221 Ethernet controller reads and writes.
7350 * The lowest 4 bits are the read delay, the next
7351 * 4 are the write delay. */
7352 writel_relaxed(0x031F1C99, ebi2_cfg_ptr + 0x10);
7353#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
7354 /*
7355 * RECOVERY=5, HOLD_WR=1
7356 * INIT_LATENCY_WR=1, INIT_LATENCY_RD=1
7357 * WAIT_WR=1, WAIT_RD=2
7358 */
7359 writel_relaxed(0x51010112, ebi2_cfg_ptr + 0x14);
7360 /*
7361 * HOLD_RD=1
7362 * ADV_OE_RECOVERY=0, ADDR_HOLD_ENA=1
7363 */
7364 writel_relaxed(0x01000020, ebi2_cfg_ptr + 0x34);
7365#else
7366 /* EBI2 CS3 muxed address/data,
7367 * two cyc addr enable */
7368 writel_relaxed(0xA3030020, ebi2_cfg_ptr + 0x34);
7369
7370#endif
7371 iounmap(ebi2_cfg_ptr);
7372 }
7373 }
7374}
7375
7376static void __init msm8x60_configure_smc91x(void)
7377{
7378 if (machine_is_msm8x60_sim()) {
7379
7380 smc91x_resources[0].start = 0x1b800300;
7381 smc91x_resources[0].end = 0x1b8003ff;
7382
7383 smc91x_resources[1].start = (NR_MSM_IRQS + 40);
7384 smc91x_resources[1].end = (NR_MSM_IRQS + 40);
7385
7386 } else if (machine_is_msm8x60_rumi3()) {
7387
7388 smc91x_resources[0].start = 0x1d000300;
7389 smc91x_resources[0].end = 0x1d0003ff;
7390
7391 smc91x_resources[1].start = TLMM_MSM_DIR_CONN_IRQ_0;
7392 smc91x_resources[1].end = TLMM_MSM_DIR_CONN_IRQ_0;
7393 }
7394}
7395
7396static void __init msm8x60_init_tlmm(void)
7397{
7398 if (machine_is_msm8x60_rumi3())
7399 msm_gpio_install_direct_irq(0, 0, 1);
7400}
7401
7402#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
7403 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
7404 || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
7405 || defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
7406 || defined(CONFIG_MMC_MSM_SDC5_SUPPORT))
7407
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007408/* 8x60 has 5 SDCC controllers */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007409#define MAX_SDCC_CONTROLLER 5
7410
7411struct msm_sdcc_gpio {
7412 /* maximum 10 GPIOs per SDCC controller */
7413 s16 no;
7414 /* name of this GPIO */
7415 const char *name;
7416 bool always_on;
7417 bool is_enabled;
7418};
7419
7420#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
7421static struct msm_sdcc_gpio sdc1_gpio_cfg[] = {
7422 {159, "sdc1_dat_0"},
7423 {160, "sdc1_dat_1"},
7424 {161, "sdc1_dat_2"},
7425 {162, "sdc1_dat_3"},
7426#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
7427 {163, "sdc1_dat_4"},
7428 {164, "sdc1_dat_5"},
7429 {165, "sdc1_dat_6"},
7430 {166, "sdc1_dat_7"},
7431#endif
7432 {167, "sdc1_clk"},
7433 {168, "sdc1_cmd"}
7434};
7435#endif
7436
7437#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
7438static struct msm_sdcc_gpio sdc2_gpio_cfg[] = {
7439 {143, "sdc2_dat_0"},
7440 {144, "sdc2_dat_1", 1},
7441 {145, "sdc2_dat_2"},
7442 {146, "sdc2_dat_3"},
7443#ifdef CONFIG_MMC_MSM_SDC2_8_BIT_SUPPORT
7444 {147, "sdc2_dat_4"},
7445 {148, "sdc2_dat_5"},
7446 {149, "sdc2_dat_6"},
7447 {150, "sdc2_dat_7"},
7448#endif
7449 {151, "sdc2_cmd"},
7450 {152, "sdc2_clk", 1}
7451};
7452#endif
7453
7454#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
7455static struct msm_sdcc_gpio sdc5_gpio_cfg[] = {
7456 {95, "sdc5_cmd"},
7457 {96, "sdc5_dat_3"},
7458 {97, "sdc5_clk", 1},
7459 {98, "sdc5_dat_2"},
7460 {99, "sdc5_dat_1", 1},
7461 {100, "sdc5_dat_0"}
7462};
7463#endif
7464
7465struct msm_sdcc_pad_pull_cfg {
7466 enum msm_tlmm_pull_tgt pull;
7467 u32 pull_val;
7468};
7469
7470struct msm_sdcc_pad_drv_cfg {
7471 enum msm_tlmm_hdrive_tgt drv;
7472 u32 drv_val;
7473};
7474
7475#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
7476static struct msm_sdcc_pad_drv_cfg sdc3_pad_on_drv_cfg[] = {
7477 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_8MA},
7478 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_8MA},
7479 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_8MA}
7480};
7481
7482static struct msm_sdcc_pad_pull_cfg sdc3_pad_on_pull_cfg[] = {
7483 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_UP},
7484 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_UP}
7485};
7486
7487static struct msm_sdcc_pad_drv_cfg sdc3_pad_off_drv_cfg[] = {
7488 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_2MA},
7489 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_2MA},
7490 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_2MA}
7491};
7492
7493static struct msm_sdcc_pad_pull_cfg sdc3_pad_off_pull_cfg[] = {
7494 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_DOWN},
7495 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_DOWN}
7496};
7497#endif
7498
7499#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
7500static struct msm_sdcc_pad_drv_cfg sdc4_pad_on_drv_cfg[] = {
7501 {TLMM_HDRV_SDC4_CLK, GPIO_CFG_8MA},
7502 {TLMM_HDRV_SDC4_CMD, GPIO_CFG_8MA},
7503 {TLMM_HDRV_SDC4_DATA, GPIO_CFG_8MA}
7504};
7505
7506static struct msm_sdcc_pad_pull_cfg sdc4_pad_on_pull_cfg[] = {
7507 {TLMM_PULL_SDC4_CMD, GPIO_CFG_PULL_UP},
7508 {TLMM_PULL_SDC4_DATA, GPIO_CFG_PULL_UP}
7509};
7510
7511static struct msm_sdcc_pad_drv_cfg sdc4_pad_off_drv_cfg[] = {
7512 {TLMM_HDRV_SDC4_CLK, GPIO_CFG_2MA},
7513 {TLMM_HDRV_SDC4_CMD, GPIO_CFG_2MA},
7514 {TLMM_HDRV_SDC4_DATA, GPIO_CFG_2MA}
7515};
7516
7517static struct msm_sdcc_pad_pull_cfg sdc4_pad_off_pull_cfg[] = {
7518 {TLMM_PULL_SDC4_CMD, GPIO_CFG_PULL_DOWN},
7519 {TLMM_PULL_SDC4_DATA, GPIO_CFG_PULL_DOWN}
7520};
7521#endif
7522
7523struct msm_sdcc_pin_cfg {
7524 /*
7525 * = 1 if controller pins are using gpios
7526 * = 0 if controller has dedicated MSM pins
7527 */
7528 u8 is_gpio;
7529 u8 cfg_sts;
7530 u8 gpio_data_size;
7531 struct msm_sdcc_gpio *gpio_data;
7532 struct msm_sdcc_pad_drv_cfg *pad_drv_on_data;
7533 struct msm_sdcc_pad_drv_cfg *pad_drv_off_data;
7534 struct msm_sdcc_pad_pull_cfg *pad_pull_on_data;
7535 struct msm_sdcc_pad_pull_cfg *pad_pull_off_data;
7536 u8 pad_drv_data_size;
7537 u8 pad_pull_data_size;
7538 u8 sdio_lpm_gpio_cfg;
7539};
7540
7541
7542static struct msm_sdcc_pin_cfg sdcc_pin_cfg_data[MAX_SDCC_CONTROLLER] = {
7543#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
7544 [0] = {
7545 .is_gpio = 1,
7546 .gpio_data_size = ARRAY_SIZE(sdc1_gpio_cfg),
7547 .gpio_data = sdc1_gpio_cfg
7548 },
7549#endif
7550#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
7551 [1] = {
7552 .is_gpio = 1,
7553 .gpio_data_size = ARRAY_SIZE(sdc2_gpio_cfg),
7554 .gpio_data = sdc2_gpio_cfg
7555 },
7556#endif
7557#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
7558 [2] = {
7559 .is_gpio = 0,
7560 .pad_drv_on_data = sdc3_pad_on_drv_cfg,
7561 .pad_drv_off_data = sdc3_pad_off_drv_cfg,
7562 .pad_pull_on_data = sdc3_pad_on_pull_cfg,
7563 .pad_pull_off_data = sdc3_pad_off_pull_cfg,
7564 .pad_drv_data_size = ARRAY_SIZE(sdc3_pad_on_drv_cfg),
7565 .pad_pull_data_size = ARRAY_SIZE(sdc3_pad_on_pull_cfg)
7566 },
7567#endif
7568#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
7569 [3] = {
7570 .is_gpio = 0,
7571 .pad_drv_on_data = sdc4_pad_on_drv_cfg,
7572 .pad_drv_off_data = sdc4_pad_off_drv_cfg,
7573 .pad_pull_on_data = sdc4_pad_on_pull_cfg,
7574 .pad_pull_off_data = sdc4_pad_off_pull_cfg,
7575 .pad_drv_data_size = ARRAY_SIZE(sdc4_pad_on_drv_cfg),
7576 .pad_pull_data_size = ARRAY_SIZE(sdc4_pad_on_pull_cfg)
7577 },
7578#endif
7579#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
7580 [4] = {
7581 .is_gpio = 1,
7582 .gpio_data_size = ARRAY_SIZE(sdc5_gpio_cfg),
7583 .gpio_data = sdc5_gpio_cfg
7584 }
7585#endif
7586};
7587
7588static int msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
7589{
7590 int rc = 0;
7591 struct msm_sdcc_pin_cfg *curr;
7592 int n;
7593
7594 curr = &sdcc_pin_cfg_data[dev_id - 1];
7595 if (!curr->gpio_data)
7596 goto out;
7597
7598 for (n = 0; n < curr->gpio_data_size; n++) {
7599 if (enable) {
7600
7601 if (curr->gpio_data[n].always_on &&
7602 curr->gpio_data[n].is_enabled)
7603 continue;
7604 pr_debug("%s: enable: %s\n", __func__,
7605 curr->gpio_data[n].name);
7606 rc = gpio_request(curr->gpio_data[n].no,
7607 curr->gpio_data[n].name);
7608 if (rc) {
7609 pr_err("%s: gpio_request(%d, %s)"
7610 "failed", __func__,
7611 curr->gpio_data[n].no,
7612 curr->gpio_data[n].name);
7613 goto free_gpios;
7614 }
7615 /* set direction as output for all GPIOs */
7616 rc = gpio_direction_output(
7617 curr->gpio_data[n].no, 1);
7618 if (rc) {
7619 pr_err("%s: gpio_direction_output"
7620 "(%d, 1) failed\n", __func__,
7621 curr->gpio_data[n].no);
7622 goto free_gpios;
7623 }
7624 curr->gpio_data[n].is_enabled = 1;
7625 } else {
7626 /*
7627 * now free this GPIO which will put GPIO
7628 * in low power mode and will also put GPIO
7629 * in input mode
7630 */
7631 if (curr->gpio_data[n].always_on)
7632 continue;
7633 pr_debug("%s: disable: %s\n", __func__,
7634 curr->gpio_data[n].name);
7635 gpio_free(curr->gpio_data[n].no);
7636 curr->gpio_data[n].is_enabled = 0;
7637 }
7638 }
7639 curr->cfg_sts = enable;
7640 goto out;
7641
7642free_gpios:
7643 for (; n >= 0; n--)
7644 gpio_free(curr->gpio_data[n].no);
7645out:
7646 return rc;
7647}
7648
7649static int msm_sdcc_setup_pad(int dev_id, unsigned int enable)
7650{
7651 int rc = 0;
7652 struct msm_sdcc_pin_cfg *curr;
7653 int n;
7654
7655 curr = &sdcc_pin_cfg_data[dev_id - 1];
7656 if (!curr->pad_drv_on_data || !curr->pad_pull_on_data)
7657 goto out;
7658
7659 if (enable) {
7660 /*
7661 * set up the normal driver strength and
7662 * pull config for pads
7663 */
7664 for (n = 0; n < curr->pad_drv_data_size; n++) {
7665 if (curr->sdio_lpm_gpio_cfg) {
7666 if (curr->pad_drv_on_data[n].drv ==
7667 TLMM_HDRV_SDC4_DATA)
7668 continue;
7669 }
7670 msm_tlmm_set_hdrive(curr->pad_drv_on_data[n].drv,
7671 curr->pad_drv_on_data[n].drv_val);
7672 }
7673 for (n = 0; n < curr->pad_pull_data_size; n++) {
7674 if (curr->sdio_lpm_gpio_cfg) {
7675 if (curr->pad_pull_on_data[n].pull ==
7676 TLMM_PULL_SDC4_DATA)
7677 continue;
7678 }
7679 msm_tlmm_set_pull(curr->pad_pull_on_data[n].pull,
7680 curr->pad_pull_on_data[n].pull_val);
7681 }
7682 } else {
7683 /* set the low power config for pads */
7684 for (n = 0; n < curr->pad_drv_data_size; n++) {
7685 if (curr->sdio_lpm_gpio_cfg) {
7686 if (curr->pad_drv_off_data[n].drv ==
7687 TLMM_HDRV_SDC4_DATA)
7688 continue;
7689 }
7690 msm_tlmm_set_hdrive(
7691 curr->pad_drv_off_data[n].drv,
7692 curr->pad_drv_off_data[n].drv_val);
7693 }
7694 for (n = 0; n < curr->pad_pull_data_size; n++) {
7695 if (curr->sdio_lpm_gpio_cfg) {
7696 if (curr->pad_pull_off_data[n].pull ==
7697 TLMM_PULL_SDC4_DATA)
7698 continue;
7699 }
7700 msm_tlmm_set_pull(
7701 curr->pad_pull_off_data[n].pull,
7702 curr->pad_pull_off_data[n].pull_val);
7703 }
7704 }
7705 curr->cfg_sts = enable;
7706out:
7707 return rc;
7708}
7709
7710struct sdcc_reg {
7711 /* VDD/VCC/VCCQ regulator name on PMIC8058/PMIC8089*/
7712 const char *reg_name;
7713 /*
7714 * is set voltage supported for this regulator?
7715 * 0 = not supported, 1 = supported
7716 */
7717 unsigned char set_voltage_sup;
7718 /* voltage level to be set */
7719 unsigned int level;
7720 /* VDD/VCC/VCCQ voltage regulator handle */
7721 struct regulator *reg;
7722 /* is this regulator enabled? */
7723 bool enabled;
7724 /* is this regulator needs to be always on? */
7725 bool always_on;
7726 /* is operating power mode setting required for this regulator? */
7727 bool op_pwr_mode_sup;
7728 /* Load values for low power and high power mode */
7729 unsigned int lpm_uA;
7730 unsigned int hpm_uA;
7731};
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007732/* all SDCC controllers require VDD/VCC voltage */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007733static struct sdcc_reg sdcc_vdd_reg_data[MAX_SDCC_CONTROLLER];
7734/* only SDCC1 requires VCCQ voltage */
7735static struct sdcc_reg sdcc_vccq_reg_data[1];
7736/* all SDCC controllers may require voting for VDD PAD voltage */
7737static struct sdcc_reg sdcc_vddp_reg_data[MAX_SDCC_CONTROLLER];
7738
7739struct sdcc_reg_data {
7740 struct sdcc_reg *vdd_data; /* keeps VDD/VCC regulator info */
7741 struct sdcc_reg *vccq_data; /* keeps VCCQ regulator info */
7742 struct sdcc_reg *vddp_data; /* keeps VDD Pad regulator info */
7743 unsigned char sts; /* regulator enable/disable status */
7744};
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007745/* msm8x60 has 5 SDCC controllers */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007746static struct sdcc_reg_data sdcc_vreg_data[MAX_SDCC_CONTROLLER];
7747
7748static int msm_sdcc_vreg_init_reg(struct sdcc_reg *vreg)
7749{
7750 int rc = 0;
7751
7752 /* Get the regulator handle */
7753 vreg->reg = regulator_get(NULL, vreg->reg_name);
7754 if (IS_ERR(vreg->reg)) {
7755 rc = PTR_ERR(vreg->reg);
7756 pr_err("%s: regulator_get(%s) failed. rc=%d\n",
7757 __func__, vreg->reg_name, rc);
7758 goto out;
7759 }
7760
7761 /* Set the voltage level if required */
7762 if (vreg->set_voltage_sup) {
7763 rc = regulator_set_voltage(vreg->reg, vreg->level,
7764 vreg->level);
7765 if (rc) {
7766 pr_err("%s: regulator_set_voltage(%s) failed rc=%d\n",
7767 __func__, vreg->reg_name, rc);
7768 goto vreg_put;
7769 }
7770 }
7771 goto out;
7772
7773vreg_put:
7774 regulator_put(vreg->reg);
7775out:
7776 return rc;
7777}
7778
7779static inline void msm_sdcc_vreg_deinit_reg(struct sdcc_reg *vreg)
7780{
7781 regulator_put(vreg->reg);
7782}
7783
7784/* this init function should be called only once for each SDCC */
7785static int msm_sdcc_vreg_init(int dev_id, unsigned char init)
7786{
7787 int rc = 0;
7788 struct sdcc_reg *curr_vdd_reg, *curr_vccq_reg, *curr_vddp_reg;
7789 struct sdcc_reg_data *curr;
7790
7791 curr = &sdcc_vreg_data[dev_id - 1];
7792 curr_vdd_reg = curr->vdd_data;
7793 curr_vccq_reg = curr->vccq_data;
7794 curr_vddp_reg = curr->vddp_data;
7795
7796 if (init) {
7797 /*
7798 * get the regulator handle from voltage regulator framework
7799 * and then try to set the voltage level for the regulator
7800 */
7801 if (curr_vdd_reg) {
7802 rc = msm_sdcc_vreg_init_reg(curr_vdd_reg);
7803 if (rc)
7804 goto out;
7805 }
7806 if (curr_vccq_reg) {
7807 rc = msm_sdcc_vreg_init_reg(curr_vccq_reg);
7808 if (rc)
7809 goto vdd_reg_deinit;
7810 }
7811 if (curr_vddp_reg) {
7812 rc = msm_sdcc_vreg_init_reg(curr_vddp_reg);
7813 if (rc)
7814 goto vccq_reg_deinit;
7815 }
7816 goto out;
7817 } else
7818 /* deregister with all regulators from regulator framework */
7819 goto vddp_reg_deinit;
7820
7821vddp_reg_deinit:
7822 if (curr_vddp_reg)
7823 msm_sdcc_vreg_deinit_reg(curr_vddp_reg);
7824vccq_reg_deinit:
7825 if (curr_vccq_reg)
7826 msm_sdcc_vreg_deinit_reg(curr_vccq_reg);
7827vdd_reg_deinit:
7828 if (curr_vdd_reg)
7829 msm_sdcc_vreg_deinit_reg(curr_vdd_reg);
7830out:
7831 return rc;
7832}
7833
7834static int msm_sdcc_vreg_enable(struct sdcc_reg *vreg)
7835{
7836 int rc;
7837
7838 if (!vreg->enabled) {
7839 rc = regulator_enable(vreg->reg);
7840 if (rc) {
7841 pr_err("%s: regulator_enable(%s) failed. rc=%d\n",
7842 __func__, vreg->reg_name, rc);
7843 goto out;
7844 }
7845 vreg->enabled = 1;
7846 }
7847
7848 /* Put always_on regulator in HPM (high power mode) */
7849 if (vreg->always_on && vreg->op_pwr_mode_sup) {
7850 rc = regulator_set_optimum_mode(vreg->reg, vreg->hpm_uA);
7851 if (rc < 0) {
7852 pr_err("%s: reg=%s: HPM setting failed"
7853 " hpm_uA=%d, rc=%d\n",
7854 __func__, vreg->reg_name,
7855 vreg->hpm_uA, rc);
7856 goto vreg_disable;
7857 }
7858 rc = 0;
7859 }
7860 goto out;
7861
7862vreg_disable:
7863 regulator_disable(vreg->reg);
7864 vreg->enabled = 0;
7865out:
7866 return rc;
7867}
7868
7869static int msm_sdcc_vreg_disable(struct sdcc_reg *vreg)
7870{
7871 int rc;
7872
7873 /* Never disable always_on regulator */
7874 if (!vreg->always_on) {
7875 rc = regulator_disable(vreg->reg);
7876 if (rc) {
7877 pr_err("%s: regulator_disable(%s) failed. rc=%d\n",
7878 __func__, vreg->reg_name, rc);
7879 goto out;
7880 }
7881 vreg->enabled = 0;
7882 }
7883
7884 /* Put always_on regulator in LPM (low power mode) */
7885 if (vreg->always_on && vreg->op_pwr_mode_sup) {
7886 rc = regulator_set_optimum_mode(vreg->reg, vreg->lpm_uA);
7887 if (rc < 0) {
7888 pr_err("%s: reg=%s: LPM setting failed"
7889 " lpm_uA=%d, rc=%d\n",
7890 __func__,
7891 vreg->reg_name,
7892 vreg->lpm_uA, rc);
7893 goto out;
7894 }
7895 rc = 0;
7896 }
7897
7898out:
7899 return rc;
7900}
7901
7902static int msm_sdcc_setup_vreg(int dev_id, unsigned char enable)
7903{
7904 int rc = 0;
7905 struct sdcc_reg *curr_vdd_reg, *curr_vccq_reg, *curr_vddp_reg;
7906 struct sdcc_reg_data *curr;
7907
7908 curr = &sdcc_vreg_data[dev_id - 1];
7909 curr_vdd_reg = curr->vdd_data;
7910 curr_vccq_reg = curr->vccq_data;
7911 curr_vddp_reg = curr->vddp_data;
7912
7913 /* check if regulators are initialized or not? */
7914 if ((curr_vdd_reg && !curr_vdd_reg->reg) ||
7915 (curr_vccq_reg && !curr_vccq_reg->reg) ||
7916 (curr_vddp_reg && !curr_vddp_reg->reg)) {
7917 /* initialize voltage regulators required for this SDCC */
7918 rc = msm_sdcc_vreg_init(dev_id, 1);
7919 if (rc) {
7920 pr_err("%s: regulator init failed = %d\n",
7921 __func__, rc);
7922 goto out;
7923 }
7924 }
7925
7926 if (curr->sts == enable)
7927 goto out;
7928
7929 if (curr_vdd_reg) {
7930 if (enable)
7931 rc = msm_sdcc_vreg_enable(curr_vdd_reg);
7932 else
7933 rc = msm_sdcc_vreg_disable(curr_vdd_reg);
7934 if (rc)
7935 goto out;
7936 }
7937
7938 if (curr_vccq_reg) {
7939 if (enable)
7940 rc = msm_sdcc_vreg_enable(curr_vccq_reg);
7941 else
7942 rc = msm_sdcc_vreg_disable(curr_vccq_reg);
7943 if (rc)
7944 goto out;
7945 }
7946
7947 if (curr_vddp_reg) {
7948 if (enable)
7949 rc = msm_sdcc_vreg_enable(curr_vddp_reg);
7950 else
7951 rc = msm_sdcc_vreg_disable(curr_vddp_reg);
7952 if (rc)
7953 goto out;
7954 }
7955 curr->sts = enable;
7956
7957out:
7958 return rc;
7959}
7960
7961static u32 msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
7962{
7963 u32 rc_pin_cfg = 0;
7964 u32 rc_vreg_cfg = 0;
7965 u32 rc = 0;
7966 struct platform_device *pdev;
7967 struct msm_sdcc_pin_cfg *curr_pin_cfg;
7968
7969 pdev = container_of(dv, struct platform_device, dev);
7970
7971 /* setup gpio/pad */
7972 curr_pin_cfg = &sdcc_pin_cfg_data[pdev->id - 1];
7973 if (curr_pin_cfg->cfg_sts == !!vdd)
7974 goto setup_vreg;
7975
7976 if (curr_pin_cfg->is_gpio)
7977 rc_pin_cfg = msm_sdcc_setup_gpio(pdev->id, !!vdd);
7978 else
7979 rc_pin_cfg = msm_sdcc_setup_pad(pdev->id, !!vdd);
7980
7981setup_vreg:
7982 /* setup voltage regulators */
7983 rc_vreg_cfg = msm_sdcc_setup_vreg(pdev->id, !!vdd);
7984
7985 if (rc_pin_cfg || rc_vreg_cfg)
7986 rc = rc_pin_cfg ? rc_pin_cfg : rc_vreg_cfg;
7987
7988 return rc;
7989}
7990
7991static void msm_sdcc_sdio_lpm_gpio(struct device *dv, unsigned int active)
7992{
7993 struct msm_sdcc_pin_cfg *curr_pin_cfg;
7994 struct platform_device *pdev;
7995
7996 pdev = container_of(dv, struct platform_device, dev);
7997 /* setup gpio/pad */
7998 curr_pin_cfg = &sdcc_pin_cfg_data[pdev->id - 1];
7999
8000 if (curr_pin_cfg->cfg_sts == active)
8001 return;
8002
8003 curr_pin_cfg->sdio_lpm_gpio_cfg = 1;
8004 if (curr_pin_cfg->is_gpio)
8005 msm_sdcc_setup_gpio(pdev->id, active);
8006 else
8007 msm_sdcc_setup_pad(pdev->id, active);
8008 curr_pin_cfg->sdio_lpm_gpio_cfg = 0;
8009}
8010
8011static int msm_sdc3_get_wpswitch(struct device *dev)
8012{
8013 struct platform_device *pdev;
8014 int status;
8015 pdev = container_of(dev, struct platform_device, dev);
8016
8017 status = gpio_request(GPIO_SDC_WP, "SD_WP_Switch");
8018 if (status) {
8019 pr_err("%s:Failed to request GPIO %d\n",
8020 __func__, GPIO_SDC_WP);
8021 } else {
8022 status = gpio_direction_input(GPIO_SDC_WP);
8023 if (!status) {
8024 status = gpio_get_value_cansleep(GPIO_SDC_WP);
8025 pr_info("%s: WP Status for Slot %d = %d\n",
8026 __func__, pdev->id, status);
8027 }
8028 gpio_free(GPIO_SDC_WP);
8029 }
8030 return status;
8031}
8032
8033#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8034int sdc5_register_status_notify(void (*callback)(int, void *),
8035 void *dev_id)
8036{
8037 sdc5_status_notify_cb = callback;
8038 sdc5_status_notify_cb_devid = dev_id;
8039 return 0;
8040}
8041#endif
8042
8043#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8044int sdc2_register_status_notify(void (*callback)(int, void *),
8045 void *dev_id)
8046{
8047 sdc2_status_notify_cb = callback;
8048 sdc2_status_notify_cb_devid = dev_id;
8049 return 0;
8050}
8051#endif
8052
8053/* Interrupt handler for SDC2 and SDC5 detection
8054 * This function uses dual-edge interrputs settings in order
8055 * to get SDIO detection when the GPIO is rising and SDIO removal
8056 * when the GPIO is falling */
8057static irqreturn_t msm8x60_multi_sdio_slot_status_irq(int irq, void *dev_id)
8058{
8059 int status;
8060
8061 if (!machine_is_msm8x60_fusion() &&
8062 !machine_is_msm8x60_fusn_ffa())
8063 return IRQ_NONE;
8064
8065 status = gpio_get_value(MDM2AP_SYNC);
8066 pr_info("%s: MDM2AP_SYNC Status = %d\n",
8067 __func__, status);
8068
8069#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8070 if (sdc2_status_notify_cb) {
8071 pr_info("%s: calling sdc2_status_notify_cb\n", __func__);
8072 sdc2_status_notify_cb(status,
8073 sdc2_status_notify_cb_devid);
8074 }
8075#endif
8076
8077#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8078 if (sdc5_status_notify_cb) {
8079 pr_info("%s: calling sdc5_status_notify_cb\n", __func__);
8080 sdc5_status_notify_cb(status,
8081 sdc5_status_notify_cb_devid);
8082 }
8083#endif
8084 return IRQ_HANDLED;
8085}
8086
8087static int msm8x60_multi_sdio_init(void)
8088{
8089 int ret, irq_num;
8090
8091 if (!machine_is_msm8x60_fusion() &&
8092 !machine_is_msm8x60_fusn_ffa())
8093 return 0;
8094
8095 ret = msm_gpiomux_get(MDM2AP_SYNC);
8096 if (ret) {
8097 pr_err("%s:Failed to request GPIO %d, ret=%d\n",
8098 __func__, MDM2AP_SYNC, ret);
8099 return ret;
8100 }
8101
8102 irq_num = gpio_to_irq(MDM2AP_SYNC);
8103
8104 ret = request_irq(irq_num,
8105 msm8x60_multi_sdio_slot_status_irq,
8106 IRQ_TYPE_EDGE_BOTH,
8107 "sdio_multidetection", NULL);
8108
8109 if (ret) {
8110 pr_err("%s:Failed to request irq, ret=%d\n",
8111 __func__, ret);
8112 return ret;
8113 }
8114
8115 return ret;
8116}
8117
8118#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8119#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
8120static unsigned int msm8x60_sdcc_slot_status(struct device *dev)
8121{
8122 int status;
8123
8124 status = gpio_request(PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1)
8125 , "SD_HW_Detect");
8126 if (status) {
8127 pr_err("%s:Failed to request GPIO %d\n", __func__,
8128 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8129 } else {
8130 status = gpio_direction_input(
8131 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8132 if (!status)
8133 status = !(gpio_get_value_cansleep(
8134 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1)));
8135 gpio_free(PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8136 }
8137 return (unsigned int) status;
8138}
8139#endif
8140#endif
8141
8142#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8143static int msm_sdcc_cfg_mpm_sdiowakeup(struct device *dev, unsigned mode)
8144{
8145 struct platform_device *pdev;
8146 enum msm_mpm_pin pin;
8147 int ret = 0;
8148
8149 pdev = container_of(dev, struct platform_device, dev);
8150
8151 /* Only SDCC4 slot connected to WLAN chip has wakeup capability */
8152 if (pdev->id == 4)
8153 pin = MSM_MPM_PIN_SDC4_DAT1;
8154 else
8155 return -EINVAL;
8156
8157 switch (mode) {
8158 case SDC_DAT1_DISABLE:
8159 ret = msm_mpm_enable_pin(pin, 0);
8160 break;
8161 case SDC_DAT1_ENABLE:
8162 ret = msm_mpm_set_pin_type(pin, IRQ_TYPE_LEVEL_LOW);
8163 ret = msm_mpm_enable_pin(pin, 1);
8164 break;
8165 case SDC_DAT1_ENWAKE:
8166 ret = msm_mpm_set_pin_wake(pin, 1);
8167 break;
8168 case SDC_DAT1_DISWAKE:
8169 ret = msm_mpm_set_pin_wake(pin, 0);
8170 break;
8171 default:
8172 ret = -EINVAL;
8173 break;
8174 }
8175 return ret;
8176}
8177#endif
8178#endif
8179
8180#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
8181static struct mmc_platform_data msm8x60_sdc1_data = {
8182 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8183 .translate_vdd = msm_sdcc_setup_power,
8184#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
8185 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
8186#else
8187 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8188#endif
8189 .msmsdcc_fmin = 400000,
8190 .msmsdcc_fmid = 24000000,
8191 .msmsdcc_fmax = 48000000,
8192 .nonremovable = 1,
8193 .pclk_src_dfab = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008194};
8195#endif
8196
8197#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8198static struct mmc_platform_data msm8x60_sdc2_data = {
8199 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_165_195,
8200 .translate_vdd = msm_sdcc_setup_power,
8201 .sdio_lpm_gpio_setup = msm_sdcc_sdio_lpm_gpio,
8202 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
8203 .msmsdcc_fmin = 400000,
8204 .msmsdcc_fmid = 24000000,
8205 .msmsdcc_fmax = 48000000,
8206 .nonremovable = 0,
8207 .pclk_src_dfab = 1,
8208 .register_status_notify = sdc2_register_status_notify,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008209#ifdef CONFIG_MSM_SDIO_AL
8210 .is_sdio_al_client = 1,
8211#endif
8212};
8213#endif
8214
8215#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8216static struct mmc_platform_data msm8x60_sdc3_data = {
8217 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8218 .translate_vdd = msm_sdcc_setup_power,
8219 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8220 .wpswitch = msm_sdc3_get_wpswitch,
8221#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
8222 .status = msm8x60_sdcc_slot_status,
8223 .status_irq = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
8224 PMIC_GPIO_SDC3_DET - 1),
8225 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
8226#endif
8227 .msmsdcc_fmin = 400000,
8228 .msmsdcc_fmid = 24000000,
8229 .msmsdcc_fmax = 48000000,
8230 .nonremovable = 0,
8231 .pclk_src_dfab = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008232};
8233#endif
8234
8235#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8236static struct mmc_platform_data msm8x60_sdc4_data = {
8237 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8238 .translate_vdd = msm_sdcc_setup_power,
8239 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8240 .msmsdcc_fmin = 400000,
8241 .msmsdcc_fmid = 24000000,
8242 .msmsdcc_fmax = 48000000,
8243 .nonremovable = 0,
8244 .pclk_src_dfab = 1,
8245 .cfg_mpm_sdiowakeup = msm_sdcc_cfg_mpm_sdiowakeup,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008246};
8247#endif
8248
8249#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8250static struct mmc_platform_data msm8x60_sdc5_data = {
8251 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_165_195,
8252 .translate_vdd = msm_sdcc_setup_power,
8253 .sdio_lpm_gpio_setup = msm_sdcc_sdio_lpm_gpio,
8254 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8255 .msmsdcc_fmin = 400000,
8256 .msmsdcc_fmid = 24000000,
8257 .msmsdcc_fmax = 48000000,
8258 .nonremovable = 0,
8259 .pclk_src_dfab = 1,
8260 .register_status_notify = sdc5_register_status_notify,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008261#ifdef CONFIG_MSM_SDIO_AL
8262 .is_sdio_al_client = 1,
8263#endif
8264};
8265#endif
8266
8267static void __init msm8x60_init_mmc(void)
8268{
8269#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
8270 /* SDCC1 : eMMC card connected */
8271 sdcc_vreg_data[0].vdd_data = &sdcc_vdd_reg_data[0];
8272 sdcc_vreg_data[0].vdd_data->reg_name = "8901_l5";
8273 sdcc_vreg_data[0].vdd_data->set_voltage_sup = 1;
8274 sdcc_vreg_data[0].vdd_data->level = 2850000;
Subhash Jadavania8482a32011-08-08 11:01:44 +05308275 sdcc_vreg_data[0].vdd_data->always_on = 1;
8276 sdcc_vreg_data[0].vdd_data->op_pwr_mode_sup = 1;
8277 sdcc_vreg_data[0].vdd_data->lpm_uA = 9000;
8278 sdcc_vreg_data[0].vdd_data->hpm_uA = 200000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008279
8280 sdcc_vreg_data[0].vccq_data = &sdcc_vccq_reg_data[0];
8281 sdcc_vreg_data[0].vccq_data->reg_name = "8901_lvs0";
8282 sdcc_vreg_data[0].vccq_data->set_voltage_sup = 0;
8283 sdcc_vreg_data[0].vccq_data->always_on = 1;
8284
8285 msm_add_sdcc(1, &msm8x60_sdc1_data);
8286#endif
8287#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8288 /*
8289 * MDM SDIO client is connected to SDC2 on charm SURF/FFA
8290 * and no card is connected on 8660 SURF/FFA/FLUID.
8291 */
8292 sdcc_vreg_data[1].vdd_data = &sdcc_vdd_reg_data[1];
8293 sdcc_vreg_data[1].vdd_data->reg_name = "8058_s3";
8294 sdcc_vreg_data[1].vdd_data->set_voltage_sup = 1;
8295 sdcc_vreg_data[1].vdd_data->level = 1800000;
8296
8297 sdcc_vreg_data[1].vccq_data = NULL;
8298
8299 if (machine_is_msm8x60_fusion())
8300 msm8x60_sdc2_data.msmsdcc_fmax = 24000000;
8301 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8302#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
8303 msm8x60_sdc2_data.sdiowakeup_irq = gpio_to_irq(144);
8304 msm_sdcc_setup_gpio(2, 1);
8305#endif
8306 msm_add_sdcc(2, &msm8x60_sdc2_data);
8307 }
8308#endif
8309#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8310 /* SDCC3 : External card slot connected */
8311 sdcc_vreg_data[2].vdd_data = &sdcc_vdd_reg_data[2];
8312 sdcc_vreg_data[2].vdd_data->reg_name = "8058_l14";
8313 sdcc_vreg_data[2].vdd_data->set_voltage_sup = 1;
8314 sdcc_vreg_data[2].vdd_data->level = 2850000;
8315 sdcc_vreg_data[2].vdd_data->always_on = 1;
8316 sdcc_vreg_data[2].vdd_data->op_pwr_mode_sup = 1;
8317 sdcc_vreg_data[2].vdd_data->lpm_uA = 9000;
8318 sdcc_vreg_data[2].vdd_data->hpm_uA = 200000;
8319
8320 sdcc_vreg_data[2].vccq_data = NULL;
8321
8322 sdcc_vreg_data[2].vddp_data = &sdcc_vddp_reg_data[2];
8323 sdcc_vreg_data[2].vddp_data->reg_name = "8058_l5";
8324 sdcc_vreg_data[2].vddp_data->set_voltage_sup = 1;
8325 sdcc_vreg_data[2].vddp_data->level = 2850000;
8326 sdcc_vreg_data[2].vddp_data->always_on = 1;
8327 sdcc_vreg_data[2].vddp_data->op_pwr_mode_sup = 1;
8328 /* Sleep current required is ~300 uA. But min. RPM
8329 * vote can be in terms of mA (min. 1 mA).
8330 * So let's vote for 2 mA during sleep.
8331 */
8332 sdcc_vreg_data[2].vddp_data->lpm_uA = 2000;
8333 /* Max. Active current required is 16 mA */
8334 sdcc_vreg_data[2].vddp_data->hpm_uA = 16000;
8335
8336 if (machine_is_msm8x60_fluid())
8337 msm8x60_sdc3_data.wpswitch = NULL;
8338 msm_add_sdcc(3, &msm8x60_sdc3_data);
8339#endif
8340#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8341 /* SDCC4 : WLAN WCN1314 chip is connected */
8342 sdcc_vreg_data[3].vdd_data = &sdcc_vdd_reg_data[3];
8343 sdcc_vreg_data[3].vdd_data->reg_name = "8058_s3";
8344 sdcc_vreg_data[3].vdd_data->set_voltage_sup = 1;
8345 sdcc_vreg_data[3].vdd_data->level = 1800000;
8346
8347 sdcc_vreg_data[3].vccq_data = NULL;
8348
8349 msm_add_sdcc(4, &msm8x60_sdc4_data);
8350#endif
8351#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8352 /*
8353 * MDM SDIO client is connected to SDC5 on charm SURF/FFA
8354 * and no card is connected on 8660 SURF/FFA/FLUID.
8355 */
8356 sdcc_vreg_data[4].vdd_data = &sdcc_vdd_reg_data[4];
8357 sdcc_vreg_data[4].vdd_data->reg_name = "8058_s3";
8358 sdcc_vreg_data[4].vdd_data->set_voltage_sup = 1;
8359 sdcc_vreg_data[4].vdd_data->level = 1800000;
8360
8361 sdcc_vreg_data[4].vccq_data = NULL;
8362
8363 if (machine_is_msm8x60_fusion())
8364 msm8x60_sdc5_data.msmsdcc_fmax = 24000000;
8365 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8366#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
8367 msm8x60_sdc5_data.sdiowakeup_irq = gpio_to_irq(99);
8368 msm_sdcc_setup_gpio(5, 1);
8369#endif
8370 msm_add_sdcc(5, &msm8x60_sdc5_data);
8371 }
8372#endif
8373}
8374
8375#if !defined(CONFIG_GPIO_SX150X) && !defined(CONFIG_GPIO_SX150X_MODULE)
8376static inline void display_common_power(int on) {}
8377#else
8378
8379#define _GET_REGULATOR(var, name) do { \
8380 if (var == NULL) { \
8381 var = regulator_get(NULL, name); \
8382 if (IS_ERR(var)) { \
8383 pr_err("'%s' regulator not found, rc=%ld\n", \
8384 name, PTR_ERR(var)); \
8385 var = NULL; \
8386 } \
8387 } \
8388} while (0)
8389
8390static int dsub_regulator(int on)
8391{
8392 static struct regulator *dsub_reg;
8393 static struct regulator *mpp0_reg;
8394 static int dsub_reg_enabled;
8395 int rc = 0;
8396
8397 _GET_REGULATOR(dsub_reg, "8901_l3");
8398 if (IS_ERR(dsub_reg)) {
8399 printk(KERN_ERR "%s: failed to get reg 8901_l3 err=%ld",
8400 __func__, PTR_ERR(dsub_reg));
8401 return PTR_ERR(dsub_reg);
8402 }
8403
8404 _GET_REGULATOR(mpp0_reg, "8901_mpp0");
8405 if (IS_ERR(mpp0_reg)) {
8406 printk(KERN_ERR "%s: failed to get reg 8901_mpp0 err=%ld",
8407 __func__, PTR_ERR(mpp0_reg));
8408 return PTR_ERR(mpp0_reg);
8409 }
8410
8411 if (on && !dsub_reg_enabled) {
8412 rc = regulator_set_voltage(dsub_reg, 3300000, 3300000);
8413 if (rc) {
8414 printk(KERN_ERR "%s: failed to set reg 8901_l3 voltage"
8415 " err=%d", __func__, rc);
8416 goto dsub_regulator_err;
8417 }
8418 rc = regulator_enable(dsub_reg);
8419 if (rc) {
8420 printk(KERN_ERR "%s: failed to enable reg 8901_l3"
8421 " err=%d", __func__, rc);
8422 goto dsub_regulator_err;
8423 }
8424 rc = regulator_enable(mpp0_reg);
8425 if (rc) {
8426 printk(KERN_ERR "%s: failed to enable reg 8901_mpp0"
8427 " err=%d", __func__, rc);
8428 goto dsub_regulator_err;
8429 }
8430 dsub_reg_enabled = 1;
8431 } else if (!on && dsub_reg_enabled) {
8432 rc = regulator_disable(dsub_reg);
8433 if (rc)
8434 printk(KERN_WARNING "%s: failed to disable reg 8901_l3"
8435 " err=%d", __func__, rc);
8436 rc = regulator_disable(mpp0_reg);
8437 if (rc)
8438 printk(KERN_WARNING "%s: failed to disable reg "
8439 "8901_mpp0 err=%d", __func__, rc);
8440 dsub_reg_enabled = 0;
8441 }
8442
8443 return rc;
8444
8445dsub_regulator_err:
8446 regulator_put(mpp0_reg);
8447 regulator_put(dsub_reg);
8448 return rc;
8449}
8450
8451static int display_power_on;
8452static void setup_display_power(void)
8453{
8454 if (display_power_on)
8455 if (lcdc_vga_enabled) {
8456 dsub_regulator(1);
8457 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 0);
8458 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 0);
8459 if (machine_is_msm8x60_ffa() ||
8460 machine_is_msm8x60_fusn_ffa())
8461 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 1);
8462 } else {
8463 dsub_regulator(0);
8464 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 1);
8465 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 1);
8466 if (machine_is_msm8x60_ffa() ||
8467 machine_is_msm8x60_fusn_ffa())
8468 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 0);
8469 }
8470 else {
8471 dsub_regulator(0);
8472 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa())
8473 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 0);
8474 /* BACKLIGHT */
8475 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 0);
8476 /* LVDS */
8477 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 0);
8478 }
8479}
8480
8481#define _GET_REGULATOR(var, name) do { \
8482 if (var == NULL) { \
8483 var = regulator_get(NULL, name); \
8484 if (IS_ERR(var)) { \
8485 pr_err("'%s' regulator not found, rc=%ld\n", \
8486 name, PTR_ERR(var)); \
8487 var = NULL; \
8488 } \
8489 } \
8490} while (0)
8491
8492#define GPIO_RESX_N (GPIO_EXPANDER_GPIO_BASE + 2)
8493
8494static void display_common_power(int on)
8495{
8496 int rc;
8497 static struct regulator *display_reg;
8498
8499 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
8500 machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8501 if (on) {
8502 /* LVDS */
8503 _GET_REGULATOR(display_reg, "8901_l2");
8504 if (!display_reg)
8505 return;
8506 rc = regulator_set_voltage(display_reg,
8507 3300000, 3300000);
8508 if (rc)
8509 goto out;
8510 rc = regulator_enable(display_reg);
8511 if (rc)
8512 goto out;
8513 rc = gpio_request(GPIO_LVDS_SHUTDOWN_N,
8514 "LVDS_STDN_OUT_N");
8515 if (rc) {
8516 printk(KERN_ERR "%s: LVDS gpio %d request"
8517 "failed\n", __func__,
8518 GPIO_LVDS_SHUTDOWN_N);
8519 goto out2;
8520 }
8521
8522 /* BACKLIGHT */
8523 rc = gpio_request(GPIO_BACKLIGHT_EN, "BACKLIGHT_EN");
8524 if (rc) {
8525 printk(KERN_ERR "%s: BACKLIGHT gpio %d request"
8526 "failed\n", __func__,
8527 GPIO_BACKLIGHT_EN);
8528 goto out3;
8529 }
8530
8531 if (machine_is_msm8x60_ffa() ||
8532 machine_is_msm8x60_fusn_ffa()) {
8533 rc = gpio_request(GPIO_DONGLE_PWR_EN,
8534 "DONGLE_PWR_EN");
8535 if (rc) {
8536 printk(KERN_ERR "%s: DONGLE_PWR_EN gpio"
8537 " %d request failed\n", __func__,
8538 GPIO_DONGLE_PWR_EN);
8539 goto out4;
8540 }
8541 }
8542
8543 gpio_direction_output(GPIO_LVDS_SHUTDOWN_N, 0);
8544 gpio_direction_output(GPIO_BACKLIGHT_EN, 0);
8545 if (machine_is_msm8x60_ffa() ||
8546 machine_is_msm8x60_fusn_ffa())
8547 gpio_direction_output(GPIO_DONGLE_PWR_EN, 0);
8548 mdelay(20);
8549 display_power_on = 1;
8550 setup_display_power();
8551 } else {
8552 if (display_power_on) {
8553 display_power_on = 0;
8554 setup_display_power();
8555 mdelay(20);
8556 if (machine_is_msm8x60_ffa() ||
8557 machine_is_msm8x60_fusn_ffa())
8558 gpio_free(GPIO_DONGLE_PWR_EN);
8559 goto out4;
8560 }
8561 }
8562 }
8563#if defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
8564 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA)
8565 else if (machine_is_msm8x60_fluid()) {
8566 static struct regulator *fluid_reg;
8567 static struct regulator *fluid_reg2;
8568
8569 if (on) {
8570 _GET_REGULATOR(fluid_reg, "8901_l2");
8571 if (!fluid_reg)
8572 return;
8573 _GET_REGULATOR(fluid_reg2, "8058_s3");
8574 if (!fluid_reg2) {
8575 regulator_put(fluid_reg);
8576 return;
8577 }
8578 rc = gpio_request(GPIO_RESX_N, "RESX_N");
8579 if (rc) {
8580 regulator_put(fluid_reg2);
8581 regulator_put(fluid_reg);
8582 return;
8583 }
8584 regulator_set_voltage(fluid_reg, 2850000, 2850000);
8585 regulator_set_voltage(fluid_reg2, 1800000, 1800000);
8586 regulator_enable(fluid_reg);
8587 regulator_enable(fluid_reg2);
8588 msleep(20);
8589 gpio_direction_output(GPIO_RESX_N, 0);
8590 udelay(10);
8591 gpio_set_value_cansleep(GPIO_RESX_N, 1);
8592 display_power_on = 1;
8593 setup_display_power();
8594 } else {
8595 gpio_set_value_cansleep(GPIO_RESX_N, 0);
8596 gpio_free(GPIO_RESX_N);
8597 msleep(20);
8598 regulator_disable(fluid_reg2);
8599 regulator_disable(fluid_reg);
8600 regulator_put(fluid_reg2);
8601 regulator_put(fluid_reg);
8602 display_power_on = 0;
8603 setup_display_power();
8604 fluid_reg = NULL;
8605 fluid_reg2 = NULL;
8606 }
8607 }
8608#endif
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04008609#if defined(CONFIG_FB_MSM_LCDC_NT35582_WVGA)
8610 else if (machine_is_msm8x60_dragon()) {
8611 static struct regulator *dragon_reg;
8612 static struct regulator *dragon_reg2;
8613
8614 if (on) {
8615 _GET_REGULATOR(dragon_reg, "8901_l2");
8616 if (!dragon_reg)
8617 return;
8618 _GET_REGULATOR(dragon_reg2, "8058_l16");
8619 if (!dragon_reg2) {
8620 regulator_put(dragon_reg);
8621 dragon_reg = NULL;
8622 return;
8623 }
8624
8625 rc = gpio_request(GPIO_NT35582_BL_EN, "lcdc_bl_en");
8626 if (rc) {
8627 pr_err("%s: gpio %d request failed with rc=%d\n",
8628 __func__, GPIO_NT35582_BL_EN, rc);
8629 regulator_put(dragon_reg);
8630 regulator_put(dragon_reg2);
8631 dragon_reg = NULL;
8632 dragon_reg2 = NULL;
8633 return;
8634 }
8635
8636 if (gpio_tlmm_config(GPIO_CFG(GPIO_NT35582_RESET, 0,
8637 GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN,
8638 GPIO_CFG_16MA), GPIO_CFG_ENABLE)) {
8639 pr_err("%s: config gpio '%d' failed!\n",
8640 __func__, GPIO_NT35582_RESET);
8641 gpio_free(GPIO_NT35582_BL_EN);
8642 regulator_put(dragon_reg);
8643 regulator_put(dragon_reg2);
8644 dragon_reg = NULL;
8645 dragon_reg2 = NULL;
8646 return;
8647 }
8648
8649 rc = gpio_request(GPIO_NT35582_RESET, "lcdc_reset");
8650 if (rc) {
8651 pr_err("%s: unable to request gpio %d (rc=%d)\n",
8652 __func__, GPIO_NT35582_RESET, rc);
8653 gpio_free(GPIO_NT35582_BL_EN);
8654 regulator_put(dragon_reg);
8655 regulator_put(dragon_reg2);
8656 dragon_reg = NULL;
8657 dragon_reg2 = NULL;
8658 return;
8659 }
8660
8661 regulator_set_voltage(dragon_reg, 3300000, 3300000);
8662 regulator_set_voltage(dragon_reg2, 1800000, 1800000);
8663 regulator_enable(dragon_reg);
8664 regulator_enable(dragon_reg2);
8665 msleep(20);
8666
8667 gpio_set_value_cansleep(GPIO_NT35582_RESET, 1);
8668 msleep(20);
8669 gpio_set_value_cansleep(GPIO_NT35582_RESET, 0);
8670 msleep(20);
8671 gpio_set_value_cansleep(GPIO_NT35582_RESET, 1);
8672 msleep(50);
8673
8674 gpio_set_value_cansleep(GPIO_NT35582_BL_EN, 1);
8675
8676 display_power_on = 1;
8677 } else if ((dragon_reg != NULL) && (dragon_reg2 != NULL)) {
8678 gpio_free(GPIO_NT35582_RESET);
8679 gpio_free(GPIO_NT35582_BL_EN);
8680 regulator_disable(dragon_reg2);
8681 regulator_disable(dragon_reg);
8682 regulator_put(dragon_reg2);
8683 regulator_put(dragon_reg);
8684 display_power_on = 0;
8685 dragon_reg = NULL;
8686 dragon_reg2 = NULL;
8687 }
8688 }
8689#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008690 return;
8691
8692out4:
8693 gpio_free(GPIO_BACKLIGHT_EN);
8694out3:
8695 gpio_free(GPIO_LVDS_SHUTDOWN_N);
8696out2:
8697 regulator_disable(display_reg);
8698out:
8699 regulator_put(display_reg);
8700 display_reg = NULL;
8701}
8702#undef _GET_REGULATOR
8703#endif
8704
8705static int mipi_dsi_panel_power(int on);
8706
8707#define LCDC_NUM_GPIO 28
8708#define LCDC_GPIO_START 0
8709
8710static void lcdc_samsung_panel_power(int on)
8711{
8712 int n, ret = 0;
8713
8714 display_common_power(on);
8715
8716 for (n = 0; n < LCDC_NUM_GPIO; n++) {
8717 if (on) {
8718 ret = gpio_request(LCDC_GPIO_START + n, "LCDC_GPIO");
8719 if (unlikely(ret)) {
8720 pr_err("%s not able to get gpio\n", __func__);
8721 break;
8722 }
8723 } else
8724 gpio_free(LCDC_GPIO_START + n);
8725 }
8726
8727 if (ret) {
8728 for (n--; n >= 0; n--)
8729 gpio_free(LCDC_GPIO_START + n);
8730 }
8731
8732 mipi_dsi_panel_power(0); /* set 8058_ldo0 to LPM */
8733}
8734
8735#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
8736#define _GET_REGULATOR(var, name) do { \
8737 var = regulator_get(NULL, name); \
8738 if (IS_ERR(var)) { \
8739 pr_err("'%s' regulator not found, rc=%ld\n", \
8740 name, IS_ERR(var)); \
8741 var = NULL; \
8742 return -ENODEV; \
8743 } \
8744} while (0)
8745
8746static int hdmi_enable_5v(int on)
8747{
8748 static struct regulator *reg_8901_hdmi_mvs; /* HDMI_5V */
8749 static struct regulator *reg_8901_mpp0; /* External 5V */
8750 static int prev_on;
8751 int rc;
8752
8753 if (on == prev_on)
8754 return 0;
8755
8756 if (!reg_8901_hdmi_mvs)
8757 _GET_REGULATOR(reg_8901_hdmi_mvs, "8901_hdmi_mvs");
8758 if (!reg_8901_mpp0)
8759 _GET_REGULATOR(reg_8901_mpp0, "8901_mpp0");
8760
8761 if (on) {
8762 rc = regulator_enable(reg_8901_mpp0);
8763 if (rc) {
8764 pr_err("'%s' regulator enable failed, rc=%d\n",
8765 "reg_8901_mpp0", rc);
8766 return rc;
8767 }
8768 rc = regulator_enable(reg_8901_hdmi_mvs);
8769 if (rc) {
8770 pr_err("'%s' regulator enable failed, rc=%d\n",
8771 "8901_hdmi_mvs", rc);
8772 return rc;
8773 }
8774 pr_info("%s(on): success\n", __func__);
8775 } else {
8776 rc = regulator_disable(reg_8901_hdmi_mvs);
8777 if (rc)
8778 pr_warning("'%s' regulator disable failed, rc=%d\n",
8779 "8901_hdmi_mvs", rc);
8780 rc = regulator_disable(reg_8901_mpp0);
8781 if (rc)
8782 pr_warning("'%s' regulator disable failed, rc=%d\n",
8783 "reg_8901_mpp0", rc);
8784 pr_info("%s(off): success\n", __func__);
8785 }
8786
8787 prev_on = on;
8788
8789 return 0;
8790}
8791
8792static int hdmi_core_power(int on, int show)
8793{
8794 static struct regulator *reg_8058_l16; /* VDD_HDMI */
8795 static int prev_on;
8796 int rc;
8797
8798 if (on == prev_on)
8799 return 0;
8800
8801 if (!reg_8058_l16)
8802 _GET_REGULATOR(reg_8058_l16, "8058_l16");
8803
8804 if (on) {
8805 rc = regulator_set_voltage(reg_8058_l16, 1800000, 1800000);
8806 if (!rc)
8807 rc = regulator_enable(reg_8058_l16);
8808 if (rc) {
8809 pr_err("'%s' regulator enable failed, rc=%d\n",
8810 "8058_l16", rc);
8811 return rc;
8812 }
8813 rc = gpio_request(170, "HDMI_DDC_CLK");
8814 if (rc) {
8815 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8816 "HDMI_DDC_CLK", 170, rc);
8817 goto error1;
8818 }
8819 rc = gpio_request(171, "HDMI_DDC_DATA");
8820 if (rc) {
8821 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8822 "HDMI_DDC_DATA", 171, rc);
8823 goto error2;
8824 }
8825 rc = gpio_request(172, "HDMI_HPD");
8826 if (rc) {
8827 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8828 "HDMI_HPD", 172, rc);
8829 goto error3;
8830 }
8831 pr_info("%s(on): success\n", __func__);
8832 } else {
8833 gpio_free(170);
8834 gpio_free(171);
8835 gpio_free(172);
8836 rc = regulator_disable(reg_8058_l16);
8837 if (rc)
8838 pr_warning("'%s' regulator disable failed, rc=%d\n",
8839 "8058_l16", rc);
8840 pr_info("%s(off): success\n", __func__);
8841 }
8842
8843 prev_on = on;
8844
8845 return 0;
8846
8847error3:
8848 gpio_free(171);
8849error2:
8850 gpio_free(170);
8851error1:
8852 regulator_disable(reg_8058_l16);
8853 return rc;
8854}
8855
8856static int hdmi_cec_power(int on)
8857{
8858 static struct regulator *reg_8901_l3; /* HDMI_CEC */
8859 static int prev_on;
8860 int rc;
8861
8862 if (on == prev_on)
8863 return 0;
8864
8865 if (!reg_8901_l3)
8866 _GET_REGULATOR(reg_8901_l3, "8901_l3");
8867
8868 if (on) {
8869 rc = regulator_set_voltage(reg_8901_l3, 3300000, 3300000);
8870 if (!rc)
8871 rc = regulator_enable(reg_8901_l3);
8872 if (rc) {
8873 pr_err("'%s' regulator enable failed, rc=%d\n",
8874 "8901_l3", rc);
8875 return rc;
8876 }
8877 rc = gpio_request(169, "HDMI_CEC_VAR");
8878 if (rc) {
8879 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8880 "HDMI_CEC_VAR", 169, rc);
8881 goto error;
8882 }
8883 pr_info("%s(on): success\n", __func__);
8884 } else {
8885 gpio_free(169);
8886 rc = regulator_disable(reg_8901_l3);
8887 if (rc)
8888 pr_warning("'%s' regulator disable failed, rc=%d\n",
8889 "8901_l3", rc);
8890 pr_info("%s(off): success\n", __func__);
8891 }
8892
8893 prev_on = on;
8894
8895 return 0;
8896error:
8897 regulator_disable(reg_8901_l3);
8898 return rc;
8899}
8900
8901#undef _GET_REGULATOR
8902
8903#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
8904
8905static int lcdc_panel_power(int on)
8906{
8907 int flag_on = !!on;
8908 static int lcdc_power_save_on;
8909
8910 if (lcdc_power_save_on == flag_on)
8911 return 0;
8912
8913 lcdc_power_save_on = flag_on;
8914
8915 lcdc_samsung_panel_power(on);
8916
8917 return 0;
8918}
8919
8920#ifdef CONFIG_MSM_BUS_SCALING
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008921static struct msm_bus_vectors mdp_init_vectors[] = {
8922 /* For now, 0th array entry is reserved.
8923 * Please leave 0 as is and don't use it
8924 */
8925 {
8926 .src = MSM_BUS_MASTER_MDP_PORT0,
8927 .dst = MSM_BUS_SLAVE_SMI,
8928 .ab = 0,
8929 .ib = 0,
8930 },
8931 /* Master and slaves can be from different fabrics */
8932 {
8933 .src = MSM_BUS_MASTER_MDP_PORT0,
8934 .dst = MSM_BUS_SLAVE_EBI_CH0,
8935 .ab = 0,
8936 .ib = 0,
8937 },
8938};
8939
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07008940#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
8941static struct msm_bus_vectors hdmi_as_primary_vectors[] = {
8942 /* If HDMI is used as primary */
8943 {
8944 .src = MSM_BUS_MASTER_MDP_PORT0,
8945 .dst = MSM_BUS_SLAVE_SMI,
8946 .ab = 2000000000,
8947 .ib = 2000000000,
8948 },
8949 /* Master and slaves can be from different fabrics */
8950 {
8951 .src = MSM_BUS_MASTER_MDP_PORT0,
8952 .dst = MSM_BUS_SLAVE_EBI_CH0,
8953 .ab = 2000000000,
8954 .ib = 2000000000,
8955 },
8956};
8957
8958static struct msm_bus_paths mdp_bus_scale_usecases[] = {
8959 {
8960 ARRAY_SIZE(mdp_init_vectors),
8961 mdp_init_vectors,
8962 },
8963 {
8964 ARRAY_SIZE(hdmi_as_primary_vectors),
8965 hdmi_as_primary_vectors,
8966 },
8967 {
8968 ARRAY_SIZE(hdmi_as_primary_vectors),
8969 hdmi_as_primary_vectors,
8970 },
8971 {
8972 ARRAY_SIZE(hdmi_as_primary_vectors),
8973 hdmi_as_primary_vectors,
8974 },
8975 {
8976 ARRAY_SIZE(hdmi_as_primary_vectors),
8977 hdmi_as_primary_vectors,
8978 },
8979 {
8980 ARRAY_SIZE(hdmi_as_primary_vectors),
8981 hdmi_as_primary_vectors,
8982 },
8983};
8984#else
8985#ifdef CONFIG_FB_MSM_LCDC_DSUB
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008986static struct msm_bus_vectors mdp_sd_smi_vectors[] = {
8987 /* Default case static display/UI/2d/3d if FB SMI */
8988 {
8989 .src = MSM_BUS_MASTER_MDP_PORT0,
8990 .dst = MSM_BUS_SLAVE_SMI,
8991 .ab = 388800000,
8992 .ib = 486000000,
8993 },
8994 /* Master and slaves can be from different fabrics */
8995 {
8996 .src = MSM_BUS_MASTER_MDP_PORT0,
8997 .dst = MSM_BUS_SLAVE_EBI_CH0,
8998 .ab = 0,
8999 .ib = 0,
9000 },
9001};
9002
9003static struct msm_bus_vectors mdp_sd_ebi_vectors[] = {
9004 /* Default case static display/UI/2d/3d if FB SMI */
9005 {
9006 .src = MSM_BUS_MASTER_MDP_PORT0,
9007 .dst = MSM_BUS_SLAVE_SMI,
9008 .ab = 0,
9009 .ib = 0,
9010 },
9011 /* Master and slaves can be from different fabrics */
9012 {
9013 .src = MSM_BUS_MASTER_MDP_PORT0,
9014 .dst = MSM_BUS_SLAVE_EBI_CH0,
9015 .ab = 388800000,
9016 .ib = 486000000 * 2,
9017 },
9018};
9019static struct msm_bus_vectors mdp_vga_vectors[] = {
9020 /* VGA and less video */
9021 {
9022 .src = MSM_BUS_MASTER_MDP_PORT0,
9023 .dst = MSM_BUS_SLAVE_SMI,
9024 .ab = 458092800,
9025 .ib = 572616000,
9026 },
9027 {
9028 .src = MSM_BUS_MASTER_MDP_PORT0,
9029 .dst = MSM_BUS_SLAVE_EBI_CH0,
9030 .ab = 458092800,
9031 .ib = 572616000 * 2,
9032 },
9033};
9034static struct msm_bus_vectors mdp_720p_vectors[] = {
9035 /* 720p and less video */
9036 {
9037 .src = MSM_BUS_MASTER_MDP_PORT0,
9038 .dst = MSM_BUS_SLAVE_SMI,
9039 .ab = 471744000,
9040 .ib = 589680000,
9041 },
9042 /* Master and slaves can be from different fabrics */
9043 {
9044 .src = MSM_BUS_MASTER_MDP_PORT0,
9045 .dst = MSM_BUS_SLAVE_EBI_CH0,
9046 .ab = 471744000,
9047 .ib = 589680000 * 2,
9048 },
9049};
9050
9051static struct msm_bus_vectors mdp_1080p_vectors[] = {
9052 /* 1080p and less video */
9053 {
9054 .src = MSM_BUS_MASTER_MDP_PORT0,
9055 .dst = MSM_BUS_SLAVE_SMI,
9056 .ab = 575424000,
9057 .ib = 719280000,
9058 },
9059 /* Master and slaves can be from different fabrics */
9060 {
9061 .src = MSM_BUS_MASTER_MDP_PORT0,
9062 .dst = MSM_BUS_SLAVE_EBI_CH0,
9063 .ab = 575424000,
9064 .ib = 719280000 * 2,
9065 },
9066};
9067
9068#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009069static struct msm_bus_vectors mdp_sd_smi_vectors[] = {
9070 /* Default case static display/UI/2d/3d if FB SMI */
9071 {
9072 .src = MSM_BUS_MASTER_MDP_PORT0,
9073 .dst = MSM_BUS_SLAVE_SMI,
9074 .ab = 175110000,
9075 .ib = 218887500,
9076 },
9077 /* Master and slaves can be from different fabrics */
9078 {
9079 .src = MSM_BUS_MASTER_MDP_PORT0,
9080 .dst = MSM_BUS_SLAVE_EBI_CH0,
9081 .ab = 0,
9082 .ib = 0,
9083 },
9084};
9085
9086static struct msm_bus_vectors mdp_sd_ebi_vectors[] = {
9087 /* Default case static display/UI/2d/3d if FB SMI */
9088 {
9089 .src = MSM_BUS_MASTER_MDP_PORT0,
9090 .dst = MSM_BUS_SLAVE_SMI,
9091 .ab = 0,
9092 .ib = 0,
9093 },
9094 /* Master and slaves can be from different fabrics */
9095 {
9096 .src = MSM_BUS_MASTER_MDP_PORT0,
9097 .dst = MSM_BUS_SLAVE_EBI_CH0,
9098 .ab = 216000000,
9099 .ib = 270000000 * 2,
9100 },
9101};
9102static struct msm_bus_vectors mdp_vga_vectors[] = {
9103 /* VGA and less video */
9104 {
9105 .src = MSM_BUS_MASTER_MDP_PORT0,
9106 .dst = MSM_BUS_SLAVE_SMI,
9107 .ab = 216000000,
9108 .ib = 270000000,
9109 },
9110 {
9111 .src = MSM_BUS_MASTER_MDP_PORT0,
9112 .dst = MSM_BUS_SLAVE_EBI_CH0,
9113 .ab = 216000000,
9114 .ib = 270000000 * 2,
9115 },
9116};
9117
9118static struct msm_bus_vectors mdp_720p_vectors[] = {
9119 /* 720p and less video */
9120 {
9121 .src = MSM_BUS_MASTER_MDP_PORT0,
9122 .dst = MSM_BUS_SLAVE_SMI,
9123 .ab = 230400000,
9124 .ib = 288000000,
9125 },
9126 /* Master and slaves can be from different fabrics */
9127 {
9128 .src = MSM_BUS_MASTER_MDP_PORT0,
9129 .dst = MSM_BUS_SLAVE_EBI_CH0,
9130 .ab = 230400000,
9131 .ib = 288000000 * 2,
9132 },
9133};
9134
9135static struct msm_bus_vectors mdp_1080p_vectors[] = {
9136 /* 1080p and less video */
9137 {
9138 .src = MSM_BUS_MASTER_MDP_PORT0,
9139 .dst = MSM_BUS_SLAVE_SMI,
9140 .ab = 334080000,
9141 .ib = 417600000,
9142 },
9143 /* Master and slaves can be from different fabrics */
9144 {
9145 .src = MSM_BUS_MASTER_MDP_PORT0,
9146 .dst = MSM_BUS_SLAVE_EBI_CH0,
9147 .ab = 334080000,
Ravishangar Kalyanam731beb92011-07-07 18:27:32 -07009148 .ib = 550000000 * 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009149 },
9150};
9151
9152#endif
9153static struct msm_bus_paths mdp_bus_scale_usecases[] = {
9154 {
9155 ARRAY_SIZE(mdp_init_vectors),
9156 mdp_init_vectors,
9157 },
9158 {
9159 ARRAY_SIZE(mdp_sd_smi_vectors),
9160 mdp_sd_smi_vectors,
9161 },
9162 {
9163 ARRAY_SIZE(mdp_sd_ebi_vectors),
9164 mdp_sd_ebi_vectors,
9165 },
9166 {
9167 ARRAY_SIZE(mdp_vga_vectors),
9168 mdp_vga_vectors,
9169 },
9170 {
9171 ARRAY_SIZE(mdp_720p_vectors),
9172 mdp_720p_vectors,
9173 },
9174 {
9175 ARRAY_SIZE(mdp_1080p_vectors),
9176 mdp_1080p_vectors,
9177 },
9178};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009179#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009180static struct msm_bus_scale_pdata mdp_bus_scale_pdata = {
9181 mdp_bus_scale_usecases,
9182 ARRAY_SIZE(mdp_bus_scale_usecases),
9183 .name = "mdp",
9184};
9185
9186#endif
9187#ifdef CONFIG_MSM_BUS_SCALING
9188static struct msm_bus_vectors dtv_bus_init_vectors[] = {
9189 /* For now, 0th array entry is reserved.
9190 * Please leave 0 as is and don't use it
9191 */
9192 {
9193 .src = MSM_BUS_MASTER_MDP_PORT0,
9194 .dst = MSM_BUS_SLAVE_SMI,
9195 .ab = 0,
9196 .ib = 0,
9197 },
9198 /* Master and slaves can be from different fabrics */
9199 {
9200 .src = MSM_BUS_MASTER_MDP_PORT0,
9201 .dst = MSM_BUS_SLAVE_EBI_CH0,
9202 .ab = 0,
9203 .ib = 0,
9204 },
9205};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009206#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
9207static struct msm_bus_vectors dtv_bus_def_vectors[] = {
9208 /* For now, 0th array entry is reserved.
9209 * Please leave 0 as is and don't use it
9210 */
9211 {
9212 .src = MSM_BUS_MASTER_MDP_PORT0,
9213 .dst = MSM_BUS_SLAVE_SMI,
9214 .ab = 2000000000,
9215 .ib = 2000000000,
9216 },
9217 /* Master and slaves can be from different fabrics */
9218 {
9219 .src = MSM_BUS_MASTER_MDP_PORT0,
9220 .dst = MSM_BUS_SLAVE_EBI_CH0,
9221 .ab = 2000000000,
9222 .ib = 2000000000,
9223 },
9224};
9225#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009226static struct msm_bus_vectors dtv_bus_def_vectors[] = {
9227 /* For now, 0th array entry is reserved.
9228 * Please leave 0 as is and don't use it
9229 */
9230 {
9231 .src = MSM_BUS_MASTER_MDP_PORT0,
9232 .dst = MSM_BUS_SLAVE_SMI,
9233 .ab = 566092800,
9234 .ib = 707616000,
9235 },
9236 /* Master and slaves can be from different fabrics */
9237 {
9238 .src = MSM_BUS_MASTER_MDP_PORT0,
9239 .dst = MSM_BUS_SLAVE_EBI_CH0,
9240 .ab = 566092800,
9241 .ib = 707616000,
9242 },
9243};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009244#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009245static struct msm_bus_paths dtv_bus_scale_usecases[] = {
9246 {
9247 ARRAY_SIZE(dtv_bus_init_vectors),
9248 dtv_bus_init_vectors,
9249 },
9250 {
9251 ARRAY_SIZE(dtv_bus_def_vectors),
9252 dtv_bus_def_vectors,
9253 },
9254};
9255static struct msm_bus_scale_pdata dtv_bus_scale_pdata = {
9256 dtv_bus_scale_usecases,
9257 ARRAY_SIZE(dtv_bus_scale_usecases),
9258 .name = "dtv",
9259};
9260
9261static struct lcdc_platform_data dtv_pdata = {
9262 .bus_scale_table = &dtv_bus_scale_pdata,
9263};
9264#endif
9265
9266
9267static struct lcdc_platform_data lcdc_pdata = {
9268 .lcdc_power_save = lcdc_panel_power,
9269};
9270
9271
9272#define MDP_VSYNC_GPIO 28
9273
9274/*
9275 * MIPI_DSI only use 8058_LDO0 which need always on
9276 * therefore it need to be put at low power mode if
9277 * it was not used instead of turn it off.
9278 */
9279static int mipi_dsi_panel_power(int on)
9280{
9281 int flag_on = !!on;
9282 static int mipi_dsi_power_save_on;
9283 static struct regulator *ldo0;
9284 int rc = 0;
9285
9286 if (mipi_dsi_power_save_on == flag_on)
9287 return 0;
9288
9289 mipi_dsi_power_save_on = flag_on;
9290
9291 if (ldo0 == NULL) { /* init */
9292 ldo0 = regulator_get(NULL, "8058_l0");
9293 if (IS_ERR(ldo0)) {
9294 pr_debug("%s: LDO0 failed\n", __func__);
9295 rc = PTR_ERR(ldo0);
9296 return rc;
9297 }
9298
9299 rc = regulator_set_voltage(ldo0, 1200000, 1200000);
9300 if (rc)
9301 goto out;
9302
9303 rc = regulator_enable(ldo0);
9304 if (rc)
9305 goto out;
9306 }
9307
9308 if (on) {
9309 /* set ldo0 to HPM */
9310 rc = regulator_set_optimum_mode(ldo0, 100000);
9311 if (rc < 0)
9312 goto out;
9313 } else {
9314 /* set ldo0 to LPM */
Padmanabhan Komanduru0b478ff2011-11-22 19:15:40 +05309315 rc = regulator_set_optimum_mode(ldo0, 1000);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009316 if (rc < 0)
9317 goto out;
9318 }
9319
9320 return 0;
9321out:
9322 regulator_disable(ldo0);
9323 regulator_put(ldo0);
9324 ldo0 = NULL;
9325 return rc;
9326}
9327
9328static struct mipi_dsi_platform_data mipi_dsi_pdata = {
9329 .vsync_gpio = MDP_VSYNC_GPIO,
9330 .dsi_power_save = mipi_dsi_panel_power,
9331};
9332
9333#ifdef CONFIG_FB_MSM_TVOUT
9334static struct regulator *reg_8058_l13;
9335
9336static int atv_dac_power(int on)
9337{
9338 int rc = 0;
9339 #define _GET_REGULATOR(var, name) do { \
9340 var = regulator_get(NULL, name); \
9341 if (IS_ERR(var)) { \
9342 pr_info("'%s' regulator not found, rc=%ld\n", \
9343 name, IS_ERR(var)); \
9344 var = NULL; \
9345 return -ENODEV; \
9346 } \
9347 } while (0)
9348
9349 if (!reg_8058_l13)
9350 _GET_REGULATOR(reg_8058_l13, "8058_l13");
9351 #undef _GET_REGULATOR
9352
9353 if (on) {
9354 rc = regulator_set_voltage(reg_8058_l13, 2050000, 2050000);
9355 if (rc) {
9356 pr_info("%s: '%s' regulator set voltage failed,\
9357 rc=%d\n", __func__, "8058_l13", rc);
9358 return rc;
9359 }
9360
9361 rc = regulator_enable(reg_8058_l13);
9362 if (rc) {
9363 pr_err("%s: '%s' regulator enable failed,\
9364 rc=%d\n", __func__, "8058_l13", rc);
9365 return rc;
9366 }
9367 } else {
9368 rc = regulator_force_disable(reg_8058_l13);
9369 if (rc)
9370 pr_warning("%s: '%s' regulator disable failed, rc=%d\n",
9371 __func__, "8058_l13", rc);
9372 }
9373 return rc;
9374
9375}
9376#endif
9377
9378#ifdef CONFIG_FB_MSM_MIPI_DSI
9379int mdp_core_clk_rate_table[] = {
9380 85330000,
9381 85330000,
9382 160000000,
9383 200000000,
9384};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009385#elif defined(CONFIG_FB_MSM_HDMI_AS_PRIMARY)
9386int mdp_core_clk_rate_table[] = {
9387 200000000,
9388 200000000,
9389 200000000,
9390 200000000,
9391};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009392#else
9393int mdp_core_clk_rate_table[] = {
9394 59080000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009395 85330000,
kuogee hsieh26791a92011-08-01 18:35:58 -07009396 128000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009397 200000000,
9398};
9399#endif
9400
9401static struct msm_panel_common_pdata mdp_pdata = {
9402 .gpio = MDP_VSYNC_GPIO,
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009403#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
9404 .mdp_core_clk_rate = 200000000,
9405#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009406 .mdp_core_clk_rate = 59080000,
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009407#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009408 .mdp_core_clk_table = mdp_core_clk_rate_table,
9409 .num_mdp_clk = ARRAY_SIZE(mdp_core_clk_rate_table),
9410#ifdef CONFIG_MSM_BUS_SCALING
9411 .mdp_bus_scale_table = &mdp_bus_scale_pdata,
9412#endif
9413 .mdp_rev = MDP_REV_41,
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07009414 .writeback_offset = writeback_offset,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009415};
9416
9417#ifdef CONFIG_FB_MSM_TVOUT
9418
9419#ifdef CONFIG_MSM_BUS_SCALING
9420static struct msm_bus_vectors atv_bus_init_vectors[] = {
9421 /* For now, 0th array entry is reserved.
9422 * Please leave 0 as is and don't use it
9423 */
9424 {
9425 .src = MSM_BUS_MASTER_MDP_PORT0,
9426 .dst = MSM_BUS_SLAVE_SMI,
9427 .ab = 0,
9428 .ib = 0,
9429 },
9430 /* Master and slaves can be from different fabrics */
9431 {
9432 .src = MSM_BUS_MASTER_MDP_PORT0,
9433 .dst = MSM_BUS_SLAVE_EBI_CH0,
9434 .ab = 0,
9435 .ib = 0,
9436 },
9437};
9438static struct msm_bus_vectors atv_bus_def_vectors[] = {
9439 /* For now, 0th array entry is reserved.
9440 * Please leave 0 as is and don't use it
9441 */
9442 {
9443 .src = MSM_BUS_MASTER_MDP_PORT0,
9444 .dst = MSM_BUS_SLAVE_SMI,
9445 .ab = 236390400,
9446 .ib = 265939200,
9447 },
9448 /* Master and slaves can be from different fabrics */
9449 {
9450 .src = MSM_BUS_MASTER_MDP_PORT0,
9451 .dst = MSM_BUS_SLAVE_EBI_CH0,
9452 .ab = 236390400,
9453 .ib = 265939200,
9454 },
9455};
9456static struct msm_bus_paths atv_bus_scale_usecases[] = {
9457 {
9458 ARRAY_SIZE(atv_bus_init_vectors),
9459 atv_bus_init_vectors,
9460 },
9461 {
9462 ARRAY_SIZE(atv_bus_def_vectors),
9463 atv_bus_def_vectors,
9464 },
9465};
9466static struct msm_bus_scale_pdata atv_bus_scale_pdata = {
9467 atv_bus_scale_usecases,
9468 ARRAY_SIZE(atv_bus_scale_usecases),
9469 .name = "atv",
9470};
9471#endif
9472
9473static struct tvenc_platform_data atv_pdata = {
9474 .poll = 0,
9475 .pm_vid_en = atv_dac_power,
9476#ifdef CONFIG_MSM_BUS_SCALING
9477 .bus_scale_table = &atv_bus_scale_pdata,
9478#endif
9479};
9480#endif
9481
9482static void __init msm_fb_add_devices(void)
9483{
9484#ifdef CONFIG_FB_MSM_LCDC_DSUB
9485 mdp_pdata.mdp_core_clk_table = NULL;
9486 mdp_pdata.num_mdp_clk = 0;
9487 mdp_pdata.mdp_core_clk_rate = 200000000;
9488#endif
9489 if (machine_is_msm8x60_rumi3())
9490 msm_fb_register_device("mdp", NULL);
9491 else
9492 msm_fb_register_device("mdp", &mdp_pdata);
9493
9494 msm_fb_register_device("lcdc", &lcdc_pdata);
9495 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
9496#ifdef CONFIG_MSM_BUS_SCALING
9497 msm_fb_register_device("dtv", &dtv_pdata);
9498#endif
9499#ifdef CONFIG_FB_MSM_TVOUT
9500 msm_fb_register_device("tvenc", &atv_pdata);
9501 msm_fb_register_device("tvout_device", NULL);
9502#endif
9503}
9504
9505#if (defined(CONFIG_MARIMBA_CORE)) && \
9506 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
9507
9508static const struct {
9509 char *name;
9510 int vmin;
9511 int vmax;
9512} bt_regs_info[] = {
9513 { "8058_s3", 1800000, 1800000 },
9514 { "8058_s2", 1300000, 1300000 },
9515 { "8058_l8", 2900000, 3050000 },
9516};
9517
9518static struct {
9519 bool enabled;
9520} bt_regs_status[] = {
9521 { false },
9522 { false },
9523 { false },
9524};
9525static struct regulator *bt_regs[ARRAY_SIZE(bt_regs_info)];
9526
9527static int bahama_bt(int on)
9528{
9529 int rc;
9530 int i;
9531 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
9532
9533 struct bahama_variant_register {
9534 const size_t size;
9535 const struct bahama_config_register *set;
9536 };
9537
9538 const struct bahama_config_register *p;
9539
9540 u8 version;
9541
9542 const struct bahama_config_register v10_bt_on[] = {
9543 { 0xE9, 0x00, 0xFF },
9544 { 0xF4, 0x80, 0xFF },
9545 { 0xE4, 0x00, 0xFF },
9546 { 0xE5, 0x00, 0x0F },
9547#ifdef CONFIG_WLAN
9548 { 0xE6, 0x38, 0x7F },
9549 { 0xE7, 0x06, 0xFF },
9550#endif
9551 { 0xE9, 0x21, 0xFF },
9552 { 0x01, 0x0C, 0x1F },
9553 { 0x01, 0x08, 0x1F },
9554 };
9555
9556 const struct bahama_config_register v20_bt_on_fm_off[] = {
9557 { 0x11, 0x0C, 0xFF },
9558 { 0x13, 0x01, 0xFF },
9559 { 0xF4, 0x80, 0xFF },
9560 { 0xF0, 0x00, 0xFF },
9561 { 0xE9, 0x00, 0xFF },
9562#ifdef CONFIG_WLAN
9563 { 0x81, 0x00, 0x7F },
9564 { 0x82, 0x00, 0xFF },
9565 { 0xE6, 0x38, 0x7F },
9566 { 0xE7, 0x06, 0xFF },
9567#endif
9568 { 0xE9, 0x21, 0xFF },
9569 };
9570
9571 const struct bahama_config_register v20_bt_on_fm_on[] = {
9572 { 0x11, 0x0C, 0xFF },
9573 { 0x13, 0x01, 0xFF },
9574 { 0xF4, 0x86, 0xFF },
9575 { 0xF0, 0x06, 0xFF },
9576 { 0xE9, 0x00, 0xFF },
9577#ifdef CONFIG_WLAN
9578 { 0x81, 0x00, 0x7F },
9579 { 0x82, 0x00, 0xFF },
9580 { 0xE6, 0x38, 0x7F },
9581 { 0xE7, 0x06, 0xFF },
9582#endif
9583 { 0xE9, 0x21, 0xFF },
9584 };
9585
9586 const struct bahama_config_register v10_bt_off[] = {
9587 { 0xE9, 0x00, 0xFF },
9588 };
9589
9590 const struct bahama_config_register v20_bt_off_fm_off[] = {
9591 { 0xF4, 0x84, 0xFF },
9592 { 0xF0, 0x04, 0xFF },
9593 { 0xE9, 0x00, 0xFF }
9594 };
9595
9596 const struct bahama_config_register v20_bt_off_fm_on[] = {
9597 { 0xF4, 0x86, 0xFF },
9598 { 0xF0, 0x06, 0xFF },
9599 { 0xE9, 0x00, 0xFF }
9600 };
9601 const struct bahama_variant_register bt_bahama[2][3] = {
9602 {
9603 { ARRAY_SIZE(v10_bt_off), v10_bt_off },
9604 { ARRAY_SIZE(v20_bt_off_fm_off), v20_bt_off_fm_off },
9605 { ARRAY_SIZE(v20_bt_off_fm_on), v20_bt_off_fm_on }
9606 },
9607 {
9608 { ARRAY_SIZE(v10_bt_on), v10_bt_on },
9609 { ARRAY_SIZE(v20_bt_on_fm_off), v20_bt_on_fm_off },
9610 { ARRAY_SIZE(v20_bt_on_fm_on), v20_bt_on_fm_on }
9611 }
9612 };
9613
9614 u8 offset = 0; /* index into bahama configs */
9615
9616 on = on ? 1 : 0;
9617 version = read_bahama_ver();
9618
9619 if (version == VER_UNSUPPORTED) {
9620 dev_err(&msm_bt_power_device.dev,
9621 "%s: unsupported version\n",
9622 __func__);
9623 return -EIO;
9624 }
9625
9626 if (version == VER_2_0) {
9627 if (marimba_get_fm_status(&config))
9628 offset = 0x01;
9629 }
9630
9631 /* Voting off 1.3V S2 Regulator,BahamaV2 used in Normal mode */
9632 if (on && (version == VER_2_0)) {
9633 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9634 if ((!strcmp(bt_regs_info[i].name, "8058_s2"))
9635 && (bt_regs_status[i].enabled == true)) {
9636 if (regulator_disable(bt_regs[i])) {
9637 dev_err(&msm_bt_power_device.dev,
9638 "%s: regulator disable failed",
9639 __func__);
9640 }
9641 bt_regs_status[i].enabled = false;
9642 break;
9643 }
9644 }
9645 }
9646
9647 p = bt_bahama[on][version + offset].set;
9648
9649 dev_info(&msm_bt_power_device.dev,
9650 "%s: found version %d\n", __func__, version);
9651
9652 for (i = 0; i < bt_bahama[on][version + offset].size; i++) {
9653 u8 value = (p+i)->value;
9654 rc = marimba_write_bit_mask(&config,
9655 (p+i)->reg,
9656 &value,
9657 sizeof((p+i)->value),
9658 (p+i)->mask);
9659 if (rc < 0) {
9660 dev_err(&msm_bt_power_device.dev,
9661 "%s: reg %d write failed: %d\n",
9662 __func__, (p+i)->reg, rc);
9663 return rc;
9664 }
9665 dev_dbg(&msm_bt_power_device.dev,
9666 "%s: reg 0x%02x write value 0x%02x mask 0x%02x\n",
9667 __func__, (p+i)->reg,
9668 value, (p+i)->mask);
9669 }
9670 /* Update BT Status */
9671 if (on)
9672 marimba_set_bt_status(&config, true);
9673 else
9674 marimba_set_bt_status(&config, false);
9675
9676 return 0;
9677}
9678
9679static int bluetooth_use_regulators(int on)
9680{
9681 int i, recover = -1, rc = 0;
9682
9683 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9684 bt_regs[i] = on ? regulator_get(&msm_bt_power_device.dev,
9685 bt_regs_info[i].name) :
9686 (regulator_put(bt_regs[i]), NULL);
9687 if (IS_ERR(bt_regs[i])) {
9688 rc = PTR_ERR(bt_regs[i]);
9689 dev_err(&msm_bt_power_device.dev,
9690 "regulator %s get failed (%d)\n",
9691 bt_regs_info[i].name, rc);
9692 recover = i - 1;
9693 bt_regs[i] = NULL;
9694 break;
9695 }
9696
9697 if (!on)
9698 continue;
9699
9700 rc = regulator_set_voltage(bt_regs[i],
9701 bt_regs_info[i].vmin,
9702 bt_regs_info[i].vmax);
9703 if (rc < 0) {
9704 dev_err(&msm_bt_power_device.dev,
9705 "regulator %s voltage set (%d)\n",
9706 bt_regs_info[i].name, rc);
9707 recover = i;
9708 break;
9709 }
9710 }
9711
9712 if (on && (recover > -1))
9713 for (i = recover; i >= 0; i--) {
9714 regulator_put(bt_regs[i]);
9715 bt_regs[i] = NULL;
9716 }
9717
9718 return rc;
9719}
9720
9721static int bluetooth_switch_regulators(int on)
9722{
9723 int i, rc = 0;
9724
9725 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9726 if (on && (bt_regs_status[i].enabled == false)) {
9727 rc = regulator_enable(bt_regs[i]);
9728 if (rc < 0) {
9729 dev_err(&msm_bt_power_device.dev,
9730 "regulator %s %s failed (%d)\n",
9731 bt_regs_info[i].name,
9732 "enable", rc);
9733 if (i > 0) {
9734 while (--i) {
9735 regulator_disable(bt_regs[i]);
9736 bt_regs_status[i].enabled
9737 = false;
9738 }
9739 break;
9740 }
9741 }
9742 bt_regs_status[i].enabled = true;
9743 } else if (!on && (bt_regs_status[i].enabled == true)) {
9744 rc = regulator_disable(bt_regs[i]);
9745 if (rc < 0) {
9746 dev_err(&msm_bt_power_device.dev,
9747 "regulator %s %s failed (%d)\n",
9748 bt_regs_info[i].name,
9749 "disable", rc);
9750 break;
9751 }
9752 bt_regs_status[i].enabled = false;
9753 }
9754 }
9755 return rc;
9756}
9757
9758static struct msm_xo_voter *bt_clock;
9759
9760static int bluetooth_power(int on)
9761{
9762 int rc = 0;
9763 int id;
9764
9765 /* In case probe function fails, cur_connv_type would be -1 */
9766 id = adie_get_detected_connectivity_type();
9767 if (id != BAHAMA_ID) {
9768 pr_err("%s: unexpected adie connectivity type: %d\n",
9769 __func__, id);
9770 return -ENODEV;
9771 }
9772
9773 if (on) {
9774
9775 rc = bluetooth_use_regulators(1);
9776 if (rc < 0)
9777 goto out;
9778
9779 rc = bluetooth_switch_regulators(1);
9780
9781 if (rc < 0)
9782 goto fail_put;
9783
9784 bt_clock = msm_xo_get(MSM_XO_TCXO_D0, "bt_power");
9785
9786 if (IS_ERR(bt_clock)) {
9787 pr_err("Couldn't get TCXO_D0 voter\n");
9788 goto fail_switch;
9789 }
9790
9791 rc = msm_xo_mode_vote(bt_clock, MSM_XO_MODE_ON);
9792
9793 if (rc < 0) {
9794 pr_err("Failed to vote for TCXO_DO ON\n");
9795 goto fail_vote;
9796 }
9797
9798 rc = bahama_bt(1);
9799
9800 if (rc < 0)
9801 goto fail_clock;
9802
9803 msleep(10);
9804
9805 rc = msm_xo_mode_vote(bt_clock, MSM_XO_MODE_PIN_CTRL);
9806
9807 if (rc < 0) {
9808 pr_err("Failed to vote for TCXO_DO pin control\n");
9809 goto fail_vote;
9810 }
9811 } else {
9812 /* check for initial RFKILL block (power off) */
9813 /* some RFKILL versions/configurations rfkill_register */
9814 /* calls here for an initial set_block */
9815 /* avoid calling i2c and regulator before unblock (on) */
9816 if (platform_get_drvdata(&msm_bt_power_device) == NULL) {
9817 dev_info(&msm_bt_power_device.dev,
9818 "%s: initialized OFF/blocked\n", __func__);
9819 goto out;
9820 }
9821
9822 bahama_bt(0);
9823
9824fail_clock:
9825 msm_xo_mode_vote(bt_clock, MSM_XO_MODE_OFF);
9826fail_vote:
9827 msm_xo_put(bt_clock);
9828fail_switch:
9829 bluetooth_switch_regulators(0);
9830fail_put:
9831 bluetooth_use_regulators(0);
9832 }
9833
9834out:
9835 if (rc < 0)
9836 on = 0;
9837 dev_info(&msm_bt_power_device.dev,
9838 "Bluetooth power switch: state %d result %d\n", on, rc);
9839
9840 return rc;
9841}
9842
9843#endif /*CONFIG_MARIMBA_CORE, CONFIG_MSM_BT_POWER, CONFIG_MSM_BT_POWER_MODULE*/
9844
9845static void __init msm8x60_cfg_smsc911x(void)
9846{
9847 smsc911x_resources[1].start =
9848 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 6);
9849 smsc911x_resources[1].end =
9850 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 6);
9851}
9852
9853#ifdef CONFIG_MSM_RPM
9854static struct msm_rpm_platform_data msm_rpm_data = {
9855 .reg_base_addrs = {
9856 [MSM_RPM_PAGE_STATUS] = MSM_RPM_BASE,
9857 [MSM_RPM_PAGE_CTRL] = MSM_RPM_BASE + 0x400,
9858 [MSM_RPM_PAGE_REQ] = MSM_RPM_BASE + 0x600,
9859 [MSM_RPM_PAGE_ACK] = MSM_RPM_BASE + 0xa00,
9860 },
9861
9862 .irq_ack = RPM_SCSS_CPU0_GP_HIGH_IRQ,
9863 .irq_err = RPM_SCSS_CPU0_GP_LOW_IRQ,
9864 .irq_vmpm = RPM_SCSS_CPU0_GP_MEDIUM_IRQ,
9865 .msm_apps_ipc_rpm_reg = MSM_GCC_BASE + 0x008,
9866 .msm_apps_ipc_rpm_val = 4,
9867};
9868#endif
9869
Laura Abbott5d2d1e62011-08-10 16:27:35 -07009870void msm_fusion_setup_pinctrl(void)
9871{
9872 struct msm_xo_voter *a1;
9873
9874 if (socinfo_get_platform_subtype() == 0x3) {
9875 /*
9876 * Vote for the A1 clock to be in pin control mode before
9877 * the external images are loaded.
9878 */
9879 a1 = msm_xo_get(MSM_XO_TCXO_A1, "mdm");
9880 BUG_ON(!a1);
9881 msm_xo_mode_vote(a1, MSM_XO_MODE_PIN_CTRL);
9882 }
9883}
9884
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009885struct msm_board_data {
9886 struct msm_gpiomux_configs *gpiomux_cfgs;
9887};
9888
9889static struct msm_board_data msm8x60_rumi3_board_data __initdata = {
9890 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
9891};
9892
9893static struct msm_board_data msm8x60_sim_board_data __initdata = {
9894 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
9895};
9896
9897static struct msm_board_data msm8x60_surf_board_data __initdata = {
9898 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
9899};
9900
9901static struct msm_board_data msm8x60_ffa_board_data __initdata = {
9902 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
9903};
9904
9905static struct msm_board_data msm8x60_fluid_board_data __initdata = {
9906 .gpiomux_cfgs = msm8x60_fluid_gpiomux_cfgs,
9907};
9908
9909static struct msm_board_data msm8x60_charm_surf_board_data __initdata = {
9910 .gpiomux_cfgs = msm8x60_charm_gpiomux_cfgs,
9911};
9912
9913static struct msm_board_data msm8x60_charm_ffa_board_data __initdata = {
9914 .gpiomux_cfgs = msm8x60_charm_gpiomux_cfgs,
9915};
9916
Zhang Chang Kenef05b172011-07-27 15:28:13 -04009917static struct msm_board_data msm8x60_dragon_board_data __initdata = {
9918 .gpiomux_cfgs = msm8x60_dragon_gpiomux_cfgs,
9919};
9920
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009921static void __init msm8x60_init(struct msm_board_data *board_data)
9922{
9923 uint32_t soc_platform_version;
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05309924#ifdef CONFIG_USB_EHCI_MSM_72K
9925 struct pm8xxx_mpp_config_data hsusb_phy_mpp = {
9926 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
9927 .level = PM8901_MPP_DIG_LEVEL_L5,
9928 .control = PM8XXX_MPP_DOUT_CTRL_HIGH,
9929 };
9930#endif
Anirudh Ghayalc2019332011-11-12 06:29:10 +05309931 pmic_reset_irq = PM8058_IRQ_BASE + PM8058_RESOUT_IRQ;
Abhijeet Dharmapurikar6d565fd2011-09-15 18:49:56 -07009932
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009933 /*
9934 * Initialize RPM first as other drivers and devices may need
9935 * it for their initialization.
9936 */
9937#ifdef CONFIG_MSM_RPM
9938 BUG_ON(msm_rpm_init(&msm_rpm_data));
9939#endif
9940 BUG_ON(msm_rpmrs_levels_init(msm_rpmrs_levels,
9941 ARRAY_SIZE(msm_rpmrs_levels)));
9942 if (msm_xo_init())
9943 pr_err("Failed to initialize XO votes\n");
9944
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009945 msm8x60_check_2d_hardware();
9946
9947 /* Change SPM handling of core 1 if PMM 8160 is present. */
9948 soc_platform_version = socinfo_get_platform_version();
9949 if (SOCINFO_VERSION_MAJOR(soc_platform_version) == 1 &&
9950 SOCINFO_VERSION_MINOR(soc_platform_version) >= 2) {
9951 struct msm_spm_platform_data *spm_data;
9952
9953 spm_data = &msm_spm_data_v1[1];
9954 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] &= ~0x0F00UL;
9955 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] |= 0x0100UL;
9956
9957 spm_data = &msm_spm_data[1];
9958 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] &= ~0x0F00UL;
9959 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] |= 0x0100UL;
9960 }
9961
9962 /*
9963 * Initialize SPM before acpuclock as the latter calls into SPM
9964 * driver to set ACPU voltages.
9965 */
9966 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 1)
9967 msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
9968 else
9969 msm_spm_init(msm_spm_data_v1, ARRAY_SIZE(msm_spm_data_v1));
9970
9971 /*
9972 * Set regulators 8901_l4 and 8901_l6 to be always on in HPM for SURF
9973 * devices so that the RPM doesn't drop into a low power mode that an
9974 * un-reworked SURF cannot resume from.
9975 */
9976 if (machine_is_msm8x60_surf()) {
David Collins6f032ba2011-08-31 14:08:15 -07009977 int i;
9978
9979 for (i = 0; i < ARRAY_SIZE(rpm_regulator_init_data); i++)
9980 if (rpm_regulator_init_data[i].id
9981 == RPM_VREG_ID_PM8901_L4
9982 || rpm_regulator_init_data[i].id
9983 == RPM_VREG_ID_PM8901_L6)
9984 rpm_regulator_init_data[i]
9985 .init_data.constraints.always_on = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009986 }
9987
9988 /*
9989 * Disable regulator info printing so that regulator registration
9990 * messages do not enter the kmsg log.
9991 */
9992 regulator_suppress_info_printing();
9993
9994 /* Initialize regulators needed for clock_init. */
9995 platform_add_devices(early_regulators, ARRAY_SIZE(early_regulators));
9996
Stephen Boydbb600ae2011-08-02 20:11:40 -07009997 msm_clock_init(&msm8x60_clock_init_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009998
9999 /* Buses need to be initialized before early-device registration
10000 * to get the platform data for fabrics.
10001 */
10002 msm8x60_init_buses();
10003 platform_add_devices(early_devices, ARRAY_SIZE(early_devices));
10004 /* CPU frequency control is not supported on simulated targets. */
10005 if (!machine_is_msm8x60_rumi3() && !machine_is_msm8x60_sim())
Matt Wagantallec57f062011-08-16 23:54:46 -070010006 acpuclk_init(&acpuclk_8x60_soc_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010007
Terence Hampsonb36a38c2011-09-19 19:10:40 -040010008 /*
10009 * Enable EBI2 only for boards which make use of it. Leave
10010 * it disabled for all others for additional power savings.
10011 */
10012 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10013 machine_is_msm8x60_rumi3() ||
10014 machine_is_msm8x60_sim() ||
10015 machine_is_msm8x60_fluid() ||
10016 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010017 msm8x60_init_ebi2();
10018 msm8x60_init_tlmm();
10019 msm8x60_init_gpiomux(board_data->gpiomux_cfgs);
10020 msm8x60_init_uart12dm();
10021 msm8x60_init_mmc();
10022
10023#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
10024 msm8x60_init_pm8058_othc();
10025#endif
10026
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010027 if (machine_is_msm8x60_fluid())
10028 pm8058_platform_data.keypad_pdata = &fluid_keypad_data;
10029 else if (machine_is_msm8x60_dragon())
10030 pm8058_platform_data.keypad_pdata = &dragon_keypad_data;
10031 else
10032 pm8058_platform_data.keypad_pdata = &ffa_keypad_data;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010033
Jilai Wang53d27a82011-07-13 14:32:58 -040010034 /* Specify reset pin for OV9726 */
10035 if (machine_is_msm8x60_dragon()) {
10036 msm_camera_sensor_ov9726_data.sensor_reset = 62;
10037 ov9726_sensor_8660_info.mount_angle = 270;
10038 }
10039
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010040#ifdef CONFIG_BATTERY_MSM8X60
10041 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10042 machine_is_msm8x60_fusion() || machine_is_msm8x60_dragon() ||
10043 machine_is_msm8x60_fusn_ffa() || machine_is_msm8x60_fluid())
10044 platform_device_register(&msm_charger_device);
10045#endif
10046
10047 if (machine_is_msm8x60_dragon())
10048 pm8058_platform_data.charger_pdata = &pmic8058_charger_dragon;
10049 if (!machine_is_msm8x60_fluid())
10050 pm8058_platform_data.charger_pdata = &pmic8058_charger_ffa_surf;
10051
10052 /* configure pmic leds */
10053 if (machine_is_msm8x60_fluid())
10054 pm8058_platform_data.leds_pdata = &pm8058_fluid_flash_leds_data;
10055 else if (machine_is_msm8x60_dragon())
10056 pm8058_platform_data.leds_pdata = &pm8058_dragon_leds_data;
10057 else
10058 pm8058_platform_data.leds_pdata = &pm8058_flash_leds_data;
10059
10060 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa() ||
10061 machine_is_msm8x60_dragon()) {
10062 pm8058_platform_data.vibrator_pdata = &pm8058_vib_pdata;
10063 }
10064
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010065 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10066 machine_is_msm8x60_fluid() || machine_is_msm8x60_fusion() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -040010067 machine_is_msm8x60_fusn_ffa() || machine_is_msm8x60_dragon()) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010068 msm8x60_cfg_smsc911x();
10069 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 1)
10070 platform_add_devices(msm_footswitch_devices,
10071 msm_num_footswitch_devices);
10072 platform_add_devices(surf_devices,
10073 ARRAY_SIZE(surf_devices));
10074
10075#ifdef CONFIG_MSM_DSPS
10076 if (machine_is_msm8x60_fluid()) {
10077 platform_device_unregister(&msm_gsbi12_qup_i2c_device);
10078 msm8x60_init_dsps();
10079 }
10080#endif
10081
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010082 pm8901_vreg_mpp0_init();
10083
10084 platform_device_register(&msm8x60_8901_mpp_vreg);
10085
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010086#ifdef CONFIG_USB_EHCI_MSM_72K
10087 /*
10088 * Drive MPP2 pin HIGH for PHY to generate ID interrupts on 8660
10089 * fluid
10090 */
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010091 if (machine_is_msm8x60_fluid())
10092 pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1), &hsusb_phy_mpp);
10093 msm_add_host(0, &msm_usb_host_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010094#endif
Lei Zhou338cab82011-08-19 13:38:17 -040010095
10096#ifdef CONFIG_SND_SOC_MSM8660_APQ
10097 if (machine_is_msm8x60_dragon())
10098 platform_add_devices(dragon_alsa_devices,
10099 ARRAY_SIZE(dragon_alsa_devices));
10100 else
10101#endif
10102 platform_add_devices(asoc_devices,
10103 ARRAY_SIZE(asoc_devices));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010104 } else {
10105 msm8x60_configure_smc91x();
10106 platform_add_devices(rumi_sim_devices,
10107 ARRAY_SIZE(rumi_sim_devices));
10108 }
10109#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
Zhang Chang Ken6baadf02011-08-05 09:48:15 -040010110 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10111 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010112 msm8x60_cfg_isp1763();
10113#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010114
10115 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
10116 platform_add_devices(charm_devices, ARRAY_SIZE(charm_devices));
10117
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010118
10119#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
10120 if (machine_is_msm8x60_fluid())
10121 platform_device_register(&msm_gsbi10_qup_spi_device);
10122 else
10123 platform_device_register(&msm_gsbi1_qup_spi_device);
10124#endif
10125
10126#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
10127 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
10128 if (machine_is_msm8x60_fluid())
10129 cyttsp_set_params();
10130#endif
10131 if (!machine_is_msm8x60_sim())
10132 msm_fb_add_devices();
10133 fixup_i2c_configs();
10134 register_i2c_devices();
10135
Terence Hampson1c73fef2011-07-19 17:10:49 -040010136 if (machine_is_msm8x60_dragon())
10137 smsc911x_config.reset_gpio
10138 = GPIO_ETHERNET_RESET_N_DRAGON;
10139
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010140 platform_device_register(&smsc911x_device);
10141
10142#if (defined(CONFIG_SPI_QUP)) && \
10143 (defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -040010144 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA) || \
10145 defined(CONFIG_FB_MSM_LCDC_NT35582_WVGA))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010146
10147 if (machine_is_msm8x60_fluid()) {
10148#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
10149 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3) {
10150 spi_register_board_info(lcdc_samsung_spi_board_info,
10151 ARRAY_SIZE(lcdc_samsung_spi_board_info));
10152 } else
10153#endif
10154 {
10155#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
10156 spi_register_board_info(lcdc_auo_spi_board_info,
10157 ARRAY_SIZE(lcdc_auo_spi_board_info));
10158#endif
10159 }
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -040010160#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
10161 } else if (machine_is_msm8x60_dragon()) {
10162 spi_register_board_info(lcdc_nt35582_spi_board_info,
10163 ARRAY_SIZE(lcdc_nt35582_spi_board_info));
10164#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010165 }
10166#endif
10167
10168 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
10169 msm_pm_set_rpm_wakeup_irq(RPM_SCSS_CPU0_WAKE_UP_IRQ);
10170 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
10171 msm_pm_data);
Maheshkumar Sivasubramanian8ccc16e2011-10-25 15:59:57 -060010172 BUG_ON(msm_pm_boot_init(MSM_PM_BOOT_CONFIG_TZ, NULL));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010173
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010174 pm8058_gpios_init();
10175
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010176#ifdef CONFIG_SENSORS_MSM_ADC
10177 if (machine_is_msm8x60_fluid()) {
10178 msm_adc_pdata.dev_names = msm_adc_fluid_device_names;
10179 msm_adc_pdata.num_adc = ARRAY_SIZE(msm_adc_fluid_device_names);
10180 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3)
10181 msm_adc_pdata.gpio_config = APROC_CONFIG;
10182 else
10183 msm_adc_pdata.gpio_config = MPROC_CONFIG;
10184 }
10185 msm_adc_pdata.target_hw = MSM_8x60;
10186#endif
10187#ifdef CONFIG_MSM8X60_AUDIO
10188 msm_snddev_init();
10189#endif
10190#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
10191 if (machine_is_msm8x60_fluid())
10192 platform_device_register(&fluid_leds_gpio);
10193 else
10194 platform_device_register(&gpio_leds);
10195#endif
10196
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010197 msm8x60_multi_sdio_init();
Laura Abbott5d2d1e62011-08-10 16:27:35 -070010198
10199 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
10200 msm_fusion_setup_pinctrl();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010201}
10202
10203static void __init msm8x60_rumi3_init(void)
10204{
10205 msm8x60_init(&msm8x60_rumi3_board_data);
10206}
10207
10208static void __init msm8x60_sim_init(void)
10209{
10210 msm8x60_init(&msm8x60_sim_board_data);
10211}
10212
10213static void __init msm8x60_surf_init(void)
10214{
10215 msm8x60_init(&msm8x60_surf_board_data);
10216}
10217
10218static void __init msm8x60_ffa_init(void)
10219{
10220 msm8x60_init(&msm8x60_ffa_board_data);
10221}
10222
10223static void __init msm8x60_fluid_init(void)
10224{
10225 msm8x60_init(&msm8x60_fluid_board_data);
10226}
10227
10228static void __init msm8x60_charm_surf_init(void)
10229{
10230 msm8x60_init(&msm8x60_charm_surf_board_data);
10231}
10232
10233static void __init msm8x60_charm_ffa_init(void)
10234{
10235 msm8x60_init(&msm8x60_charm_ffa_board_data);
10236}
10237
10238static void __init msm8x60_charm_init_early(void)
10239{
10240 msm8x60_allocate_memory_regions();
Steve Mucklea55df6e2010-01-07 12:43:24 -080010241}
10242
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010243static void __init msm8x60_dragon_init(void)
10244{
10245 msm8x60_init(&msm8x60_dragon_board_data);
10246}
10247
Steve Mucklea55df6e2010-01-07 12:43:24 -080010248MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
10249 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010250 .reserve = msm8x60_reserve,
Steve Mucklea55df6e2010-01-07 12:43:24 -080010251 .init_irq = msm8x60_init_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010252 .init_machine = msm8x60_rumi3_init,
Steve Mucklea55df6e2010-01-07 12:43:24 -080010253 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010254 .init_early = msm8x60_charm_init_early,
Steve Muckle49b76f72010-03-19 17:00:08 -070010255MACHINE_END
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010256
10257MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
10258 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010259 .reserve = msm8x60_reserve,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010260 .init_irq = msm8x60_init_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010261 .init_machine = msm8x60_sim_init,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010262 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010263 .init_early = msm8x60_charm_init_early,
10264MACHINE_END
10265
10266MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
10267 .map_io = msm8x60_map_io,
10268 .reserve = msm8x60_reserve,
10269 .init_irq = msm8x60_init_irq,
10270 .init_machine = msm8x60_surf_init,
10271 .timer = &msm_timer,
10272 .init_early = msm8x60_charm_init_early,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010273MACHINE_END
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010274
10275MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
10276 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010277 .reserve = msm8x60_reserve,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010278 .init_irq = msm8x60_init_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010279 .init_machine = msm8x60_ffa_init,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010280 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010281 .init_early = msm8x60_charm_init_early,
10282MACHINE_END
10283
10284MACHINE_START(MSM8X60_FLUID, "QCT MSM8X60 FLUID")
10285 .map_io = msm8x60_map_io,
10286 .reserve = msm8x60_reserve,
10287 .init_irq = msm8x60_init_irq,
10288 .init_machine = msm8x60_fluid_init,
10289 .timer = &msm_timer,
10290 .init_early = msm8x60_charm_init_early,
10291MACHINE_END
10292
10293MACHINE_START(MSM8X60_FUSION, "QCT MSM8X60 FUSION SURF")
10294 .map_io = msm8x60_map_io,
10295 .reserve = msm8x60_reserve,
10296 .init_irq = msm8x60_init_irq,
10297 .init_machine = msm8x60_charm_surf_init,
10298 .timer = &msm_timer,
10299 .init_early = msm8x60_charm_init_early,
10300MACHINE_END
10301
10302MACHINE_START(MSM8X60_FUSN_FFA, "QCT MSM8X60 FUSION FFA")
10303 .map_io = msm8x60_map_io,
10304 .reserve = msm8x60_reserve,
10305 .init_irq = msm8x60_init_irq,
10306 .init_machine = msm8x60_charm_ffa_init,
10307 .timer = &msm_timer,
10308 .init_early = msm8x60_charm_init_early,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010309MACHINE_END
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010310
10311MACHINE_START(MSM8X60_DRAGON, "QCT MSM8X60 DRAGON")
10312 .map_io = msm8x60_map_io,
10313 .reserve = msm8x60_reserve,
10314 .init_irq = msm8x60_init_irq,
10315 .init_machine = msm8x60_dragon_init,
10316 .timer = &msm_timer,
10317 .init_early = msm8x60_charm_init_early,
10318MACHINE_END