| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2003-2004 Intel |
| 3 | * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com) |
| 4 | */ |
| 5 | |
| 6 | #ifndef MSI_H |
| 7 | #define MSI_H |
| 8 | |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 9 | #define msi_control_reg(base) (base + PCI_MSI_FLAGS) |
| 10 | #define msi_lower_address_reg(base) (base + PCI_MSI_ADDRESS_LO) |
| 11 | #define msi_upper_address_reg(base) (base + PCI_MSI_ADDRESS_HI) |
| 12 | #define msi_data_reg(base, is64bit) \ |
| Hidetoshi Seto | 67b5db6 | 2009-04-20 10:54:59 +0900 | [diff] [blame] | 13 | (base + ((is64bit == 1) ? PCI_MSI_DATA_64 : PCI_MSI_DATA_32)) |
| 14 | #define msi_mask_reg(base, is64bit) \ |
| 15 | (base + ((is64bit == 1) ? PCI_MSI_MASK_64 : PCI_MSI_MASK_32)) |
| Eric W. Biederman | dd159ee | 2006-10-04 02:16:32 -0700 | [diff] [blame] | 16 | #define is_64bit_address(control) (!!(control & PCI_MSI_FLAGS_64BIT)) |
| 17 | #define is_mask_bit_support(control) (!!(control & PCI_MSI_FLAGS_MASKBIT)) |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 18 | |
| Hidetoshi Seto | db50041 | 2010-10-13 15:00:23 +0900 | [diff] [blame] | 19 | #define msix_table_offset_reg(base) (base + PCI_MSIX_TABLE) |
| 20 | #define msix_pba_offset_reg(base) (base + PCI_MSIX_PBA) |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 21 | #define msix_table_size(control) ((control & PCI_MSIX_FLAGS_QSIZE)+1) |
| Hidetoshi Seto | 04846b5 | 2009-04-20 10:54:52 +0900 | [diff] [blame] | 22 | #define multi_msix_capable(control) msix_table_size((control)) |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 23 | |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 24 | #endif /* MSI_H */ |