| Jan Andersson | c31a65f | 2011-05-06 12:00:15 +0200 | [diff] [blame] | 1 | /* | 
|  | 2 | * UHCI HCD (Host Controller Driver) PCI Bus Glue. | 
|  | 3 | * | 
|  | 4 | * Extracted from uhci-hcd.c: | 
|  | 5 | * Maintainer: Alan Stern <stern@rowland.harvard.edu> | 
|  | 6 | * | 
|  | 7 | * (C) Copyright 1999 Linus Torvalds | 
|  | 8 | * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com | 
|  | 9 | * (C) Copyright 1999 Randy Dunlap | 
|  | 10 | * (C) Copyright 1999 Georg Acher, acher@in.tum.de | 
|  | 11 | * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de | 
|  | 12 | * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch | 
|  | 13 | * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at | 
|  | 14 | * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface | 
|  | 15 | *               support from usb-ohci.c by Adam Richter, adam@yggdrasil.com). | 
|  | 16 | * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c) | 
|  | 17 | * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu | 
|  | 18 | */ | 
|  | 19 |  | 
|  | 20 | #include "pci-quirks.h" | 
|  | 21 |  | 
|  | 22 | /* | 
|  | 23 | * Make sure the controller is completely inactive, unable to | 
|  | 24 | * generate interrupts or do DMA. | 
|  | 25 | */ | 
|  | 26 | static void uhci_pci_reset_hc(struct uhci_hcd *uhci) | 
|  | 27 | { | 
|  | 28 | uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr); | 
|  | 29 | } | 
|  | 30 |  | 
|  | 31 | /* | 
|  | 32 | * Initialize a controller that was newly discovered or has just been | 
|  | 33 | * resumed.  In either case we can't be sure of its previous state. | 
|  | 34 | * | 
|  | 35 | * Returns: 1 if the controller was reset, 0 otherwise. | 
|  | 36 | */ | 
|  | 37 | static int uhci_pci_check_and_reset_hc(struct uhci_hcd *uhci) | 
|  | 38 | { | 
|  | 39 | return uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)), | 
|  | 40 | uhci->io_addr); | 
|  | 41 | } | 
|  | 42 |  | 
|  | 43 | /* | 
|  | 44 | * Store the basic register settings needed by the controller. | 
|  | 45 | * This function is called at the end of configure_hc in uhci-hcd.c. | 
|  | 46 | */ | 
|  | 47 | static void uhci_pci_configure_hc(struct uhci_hcd *uhci) | 
|  | 48 | { | 
|  | 49 | struct pci_dev *pdev = to_pci_dev(uhci_dev(uhci)); | 
|  | 50 |  | 
|  | 51 | /* Enable PIRQ */ | 
|  | 52 | pci_write_config_word(pdev, USBLEGSUP, USBLEGSUP_DEFAULT); | 
|  | 53 |  | 
|  | 54 | /* Disable platform-specific non-PME# wakeup */ | 
|  | 55 | if (pdev->vendor == PCI_VENDOR_ID_INTEL) | 
|  | 56 | pci_write_config_byte(pdev, USBRES_INTEL, 0); | 
|  | 57 | } | 
|  | 58 |  | 
|  | 59 | static int uhci_pci_resume_detect_interrupts_are_broken(struct uhci_hcd *uhci) | 
|  | 60 | { | 
|  | 61 | int port; | 
|  | 62 |  | 
|  | 63 | switch (to_pci_dev(uhci_dev(uhci))->vendor) { | 
|  | 64 | default: | 
|  | 65 | break; | 
|  | 66 |  | 
|  | 67 | case PCI_VENDOR_ID_GENESYS: | 
|  | 68 | /* Genesys Logic's GL880S controllers don't generate | 
|  | 69 | * resume-detect interrupts. | 
|  | 70 | */ | 
|  | 71 | return 1; | 
|  | 72 |  | 
|  | 73 | case PCI_VENDOR_ID_INTEL: | 
|  | 74 | /* Some of Intel's USB controllers have a bug that causes | 
|  | 75 | * resume-detect interrupts if any port has an over-current | 
|  | 76 | * condition.  To make matters worse, some motherboards | 
|  | 77 | * hardwire unused USB ports' over-current inputs active! | 
|  | 78 | * To prevent problems, we will not enable resume-detect | 
|  | 79 | * interrupts if any ports are OC. | 
|  | 80 | */ | 
|  | 81 | for (port = 0; port < uhci->rh_numports; ++port) { | 
|  | 82 | if (inw(uhci->io_addr + USBPORTSC1 + port * 2) & | 
|  | 83 | USBPORTSC_OC) | 
|  | 84 | return 1; | 
|  | 85 | } | 
|  | 86 | break; | 
|  | 87 | } | 
|  | 88 | return 0; | 
|  | 89 | } | 
|  | 90 |  | 
|  | 91 | static int uhci_pci_global_suspend_mode_is_broken(struct uhci_hcd *uhci) | 
|  | 92 | { | 
|  | 93 | int port; | 
|  | 94 | const char *sys_info; | 
|  | 95 | static const char bad_Asus_board[] = "A7V8X"; | 
|  | 96 |  | 
|  | 97 | /* One of Asus's motherboards has a bug which causes it to | 
|  | 98 | * wake up immediately from suspend-to-RAM if any of the ports | 
|  | 99 | * are connected.  In such cases we will not set EGSM. | 
|  | 100 | */ | 
|  | 101 | sys_info = dmi_get_system_info(DMI_BOARD_NAME); | 
|  | 102 | if (sys_info && !strcmp(sys_info, bad_Asus_board)) { | 
|  | 103 | for (port = 0; port < uhci->rh_numports; ++port) { | 
|  | 104 | if (inw(uhci->io_addr + USBPORTSC1 + port * 2) & | 
|  | 105 | USBPORTSC_CCS) | 
|  | 106 | return 1; | 
|  | 107 | } | 
|  | 108 | } | 
|  | 109 |  | 
|  | 110 | return 0; | 
|  | 111 | } | 
|  | 112 |  | 
|  | 113 | static int uhci_pci_init(struct usb_hcd *hcd) | 
|  | 114 | { | 
|  | 115 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | 
|  | 116 |  | 
|  | 117 | uhci->io_addr = (unsigned long) hcd->rsrc_start; | 
|  | 118 |  | 
|  | 119 | uhci->rh_numports = uhci_count_ports(hcd); | 
|  | 120 |  | 
|  | 121 | /* Intel controllers report the OverCurrent bit active on. | 
|  | 122 | * VIA controllers report it active off, so we'll adjust the | 
|  | 123 | * bit value.  (It's not standardized in the UHCI spec.) | 
|  | 124 | */ | 
|  | 125 | if (to_pci_dev(uhci_dev(uhci))->vendor == PCI_VENDOR_ID_VIA) | 
|  | 126 | uhci->oc_low = 1; | 
|  | 127 |  | 
|  | 128 | /* HP's server management chip requires a longer port reset delay. */ | 
|  | 129 | if (to_pci_dev(uhci_dev(uhci))->vendor == PCI_VENDOR_ID_HP) | 
|  | 130 | uhci->wait_for_hp = 1; | 
|  | 131 |  | 
|  | 132 | /* Set up pointers to PCI-specific functions */ | 
|  | 133 | uhci->reset_hc = uhci_pci_reset_hc; | 
|  | 134 | uhci->check_and_reset_hc = uhci_pci_check_and_reset_hc; | 
|  | 135 | uhci->configure_hc = uhci_pci_configure_hc; | 
|  | 136 | uhci->resume_detect_interrupts_are_broken = | 
|  | 137 | uhci_pci_resume_detect_interrupts_are_broken; | 
|  | 138 | uhci->global_suspend_mode_is_broken = | 
|  | 139 | uhci_pci_global_suspend_mode_is_broken; | 
|  | 140 |  | 
|  | 141 |  | 
|  | 142 | /* Kick BIOS off this hardware and reset if the controller | 
|  | 143 | * isn't already safely quiescent. | 
|  | 144 | */ | 
|  | 145 | check_and_reset_hc(uhci); | 
|  | 146 | return 0; | 
|  | 147 | } | 
|  | 148 |  | 
|  | 149 | /* Make sure the controller is quiescent and that we're not using it | 
|  | 150 | * any more.  This is mainly for the benefit of programs which, like kexec, | 
|  | 151 | * expect the hardware to be idle: not doing DMA or generating IRQs. | 
|  | 152 | * | 
|  | 153 | * This routine may be called in a damaged or failing kernel.  Hence we | 
|  | 154 | * do not acquire the spinlock before shutting down the controller. | 
|  | 155 | */ | 
|  | 156 | static void uhci_shutdown(struct pci_dev *pdev) | 
|  | 157 | { | 
|  | 158 | struct usb_hcd *hcd = pci_get_drvdata(pdev); | 
|  | 159 |  | 
|  | 160 | uhci_hc_died(hcd_to_uhci(hcd)); | 
|  | 161 | } | 
|  | 162 |  | 
|  | 163 | #ifdef CONFIG_PM | 
|  | 164 |  | 
|  | 165 | static int uhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup) | 
|  | 166 | { | 
|  | 167 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | 
|  | 168 | struct pci_dev *pdev = to_pci_dev(uhci_dev(uhci)); | 
|  | 169 | int rc = 0; | 
|  | 170 |  | 
|  | 171 | dev_dbg(uhci_dev(uhci), "%s\n", __func__); | 
|  | 172 |  | 
|  | 173 | spin_lock_irq(&uhci->lock); | 
|  | 174 | if (!HCD_HW_ACCESSIBLE(hcd) || uhci->dead) | 
|  | 175 | goto done_okay;		/* Already suspended or dead */ | 
|  | 176 |  | 
|  | 177 | if (uhci->rh_state > UHCI_RH_SUSPENDED) { | 
|  | 178 | dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n"); | 
|  | 179 | rc = -EBUSY; | 
|  | 180 | goto done; | 
|  | 181 | }; | 
|  | 182 |  | 
|  | 183 | /* All PCI host controllers are required to disable IRQ generation | 
|  | 184 | * at the source, so we must turn off PIRQ. | 
|  | 185 | */ | 
|  | 186 | pci_write_config_word(pdev, USBLEGSUP, 0); | 
|  | 187 | clear_bit(HCD_FLAG_POLL_RH, &hcd->flags); | 
|  | 188 |  | 
|  | 189 | /* Enable platform-specific non-PME# wakeup */ | 
|  | 190 | if (do_wakeup) { | 
|  | 191 | if (pdev->vendor == PCI_VENDOR_ID_INTEL) | 
|  | 192 | pci_write_config_byte(pdev, USBRES_INTEL, | 
|  | 193 | USBPORT1EN | USBPORT2EN); | 
|  | 194 | } | 
|  | 195 |  | 
|  | 196 | done_okay: | 
|  | 197 | clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); | 
|  | 198 | done: | 
|  | 199 | spin_unlock_irq(&uhci->lock); | 
|  | 200 | return rc; | 
|  | 201 | } | 
|  | 202 |  | 
|  | 203 | static int uhci_pci_resume(struct usb_hcd *hcd, bool hibernated) | 
|  | 204 | { | 
|  | 205 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | 
|  | 206 |  | 
|  | 207 | dev_dbg(uhci_dev(uhci), "%s\n", __func__); | 
|  | 208 |  | 
|  | 209 | /* Since we aren't in D3 any more, it's safe to set this flag | 
|  | 210 | * even if the controller was dead. | 
|  | 211 | */ | 
|  | 212 | set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); | 
|  | 213 |  | 
|  | 214 | spin_lock_irq(&uhci->lock); | 
|  | 215 |  | 
|  | 216 | /* Make sure resume from hibernation re-enumerates everything */ | 
|  | 217 | if (hibernated) { | 
|  | 218 | uhci->reset_hc(uhci); | 
|  | 219 | finish_reset(uhci); | 
|  | 220 | } | 
|  | 221 |  | 
|  | 222 | /* The firmware may have changed the controller settings during | 
|  | 223 | * a system wakeup.  Check it and reconfigure to avoid problems. | 
|  | 224 | */ | 
|  | 225 | else { | 
|  | 226 | check_and_reset_hc(uhci); | 
|  | 227 | } | 
|  | 228 | configure_hc(uhci); | 
|  | 229 |  | 
|  | 230 | /* Tell the core if the controller had to be reset */ | 
|  | 231 | if (uhci->rh_state == UHCI_RH_RESET) | 
|  | 232 | usb_root_hub_lost_power(hcd->self.root_hub); | 
|  | 233 |  | 
|  | 234 | spin_unlock_irq(&uhci->lock); | 
|  | 235 |  | 
|  | 236 | /* If interrupts don't work and remote wakeup is enabled then | 
|  | 237 | * the suspended root hub needs to be polled. | 
|  | 238 | */ | 
|  | 239 | if (!uhci->RD_enable && hcd->self.root_hub->do_remote_wakeup) | 
|  | 240 | set_bit(HCD_FLAG_POLL_RH, &hcd->flags); | 
|  | 241 |  | 
|  | 242 | /* Does the root hub have a port wakeup pending? */ | 
|  | 243 | usb_hcd_poll_rh_status(hcd); | 
|  | 244 | return 0; | 
|  | 245 | } | 
|  | 246 |  | 
|  | 247 | #endif | 
|  | 248 |  | 
|  | 249 | static const struct hc_driver uhci_driver = { | 
|  | 250 | .description =		hcd_name, | 
|  | 251 | .product_desc =		"UHCI Host Controller", | 
|  | 252 | .hcd_priv_size =	sizeof(struct uhci_hcd), | 
|  | 253 |  | 
|  | 254 | /* Generic hardware linkage */ | 
|  | 255 | .irq =			uhci_irq, | 
|  | 256 | .flags =		HCD_USB11, | 
|  | 257 |  | 
|  | 258 | /* Basic lifecycle operations */ | 
|  | 259 | .reset =		uhci_pci_init, | 
|  | 260 | .start =		uhci_start, | 
|  | 261 | #ifdef CONFIG_PM | 
|  | 262 | .pci_suspend =		uhci_pci_suspend, | 
|  | 263 | .pci_resume =		uhci_pci_resume, | 
|  | 264 | .bus_suspend =		uhci_rh_suspend, | 
|  | 265 | .bus_resume =		uhci_rh_resume, | 
|  | 266 | #endif | 
|  | 267 | .stop =			uhci_stop, | 
|  | 268 |  | 
|  | 269 | .urb_enqueue =		uhci_urb_enqueue, | 
|  | 270 | .urb_dequeue =		uhci_urb_dequeue, | 
|  | 271 |  | 
|  | 272 | .endpoint_disable =	uhci_hcd_endpoint_disable, | 
|  | 273 | .get_frame_number =	uhci_hcd_get_frame_number, | 
|  | 274 |  | 
|  | 275 | .hub_status_data =	uhci_hub_status_data, | 
|  | 276 | .hub_control =		uhci_hub_control, | 
|  | 277 | }; | 
|  | 278 |  | 
|  | 279 | static DEFINE_PCI_DEVICE_TABLE(uhci_pci_ids) = { { | 
|  | 280 | /* handle any USB UHCI controller */ | 
|  | 281 | PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_UHCI, ~0), | 
|  | 282 | .driver_data =	(unsigned long) &uhci_driver, | 
|  | 283 | }, { /* end: all zeroes */ } | 
|  | 284 | }; | 
|  | 285 |  | 
|  | 286 | MODULE_DEVICE_TABLE(pci, uhci_pci_ids); | 
|  | 287 |  | 
|  | 288 | static struct pci_driver uhci_pci_driver = { | 
|  | 289 | .name =		(char *)hcd_name, | 
|  | 290 | .id_table =	uhci_pci_ids, | 
|  | 291 |  | 
|  | 292 | .probe =	usb_hcd_pci_probe, | 
|  | 293 | .remove =	usb_hcd_pci_remove, | 
|  | 294 | .shutdown =	uhci_shutdown, | 
|  | 295 |  | 
|  | 296 | #ifdef CONFIG_PM_SLEEP | 
|  | 297 | .driver =	{ | 
|  | 298 | .pm =	&usb_hcd_pci_pm_ops | 
|  | 299 | }, | 
|  | 300 | #endif | 
|  | 301 | }; |