| Priyanka Gupta | 15e28bf | 2010-10-25 17:58:04 -0700 | [diff] [blame] | 1 | /* | 
|  | 2 | *	sp5100_tco :	TCO timer driver for sp5100 chipsets | 
|  | 3 | * | 
|  | 4 | *	(c) Copyright 2009 Google Inc., All Rights Reserved. | 
|  | 5 | * | 
|  | 6 | *	Based on i8xx_tco.c: | 
|  | 7 | *	(c) Copyright 2000 kernel concepts <nils@kernelconcepts.de>, All Rights | 
|  | 8 | *	Reserved. | 
|  | 9 | *				http://www.kernelconcepts.de | 
|  | 10 | * | 
|  | 11 | *	This program is free software; you can redistribute it and/or | 
|  | 12 | *	modify it under the terms of the GNU General Public License | 
|  | 13 | *	as published by the Free Software Foundation; either version | 
|  | 14 | *	2 of the License, or (at your option) any later version. | 
|  | 15 | * | 
|  | 16 | *	See AMD Publication 43009 "AMD SB700/710/750 Register Reference Guide" | 
|  | 17 | */ | 
|  | 18 |  | 
|  | 19 | /* | 
|  | 20 | *	Includes, defines, variables, module parameters, ... | 
|  | 21 | */ | 
|  | 22 |  | 
|  | 23 | #include <linux/module.h> | 
|  | 24 | #include <linux/moduleparam.h> | 
|  | 25 | #include <linux/types.h> | 
|  | 26 | #include <linux/miscdevice.h> | 
|  | 27 | #include <linux/watchdog.h> | 
|  | 28 | #include <linux/init.h> | 
|  | 29 | #include <linux/fs.h> | 
|  | 30 | #include <linux/pci.h> | 
|  | 31 | #include <linux/ioport.h> | 
|  | 32 | #include <linux/platform_device.h> | 
|  | 33 | #include <linux/uaccess.h> | 
|  | 34 | #include <linux/io.h> | 
|  | 35 |  | 
|  | 36 | #include "sp5100_tco.h" | 
|  | 37 |  | 
|  | 38 | /* Module and version information */ | 
|  | 39 | #define TCO_VERSION "0.01" | 
|  | 40 | #define TCO_MODULE_NAME "SP5100 TCO timer" | 
|  | 41 | #define TCO_DRIVER_NAME   TCO_MODULE_NAME ", v" TCO_VERSION | 
|  | 42 | #define PFX TCO_MODULE_NAME ": " | 
|  | 43 |  | 
|  | 44 | /* internal variables */ | 
| Yinghai Lu | 90d241e | 2011-03-16 20:01:07 -0700 | [diff] [blame] | 45 | static u32 tcobase_phys; | 
| Priyanka Gupta | 15e28bf | 2010-10-25 17:58:04 -0700 | [diff] [blame] | 46 | static void __iomem *tcobase; | 
|  | 47 | static unsigned int pm_iobase; | 
|  | 48 | static DEFINE_SPINLOCK(tco_lock);	/* Guards the hardware */ | 
|  | 49 | static unsigned long timer_alive; | 
|  | 50 | static char tco_expect_close; | 
|  | 51 | static struct pci_dev *sp5100_tco_pci; | 
|  | 52 |  | 
|  | 53 | /* the watchdog platform device */ | 
|  | 54 | static struct platform_device *sp5100_tco_platform_device; | 
|  | 55 |  | 
|  | 56 | /* module parameters */ | 
|  | 57 |  | 
|  | 58 | #define WATCHDOG_HEARTBEAT 60	/* 60 sec default heartbeat. */ | 
|  | 59 | static int heartbeat = WATCHDOG_HEARTBEAT;  /* in seconds */ | 
|  | 60 | module_param(heartbeat, int, 0); | 
|  | 61 | MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (default=" | 
|  | 62 | __MODULE_STRING(WATCHDOG_HEARTBEAT) ")"); | 
|  | 63 |  | 
|  | 64 | static int nowayout = WATCHDOG_NOWAYOUT; | 
|  | 65 | module_param(nowayout, int, 0); | 
|  | 66 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started" | 
|  | 67 | " (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); | 
|  | 68 |  | 
|  | 69 | /* | 
|  | 70 | * Some TCO specific functions | 
|  | 71 | */ | 
|  | 72 | static void tco_timer_start(void) | 
|  | 73 | { | 
|  | 74 | u32 val; | 
|  | 75 | unsigned long flags; | 
|  | 76 |  | 
|  | 77 | spin_lock_irqsave(&tco_lock, flags); | 
|  | 78 | val = readl(SP5100_WDT_CONTROL(tcobase)); | 
|  | 79 | val |= SP5100_WDT_START_STOP_BIT; | 
|  | 80 | writel(val, SP5100_WDT_CONTROL(tcobase)); | 
|  | 81 | spin_unlock_irqrestore(&tco_lock, flags); | 
|  | 82 | } | 
|  | 83 |  | 
|  | 84 | static void tco_timer_stop(void) | 
|  | 85 | { | 
|  | 86 | u32 val; | 
|  | 87 | unsigned long flags; | 
|  | 88 |  | 
|  | 89 | spin_lock_irqsave(&tco_lock, flags); | 
|  | 90 | val = readl(SP5100_WDT_CONTROL(tcobase)); | 
|  | 91 | val &= ~SP5100_WDT_START_STOP_BIT; | 
|  | 92 | writel(val, SP5100_WDT_CONTROL(tcobase)); | 
|  | 93 | spin_unlock_irqrestore(&tco_lock, flags); | 
|  | 94 | } | 
|  | 95 |  | 
|  | 96 | static void tco_timer_keepalive(void) | 
|  | 97 | { | 
|  | 98 | u32 val; | 
|  | 99 | unsigned long flags; | 
|  | 100 |  | 
|  | 101 | spin_lock_irqsave(&tco_lock, flags); | 
|  | 102 | val = readl(SP5100_WDT_CONTROL(tcobase)); | 
|  | 103 | val |= SP5100_WDT_TRIGGER_BIT; | 
|  | 104 | writel(val, SP5100_WDT_CONTROL(tcobase)); | 
|  | 105 | spin_unlock_irqrestore(&tco_lock, flags); | 
|  | 106 | } | 
|  | 107 |  | 
|  | 108 | static int tco_timer_set_heartbeat(int t) | 
|  | 109 | { | 
|  | 110 | unsigned long flags; | 
|  | 111 |  | 
|  | 112 | if (t < 0 || t > 0xffff) | 
|  | 113 | return -EINVAL; | 
|  | 114 |  | 
|  | 115 | /* Write new heartbeat to watchdog */ | 
|  | 116 | spin_lock_irqsave(&tco_lock, flags); | 
|  | 117 | writel(t, SP5100_WDT_COUNT(tcobase)); | 
|  | 118 | spin_unlock_irqrestore(&tco_lock, flags); | 
|  | 119 |  | 
|  | 120 | heartbeat = t; | 
|  | 121 | return 0; | 
|  | 122 | } | 
|  | 123 |  | 
|  | 124 | /* | 
|  | 125 | *	/dev/watchdog handling | 
|  | 126 | */ | 
|  | 127 |  | 
|  | 128 | static int sp5100_tco_open(struct inode *inode, struct file *file) | 
|  | 129 | { | 
|  | 130 | /* /dev/watchdog can only be opened once */ | 
|  | 131 | if (test_and_set_bit(0, &timer_alive)) | 
|  | 132 | return -EBUSY; | 
|  | 133 |  | 
|  | 134 | /* Reload and activate timer */ | 
|  | 135 | tco_timer_start(); | 
|  | 136 | tco_timer_keepalive(); | 
|  | 137 | return nonseekable_open(inode, file); | 
|  | 138 | } | 
|  | 139 |  | 
|  | 140 | static int sp5100_tco_release(struct inode *inode, struct file *file) | 
|  | 141 | { | 
|  | 142 | /* Shut off the timer. */ | 
|  | 143 | if (tco_expect_close == 42) { | 
|  | 144 | tco_timer_stop(); | 
|  | 145 | } else { | 
|  | 146 | printk(KERN_CRIT PFX | 
|  | 147 | "Unexpected close, not stopping watchdog!\n"); | 
|  | 148 | tco_timer_keepalive(); | 
|  | 149 | } | 
|  | 150 | clear_bit(0, &timer_alive); | 
|  | 151 | tco_expect_close = 0; | 
|  | 152 | return 0; | 
|  | 153 | } | 
|  | 154 |  | 
|  | 155 | static ssize_t sp5100_tco_write(struct file *file, const char __user *data, | 
|  | 156 | size_t len, loff_t *ppos) | 
|  | 157 | { | 
|  | 158 | /* See if we got the magic character 'V' and reload the timer */ | 
|  | 159 | if (len) { | 
|  | 160 | if (!nowayout) { | 
|  | 161 | size_t i; | 
|  | 162 |  | 
|  | 163 | /* note: just in case someone wrote the magic character | 
|  | 164 | * five months ago... */ | 
|  | 165 | tco_expect_close = 0; | 
|  | 166 |  | 
|  | 167 | /* scan to see whether or not we got the magic character | 
|  | 168 | */ | 
|  | 169 | for (i = 0; i != len; i++) { | 
|  | 170 | char c; | 
|  | 171 | if (get_user(c, data + i)) | 
|  | 172 | return -EFAULT; | 
|  | 173 | if (c == 'V') | 
|  | 174 | tco_expect_close = 42; | 
|  | 175 | } | 
|  | 176 | } | 
|  | 177 |  | 
|  | 178 | /* someone wrote to us, we should reload the timer */ | 
|  | 179 | tco_timer_keepalive(); | 
|  | 180 | } | 
|  | 181 | return len; | 
|  | 182 | } | 
|  | 183 |  | 
|  | 184 | static long sp5100_tco_ioctl(struct file *file, unsigned int cmd, | 
|  | 185 | unsigned long arg) | 
|  | 186 | { | 
|  | 187 | int new_options, retval = -EINVAL; | 
|  | 188 | int new_heartbeat; | 
|  | 189 | void __user *argp = (void __user *)arg; | 
|  | 190 | int __user *p = argp; | 
|  | 191 | static const struct watchdog_info ident = { | 
|  | 192 | .options =		WDIOF_SETTIMEOUT | | 
|  | 193 | WDIOF_KEEPALIVEPING | | 
|  | 194 | WDIOF_MAGICCLOSE, | 
|  | 195 | .firmware_version =	0, | 
|  | 196 | .identity =		TCO_MODULE_NAME, | 
|  | 197 | }; | 
|  | 198 |  | 
|  | 199 | switch (cmd) { | 
|  | 200 | case WDIOC_GETSUPPORT: | 
|  | 201 | return copy_to_user(argp, &ident, | 
|  | 202 | sizeof(ident)) ? -EFAULT : 0; | 
|  | 203 | case WDIOC_GETSTATUS: | 
|  | 204 | case WDIOC_GETBOOTSTATUS: | 
|  | 205 | return put_user(0, p); | 
|  | 206 | case WDIOC_SETOPTIONS: | 
|  | 207 | if (get_user(new_options, p)) | 
|  | 208 | return -EFAULT; | 
|  | 209 | if (new_options & WDIOS_DISABLECARD) { | 
|  | 210 | tco_timer_stop(); | 
|  | 211 | retval = 0; | 
|  | 212 | } | 
|  | 213 | if (new_options & WDIOS_ENABLECARD) { | 
|  | 214 | tco_timer_start(); | 
|  | 215 | tco_timer_keepalive(); | 
|  | 216 | retval = 0; | 
|  | 217 | } | 
|  | 218 | return retval; | 
|  | 219 | case WDIOC_KEEPALIVE: | 
|  | 220 | tco_timer_keepalive(); | 
|  | 221 | return 0; | 
|  | 222 | case WDIOC_SETTIMEOUT: | 
|  | 223 | if (get_user(new_heartbeat, p)) | 
|  | 224 | return -EFAULT; | 
|  | 225 | if (tco_timer_set_heartbeat(new_heartbeat)) | 
|  | 226 | return -EINVAL; | 
|  | 227 | tco_timer_keepalive(); | 
|  | 228 | /* Fall through */ | 
|  | 229 | case WDIOC_GETTIMEOUT: | 
|  | 230 | return put_user(heartbeat, p); | 
|  | 231 | default: | 
|  | 232 | return -ENOTTY; | 
|  | 233 | } | 
|  | 234 | } | 
|  | 235 |  | 
|  | 236 | /* | 
|  | 237 | * Kernel Interfaces | 
|  | 238 | */ | 
|  | 239 |  | 
|  | 240 | static const struct file_operations sp5100_tco_fops = { | 
|  | 241 | .owner =		THIS_MODULE, | 
|  | 242 | .llseek =		no_llseek, | 
|  | 243 | .write =		sp5100_tco_write, | 
|  | 244 | .unlocked_ioctl =	sp5100_tco_ioctl, | 
|  | 245 | .open =			sp5100_tco_open, | 
|  | 246 | .release =		sp5100_tco_release, | 
|  | 247 | }; | 
|  | 248 |  | 
|  | 249 | static struct miscdevice sp5100_tco_miscdev = { | 
|  | 250 | .minor =	WATCHDOG_MINOR, | 
|  | 251 | .name =		"watchdog", | 
|  | 252 | .fops =		&sp5100_tco_fops, | 
|  | 253 | }; | 
|  | 254 |  | 
|  | 255 | /* | 
|  | 256 | * Data for PCI driver interface | 
|  | 257 | * | 
|  | 258 | * This data only exists for exporting the supported | 
|  | 259 | * PCI ids via MODULE_DEVICE_TABLE.  We do not actually | 
|  | 260 | * register a pci_driver, because someone else might | 
|  | 261 | * want to register another driver on the same PCI id. | 
|  | 262 | */ | 
| Wim Van Sebroeck | 4562f53 | 2011-02-21 12:16:44 +0000 | [diff] [blame] | 263 | static DEFINE_PCI_DEVICE_TABLE(sp5100_tco_pci_tbl) = { | 
| Priyanka Gupta | 15e28bf | 2010-10-25 17:58:04 -0700 | [diff] [blame] | 264 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS, PCI_ANY_ID, | 
|  | 265 | PCI_ANY_ID, }, | 
|  | 266 | { 0, },			/* End of list */ | 
|  | 267 | }; | 
|  | 268 | MODULE_DEVICE_TABLE(pci, sp5100_tco_pci_tbl); | 
|  | 269 |  | 
|  | 270 | /* | 
|  | 271 | * Init & exit routines | 
|  | 272 | */ | 
|  | 273 |  | 
|  | 274 | static unsigned char __devinit sp5100_tco_setupdevice(void) | 
|  | 275 | { | 
|  | 276 | struct pci_dev *dev = NULL; | 
|  | 277 | u32 val; | 
|  | 278 |  | 
|  | 279 | /* Match the PCI device */ | 
|  | 280 | for_each_pci_dev(dev) { | 
|  | 281 | if (pci_match_id(sp5100_tco_pci_tbl, dev) != NULL) { | 
|  | 282 | sp5100_tco_pci = dev; | 
|  | 283 | break; | 
|  | 284 | } | 
|  | 285 | } | 
|  | 286 |  | 
|  | 287 | if (!sp5100_tco_pci) | 
|  | 288 | return 0; | 
|  | 289 |  | 
|  | 290 | /* Request the IO ports used by this driver */ | 
|  | 291 | pm_iobase = SP5100_IO_PM_INDEX_REG; | 
|  | 292 | if (!request_region(pm_iobase, SP5100_PM_IOPORTS_SIZE, "SP5100 TCO")) { | 
|  | 293 | printk(KERN_ERR PFX "I/O address 0x%04x already in use\n", | 
|  | 294 | pm_iobase); | 
|  | 295 | goto exit; | 
|  | 296 | } | 
|  | 297 |  | 
|  | 298 | /* Find the watchdog base address. */ | 
|  | 299 | outb(SP5100_PM_WATCHDOG_BASE3, SP5100_IO_PM_INDEX_REG); | 
|  | 300 | val = inb(SP5100_IO_PM_DATA_REG); | 
|  | 301 | outb(SP5100_PM_WATCHDOG_BASE2, SP5100_IO_PM_INDEX_REG); | 
|  | 302 | val = val << 8 | inb(SP5100_IO_PM_DATA_REG); | 
|  | 303 | outb(SP5100_PM_WATCHDOG_BASE1, SP5100_IO_PM_INDEX_REG); | 
|  | 304 | val = val << 8 | inb(SP5100_IO_PM_DATA_REG); | 
|  | 305 | outb(SP5100_PM_WATCHDOG_BASE0, SP5100_IO_PM_INDEX_REG); | 
|  | 306 | /* Low three bits of BASE0 are reserved. */ | 
|  | 307 | val = val << 8 | (inb(SP5100_IO_PM_DATA_REG) & 0xf8); | 
|  | 308 |  | 
| Yinghai Lu | 90d241e | 2011-03-16 20:01:07 -0700 | [diff] [blame] | 309 | if (!request_mem_region_exclusive(val, SP5100_WDT_MEM_MAP_SIZE, | 
|  | 310 | "SP5100 TCO")) { | 
|  | 311 | printk(KERN_ERR PFX "mmio address 0x%04x already in use\n", | 
|  | 312 | val); | 
|  | 313 | goto unreg_region; | 
|  | 314 | } | 
|  | 315 | tcobase_phys = val; | 
|  | 316 |  | 
| Priyanka Gupta | 15e28bf | 2010-10-25 17:58:04 -0700 | [diff] [blame] | 317 | tcobase = ioremap(val, SP5100_WDT_MEM_MAP_SIZE); | 
|  | 318 | if (tcobase == 0) { | 
|  | 319 | printk(KERN_ERR PFX "failed to get tcobase address\n"); | 
| Yinghai Lu | 90d241e | 2011-03-16 20:01:07 -0700 | [diff] [blame] | 320 | goto unreg_mem_region; | 
| Priyanka Gupta | 15e28bf | 2010-10-25 17:58:04 -0700 | [diff] [blame] | 321 | } | 
|  | 322 |  | 
|  | 323 | /* Enable watchdog decode bit */ | 
|  | 324 | pci_read_config_dword(sp5100_tco_pci, | 
|  | 325 | SP5100_PCI_WATCHDOG_MISC_REG, | 
|  | 326 | &val); | 
|  | 327 |  | 
|  | 328 | val |= SP5100_PCI_WATCHDOG_DECODE_EN; | 
|  | 329 |  | 
|  | 330 | pci_write_config_dword(sp5100_tco_pci, | 
|  | 331 | SP5100_PCI_WATCHDOG_MISC_REG, | 
|  | 332 | val); | 
|  | 333 |  | 
|  | 334 | /* Enable Watchdog timer and set the resolution to 1 sec. */ | 
|  | 335 | outb(SP5100_PM_WATCHDOG_CONTROL, SP5100_IO_PM_INDEX_REG); | 
|  | 336 | val = inb(SP5100_IO_PM_DATA_REG); | 
|  | 337 | val |= SP5100_PM_WATCHDOG_SECOND_RES; | 
|  | 338 | val &= ~SP5100_PM_WATCHDOG_DISABLE; | 
|  | 339 | outb(val, SP5100_IO_PM_DATA_REG); | 
|  | 340 |  | 
|  | 341 | /* Check that the watchdog action is set to reset the system. */ | 
|  | 342 | val = readl(SP5100_WDT_CONTROL(tcobase)); | 
|  | 343 | val &= ~SP5100_PM_WATCHDOG_ACTION_RESET; | 
|  | 344 | writel(val, SP5100_WDT_CONTROL(tcobase)); | 
|  | 345 |  | 
|  | 346 | /* Set a reasonable heartbeat before we stop the timer */ | 
|  | 347 | tco_timer_set_heartbeat(heartbeat); | 
|  | 348 |  | 
|  | 349 | /* | 
|  | 350 | * Stop the TCO before we change anything so we don't race with | 
|  | 351 | * a zeroed timer. | 
|  | 352 | */ | 
|  | 353 | tco_timer_stop(); | 
|  | 354 |  | 
|  | 355 | /* Done */ | 
|  | 356 | return 1; | 
|  | 357 |  | 
| Yinghai Lu | 90d241e | 2011-03-16 20:01:07 -0700 | [diff] [blame] | 358 | unreg_mem_region: | 
|  | 359 | release_mem_region(tcobase_phys, SP5100_WDT_MEM_MAP_SIZE); | 
| Priyanka Gupta | 15e28bf | 2010-10-25 17:58:04 -0700 | [diff] [blame] | 360 | unreg_region: | 
|  | 361 | release_region(pm_iobase, SP5100_PM_IOPORTS_SIZE); | 
|  | 362 | exit: | 
|  | 363 | return 0; | 
|  | 364 | } | 
|  | 365 |  | 
|  | 366 | static int __devinit sp5100_tco_init(struct platform_device *dev) | 
|  | 367 | { | 
|  | 368 | int ret; | 
|  | 369 | u32 val; | 
|  | 370 |  | 
|  | 371 | /* Check whether or not the hardware watchdog is there. If found, then | 
|  | 372 | * set it up. | 
|  | 373 | */ | 
|  | 374 | if (!sp5100_tco_setupdevice()) | 
|  | 375 | return -ENODEV; | 
|  | 376 |  | 
|  | 377 | /* Check to see if last reboot was due to watchdog timeout */ | 
|  | 378 | printk(KERN_INFO PFX "Watchdog reboot %sdetected.\n", | 
|  | 379 | readl(SP5100_WDT_CONTROL(tcobase)) & SP5100_PM_WATCHDOG_FIRED ? | 
|  | 380 | "" : "not "); | 
|  | 381 |  | 
|  | 382 | /* Clear out the old status */ | 
|  | 383 | val = readl(SP5100_WDT_CONTROL(tcobase)); | 
|  | 384 | val &= ~SP5100_PM_WATCHDOG_FIRED; | 
|  | 385 | writel(val, SP5100_WDT_CONTROL(tcobase)); | 
|  | 386 |  | 
|  | 387 | /* | 
|  | 388 | * Check that the heartbeat value is within it's range. | 
|  | 389 | * If not, reset to the default. | 
|  | 390 | */ | 
|  | 391 | if (tco_timer_set_heartbeat(heartbeat)) { | 
|  | 392 | heartbeat = WATCHDOG_HEARTBEAT; | 
|  | 393 | tco_timer_set_heartbeat(heartbeat); | 
|  | 394 | } | 
|  | 395 |  | 
|  | 396 | ret = misc_register(&sp5100_tco_miscdev); | 
|  | 397 | if (ret != 0) { | 
|  | 398 | printk(KERN_ERR PFX "cannot register miscdev on minor=" | 
|  | 399 | "%d (err=%d)\n", | 
|  | 400 | WATCHDOG_MINOR, ret); | 
|  | 401 | goto exit; | 
|  | 402 | } | 
|  | 403 |  | 
|  | 404 | clear_bit(0, &timer_alive); | 
|  | 405 |  | 
|  | 406 | printk(KERN_INFO PFX "initialized (0x%p). heartbeat=%d sec" | 
|  | 407 | " (nowayout=%d)\n", | 
|  | 408 | tcobase, heartbeat, nowayout); | 
|  | 409 |  | 
|  | 410 | return 0; | 
|  | 411 |  | 
|  | 412 | exit: | 
|  | 413 | iounmap(tcobase); | 
| Yinghai Lu | 90d241e | 2011-03-16 20:01:07 -0700 | [diff] [blame] | 414 | release_mem_region(tcobase_phys, SP5100_WDT_MEM_MAP_SIZE); | 
| Priyanka Gupta | 15e28bf | 2010-10-25 17:58:04 -0700 | [diff] [blame] | 415 | release_region(pm_iobase, SP5100_PM_IOPORTS_SIZE); | 
|  | 416 | return ret; | 
|  | 417 | } | 
|  | 418 |  | 
|  | 419 | static void __devexit sp5100_tco_cleanup(void) | 
|  | 420 | { | 
|  | 421 | /* Stop the timer before we leave */ | 
|  | 422 | if (!nowayout) | 
|  | 423 | tco_timer_stop(); | 
|  | 424 |  | 
|  | 425 | /* Deregister */ | 
|  | 426 | misc_deregister(&sp5100_tco_miscdev); | 
|  | 427 | iounmap(tcobase); | 
| Yinghai Lu | 90d241e | 2011-03-16 20:01:07 -0700 | [diff] [blame] | 428 | release_mem_region(tcobase_phys, SP5100_WDT_MEM_MAP_SIZE); | 
| Priyanka Gupta | 15e28bf | 2010-10-25 17:58:04 -0700 | [diff] [blame] | 429 | release_region(pm_iobase, SP5100_PM_IOPORTS_SIZE); | 
|  | 430 | } | 
|  | 431 |  | 
|  | 432 | static int __devexit sp5100_tco_remove(struct platform_device *dev) | 
|  | 433 | { | 
|  | 434 | if (tcobase) | 
|  | 435 | sp5100_tco_cleanup(); | 
|  | 436 | return 0; | 
|  | 437 | } | 
|  | 438 |  | 
|  | 439 | static void sp5100_tco_shutdown(struct platform_device *dev) | 
|  | 440 | { | 
|  | 441 | tco_timer_stop(); | 
|  | 442 | } | 
|  | 443 |  | 
|  | 444 | static struct platform_driver sp5100_tco_driver = { | 
|  | 445 | .probe		= sp5100_tco_init, | 
|  | 446 | .remove		= __devexit_p(sp5100_tco_remove), | 
|  | 447 | .shutdown	= sp5100_tco_shutdown, | 
|  | 448 | .driver		= { | 
|  | 449 | .owner	= THIS_MODULE, | 
|  | 450 | .name	= TCO_MODULE_NAME, | 
|  | 451 | }, | 
|  | 452 | }; | 
|  | 453 |  | 
|  | 454 | static int __init sp5100_tco_init_module(void) | 
|  | 455 | { | 
|  | 456 | int err; | 
|  | 457 |  | 
|  | 458 | printk(KERN_INFO PFX "SP5100 TCO WatchDog Timer Driver v%s\n", | 
|  | 459 | TCO_VERSION); | 
|  | 460 |  | 
|  | 461 | err = platform_driver_register(&sp5100_tco_driver); | 
|  | 462 | if (err) | 
|  | 463 | return err; | 
|  | 464 |  | 
|  | 465 | sp5100_tco_platform_device = platform_device_register_simple( | 
|  | 466 | TCO_MODULE_NAME, -1, NULL, 0); | 
|  | 467 | if (IS_ERR(sp5100_tco_platform_device)) { | 
|  | 468 | err = PTR_ERR(sp5100_tco_platform_device); | 
|  | 469 | goto unreg_platform_driver; | 
|  | 470 | } | 
|  | 471 |  | 
|  | 472 | return 0; | 
|  | 473 |  | 
|  | 474 | unreg_platform_driver: | 
|  | 475 | platform_driver_unregister(&sp5100_tco_driver); | 
|  | 476 | return err; | 
|  | 477 | } | 
|  | 478 |  | 
|  | 479 | static void __exit sp5100_tco_cleanup_module(void) | 
|  | 480 | { | 
|  | 481 | platform_device_unregister(sp5100_tco_platform_device); | 
|  | 482 | platform_driver_unregister(&sp5100_tco_driver); | 
|  | 483 | printk(KERN_INFO PFX "SP5100 TCO Watchdog Module Unloaded.\n"); | 
|  | 484 | } | 
|  | 485 |  | 
|  | 486 | module_init(sp5100_tco_init_module); | 
|  | 487 | module_exit(sp5100_tco_cleanup_module); | 
|  | 488 |  | 
|  | 489 | MODULE_AUTHOR("Priyanka Gupta"); | 
|  | 490 | MODULE_DESCRIPTION("TCO timer driver for SP5100 chipset"); | 
|  | 491 | MODULE_LICENSE("GPL"); | 
|  | 492 | MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); |