| Magnus Damm | 19c43fc | 2011-12-14 01:36:22 +0900 | [diff] [blame] | 1 | /* | 
|  | 2 | * r8a7779 processor support - PFC hardware block | 
|  | 3 | * | 
|  | 4 | * Copyright (C) 2011  Renesas Solutions Corp. | 
|  | 5 | * Copyright (C) 2011  Magnus Damm | 
|  | 6 | * | 
|  | 7 | * This program is free software; you can redistribute it and/or modify | 
|  | 8 | * it under the terms of the GNU General Public License as published by | 
|  | 9 | * the Free Software Foundation; version 2 of the License. | 
|  | 10 | * | 
|  | 11 | * This program is distributed in the hope that it will be useful, | 
|  | 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | 
|  | 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the | 
|  | 14 | * GNU General Public License for more details. | 
|  | 15 | * | 
|  | 16 | * You should have received a copy of the GNU General Public License | 
|  | 17 | * along with this program; if not, write to the Free Software | 
|  | 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA | 
|  | 19 | */ | 
|  | 20 | #include <linux/init.h> | 
|  | 21 | #include <linux/kernel.h> | 
|  | 22 | #include <linux/gpio.h> | 
|  | 23 | #include <linux/ioport.h> | 
|  | 24 | #include <mach/r8a7779.h> | 
|  | 25 |  | 
|  | 26 | #define CPU_32_PORT(fn, pfx, sfx)				\ | 
|  | 27 | PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx),	\ | 
|  | 28 | PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx),	\ | 
|  | 29 | PORT_1(fn, pfx##31, sfx) | 
|  | 30 |  | 
|  | 31 | #define CPU_32_PORT6(fn, pfx, sfx)				\ | 
|  | 32 | PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx),	\ | 
|  | 33 | PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx),	\ | 
|  | 34 | PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx),	\ | 
|  | 35 | PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx),	\ | 
|  | 36 | PORT_1(fn, pfx##8, sfx) | 
|  | 37 |  | 
|  | 38 | #define CPU_ALL_PORT(fn, pfx, sfx)				\ | 
|  | 39 | CPU_32_PORT(fn, pfx##_0_, sfx),				\ | 
|  | 40 | CPU_32_PORT(fn, pfx##_1_, sfx),				\ | 
|  | 41 | CPU_32_PORT(fn, pfx##_2_, sfx),				\ | 
|  | 42 | CPU_32_PORT(fn, pfx##_3_, sfx),				\ | 
|  | 43 | CPU_32_PORT(fn, pfx##_4_, sfx),				\ | 
|  | 44 | CPU_32_PORT(fn, pfx##_5_, sfx),				\ | 
|  | 45 | CPU_32_PORT6(fn, pfx##_6_, sfx) | 
|  | 46 |  | 
|  | 47 | #define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA) | 
|  | 48 | #define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN,	\ | 
|  | 49 | GP##pfx##_IN, GP##pfx##_OUT) | 
|  | 50 |  | 
|  | 51 | #define _GP_INOUTSEL(pfx, sfx) GP##pfx##_IN, GP##pfx##_OUT | 
|  | 52 | #define _GP_INDT(pfx, sfx) GP##pfx##_DATA | 
|  | 53 |  | 
|  | 54 | #define GP_ALL(str)	CPU_ALL_PORT(_PORT_ALL, GP, str) | 
|  | 55 | #define PINMUX_GPIO_GP_ALL()	CPU_ALL_PORT(_GP_GPIO, , unused) | 
|  | 56 | #define PINMUX_DATA_GP_ALL()	CPU_ALL_PORT(_GP_DATA, , unused) | 
|  | 57 |  | 
|  | 58 |  | 
|  | 59 | #define PORT_10_REV(fn, pfx, sfx)				\ | 
|  | 60 | PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx),	\ | 
|  | 61 | PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx),	\ | 
|  | 62 | PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx),	\ | 
|  | 63 | PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx),	\ | 
|  | 64 | PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx) | 
|  | 65 |  | 
|  | 66 | #define CPU_32_PORT_REV(fn, pfx, sfx)					\ | 
|  | 67 | PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx),		\ | 
|  | 68 | PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx),	\ | 
|  | 69 | PORT_10_REV(fn, pfx, sfx) | 
|  | 70 |  | 
|  | 71 | #define GP_INOUTSEL(bank) CPU_32_PORT_REV(_GP_INOUTSEL, _##bank##_, unused) | 
|  | 72 | #define GP_INDT(bank) CPU_32_PORT_REV(_GP_INDT, _##bank##_, unused) | 
|  | 73 |  | 
| Magnus Damm | 2ecba2c | 2011-12-14 01:36:32 +0900 | [diff] [blame] | 74 | #define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn) | 
|  | 75 | #define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \ | 
|  | 76 | FN_##ipsr, FN_##fn) | 
|  | 77 |  | 
| Magnus Damm | 19c43fc | 2011-12-14 01:36:22 +0900 | [diff] [blame] | 78 | enum { | 
|  | 79 | PINMUX_RESERVED = 0, | 
|  | 80 |  | 
|  | 81 | PINMUX_DATA_BEGIN, | 
|  | 82 | GP_ALL(DATA), /* GP_0_0_DATA -> GP_6_8_DATA */ | 
|  | 83 | PINMUX_DATA_END, | 
|  | 84 |  | 
|  | 85 | PINMUX_INPUT_BEGIN, | 
|  | 86 | GP_ALL(IN), /* GP_0_0_IN -> GP_6_8_IN */ | 
|  | 87 | PINMUX_INPUT_END, | 
|  | 88 |  | 
|  | 89 | PINMUX_OUTPUT_BEGIN, | 
|  | 90 | GP_ALL(OUT), /* GP_0_0_OUT -> GP_6_8_OUT */ | 
|  | 91 | PINMUX_OUTPUT_END, | 
|  | 92 |  | 
|  | 93 | PINMUX_FUNCTION_BEGIN, | 
|  | 94 | GP_ALL(FN), /* GP_0_0_FN -> GP_6_8_FN */ | 
|  | 95 |  | 
|  | 96 | /* GPSR0 */ | 
|  | 97 | FN_AVS1, FN_AVS2, FN_IP0_7_6, FN_A17, | 
|  | 98 | FN_A18, FN_A19, FN_IP0_9_8, FN_IP0_11_10, | 
|  | 99 | FN_IP0_13_12, FN_IP0_15_14, FN_IP0_18_16, FN_IP0_22_19, | 
|  | 100 | FN_IP0_24_23, FN_IP0_25, FN_IP0_27_26, FN_IP1_1_0, | 
|  | 101 | FN_IP1_3_2, FN_IP1_6_4, FN_IP1_10_7, FN_IP1_14_11, | 
|  | 102 | FN_IP1_18_15, FN_IP0_5_3, FN_IP0_30_28, FN_IP2_18_16, | 
|  | 103 | FN_IP2_21_19, FN_IP2_30_28, FN_IP3_2_0, FN_IP3_11_9, | 
|  | 104 | FN_IP3_14_12, FN_IP3_22_21, FN_IP3_26_24, FN_IP3_31_29, | 
|  | 105 |  | 
|  | 106 | /* GPSR1 */ | 
|  | 107 | FN_IP4_1_0, FN_IP4_4_2, FN_IP4_7_5, FN_IP4_10_8, | 
|  | 108 | FN_IP4_11, FN_IP4_12, FN_IP4_13, FN_IP4_14, | 
|  | 109 | FN_IP4_15, FN_IP4_16, FN_IP4_19_17, FN_IP4_22_20, | 
|  | 110 | FN_IP4_23, FN_IP4_24, FN_IP4_25, FN_IP4_26, | 
|  | 111 | FN_IP4_27, FN_IP4_28, FN_IP4_31_29, FN_IP5_2_0, | 
|  | 112 | FN_IP5_3, FN_IP5_4, FN_IP5_5, FN_IP5_6, | 
|  | 113 | FN_IP5_7, FN_IP5_8, FN_IP5_10_9, FN_IP5_12_11, | 
|  | 114 | FN_IP5_14_13, FN_IP5_16_15, FN_IP5_20_17, FN_IP5_23_21, | 
|  | 115 |  | 
|  | 116 | /* GPSR2 */ | 
|  | 117 | FN_IP5_27_24, FN_IP8_20, FN_IP8_22_21, FN_IP8_24_23, | 
|  | 118 | FN_IP8_27_25, FN_IP8_30_28, FN_IP9_1_0, FN_IP9_3_2, | 
|  | 119 | FN_IP9_4, FN_IP9_5, FN_IP9_6, FN_IP9_7, | 
|  | 120 | FN_IP9_9_8, FN_IP9_11_10, FN_IP9_13_12, FN_IP9_15_14, | 
|  | 121 | FN_IP9_18_16, FN_IP9_21_19, FN_IP9_23_22, FN_IP9_25_24, | 
|  | 122 | FN_IP9_27_26, FN_IP9_29_28, FN_IP10_2_0, FN_IP10_5_3, | 
|  | 123 | FN_IP10_8_6, FN_IP10_11_9, FN_IP10_14_12, FN_IP10_17_15, | 
|  | 124 | FN_IP10_20_18, FN_IP10_23_21, FN_IP10_25_24, FN_IP10_28_26, | 
|  | 125 |  | 
|  | 126 | /* GPSR3 */ | 
|  | 127 | FN_IP10_31_29, FN_IP11_2_0, FN_IP11_5_3, FN_IP11_8_6, | 
|  | 128 | FN_IP11_11_9, FN_IP11_14_12, FN_IP11_17_15, FN_IP11_20_18, | 
|  | 129 | FN_IP11_23_21, FN_IP11_26_24, FN_IP11_29_27, FN_IP12_2_0, | 
|  | 130 | FN_IP12_5_3, FN_IP12_8_6, FN_IP12_11_9, FN_IP12_14_12, | 
|  | 131 | FN_IP12_17_15, FN_IP7_16_15, FN_IP7_18_17, FN_IP7_28_27, | 
|  | 132 | FN_IP7_30_29, FN_IP7_20_19, FN_IP7_22_21, FN_IP7_24_23, | 
|  | 133 | FN_IP7_26_25, FN_IP1_20_19, FN_IP1_22_21, FN_IP1_24_23, | 
|  | 134 | FN_IP5_28, FN_IP5_30_29, FN_IP6_1_0, FN_IP6_3_2, | 
|  | 135 |  | 
|  | 136 | /* GPSR4 */ | 
|  | 137 | FN_IP6_5_4, FN_IP6_7_6, FN_IP6_8, FN_IP6_11_9, | 
|  | 138 | FN_IP6_14_12, FN_IP6_17_15, FN_IP6_19_18, FN_IP6_22_20, | 
|  | 139 | FN_IP6_24_23, FN_IP6_26_25, FN_IP6_30_29, FN_IP7_1_0, | 
|  | 140 | FN_IP7_3_2, FN_IP7_6_4, FN_IP7_9_7, FN_IP7_12_10, | 
|  | 141 | FN_IP7_14_13, FN_IP2_7_4, FN_IP2_11_8, FN_IP2_15_12, | 
|  | 142 | FN_IP1_28_25, FN_IP2_3_0, FN_IP8_3_0, FN_IP8_7_4, | 
|  | 143 | FN_IP8_11_8, FN_IP8_15_12, FN_PENC0, FN_PENC1, | 
|  | 144 | FN_IP0_2_0, FN_IP8_17_16, FN_IP8_18, FN_IP8_19, | 
|  | 145 |  | 
|  | 146 | /* GPSR5 */ | 
|  | 147 | FN_A1, FN_A2, FN_A3, FN_A4, | 
|  | 148 | FN_A5, FN_A6, FN_A7, FN_A8, | 
|  | 149 | FN_A9, FN_A10, FN_A11, FN_A12, | 
|  | 150 | FN_A13, FN_A14, FN_A15, FN_A16, | 
|  | 151 | FN_RD, FN_WE0, FN_WE1, FN_EX_WAIT0, | 
|  | 152 | FN_IP3_23, FN_IP3_27, FN_IP3_28, FN_IP2_22, | 
|  | 153 | FN_IP2_23, FN_IP2_24, FN_IP2_25, FN_IP2_26, | 
|  | 154 | FN_IP2_27, FN_IP3_3, FN_IP3_4, FN_IP3_5, | 
|  | 155 |  | 
|  | 156 | /* GPSR6 */ | 
|  | 157 | FN_IP3_6, FN_IP3_7, FN_IP3_8, FN_IP3_15, | 
|  | 158 | FN_IP3_16, FN_IP3_17, FN_IP3_18, FN_IP3_19, | 
|  | 159 | FN_IP3_20, | 
| Magnus Damm | 2ecba2c | 2011-12-14 01:36:32 +0900 | [diff] [blame] | 160 |  | 
|  | 161 | /* IPSR0 */ | 
|  | 162 | FN_RD_WR, FN_FWE, FN_ATAG0, FN_VI1_R7, | 
|  | 163 | FN_HRTS1, FN_RX4_C, | 
|  | 164 | FN_CS1_A26, FN_HSPI_TX2, FN_SDSELF_B, | 
|  | 165 | FN_CS0, FN_HSPI_CS2_B, | 
|  | 166 | FN_CLKOUT, FN_TX3C_IRDA_TX_C, FN_PWM0_B, | 
|  | 167 | FN_A25, FN_SD1_WP, FN_MMC0_D5, FN_FD5, | 
|  | 168 | FN_HSPI_RX2, FN_VI1_R3, FN_TX5_B, FN_SSI_SDATA7_B, | 
|  | 169 | FN_CTS0_B, | 
|  | 170 | FN_A24, FN_SD1_CD, FN_MMC0_D4, FN_FD4, | 
|  | 171 | FN_HSPI_CS2, FN_VI1_R2, FN_SSI_WS78_B, | 
|  | 172 | FN_A23, FN_FCLE, FN_HSPI_CLK2, FN_VI1_R1, | 
|  | 173 | FN_A22, FN_RX5_D, FN_HSPI_RX2_B, FN_VI1_R0, | 
|  | 174 | FN_A21, FN_SCK5_D, FN_HSPI_CLK2_B, | 
|  | 175 | FN_A20, FN_TX5_D, FN_HSPI_TX2_B, | 
|  | 176 | FN_A0, FN_SD1_DAT3, FN_MMC0_D3, FN_FD3, | 
|  | 177 | FN_BS, FN_SD1_DAT2, FN_MMC0_D2, FN_FD2, | 
|  | 178 | FN_ATADIR0, FN_SDSELF, FN_HCTS1, FN_TX4_C, | 
|  | 179 | FN_PENC2, FN_SCK0, FN_PWM1, FN_PWMFSW0, | 
|  | 180 | FN_SCIF_CLK, FN_TCLK0_C, | 
|  | 181 |  | 
|  | 182 | /* IPSR1 */ | 
|  | 183 | FN_EX_CS0, FN_RX3_C_IRDA_RX_C, FN_MMC0_D6, | 
|  | 184 | FN_FD6, FN_EX_CS1, FN_MMC0_D7, FN_FD7, | 
|  | 185 | FN_EX_CS2, FN_SD1_CLK, FN_MMC0_CLK, FN_FALE, | 
|  | 186 | FN_ATACS00, FN_EX_CS3, FN_SD1_CMD, FN_MMC0_CMD, | 
|  | 187 | FN_FRE, FN_ATACS10, FN_VI1_R4, FN_RX5_B, | 
|  | 188 | FN_HSCK1, FN_SSI_SDATA8_B, FN_RTS0_B_TANS_B, FN_SSI_SDATA9, | 
|  | 189 | FN_EX_CS4, FN_SD1_DAT0, FN_MMC0_D0, FN_FD0, | 
|  | 190 | FN_ATARD0, FN_VI1_R5, FN_SCK5_B, FN_HTX1, | 
|  | 191 | FN_TX2_E, FN_TX0_B, FN_SSI_SCK9, FN_EX_CS5, | 
|  | 192 | FN_SD1_DAT1, FN_MMC0_D1, FN_FD1, FN_ATAWR0, | 
|  | 193 | FN_VI1_R6, FN_HRX1, FN_RX2_E, FN_RX0_B, | 
|  | 194 | FN_SSI_WS9, FN_MLB_CLK, FN_PWM2, FN_SCK4, | 
|  | 195 | FN_MLB_SIG, FN_PWM3, FN_TX4, FN_MLB_DAT, | 
|  | 196 | FN_PWM4, FN_RX4, FN_HTX0, FN_TX1, | 
|  | 197 | FN_SDATA, FN_CTS0_C, FN_SUB_TCK, FN_CC5_STATE2, | 
|  | 198 | FN_CC5_STATE10, FN_CC5_STATE18, FN_CC5_STATE26, FN_CC5_STATE34, | 
|  | 199 |  | 
|  | 200 | /* IPSR2 */ | 
|  | 201 | FN_HRX0, FN_RX1, FN_SCKZ, FN_RTS0_C_TANS_C, | 
|  | 202 | FN_SUB_TDI, FN_CC5_STATE3, FN_CC5_STATE11, FN_CC5_STATE19, | 
|  | 203 | FN_CC5_STATE27, FN_CC5_STATE35, FN_HSCK0, FN_SCK1, | 
|  | 204 | FN_MTS, FN_PWM5, FN_SCK0_C, FN_SSI_SDATA9_B, | 
|  | 205 | FN_SUB_TDO, FN_CC5_STATE0, FN_CC5_STATE8, FN_CC5_STATE16, | 
|  | 206 | FN_CC5_STATE24, FN_CC5_STATE32, FN_HCTS0, FN_CTS1, | 
|  | 207 | FN_STM, FN_PWM0_D, FN_RX0_C, FN_SCIF_CLK_C, | 
|  | 208 | FN_SUB_TRST, FN_TCLK1_B, FN_CC5_OSCOUT, FN_HRTS0, | 
|  | 209 | FN_RTS1_TANS, FN_MDATA, FN_TX0_C, FN_SUB_TMS, | 
|  | 210 | FN_CC5_STATE1, FN_CC5_STATE9, FN_CC5_STATE17, FN_CC5_STATE25, | 
|  | 211 | FN_CC5_STATE33, FN_DU0_DR0, FN_LCDOUT0, FN_DREQ0, | 
|  | 212 | FN_GPS_CLK_B, FN_AUDATA0, FN_TX5_C, FN_DU0_DR1, | 
|  | 213 | FN_LCDOUT1, FN_DACK0, FN_DRACK0, FN_GPS_SIGN_B, | 
|  | 214 | FN_AUDATA1, FN_RX5_C, FN_DU0_DR2, FN_LCDOUT2, | 
|  | 215 | FN_DU0_DR3, FN_LCDOUT3, FN_DU0_DR4, FN_LCDOUT4, | 
|  | 216 | FN_DU0_DR5, FN_LCDOUT5, FN_DU0_DR6, FN_LCDOUT6, | 
|  | 217 | FN_DU0_DR7, FN_LCDOUT7, FN_DU0_DG0, FN_LCDOUT8, | 
|  | 218 | FN_DREQ1, FN_SCL2, FN_AUDATA2, | 
|  | 219 |  | 
|  | 220 | /* IPSR3 */ | 
|  | 221 | FN_DU0_DG1, FN_LCDOUT9, FN_DACK1, FN_SDA2, | 
|  | 222 | FN_AUDATA3, FN_DU0_DG2, FN_LCDOUT10, FN_DU0_DG3, | 
|  | 223 | FN_LCDOUT11, FN_DU0_DG4, FN_LCDOUT12, FN_DU0_DG5, | 
|  | 224 | FN_LCDOUT13, FN_DU0_DG6, FN_LCDOUT14, FN_DU0_DG7, | 
|  | 225 | FN_LCDOUT15, FN_DU0_DB0, FN_LCDOUT16, FN_EX_WAIT1, | 
|  | 226 | FN_SCL1, FN_TCLK1, FN_AUDATA4, FN_DU0_DB1, | 
|  | 227 | FN_LCDOUT17, FN_EX_WAIT2, FN_SDA1, FN_GPS_MAG_B, | 
|  | 228 | FN_AUDATA5, FN_SCK5_C, FN_DU0_DB2, FN_LCDOUT18, | 
|  | 229 | FN_DU0_DB3, FN_LCDOUT19, FN_DU0_DB4, FN_LCDOUT20, | 
|  | 230 | FN_DU0_DB5, FN_LCDOUT21, FN_DU0_DB6, FN_LCDOUT22, | 
|  | 231 | FN_DU0_DB7, FN_LCDOUT23, FN_DU0_DOTCLKIN, FN_QSTVA_QVS, | 
|  | 232 | FN_TX3_D_IRDA_TX_D, FN_SCL3_B, FN_DU0_DOTCLKOUT0, FN_QCLK, | 
|  | 233 | FN_DU0_DOTCLKOUT1, FN_QSTVB_QVE, FN_RX3_D_IRDA_RX_D, FN_SDA3_B, | 
|  | 234 | FN_SDA2_C, FN_DACK0_B, FN_DRACK0_B, FN_DU0_EXHSYNC_DU0_HSYNC, | 
|  | 235 | FN_QSTH_QHS, FN_DU0_EXVSYNC_DU0_VSYNC, FN_QSTB_QHE, | 
|  | 236 | FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, FN_QCPV_QDE, FN_CAN1_TX, | 
|  | 237 | FN_TX2_C, FN_SCL2_C, FN_REMOCON, | 
|  | 238 |  | 
|  | 239 | /* IPSR4 */ | 
|  | 240 | FN_DU0_DISP, FN_QPOLA, FN_CAN_CLK_C, FN_SCK2_C, | 
|  | 241 | FN_DU0_CDE, FN_QPOLB, FN_CAN1_RX, FN_RX2_C, | 
|  | 242 | FN_DREQ0_B, FN_SSI_SCK78_B, FN_SCK0_B, FN_DU1_DR0, | 
|  | 243 | FN_VI2_DATA0_VI2_B0, FN_PWM6, FN_SD3_CLK, FN_TX3_E_IRDA_TX_E, | 
|  | 244 | FN_AUDCK, FN_PWMFSW0_B, FN_DU1_DR1, FN_VI2_DATA1_VI2_B1, | 
|  | 245 | FN_PWM0, FN_SD3_CMD, FN_RX3_E_IRDA_RX_E, FN_AUDSYNC, | 
|  | 246 | FN_CTS0_D, FN_DU1_DR2, FN_VI2_G0, FN_DU1_DR3, | 
|  | 247 | FN_VI2_G1, FN_DU1_DR4, FN_VI2_G2, FN_DU1_DR5, | 
|  | 248 | FN_VI2_G3, FN_DU1_DR6, FN_VI2_G4, FN_DU1_DR7, | 
|  | 249 | FN_VI2_G5, FN_DU1_DG0, FN_VI2_DATA2_VI2_B2, FN_SCL1_B, | 
|  | 250 | FN_SD3_DAT2, FN_SCK3_E, FN_AUDATA6, FN_TX0_D, | 
|  | 251 | FN_DU1_DG1, FN_VI2_DATA3_VI2_B3, FN_SDA1_B, FN_SD3_DAT3, | 
|  | 252 | FN_SCK5, FN_AUDATA7, FN_RX0_D, FN_DU1_DG2, | 
|  | 253 | FN_VI2_G6, FN_DU1_DG3, FN_VI2_G7, FN_DU1_DG4, | 
|  | 254 | FN_VI2_R0, FN_DU1_DG5, FN_VI2_R1, FN_DU1_DG6, | 
|  | 255 | FN_VI2_R2, FN_DU1_DG7, FN_VI2_R3, FN_DU1_DB0, | 
|  | 256 | FN_VI2_DATA4_VI2_B4, FN_SCL2_B, FN_SD3_DAT0, FN_TX5, | 
|  | 257 | FN_SCK0_D, | 
|  | 258 |  | 
|  | 259 | /* IPSR5 */ | 
|  | 260 | FN_DU1_DB1, FN_VI2_DATA5_VI2_B5, FN_SDA2_B, FN_SD3_DAT1, | 
|  | 261 | FN_RX5, FN_RTS0_D_TANS_D, FN_DU1_DB2, FN_VI2_R4, | 
|  | 262 | FN_DU1_DB3, FN_VI2_R5, FN_DU1_DB4, FN_VI2_R6, | 
|  | 263 | FN_DU1_DB5, FN_VI2_R7, FN_DU1_DB6, FN_SCL2_D, | 
|  | 264 | FN_DU1_DB7, FN_SDA2_D, FN_DU1_DOTCLKIN, FN_VI2_CLKENB, | 
|  | 265 | FN_HSPI_CS1, FN_SCL1_D, FN_DU1_DOTCLKOUT, FN_VI2_FIELD, | 
|  | 266 | FN_SDA1_D, FN_DU1_EXHSYNC_DU1_HSYNC, FN_VI2_HSYNC, | 
|  | 267 | FN_VI3_HSYNC, FN_DU1_EXVSYNC_DU1_VSYNC, FN_VI2_VSYNC, FN_VI3_VSYNC, | 
|  | 268 | FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, FN_VI2_CLK, FN_TX3_B_IRDA_TX_B, | 
|  | 269 | FN_SD3_CD, FN_HSPI_TX1, FN_VI1_CLKENB, FN_VI3_CLKENB, | 
|  | 270 | FN_AUDIO_CLKC, FN_TX2_D, FN_SPEEDIN, FN_GPS_SIGN_D, | 
|  | 271 | FN_DU1_DISP, FN_VI2_DATA6_VI2_B6, FN_TCLK0, FN_QSTVA_B_QVS_B, | 
|  | 272 | FN_HSPI_CLK1, FN_SCK2_D, FN_AUDIO_CLKOUT_B, FN_GPS_MAG_D, | 
|  | 273 | FN_DU1_CDE, FN_VI2_DATA7_VI2_B7, FN_RX3_B_IRDA_RX_B, | 
|  | 274 | FN_SD3_WP, FN_HSPI_RX1, FN_VI1_FIELD, FN_VI3_FIELD, | 
|  | 275 | FN_AUDIO_CLKOUT, FN_RX2_D, FN_GPS_CLK_C, FN_GPS_CLK_D, | 
|  | 276 | FN_AUDIO_CLKA, FN_CAN_TXCLK, FN_AUDIO_CLKB, FN_USB_OVC2, | 
|  | 277 | FN_CAN_DEBUGOUT0, FN_MOUT0, | 
|  | 278 |  | 
|  | 279 | /* IPSR6 */ | 
|  | 280 | FN_SSI_SCK0129, FN_CAN_DEBUGOUT1, FN_MOUT1, FN_SSI_WS0129, | 
|  | 281 | FN_CAN_DEBUGOUT2, FN_MOUT2, FN_SSI_SDATA0, FN_CAN_DEBUGOUT3, | 
|  | 282 | FN_MOUT5, FN_SSI_SDATA1, FN_CAN_DEBUGOUT4, FN_MOUT6, | 
|  | 283 | FN_SSI_SDATA2, FN_CAN_DEBUGOUT5, FN_SSI_SCK34, FN_CAN_DEBUGOUT6, | 
|  | 284 | FN_CAN0_TX_B, FN_IERX, FN_SSI_SCK9_C, FN_SSI_WS34, | 
|  | 285 | FN_CAN_DEBUGOUT7, FN_CAN0_RX_B, FN_IETX, FN_SSI_WS9_C, | 
|  | 286 | FN_SSI_SDATA3, FN_PWM0_C, FN_CAN_DEBUGOUT8, FN_CAN_CLK_B, | 
|  | 287 | FN_IECLK, FN_SCIF_CLK_B, FN_TCLK0_B, FN_SSI_SDATA4, | 
|  | 288 | FN_CAN_DEBUGOUT9, FN_SSI_SDATA9_C, FN_SSI_SCK5, FN_ADICLK, | 
|  | 289 | FN_CAN_DEBUGOUT10, FN_SCK3, FN_TCLK0_D, FN_SSI_WS5, | 
|  | 290 | FN_ADICS_SAMP, FN_CAN_DEBUGOUT11, FN_TX3_IRDA_TX, FN_SSI_SDATA5, | 
|  | 291 | FN_ADIDATA, FN_CAN_DEBUGOUT12, FN_RX3_IRDA_RX, FN_SSI_SCK6, | 
|  | 292 | FN_ADICHS0, FN_CAN0_TX, FN_IERX_B, | 
|  | 293 |  | 
|  | 294 | /* IPSR7 */ | 
|  | 295 | FN_SSI_WS6, FN_ADICHS1, FN_CAN0_RX, FN_IETX_B, | 
|  | 296 | FN_SSI_SDATA6, FN_ADICHS2, FN_CAN_CLK, FN_IECLK_B, | 
|  | 297 | FN_SSI_SCK78, FN_CAN_DEBUGOUT13, FN_IRQ0_B, FN_SSI_SCK9_B, | 
|  | 298 | FN_HSPI_CLK1_C, FN_SSI_WS78, FN_CAN_DEBUGOUT14, FN_IRQ1_B, | 
|  | 299 | FN_SSI_WS9_B, FN_HSPI_CS1_C, FN_SSI_SDATA7, FN_CAN_DEBUGOUT15, | 
|  | 300 | FN_IRQ2_B, FN_TCLK1_C, FN_HSPI_TX1_C, FN_SSI_SDATA8, | 
|  | 301 | FN_VSP, FN_IRQ3_B, FN_HSPI_RX1_C, FN_SD0_CLK, | 
|  | 302 | FN_ATACS01, FN_SCK1_B, FN_SD0_CMD, FN_ATACS11, | 
|  | 303 | FN_TX1_B, FN_CC5_TDO, FN_SD0_DAT0, FN_ATADIR1, | 
|  | 304 | FN_RX1_B, FN_CC5_TRST, FN_SD0_DAT1, FN_ATAG1, | 
|  | 305 | FN_SCK2_B, FN_CC5_TMS, FN_SD0_DAT2, FN_ATARD1, | 
|  | 306 | FN_TX2_B, FN_CC5_TCK, FN_SD0_DAT3, FN_ATAWR1, | 
|  | 307 | FN_RX2_B, FN_CC5_TDI, FN_SD0_CD, FN_DREQ2, | 
|  | 308 | FN_RTS1_B_TANS_B, FN_SD0_WP, FN_DACK2, FN_CTS1_B, | 
|  | 309 |  | 
|  | 310 | /* IPSR8 */ | 
|  | 311 | FN_HSPI_CLK0, FN_CTS0, FN_USB_OVC0, FN_AD_CLK, | 
|  | 312 | FN_CC5_STATE4, FN_CC5_STATE12, FN_CC5_STATE20, FN_CC5_STATE28, | 
|  | 313 | FN_CC5_STATE36, FN_HSPI_CS0, FN_RTS0_TANS, FN_USB_OVC1, | 
|  | 314 | FN_AD_DI, FN_CC5_STATE5, FN_CC5_STATE13, FN_CC5_STATE21, | 
|  | 315 | FN_CC5_STATE29, FN_CC5_STATE37, FN_HSPI_TX0, FN_TX0, | 
|  | 316 | FN_CAN_DEBUG_HW_TRIGGER, FN_AD_DO, FN_CC5_STATE6, FN_CC5_STATE14, | 
|  | 317 | FN_CC5_STATE22, FN_CC5_STATE30, FN_CC5_STATE38, FN_HSPI_RX0, | 
|  | 318 | FN_RX0, FN_CAN_STEP0, FN_AD_NCS, FN_CC5_STATE7, | 
|  | 319 | FN_CC5_STATE15, FN_CC5_STATE23, FN_CC5_STATE31, FN_CC5_STATE39, | 
|  | 320 | FN_FMCLK, FN_RDS_CLK, FN_PCMOE, FN_BPFCLK, | 
|  | 321 | FN_PCMWE, FN_FMIN, FN_RDS_DATA, FN_VI0_CLK, | 
|  | 322 | FN_MMC1_CLK, FN_VI0_CLKENB, FN_TX1_C, FN_HTX1_B, | 
|  | 323 | FN_MT1_SYNC, FN_VI0_FIELD, FN_RX1_C, FN_HRX1_B, | 
|  | 324 | FN_VI0_HSYNC, FN_VI0_DATA0_B_VI0_B0_B, FN_CTS1_C, FN_TX4_D, | 
|  | 325 | FN_MMC1_CMD, FN_HSCK1_B, FN_VI0_VSYNC, FN_VI0_DATA1_B_VI0_B1_B, | 
|  | 326 | FN_RTS1_C_TANS_C, FN_RX4_D, FN_PWMFSW0_C, | 
|  | 327 |  | 
|  | 328 | /* IPSR9 */ | 
|  | 329 | FN_VI0_DATA0_VI0_B0, FN_HRTS1_B, FN_MT1_VCXO, FN_VI0_DATA1_VI0_B1, | 
|  | 330 | FN_HCTS1_B, FN_MT1_PWM, FN_VI0_DATA2_VI0_B2, FN_MMC1_D0, | 
|  | 331 | FN_VI0_DATA3_VI0_B3, FN_MMC1_D1, FN_VI0_DATA4_VI0_B4, FN_MMC1_D2, | 
|  | 332 | FN_VI0_DATA5_VI0_B5, FN_MMC1_D3, FN_VI0_DATA6_VI0_B6, FN_MMC1_D4, | 
|  | 333 | FN_ARM_TRACEDATA_0, FN_VI0_DATA7_VI0_B7, FN_MMC1_D5, | 
|  | 334 | FN_ARM_TRACEDATA_1, FN_VI0_G0, FN_SSI_SCK78_C, FN_IRQ0, | 
|  | 335 | FN_ARM_TRACEDATA_2, FN_VI0_G1, FN_SSI_WS78_C, FN_IRQ1, | 
|  | 336 | FN_ARM_TRACEDATA_3, FN_VI0_G2, FN_ETH_TXD1, FN_MMC1_D6, | 
|  | 337 | FN_ARM_TRACEDATA_4, FN_TS_SPSYNC0, FN_VI0_G3, FN_ETH_CRS_DV, | 
|  | 338 | FN_MMC1_D7, FN_ARM_TRACEDATA_5, FN_TS_SDAT0, FN_VI0_G4, | 
|  | 339 | FN_ETH_TX_EN, FN_SD2_DAT0_B, FN_ARM_TRACEDATA_6, FN_VI0_G5, | 
|  | 340 | FN_ETH_RX_ER, FN_SD2_DAT1_B, FN_ARM_TRACEDATA_7, FN_VI0_G6, | 
|  | 341 | FN_ETH_RXD0, FN_SD2_DAT2_B, FN_ARM_TRACEDATA_8, FN_VI0_G7, | 
|  | 342 | FN_ETH_RXD1, FN_SD2_DAT3_B, FN_ARM_TRACEDATA_9, | 
|  | 343 |  | 
|  | 344 | /* IPSR10 */ | 
|  | 345 | FN_VI0_R0, FN_SSI_SDATA7_C, FN_SCK1_C, FN_DREQ1_B, | 
|  | 346 | FN_ARM_TRACEDATA_10, FN_DREQ0_C, FN_VI0_R1, FN_SSI_SDATA8_C, | 
|  | 347 | FN_DACK1_B, FN_ARM_TRACEDATA_11, FN_DACK0_C, FN_DRACK0_C, | 
|  | 348 | FN_VI0_R2, FN_ETH_LINK, FN_SD2_CLK_B, FN_IRQ2, | 
|  | 349 | FN_ARM_TRACEDATA_12, FN_VI0_R3, FN_ETH_MAGIC, FN_SD2_CMD_B, | 
|  | 350 | FN_IRQ3, FN_ARM_TRACEDATA_13, FN_VI0_R4, FN_ETH_REFCLK, | 
|  | 351 | FN_SD2_CD_B, FN_HSPI_CLK1_B, FN_ARM_TRACEDATA_14, FN_MT1_CLK, | 
|  | 352 | FN_TS_SCK0, FN_VI0_R5, FN_ETH_TXD0, FN_SD2_WP_B, FN_HSPI_CS1_B, | 
|  | 353 | FN_ARM_TRACEDATA_15, FN_MT1_D, FN_TS_SDEN0, FN_VI0_R6, | 
|  | 354 | FN_ETH_MDC, FN_DREQ2_C, FN_HSPI_TX1_B, FN_TRACECLK, | 
|  | 355 | FN_MT1_BEN, FN_PWMFSW0_D, FN_VI0_R7, FN_ETH_MDIO, | 
|  | 356 | FN_DACK2_C, FN_HSPI_RX1_B, FN_SCIF_CLK_D, FN_TRACECTL, | 
|  | 357 | FN_MT1_PEN, FN_VI1_CLK, FN_SIM_D, FN_SDA3, | 
|  | 358 | FN_VI1_HSYNC, FN_VI3_CLK, FN_SSI_SCK4, FN_GPS_SIGN_C, | 
|  | 359 | FN_PWMFSW0_E, FN_VI1_VSYNC, FN_AUDIO_CLKOUT_C, FN_SSI_WS4, | 
|  | 360 | FN_SIM_CLK, FN_GPS_MAG_C, FN_SPV_TRST, FN_SCL3, | 
|  | 361 |  | 
|  | 362 | /* IPSR11 */ | 
|  | 363 | FN_VI1_DATA0_VI1_B0, FN_SD2_DAT0, FN_SIM_RST, FN_SPV_TCK, | 
|  | 364 | FN_ADICLK_B, FN_VI1_DATA1_VI1_B1, FN_SD2_DAT1, FN_MT0_CLK, | 
|  | 365 | FN_SPV_TMS, FN_ADICS_B_SAMP_B, FN_VI1_DATA2_VI1_B2, FN_SD2_DAT2, | 
|  | 366 | FN_MT0_D, FN_SPVTDI, FN_ADIDATA_B, FN_VI1_DATA3_VI1_B3, | 
|  | 367 | FN_SD2_DAT3, FN_MT0_BEN, FN_SPV_TDO, FN_ADICHS0_B, | 
|  | 368 | FN_VI1_DATA4_VI1_B4, FN_SD2_CLK, FN_MT0_PEN, FN_SPA_TRST, | 
|  | 369 | FN_HSPI_CLK1_D, FN_ADICHS1_B, FN_VI1_DATA5_VI1_B5, FN_SD2_CMD, | 
|  | 370 | FN_MT0_SYNC, FN_SPA_TCK, FN_HSPI_CS1_D, FN_ADICHS2_B, | 
|  | 371 | FN_VI1_DATA6_VI1_B6, FN_SD2_CD, FN_MT0_VCXO, FN_SPA_TMS, | 
|  | 372 | FN_HSPI_TX1_D, FN_VI1_DATA7_VI1_B7, FN_SD2_WP, FN_MT0_PWM, | 
|  | 373 | FN_SPA_TDI, FN_HSPI_RX1_D, FN_VI1_G0, FN_VI3_DATA0, | 
|  | 374 | FN_DU1_DOTCLKOUT1, FN_TS_SCK1, FN_DREQ2_B, FN_TX2, | 
|  | 375 | FN_SPA_TDO, FN_HCTS0_B, FN_VI1_G1, FN_VI3_DATA1, | 
|  | 376 | FN_SSI_SCK1, FN_TS_SDEN1, FN_DACK2_B, FN_RX2, FN_HRTS0_B, | 
|  | 377 |  | 
|  | 378 | /* IPSR12 */ | 
|  | 379 | FN_VI1_G2, FN_VI3_DATA2, FN_SSI_WS1, FN_TS_SPSYNC1, | 
|  | 380 | FN_SCK2, FN_HSCK0_B, FN_VI1_G3, FN_VI3_DATA3, | 
|  | 381 | FN_SSI_SCK2, FN_TS_SDAT1, FN_SCL1_C, FN_HTX0_B, | 
|  | 382 | FN_VI1_G4, FN_VI3_DATA4, FN_SSI_WS2, FN_SDA1_C, | 
|  | 383 | FN_SIM_RST_B, FN_HRX0_B, FN_VI1_G5, FN_VI3_DATA5, | 
|  | 384 | FN_GPS_CLK, FN_FSE, FN_TX4_B, FN_SIM_D_B, | 
|  | 385 | FN_VI1_G6, FN_VI3_DATA6, FN_GPS_SIGN, FN_FRB, | 
|  | 386 | FN_RX4_B, FN_SIM_CLK_B, FN_VI1_G7, FN_VI3_DATA7, | 
|  | 387 | FN_GPS_MAG, FN_FCE, FN_SCK4_B, | 
|  | 388 |  | 
|  | 389 | FN_SEL_SCIF5_0, FN_SEL_SCIF5_1, FN_SEL_SCIF5_2, FN_SEL_SCIF5_3, | 
|  | 390 | FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2, FN_SEL_SCIF4_3, | 
|  | 391 | FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, | 
|  | 392 | FN_SEL_SCIF3_3, FN_SEL_SCIF3_4, | 
|  | 393 | FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, | 
|  | 394 | FN_SEL_SCIF2_3, FN_SEL_SCIF2_4, | 
|  | 395 | FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, | 
|  | 396 | FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, FN_SEL_SCIF0_3, | 
|  | 397 | FN_SEL_SSI9_0, FN_SEL_SSI9_1, FN_SEL_SSI9_2, | 
|  | 398 | FN_SEL_SSI8_0, FN_SEL_SSI8_1, FN_SEL_SSI8_2, | 
|  | 399 | FN_SEL_SSI7_0, FN_SEL_SSI7_1, FN_SEL_SSI7_2, | 
|  | 400 | FN_SEL_VI0_0, FN_SEL_VI0_1, | 
|  | 401 | FN_SEL_SD2_0, FN_SEL_SD2_1, | 
|  | 402 | FN_SEL_INT3_0, FN_SEL_INT3_1, | 
|  | 403 | FN_SEL_INT2_0, FN_SEL_INT2_1, | 
|  | 404 | FN_SEL_INT1_0, FN_SEL_INT1_1, | 
|  | 405 | FN_SEL_INT0_0, FN_SEL_INT0_1, | 
|  | 406 | FN_SEL_IE_0, FN_SEL_IE_1, | 
|  | 407 | FN_SEL_EXBUS2_0, FN_SEL_EXBUS2_1, FN_SEL_EXBUS2_2, | 
|  | 408 | FN_SEL_EXBUS1_0, FN_SEL_EXBUS1_1, | 
|  | 409 | FN_SEL_EXBUS0_0, FN_SEL_EXBUS0_1, FN_SEL_EXBUS0_2, | 
|  | 410 |  | 
|  | 411 | FN_SEL_TMU1_0, FN_SEL_TMU1_1, FN_SEL_TMU1_2, | 
|  | 412 | FN_SEL_TMU0_0, FN_SEL_TMU0_1, FN_SEL_TMU0_2, FN_SEL_TMU0_3, | 
|  | 413 | FN_SEL_SCIF_0, FN_SEL_SCIF_1, FN_SEL_SCIF_2, FN_SEL_SCIF_3, | 
|  | 414 | FN_SEL_CANCLK_0, FN_SEL_CANCLK_1, FN_SEL_CANCLK_2, | 
|  | 415 | FN_SEL_CAN0_0, FN_SEL_CAN0_1, | 
|  | 416 | FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, | 
|  | 417 | FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, | 
|  | 418 | FN_SEL_PWMFSW_0, FN_SEL_PWMFSW_1, FN_SEL_PWMFSW_2, | 
|  | 419 | FN_SEL_PWMFSW_3, FN_SEL_PWMFSW_4, | 
|  | 420 | FN_SEL_ADI_0, FN_SEL_ADI_1, | 
|  | 421 | FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2, FN_SEL_GPS_3, | 
|  | 422 | FN_SEL_SIM_0, FN_SEL_SIM_1, | 
|  | 423 | FN_SEL_HSPI2_0, FN_SEL_HSPI2_1, | 
|  | 424 | FN_SEL_HSPI1_0, FN_SEL_HSPI1_1, FN_SEL_HSPI1_2, FN_SEL_HSPI1_3, | 
|  | 425 | FN_SEL_I2C3_0, FN_SEL_I2C3_1, | 
|  | 426 | FN_SEL_I2C2_0, FN_SEL_I2C2_1, FN_SEL_I2C2_2, FN_SEL_I2C2_3, | 
|  | 427 | FN_SEL_I2C1_0, FN_SEL_I2C1_1, FN_SEL_I2C1_2, FN_SEL_I2C1_3, | 
| Magnus Damm | 19c43fc | 2011-12-14 01:36:22 +0900 | [diff] [blame] | 428 | PINMUX_FUNCTION_END, | 
| Magnus Damm | 2ecba2c | 2011-12-14 01:36:32 +0900 | [diff] [blame] | 429 |  | 
|  | 430 | PINMUX_MARK_BEGIN, | 
|  | 431 | AVS1_MARK, AVS2_MARK, A17_MARK, A18_MARK, | 
|  | 432 | A19_MARK, | 
|  | 433 |  | 
|  | 434 | RD_WR_MARK, FWE_MARK, ATAG0_MARK, VI1_R7_MARK, | 
|  | 435 | HRTS1_MARK, RX4_C_MARK, | 
|  | 436 | CS1_A26_MARK, HSPI_TX2_MARK, SDSELF_B_MARK, | 
|  | 437 | CS0_MARK, HSPI_CS2_B_MARK, | 
|  | 438 | CLKOUT_MARK, TX3C_IRDA_TX_C_MARK, PWM0_B_MARK, | 
|  | 439 | A25_MARK, SD1_WP_MARK, MMC0_D5_MARK, FD5_MARK, | 
|  | 440 | HSPI_RX2_MARK, VI1_R3_MARK, TX5_B_MARK, SSI_SDATA7_B_MARK, CTS0_B_MARK, | 
|  | 441 | A24_MARK, SD1_CD_MARK, MMC0_D4_MARK, FD4_MARK, | 
|  | 442 | HSPI_CS2_MARK, VI1_R2_MARK, SSI_WS78_B_MARK, | 
|  | 443 | A23_MARK, FCLE_MARK, HSPI_CLK2_MARK, VI1_R1_MARK, | 
|  | 444 | A22_MARK, RX5_D_MARK, HSPI_RX2_B_MARK, VI1_R0_MARK, | 
|  | 445 | A21_MARK, SCK5_D_MARK, HSPI_CLK2_B_MARK, | 
|  | 446 | A20_MARK, TX5_D_MARK, HSPI_TX2_B_MARK, | 
|  | 447 | A0_MARK, SD1_DAT3_MARK, MMC0_D3_MARK, FD3_MARK, | 
|  | 448 | BS_MARK, SD1_DAT2_MARK, MMC0_D2_MARK, FD2_MARK, | 
|  | 449 | ATADIR0_MARK, SDSELF_MARK, HCTS1_MARK, TX4_C_MARK, | 
|  | 450 | PENC2_MARK, SCK0_MARK, PWM1_MARK, PWMFSW0_MARK, | 
|  | 451 | SCIF_CLK_MARK, TCLK0_C_MARK, | 
|  | 452 |  | 
|  | 453 | EX_CS0_MARK, RX3_C_IRDA_RX_C_MARK, MMC0_D6_MARK, | 
|  | 454 | FD6_MARK, EX_CS1_MARK, MMC0_D7_MARK, FD7_MARK, | 
|  | 455 | EX_CS2_MARK, SD1_CLK_MARK, MMC0_CLK_MARK, FALE_MARK, | 
|  | 456 | ATACS00_MARK, EX_CS3_MARK, SD1_CMD_MARK, MMC0_CMD_MARK, | 
|  | 457 | FRE_MARK, ATACS10_MARK, VI1_R4_MARK, RX5_B_MARK, | 
|  | 458 | HSCK1_MARK, SSI_SDATA8_B_MARK, RTS0_B_TANS_B_MARK, SSI_SDATA9_MARK, | 
|  | 459 | EX_CS4_MARK, SD1_DAT0_MARK, MMC0_D0_MARK, FD0_MARK, | 
|  | 460 | ATARD0_MARK, VI1_R5_MARK, SCK5_B_MARK, HTX1_MARK, | 
|  | 461 | TX2_E_MARK, TX0_B_MARK, SSI_SCK9_MARK, EX_CS5_MARK, | 
|  | 462 | SD1_DAT1_MARK, MMC0_D1_MARK, FD1_MARK, ATAWR0_MARK, | 
|  | 463 | VI1_R6_MARK, HRX1_MARK, RX2_E_MARK, RX0_B_MARK, | 
|  | 464 | SSI_WS9_MARK, MLB_CLK_MARK, PWM2_MARK, SCK4_MARK, | 
|  | 465 | MLB_SIG_MARK, PWM3_MARK, TX4_MARK, MLB_DAT_MARK, | 
|  | 466 | PWM4_MARK, RX4_MARK, HTX0_MARK, TX1_MARK, | 
|  | 467 | SDATA_MARK, CTS0_C_MARK, SUB_TCK_MARK, CC5_STATE2_MARK, | 
|  | 468 | CC5_STATE10_MARK, CC5_STATE18_MARK, CC5_STATE26_MARK, CC5_STATE34_MARK, | 
|  | 469 |  | 
|  | 470 | HRX0_MARK, RX1_MARK, SCKZ_MARK, RTS0_C_TANS_C_MARK, | 
|  | 471 | SUB_TDI_MARK, CC5_STATE3_MARK, CC5_STATE11_MARK, CC5_STATE19_MARK, | 
|  | 472 | CC5_STATE27_MARK, CC5_STATE35_MARK, HSCK0_MARK, SCK1_MARK, | 
|  | 473 | MTS_MARK, PWM5_MARK, SCK0_C_MARK, SSI_SDATA9_B_MARK, | 
|  | 474 | SUB_TDO_MARK, CC5_STATE0_MARK, CC5_STATE8_MARK, CC5_STATE16_MARK, | 
|  | 475 | CC5_STATE24_MARK, CC5_STATE32_MARK, HCTS0_MARK, CTS1_MARK, | 
|  | 476 | STM_MARK, PWM0_D_MARK, RX0_C_MARK, SCIF_CLK_C_MARK, | 
|  | 477 | SUB_TRST_MARK, TCLK1_B_MARK, CC5_OSCOUT_MARK, HRTS0_MARK, | 
|  | 478 | RTS1_TANS_MARK, MDATA_MARK, TX0_C_MARK, SUB_TMS_MARK, | 
|  | 479 | CC5_STATE1_MARK, CC5_STATE9_MARK, CC5_STATE17_MARK, CC5_STATE25_MARK, | 
|  | 480 | CC5_STATE33_MARK, DU0_DR0_MARK, LCDOUT0_MARK, DREQ0_MARK, | 
|  | 481 | GPS_CLK_B_MARK, AUDATA0_MARK, TX5_C_MARK, DU0_DR1_MARK, | 
|  | 482 | LCDOUT1_MARK, DACK0_MARK, DRACK0_MARK, GPS_SIGN_B_MARK, | 
|  | 483 | AUDATA1_MARK, RX5_C_MARK, DU0_DR2_MARK, LCDOUT2_MARK, | 
|  | 484 | DU0_DR3_MARK, LCDOUT3_MARK, DU0_DR4_MARK, LCDOUT4_MARK, | 
|  | 485 | DU0_DR5_MARK, LCDOUT5_MARK, DU0_DR6_MARK, LCDOUT6_MARK, | 
|  | 486 | DU0_DR7_MARK, LCDOUT7_MARK, DU0_DG0_MARK, LCDOUT8_MARK, | 
|  | 487 | DREQ1_MARK, SCL2_MARK, AUDATA2_MARK, | 
|  | 488 |  | 
|  | 489 | DU0_DG1_MARK, LCDOUT9_MARK, DACK1_MARK, SDA2_MARK, | 
|  | 490 | AUDATA3_MARK, DU0_DG2_MARK, LCDOUT10_MARK, DU0_DG3_MARK, | 
|  | 491 | LCDOUT11_MARK, DU0_DG4_MARK, LCDOUT12_MARK, DU0_DG5_MARK, | 
|  | 492 | LCDOUT13_MARK, DU0_DG6_MARK, LCDOUT14_MARK, DU0_DG7_MARK, | 
|  | 493 | LCDOUT15_MARK, DU0_DB0_MARK, LCDOUT16_MARK, EX_WAIT1_MARK, | 
|  | 494 | SCL1_MARK, TCLK1_MARK, AUDATA4_MARK, DU0_DB1_MARK, | 
|  | 495 | LCDOUT17_MARK, EX_WAIT2_MARK, SDA1_MARK, GPS_MAG_B_MARK, | 
|  | 496 | AUDATA5_MARK, SCK5_C_MARK, DU0_DB2_MARK, LCDOUT18_MARK, | 
|  | 497 | DU0_DB3_MARK, LCDOUT19_MARK, DU0_DB4_MARK, LCDOUT20_MARK, | 
|  | 498 | DU0_DB5_MARK, LCDOUT21_MARK, DU0_DB6_MARK, LCDOUT22_MARK, | 
|  | 499 | DU0_DB7_MARK, LCDOUT23_MARK, DU0_DOTCLKIN_MARK, QSTVA_QVS_MARK, | 
|  | 500 | TX3_D_IRDA_TX_D_MARK, SCL3_B_MARK, DU0_DOTCLKOUT0_MARK, QCLK_MARK, | 
|  | 501 | DU0_DOTCLKOUT1_MARK, QSTVB_QVE_MARK, RX3_D_IRDA_RX_D_MARK, SDA3_B_MARK, | 
|  | 502 | SDA2_C_MARK, DACK0_B_MARK, DRACK0_B_MARK, DU0_EXHSYNC_DU0_HSYNC_MARK, | 
|  | 503 | QSTH_QHS_MARK, DU0_EXVSYNC_DU0_VSYNC_MARK, QSTB_QHE_MARK, | 
|  | 504 | DU0_EXODDF_DU0_ODDF_DISP_CDE_MARK, QCPV_QDE_MARK, CAN1_TX_MARK, | 
|  | 505 | TX2_C_MARK, SCL2_C_MARK, REMOCON_MARK, | 
|  | 506 |  | 
|  | 507 | DU0_DISP_MARK, QPOLA_MARK, CAN_CLK_C_MARK, SCK2_C_MARK, | 
|  | 508 | DU0_CDE_MARK, QPOLB_MARK, CAN1_RX_MARK, RX2_C_MARK, | 
|  | 509 | DREQ0_B_MARK, SSI_SCK78_B_MARK, SCK0_B_MARK, DU1_DR0_MARK, | 
|  | 510 | VI2_DATA0_VI2_B0_MARK, PWM6_MARK, SD3_CLK_MARK, TX3_E_IRDA_TX_E_MARK, | 
|  | 511 | AUDCK_MARK, PWMFSW0_B_MARK, DU1_DR1_MARK, VI2_DATA1_VI2_B1_MARK, | 
|  | 512 | PWM0_MARK, SD3_CMD_MARK, RX3_E_IRDA_RX_E_MARK, AUDSYNC_MARK, | 
|  | 513 | CTS0_D_MARK, DU1_DR2_MARK, VI2_G0_MARK, DU1_DR3_MARK, | 
|  | 514 | VI2_G1_MARK, DU1_DR4_MARK, VI2_G2_MARK, DU1_DR5_MARK, | 
|  | 515 | VI2_G3_MARK, DU1_DR6_MARK, VI2_G4_MARK, DU1_DR7_MARK, | 
|  | 516 | VI2_G5_MARK, DU1_DG0_MARK, VI2_DATA2_VI2_B2_MARK, SCL1_B_MARK, | 
|  | 517 | SD3_DAT2_MARK, SCK3_E_MARK, AUDATA6_MARK, TX0_D_MARK, | 
|  | 518 | DU1_DG1_MARK, VI2_DATA3_VI2_B3_MARK, SDA1_B_MARK, SD3_DAT3_MARK, | 
|  | 519 | SCK5_MARK, AUDATA7_MARK, RX0_D_MARK, DU1_DG2_MARK, | 
|  | 520 | VI2_G6_MARK, DU1_DG3_MARK, VI2_G7_MARK, DU1_DG4_MARK, | 
|  | 521 | VI2_R0_MARK, DU1_DG5_MARK, VI2_R1_MARK, DU1_DG6_MARK, | 
|  | 522 | VI2_R2_MARK, DU1_DG7_MARK, VI2_R3_MARK, DU1_DB0_MARK, | 
|  | 523 | VI2_DATA4_VI2_B4_MARK, SCL2_B_MARK, SD3_DAT0_MARK, TX5_MARK, | 
|  | 524 | SCK0_D_MARK, | 
|  | 525 |  | 
|  | 526 | DU1_DB1_MARK, VI2_DATA5_VI2_B5_MARK, SDA2_B_MARK, SD3_DAT1_MARK, | 
|  | 527 | RX5_MARK, RTS0_D_TANS_D_MARK, DU1_DB2_MARK, VI2_R4_MARK, | 
|  | 528 | DU1_DB3_MARK, VI2_R5_MARK, DU1_DB4_MARK, VI2_R6_MARK, | 
|  | 529 | DU1_DB5_MARK, VI2_R7_MARK, DU1_DB6_MARK, SCL2_D_MARK, | 
|  | 530 | DU1_DB7_MARK, SDA2_D_MARK, DU1_DOTCLKIN_MARK, VI2_CLKENB_MARK, | 
|  | 531 | HSPI_CS1_MARK, SCL1_D_MARK, DU1_DOTCLKOUT_MARK, VI2_FIELD_MARK, | 
|  | 532 | SDA1_D_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK, VI2_HSYNC_MARK, | 
|  | 533 | VI3_HSYNC_MARK, DU1_EXVSYNC_DU1_VSYNC_MARK, VI2_VSYNC_MARK, | 
|  | 534 | VI3_VSYNC_MARK, DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK, VI2_CLK_MARK, | 
|  | 535 | TX3_B_IRDA_TX_B_MARK, SD3_CD_MARK, HSPI_TX1_MARK, VI1_CLKENB_MARK, | 
|  | 536 | VI3_CLKENB_MARK, AUDIO_CLKC_MARK, TX2_D_MARK, SPEEDIN_MARK, | 
|  | 537 | GPS_SIGN_D_MARK, DU1_DISP_MARK, VI2_DATA6_VI2_B6_MARK, TCLK0_MARK, | 
|  | 538 | QSTVA_B_QVS_B_MARK, HSPI_CLK1_MARK, SCK2_D_MARK, AUDIO_CLKOUT_B_MARK, | 
|  | 539 | GPS_MAG_D_MARK, DU1_CDE_MARK, VI2_DATA7_VI2_B7_MARK, | 
|  | 540 | RX3_B_IRDA_RX_B_MARK, SD3_WP_MARK, HSPI_RX1_MARK, VI1_FIELD_MARK, | 
|  | 541 | VI3_FIELD_MARK, AUDIO_CLKOUT_MARK, RX2_D_MARK, GPS_CLK_C_MARK, | 
|  | 542 | GPS_CLK_D_MARK, AUDIO_CLKA_MARK, CAN_TXCLK_MARK, AUDIO_CLKB_MARK, | 
|  | 543 | USB_OVC2_MARK, CAN_DEBUGOUT0_MARK, MOUT0_MARK, | 
|  | 544 |  | 
|  | 545 | SSI_SCK0129_MARK, CAN_DEBUGOUT1_MARK, MOUT1_MARK, SSI_WS0129_MARK, | 
|  | 546 | CAN_DEBUGOUT2_MARK, MOUT2_MARK, SSI_SDATA0_MARK, CAN_DEBUGOUT3_MARK, | 
|  | 547 | MOUT5_MARK, SSI_SDATA1_MARK, CAN_DEBUGOUT4_MARK, MOUT6_MARK, | 
|  | 548 | SSI_SDATA2_MARK, CAN_DEBUGOUT5_MARK, SSI_SCK34_MARK, | 
|  | 549 | CAN_DEBUGOUT6_MARK, CAN0_TX_B_MARK, IERX_MARK, SSI_SCK9_C_MARK, | 
|  | 550 | SSI_WS34_MARK, CAN_DEBUGOUT7_MARK, CAN0_RX_B_MARK, IETX_MARK, | 
|  | 551 | SSI_WS9_C_MARK,	SSI_SDATA3_MARK, PWM0_C_MARK, CAN_DEBUGOUT8_MARK, | 
|  | 552 | CAN_CLK_B_MARK,	IECLK_MARK, SCIF_CLK_B_MARK, TCLK0_B_MARK, | 
|  | 553 | SSI_SDATA4_MARK, CAN_DEBUGOUT9_MARK, SSI_SDATA9_C_MARK, SSI_SCK5_MARK, | 
|  | 554 | ADICLK_MARK, CAN_DEBUGOUT10_MARK, SCK3_MARK, TCLK0_D_MARK, | 
|  | 555 | SSI_WS5_MARK, ADICS_SAMP_MARK, CAN_DEBUGOUT11_MARK, TX3_IRDA_TX_MARK, | 
|  | 556 | SSI_SDATA5_MARK, ADIDATA_MARK, CAN_DEBUGOUT12_MARK, RX3_IRDA_RX_MARK, | 
|  | 557 | SSI_SCK6_MARK, ADICHS0_MARK, CAN0_TX_MARK, IERX_B_MARK, | 
|  | 558 |  | 
|  | 559 | SSI_WS6_MARK, ADICHS1_MARK, CAN0_RX_MARK, IETX_B_MARK, | 
|  | 560 | SSI_SDATA6_MARK, ADICHS2_MARK, CAN_CLK_MARK, IECLK_B_MARK, | 
|  | 561 | SSI_SCK78_MARK, CAN_DEBUGOUT13_MARK, IRQ0_B_MARK, SSI_SCK9_B_MARK, | 
|  | 562 | HSPI_CLK1_C_MARK, SSI_WS78_MARK, CAN_DEBUGOUT14_MARK, IRQ1_B_MARK, | 
|  | 563 | SSI_WS9_B_MARK, HSPI_CS1_C_MARK, SSI_SDATA7_MARK, CAN_DEBUGOUT15_MARK, | 
|  | 564 | IRQ2_B_MARK, TCLK1_C_MARK, HSPI_TX1_C_MARK, SSI_SDATA8_MARK, | 
|  | 565 | VSP_MARK, IRQ3_B_MARK, HSPI_RX1_C_MARK, SD0_CLK_MARK, | 
|  | 566 | ATACS01_MARK, SCK1_B_MARK, SD0_CMD_MARK, ATACS11_MARK, | 
|  | 567 | TX1_B_MARK, CC5_TDO_MARK, SD0_DAT0_MARK, ATADIR1_MARK, | 
|  | 568 | RX1_B_MARK, CC5_TRST_MARK, SD0_DAT1_MARK, ATAG1_MARK, | 
|  | 569 | SCK2_B_MARK, CC5_TMS_MARK, SD0_DAT2_MARK, ATARD1_MARK, | 
|  | 570 | TX2_B_MARK, CC5_TCK_MARK, SD0_DAT3_MARK, ATAWR1_MARK, | 
|  | 571 | RX2_B_MARK, CC5_TDI_MARK, SD0_CD_MARK, DREQ2_MARK, | 
|  | 572 | RTS1_B_TANS_B_MARK, SD0_WP_MARK, DACK2_MARK, CTS1_B_MARK, | 
|  | 573 |  | 
|  | 574 | HSPI_CLK0_MARK, CTS0_MARK, USB_OVC0_MARK, AD_CLK_MARK, | 
|  | 575 | CC5_STATE4_MARK, CC5_STATE12_MARK, CC5_STATE20_MARK, CC5_STATE28_MARK, | 
|  | 576 | CC5_STATE36_MARK, HSPI_CS0_MARK, RTS0_TANS_MARK, USB_OVC1_MARK, | 
|  | 577 | AD_DI_MARK, CC5_STATE5_MARK, CC5_STATE13_MARK, CC5_STATE21_MARK, | 
|  | 578 | CC5_STATE29_MARK, CC5_STATE37_MARK, HSPI_TX0_MARK, TX0_MARK, | 
|  | 579 | CAN_DEBUG_HW_TRIGGER_MARK, AD_DO_MARK, CC5_STATE6_MARK, | 
|  | 580 | CC5_STATE14_MARK, CC5_STATE22_MARK, CC5_STATE30_MARK, | 
|  | 581 | CC5_STATE38_MARK, HSPI_RX0_MARK, RX0_MARK, CAN_STEP0_MARK, | 
|  | 582 | AD_NCS_MARK, CC5_STATE7_MARK, CC5_STATE15_MARK, CC5_STATE23_MARK, | 
|  | 583 | CC5_STATE31_MARK, CC5_STATE39_MARK, FMCLK_MARK, RDS_CLK_MARK, | 
|  | 584 | PCMOE_MARK, BPFCLK_MARK, PCMWE_MARK, FMIN_MARK, RDS_DATA_MARK, | 
|  | 585 | VI0_CLK_MARK, MMC1_CLK_MARK, VI0_CLKENB_MARK, TX1_C_MARK, HTX1_B_MARK, | 
|  | 586 | MT1_SYNC_MARK, VI0_FIELD_MARK, RX1_C_MARK, HRX1_B_MARK, | 
|  | 587 | VI0_HSYNC_MARK, VI0_DATA0_B_VI0_B0_B_MARK, CTS1_C_MARK, TX4_D_MARK, | 
|  | 588 | MMC1_CMD_MARK, HSCK1_B_MARK, VI0_VSYNC_MARK, VI0_DATA1_B_VI0_B1_B_MARK, | 
|  | 589 | RTS1_C_TANS_C_MARK, RX4_D_MARK, PWMFSW0_C_MARK, | 
|  | 590 |  | 
|  | 591 | VI0_DATA0_VI0_B0_MARK, HRTS1_B_MARK, MT1_VCXO_MARK, | 
|  | 592 | VI0_DATA1_VI0_B1_MARK, HCTS1_B_MARK, MT1_PWM_MARK, | 
|  | 593 | VI0_DATA2_VI0_B2_MARK, MMC1_D0_MARK, VI0_DATA3_VI0_B3_MARK, | 
|  | 594 | MMC1_D1_MARK, VI0_DATA4_VI0_B4_MARK, MMC1_D2_MARK, | 
|  | 595 | VI0_DATA5_VI0_B5_MARK, MMC1_D3_MARK, VI0_DATA6_VI0_B6_MARK, | 
|  | 596 | MMC1_D4_MARK, ARM_TRACEDATA_0_MARK, VI0_DATA7_VI0_B7_MARK, | 
|  | 597 | MMC1_D5_MARK, ARM_TRACEDATA_1_MARK, VI0_G0_MARK, SSI_SCK78_C_MARK, | 
|  | 598 | IRQ0_MARK, ARM_TRACEDATA_2_MARK, VI0_G1_MARK, SSI_WS78_C_MARK, | 
|  | 599 | IRQ1_MARK, ARM_TRACEDATA_3_MARK, VI0_G2_MARK, ETH_TXD1_MARK, | 
|  | 600 | MMC1_D6_MARK, ARM_TRACEDATA_4_MARK, TS_SPSYNC0_MARK, VI0_G3_MARK, | 
|  | 601 | ETH_CRS_DV_MARK, MMC1_D7_MARK, ARM_TRACEDATA_5_MARK, TS_SDAT0_MARK, | 
|  | 602 | VI0_G4_MARK, ETH_TX_EN_MARK, SD2_DAT0_B_MARK, ARM_TRACEDATA_6_MARK, | 
|  | 603 | VI0_G5_MARK, ETH_RX_ER_MARK, SD2_DAT1_B_MARK, ARM_TRACEDATA_7_MARK, | 
|  | 604 | VI0_G6_MARK, ETH_RXD0_MARK, SD2_DAT2_B_MARK, ARM_TRACEDATA_8_MARK, | 
|  | 605 | VI0_G7_MARK, ETH_RXD1_MARK, SD2_DAT3_B_MARK, ARM_TRACEDATA_9_MARK, | 
|  | 606 |  | 
|  | 607 | VI0_R0_MARK, SSI_SDATA7_C_MARK, SCK1_C_MARK, DREQ1_B_MARK, | 
|  | 608 | ARM_TRACEDATA_10_MARK, DREQ0_C_MARK, VI0_R1_MARK, SSI_SDATA8_C_MARK, | 
|  | 609 | DACK1_B_MARK, ARM_TRACEDATA_11_MARK, DACK0_C_MARK, DRACK0_C_MARK, | 
|  | 610 | VI0_R2_MARK, ETH_LINK_MARK, SD2_CLK_B_MARK, IRQ2_MARK, | 
|  | 611 | ARM_TRACEDATA_12_MARK, VI0_R3_MARK, ETH_MAGIC_MARK, SD2_CMD_B_MARK, | 
|  | 612 | IRQ3_MARK, ARM_TRACEDATA_13_MARK, VI0_R4_MARK, ETH_REFCLK_MARK, | 
|  | 613 | SD2_CD_B_MARK, HSPI_CLK1_B_MARK, ARM_TRACEDATA_14_MARK, MT1_CLK_MARK, | 
|  | 614 | TS_SCK0_MARK, VI0_R5_MARK, ETH_TXD0_MARK, SD2_WP_B_MARK, | 
|  | 615 | HSPI_CS1_B_MARK, ARM_TRACEDATA_15_MARK, MT1_D_MARK, TS_SDEN0_MARK, | 
|  | 616 | VI0_R6_MARK, ETH_MDC_MARK, DREQ2_C_MARK, HSPI_TX1_B_MARK, | 
|  | 617 | TRACECLK_MARK, MT1_BEN_MARK, PWMFSW0_D_MARK, VI0_R7_MARK, | 
|  | 618 | ETH_MDIO_MARK, DACK2_C_MARK, HSPI_RX1_B_MARK, SCIF_CLK_D_MARK, | 
|  | 619 | TRACECTL_MARK, MT1_PEN_MARK, VI1_CLK_MARK, SIM_D_MARK, SDA3_MARK, | 
|  | 620 | VI1_HSYNC_MARK, VI3_CLK_MARK, SSI_SCK4_MARK, GPS_SIGN_C_MARK, | 
|  | 621 | PWMFSW0_E_MARK, VI1_VSYNC_MARK, AUDIO_CLKOUT_C_MARK, SSI_WS4_MARK, | 
|  | 622 | SIM_CLK_MARK, GPS_MAG_C_MARK, SPV_TRST_MARK, SCL3_MARK, | 
|  | 623 |  | 
|  | 624 | VI1_DATA0_VI1_B0_MARK, SD2_DAT0_MARK, SIM_RST_MARK, SPV_TCK_MARK, | 
|  | 625 | ADICLK_B_MARK, VI1_DATA1_VI1_B1_MARK, SD2_DAT1_MARK, MT0_CLK_MARK, | 
|  | 626 | SPV_TMS_MARK, ADICS_B_SAMP_B_MARK, VI1_DATA2_VI1_B2_MARK, | 
|  | 627 | SD2_DAT2_MARK, MT0_D_MARK, SPVTDI_MARK, ADIDATA_B_MARK, | 
|  | 628 | VI1_DATA3_VI1_B3_MARK, SD2_DAT3_MARK, MT0_BEN_MARK, SPV_TDO_MARK, | 
|  | 629 | ADICHS0_B_MARK,	VI1_DATA4_VI1_B4_MARK, SD2_CLK_MARK, MT0_PEN_MARK, | 
|  | 630 | SPA_TRST_MARK, HSPI_CLK1_D_MARK, ADICHS1_B_MARK, | 
|  | 631 | VI1_DATA5_VI1_B5_MARK, SD2_CMD_MARK, MT0_SYNC_MARK, SPA_TCK_MARK, | 
|  | 632 | HSPI_CS1_D_MARK, ADICHS2_B_MARK, VI1_DATA6_VI1_B6_MARK, SD2_CD_MARK, | 
|  | 633 | MT0_VCXO_MARK, SPA_TMS_MARK, HSPI_TX1_D_MARK, VI1_DATA7_VI1_B7_MARK, | 
|  | 634 | SD2_WP_MARK, MT0_PWM_MARK, SPA_TDI_MARK, HSPI_RX1_D_MARK, | 
|  | 635 | VI1_G0_MARK, VI3_DATA0_MARK, DU1_DOTCLKOUT1_MARK, TS_SCK1_MARK, | 
|  | 636 | DREQ2_B_MARK, TX2_MARK,	SPA_TDO_MARK, HCTS0_B_MARK, | 
|  | 637 | VI1_G1_MARK, VI3_DATA1_MARK, SSI_SCK1_MARK, TS_SDEN1_MARK, | 
|  | 638 | DACK2_B_MARK, RX2_MARK, HRTS0_B_MARK, | 
|  | 639 |  | 
|  | 640 | VI1_G2_MARK, VI3_DATA2_MARK, SSI_WS1_MARK, TS_SPSYNC1_MARK, | 
|  | 641 | SCK2_MARK, HSCK0_B_MARK, VI1_G3_MARK, VI3_DATA3_MARK, | 
|  | 642 | SSI_SCK2_MARK, TS_SDAT1_MARK, SCL1_C_MARK, HTX0_B_MARK, | 
|  | 643 | VI1_G4_MARK, VI3_DATA4_MARK, SSI_WS2_MARK, SDA1_C_MARK, | 
|  | 644 | SIM_RST_B_MARK, HRX0_B_MARK, VI1_G5_MARK, VI3_DATA5_MARK, | 
|  | 645 | GPS_CLK_MARK, FSE_MARK, TX4_B_MARK, SIM_D_B_MARK, | 
|  | 646 | VI1_G6_MARK, VI3_DATA6_MARK, GPS_SIGN_MARK, FRB_MARK, | 
|  | 647 | RX4_B_MARK, SIM_CLK_B_MARK, VI1_G7_MARK, VI3_DATA7_MARK, | 
|  | 648 | GPS_MAG_MARK, FCE_MARK, SCK4_B_MARK, | 
|  | 649 | PINMUX_MARK_END, | 
| Magnus Damm | 19c43fc | 2011-12-14 01:36:22 +0900 | [diff] [blame] | 650 | }; | 
|  | 651 |  | 
|  | 652 | static pinmux_enum_t pinmux_data[] = { | 
|  | 653 | PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */ | 
| Magnus Damm | 2ecba2c | 2011-12-14 01:36:32 +0900 | [diff] [blame] | 654 |  | 
|  | 655 | PINMUX_DATA(AVS1_MARK, FN_AVS1), | 
|  | 656 | PINMUX_DATA(AVS1_MARK, FN_AVS1), | 
|  | 657 | PINMUX_DATA(A17_MARK, FN_A17), | 
|  | 658 | PINMUX_DATA(A18_MARK, FN_A18), | 
|  | 659 | PINMUX_DATA(A19_MARK, FN_A19), | 
|  | 660 |  | 
|  | 661 | PINMUX_IPSR_DATA(IP0_2_0, PENC2), | 
|  | 662 | PINMUX_IPSR_MODSEL_DATA(IP0_2_0, SCK0, SEL_SCIF0_0), | 
|  | 663 | PINMUX_IPSR_DATA(IP0_2_0, PWM1), | 
|  | 664 | PINMUX_IPSR_MODSEL_DATA(IP0_2_0, PWMFSW0, SEL_PWMFSW_0), | 
|  | 665 | PINMUX_IPSR_MODSEL_DATA(IP0_2_0, SCIF_CLK, SEL_SCIF_0), | 
|  | 666 | PINMUX_IPSR_MODSEL_DATA(IP0_2_0, TCLK0_C, SEL_TMU0_2), | 
|  | 667 | PINMUX_IPSR_DATA(IP0_5_3, BS), | 
|  | 668 | PINMUX_IPSR_DATA(IP0_5_3, SD1_DAT2), | 
|  | 669 | PINMUX_IPSR_DATA(IP0_5_3, MMC0_D2), | 
|  | 670 | PINMUX_IPSR_DATA(IP0_5_3, FD2), | 
|  | 671 | PINMUX_IPSR_DATA(IP0_5_3, ATADIR0), | 
|  | 672 | PINMUX_IPSR_DATA(IP0_5_3, SDSELF), | 
|  | 673 | PINMUX_IPSR_MODSEL_DATA(IP0_5_3, HCTS1, SEL_HSCIF1_0), | 
|  | 674 | PINMUX_IPSR_DATA(IP0_5_3, TX4_C), | 
|  | 675 | PINMUX_IPSR_DATA(IP0_7_6, A0), | 
|  | 676 | PINMUX_IPSR_DATA(IP0_7_6, SD1_DAT3), | 
|  | 677 | PINMUX_IPSR_DATA(IP0_7_6, MMC0_D3), | 
|  | 678 | PINMUX_IPSR_DATA(IP0_7_6, FD3), | 
|  | 679 | PINMUX_IPSR_DATA(IP0_9_8, A20), | 
|  | 680 | PINMUX_IPSR_DATA(IP0_9_8, TX5_D), | 
|  | 681 | PINMUX_IPSR_DATA(IP0_9_8, HSPI_TX2_B), | 
|  | 682 | PINMUX_IPSR_DATA(IP0_11_10, A21), | 
|  | 683 | PINMUX_IPSR_MODSEL_DATA(IP0_11_10, SCK5_D, SEL_SCIF5_3), | 
|  | 684 | PINMUX_IPSR_MODSEL_DATA(IP0_11_10, HSPI_CLK2_B, SEL_HSPI2_1), | 
|  | 685 | PINMUX_IPSR_DATA(IP0_13_12, A22), | 
|  | 686 | PINMUX_IPSR_MODSEL_DATA(IP0_13_12, RX5_D, SEL_SCIF5_3), | 
|  | 687 | PINMUX_IPSR_MODSEL_DATA(IP0_13_12, HSPI_RX2_B, SEL_HSPI2_1), | 
|  | 688 | PINMUX_IPSR_DATA(IP0_13_12, VI1_R0), | 
|  | 689 | PINMUX_IPSR_DATA(IP0_15_14, A23), | 
|  | 690 | PINMUX_IPSR_DATA(IP0_15_14, FCLE), | 
|  | 691 | PINMUX_IPSR_MODSEL_DATA(IP0_15_14, HSPI_CLK2, SEL_HSPI2_0), | 
|  | 692 | PINMUX_IPSR_DATA(IP0_15_14, VI1_R1), | 
|  | 693 | PINMUX_IPSR_DATA(IP0_18_16, A24), | 
|  | 694 | PINMUX_IPSR_DATA(IP0_18_16, SD1_CD), | 
|  | 695 | PINMUX_IPSR_DATA(IP0_18_16, MMC0_D4), | 
|  | 696 | PINMUX_IPSR_DATA(IP0_18_16, FD4), | 
|  | 697 | PINMUX_IPSR_MODSEL_DATA(IP0_18_16, HSPI_CS2, SEL_HSPI2_0), | 
|  | 698 | PINMUX_IPSR_DATA(IP0_18_16, VI1_R2), | 
|  | 699 | PINMUX_IPSR_MODSEL_DATA(IP0_18_16, SSI_WS78_B, SEL_SSI7_1), | 
|  | 700 | PINMUX_IPSR_DATA(IP0_22_19, A25), | 
|  | 701 | PINMUX_IPSR_DATA(IP0_22_19, SD1_WP), | 
|  | 702 | PINMUX_IPSR_DATA(IP0_22_19, MMC0_D5), | 
|  | 703 | PINMUX_IPSR_DATA(IP0_22_19, FD5), | 
|  | 704 | PINMUX_IPSR_MODSEL_DATA(IP0_22_19, HSPI_RX2, SEL_HSPI2_0), | 
|  | 705 | PINMUX_IPSR_DATA(IP0_22_19, VI1_R3), | 
|  | 706 | PINMUX_IPSR_DATA(IP0_22_19, TX5_B), | 
|  | 707 | PINMUX_IPSR_MODSEL_DATA(IP0_22_19, SSI_SDATA7_B, SEL_SSI7_1), | 
|  | 708 | PINMUX_IPSR_MODSEL_DATA(IP0_22_19, CTS0_B, SEL_SCIF0_1), | 
|  | 709 | PINMUX_IPSR_DATA(IP0_24_23, CLKOUT), | 
|  | 710 | PINMUX_IPSR_DATA(IP0_24_23, TX3C_IRDA_TX_C), | 
|  | 711 | PINMUX_IPSR_DATA(IP0_24_23, PWM0_B), | 
|  | 712 | PINMUX_IPSR_DATA(IP0_25, CS0), | 
|  | 713 | PINMUX_IPSR_MODSEL_DATA(IP0_25, HSPI_CS2_B, SEL_HSPI2_1), | 
|  | 714 | PINMUX_IPSR_DATA(IP0_27_26, CS1_A26), | 
|  | 715 | PINMUX_IPSR_DATA(IP0_27_26, HSPI_TX2), | 
|  | 716 | PINMUX_IPSR_DATA(IP0_27_26, SDSELF_B), | 
|  | 717 | PINMUX_IPSR_DATA(IP0_30_28, RD_WR), | 
|  | 718 | PINMUX_IPSR_DATA(IP0_30_28, FWE), | 
|  | 719 | PINMUX_IPSR_DATA(IP0_30_28, ATAG0), | 
|  | 720 | PINMUX_IPSR_DATA(IP0_30_28, VI1_R7), | 
|  | 721 | PINMUX_IPSR_MODSEL_DATA(IP0_30_28, HRTS1, SEL_HSCIF1_0), | 
|  | 722 | PINMUX_IPSR_MODSEL_DATA(IP0_30_28, RX4_C, SEL_SCIF4_2), | 
|  | 723 |  | 
|  | 724 | PINMUX_IPSR_DATA(IP1_1_0, EX_CS0), | 
|  | 725 | PINMUX_IPSR_MODSEL_DATA(IP1_1_0, RX3_C_IRDA_RX_C, SEL_SCIF3_2), | 
|  | 726 | PINMUX_IPSR_DATA(IP1_1_0, MMC0_D6), | 
|  | 727 | PINMUX_IPSR_DATA(IP1_1_0, FD6), | 
|  | 728 | PINMUX_IPSR_DATA(IP1_3_2, EX_CS1), | 
|  | 729 | PINMUX_IPSR_DATA(IP1_3_2, MMC0_D7), | 
|  | 730 | PINMUX_IPSR_DATA(IP1_3_2, FD7), | 
|  | 731 | PINMUX_IPSR_DATA(IP1_6_4, EX_CS2), | 
|  | 732 | PINMUX_IPSR_DATA(IP1_6_4, SD1_CLK), | 
|  | 733 | PINMUX_IPSR_DATA(IP1_6_4, MMC0_CLK), | 
|  | 734 | PINMUX_IPSR_DATA(IP1_6_4, FALE), | 
|  | 735 | PINMUX_IPSR_DATA(IP1_6_4, ATACS00), | 
|  | 736 | PINMUX_IPSR_DATA(IP1_10_7, EX_CS3), | 
|  | 737 | PINMUX_IPSR_DATA(IP1_10_7, SD1_CMD), | 
|  | 738 | PINMUX_IPSR_DATA(IP1_10_7, MMC0_CMD), | 
|  | 739 | PINMUX_IPSR_DATA(IP1_10_7, FRE), | 
|  | 740 | PINMUX_IPSR_DATA(IP1_10_7, ATACS10), | 
|  | 741 | PINMUX_IPSR_DATA(IP1_10_7, VI1_R4), | 
|  | 742 | PINMUX_IPSR_MODSEL_DATA(IP1_10_7, RX5_B, SEL_SCIF5_1), | 
|  | 743 | PINMUX_IPSR_MODSEL_DATA(IP1_10_7, HSCK1, SEL_HSCIF1_0), | 
|  | 744 | PINMUX_IPSR_MODSEL_DATA(IP1_10_7, SSI_SDATA8_B, SEL_SSI8_1), | 
|  | 745 | PINMUX_IPSR_MODSEL_DATA(IP1_10_7, RTS0_B_TANS_B, SEL_SCIF0_1), | 
|  | 746 | PINMUX_IPSR_MODSEL_DATA(IP1_10_7, SSI_SDATA9, SEL_SSI9_0), | 
|  | 747 | PINMUX_IPSR_DATA(IP1_14_11, EX_CS4), | 
|  | 748 | PINMUX_IPSR_DATA(IP1_14_11, SD1_DAT0), | 
|  | 749 | PINMUX_IPSR_DATA(IP1_14_11, MMC0_D0), | 
|  | 750 | PINMUX_IPSR_DATA(IP1_14_11, FD0), | 
|  | 751 | PINMUX_IPSR_DATA(IP1_14_11, ATARD0), | 
|  | 752 | PINMUX_IPSR_DATA(IP1_14_11, VI1_R5), | 
|  | 753 | PINMUX_IPSR_MODSEL_DATA(IP1_14_11, SCK5_B, SEL_SCIF5_1), | 
|  | 754 | PINMUX_IPSR_DATA(IP1_14_11, HTX1), | 
|  | 755 | PINMUX_IPSR_DATA(IP1_14_11, TX2_E), | 
|  | 756 | PINMUX_IPSR_DATA(IP1_14_11, TX0_B), | 
|  | 757 | PINMUX_IPSR_MODSEL_DATA(IP1_14_11, SSI_SCK9, SEL_SSI9_0), | 
|  | 758 | PINMUX_IPSR_DATA(IP1_18_15, EX_CS5), | 
|  | 759 | PINMUX_IPSR_DATA(IP1_18_15, SD1_DAT1), | 
|  | 760 | PINMUX_IPSR_DATA(IP1_18_15, MMC0_D1), | 
|  | 761 | PINMUX_IPSR_DATA(IP1_18_15, FD1), | 
|  | 762 | PINMUX_IPSR_DATA(IP1_18_15, ATAWR0), | 
|  | 763 | PINMUX_IPSR_DATA(IP1_18_15, VI1_R6), | 
|  | 764 | PINMUX_IPSR_MODSEL_DATA(IP1_18_15, HRX1, SEL_HSCIF1_0), | 
|  | 765 | PINMUX_IPSR_MODSEL_DATA(IP1_18_15, RX2_E, SEL_SCIF2_4), | 
|  | 766 | PINMUX_IPSR_MODSEL_DATA(IP1_18_15, RX0_B, SEL_SCIF0_1), | 
|  | 767 | PINMUX_IPSR_MODSEL_DATA(IP1_18_15, SSI_WS9, SEL_SSI9_0), | 
|  | 768 | PINMUX_IPSR_DATA(IP1_20_19, MLB_CLK), | 
|  | 769 | PINMUX_IPSR_DATA(IP1_20_19, PWM2), | 
|  | 770 | PINMUX_IPSR_MODSEL_DATA(IP1_20_19, SCK4, SEL_SCIF4_0), | 
|  | 771 | PINMUX_IPSR_DATA(IP1_22_21, MLB_SIG), | 
|  | 772 | PINMUX_IPSR_DATA(IP1_22_21, PWM3), | 
|  | 773 | PINMUX_IPSR_DATA(IP1_22_21, TX4), | 
|  | 774 | PINMUX_IPSR_DATA(IP1_24_23, MLB_DAT), | 
|  | 775 | PINMUX_IPSR_DATA(IP1_24_23, PWM4), | 
|  | 776 | PINMUX_IPSR_MODSEL_DATA(IP1_24_23, RX4, SEL_SCIF4_0), | 
|  | 777 | PINMUX_IPSR_DATA(IP1_28_25, HTX0), | 
|  | 778 | PINMUX_IPSR_DATA(IP1_28_25, TX1), | 
|  | 779 | PINMUX_IPSR_DATA(IP1_28_25, SDATA), | 
|  | 780 | PINMUX_IPSR_MODSEL_DATA(IP1_28_25, CTS0_C, SEL_SCIF0_2), | 
|  | 781 | PINMUX_IPSR_DATA(IP1_28_25, SUB_TCK), | 
|  | 782 | PINMUX_IPSR_DATA(IP1_28_25, CC5_STATE2), | 
|  | 783 | PINMUX_IPSR_DATA(IP1_28_25, CC5_STATE10), | 
|  | 784 | PINMUX_IPSR_DATA(IP1_28_25, CC5_STATE18), | 
|  | 785 | PINMUX_IPSR_DATA(IP1_28_25, CC5_STATE26), | 
|  | 786 | PINMUX_IPSR_DATA(IP1_28_25, CC5_STATE34), | 
|  | 787 |  | 
|  | 788 | PINMUX_IPSR_MODSEL_DATA(IP2_3_0, HRX0, SEL_HSCIF0_0), | 
|  | 789 | PINMUX_IPSR_MODSEL_DATA(IP2_3_0, RX1, SEL_SCIF1_0), | 
|  | 790 | PINMUX_IPSR_DATA(IP2_3_0, SCKZ), | 
|  | 791 | PINMUX_IPSR_MODSEL_DATA(IP2_3_0, RTS0_C_TANS_C, SEL_SCIF0_2), | 
|  | 792 | PINMUX_IPSR_DATA(IP2_3_0, SUB_TDI), | 
|  | 793 | PINMUX_IPSR_DATA(IP2_3_0, CC5_STATE3), | 
|  | 794 | PINMUX_IPSR_DATA(IP2_3_0, CC5_STATE11), | 
|  | 795 | PINMUX_IPSR_DATA(IP2_3_0, CC5_STATE19), | 
|  | 796 | PINMUX_IPSR_DATA(IP2_3_0, CC5_STATE27), | 
|  | 797 | PINMUX_IPSR_DATA(IP2_3_0, CC5_STATE35), | 
|  | 798 | PINMUX_IPSR_MODSEL_DATA(IP2_7_4, HSCK0, SEL_HSCIF0_0), | 
|  | 799 | PINMUX_IPSR_MODSEL_DATA(IP2_7_4, SCK1, SEL_SCIF1_0), | 
|  | 800 | PINMUX_IPSR_DATA(IP2_7_4, MTS), | 
|  | 801 | PINMUX_IPSR_DATA(IP2_7_4, PWM5), | 
|  | 802 | PINMUX_IPSR_MODSEL_DATA(IP2_7_4, SCK0_C, SEL_SCIF0_2), | 
|  | 803 | PINMUX_IPSR_MODSEL_DATA(IP2_7_4, SSI_SDATA9_B, SEL_SSI9_1), | 
|  | 804 | PINMUX_IPSR_DATA(IP2_7_4, SUB_TDO), | 
|  | 805 | PINMUX_IPSR_DATA(IP2_7_4, CC5_STATE0), | 
|  | 806 | PINMUX_IPSR_DATA(IP2_7_4, CC5_STATE8), | 
|  | 807 | PINMUX_IPSR_DATA(IP2_7_4, CC5_STATE16), | 
|  | 808 | PINMUX_IPSR_DATA(IP2_7_4, CC5_STATE24), | 
|  | 809 | PINMUX_IPSR_DATA(IP2_7_4, CC5_STATE32), | 
|  | 810 | PINMUX_IPSR_MODSEL_DATA(IP2_11_8, HCTS0, SEL_HSCIF0_0), | 
|  | 811 | PINMUX_IPSR_MODSEL_DATA(IP2_11_8, CTS1, SEL_SCIF1_0), | 
|  | 812 | PINMUX_IPSR_DATA(IP2_11_8, STM), | 
|  | 813 | PINMUX_IPSR_DATA(IP2_11_8, PWM0_D), | 
|  | 814 | PINMUX_IPSR_MODSEL_DATA(IP2_11_8, RX0_C, SEL_SCIF0_2), | 
|  | 815 | PINMUX_IPSR_MODSEL_DATA(IP2_11_8, SCIF_CLK_C, SEL_SCIF_2), | 
|  | 816 | PINMUX_IPSR_DATA(IP2_11_8, SUB_TRST), | 
|  | 817 | PINMUX_IPSR_MODSEL_DATA(IP2_11_8, TCLK1_B, SEL_TMU1_1), | 
|  | 818 | PINMUX_IPSR_DATA(IP2_11_8, CC5_OSCOUT), | 
|  | 819 | PINMUX_IPSR_MODSEL_DATA(IP2_15_12, HRTS0, SEL_HSCIF0_0), | 
|  | 820 | PINMUX_IPSR_MODSEL_DATA(IP2_15_12, RTS1_TANS, SEL_SCIF1_0), | 
|  | 821 | PINMUX_IPSR_DATA(IP2_15_12, MDATA), | 
|  | 822 | PINMUX_IPSR_DATA(IP2_15_12, TX0_C), | 
|  | 823 | PINMUX_IPSR_DATA(IP2_15_12, SUB_TMS), | 
|  | 824 | PINMUX_IPSR_DATA(IP2_15_12, CC5_STATE1), | 
|  | 825 | PINMUX_IPSR_DATA(IP2_15_12, CC5_STATE9), | 
|  | 826 | PINMUX_IPSR_DATA(IP2_15_12, CC5_STATE17), | 
|  | 827 | PINMUX_IPSR_DATA(IP2_15_12, CC5_STATE25), | 
|  | 828 | PINMUX_IPSR_DATA(IP2_15_12, CC5_STATE33), | 
|  | 829 | PINMUX_IPSR_DATA(IP2_18_16, DU0_DR0), | 
|  | 830 | PINMUX_IPSR_DATA(IP2_18_16, LCDOUT0), | 
|  | 831 | PINMUX_IPSR_MODSEL_DATA(IP2_18_16, DREQ0, SEL_EXBUS0_0), | 
|  | 832 | PINMUX_IPSR_MODSEL_DATA(IP2_18_16, GPS_CLK_B, SEL_GPS_1), | 
|  | 833 | PINMUX_IPSR_DATA(IP2_18_16, AUDATA0), | 
|  | 834 | PINMUX_IPSR_DATA(IP2_18_16, TX5_C), | 
|  | 835 | PINMUX_IPSR_DATA(IP2_21_19, DU0_DR1), | 
|  | 836 | PINMUX_IPSR_DATA(IP2_21_19, LCDOUT1), | 
|  | 837 | PINMUX_IPSR_DATA(IP2_21_19, DACK0), | 
|  | 838 | PINMUX_IPSR_DATA(IP2_21_19, DRACK0), | 
|  | 839 | PINMUX_IPSR_MODSEL_DATA(IP2_21_19, GPS_SIGN_B, SEL_GPS_1), | 
|  | 840 | PINMUX_IPSR_DATA(IP2_21_19, AUDATA1), | 
|  | 841 | PINMUX_IPSR_MODSEL_DATA(IP2_21_19, RX5_C, SEL_SCIF5_2), | 
|  | 842 | PINMUX_IPSR_DATA(IP2_22, DU0_DR2), | 
|  | 843 | PINMUX_IPSR_DATA(IP2_22, LCDOUT2), | 
|  | 844 | PINMUX_IPSR_DATA(IP2_23, DU0_DR3), | 
|  | 845 | PINMUX_IPSR_DATA(IP2_23, LCDOUT3), | 
|  | 846 | PINMUX_IPSR_DATA(IP2_24, DU0_DR4), | 
|  | 847 | PINMUX_IPSR_DATA(IP2_24, LCDOUT4), | 
|  | 848 | PINMUX_IPSR_DATA(IP2_25, DU0_DR5), | 
|  | 849 | PINMUX_IPSR_DATA(IP2_25, LCDOUT5), | 
|  | 850 | PINMUX_IPSR_DATA(IP2_26, DU0_DR6), | 
|  | 851 | PINMUX_IPSR_DATA(IP2_26, LCDOUT6), | 
|  | 852 | PINMUX_IPSR_DATA(IP2_27, DU0_DR7), | 
|  | 853 | PINMUX_IPSR_DATA(IP2_27, LCDOUT7), | 
|  | 854 | PINMUX_IPSR_DATA(IP2_30_28, DU0_DG0), | 
|  | 855 | PINMUX_IPSR_DATA(IP2_30_28, LCDOUT8), | 
|  | 856 | PINMUX_IPSR_MODSEL_DATA(IP2_30_28, DREQ1, SEL_EXBUS1_0), | 
|  | 857 | PINMUX_IPSR_MODSEL_DATA(IP2_30_28, SCL2, SEL_I2C2_0), | 
|  | 858 | PINMUX_IPSR_DATA(IP2_30_28, AUDATA2), | 
|  | 859 |  | 
|  | 860 | PINMUX_IPSR_DATA(IP3_2_0, DU0_DG1), | 
|  | 861 | PINMUX_IPSR_DATA(IP3_2_0, LCDOUT9), | 
|  | 862 | PINMUX_IPSR_DATA(IP3_2_0, DACK1), | 
|  | 863 | PINMUX_IPSR_MODSEL_DATA(IP3_2_0, SDA2, SEL_I2C2_0), | 
|  | 864 | PINMUX_IPSR_DATA(IP3_2_0, AUDATA3), | 
|  | 865 | PINMUX_IPSR_DATA(IP3_3, DU0_DG2), | 
|  | 866 | PINMUX_IPSR_DATA(IP3_3, LCDOUT10), | 
|  | 867 | PINMUX_IPSR_DATA(IP3_4, DU0_DG3), | 
|  | 868 | PINMUX_IPSR_DATA(IP3_4, LCDOUT11), | 
|  | 869 | PINMUX_IPSR_DATA(IP3_5, DU0_DG4), | 
|  | 870 | PINMUX_IPSR_DATA(IP3_5, LCDOUT12), | 
|  | 871 | PINMUX_IPSR_DATA(IP3_6, DU0_DG5), | 
|  | 872 | PINMUX_IPSR_DATA(IP3_6, LCDOUT13), | 
|  | 873 | PINMUX_IPSR_DATA(IP3_7, DU0_DG6), | 
|  | 874 | PINMUX_IPSR_DATA(IP3_7, LCDOUT14), | 
|  | 875 | PINMUX_IPSR_DATA(IP3_8, DU0_DG7), | 
|  | 876 | PINMUX_IPSR_DATA(IP3_8, LCDOUT15), | 
|  | 877 | PINMUX_IPSR_DATA(IP3_11_9, DU0_DB0), | 
|  | 878 | PINMUX_IPSR_DATA(IP3_11_9, LCDOUT16), | 
|  | 879 | PINMUX_IPSR_DATA(IP3_11_9, EX_WAIT1), | 
|  | 880 | PINMUX_IPSR_MODSEL_DATA(IP3_11_9, SCL1, SEL_I2C1_0), | 
|  | 881 | PINMUX_IPSR_MODSEL_DATA(IP3_11_9, TCLK1, SEL_TMU1_0), | 
|  | 882 | PINMUX_IPSR_DATA(IP3_11_9, AUDATA4), | 
|  | 883 | PINMUX_IPSR_DATA(IP3_14_12, DU0_DB1), | 
|  | 884 | PINMUX_IPSR_DATA(IP3_14_12, LCDOUT17), | 
|  | 885 | PINMUX_IPSR_DATA(IP3_14_12, EX_WAIT2), | 
|  | 886 | PINMUX_IPSR_MODSEL_DATA(IP3_14_12, SDA1, SEL_I2C1_0), | 
|  | 887 | PINMUX_IPSR_MODSEL_DATA(IP3_14_12, GPS_MAG_B, SEL_GPS_1), | 
|  | 888 | PINMUX_IPSR_DATA(IP3_14_12, AUDATA5), | 
|  | 889 | PINMUX_IPSR_MODSEL_DATA(IP3_14_12, SCK5_C, SEL_SCIF5_2), | 
|  | 890 | PINMUX_IPSR_DATA(IP3_15, DU0_DB2), | 
|  | 891 | PINMUX_IPSR_DATA(IP3_15, LCDOUT18), | 
|  | 892 | PINMUX_IPSR_DATA(IP3_16, DU0_DB3), | 
|  | 893 | PINMUX_IPSR_DATA(IP3_16, LCDOUT19), | 
|  | 894 | PINMUX_IPSR_DATA(IP3_17, DU0_DB4), | 
|  | 895 | PINMUX_IPSR_DATA(IP3_17, LCDOUT20), | 
|  | 896 | PINMUX_IPSR_DATA(IP3_18, DU0_DB5), | 
|  | 897 | PINMUX_IPSR_DATA(IP3_18, LCDOUT21), | 
|  | 898 | PINMUX_IPSR_DATA(IP3_19, DU0_DB6), | 
|  | 899 | PINMUX_IPSR_DATA(IP3_19, LCDOUT22), | 
|  | 900 | PINMUX_IPSR_DATA(IP3_20, DU0_DB7), | 
|  | 901 | PINMUX_IPSR_DATA(IP3_20, LCDOUT23), | 
|  | 902 | PINMUX_IPSR_DATA(IP3_22_21, DU0_DOTCLKIN), | 
|  | 903 | PINMUX_IPSR_DATA(IP3_22_21, QSTVA_QVS), | 
|  | 904 | PINMUX_IPSR_DATA(IP3_22_21, TX3_D_IRDA_TX_D), | 
|  | 905 | PINMUX_IPSR_MODSEL_DATA(IP3_22_21, SCL3_B, SEL_I2C3_1), | 
|  | 906 | PINMUX_IPSR_DATA(IP3_23, DU0_DOTCLKOUT0), | 
|  | 907 | PINMUX_IPSR_DATA(IP3_23, QCLK), | 
|  | 908 | PINMUX_IPSR_DATA(IP3_26_24, DU0_DOTCLKOUT1), | 
|  | 909 | PINMUX_IPSR_DATA(IP3_26_24, QSTVB_QVE), | 
|  | 910 | PINMUX_IPSR_MODSEL_DATA(IP3_26_24, RX3_D_IRDA_RX_D, SEL_SCIF3_3), | 
|  | 911 | PINMUX_IPSR_MODSEL_DATA(IP3_26_24, SDA3_B, SEL_I2C3_1), | 
|  | 912 | PINMUX_IPSR_MODSEL_DATA(IP3_26_24, SDA2_C, SEL_I2C2_2), | 
|  | 913 | PINMUX_IPSR_DATA(IP3_26_24, DACK0_B), | 
|  | 914 | PINMUX_IPSR_DATA(IP3_26_24, DRACK0_B), | 
|  | 915 | PINMUX_IPSR_DATA(IP3_27, DU0_EXHSYNC_DU0_HSYNC), | 
|  | 916 | PINMUX_IPSR_DATA(IP3_27, QSTH_QHS), | 
|  | 917 | PINMUX_IPSR_DATA(IP3_28, DU0_EXVSYNC_DU0_VSYNC), | 
|  | 918 | PINMUX_IPSR_DATA(IP3_28, QSTB_QHE), | 
|  | 919 | PINMUX_IPSR_DATA(IP3_31_29, DU0_EXODDF_DU0_ODDF_DISP_CDE), | 
|  | 920 | PINMUX_IPSR_DATA(IP3_31_29, QCPV_QDE), | 
|  | 921 | PINMUX_IPSR_DATA(IP3_31_29, CAN1_TX), | 
|  | 922 | PINMUX_IPSR_DATA(IP3_31_29, TX2_C), | 
|  | 923 | PINMUX_IPSR_MODSEL_DATA(IP3_31_29, SCL2_C, SEL_I2C2_2), | 
|  | 924 | PINMUX_IPSR_DATA(IP3_31_29, REMOCON), | 
|  | 925 |  | 
|  | 926 | PINMUX_IPSR_DATA(IP4_1_0, DU0_DISP), | 
|  | 927 | PINMUX_IPSR_DATA(IP4_1_0, QPOLA), | 
|  | 928 | PINMUX_IPSR_MODSEL_DATA(IP4_1_0, CAN_CLK_C, SEL_CANCLK_2), | 
|  | 929 | PINMUX_IPSR_MODSEL_DATA(IP4_1_0, SCK2_C, SEL_SCIF2_2), | 
|  | 930 | PINMUX_IPSR_DATA(IP4_4_2, DU0_CDE), | 
|  | 931 | PINMUX_IPSR_DATA(IP4_4_2, QPOLB), | 
|  | 932 | PINMUX_IPSR_DATA(IP4_4_2, CAN1_RX), | 
|  | 933 | PINMUX_IPSR_MODSEL_DATA(IP4_4_2, RX2_C, SEL_SCIF2_2), | 
|  | 934 | PINMUX_IPSR_MODSEL_DATA(IP4_4_2, DREQ0_B, SEL_EXBUS0_1), | 
|  | 935 | PINMUX_IPSR_MODSEL_DATA(IP4_4_2, SSI_SCK78_B, SEL_SSI7_1), | 
|  | 936 | PINMUX_IPSR_MODSEL_DATA(IP4_4_2, SCK0_B, SEL_SCIF0_1), | 
|  | 937 | PINMUX_IPSR_DATA(IP4_7_5, DU1_DR0), | 
|  | 938 | PINMUX_IPSR_DATA(IP4_7_5, VI2_DATA0_VI2_B0), | 
|  | 939 | PINMUX_IPSR_DATA(IP4_7_5, PWM6), | 
|  | 940 | PINMUX_IPSR_DATA(IP4_7_5, SD3_CLK), | 
|  | 941 | PINMUX_IPSR_DATA(IP4_7_5, TX3_E_IRDA_TX_E), | 
|  | 942 | PINMUX_IPSR_DATA(IP4_7_5, AUDCK), | 
|  | 943 | PINMUX_IPSR_MODSEL_DATA(IP4_7_5, PWMFSW0_B, SEL_PWMFSW_1), | 
|  | 944 | PINMUX_IPSR_DATA(IP4_10_8, DU1_DR1), | 
|  | 945 | PINMUX_IPSR_DATA(IP4_10_8, VI2_DATA1_VI2_B1), | 
|  | 946 | PINMUX_IPSR_DATA(IP4_10_8, PWM0), | 
|  | 947 | PINMUX_IPSR_DATA(IP4_10_8, SD3_CMD), | 
|  | 948 | PINMUX_IPSR_MODSEL_DATA(IP4_10_8, RX3_E_IRDA_RX_E, SEL_SCIF3_4), | 
|  | 949 | PINMUX_IPSR_DATA(IP4_10_8, AUDSYNC), | 
|  | 950 | PINMUX_IPSR_MODSEL_DATA(IP4_10_8, CTS0_D, SEL_SCIF0_3), | 
|  | 951 | PINMUX_IPSR_DATA(IP4_11, DU1_DR2), | 
|  | 952 | PINMUX_IPSR_DATA(IP4_11, VI2_G0), | 
|  | 953 | PINMUX_IPSR_DATA(IP4_12, DU1_DR3), | 
|  | 954 | PINMUX_IPSR_DATA(IP4_12, VI2_G1), | 
|  | 955 | PINMUX_IPSR_DATA(IP4_13, DU1_DR4), | 
|  | 956 | PINMUX_IPSR_DATA(IP4_13, VI2_G2), | 
|  | 957 | PINMUX_IPSR_DATA(IP4_14, DU1_DR5), | 
|  | 958 | PINMUX_IPSR_DATA(IP4_14, VI2_G3), | 
|  | 959 | PINMUX_IPSR_DATA(IP4_15, DU1_DR6), | 
|  | 960 | PINMUX_IPSR_DATA(IP4_15, VI2_G4), | 
|  | 961 | PINMUX_IPSR_DATA(IP4_16, DU1_DR7), | 
|  | 962 | PINMUX_IPSR_DATA(IP4_16, VI2_G5), | 
|  | 963 | PINMUX_IPSR_DATA(IP4_19_17, DU1_DG0), | 
|  | 964 | PINMUX_IPSR_DATA(IP4_19_17, VI2_DATA2_VI2_B2), | 
|  | 965 | PINMUX_IPSR_MODSEL_DATA(IP4_19_17, SCL1_B, SEL_I2C1_1), | 
|  | 966 | PINMUX_IPSR_DATA(IP4_19_17, SD3_DAT2), | 
|  | 967 | PINMUX_IPSR_MODSEL_DATA(IP4_19_17, SCK3_E, SEL_SCIF3_4), | 
|  | 968 | PINMUX_IPSR_DATA(IP4_19_17, AUDATA6), | 
|  | 969 | PINMUX_IPSR_DATA(IP4_19_17, TX0_D), | 
|  | 970 | PINMUX_IPSR_DATA(IP4_22_20, DU1_DG1), | 
|  | 971 | PINMUX_IPSR_DATA(IP4_22_20, VI2_DATA3_VI2_B3), | 
|  | 972 | PINMUX_IPSR_MODSEL_DATA(IP4_22_20, SDA1_B, SEL_I2C1_1), | 
|  | 973 | PINMUX_IPSR_DATA(IP4_22_20, SD3_DAT3), | 
|  | 974 | PINMUX_IPSR_MODSEL_DATA(IP4_22_20, SCK5, SEL_SCIF5_0), | 
|  | 975 | PINMUX_IPSR_DATA(IP4_22_20, AUDATA7), | 
|  | 976 | PINMUX_IPSR_MODSEL_DATA(IP4_22_20, RX0_D, SEL_SCIF0_3), | 
|  | 977 | PINMUX_IPSR_DATA(IP4_23, DU1_DG2), | 
|  | 978 | PINMUX_IPSR_DATA(IP4_23, VI2_G6), | 
|  | 979 | PINMUX_IPSR_DATA(IP4_24, DU1_DG3), | 
|  | 980 | PINMUX_IPSR_DATA(IP4_24, VI2_G7), | 
|  | 981 | PINMUX_IPSR_DATA(IP4_25, DU1_DG4), | 
|  | 982 | PINMUX_IPSR_DATA(IP4_25, VI2_R0), | 
|  | 983 | PINMUX_IPSR_DATA(IP4_26, DU1_DG5), | 
|  | 984 | PINMUX_IPSR_DATA(IP4_26, VI2_R1), | 
|  | 985 | PINMUX_IPSR_DATA(IP4_27, DU1_DG6), | 
|  | 986 | PINMUX_IPSR_DATA(IP4_27, VI2_R2), | 
|  | 987 | PINMUX_IPSR_DATA(IP4_28, DU1_DG7), | 
|  | 988 | PINMUX_IPSR_DATA(IP4_28, VI2_R3), | 
|  | 989 | PINMUX_IPSR_DATA(IP4_31_29, DU1_DB0), | 
|  | 990 | PINMUX_IPSR_DATA(IP4_31_29, VI2_DATA4_VI2_B4), | 
|  | 991 | PINMUX_IPSR_MODSEL_DATA(IP4_31_29, SCL2_B, SEL_I2C2_1), | 
|  | 992 | PINMUX_IPSR_DATA(IP4_31_29, SD3_DAT0), | 
|  | 993 | PINMUX_IPSR_DATA(IP4_31_29, TX5), | 
|  | 994 | PINMUX_IPSR_MODSEL_DATA(IP4_31_29, SCK0_D, SEL_SCIF0_3), | 
|  | 995 |  | 
|  | 996 | PINMUX_IPSR_DATA(IP5_2_0, DU1_DB1), | 
|  | 997 | PINMUX_IPSR_DATA(IP5_2_0, VI2_DATA5_VI2_B5), | 
|  | 998 | PINMUX_IPSR_MODSEL_DATA(IP5_2_0, SDA2_B, SEL_I2C2_1), | 
|  | 999 | PINMUX_IPSR_DATA(IP5_2_0, SD3_DAT1), | 
|  | 1000 | PINMUX_IPSR_MODSEL_DATA(IP5_2_0, RX5, SEL_SCIF5_0), | 
|  | 1001 | PINMUX_IPSR_MODSEL_DATA(IP5_2_0, RTS0_D_TANS_D, SEL_SCIF0_3), | 
|  | 1002 | PINMUX_IPSR_DATA(IP5_3, DU1_DB2), | 
|  | 1003 | PINMUX_IPSR_DATA(IP5_3, VI2_R4), | 
|  | 1004 | PINMUX_IPSR_DATA(IP5_4, DU1_DB3), | 
|  | 1005 | PINMUX_IPSR_DATA(IP5_4, VI2_R5), | 
|  | 1006 | PINMUX_IPSR_DATA(IP5_5, DU1_DB4), | 
|  | 1007 | PINMUX_IPSR_DATA(IP5_5, VI2_R6), | 
|  | 1008 | PINMUX_IPSR_DATA(IP5_6, DU1_DB5), | 
|  | 1009 | PINMUX_IPSR_DATA(IP5_6, VI2_R7), | 
|  | 1010 | PINMUX_IPSR_DATA(IP5_7, DU1_DB6), | 
|  | 1011 | PINMUX_IPSR_MODSEL_DATA(IP5_7, SCL2_D, SEL_I2C2_3), | 
|  | 1012 | PINMUX_IPSR_DATA(IP5_8, DU1_DB7), | 
|  | 1013 | PINMUX_IPSR_MODSEL_DATA(IP5_8, SDA2_D, SEL_I2C2_3), | 
|  | 1014 | PINMUX_IPSR_DATA(IP5_10_9, DU1_DOTCLKIN), | 
|  | 1015 | PINMUX_IPSR_DATA(IP5_10_9, VI2_CLKENB), | 
|  | 1016 | PINMUX_IPSR_MODSEL_DATA(IP5_10_9, HSPI_CS1, SEL_HSPI1_0), | 
|  | 1017 | PINMUX_IPSR_MODSEL_DATA(IP5_10_9, SCL1_D, SEL_I2C1_3), | 
|  | 1018 | PINMUX_IPSR_DATA(IP5_12_11, DU1_DOTCLKOUT), | 
|  | 1019 | PINMUX_IPSR_DATA(IP5_12_11, VI2_FIELD), | 
|  | 1020 | PINMUX_IPSR_MODSEL_DATA(IP5_12_11, SDA1_D, SEL_I2C1_3), | 
|  | 1021 | PINMUX_IPSR_DATA(IP5_14_13, DU1_EXHSYNC_DU1_HSYNC), | 
|  | 1022 | PINMUX_IPSR_DATA(IP5_14_13, VI2_HSYNC), | 
|  | 1023 | PINMUX_IPSR_DATA(IP5_14_13, VI3_HSYNC), | 
|  | 1024 | PINMUX_IPSR_DATA(IP5_16_15, DU1_EXVSYNC_DU1_VSYNC), | 
|  | 1025 | PINMUX_IPSR_DATA(IP5_16_15, VI2_VSYNC), | 
|  | 1026 | PINMUX_IPSR_DATA(IP5_16_15, VI3_VSYNC), | 
|  | 1027 | PINMUX_IPSR_DATA(IP5_20_17, DU1_EXODDF_DU1_ODDF_DISP_CDE), | 
|  | 1028 | PINMUX_IPSR_DATA(IP5_20_17, VI2_CLK), | 
|  | 1029 | PINMUX_IPSR_DATA(IP5_20_17, TX3_B_IRDA_TX_B), | 
|  | 1030 | PINMUX_IPSR_DATA(IP5_20_17, SD3_CD), | 
|  | 1031 | PINMUX_IPSR_DATA(IP5_20_17, HSPI_TX1), | 
|  | 1032 | PINMUX_IPSR_DATA(IP5_20_17, VI1_CLKENB), | 
|  | 1033 | PINMUX_IPSR_DATA(IP5_20_17, VI3_CLKENB), | 
|  | 1034 | PINMUX_IPSR_DATA(IP5_20_17, AUDIO_CLKC), | 
|  | 1035 | PINMUX_IPSR_DATA(IP5_20_17, TX2_D), | 
|  | 1036 | PINMUX_IPSR_DATA(IP5_20_17, SPEEDIN), | 
|  | 1037 | PINMUX_IPSR_MODSEL_DATA(IP5_20_17, GPS_SIGN_D, SEL_GPS_3), | 
|  | 1038 | PINMUX_IPSR_DATA(IP5_23_21, DU1_DISP), | 
|  | 1039 | PINMUX_IPSR_DATA(IP5_23_21, VI2_DATA6_VI2_B6), | 
|  | 1040 | PINMUX_IPSR_MODSEL_DATA(IP5_23_21, TCLK0, SEL_TMU0_0), | 
|  | 1041 | PINMUX_IPSR_DATA(IP5_23_21, QSTVA_B_QVS_B), | 
|  | 1042 | PINMUX_IPSR_MODSEL_DATA(IP5_23_21, HSPI_CLK1, SEL_HSPI1_0), | 
|  | 1043 | PINMUX_IPSR_MODSEL_DATA(IP5_23_21, SCK2_D, SEL_SCIF2_3), | 
|  | 1044 | PINMUX_IPSR_DATA(IP5_23_21, AUDIO_CLKOUT_B), | 
|  | 1045 | PINMUX_IPSR_MODSEL_DATA(IP5_23_21, GPS_MAG_D, SEL_GPS_3), | 
|  | 1046 | PINMUX_IPSR_DATA(IP5_27_24, DU1_CDE), | 
|  | 1047 | PINMUX_IPSR_DATA(IP5_27_24, VI2_DATA7_VI2_B7), | 
|  | 1048 | PINMUX_IPSR_MODSEL_DATA(IP5_27_24, RX3_B_IRDA_RX_B, SEL_SCIF3_1), | 
|  | 1049 | PINMUX_IPSR_DATA(IP5_27_24, SD3_WP), | 
|  | 1050 | PINMUX_IPSR_MODSEL_DATA(IP5_27_24, HSPI_RX1, SEL_HSPI1_0), | 
|  | 1051 | PINMUX_IPSR_DATA(IP5_27_24, VI1_FIELD), | 
|  | 1052 | PINMUX_IPSR_DATA(IP5_27_24, VI3_FIELD), | 
|  | 1053 | PINMUX_IPSR_DATA(IP5_27_24, AUDIO_CLKOUT), | 
|  | 1054 | PINMUX_IPSR_MODSEL_DATA(IP5_27_24, RX2_D, SEL_SCIF2_3), | 
|  | 1055 | PINMUX_IPSR_MODSEL_DATA(IP5_27_24, GPS_CLK_C, SEL_GPS_2), | 
|  | 1056 | PINMUX_IPSR_MODSEL_DATA(IP5_27_24, GPS_CLK_D, SEL_GPS_3), | 
|  | 1057 | PINMUX_IPSR_DATA(IP5_28, AUDIO_CLKA), | 
|  | 1058 | PINMUX_IPSR_DATA(IP5_28, CAN_TXCLK), | 
|  | 1059 | PINMUX_IPSR_DATA(IP5_30_29, AUDIO_CLKB), | 
|  | 1060 | PINMUX_IPSR_DATA(IP5_30_29, USB_OVC2), | 
|  | 1061 | PINMUX_IPSR_DATA(IP5_30_29, CAN_DEBUGOUT0), | 
|  | 1062 | PINMUX_IPSR_DATA(IP5_30_29, MOUT0), | 
|  | 1063 |  | 
|  | 1064 | PINMUX_IPSR_DATA(IP6_1_0, SSI_SCK0129), | 
|  | 1065 | PINMUX_IPSR_DATA(IP6_1_0, CAN_DEBUGOUT1), | 
|  | 1066 | PINMUX_IPSR_DATA(IP6_1_0, MOUT1), | 
|  | 1067 | PINMUX_IPSR_DATA(IP6_3_2, SSI_WS0129), | 
|  | 1068 | PINMUX_IPSR_DATA(IP6_3_2, CAN_DEBUGOUT2), | 
|  | 1069 | PINMUX_IPSR_DATA(IP6_3_2, MOUT2), | 
|  | 1070 | PINMUX_IPSR_DATA(IP6_5_4, SSI_SDATA0), | 
|  | 1071 | PINMUX_IPSR_DATA(IP6_5_4, CAN_DEBUGOUT3), | 
|  | 1072 | PINMUX_IPSR_DATA(IP6_5_4, MOUT5), | 
|  | 1073 | PINMUX_IPSR_DATA(IP6_7_6, SSI_SDATA1), | 
|  | 1074 | PINMUX_IPSR_DATA(IP6_7_6, CAN_DEBUGOUT4), | 
|  | 1075 | PINMUX_IPSR_DATA(IP6_7_6, MOUT6), | 
|  | 1076 | PINMUX_IPSR_DATA(IP6_8, SSI_SDATA2), | 
|  | 1077 | PINMUX_IPSR_DATA(IP6_8, CAN_DEBUGOUT5), | 
|  | 1078 | PINMUX_IPSR_DATA(IP6_11_9, SSI_SCK34), | 
|  | 1079 | PINMUX_IPSR_DATA(IP6_11_9, CAN_DEBUGOUT6), | 
|  | 1080 | PINMUX_IPSR_DATA(IP6_11_9, CAN0_TX_B), | 
|  | 1081 | PINMUX_IPSR_MODSEL_DATA(IP6_11_9, IERX, SEL_IE_0), | 
|  | 1082 | PINMUX_IPSR_MODSEL_DATA(IP6_11_9, SSI_SCK9_C, SEL_SSI9_2), | 
|  | 1083 | PINMUX_IPSR_DATA(IP6_14_12, SSI_WS34), | 
|  | 1084 | PINMUX_IPSR_DATA(IP6_14_12, CAN_DEBUGOUT7), | 
|  | 1085 | PINMUX_IPSR_MODSEL_DATA(IP6_14_12, CAN0_RX_B, SEL_CAN0_1), | 
|  | 1086 | PINMUX_IPSR_DATA(IP6_14_12, IETX), | 
|  | 1087 | PINMUX_IPSR_MODSEL_DATA(IP6_14_12, SSI_WS9_C, SEL_SSI9_2), | 
|  | 1088 | PINMUX_IPSR_DATA(IP6_17_15, SSI_SDATA3), | 
|  | 1089 | PINMUX_IPSR_DATA(IP6_17_15, PWM0_C), | 
|  | 1090 | PINMUX_IPSR_DATA(IP6_17_15, CAN_DEBUGOUT8), | 
|  | 1091 | PINMUX_IPSR_MODSEL_DATA(IP6_17_15, CAN_CLK_B, SEL_CANCLK_1), | 
|  | 1092 | PINMUX_IPSR_MODSEL_DATA(IP6_17_15, IECLK, SEL_IE_0), | 
|  | 1093 | PINMUX_IPSR_MODSEL_DATA(IP6_17_15, SCIF_CLK_B, SEL_SCIF_1), | 
|  | 1094 | PINMUX_IPSR_MODSEL_DATA(IP6_17_15, TCLK0_B, SEL_TMU0_1), | 
|  | 1095 | PINMUX_IPSR_DATA(IP6_19_18, SSI_SDATA4), | 
|  | 1096 | PINMUX_IPSR_DATA(IP6_19_18, CAN_DEBUGOUT9), | 
|  | 1097 | PINMUX_IPSR_MODSEL_DATA(IP6_19_18, SSI_SDATA9_C, SEL_SSI9_2), | 
|  | 1098 | PINMUX_IPSR_DATA(IP6_22_20, SSI_SCK5), | 
|  | 1099 | PINMUX_IPSR_DATA(IP6_22_20, ADICLK), | 
|  | 1100 | PINMUX_IPSR_DATA(IP6_22_20, CAN_DEBUGOUT10), | 
|  | 1101 | PINMUX_IPSR_MODSEL_DATA(IP6_22_20, SCK3, SEL_SCIF3_0), | 
|  | 1102 | PINMUX_IPSR_MODSEL_DATA(IP6_22_20, TCLK0_D, SEL_TMU0_3), | 
|  | 1103 | PINMUX_IPSR_DATA(IP6_24_23, SSI_WS5), | 
|  | 1104 | PINMUX_IPSR_MODSEL_DATA(IP6_24_23, ADICS_SAMP, SEL_ADI_0), | 
|  | 1105 | PINMUX_IPSR_DATA(IP6_24_23, CAN_DEBUGOUT11), | 
|  | 1106 | PINMUX_IPSR_DATA(IP6_24_23, TX3_IRDA_TX), | 
|  | 1107 | PINMUX_IPSR_DATA(IP6_26_25, SSI_SDATA5), | 
|  | 1108 | PINMUX_IPSR_MODSEL_DATA(IP6_26_25, ADIDATA, SEL_ADI_0), | 
|  | 1109 | PINMUX_IPSR_DATA(IP6_26_25, CAN_DEBUGOUT12), | 
|  | 1110 | PINMUX_IPSR_MODSEL_DATA(IP6_26_25, RX3_IRDA_RX, SEL_SCIF3_0), | 
|  | 1111 | PINMUX_IPSR_DATA(IP6_30_29, SSI_SCK6), | 
|  | 1112 | PINMUX_IPSR_DATA(IP6_30_29, ADICHS0), | 
|  | 1113 | PINMUX_IPSR_DATA(IP6_30_29, CAN0_TX), | 
|  | 1114 | PINMUX_IPSR_MODSEL_DATA(IP6_30_29, IERX_B, SEL_IE_1), | 
|  | 1115 |  | 
|  | 1116 | PINMUX_IPSR_DATA(IP7_1_0, SSI_WS6), | 
|  | 1117 | PINMUX_IPSR_DATA(IP7_1_0, ADICHS1), | 
|  | 1118 | PINMUX_IPSR_MODSEL_DATA(IP7_1_0, CAN0_RX, SEL_CAN0_0), | 
|  | 1119 | PINMUX_IPSR_DATA(IP7_1_0, IETX_B), | 
|  | 1120 | PINMUX_IPSR_DATA(IP7_3_2, SSI_SDATA6), | 
|  | 1121 | PINMUX_IPSR_DATA(IP7_3_2, ADICHS2), | 
|  | 1122 | PINMUX_IPSR_MODSEL_DATA(IP7_3_2, CAN_CLK, SEL_CANCLK_0), | 
|  | 1123 | PINMUX_IPSR_MODSEL_DATA(IP7_3_2, IECLK_B, SEL_IE_1), | 
|  | 1124 | PINMUX_IPSR_MODSEL_DATA(IP7_6_4, SSI_SCK78, SEL_SSI7_0), | 
|  | 1125 | PINMUX_IPSR_DATA(IP7_6_4, CAN_DEBUGOUT13), | 
|  | 1126 | PINMUX_IPSR_MODSEL_DATA(IP7_6_4, IRQ0_B, SEL_INT0_1), | 
|  | 1127 | PINMUX_IPSR_MODSEL_DATA(IP7_6_4, SSI_SCK9_B, SEL_SSI9_1), | 
|  | 1128 | PINMUX_IPSR_MODSEL_DATA(IP7_6_4, HSPI_CLK1_C, SEL_HSPI1_2), | 
|  | 1129 | PINMUX_IPSR_MODSEL_DATA(IP7_9_7, SSI_WS78, SEL_SSI7_0), | 
|  | 1130 | PINMUX_IPSR_DATA(IP7_9_7, CAN_DEBUGOUT14), | 
|  | 1131 | PINMUX_IPSR_MODSEL_DATA(IP7_9_7, IRQ1_B, SEL_INT1_1), | 
|  | 1132 | PINMUX_IPSR_MODSEL_DATA(IP7_9_7, SSI_WS9_B, SEL_SSI9_1), | 
|  | 1133 | PINMUX_IPSR_MODSEL_DATA(IP7_9_7, HSPI_CS1_C, SEL_HSPI1_2), | 
|  | 1134 | PINMUX_IPSR_MODSEL_DATA(IP7_12_10, SSI_SDATA7, SEL_SSI7_0), | 
|  | 1135 | PINMUX_IPSR_DATA(IP7_12_10, CAN_DEBUGOUT15), | 
|  | 1136 | PINMUX_IPSR_MODSEL_DATA(IP7_12_10, IRQ2_B, SEL_INT2_1), | 
|  | 1137 | PINMUX_IPSR_MODSEL_DATA(IP7_12_10, TCLK1_C, SEL_TMU1_2), | 
|  | 1138 | PINMUX_IPSR_DATA(IP7_12_10, HSPI_TX1_C), | 
|  | 1139 | PINMUX_IPSR_MODSEL_DATA(IP7_14_13, SSI_SDATA8, SEL_SSI8_0), | 
|  | 1140 | PINMUX_IPSR_DATA(IP7_14_13, VSP), | 
|  | 1141 | PINMUX_IPSR_MODSEL_DATA(IP7_14_13, IRQ3_B, SEL_INT3_1), | 
|  | 1142 | PINMUX_IPSR_MODSEL_DATA(IP7_14_13, HSPI_RX1_C, SEL_HSPI1_2), | 
|  | 1143 | PINMUX_IPSR_DATA(IP7_16_15, SD0_CLK), | 
|  | 1144 | PINMUX_IPSR_DATA(IP7_16_15, ATACS01), | 
|  | 1145 | PINMUX_IPSR_MODSEL_DATA(IP7_16_15, SCK1_B, SEL_SCIF1_1), | 
|  | 1146 | PINMUX_IPSR_DATA(IP7_18_17, SD0_CMD), | 
|  | 1147 | PINMUX_IPSR_DATA(IP7_18_17, ATACS11), | 
|  | 1148 | PINMUX_IPSR_DATA(IP7_18_17, TX1_B), | 
|  | 1149 | PINMUX_IPSR_DATA(IP7_18_17, CC5_TDO), | 
|  | 1150 | PINMUX_IPSR_DATA(IP7_20_19, SD0_DAT0), | 
|  | 1151 | PINMUX_IPSR_DATA(IP7_20_19, ATADIR1), | 
|  | 1152 | PINMUX_IPSR_MODSEL_DATA(IP7_20_19, RX1_B, SEL_SCIF1_1), | 
|  | 1153 | PINMUX_IPSR_DATA(IP7_20_19, CC5_TRST), | 
|  | 1154 | PINMUX_IPSR_DATA(IP7_22_21, SD0_DAT1), | 
|  | 1155 | PINMUX_IPSR_DATA(IP7_22_21, ATAG1), | 
|  | 1156 | PINMUX_IPSR_MODSEL_DATA(IP7_22_21, SCK2_B, SEL_SCIF2_1), | 
|  | 1157 | PINMUX_IPSR_DATA(IP7_22_21, CC5_TMS), | 
|  | 1158 | PINMUX_IPSR_DATA(IP7_24_23, SD0_DAT2), | 
|  | 1159 | PINMUX_IPSR_DATA(IP7_24_23, ATARD1), | 
|  | 1160 | PINMUX_IPSR_DATA(IP7_24_23, TX2_B), | 
|  | 1161 | PINMUX_IPSR_DATA(IP7_24_23, CC5_TCK), | 
|  | 1162 | PINMUX_IPSR_DATA(IP7_26_25, SD0_DAT3), | 
|  | 1163 | PINMUX_IPSR_DATA(IP7_26_25, ATAWR1), | 
|  | 1164 | PINMUX_IPSR_MODSEL_DATA(IP7_26_25, RX2_B, SEL_SCIF2_1), | 
|  | 1165 | PINMUX_IPSR_DATA(IP7_26_25, CC5_TDI), | 
|  | 1166 | PINMUX_IPSR_DATA(IP7_28_27, SD0_CD), | 
|  | 1167 | PINMUX_IPSR_MODSEL_DATA(IP7_28_27, DREQ2, SEL_EXBUS2_0), | 
|  | 1168 | PINMUX_IPSR_MODSEL_DATA(IP7_28_27, RTS1_B_TANS_B, SEL_SCIF1_1), | 
|  | 1169 | PINMUX_IPSR_DATA(IP7_30_29, SD0_WP), | 
|  | 1170 | PINMUX_IPSR_DATA(IP7_30_29, DACK2), | 
|  | 1171 | PINMUX_IPSR_MODSEL_DATA(IP7_30_29, CTS1_B, SEL_SCIF1_1), | 
|  | 1172 |  | 
|  | 1173 | PINMUX_IPSR_DATA(IP8_3_0, HSPI_CLK0), | 
|  | 1174 | PINMUX_IPSR_MODSEL_DATA(IP8_3_0, CTS0, SEL_SCIF0_0), | 
|  | 1175 | PINMUX_IPSR_DATA(IP8_3_0, USB_OVC0), | 
|  | 1176 | PINMUX_IPSR_DATA(IP8_3_0, AD_CLK), | 
|  | 1177 | PINMUX_IPSR_DATA(IP8_3_0, CC5_STATE4), | 
|  | 1178 | PINMUX_IPSR_DATA(IP8_3_0, CC5_STATE12), | 
|  | 1179 | PINMUX_IPSR_DATA(IP8_3_0, CC5_STATE20), | 
|  | 1180 | PINMUX_IPSR_DATA(IP8_3_0, CC5_STATE28), | 
|  | 1181 | PINMUX_IPSR_DATA(IP8_3_0, CC5_STATE36), | 
|  | 1182 | PINMUX_IPSR_DATA(IP8_7_4, HSPI_CS0), | 
|  | 1183 | PINMUX_IPSR_MODSEL_DATA(IP8_7_4, RTS0_TANS, SEL_SCIF0_0), | 
|  | 1184 | PINMUX_IPSR_DATA(IP8_7_4, USB_OVC1), | 
|  | 1185 | PINMUX_IPSR_DATA(IP8_7_4, AD_DI), | 
|  | 1186 | PINMUX_IPSR_DATA(IP8_7_4, CC5_STATE5), | 
|  | 1187 | PINMUX_IPSR_DATA(IP8_7_4, CC5_STATE13), | 
|  | 1188 | PINMUX_IPSR_DATA(IP8_7_4, CC5_STATE21), | 
|  | 1189 | PINMUX_IPSR_DATA(IP8_7_4, CC5_STATE29), | 
|  | 1190 | PINMUX_IPSR_DATA(IP8_7_4, CC5_STATE37), | 
|  | 1191 | PINMUX_IPSR_DATA(IP8_11_8, HSPI_TX0), | 
|  | 1192 | PINMUX_IPSR_DATA(IP8_11_8, TX0), | 
|  | 1193 | PINMUX_IPSR_DATA(IP8_11_8, CAN_DEBUG_HW_TRIGGER), | 
|  | 1194 | PINMUX_IPSR_DATA(IP8_11_8, AD_DO), | 
|  | 1195 | PINMUX_IPSR_DATA(IP8_11_8, CC5_STATE6), | 
|  | 1196 | PINMUX_IPSR_DATA(IP8_11_8, CC5_STATE14), | 
|  | 1197 | PINMUX_IPSR_DATA(IP8_11_8, CC5_STATE22), | 
|  | 1198 | PINMUX_IPSR_DATA(IP8_11_8, CC5_STATE30), | 
|  | 1199 | PINMUX_IPSR_DATA(IP8_11_8, CC5_STATE38), | 
|  | 1200 | PINMUX_IPSR_DATA(IP8_15_12, HSPI_RX0), | 
|  | 1201 | PINMUX_IPSR_MODSEL_DATA(IP8_15_12, RX0, SEL_SCIF0_0), | 
|  | 1202 | PINMUX_IPSR_DATA(IP8_15_12, CAN_STEP0), | 
|  | 1203 | PINMUX_IPSR_DATA(IP8_15_12, AD_NCS), | 
|  | 1204 | PINMUX_IPSR_DATA(IP8_15_12, CC5_STATE7), | 
|  | 1205 | PINMUX_IPSR_DATA(IP8_15_12, CC5_STATE15), | 
|  | 1206 | PINMUX_IPSR_DATA(IP8_15_12, CC5_STATE23), | 
|  | 1207 | PINMUX_IPSR_DATA(IP8_15_12, CC5_STATE31), | 
|  | 1208 | PINMUX_IPSR_DATA(IP8_15_12, CC5_STATE39), | 
|  | 1209 | PINMUX_IPSR_DATA(IP8_17_16, FMCLK), | 
|  | 1210 | PINMUX_IPSR_DATA(IP8_17_16, RDS_CLK), | 
|  | 1211 | PINMUX_IPSR_DATA(IP8_17_16, PCMOE), | 
|  | 1212 | PINMUX_IPSR_DATA(IP8_18, BPFCLK), | 
|  | 1213 | PINMUX_IPSR_DATA(IP8_18, PCMWE), | 
|  | 1214 | PINMUX_IPSR_DATA(IP8_19, FMIN), | 
|  | 1215 | PINMUX_IPSR_DATA(IP8_19, RDS_DATA), | 
|  | 1216 | PINMUX_IPSR_DATA(IP8_20, VI0_CLK), | 
|  | 1217 | PINMUX_IPSR_DATA(IP8_20, MMC1_CLK), | 
|  | 1218 | PINMUX_IPSR_DATA(IP8_22_21, VI0_CLKENB), | 
|  | 1219 | PINMUX_IPSR_DATA(IP8_22_21, TX1_C), | 
|  | 1220 | PINMUX_IPSR_DATA(IP8_22_21, HTX1_B), | 
|  | 1221 | PINMUX_IPSR_DATA(IP8_22_21, MT1_SYNC), | 
|  | 1222 | PINMUX_IPSR_DATA(IP8_24_23, VI0_FIELD), | 
|  | 1223 | PINMUX_IPSR_MODSEL_DATA(IP8_24_23, RX1_C, SEL_SCIF1_2), | 
|  | 1224 | PINMUX_IPSR_MODSEL_DATA(IP8_24_23, HRX1_B, SEL_HSCIF1_1), | 
|  | 1225 | PINMUX_IPSR_DATA(IP8_27_25, VI0_HSYNC), | 
|  | 1226 | PINMUX_IPSR_MODSEL_DATA(IP8_27_25, VI0_DATA0_B_VI0_B0_B, SEL_VI0_1), | 
|  | 1227 | PINMUX_IPSR_MODSEL_DATA(IP8_27_25, CTS1_C, SEL_SCIF1_2), | 
|  | 1228 | PINMUX_IPSR_DATA(IP8_27_25, TX4_D), | 
|  | 1229 | PINMUX_IPSR_DATA(IP8_27_25, MMC1_CMD), | 
|  | 1230 | PINMUX_IPSR_MODSEL_DATA(IP8_27_25, HSCK1_B, SEL_HSCIF1_1), | 
|  | 1231 | PINMUX_IPSR_DATA(IP8_30_28, VI0_VSYNC), | 
|  | 1232 | PINMUX_IPSR_MODSEL_DATA(IP8_30_28, VI0_DATA1_B_VI0_B1_B, SEL_VI0_1), | 
|  | 1233 | PINMUX_IPSR_MODSEL_DATA(IP8_30_28, RTS1_C_TANS_C, SEL_SCIF1_2), | 
|  | 1234 | PINMUX_IPSR_MODSEL_DATA(IP8_30_28, RX4_D, SEL_SCIF4_3), | 
|  | 1235 | PINMUX_IPSR_MODSEL_DATA(IP8_30_28, PWMFSW0_C, SEL_PWMFSW_2), | 
|  | 1236 |  | 
|  | 1237 | PINMUX_IPSR_MODSEL_DATA(IP9_1_0, VI0_DATA0_VI0_B0, SEL_VI0_0), | 
|  | 1238 | PINMUX_IPSR_MODSEL_DATA(IP9_1_0, HRTS1_B, SEL_HSCIF1_1), | 
|  | 1239 | PINMUX_IPSR_DATA(IP9_1_0, MT1_VCXO), | 
|  | 1240 | PINMUX_IPSR_MODSEL_DATA(IP9_3_2, VI0_DATA1_VI0_B1, SEL_VI0_0), | 
|  | 1241 | PINMUX_IPSR_MODSEL_DATA(IP9_3_2, HCTS1_B, SEL_HSCIF1_1), | 
|  | 1242 | PINMUX_IPSR_DATA(IP9_3_2, MT1_PWM), | 
|  | 1243 | PINMUX_IPSR_DATA(IP9_4, VI0_DATA2_VI0_B2), | 
|  | 1244 | PINMUX_IPSR_DATA(IP9_4, MMC1_D0), | 
|  | 1245 | PINMUX_IPSR_DATA(IP9_5, VI0_DATA3_VI0_B3), | 
|  | 1246 | PINMUX_IPSR_DATA(IP9_5, MMC1_D1), | 
|  | 1247 | PINMUX_IPSR_DATA(IP9_6, VI0_DATA4_VI0_B4), | 
|  | 1248 | PINMUX_IPSR_DATA(IP9_6, MMC1_D2), | 
|  | 1249 | PINMUX_IPSR_DATA(IP9_7, VI0_DATA5_VI0_B5), | 
|  | 1250 | PINMUX_IPSR_DATA(IP9_7, MMC1_D3), | 
|  | 1251 | PINMUX_IPSR_DATA(IP9_9_8, VI0_DATA6_VI0_B6), | 
|  | 1252 | PINMUX_IPSR_DATA(IP9_9_8, MMC1_D4), | 
|  | 1253 | PINMUX_IPSR_DATA(IP9_9_8, ARM_TRACEDATA_0), | 
|  | 1254 | PINMUX_IPSR_DATA(IP9_11_10, VI0_DATA7_VI0_B7), | 
|  | 1255 | PINMUX_IPSR_DATA(IP9_11_10, MMC1_D5), | 
|  | 1256 | PINMUX_IPSR_DATA(IP9_11_10, ARM_TRACEDATA_1), | 
|  | 1257 | PINMUX_IPSR_DATA(IP9_13_12, VI0_G0), | 
|  | 1258 | PINMUX_IPSR_MODSEL_DATA(IP9_13_12, SSI_SCK78_C, SEL_SSI7_2), | 
|  | 1259 | PINMUX_IPSR_MODSEL_DATA(IP9_13_12, IRQ0, SEL_INT0_0), | 
|  | 1260 | PINMUX_IPSR_DATA(IP9_13_12, ARM_TRACEDATA_2), | 
|  | 1261 | PINMUX_IPSR_DATA(IP9_15_14, VI0_G1), | 
|  | 1262 | PINMUX_IPSR_MODSEL_DATA(IP9_15_14, SSI_WS78_C, SEL_SSI7_2), | 
|  | 1263 | PINMUX_IPSR_MODSEL_DATA(IP9_15_14, IRQ1, SEL_INT1_0), | 
|  | 1264 | PINMUX_IPSR_DATA(IP9_15_14, ARM_TRACEDATA_3), | 
|  | 1265 | PINMUX_IPSR_DATA(IP9_18_16, VI0_G2), | 
|  | 1266 | PINMUX_IPSR_DATA(IP9_18_16, ETH_TXD1), | 
|  | 1267 | PINMUX_IPSR_DATA(IP9_18_16, MMC1_D6), | 
|  | 1268 | PINMUX_IPSR_DATA(IP9_18_16, ARM_TRACEDATA_4), | 
|  | 1269 | PINMUX_IPSR_DATA(IP9_18_16, TS_SPSYNC0), | 
|  | 1270 | PINMUX_IPSR_DATA(IP9_21_19, VI0_G3), | 
|  | 1271 | PINMUX_IPSR_DATA(IP9_21_19, ETH_CRS_DV), | 
|  | 1272 | PINMUX_IPSR_DATA(IP9_21_19, MMC1_D7), | 
|  | 1273 | PINMUX_IPSR_DATA(IP9_21_19, ARM_TRACEDATA_5), | 
|  | 1274 | PINMUX_IPSR_DATA(IP9_21_19, TS_SDAT0), | 
|  | 1275 | PINMUX_IPSR_DATA(IP9_23_22, VI0_G4), | 
|  | 1276 | PINMUX_IPSR_DATA(IP9_23_22, ETH_TX_EN), | 
|  | 1277 | PINMUX_IPSR_MODSEL_DATA(IP9_23_22, SD2_DAT0_B, SEL_SD2_1), | 
|  | 1278 | PINMUX_IPSR_DATA(IP9_23_22, ARM_TRACEDATA_6), | 
|  | 1279 | PINMUX_IPSR_DATA(IP9_25_24, VI0_G5), | 
|  | 1280 | PINMUX_IPSR_DATA(IP9_25_24, ETH_RX_ER), | 
|  | 1281 | PINMUX_IPSR_MODSEL_DATA(IP9_25_24, SD2_DAT1_B, SEL_SD2_1), | 
|  | 1282 | PINMUX_IPSR_DATA(IP9_25_24, ARM_TRACEDATA_7), | 
|  | 1283 | PINMUX_IPSR_DATA(IP9_27_26, VI0_G6), | 
|  | 1284 | PINMUX_IPSR_DATA(IP9_27_26, ETH_RXD0), | 
|  | 1285 | PINMUX_IPSR_MODSEL_DATA(IP9_27_26, SD2_DAT2_B, SEL_SD2_1), | 
|  | 1286 | PINMUX_IPSR_DATA(IP9_27_26, ARM_TRACEDATA_8), | 
|  | 1287 | PINMUX_IPSR_DATA(IP9_29_28, VI0_G7), | 
|  | 1288 | PINMUX_IPSR_DATA(IP9_29_28, ETH_RXD1), | 
|  | 1289 | PINMUX_IPSR_MODSEL_DATA(IP9_29_28, SD2_DAT3_B, SEL_SD2_1), | 
|  | 1290 | PINMUX_IPSR_DATA(IP9_29_28, ARM_TRACEDATA_9), | 
|  | 1291 |  | 
|  | 1292 | PINMUX_IPSR_DATA(IP10_2_0, VI0_R0), | 
|  | 1293 | PINMUX_IPSR_MODSEL_DATA(IP10_2_0, SSI_SDATA7_C, SEL_SSI7_2), | 
|  | 1294 | PINMUX_IPSR_MODSEL_DATA(IP10_2_0, SCK1_C, SEL_SCIF1_2), | 
|  | 1295 | PINMUX_IPSR_MODSEL_DATA(IP10_2_0, DREQ1_B, SEL_EXBUS1_0), | 
|  | 1296 | PINMUX_IPSR_DATA(IP10_2_0, ARM_TRACEDATA_10), | 
|  | 1297 | PINMUX_IPSR_MODSEL_DATA(IP10_2_0, DREQ0_C, SEL_EXBUS0_2), | 
|  | 1298 | PINMUX_IPSR_DATA(IP10_5_3, VI0_R1), | 
|  | 1299 | PINMUX_IPSR_MODSEL_DATA(IP10_5_3, SSI_SDATA8_C, SEL_SSI8_2), | 
|  | 1300 | PINMUX_IPSR_DATA(IP10_5_3, DACK1_B), | 
|  | 1301 | PINMUX_IPSR_DATA(IP10_5_3, ARM_TRACEDATA_11), | 
|  | 1302 | PINMUX_IPSR_DATA(IP10_5_3, DACK0_C), | 
|  | 1303 | PINMUX_IPSR_DATA(IP10_5_3, DRACK0_C), | 
|  | 1304 | PINMUX_IPSR_DATA(IP10_8_6, VI0_R2), | 
|  | 1305 | PINMUX_IPSR_DATA(IP10_8_6, ETH_LINK), | 
|  | 1306 | PINMUX_IPSR_DATA(IP10_8_6, SD2_CLK_B), | 
|  | 1307 | PINMUX_IPSR_MODSEL_DATA(IP10_8_6, IRQ2, SEL_INT2_0), | 
|  | 1308 | PINMUX_IPSR_DATA(IP10_8_6, ARM_TRACEDATA_12), | 
|  | 1309 | PINMUX_IPSR_DATA(IP10_11_9, VI0_R3), | 
|  | 1310 | PINMUX_IPSR_DATA(IP10_11_9, ETH_MAGIC), | 
|  | 1311 | PINMUX_IPSR_MODSEL_DATA(IP10_11_9, SD2_CMD_B, SEL_SD2_1), | 
|  | 1312 | PINMUX_IPSR_MODSEL_DATA(IP10_11_9, IRQ3, SEL_INT3_0), | 
|  | 1313 | PINMUX_IPSR_DATA(IP10_11_9, ARM_TRACEDATA_13), | 
|  | 1314 | PINMUX_IPSR_DATA(IP10_14_12, VI0_R4), | 
|  | 1315 | PINMUX_IPSR_DATA(IP10_14_12, ETH_REFCLK), | 
|  | 1316 | PINMUX_IPSR_MODSEL_DATA(IP10_14_12, SD2_CD_B, SEL_SD2_1), | 
|  | 1317 | PINMUX_IPSR_MODSEL_DATA(IP10_14_12, HSPI_CLK1_B, SEL_HSPI1_1), | 
|  | 1318 | PINMUX_IPSR_DATA(IP10_14_12, ARM_TRACEDATA_14), | 
|  | 1319 | PINMUX_IPSR_DATA(IP10_14_12, MT1_CLK), | 
|  | 1320 | PINMUX_IPSR_DATA(IP10_14_12, TS_SCK0), | 
|  | 1321 | PINMUX_IPSR_DATA(IP10_17_15, VI0_R5), | 
|  | 1322 | PINMUX_IPSR_DATA(IP10_17_15, ETH_TXD0), | 
|  | 1323 | PINMUX_IPSR_MODSEL_DATA(IP10_17_15, SD2_WP_B, SEL_SD2_1), | 
|  | 1324 | PINMUX_IPSR_MODSEL_DATA(IP10_17_15, HSPI_CS1_B, SEL_HSPI1_1), | 
|  | 1325 | PINMUX_IPSR_DATA(IP10_17_15, ARM_TRACEDATA_15), | 
|  | 1326 | PINMUX_IPSR_DATA(IP10_17_15, MT1_D), | 
|  | 1327 | PINMUX_IPSR_DATA(IP10_17_15, TS_SDEN0), | 
|  | 1328 | PINMUX_IPSR_DATA(IP10_20_18, VI0_R6), | 
|  | 1329 | PINMUX_IPSR_DATA(IP10_20_18, ETH_MDC), | 
|  | 1330 | PINMUX_IPSR_MODSEL_DATA(IP10_20_18, DREQ2_C, SEL_EXBUS2_2), | 
|  | 1331 | PINMUX_IPSR_DATA(IP10_20_18, HSPI_TX1_B), | 
|  | 1332 | PINMUX_IPSR_DATA(IP10_20_18, TRACECLK), | 
|  | 1333 | PINMUX_IPSR_DATA(IP10_20_18, MT1_BEN), | 
|  | 1334 | PINMUX_IPSR_MODSEL_DATA(IP10_20_18, PWMFSW0_D, SEL_PWMFSW_3), | 
|  | 1335 | PINMUX_IPSR_DATA(IP10_23_21, VI0_R7), | 
|  | 1336 | PINMUX_IPSR_DATA(IP10_23_21, ETH_MDIO), | 
|  | 1337 | PINMUX_IPSR_DATA(IP10_23_21, DACK2_C), | 
|  | 1338 | PINMUX_IPSR_MODSEL_DATA(IP10_23_21, HSPI_RX1_B, SEL_HSPI1_1), | 
|  | 1339 | PINMUX_IPSR_MODSEL_DATA(IP10_23_21, SCIF_CLK_D, SEL_SCIF_3), | 
|  | 1340 | PINMUX_IPSR_DATA(IP10_23_21, TRACECTL), | 
|  | 1341 | PINMUX_IPSR_DATA(IP10_23_21, MT1_PEN), | 
|  | 1342 | PINMUX_IPSR_DATA(IP10_25_24, VI1_CLK), | 
|  | 1343 | PINMUX_IPSR_MODSEL_DATA(IP10_25_24, SIM_D, SEL_SIM_0), | 
|  | 1344 | PINMUX_IPSR_MODSEL_DATA(IP10_25_24, SDA3, SEL_I2C3_0), | 
|  | 1345 | PINMUX_IPSR_DATA(IP10_28_26, VI1_HSYNC), | 
|  | 1346 | PINMUX_IPSR_DATA(IP10_28_26, VI3_CLK), | 
|  | 1347 | PINMUX_IPSR_DATA(IP10_28_26, SSI_SCK4), | 
|  | 1348 | PINMUX_IPSR_MODSEL_DATA(IP10_28_26, GPS_SIGN_C, SEL_GPS_2), | 
|  | 1349 | PINMUX_IPSR_MODSEL_DATA(IP10_28_26, PWMFSW0_E, SEL_PWMFSW_4), | 
|  | 1350 | PINMUX_IPSR_DATA(IP10_31_29, VI1_VSYNC), | 
|  | 1351 | PINMUX_IPSR_DATA(IP10_31_29, AUDIO_CLKOUT_C), | 
|  | 1352 | PINMUX_IPSR_DATA(IP10_31_29, SSI_WS4), | 
|  | 1353 | PINMUX_IPSR_DATA(IP10_31_29, SIM_CLK), | 
|  | 1354 | PINMUX_IPSR_MODSEL_DATA(IP10_31_29, GPS_MAG_C, SEL_GPS_2), | 
|  | 1355 | PINMUX_IPSR_DATA(IP10_31_29, SPV_TRST), | 
|  | 1356 | PINMUX_IPSR_MODSEL_DATA(IP10_31_29, SCL3, SEL_I2C3_0), | 
|  | 1357 |  | 
|  | 1358 | PINMUX_IPSR_DATA(IP11_2_0, VI1_DATA0_VI1_B0), | 
|  | 1359 | PINMUX_IPSR_MODSEL_DATA(IP11_2_0, SD2_DAT0, SEL_SD2_0), | 
|  | 1360 | PINMUX_IPSR_DATA(IP11_2_0, SIM_RST), | 
|  | 1361 | PINMUX_IPSR_DATA(IP11_2_0, SPV_TCK), | 
|  | 1362 | PINMUX_IPSR_DATA(IP11_2_0, ADICLK_B), | 
|  | 1363 | PINMUX_IPSR_DATA(IP11_5_3, VI1_DATA1_VI1_B1), | 
|  | 1364 | PINMUX_IPSR_MODSEL_DATA(IP11_5_3, SD2_DAT1, SEL_SD2_0), | 
|  | 1365 | PINMUX_IPSR_DATA(IP11_5_3, MT0_CLK), | 
|  | 1366 | PINMUX_IPSR_DATA(IP11_5_3, SPV_TMS), | 
|  | 1367 | PINMUX_IPSR_MODSEL_DATA(IP11_5_3, ADICS_B_SAMP_B, SEL_ADI_1), | 
|  | 1368 | PINMUX_IPSR_DATA(IP11_8_6, VI1_DATA2_VI1_B2), | 
|  | 1369 | PINMUX_IPSR_MODSEL_DATA(IP11_8_6, SD2_DAT2, SEL_SD2_0), | 
|  | 1370 | PINMUX_IPSR_DATA(IP11_8_6, MT0_D), | 
|  | 1371 | PINMUX_IPSR_DATA(IP11_8_6, SPVTDI), | 
|  | 1372 | PINMUX_IPSR_MODSEL_DATA(IP11_8_6, ADIDATA_B, SEL_ADI_1), | 
|  | 1373 | PINMUX_IPSR_DATA(IP11_11_9, VI1_DATA3_VI1_B3), | 
|  | 1374 | PINMUX_IPSR_MODSEL_DATA(IP11_11_9, SD2_DAT3, SEL_SD2_0), | 
|  | 1375 | PINMUX_IPSR_DATA(IP11_11_9, MT0_BEN), | 
|  | 1376 | PINMUX_IPSR_DATA(IP11_11_9, SPV_TDO), | 
|  | 1377 | PINMUX_IPSR_DATA(IP11_11_9, ADICHS0_B), | 
|  | 1378 | PINMUX_IPSR_DATA(IP11_14_12, VI1_DATA4_VI1_B4), | 
|  | 1379 | PINMUX_IPSR_DATA(IP11_14_12, SD2_CLK), | 
|  | 1380 | PINMUX_IPSR_DATA(IP11_14_12, MT0_PEN), | 
|  | 1381 | PINMUX_IPSR_DATA(IP11_14_12, SPA_TRST), | 
|  | 1382 | PINMUX_IPSR_MODSEL_DATA(IP11_14_12, HSPI_CLK1_D, SEL_HSPI1_3), | 
|  | 1383 | PINMUX_IPSR_DATA(IP11_14_12, ADICHS1_B), | 
|  | 1384 | PINMUX_IPSR_DATA(IP11_17_15, VI1_DATA5_VI1_B5), | 
|  | 1385 | PINMUX_IPSR_MODSEL_DATA(IP11_17_15, SD2_CMD, SEL_SD2_0), | 
|  | 1386 | PINMUX_IPSR_DATA(IP11_17_15, MT0_SYNC), | 
|  | 1387 | PINMUX_IPSR_DATA(IP11_17_15, SPA_TCK), | 
|  | 1388 | PINMUX_IPSR_MODSEL_DATA(IP11_17_15, HSPI_CS1_D, SEL_HSPI1_3), | 
|  | 1389 | PINMUX_IPSR_DATA(IP11_17_15, ADICHS2_B), | 
|  | 1390 | PINMUX_IPSR_DATA(IP11_20_18, VI1_DATA6_VI1_B6), | 
|  | 1391 | PINMUX_IPSR_MODSEL_DATA(IP11_20_18, SD2_CD, SEL_SD2_0), | 
|  | 1392 | PINMUX_IPSR_DATA(IP11_20_18, MT0_VCXO), | 
|  | 1393 | PINMUX_IPSR_DATA(IP11_20_18, SPA_TMS), | 
|  | 1394 | PINMUX_IPSR_DATA(IP11_20_18, HSPI_TX1_D), | 
|  | 1395 | PINMUX_IPSR_DATA(IP11_23_21, VI1_DATA7_VI1_B7), | 
|  | 1396 | PINMUX_IPSR_MODSEL_DATA(IP11_23_21, SD2_WP, SEL_SD2_0), | 
|  | 1397 | PINMUX_IPSR_DATA(IP11_23_21, MT0_PWM), | 
|  | 1398 | PINMUX_IPSR_DATA(IP11_23_21, SPA_TDI), | 
|  | 1399 | PINMUX_IPSR_MODSEL_DATA(IP11_23_21, HSPI_RX1_D, SEL_HSPI1_3), | 
|  | 1400 | PINMUX_IPSR_DATA(IP11_26_24, VI1_G0), | 
|  | 1401 | PINMUX_IPSR_DATA(IP11_26_24, VI3_DATA0), | 
|  | 1402 | PINMUX_IPSR_DATA(IP11_26_24, DU1_DOTCLKOUT1), | 
|  | 1403 | PINMUX_IPSR_DATA(IP11_26_24, TS_SCK1), | 
|  | 1404 | PINMUX_IPSR_MODSEL_DATA(IP11_26_24, DREQ2_B, SEL_EXBUS2_1), | 
|  | 1405 | PINMUX_IPSR_DATA(IP11_26_24, TX2), | 
|  | 1406 | PINMUX_IPSR_DATA(IP11_26_24, SPA_TDO), | 
|  | 1407 | PINMUX_IPSR_MODSEL_DATA(IP11_26_24, HCTS0_B, SEL_HSCIF0_1), | 
|  | 1408 | PINMUX_IPSR_DATA(IP11_29_27, VI1_G1), | 
|  | 1409 | PINMUX_IPSR_DATA(IP11_29_27, VI3_DATA1), | 
|  | 1410 | PINMUX_IPSR_DATA(IP11_29_27, SSI_SCK1), | 
|  | 1411 | PINMUX_IPSR_DATA(IP11_29_27, TS_SDEN1), | 
|  | 1412 | PINMUX_IPSR_DATA(IP11_29_27, DACK2_B), | 
|  | 1413 | PINMUX_IPSR_MODSEL_DATA(IP11_29_27, RX2, SEL_SCIF2_0), | 
|  | 1414 | PINMUX_IPSR_MODSEL_DATA(IP11_29_27, HRTS0_B, SEL_HSCIF0_1), | 
|  | 1415 |  | 
|  | 1416 | PINMUX_IPSR_DATA(IP12_2_0, VI1_G2), | 
|  | 1417 | PINMUX_IPSR_DATA(IP12_2_0, VI3_DATA2), | 
|  | 1418 | PINMUX_IPSR_DATA(IP12_2_0, SSI_WS1), | 
|  | 1419 | PINMUX_IPSR_DATA(IP12_2_0, TS_SPSYNC1), | 
|  | 1420 | PINMUX_IPSR_MODSEL_DATA(IP12_2_0, SCK2, SEL_SCIF2_0), | 
|  | 1421 | PINMUX_IPSR_MODSEL_DATA(IP12_2_0, HSCK0_B, SEL_HSCIF0_1), | 
|  | 1422 | PINMUX_IPSR_DATA(IP12_5_3, VI1_G3), | 
|  | 1423 | PINMUX_IPSR_DATA(IP12_5_3, VI3_DATA3), | 
|  | 1424 | PINMUX_IPSR_DATA(IP12_5_3, SSI_SCK2), | 
|  | 1425 | PINMUX_IPSR_DATA(IP12_5_3, TS_SDAT1), | 
|  | 1426 | PINMUX_IPSR_MODSEL_DATA(IP12_5_3, SCL1_C, SEL_I2C1_2), | 
|  | 1427 | PINMUX_IPSR_DATA(IP12_5_3, HTX0_B), | 
|  | 1428 | PINMUX_IPSR_DATA(IP12_8_6, VI1_G4), | 
|  | 1429 | PINMUX_IPSR_DATA(IP12_8_6, VI3_DATA4), | 
|  | 1430 | PINMUX_IPSR_DATA(IP12_8_6, SSI_WS2), | 
|  | 1431 | PINMUX_IPSR_MODSEL_DATA(IP12_8_6, SDA1_C, SEL_I2C1_2), | 
|  | 1432 | PINMUX_IPSR_DATA(IP12_8_6, SIM_RST_B), | 
|  | 1433 | PINMUX_IPSR_MODSEL_DATA(IP12_8_6, HRX0_B, SEL_HSCIF0_1), | 
|  | 1434 | PINMUX_IPSR_DATA(IP12_11_9, VI1_G5), | 
|  | 1435 | PINMUX_IPSR_DATA(IP12_11_9, VI3_DATA5), | 
|  | 1436 | PINMUX_IPSR_MODSEL_DATA(IP12_11_9, GPS_CLK, SEL_GPS_0), | 
|  | 1437 | PINMUX_IPSR_DATA(IP12_11_9, FSE), | 
|  | 1438 | PINMUX_IPSR_DATA(IP12_11_9, TX4_B), | 
|  | 1439 | PINMUX_IPSR_MODSEL_DATA(IP12_11_9, SIM_D_B, SEL_SIM_1), | 
|  | 1440 | PINMUX_IPSR_DATA(IP12_14_12, VI1_G6), | 
|  | 1441 | PINMUX_IPSR_DATA(IP12_14_12, VI3_DATA6), | 
|  | 1442 | PINMUX_IPSR_MODSEL_DATA(IP12_14_12, GPS_SIGN, SEL_GPS_0), | 
|  | 1443 | PINMUX_IPSR_DATA(IP12_14_12, FRB), | 
|  | 1444 | PINMUX_IPSR_MODSEL_DATA(IP12_14_12, RX4_B, SEL_SCIF4_1), | 
|  | 1445 | PINMUX_IPSR_DATA(IP12_14_12, SIM_CLK_B), | 
|  | 1446 | PINMUX_IPSR_DATA(IP12_17_15, VI1_G7), | 
|  | 1447 | PINMUX_IPSR_DATA(IP12_17_15, VI3_DATA7), | 
|  | 1448 | PINMUX_IPSR_MODSEL_DATA(IP12_17_15, GPS_MAG, SEL_GPS_0), | 
|  | 1449 | PINMUX_IPSR_DATA(IP12_17_15, FCE), | 
|  | 1450 | PINMUX_IPSR_MODSEL_DATA(IP12_17_15, SCK4_B, SEL_SCIF4_1), | 
| Magnus Damm | 19c43fc | 2011-12-14 01:36:22 +0900 | [diff] [blame] | 1451 | }; | 
|  | 1452 |  | 
|  | 1453 | static struct pinmux_gpio pinmux_gpios[] = { | 
|  | 1454 | PINMUX_GPIO_GP_ALL(), | 
| Magnus Damm | 2ecba2c | 2011-12-14 01:36:32 +0900 | [diff] [blame] | 1455 | GPIO_FN(AVS1), GPIO_FN(AVS2), GPIO_FN(A17), GPIO_FN(A18), | 
|  | 1456 | GPIO_FN(A19), | 
|  | 1457 |  | 
|  | 1458 | /* IPSR0 */ | 
|  | 1459 | GPIO_FN(PENC2), GPIO_FN(SCK0), GPIO_FN(PWM1), GPIO_FN(PWMFSW0), | 
|  | 1460 | GPIO_FN(SCIF_CLK), GPIO_FN(TCLK0_C), GPIO_FN(BS), GPIO_FN(SD1_DAT2), | 
|  | 1461 | GPIO_FN(MMC0_D2), GPIO_FN(FD2), GPIO_FN(ATADIR0), GPIO_FN(SDSELF), | 
|  | 1462 | GPIO_FN(HCTS1), GPIO_FN(TX4_C), GPIO_FN(A0), GPIO_FN(SD1_DAT3), | 
|  | 1463 | GPIO_FN(MMC0_D3), GPIO_FN(FD3), GPIO_FN(A20), GPIO_FN(TX5_D), | 
|  | 1464 | GPIO_FN(HSPI_TX2_B), GPIO_FN(A21), GPIO_FN(SCK5_D), | 
|  | 1465 | GPIO_FN(HSPI_CLK2_B), GPIO_FN(A22), GPIO_FN(RX5_D), | 
|  | 1466 | GPIO_FN(HSPI_RX2_B), GPIO_FN(VI1_R0), GPIO_FN(A23), GPIO_FN(FCLE), | 
|  | 1467 | GPIO_FN(HSPI_CLK2), GPIO_FN(VI1_R1), GPIO_FN(A24), GPIO_FN(SD1_CD), | 
|  | 1468 | GPIO_FN(MMC0_D4), GPIO_FN(FD4),	GPIO_FN(HSPI_CS2), GPIO_FN(VI1_R2), | 
|  | 1469 | GPIO_FN(SSI_WS78_B), GPIO_FN(A25), GPIO_FN(SD1_WP), GPIO_FN(MMC0_D5), | 
|  | 1470 | GPIO_FN(FD5), GPIO_FN(HSPI_RX2), GPIO_FN(VI1_R3), GPIO_FN(TX5_B), | 
|  | 1471 | GPIO_FN(SSI_SDATA7_B), GPIO_FN(CTS0_B), GPIO_FN(CLKOUT), | 
|  | 1472 | GPIO_FN(TX3C_IRDA_TX_C), GPIO_FN(PWM0_B), GPIO_FN(CS0), | 
|  | 1473 | GPIO_FN(HSPI_CS2_B), GPIO_FN(CS1_A26), GPIO_FN(HSPI_TX2), | 
|  | 1474 | GPIO_FN(SDSELF_B), GPIO_FN(RD_WR), GPIO_FN(FWE), GPIO_FN(ATAG0), | 
|  | 1475 | GPIO_FN(VI1_R7), GPIO_FN(HRTS1), GPIO_FN(RX4_C), | 
|  | 1476 |  | 
|  | 1477 | /* IPSR1 */ | 
|  | 1478 | GPIO_FN(EX_CS0), GPIO_FN(RX3_C_IRDA_RX_C), GPIO_FN(MMC0_D6), | 
|  | 1479 | GPIO_FN(FD6), GPIO_FN(EX_CS1), GPIO_FN(MMC0_D7), GPIO_FN(FD7), | 
|  | 1480 | GPIO_FN(EX_CS2), GPIO_FN(SD1_CLK), GPIO_FN(MMC0_CLK), GPIO_FN(FALE), | 
|  | 1481 | GPIO_FN(ATACS00), GPIO_FN(EX_CS3), GPIO_FN(SD1_CMD), GPIO_FN(MMC0_CMD), | 
|  | 1482 | GPIO_FN(FRE), GPIO_FN(ATACS10), GPIO_FN(VI1_R4), GPIO_FN(RX5_B), | 
|  | 1483 | GPIO_FN(HSCK1), GPIO_FN(SSI_SDATA8_B), GPIO_FN(RTS0_B_TANS_B), | 
|  | 1484 | GPIO_FN(SSI_SDATA9), GPIO_FN(EX_CS4), GPIO_FN(SD1_DAT0), | 
|  | 1485 | GPIO_FN(MMC0_D0), GPIO_FN(FD0), GPIO_FN(ATARD0), GPIO_FN(VI1_R5), | 
|  | 1486 | GPIO_FN(SCK5_B), GPIO_FN(HTX1), GPIO_FN(TX2_E), GPIO_FN(TX0_B), | 
|  | 1487 | GPIO_FN(SSI_SCK9), GPIO_FN(EX_CS5), GPIO_FN(SD1_DAT1), | 
|  | 1488 | GPIO_FN(MMC0_D1), GPIO_FN(FD1),	GPIO_FN(ATAWR0), GPIO_FN(VI1_R6), | 
|  | 1489 | GPIO_FN(HRX1), GPIO_FN(RX2_E), GPIO_FN(RX0_B), GPIO_FN(SSI_WS9), | 
|  | 1490 | GPIO_FN(MLB_CLK), GPIO_FN(PWM2), GPIO_FN(SCK4), GPIO_FN(MLB_SIG), | 
|  | 1491 | GPIO_FN(PWM3), GPIO_FN(TX4), GPIO_FN(MLB_DAT), GPIO_FN(PWM4), | 
|  | 1492 | GPIO_FN(RX4), GPIO_FN(HTX0), GPIO_FN(TX1), GPIO_FN(SDATA), | 
|  | 1493 | GPIO_FN(CTS0_C), GPIO_FN(SUB_TCK), GPIO_FN(CC5_STATE2), | 
|  | 1494 | GPIO_FN(CC5_STATE10), GPIO_FN(CC5_STATE18), GPIO_FN(CC5_STATE26), | 
|  | 1495 | GPIO_FN(CC5_STATE34), | 
|  | 1496 |  | 
|  | 1497 | /* IPSR2 */ | 
|  | 1498 | GPIO_FN(HRX0), GPIO_FN(RX1), GPIO_FN(SCKZ), GPIO_FN(RTS0_C_TANS_C), | 
|  | 1499 | GPIO_FN(SUB_TDI), GPIO_FN(CC5_STATE3), GPIO_FN(CC5_STATE11), | 
|  | 1500 | GPIO_FN(CC5_STATE19), GPIO_FN(CC5_STATE27), GPIO_FN(CC5_STATE35), | 
|  | 1501 | GPIO_FN(HSCK0), GPIO_FN(SCK1), GPIO_FN(MTS), GPIO_FN(PWM5), | 
|  | 1502 | GPIO_FN(SCK0_C), GPIO_FN(SSI_SDATA9_B), GPIO_FN(SUB_TDO), | 
|  | 1503 | GPIO_FN(CC5_STATE0), GPIO_FN(CC5_STATE8), GPIO_FN(CC5_STATE16), | 
|  | 1504 | GPIO_FN(CC5_STATE24), GPIO_FN(CC5_STATE32), GPIO_FN(HCTS0), | 
|  | 1505 | GPIO_FN(CTS1), GPIO_FN(STM), GPIO_FN(PWM0_D), GPIO_FN(RX0_C), | 
|  | 1506 | GPIO_FN(SCIF_CLK_C), GPIO_FN(SUB_TRST), GPIO_FN(TCLK1_B), | 
|  | 1507 | GPIO_FN(CC5_OSCOUT), GPIO_FN(HRTS0), GPIO_FN(RTS1_TANS), | 
|  | 1508 | GPIO_FN(MDATA), GPIO_FN(TX0_C), GPIO_FN(SUB_TMS), GPIO_FN(CC5_STATE1), | 
|  | 1509 | GPIO_FN(CC5_STATE9), GPIO_FN(CC5_STATE17), GPIO_FN(CC5_STATE25), | 
|  | 1510 | GPIO_FN(CC5_STATE33), GPIO_FN(DU0_DR0), GPIO_FN(LCDOUT0), | 
|  | 1511 | GPIO_FN(DREQ0), GPIO_FN(GPS_CLK_B), GPIO_FN(AUDATA0), | 
|  | 1512 | GPIO_FN(TX5_C), GPIO_FN(DU0_DR1), GPIO_FN(LCDOUT1), GPIO_FN(DACK0), | 
|  | 1513 | GPIO_FN(DRACK0), GPIO_FN(GPS_SIGN_B), GPIO_FN(AUDATA1), GPIO_FN(RX5_C), | 
|  | 1514 | GPIO_FN(DU0_DR2), GPIO_FN(LCDOUT2), GPIO_FN(DU0_DR3), GPIO_FN(LCDOUT3), | 
|  | 1515 | GPIO_FN(DU0_DR4), GPIO_FN(LCDOUT4), GPIO_FN(DU0_DR5), GPIO_FN(LCDOUT5), | 
|  | 1516 | GPIO_FN(DU0_DR6), GPIO_FN(LCDOUT6), GPIO_FN(DU0_DR7), GPIO_FN(LCDOUT7), | 
|  | 1517 | GPIO_FN(DU0_DG0), GPIO_FN(LCDOUT8), GPIO_FN(DREQ1), GPIO_FN(SCL2), | 
|  | 1518 | GPIO_FN(AUDATA2), | 
|  | 1519 |  | 
|  | 1520 | /* IPSR3 */ | 
|  | 1521 | GPIO_FN(DU0_DG1), GPIO_FN(LCDOUT9), GPIO_FN(DACK1), GPIO_FN(SDA2), | 
|  | 1522 | GPIO_FN(AUDATA3), GPIO_FN(DU0_DG2), GPIO_FN(LCDOUT10), | 
|  | 1523 | GPIO_FN(DU0_DG3), GPIO_FN(LCDOUT11), GPIO_FN(DU0_DG4), | 
|  | 1524 | GPIO_FN(LCDOUT12), GPIO_FN(DU0_DG5), GPIO_FN(LCDOUT13), | 
|  | 1525 | GPIO_FN(DU0_DG6), GPIO_FN(LCDOUT14), GPIO_FN(DU0_DG7), | 
|  | 1526 | GPIO_FN(LCDOUT15), GPIO_FN(DU0_DB0), GPIO_FN(LCDOUT16), | 
|  | 1527 | GPIO_FN(EX_WAIT1), GPIO_FN(SCL1), GPIO_FN(TCLK1), GPIO_FN(AUDATA4), | 
|  | 1528 | GPIO_FN(DU0_DB1), GPIO_FN(LCDOUT17), GPIO_FN(EX_WAIT2), GPIO_FN(SDA1), | 
|  | 1529 | GPIO_FN(GPS_MAG_B), GPIO_FN(AUDATA5), GPIO_FN(SCK5_C), | 
|  | 1530 | GPIO_FN(DU0_DB2), GPIO_FN(LCDOUT18), GPIO_FN(DU0_DB3), | 
|  | 1531 | GPIO_FN(LCDOUT19), GPIO_FN(DU0_DB4), GPIO_FN(LCDOUT20), | 
|  | 1532 | GPIO_FN(DU0_DB5), GPIO_FN(LCDOUT21), GPIO_FN(DU0_DB6), | 
|  | 1533 | GPIO_FN(LCDOUT22), GPIO_FN(DU0_DB7), GPIO_FN(LCDOUT23), | 
|  | 1534 | GPIO_FN(DU0_DOTCLKIN), GPIO_FN(QSTVA_QVS), GPIO_FN(TX3_D_IRDA_TX_D), | 
|  | 1535 | GPIO_FN(SCL3_B), GPIO_FN(DU0_DOTCLKOUT0), GPIO_FN(QCLK), | 
|  | 1536 | GPIO_FN(DU0_DOTCLKOUT1), GPIO_FN(QSTVB_QVE), GPIO_FN(RX3_D_IRDA_RX_D), | 
|  | 1537 | GPIO_FN(SDA3_B), GPIO_FN(SDA2_C), GPIO_FN(DACK0_B), GPIO_FN(DRACK0_B), | 
|  | 1538 | GPIO_FN(DU0_EXHSYNC_DU0_HSYNC), GPIO_FN(QSTH_QHS), | 
|  | 1539 | GPIO_FN(DU0_EXVSYNC_DU0_VSYNC), GPIO_FN(QSTB_QHE), | 
|  | 1540 | GPIO_FN(DU0_EXODDF_DU0_ODDF_DISP_CDE), GPIO_FN(QCPV_QDE), | 
|  | 1541 | GPIO_FN(CAN1_TX), GPIO_FN(TX2_C), GPIO_FN(SCL2_C), GPIO_FN(REMOCON), | 
|  | 1542 |  | 
|  | 1543 | /* IPSR4 */ | 
|  | 1544 | GPIO_FN(DU0_DISP), GPIO_FN(QPOLA), GPIO_FN(CAN_CLK_C), GPIO_FN(SCK2_C), | 
|  | 1545 | GPIO_FN(DU0_CDE), GPIO_FN(QPOLB), GPIO_FN(CAN1_RX), GPIO_FN(RX2_C), | 
|  | 1546 | GPIO_FN(DREQ0_B), GPIO_FN(SSI_SCK78_B), GPIO_FN(SCK0_B), | 
|  | 1547 | GPIO_FN(DU1_DR0), GPIO_FN(VI2_DATA0_VI2_B0), GPIO_FN(PWM6), | 
|  | 1548 | GPIO_FN(SD3_CLK), GPIO_FN(TX3_E_IRDA_TX_E), GPIO_FN(AUDCK), | 
|  | 1549 | GPIO_FN(PWMFSW0_B), GPIO_FN(DU1_DR1), GPIO_FN(VI2_DATA1_VI2_B1), | 
|  | 1550 | GPIO_FN(PWM0), GPIO_FN(SD3_CMD), GPIO_FN(RX3_E_IRDA_RX_E), | 
|  | 1551 | GPIO_FN(AUDSYNC), GPIO_FN(CTS0_D), GPIO_FN(DU1_DR2), GPIO_FN(VI2_G0), | 
|  | 1552 | GPIO_FN(DU1_DR3), GPIO_FN(VI2_G1), GPIO_FN(DU1_DR4), GPIO_FN(VI2_G2), | 
|  | 1553 | GPIO_FN(DU1_DR5), GPIO_FN(VI2_G3), GPIO_FN(DU1_DR6), GPIO_FN(VI2_G4), | 
|  | 1554 | GPIO_FN(DU1_DR7), GPIO_FN(VI2_G5), GPIO_FN(DU1_DG0), | 
|  | 1555 | GPIO_FN(VI2_DATA2_VI2_B2), GPIO_FN(SCL1_B), GPIO_FN(SD3_DAT2), | 
|  | 1556 | GPIO_FN(SCK3_E), GPIO_FN(AUDATA6), GPIO_FN(TX0_D), GPIO_FN(DU1_DG1), | 
|  | 1557 | GPIO_FN(VI2_DATA3_VI2_B3), GPIO_FN(SDA1_B), GPIO_FN(SD3_DAT3), | 
|  | 1558 | GPIO_FN(SCK5), GPIO_FN(AUDATA7), GPIO_FN(RX0_D), GPIO_FN(DU1_DG2), | 
|  | 1559 | GPIO_FN(VI2_G6), GPIO_FN(DU1_DG3), GPIO_FN(VI2_G7), GPIO_FN(DU1_DG4), | 
|  | 1560 | GPIO_FN(VI2_R0), GPIO_FN(DU1_DG5), GPIO_FN(VI2_R1), GPIO_FN(DU1_DG6), | 
|  | 1561 | GPIO_FN(VI2_R2), GPIO_FN(DU1_DG7), GPIO_FN(VI2_R3), GPIO_FN(DU1_DB0), | 
|  | 1562 | GPIO_FN(VI2_DATA4_VI2_B4), GPIO_FN(SCL2_B), GPIO_FN(SD3_DAT0), | 
|  | 1563 | GPIO_FN(TX5), GPIO_FN(SCK0_D), | 
|  | 1564 |  | 
|  | 1565 | /* IPSR5 */ | 
|  | 1566 | GPIO_FN(DU1_DB1), GPIO_FN(VI2_DATA5_VI2_B5), GPIO_FN(SDA2_B), | 
|  | 1567 | GPIO_FN(SD3_DAT1), GPIO_FN(RX5), GPIO_FN(RTS0_D_TANS_D), | 
|  | 1568 | GPIO_FN(DU1_DB2), GPIO_FN(VI2_R4), GPIO_FN(DU1_DB3), GPIO_FN(VI2_R5), | 
|  | 1569 | GPIO_FN(DU1_DB4), GPIO_FN(VI2_R6), GPIO_FN(DU1_DB5), GPIO_FN(VI2_R7), | 
|  | 1570 | GPIO_FN(DU1_DB6), GPIO_FN(SCL2_D), GPIO_FN(DU1_DB7), GPIO_FN(SDA2_D), | 
|  | 1571 | GPIO_FN(DU1_DOTCLKIN), GPIO_FN(VI2_CLKENB), GPIO_FN(HSPI_CS1), | 
|  | 1572 | GPIO_FN(SCL1_D), GPIO_FN(DU1_DOTCLKOUT), GPIO_FN(VI2_FIELD), | 
|  | 1573 | GPIO_FN(SDA1_D), GPIO_FN(DU1_EXHSYNC_DU1_HSYNC), GPIO_FN(VI2_HSYNC), | 
|  | 1574 | GPIO_FN(VI3_HSYNC), GPIO_FN(DU1_EXVSYNC_DU1_VSYNC), GPIO_FN(VI2_VSYNC), | 
|  | 1575 | GPIO_FN(VI3_VSYNC), GPIO_FN(DU1_EXODDF_DU1_ODDF_DISP_CDE), | 
|  | 1576 | GPIO_FN(VI2_CLK), GPIO_FN(TX3_B_IRDA_TX_B), GPIO_FN(SD3_CD), | 
|  | 1577 | GPIO_FN(HSPI_TX1), GPIO_FN(VI1_CLKENB), GPIO_FN(VI3_CLKENB), | 
|  | 1578 | GPIO_FN(AUDIO_CLKC), GPIO_FN(TX2_D), GPIO_FN(SPEEDIN), | 
|  | 1579 | GPIO_FN(GPS_SIGN_D), GPIO_FN(DU1_DISP), GPIO_FN(VI2_DATA6_VI2_B6), | 
|  | 1580 | GPIO_FN(TCLK0), GPIO_FN(QSTVA_B_QVS_B), GPIO_FN(HSPI_CLK1), | 
|  | 1581 | GPIO_FN(SCK2_D), GPIO_FN(AUDIO_CLKOUT_B), GPIO_FN(GPS_MAG_D), | 
|  | 1582 | GPIO_FN(DU1_CDE), GPIO_FN(VI2_DATA7_VI2_B7), GPIO_FN(RX3_B_IRDA_RX_B), | 
|  | 1583 | GPIO_FN(SD3_WP), GPIO_FN(HSPI_RX1), GPIO_FN(VI1_FIELD), | 
|  | 1584 | GPIO_FN(VI3_FIELD), GPIO_FN(AUDIO_CLKOUT), GPIO_FN(RX2_D), | 
|  | 1585 | GPIO_FN(GPS_CLK_C), GPIO_FN(GPS_CLK_D), GPIO_FN(AUDIO_CLKA), | 
|  | 1586 | GPIO_FN(CAN_TXCLK), GPIO_FN(AUDIO_CLKB), GPIO_FN(USB_OVC2), | 
|  | 1587 | GPIO_FN(CAN_DEBUGOUT0), GPIO_FN(MOUT0), | 
|  | 1588 |  | 
|  | 1589 | /* IPSR6 */ | 
|  | 1590 | GPIO_FN(SSI_SCK0129), GPIO_FN(CAN_DEBUGOUT1), GPIO_FN(MOUT1), | 
|  | 1591 | GPIO_FN(SSI_WS0129), GPIO_FN(CAN_DEBUGOUT2), GPIO_FN(MOUT2), | 
|  | 1592 | GPIO_FN(SSI_SDATA0), GPIO_FN(CAN_DEBUGOUT3), GPIO_FN(MOUT5), | 
|  | 1593 | GPIO_FN(SSI_SDATA1), GPIO_FN(CAN_DEBUGOUT4), GPIO_FN(MOUT6), | 
|  | 1594 | GPIO_FN(SSI_SDATA2), GPIO_FN(CAN_DEBUGOUT5), GPIO_FN(SSI_SCK34), | 
|  | 1595 | GPIO_FN(CAN_DEBUGOUT6), GPIO_FN(CAN0_TX_B), GPIO_FN(IERX), | 
|  | 1596 | GPIO_FN(SSI_SCK9_C), GPIO_FN(SSI_WS34), GPIO_FN(CAN_DEBUGOUT7), | 
|  | 1597 | GPIO_FN(CAN0_RX_B), GPIO_FN(IETX), GPIO_FN(SSI_WS9_C), | 
|  | 1598 | GPIO_FN(SSI_SDATA3), GPIO_FN(PWM0_C), GPIO_FN(CAN_DEBUGOUT8), | 
|  | 1599 | GPIO_FN(CAN_CLK_B), GPIO_FN(IECLK), GPIO_FN(SCIF_CLK_B), | 
|  | 1600 | GPIO_FN(TCLK0_B), GPIO_FN(SSI_SDATA4), GPIO_FN(CAN_DEBUGOUT9), | 
|  | 1601 | GPIO_FN(SSI_SDATA9_C), GPIO_FN(SSI_SCK5), GPIO_FN(ADICLK), | 
|  | 1602 | GPIO_FN(CAN_DEBUGOUT10), GPIO_FN(SCK3), GPIO_FN(TCLK0_D), | 
|  | 1603 | GPIO_FN(SSI_WS5), GPIO_FN(ADICS_SAMP), GPIO_FN(CAN_DEBUGOUT11), | 
|  | 1604 | GPIO_FN(TX3_IRDA_TX), GPIO_FN(SSI_SDATA5), GPIO_FN(ADIDATA), | 
|  | 1605 | GPIO_FN(CAN_DEBUGOUT12), GPIO_FN(RX3_IRDA_RX), GPIO_FN(SSI_SCK6), | 
|  | 1606 | GPIO_FN(ADICHS0), GPIO_FN(CAN0_TX), GPIO_FN(IERX_B), | 
|  | 1607 |  | 
|  | 1608 | /* IPSR7 */ | 
|  | 1609 | GPIO_FN(SSI_WS6), GPIO_FN(ADICHS1), GPIO_FN(CAN0_RX), GPIO_FN(IETX_B), | 
|  | 1610 | GPIO_FN(SSI_SDATA6), GPIO_FN(ADICHS2), GPIO_FN(CAN_CLK), | 
|  | 1611 | GPIO_FN(IECLK_B), GPIO_FN(SSI_SCK78), GPIO_FN(CAN_DEBUGOUT13), | 
|  | 1612 | GPIO_FN(IRQ0_B), GPIO_FN(SSI_SCK9_B), GPIO_FN(HSPI_CLK1_C), | 
|  | 1613 | GPIO_FN(SSI_WS78), GPIO_FN(CAN_DEBUGOUT14), GPIO_FN(IRQ1_B), | 
|  | 1614 | GPIO_FN(SSI_WS9_B), GPIO_FN(HSPI_CS1_C), GPIO_FN(SSI_SDATA7), | 
|  | 1615 | GPIO_FN(CAN_DEBUGOUT15), GPIO_FN(IRQ2_B), GPIO_FN(TCLK1_C), | 
|  | 1616 | GPIO_FN(HSPI_TX1_C), GPIO_FN(SSI_SDATA8), GPIO_FN(VSP), | 
|  | 1617 | GPIO_FN(IRQ3_B), GPIO_FN(HSPI_RX1_C), GPIO_FN(SD0_CLK), | 
|  | 1618 | GPIO_FN(ATACS01), GPIO_FN(SCK1_B), GPIO_FN(SD0_CMD), GPIO_FN(ATACS11), | 
|  | 1619 | GPIO_FN(TX1_B), GPIO_FN(CC5_TDO), GPIO_FN(SD0_DAT0), GPIO_FN(ATADIR1), | 
|  | 1620 | GPIO_FN(RX1_B), GPIO_FN(CC5_TRST), GPIO_FN(SD0_DAT1), GPIO_FN(ATAG1), | 
|  | 1621 | GPIO_FN(SCK2_B), GPIO_FN(CC5_TMS), GPIO_FN(SD0_DAT2), GPIO_FN(ATARD1), | 
|  | 1622 | GPIO_FN(TX2_B), GPIO_FN(CC5_TCK), GPIO_FN(SD0_DAT3), GPIO_FN(ATAWR1), | 
|  | 1623 | GPIO_FN(RX2_B), GPIO_FN(CC5_TDI), GPIO_FN(SD0_CD), GPIO_FN(DREQ2), | 
|  | 1624 | GPIO_FN(RTS1_B_TANS_B), GPIO_FN(SD0_WP), GPIO_FN(DACK2), | 
|  | 1625 | GPIO_FN(CTS1_B), | 
|  | 1626 |  | 
|  | 1627 | /* IPSR8 */ | 
|  | 1628 | GPIO_FN(HSPI_CLK0), GPIO_FN(CTS0), GPIO_FN(USB_OVC0), GPIO_FN(AD_CLK), | 
|  | 1629 | GPIO_FN(CC5_STATE4), GPIO_FN(CC5_STATE12), GPIO_FN(CC5_STATE20), | 
|  | 1630 | GPIO_FN(CC5_STATE28), GPIO_FN(CC5_STATE36), GPIO_FN(HSPI_CS0), | 
|  | 1631 | GPIO_FN(RTS0_TANS), GPIO_FN(USB_OVC1), GPIO_FN(AD_DI), | 
|  | 1632 | GPIO_FN(CC5_STATE5), GPIO_FN(CC5_STATE13), GPIO_FN(CC5_STATE21), | 
|  | 1633 | GPIO_FN(CC5_STATE29), GPIO_FN(CC5_STATE37), GPIO_FN(HSPI_TX0), | 
|  | 1634 | GPIO_FN(TX0), GPIO_FN(CAN_DEBUG_HW_TRIGGER), GPIO_FN(AD_DO), | 
|  | 1635 | GPIO_FN(CC5_STATE6), GPIO_FN(CC5_STATE14), GPIO_FN(CC5_STATE22), | 
|  | 1636 | GPIO_FN(CC5_STATE30), GPIO_FN(CC5_STATE38), GPIO_FN(HSPI_RX0), | 
|  | 1637 | GPIO_FN(RX0), GPIO_FN(CAN_STEP0), GPIO_FN(AD_NCS), GPIO_FN(CC5_STATE7), | 
|  | 1638 | GPIO_FN(CC5_STATE15), GPIO_FN(CC5_STATE23), GPIO_FN(CC5_STATE31), | 
|  | 1639 | GPIO_FN(CC5_STATE39), GPIO_FN(FMCLK), GPIO_FN(RDS_CLK), GPIO_FN(PCMOE), | 
|  | 1640 | GPIO_FN(BPFCLK), GPIO_FN(PCMWE), GPIO_FN(FMIN), GPIO_FN(RDS_DATA), | 
|  | 1641 | GPIO_FN(VI0_CLK), GPIO_FN(MMC1_CLK), GPIO_FN(VI0_CLKENB), | 
|  | 1642 | GPIO_FN(TX1_C), GPIO_FN(HTX1_B), GPIO_FN(MT1_SYNC), | 
|  | 1643 | GPIO_FN(VI0_FIELD), GPIO_FN(RX1_C), GPIO_FN(HRX1_B), | 
|  | 1644 | GPIO_FN(VI0_HSYNC), GPIO_FN(VI0_DATA0_B_VI0_B0_B), GPIO_FN(CTS1_C), | 
|  | 1645 | GPIO_FN(TX4_D), GPIO_FN(MMC1_CMD), GPIO_FN(HSCK1_B), | 
|  | 1646 | GPIO_FN(VI0_VSYNC), GPIO_FN(VI0_DATA1_B_VI0_B1_B), | 
|  | 1647 | GPIO_FN(RTS1_C_TANS_C), GPIO_FN(RX4_D), GPIO_FN(PWMFSW0_C), | 
|  | 1648 |  | 
|  | 1649 | /* IPSR9 */ | 
|  | 1650 | GPIO_FN(VI0_DATA0_VI0_B0), GPIO_FN(HRTS1_B), GPIO_FN(MT1_VCXO), | 
|  | 1651 | GPIO_FN(VI0_DATA1_VI0_B1), GPIO_FN(HCTS1_B), GPIO_FN(MT1_PWM), | 
|  | 1652 | GPIO_FN(VI0_DATA2_VI0_B2), GPIO_FN(MMC1_D0), GPIO_FN(VI0_DATA3_VI0_B3), | 
|  | 1653 | GPIO_FN(MMC1_D1), GPIO_FN(VI0_DATA4_VI0_B4), GPIO_FN(MMC1_D2), | 
|  | 1654 | GPIO_FN(VI0_DATA5_VI0_B5), GPIO_FN(MMC1_D3), GPIO_FN(VI0_DATA6_VI0_B6), | 
|  | 1655 | GPIO_FN(MMC1_D4), GPIO_FN(ARM_TRACEDATA_0), GPIO_FN(VI0_DATA7_VI0_B7), | 
|  | 1656 | GPIO_FN(MMC1_D5), GPIO_FN(ARM_TRACEDATA_1), GPIO_FN(VI0_G0), | 
|  | 1657 | GPIO_FN(SSI_SCK78_C), GPIO_FN(IRQ0), GPIO_FN(ARM_TRACEDATA_2), | 
|  | 1658 | GPIO_FN(VI0_G1), GPIO_FN(SSI_WS78_C), GPIO_FN(IRQ1), | 
|  | 1659 | GPIO_FN(ARM_TRACEDATA_3), GPIO_FN(VI0_G2), GPIO_FN(ETH_TXD1), | 
|  | 1660 | GPIO_FN(MMC1_D6), GPIO_FN(ARM_TRACEDATA_4), GPIO_FN(TS_SPSYNC0), | 
|  | 1661 | GPIO_FN(VI0_G3), GPIO_FN(ETH_CRS_DV), GPIO_FN(MMC1_D7), | 
|  | 1662 | GPIO_FN(ARM_TRACEDATA_5), GPIO_FN(TS_SDAT0), GPIO_FN(VI0_G4), | 
|  | 1663 | GPIO_FN(ETH_TX_EN), GPIO_FN(SD2_DAT0_B), GPIO_FN(ARM_TRACEDATA_6), | 
|  | 1664 | GPIO_FN(VI0_G5), GPIO_FN(ETH_RX_ER), GPIO_FN(SD2_DAT1_B), | 
|  | 1665 | GPIO_FN(ARM_TRACEDATA_7), GPIO_FN(VI0_G6), GPIO_FN(ETH_RXD0), | 
|  | 1666 | GPIO_FN(SD2_DAT2_B), GPIO_FN(ARM_TRACEDATA_8), GPIO_FN(VI0_G7), | 
|  | 1667 | GPIO_FN(ETH_RXD1), GPIO_FN(SD2_DAT3_B), GPIO_FN(ARM_TRACEDATA_9), | 
|  | 1668 |  | 
|  | 1669 | /* IPSR10 */ | 
|  | 1670 | GPIO_FN(VI0_R0), GPIO_FN(SSI_SDATA7_C), GPIO_FN(SCK1_C), | 
|  | 1671 | GPIO_FN(DREQ1_B), GPIO_FN(ARM_TRACEDATA_10), GPIO_FN(DREQ0_C), | 
|  | 1672 | GPIO_FN(VI0_R1), GPIO_FN(SSI_SDATA8_C), GPIO_FN(DACK1_B), | 
|  | 1673 | GPIO_FN(ARM_TRACEDATA_11), GPIO_FN(DACK0_C), GPIO_FN(DRACK0_C), | 
|  | 1674 | GPIO_FN(VI0_R2), GPIO_FN(ETH_LINK), GPIO_FN(SD2_CLK_B), GPIO_FN(IRQ2), | 
|  | 1675 | GPIO_FN(ARM_TRACEDATA_12), GPIO_FN(VI0_R3), GPIO_FN(ETH_MAGIC), | 
|  | 1676 | GPIO_FN(SD2_CMD_B), GPIO_FN(IRQ3), GPIO_FN(ARM_TRACEDATA_13), | 
|  | 1677 | GPIO_FN(VI0_R4), GPIO_FN(ETH_REFCLK), GPIO_FN(SD2_CD_B), | 
|  | 1678 | GPIO_FN(HSPI_CLK1_B), GPIO_FN(ARM_TRACEDATA_14), GPIO_FN(MT1_CLK), | 
|  | 1679 | GPIO_FN(TS_SCK0), GPIO_FN(VI0_R5), GPIO_FN(ETH_TXD0), | 
|  | 1680 | GPIO_FN(SD2_WP_B), GPIO_FN(HSPI_CS1_B), GPIO_FN(ARM_TRACEDATA_15), | 
|  | 1681 | GPIO_FN(MT1_D), GPIO_FN(TS_SDEN0), GPIO_FN(VI0_R6), GPIO_FN(ETH_MDC), | 
|  | 1682 | GPIO_FN(DREQ2_C), GPIO_FN(HSPI_TX1_B), GPIO_FN(TRACECLK), | 
|  | 1683 | GPIO_FN(MT1_BEN), GPIO_FN(PWMFSW0_D), GPIO_FN(VI0_R7), | 
|  | 1684 | GPIO_FN(ETH_MDIO), GPIO_FN(DACK2_C), GPIO_FN(HSPI_RX1_B), | 
|  | 1685 | GPIO_FN(SCIF_CLK_D), GPIO_FN(TRACECTL), GPIO_FN(MT1_PEN), | 
|  | 1686 | GPIO_FN(VI1_CLK), GPIO_FN(SIM_D), GPIO_FN(SDA3), GPIO_FN(VI1_HSYNC), | 
|  | 1687 | GPIO_FN(VI3_CLK), GPIO_FN(SSI_SCK4), GPIO_FN(GPS_SIGN_C), | 
|  | 1688 | GPIO_FN(PWMFSW0_E), GPIO_FN(VI1_VSYNC), GPIO_FN(AUDIO_CLKOUT_C), | 
|  | 1689 | GPIO_FN(SSI_WS4), GPIO_FN(SIM_CLK), GPIO_FN(GPS_MAG_C), | 
|  | 1690 | GPIO_FN(SPV_TRST), GPIO_FN(SCL3), | 
|  | 1691 |  | 
|  | 1692 | /* IPSR11 */ | 
|  | 1693 | GPIO_FN(VI1_DATA0_VI1_B0), GPIO_FN(SD2_DAT0), GPIO_FN(SIM_RST), | 
|  | 1694 | GPIO_FN(SPV_TCK), GPIO_FN(ADICLK_B), GPIO_FN(VI1_DATA1_VI1_B1), | 
|  | 1695 | GPIO_FN(SD2_DAT1), GPIO_FN(MT0_CLK), GPIO_FN(SPV_TMS), | 
|  | 1696 | GPIO_FN(ADICS_B_SAMP_B), GPIO_FN(VI1_DATA2_VI1_B2), GPIO_FN(SD2_DAT2), | 
|  | 1697 | GPIO_FN(MT0_D), GPIO_FN(SPVTDI), GPIO_FN(ADIDATA_B), | 
|  | 1698 | GPIO_FN(VI1_DATA3_VI1_B3), GPIO_FN(SD2_DAT3), GPIO_FN(MT0_BEN), | 
|  | 1699 | GPIO_FN(SPV_TDO), GPIO_FN(ADICHS0_B), GPIO_FN(VI1_DATA4_VI1_B4), | 
|  | 1700 | GPIO_FN(SD2_CLK), GPIO_FN(MT0_PEN), GPIO_FN(SPA_TRST), | 
|  | 1701 | GPIO_FN(HSPI_CLK1_D), GPIO_FN(ADICHS1_B), GPIO_FN(VI1_DATA5_VI1_B5), | 
|  | 1702 | GPIO_FN(SD2_CMD), GPIO_FN(MT0_SYNC), GPIO_FN(SPA_TCK), | 
|  | 1703 | GPIO_FN(HSPI_CS1_D), GPIO_FN(ADICHS2_B), GPIO_FN(VI1_DATA6_VI1_B6), | 
|  | 1704 | GPIO_FN(SD2_CD), GPIO_FN(MT0_VCXO), GPIO_FN(SPA_TMS), | 
|  | 1705 | GPIO_FN(HSPI_TX1_D), GPIO_FN(VI1_DATA7_VI1_B7), GPIO_FN(SD2_WP), | 
|  | 1706 | GPIO_FN(MT0_PWM), GPIO_FN(SPA_TDI), GPIO_FN(HSPI_RX1_D), | 
|  | 1707 | GPIO_FN(VI1_G0), GPIO_FN(VI3_DATA0), GPIO_FN(DU1_DOTCLKOUT1), | 
|  | 1708 | GPIO_FN(TS_SCK1), GPIO_FN(DREQ2_B), GPIO_FN(TX2), GPIO_FN(SPA_TDO), | 
|  | 1709 | GPIO_FN(HCTS0_B), GPIO_FN(VI1_G1), GPIO_FN(VI3_DATA1), | 
|  | 1710 | GPIO_FN(SSI_SCK1), GPIO_FN(TS_SDEN1), GPIO_FN(DACK2_B), GPIO_FN(RX2), | 
|  | 1711 | GPIO_FN(HRTS0_B), | 
|  | 1712 |  | 
|  | 1713 | /* IPSR12 */ | 
|  | 1714 | GPIO_FN(VI1_G2), GPIO_FN(VI3_DATA2), GPIO_FN(SSI_WS1), | 
|  | 1715 | GPIO_FN(TS_SPSYNC1), GPIO_FN(SCK2), GPIO_FN(HSCK0_B), GPIO_FN(VI1_G3), | 
|  | 1716 | GPIO_FN(VI3_DATA3), GPIO_FN(SSI_SCK2), GPIO_FN(TS_SDAT1), | 
|  | 1717 | GPIO_FN(SCL1_C), GPIO_FN(HTX0_B), GPIO_FN(VI1_G4), GPIO_FN(VI3_DATA4), | 
|  | 1718 | GPIO_FN(SSI_WS2), GPIO_FN(SDA1_C), GPIO_FN(SIM_RST_B), | 
|  | 1719 | GPIO_FN(HRX0_B), GPIO_FN(VI1_G5), GPIO_FN(VI3_DATA5), | 
|  | 1720 | GPIO_FN(GPS_CLK), GPIO_FN(FSE), GPIO_FN(TX4_B), GPIO_FN(SIM_D_B), | 
|  | 1721 | GPIO_FN(VI1_G6), GPIO_FN(VI3_DATA6), GPIO_FN(GPS_SIGN), GPIO_FN(FRB), | 
|  | 1722 | GPIO_FN(RX4_B), GPIO_FN(SIM_CLK_B), GPIO_FN(VI1_G7), | 
|  | 1723 | GPIO_FN(VI3_DATA7), GPIO_FN(GPS_MAG), GPIO_FN(FCE), GPIO_FN(SCK4_B), | 
| Magnus Damm | 19c43fc | 2011-12-14 01:36:22 +0900 | [diff] [blame] | 1724 | }; | 
|  | 1725 |  | 
|  | 1726 | static struct pinmux_cfg_reg pinmux_config_regs[] = { | 
|  | 1727 | { PINMUX_CFG_REG("GPSR0", 0xfffc0004, 32, 1) { | 
|  | 1728 | GP_0_31_FN, FN_IP3_31_29, | 
|  | 1729 | GP_0_30_FN, FN_IP3_26_24, | 
|  | 1730 | GP_0_29_FN, FN_IP3_22_21, | 
|  | 1731 | GP_0_28_FN, FN_IP3_14_12, | 
|  | 1732 | GP_0_27_FN, FN_IP3_11_9, | 
|  | 1733 | GP_0_26_FN, FN_IP3_2_0, | 
|  | 1734 | GP_0_25_FN, FN_IP2_30_28, | 
|  | 1735 | GP_0_24_FN, FN_IP2_21_19, | 
|  | 1736 | GP_0_23_FN, FN_IP2_18_16, | 
|  | 1737 | GP_0_22_FN, FN_IP0_30_28, | 
|  | 1738 | GP_0_21_FN, FN_IP0_5_3, | 
|  | 1739 | GP_0_20_FN, FN_IP1_18_15, | 
|  | 1740 | GP_0_19_FN, FN_IP1_14_11, | 
|  | 1741 | GP_0_18_FN, FN_IP1_10_7, | 
|  | 1742 | GP_0_17_FN, FN_IP1_6_4, | 
|  | 1743 | GP_0_16_FN, FN_IP1_3_2, | 
|  | 1744 | GP_0_15_FN, FN_IP1_1_0, | 
|  | 1745 | GP_0_14_FN, FN_IP0_27_26, | 
|  | 1746 | GP_0_13_FN, FN_IP0_25, | 
|  | 1747 | GP_0_12_FN, FN_IP0_24_23, | 
|  | 1748 | GP_0_11_FN, FN_IP0_22_19, | 
|  | 1749 | GP_0_10_FN, FN_IP0_18_16, | 
|  | 1750 | GP_0_9_FN, FN_IP0_15_14, | 
|  | 1751 | GP_0_8_FN, FN_IP0_13_12, | 
|  | 1752 | GP_0_7_FN, FN_IP0_11_10, | 
|  | 1753 | GP_0_6_FN, FN_IP0_9_8, | 
|  | 1754 | GP_0_5_FN, FN_A19, | 
|  | 1755 | GP_0_4_FN, FN_A18, | 
|  | 1756 | GP_0_3_FN, FN_A17, | 
|  | 1757 | GP_0_2_FN, FN_IP0_7_6, | 
|  | 1758 | GP_0_1_FN, FN_AVS2, | 
|  | 1759 | GP_0_0_FN, FN_AVS1 } | 
|  | 1760 | }, | 
|  | 1761 | { PINMUX_CFG_REG("GPSR1", 0xfffc0008, 32, 1) { | 
|  | 1762 | GP_1_31_FN, FN_IP5_23_21, | 
|  | 1763 | GP_1_30_FN, FN_IP5_20_17, | 
|  | 1764 | GP_1_29_FN, FN_IP5_16_15, | 
|  | 1765 | GP_1_28_FN, FN_IP5_14_13, | 
|  | 1766 | GP_1_27_FN, FN_IP5_12_11, | 
|  | 1767 | GP_1_26_FN, FN_IP5_10_9, | 
|  | 1768 | GP_1_25_FN, FN_IP5_8, | 
|  | 1769 | GP_1_24_FN, FN_IP5_7, | 
|  | 1770 | GP_1_23_FN, FN_IP5_6, | 
|  | 1771 | GP_1_22_FN, FN_IP5_5, | 
|  | 1772 | GP_1_21_FN, FN_IP5_4, | 
|  | 1773 | GP_1_20_FN, FN_IP5_3, | 
|  | 1774 | GP_1_19_FN, FN_IP5_2_0, | 
|  | 1775 | GP_1_18_FN, FN_IP4_31_29, | 
|  | 1776 | GP_1_17_FN, FN_IP4_28, | 
|  | 1777 | GP_1_16_FN, FN_IP4_27, | 
|  | 1778 | GP_1_15_FN, FN_IP4_26, | 
|  | 1779 | GP_1_14_FN, FN_IP4_25, | 
|  | 1780 | GP_1_13_FN, FN_IP4_24, | 
|  | 1781 | GP_1_12_FN, FN_IP4_23, | 
|  | 1782 | GP_1_11_FN, FN_IP4_22_20, | 
|  | 1783 | GP_1_10_FN, FN_IP4_19_17, | 
|  | 1784 | GP_1_9_FN, FN_IP4_16, | 
|  | 1785 | GP_1_8_FN, FN_IP4_15, | 
|  | 1786 | GP_1_7_FN, FN_IP4_14, | 
|  | 1787 | GP_1_6_FN, FN_IP4_13, | 
|  | 1788 | GP_1_5_FN, FN_IP4_12, | 
|  | 1789 | GP_1_4_FN, FN_IP4_11, | 
|  | 1790 | GP_1_3_FN, FN_IP4_10_8, | 
|  | 1791 | GP_1_2_FN, FN_IP4_7_5, | 
|  | 1792 | GP_1_1_FN, FN_IP4_4_2, | 
|  | 1793 | GP_1_0_FN, FN_IP4_1_0 } | 
|  | 1794 | }, | 
|  | 1795 | { PINMUX_CFG_REG("GPSR2", 0xfffc000c, 32, 1) { | 
|  | 1796 | GP_2_31_FN, FN_IP10_28_26, | 
|  | 1797 | GP_2_30_FN, FN_IP10_25_24, | 
|  | 1798 | GP_2_29_FN, FN_IP10_23_21, | 
|  | 1799 | GP_2_28_FN, FN_IP10_20_18, | 
|  | 1800 | GP_2_27_FN, FN_IP10_17_15, | 
|  | 1801 | GP_2_26_FN, FN_IP10_14_12, | 
|  | 1802 | GP_2_25_FN, FN_IP10_11_9, | 
|  | 1803 | GP_2_24_FN, FN_IP10_8_6, | 
|  | 1804 | GP_2_23_FN, FN_IP10_5_3, | 
|  | 1805 | GP_2_22_FN, FN_IP10_2_0, | 
|  | 1806 | GP_2_21_FN, FN_IP9_29_28, | 
|  | 1807 | GP_2_20_FN, FN_IP9_27_26, | 
|  | 1808 | GP_2_19_FN, FN_IP9_25_24, | 
|  | 1809 | GP_2_18_FN, FN_IP9_23_22, | 
|  | 1810 | GP_2_17_FN, FN_IP9_21_19, | 
|  | 1811 | GP_2_16_FN, FN_IP9_18_16, | 
|  | 1812 | GP_2_15_FN, FN_IP9_15_14, | 
|  | 1813 | GP_2_14_FN, FN_IP9_13_12, | 
|  | 1814 | GP_2_13_FN, FN_IP9_11_10, | 
|  | 1815 | GP_2_12_FN, FN_IP9_9_8, | 
|  | 1816 | GP_2_11_FN, FN_IP9_7, | 
|  | 1817 | GP_2_10_FN, FN_IP9_6, | 
|  | 1818 | GP_2_9_FN, FN_IP9_5, | 
|  | 1819 | GP_2_8_FN, FN_IP9_4, | 
|  | 1820 | GP_2_7_FN, FN_IP9_3_2, | 
|  | 1821 | GP_2_6_FN, FN_IP9_1_0, | 
|  | 1822 | GP_2_5_FN, FN_IP8_30_28, | 
|  | 1823 | GP_2_4_FN, FN_IP8_27_25, | 
|  | 1824 | GP_2_3_FN, FN_IP8_24_23, | 
|  | 1825 | GP_2_2_FN, FN_IP8_22_21, | 
|  | 1826 | GP_2_1_FN, FN_IP8_20, | 
|  | 1827 | GP_2_0_FN, FN_IP5_27_24 } | 
|  | 1828 | }, | 
|  | 1829 | { PINMUX_CFG_REG("GPSR3", 0xfffc0010, 32, 1) { | 
|  | 1830 | GP_3_31_FN, FN_IP6_3_2, | 
|  | 1831 | GP_3_30_FN, FN_IP6_1_0, | 
|  | 1832 | GP_3_29_FN, FN_IP5_30_29, | 
|  | 1833 | GP_3_28_FN, FN_IP5_28, | 
|  | 1834 | GP_3_27_FN, FN_IP1_24_23, | 
|  | 1835 | GP_3_26_FN, FN_IP1_22_21, | 
|  | 1836 | GP_3_25_FN, FN_IP1_20_19, | 
|  | 1837 | GP_3_24_FN, FN_IP7_26_25, | 
|  | 1838 | GP_3_23_FN, FN_IP7_24_23, | 
|  | 1839 | GP_3_22_FN, FN_IP7_22_21, | 
|  | 1840 | GP_3_21_FN, FN_IP7_20_19, | 
|  | 1841 | GP_3_20_FN, FN_IP7_30_29, | 
|  | 1842 | GP_3_19_FN, FN_IP7_28_27, | 
|  | 1843 | GP_3_18_FN, FN_IP7_18_17, | 
|  | 1844 | GP_3_17_FN, FN_IP7_16_15, | 
|  | 1845 | GP_3_16_FN, FN_IP12_17_15, | 
|  | 1846 | GP_3_15_FN, FN_IP12_14_12, | 
|  | 1847 | GP_3_14_FN, FN_IP12_11_9, | 
|  | 1848 | GP_3_13_FN, FN_IP12_8_6, | 
|  | 1849 | GP_3_12_FN, FN_IP12_5_3, | 
|  | 1850 | GP_3_11_FN, FN_IP12_2_0, | 
|  | 1851 | GP_3_10_FN, FN_IP11_29_27, | 
|  | 1852 | GP_3_9_FN, FN_IP11_26_24, | 
|  | 1853 | GP_3_8_FN, FN_IP11_23_21, | 
|  | 1854 | GP_3_7_FN, FN_IP11_20_18, | 
|  | 1855 | GP_3_6_FN, FN_IP11_17_15, | 
|  | 1856 | GP_3_5_FN, FN_IP11_14_12, | 
|  | 1857 | GP_3_4_FN, FN_IP11_11_9, | 
|  | 1858 | GP_3_3_FN, FN_IP11_8_6, | 
|  | 1859 | GP_3_2_FN, FN_IP11_5_3, | 
|  | 1860 | GP_3_1_FN, FN_IP11_2_0, | 
|  | 1861 | GP_3_0_FN, FN_IP10_31_29 } | 
|  | 1862 | }, | 
|  | 1863 | { PINMUX_CFG_REG("GPSR4", 0xfffc0014, 32, 1) { | 
|  | 1864 | GP_4_31_FN, FN_IP8_19, | 
|  | 1865 | GP_4_30_FN, FN_IP8_18, | 
|  | 1866 | GP_4_29_FN, FN_IP8_17_16, | 
|  | 1867 | GP_4_28_FN, FN_IP0_2_0, | 
|  | 1868 | GP_4_27_FN, FN_PENC1, | 
|  | 1869 | GP_4_26_FN, FN_PENC0, | 
|  | 1870 | GP_4_25_FN, FN_IP8_15_12, | 
|  | 1871 | GP_4_24_FN, FN_IP8_11_8, | 
|  | 1872 | GP_4_23_FN, FN_IP8_7_4, | 
|  | 1873 | GP_4_22_FN, FN_IP8_3_0, | 
|  | 1874 | GP_4_21_FN, FN_IP2_3_0, | 
|  | 1875 | GP_4_20_FN, FN_IP1_28_25, | 
|  | 1876 | GP_4_19_FN, FN_IP2_15_12, | 
|  | 1877 | GP_4_18_FN, FN_IP2_11_8, | 
|  | 1878 | GP_4_17_FN, FN_IP2_7_4, | 
|  | 1879 | GP_4_16_FN, FN_IP7_14_13, | 
|  | 1880 | GP_4_15_FN, FN_IP7_12_10, | 
|  | 1881 | GP_4_14_FN, FN_IP7_9_7, | 
|  | 1882 | GP_4_13_FN, FN_IP7_6_4, | 
|  | 1883 | GP_4_12_FN, FN_IP7_3_2, | 
|  | 1884 | GP_4_11_FN, FN_IP7_1_0, | 
|  | 1885 | GP_4_10_FN, FN_IP6_30_29, | 
|  | 1886 | GP_4_9_FN, FN_IP6_26_25, | 
|  | 1887 | GP_4_8_FN, FN_IP6_24_23, | 
|  | 1888 | GP_4_7_FN, FN_IP6_22_20, | 
|  | 1889 | GP_4_6_FN, FN_IP6_19_18, | 
|  | 1890 | GP_4_5_FN, FN_IP6_17_15, | 
|  | 1891 | GP_4_4_FN, FN_IP6_14_12, | 
|  | 1892 | GP_4_3_FN, FN_IP6_11_9, | 
|  | 1893 | GP_4_2_FN, FN_IP6_8, | 
|  | 1894 | GP_4_1_FN, FN_IP6_7_6, | 
|  | 1895 | GP_4_0_FN, FN_IP6_5_4 } | 
|  | 1896 | }, | 
|  | 1897 | { PINMUX_CFG_REG("GPSR5", 0xfffc0018, 32, 1) { | 
|  | 1898 | GP_5_31_FN, FN_IP3_5, | 
|  | 1899 | GP_5_30_FN, FN_IP3_4, | 
|  | 1900 | GP_5_29_FN, FN_IP3_3, | 
|  | 1901 | GP_5_28_FN, FN_IP2_27, | 
|  | 1902 | GP_5_27_FN, FN_IP2_26, | 
|  | 1903 | GP_5_26_FN, FN_IP2_25, | 
|  | 1904 | GP_5_25_FN, FN_IP2_24, | 
|  | 1905 | GP_5_24_FN, FN_IP2_23, | 
|  | 1906 | GP_5_23_FN, FN_IP2_22, | 
|  | 1907 | GP_5_22_FN, FN_IP3_28, | 
|  | 1908 | GP_5_21_FN, FN_IP3_27, | 
|  | 1909 | GP_5_20_FN, FN_IP3_23, | 
|  | 1910 | GP_5_19_FN, FN_EX_WAIT0, | 
|  | 1911 | GP_5_18_FN, FN_WE1, | 
|  | 1912 | GP_5_17_FN, FN_WE0, | 
|  | 1913 | GP_5_16_FN, FN_RD, | 
|  | 1914 | GP_5_15_FN, FN_A16, | 
|  | 1915 | GP_5_14_FN, FN_A15, | 
|  | 1916 | GP_5_13_FN, FN_A14, | 
|  | 1917 | GP_5_12_FN, FN_A13, | 
|  | 1918 | GP_5_11_FN, FN_A12, | 
|  | 1919 | GP_5_10_FN, FN_A11, | 
|  | 1920 | GP_5_9_FN, FN_A10, | 
|  | 1921 | GP_5_8_FN, FN_A9, | 
|  | 1922 | GP_5_7_FN, FN_A8, | 
|  | 1923 | GP_5_6_FN, FN_A7, | 
|  | 1924 | GP_5_5_FN, FN_A6, | 
|  | 1925 | GP_5_4_FN, FN_A5, | 
|  | 1926 | GP_5_3_FN, FN_A4, | 
|  | 1927 | GP_5_2_FN, FN_A3, | 
|  | 1928 | GP_5_1_FN, FN_A2, | 
|  | 1929 | GP_5_0_FN, FN_A1 } | 
|  | 1930 | }, | 
|  | 1931 | { PINMUX_CFG_REG("GPSR6", 0xfffc001c, 32, 1) { | 
|  | 1932 | 0, 0, 0, 0, 0, 0, 0, 0,	0, 0, 0, 0, 0, 0, 0, 0, | 
|  | 1933 | 0, 0, 0, 0, 0, 0, 0, 0,	0, 0, 0, 0, 0, 0, 0, 0, | 
|  | 1934 | 0, 0, 0, 0, 0, 0, 0, 0, | 
|  | 1935 | 0, 0, | 
|  | 1936 | 0, 0, | 
|  | 1937 | 0, 0, | 
|  | 1938 | GP_6_8_FN, FN_IP3_20, | 
|  | 1939 | GP_6_7_FN, FN_IP3_19, | 
|  | 1940 | GP_6_6_FN, FN_IP3_18, | 
|  | 1941 | GP_6_5_FN, FN_IP3_17, | 
|  | 1942 | GP_6_4_FN, FN_IP3_16, | 
|  | 1943 | GP_6_3_FN, FN_IP3_15, | 
|  | 1944 | GP_6_2_FN, FN_IP3_8, | 
|  | 1945 | GP_6_1_FN, FN_IP3_7, | 
|  | 1946 | GP_6_0_FN, FN_IP3_6 } | 
|  | 1947 | }, | 
| Magnus Damm | 2ecba2c | 2011-12-14 01:36:32 +0900 | [diff] [blame] | 1948 |  | 
|  | 1949 | { PINMUX_CFG_REG_VAR("IPSR0", 0xfffc0020, 32, | 
|  | 1950 | 1, 3, 2, 1, 2, 4, 3, 2, 2, 2, 2, 2, 3, 3) { | 
|  | 1951 | /* IP0_31 [1] */ | 
|  | 1952 | 0, 0, | 
|  | 1953 | /* IP0_30_28 [3] */ | 
|  | 1954 | FN_RD_WR, FN_FWE, FN_ATAG0, FN_VI1_R7, | 
|  | 1955 | FN_HRTS1, FN_RX4_C, 0, 0, | 
|  | 1956 | /* IP0_27_26 [2] */ | 
|  | 1957 | FN_CS1_A26, FN_HSPI_TX2, FN_SDSELF_B, 0, | 
|  | 1958 | /* IP0_25 [1] */ | 
|  | 1959 | FN_CS0, FN_HSPI_CS2_B, | 
|  | 1960 | /* IP0_24_23 [2] */ | 
|  | 1961 | FN_CLKOUT, FN_TX3C_IRDA_TX_C, FN_PWM0_B, 0, | 
|  | 1962 | /* IP0_22_19 [4] */ | 
|  | 1963 | FN_A25, FN_SD1_WP, FN_MMC0_D5, FN_FD5, | 
|  | 1964 | FN_HSPI_RX2, FN_VI1_R3, FN_TX5_B, FN_SSI_SDATA7_B, | 
|  | 1965 | FN_CTS0_B, 0, 0, 0, | 
|  | 1966 | 0, 0, 0, 0, | 
|  | 1967 | /* IP0_18_16 [3] */ | 
|  | 1968 | FN_A24, FN_SD1_CD, FN_MMC0_D4, FN_FD4, | 
|  | 1969 | FN_HSPI_CS2, FN_VI1_R2, FN_SSI_WS78_B, 0, | 
|  | 1970 | /* IP0_15_14 [2] */ | 
|  | 1971 | FN_A23, FN_FCLE, FN_HSPI_CLK2, FN_VI1_R1, | 
|  | 1972 | /* IP0_13_12 [2] */ | 
|  | 1973 | FN_A22, FN_RX5_D, FN_HSPI_RX2_B, FN_VI1_R0, | 
|  | 1974 | /* IP0_11_10 [2] */ | 
|  | 1975 | FN_A21, FN_SCK5_D, FN_HSPI_CLK2_B, 0, | 
|  | 1976 | /* IP0_9_8 [2] */ | 
|  | 1977 | FN_A20, FN_TX5_D, FN_HSPI_TX2_B, 0, | 
|  | 1978 | /* IP0_7_6 [2] */ | 
|  | 1979 | FN_A0, FN_SD1_DAT3, FN_MMC0_D3, FN_FD3, | 
|  | 1980 | /* IP0_5_3 [3] */ | 
|  | 1981 | FN_BS, FN_SD1_DAT2, FN_MMC0_D2, FN_FD2, | 
|  | 1982 | FN_ATADIR0, FN_SDSELF, FN_HCTS1, FN_TX4_C, | 
|  | 1983 | /* IP0_2_0 [3] */ | 
|  | 1984 | FN_PENC2, FN_SCK0, FN_PWM1, FN_PWMFSW0, | 
|  | 1985 | FN_SCIF_CLK, FN_TCLK0_C, 0, 0 } | 
|  | 1986 | }, | 
|  | 1987 | { PINMUX_CFG_REG_VAR("IPSR1", 0xfffc0024, 32, | 
|  | 1988 | 3, 4, 2, 2, 2, 4, 4, 4, 3, 2, 2) { | 
|  | 1989 | /* IP1_31_29 [3] */ | 
|  | 1990 | 0, 0, 0, 0, 0, 0, 0, 0, | 
|  | 1991 | /* IP1_28_25 [4] */ | 
|  | 1992 | FN_HTX0, FN_TX1, FN_SDATA, FN_CTS0_C, | 
|  | 1993 | FN_SUB_TCK, FN_CC5_STATE2, FN_CC5_STATE10, FN_CC5_STATE18, | 
|  | 1994 | FN_CC5_STATE26, FN_CC5_STATE34, 0, 0, | 
|  | 1995 | 0, 0, 0, 0, | 
|  | 1996 | /* IP1_24_23 [2] */ | 
|  | 1997 | FN_MLB_DAT, FN_PWM4, FN_RX4, 0, | 
|  | 1998 | /* IP1_22_21 [2] */ | 
|  | 1999 | FN_MLB_SIG, FN_PWM3, FN_TX4, 0, | 
|  | 2000 | /* IP1_20_19 [2] */ | 
|  | 2001 | FN_MLB_CLK, FN_PWM2, FN_SCK4, 0, | 
|  | 2002 | /* IP1_18_15 [4] */ | 
|  | 2003 | FN_EX_CS5, FN_SD1_DAT1, FN_MMC0_D1, FN_FD1, | 
|  | 2004 | FN_ATAWR0, FN_VI1_R6, FN_HRX1, FN_RX2_E, | 
|  | 2005 | FN_RX0_B, FN_SSI_WS9, 0, 0, | 
|  | 2006 | 0, 0, 0, 0, | 
|  | 2007 | /* IP1_14_11 [4] */ | 
|  | 2008 | FN_EX_CS4, FN_SD1_DAT0, FN_MMC0_D0, FN_FD0, | 
|  | 2009 | FN_ATARD0, FN_VI1_R5, FN_SCK5_B, FN_HTX1, | 
|  | 2010 | FN_TX2_E, FN_TX0_B, FN_SSI_SCK9, 0, | 
|  | 2011 | 0, 0, 0, 0, | 
|  | 2012 | /* IP1_10_7 [4] */ | 
|  | 2013 | FN_EX_CS3, FN_SD1_CMD, FN_MMC0_CMD, FN_FRE, | 
|  | 2014 | FN_ATACS10, FN_VI1_R4, FN_RX5_B, FN_HSCK1, | 
|  | 2015 | FN_SSI_SDATA8_B, FN_RTS0_B_TANS_B, FN_SSI_SDATA9, 0, | 
|  | 2016 | 0, 0, 0, 0, | 
|  | 2017 | /* IP1_6_4 [3] */ | 
|  | 2018 | FN_EX_CS2, FN_SD1_CLK, FN_MMC0_CLK, FN_FALE, | 
|  | 2019 | FN_ATACS00, 0, 0, 0, | 
|  | 2020 | /* IP1_3_2 [2] */ | 
|  | 2021 | FN_EX_CS1, FN_MMC0_D7, FN_FD7, 0, | 
|  | 2022 | /* IP1_1_0 [2] */ | 
|  | 2023 | FN_EX_CS0, FN_RX3_C_IRDA_RX_C, FN_MMC0_D6, FN_FD6 } | 
|  | 2024 | }, | 
|  | 2025 | { PINMUX_CFG_REG_VAR("IPSR2", 0xfffc0028, 32, | 
|  | 2026 | 1, 3, 1, 1, 1, 1, 1, 1, 3, 3, 4, 4, 4, 4) { | 
|  | 2027 | /* IP2_31 [1] */ | 
|  | 2028 | 0, 0, | 
|  | 2029 | /* IP2_30_28 [3] */ | 
|  | 2030 | FN_DU0_DG0, FN_LCDOUT8, FN_DREQ1, FN_SCL2, | 
|  | 2031 | FN_AUDATA2, 0, 0, 0, | 
|  | 2032 | /* IP2_27 [1] */ | 
|  | 2033 | FN_DU0_DR7, FN_LCDOUT7, | 
|  | 2034 | /* IP2_26 [1] */ | 
|  | 2035 | FN_DU0_DR6, FN_LCDOUT6, | 
|  | 2036 | /* IP2_25 [1] */ | 
|  | 2037 | FN_DU0_DR5, FN_LCDOUT5, | 
|  | 2038 | /* IP2_24 [1] */ | 
|  | 2039 | FN_DU0_DR4, FN_LCDOUT4, | 
|  | 2040 | /* IP2_23 [1] */ | 
|  | 2041 | FN_DU0_DR3, FN_LCDOUT3, | 
|  | 2042 | /* IP2_22 [1] */ | 
|  | 2043 | FN_DU0_DR2, FN_LCDOUT2, | 
|  | 2044 | /* IP2_21_19 [3] */ | 
|  | 2045 | FN_DU0_DR1, FN_LCDOUT1, FN_DACK0, FN_DRACK0, | 
|  | 2046 | FN_GPS_SIGN_B, FN_AUDATA1, FN_RX5_C, 0, | 
|  | 2047 | /* IP2_18_16 [3] */ | 
|  | 2048 | FN_DU0_DR0, FN_LCDOUT0, FN_DREQ0, FN_GPS_CLK_B, | 
|  | 2049 | FN_AUDATA0, FN_TX5_C, 0, 0, | 
|  | 2050 | /* IP2_15_12 [4] */ | 
|  | 2051 | FN_HRTS0, FN_RTS1_TANS, FN_MDATA, FN_TX0_C, | 
|  | 2052 | FN_SUB_TMS, FN_CC5_STATE1, FN_CC5_STATE9, FN_CC5_STATE17, | 
|  | 2053 | FN_CC5_STATE25, FN_CC5_STATE33, 0, 0, | 
|  | 2054 | 0, 0, 0, 0, | 
|  | 2055 | /* IP2_11_8 [4] */ | 
|  | 2056 | FN_HCTS0, FN_CTS1, FN_STM, FN_PWM0_D, | 
|  | 2057 | FN_RX0_C, FN_SCIF_CLK_C, FN_SUB_TRST, FN_TCLK1_B, | 
|  | 2058 | FN_CC5_OSCOUT, 0, 0, 0, | 
|  | 2059 | 0, 0, 0, 0, | 
|  | 2060 | /* IP2_7_4 [4] */ | 
|  | 2061 | FN_HSCK0, FN_SCK1, FN_MTS, FN_PWM5, | 
|  | 2062 | FN_SCK0_C, FN_SSI_SDATA9_B, FN_SUB_TDO, FN_CC5_STATE0, | 
|  | 2063 | FN_CC5_STATE8, FN_CC5_STATE16, FN_CC5_STATE24, FN_CC5_STATE32, | 
|  | 2064 | 0, 0, 0, 0, | 
|  | 2065 | /* IP2_3_0 [4] */ | 
|  | 2066 | FN_HRX0, FN_RX1, FN_SCKZ, FN_RTS0_C_TANS_C, | 
|  | 2067 | FN_SUB_TDI, FN_CC5_STATE3, FN_CC5_STATE11, FN_CC5_STATE19, | 
|  | 2068 | FN_CC5_STATE27, FN_CC5_STATE35, 0, 0, | 
|  | 2069 | 0, 0, 0, 0 } | 
|  | 2070 | }, | 
|  | 2071 | { PINMUX_CFG_REG_VAR("IPSR3", 0xfffc002c, 32, | 
|  | 2072 | 3, 1, 1, 3, 1, 2, 1, 1, 1, 1, 1, | 
|  | 2073 | 1, 3, 3, 1, 1, 1, 1, 1, 1, 3) { | 
|  | 2074 | /* IP3_31_29 [3] */ | 
|  | 2075 | FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, FN_QCPV_QDE, FN_CAN1_TX, FN_TX2_C, | 
|  | 2076 | FN_SCL2_C, FN_REMOCON, 0, 0, | 
|  | 2077 | /* IP3_28 [1] */ | 
|  | 2078 | FN_DU0_EXVSYNC_DU0_VSYNC, FN_QSTB_QHE, | 
|  | 2079 | /* IP3_27 [1] */ | 
|  | 2080 | FN_DU0_EXHSYNC_DU0_HSYNC, FN_QSTH_QHS, | 
|  | 2081 | /* IP3_26_24 [3] */ | 
|  | 2082 | FN_DU0_DOTCLKOUT1, FN_QSTVB_QVE, FN_RX3_D_IRDA_RX_D, FN_SDA3_B, | 
|  | 2083 | FN_SDA2_C, FN_DACK0_B, FN_DRACK0_B, 0, | 
|  | 2084 | /* IP3_23 [1] */ | 
|  | 2085 | FN_DU0_DOTCLKOUT0, FN_QCLK, | 
|  | 2086 | /* IP3_22_21 [2] */ | 
|  | 2087 | FN_DU0_DOTCLKIN, FN_QSTVA_QVS, FN_TX3_D_IRDA_TX_D, FN_SCL3_B, | 
|  | 2088 | /* IP3_20 [1] */ | 
|  | 2089 | FN_DU0_DB7, FN_LCDOUT23, | 
|  | 2090 | /* IP3_19 [1] */ | 
|  | 2091 | FN_DU0_DB6, FN_LCDOUT22, | 
|  | 2092 | /* IP3_18 [1] */ | 
|  | 2093 | FN_DU0_DB5, FN_LCDOUT21, | 
|  | 2094 | /* IP3_17 [1] */ | 
|  | 2095 | FN_DU0_DB4, FN_LCDOUT20, | 
|  | 2096 | /* IP3_16 [1] */ | 
|  | 2097 | FN_DU0_DB3, FN_LCDOUT19, | 
|  | 2098 | /* IP3_15 [1] */ | 
|  | 2099 | FN_DU0_DB2, FN_LCDOUT18, | 
|  | 2100 | /* IP3_14_12 [3] */ | 
|  | 2101 | FN_DU0_DB1, FN_LCDOUT17, FN_EX_WAIT2, FN_SDA1, | 
|  | 2102 | FN_GPS_MAG_B, FN_AUDATA5, FN_SCK5_C, 0, | 
|  | 2103 | /* IP3_11_9 [3] */ | 
|  | 2104 | FN_DU0_DB0, FN_LCDOUT16, FN_EX_WAIT1, FN_SCL1, | 
|  | 2105 | FN_TCLK1, FN_AUDATA4, 0, 0, | 
|  | 2106 | /* IP3_8 [1] */ | 
|  | 2107 | FN_DU0_DG7, FN_LCDOUT15, | 
|  | 2108 | /* IP3_7 [1] */ | 
|  | 2109 | FN_DU0_DG6, FN_LCDOUT14, | 
|  | 2110 | /* IP3_6 [1] */ | 
|  | 2111 | FN_DU0_DG5, FN_LCDOUT13, | 
|  | 2112 | /* IP3_5 [1] */ | 
|  | 2113 | FN_DU0_DG4, FN_LCDOUT12, | 
|  | 2114 | /* IP3_4 [1] */ | 
|  | 2115 | FN_DU0_DG3, FN_LCDOUT11, | 
|  | 2116 | /* IP3_3 [1] */ | 
|  | 2117 | FN_DU0_DG2, FN_LCDOUT10, | 
|  | 2118 | /* IP3_2_0 [3] */ | 
|  | 2119 | FN_DU0_DG1, FN_LCDOUT9, FN_DACK1, FN_SDA2, | 
|  | 2120 | FN_AUDATA3, 0, 0, 0 } | 
|  | 2121 | }, | 
|  | 2122 | { PINMUX_CFG_REG_VAR("IPSR4", 0xfffc0030, 32, | 
| Magnus Damm | 74eb436 | 2012-01-30 11:25:07 +0900 | [diff] [blame] | 2123 | 3, 1, 1, 1, 1, 1, 1, 3, 3, | 
| Magnus Damm | 2ecba2c | 2011-12-14 01:36:32 +0900 | [diff] [blame] | 2124 | 1, 1, 1, 1, 1, 1, 3, 3, 3, 2) { | 
|  | 2125 | /* IP4_31_29 [3] */ | 
|  | 2126 | FN_DU1_DB0, FN_VI2_DATA4_VI2_B4, FN_SCL2_B, FN_SD3_DAT0, | 
|  | 2127 | FN_TX5, FN_SCK0_D, 0, 0, | 
|  | 2128 | /* IP4_28 [1] */ | 
|  | 2129 | FN_DU1_DG7, FN_VI2_R3, | 
|  | 2130 | /* IP4_27 [1] */ | 
|  | 2131 | FN_DU1_DG6, FN_VI2_R2, | 
|  | 2132 | /* IP4_26 [1] */ | 
|  | 2133 | FN_DU1_DG5, FN_VI2_R1, | 
|  | 2134 | /* IP4_25 [1] */ | 
|  | 2135 | FN_DU1_DG4, FN_VI2_R0, | 
|  | 2136 | /* IP4_24 [1] */ | 
|  | 2137 | FN_DU1_DG3, FN_VI2_G7, | 
|  | 2138 | /* IP4_23 [1] */ | 
|  | 2139 | FN_DU1_DG2, FN_VI2_G6, | 
|  | 2140 | /* IP4_22_20 [3] */ | 
|  | 2141 | FN_DU1_DG1, FN_VI2_DATA3_VI2_B3, FN_SDA1_B, FN_SD3_DAT3, | 
|  | 2142 | FN_SCK5, FN_AUDATA7, FN_RX0_D, 0, | 
|  | 2143 | /* IP4_19_17 [3] */ | 
|  | 2144 | FN_DU1_DG0, FN_VI2_DATA2_VI2_B2, FN_SCL1_B, FN_SD3_DAT2, | 
|  | 2145 | FN_SCK3_E, FN_AUDATA6, FN_TX0_D, 0, | 
|  | 2146 | /* IP4_16 [1] */ | 
|  | 2147 | FN_DU1_DR7, FN_VI2_G5, | 
|  | 2148 | /* IP4_15 [1] */ | 
|  | 2149 | FN_DU1_DR6, FN_VI2_G4, | 
|  | 2150 | /* IP4_14 [1] */ | 
|  | 2151 | FN_DU1_DR5, FN_VI2_G3, | 
|  | 2152 | /* IP4_13 [1] */ | 
|  | 2153 | FN_DU1_DR4, FN_VI2_G2, | 
|  | 2154 | /* IP4_12 [1] */ | 
|  | 2155 | FN_DU1_DR3, FN_VI2_G1, | 
|  | 2156 | /* IP4_11 [1] */ | 
|  | 2157 | FN_DU1_DR2, FN_VI2_G0, | 
|  | 2158 | /* IP4_10_8 [3] */ | 
|  | 2159 | FN_DU1_DR1, FN_VI2_DATA1_VI2_B1, FN_PWM0, FN_SD3_CMD, | 
|  | 2160 | FN_RX3_E_IRDA_RX_E, FN_AUDSYNC, FN_CTS0_D, 0, | 
|  | 2161 | /* IP4_7_5 [3] */ | 
|  | 2162 | FN_DU1_DR0, FN_VI2_DATA0_VI2_B0, FN_PWM6, FN_SD3_CLK, | 
|  | 2163 | FN_TX3_E_IRDA_TX_E, FN_AUDCK, FN_PWMFSW0_B, 0, | 
|  | 2164 | /* IP4_4_2 [3] */ | 
|  | 2165 | FN_DU0_CDE, FN_QPOLB, FN_CAN1_RX, FN_RX2_C, | 
|  | 2166 | FN_DREQ0_B, FN_SSI_SCK78_B, FN_SCK0_B, 0, | 
|  | 2167 | /* IP4_1_0 [2] */ | 
|  | 2168 | FN_DU0_DISP, FN_QPOLA, FN_CAN_CLK_C, FN_SCK2_C } | 
|  | 2169 | }, | 
|  | 2170 | { PINMUX_CFG_REG_VAR("IPSR5", 0xfffc0034, 32, | 
|  | 2171 | 1, 2, 1, 4, 3, 4, 2, 2, | 
|  | 2172 | 2, 2, 1, 1, 1, 1, 1, 1, 3) { | 
|  | 2173 | /* IP5_31 [1] */ | 
|  | 2174 | 0, 0, | 
|  | 2175 | /* IP5_30_29 [2] */ | 
|  | 2176 | FN_AUDIO_CLKB, FN_USB_OVC2, FN_CAN_DEBUGOUT0, FN_MOUT0, | 
|  | 2177 | /* IP5_28 [1] */ | 
|  | 2178 | FN_AUDIO_CLKA, FN_CAN_TXCLK, | 
|  | 2179 | /* IP5_27_24 [4] */ | 
|  | 2180 | FN_DU1_CDE, FN_VI2_DATA7_VI2_B7, FN_RX3_B_IRDA_RX_B, FN_SD3_WP, | 
|  | 2181 | FN_HSPI_RX1, FN_VI1_FIELD, FN_VI3_FIELD, FN_AUDIO_CLKOUT, | 
|  | 2182 | FN_RX2_D, FN_GPS_CLK_C, FN_GPS_CLK_D, 0, | 
|  | 2183 | 0, 0, 0, 0, | 
|  | 2184 | /* IP5_23_21 [3] */ | 
|  | 2185 | FN_DU1_DISP, FN_VI2_DATA6_VI2_B6, FN_TCLK0, FN_QSTVA_B_QVS_B, | 
|  | 2186 | FN_HSPI_CLK1, FN_SCK2_D, FN_AUDIO_CLKOUT_B, FN_GPS_MAG_D, | 
|  | 2187 | /* IP5_20_17 [4] */ | 
|  | 2188 | FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, FN_VI2_CLK, FN_TX3_B_IRDA_TX_B, | 
|  | 2189 | FN_SD3_CD, FN_HSPI_TX1, FN_VI1_CLKENB, FN_VI3_CLKENB, | 
|  | 2190 | FN_AUDIO_CLKC, FN_TX2_D, FN_SPEEDIN, FN_GPS_SIGN_D, 0, | 
|  | 2191 | 0, 0, 0, 0, | 
|  | 2192 | /* IP5_16_15 [2] */ | 
|  | 2193 | FN_DU1_EXVSYNC_DU1_VSYNC, FN_VI2_VSYNC, FN_VI3_VSYNC, 0, | 
|  | 2194 | /* IP5_14_13 [2] */ | 
|  | 2195 | FN_DU1_EXHSYNC_DU1_HSYNC, FN_VI2_HSYNC, FN_VI3_HSYNC, 0, | 
|  | 2196 | /* IP5_12_11 [2] */ | 
|  | 2197 | FN_DU1_DOTCLKOUT, FN_VI2_FIELD, FN_SDA1_D, 0, | 
|  | 2198 | /* IP5_10_9 [2] */ | 
|  | 2199 | FN_DU1_DOTCLKIN, FN_VI2_CLKENB, FN_HSPI_CS1, FN_SCL1_D, | 
|  | 2200 | /* IP5_8 [1] */ | 
|  | 2201 | FN_DU1_DB7, FN_SDA2_D, | 
|  | 2202 | /* IP5_7 [1] */ | 
|  | 2203 | FN_DU1_DB6, FN_SCL2_D, | 
|  | 2204 | /* IP5_6 [1] */ | 
|  | 2205 | FN_DU1_DB5, FN_VI2_R7, | 
|  | 2206 | /* IP5_5 [1] */ | 
|  | 2207 | FN_DU1_DB4, FN_VI2_R6, | 
|  | 2208 | /* IP5_4 [1] */ | 
|  | 2209 | FN_DU1_DB3, FN_VI2_R5, | 
|  | 2210 | /* IP5_3 [1] */ | 
|  | 2211 | FN_DU1_DB2, FN_VI2_R4, | 
|  | 2212 | /* IP5_2_0 [3] */ | 
|  | 2213 | FN_DU1_DB1, FN_VI2_DATA5_VI2_B5, FN_SDA2_B, FN_SD3_DAT1, | 
|  | 2214 | FN_RX5, FN_RTS0_D_TANS_D, 0, 0 } | 
|  | 2215 | }, | 
|  | 2216 | { PINMUX_CFG_REG_VAR("IPSR6", 0xfffc0038, 32, | 
|  | 2217 | 1, 2, 2, 2, 2, 3, 2, 3, 3, 3, 1, 2, 2, 2, 2) { | 
|  | 2218 | /* IP6_31 [1] */ | 
|  | 2219 | 0, 0, | 
|  | 2220 | /* IP6_30_29 [2] */ | 
|  | 2221 | FN_SSI_SCK6, FN_ADICHS0, FN_CAN0_TX, FN_IERX_B, | 
|  | 2222 | /* IP_28_27 [2] */ | 
|  | 2223 | 0, 0, 0, 0, | 
|  | 2224 | /* IP6_26_25 [2] */ | 
|  | 2225 | FN_SSI_SDATA5, FN_ADIDATA, FN_CAN_DEBUGOUT12, FN_RX3_IRDA_RX, | 
|  | 2226 | /* IP6_24_23 [2] */ | 
|  | 2227 | FN_SSI_WS5, FN_ADICS_SAMP, FN_CAN_DEBUGOUT11, FN_TX3_IRDA_TX, | 
|  | 2228 | /* IP6_22_20 [3] */ | 
|  | 2229 | FN_SSI_SCK5, FN_ADICLK, FN_CAN_DEBUGOUT10, FN_SCK3, | 
|  | 2230 | FN_TCLK0_D, 0, 0, 0, | 
|  | 2231 | /* IP6_19_18 [2] */ | 
|  | 2232 | FN_SSI_SDATA4, FN_CAN_DEBUGOUT9, FN_SSI_SDATA9_C, 0, | 
|  | 2233 | /* IP6_17_15 [3] */ | 
|  | 2234 | FN_SSI_SDATA3, FN_PWM0_C, FN_CAN_DEBUGOUT8, FN_CAN_CLK_B, | 
|  | 2235 | FN_IECLK, FN_SCIF_CLK_B, FN_TCLK0_B, 0, | 
|  | 2236 | /* IP6_14_12 [3] */ | 
|  | 2237 | FN_SSI_WS34, FN_CAN_DEBUGOUT7, FN_CAN0_RX_B, FN_IETX, | 
|  | 2238 | FN_SSI_WS9_C, 0, 0, 0, | 
|  | 2239 | /* IP6_11_9 [3] */ | 
|  | 2240 | FN_SSI_SCK34, FN_CAN_DEBUGOUT6, FN_CAN0_TX_B, FN_IERX, | 
|  | 2241 | FN_SSI_SCK9_C, 0, 0, 0, | 
|  | 2242 | /* IP6_8 [1] */ | 
|  | 2243 | FN_SSI_SDATA2, FN_CAN_DEBUGOUT5, | 
|  | 2244 | /* IP6_7_6 [2] */ | 
|  | 2245 | FN_SSI_SDATA1, FN_CAN_DEBUGOUT4, FN_MOUT6, 0, | 
|  | 2246 | /* IP6_5_4 [2] */ | 
|  | 2247 | FN_SSI_SDATA0, FN_CAN_DEBUGOUT3, FN_MOUT5, 0, | 
|  | 2248 | /* IP6_3_2 [2] */ | 
|  | 2249 | FN_SSI_WS0129, FN_CAN_DEBUGOUT2, FN_MOUT2, 0, | 
|  | 2250 | /* IP6_1_0 [2] */ | 
|  | 2251 | FN_SSI_SCK0129, FN_CAN_DEBUGOUT1, FN_MOUT1, 0 } | 
|  | 2252 | }, | 
|  | 2253 | { PINMUX_CFG_REG_VAR("IPSR7", 0xfffc003c, 32, | 
|  | 2254 | 1, 2, 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 2, 2) { | 
|  | 2255 | /* IP7_31 [1] */ | 
|  | 2256 | 0, 0, | 
|  | 2257 | /* IP7_30_29 [2] */ | 
|  | 2258 | FN_SD0_WP, FN_DACK2, FN_CTS1_B, 0, | 
|  | 2259 | /* IP7_28_27 [2] */ | 
|  | 2260 | FN_SD0_CD, FN_DREQ2, FN_RTS1_B_TANS_B, 0, | 
|  | 2261 | /* IP7_26_25 [2] */ | 
|  | 2262 | FN_SD0_DAT3, FN_ATAWR1, FN_RX2_B, FN_CC5_TDI, | 
|  | 2263 | /* IP7_24_23 [2] */ | 
|  | 2264 | FN_SD0_DAT2, FN_ATARD1, FN_TX2_B, FN_CC5_TCK, | 
|  | 2265 | /* IP7_22_21 [2] */ | 
|  | 2266 | FN_SD0_DAT1, FN_ATAG1, FN_SCK2_B, FN_CC5_TMS, | 
|  | 2267 | /* IP7_20_19 [2] */ | 
|  | 2268 | FN_SD0_DAT0, FN_ATADIR1, FN_RX1_B, FN_CC5_TRST, | 
|  | 2269 | /* IP7_18_17 [2] */ | 
|  | 2270 | FN_SD0_CMD, FN_ATACS11, FN_TX1_B, FN_CC5_TDO, | 
|  | 2271 | /* IP7_16_15 [2] */ | 
|  | 2272 | FN_SD0_CLK, FN_ATACS01, FN_SCK1_B, 0, | 
|  | 2273 | /* IP7_14_13 [2] */ | 
|  | 2274 | FN_SSI_SDATA8, FN_VSP, FN_IRQ3_B, FN_HSPI_RX1_C, | 
|  | 2275 | /* IP7_12_10 [3] */ | 
|  | 2276 | FN_SSI_SDATA7, FN_CAN_DEBUGOUT15, FN_IRQ2_B, FN_TCLK1_C, | 
|  | 2277 | FN_HSPI_TX1_C, 0, 0, 0, | 
|  | 2278 | /* IP7_9_7 [3] */ | 
|  | 2279 | FN_SSI_WS78, FN_CAN_DEBUGOUT14, FN_IRQ1_B, FN_SSI_WS9_B, | 
|  | 2280 | FN_HSPI_CS1_C, 0, 0, 0, | 
|  | 2281 | /* IP7_6_4 [3] */ | 
|  | 2282 | FN_SSI_SCK78, FN_CAN_DEBUGOUT13, FN_IRQ0_B, FN_SSI_SCK9_B, | 
|  | 2283 | FN_HSPI_CLK1_C, 0, 0, 0, | 
|  | 2284 | /* IP7_3_2 [2] */ | 
|  | 2285 | FN_SSI_SDATA6, FN_ADICHS2, FN_CAN_CLK, FN_IECLK_B, | 
|  | 2286 | /* IP7_1_0 [2] */ | 
|  | 2287 | FN_SSI_WS6, FN_ADICHS1, FN_CAN0_RX, FN_IETX_B } | 
|  | 2288 | }, | 
|  | 2289 | { PINMUX_CFG_REG_VAR("IPSR8", 0xfffc0040, 32, | 
|  | 2290 | 1, 3, 3, 2, 2, 1, 1, 1, 2, 4, 4, 4, 4) { | 
|  | 2291 | /* IP8_31 [1] */ | 
|  | 2292 | 0, 0, | 
|  | 2293 | /* IP8_30_28 [3] */ | 
|  | 2294 | FN_VI0_VSYNC, FN_VI0_DATA1_B_VI0_B1_B, FN_RTS1_C_TANS_C, FN_RX4_D, | 
|  | 2295 | FN_PWMFSW0_C, 0, 0, 0, | 
|  | 2296 | /* IP8_27_25 [3] */ | 
|  | 2297 | FN_VI0_HSYNC, FN_VI0_DATA0_B_VI0_B0_B, FN_CTS1_C, FN_TX4_D, | 
|  | 2298 | FN_MMC1_CMD, FN_HSCK1_B, 0, 0, | 
|  | 2299 | /* IP8_24_23 [2] */ | 
|  | 2300 | FN_VI0_FIELD, FN_RX1_C, FN_HRX1_B, 0, | 
|  | 2301 | /* IP8_22_21 [2] */ | 
|  | 2302 | FN_VI0_CLKENB, FN_TX1_C, FN_HTX1_B, FN_MT1_SYNC, | 
|  | 2303 | /* IP8_20 [1] */ | 
|  | 2304 | FN_VI0_CLK, FN_MMC1_CLK, | 
|  | 2305 | /* IP8_19 [1] */ | 
|  | 2306 | FN_FMIN, FN_RDS_DATA, | 
|  | 2307 | /* IP8_18 [1] */ | 
|  | 2308 | FN_BPFCLK, FN_PCMWE, | 
|  | 2309 | /* IP8_17_16 [2] */ | 
|  | 2310 | FN_FMCLK, FN_RDS_CLK, FN_PCMOE, 0, | 
|  | 2311 | /* IP8_15_12 [4] */ | 
|  | 2312 | FN_HSPI_RX0, FN_RX0, FN_CAN_STEP0, FN_AD_NCS, | 
|  | 2313 | FN_CC5_STATE7, FN_CC5_STATE15, FN_CC5_STATE23, FN_CC5_STATE31, | 
|  | 2314 | FN_CC5_STATE39, 0, 0, 0, | 
|  | 2315 | 0, 0, 0, 0, | 
|  | 2316 | /* IP8_11_8 [4] */ | 
|  | 2317 | FN_HSPI_TX0, FN_TX0, FN_CAN_DEBUG_HW_TRIGGER, FN_AD_DO, | 
|  | 2318 | FN_CC5_STATE6, FN_CC5_STATE14, FN_CC5_STATE22, FN_CC5_STATE30, | 
|  | 2319 | FN_CC5_STATE38, 0, 0, 0, | 
|  | 2320 | 0, 0, 0, 0, | 
|  | 2321 | /* IP8_7_4 [4] */ | 
|  | 2322 | FN_HSPI_CS0, FN_RTS0_TANS, FN_USB_OVC1, FN_AD_DI, | 
|  | 2323 | FN_CC5_STATE5, FN_CC5_STATE13, FN_CC5_STATE21, FN_CC5_STATE29, | 
|  | 2324 | FN_CC5_STATE37, 0, 0, 0, | 
|  | 2325 | 0, 0, 0, 0, | 
|  | 2326 | /* IP8_3_0 [4] */ | 
|  | 2327 | FN_HSPI_CLK0, FN_CTS0, FN_USB_OVC0, FN_AD_CLK, | 
|  | 2328 | FN_CC5_STATE4, FN_CC5_STATE12, FN_CC5_STATE20, FN_CC5_STATE28, | 
|  | 2329 | FN_CC5_STATE36, 0, 0, 0, | 
|  | 2330 | 0, 0, 0, 0 } | 
|  | 2331 | }, | 
|  | 2332 | { PINMUX_CFG_REG_VAR("IPSR9", 0xfffc0044, 32, | 
|  | 2333 | 2, 2, 2, 2, 2, 3, 3, 2, 2, | 
|  | 2334 | 2, 2, 1, 1, 1, 1, 2, 2) { | 
|  | 2335 | /* IP9_31_30 [2] */ | 
|  | 2336 | 0, 0, 0, 0, | 
|  | 2337 | /* IP9_29_28 [2] */ | 
|  | 2338 | FN_VI0_G7, FN_ETH_RXD1, FN_SD2_DAT3_B, FN_ARM_TRACEDATA_9, | 
|  | 2339 | /* IP9_27_26 [2] */ | 
|  | 2340 | FN_VI0_G6, FN_ETH_RXD0, FN_SD2_DAT2_B, FN_ARM_TRACEDATA_8, | 
|  | 2341 | /* IP9_25_24 [2] */ | 
|  | 2342 | FN_VI0_G5, FN_ETH_RX_ER, FN_SD2_DAT1_B, FN_ARM_TRACEDATA_7, | 
|  | 2343 | /* IP9_23_22 [2] */ | 
|  | 2344 | FN_VI0_G4, FN_ETH_TX_EN, FN_SD2_DAT0_B, FN_ARM_TRACEDATA_6, | 
|  | 2345 | /* IP9_21_19 [3] */ | 
|  | 2346 | FN_VI0_G3, FN_ETH_CRS_DV, FN_MMC1_D7, FN_ARM_TRACEDATA_5, | 
|  | 2347 | FN_TS_SDAT0, 0, 0, 0, | 
|  | 2348 | /* IP9_18_16 [3] */ | 
|  | 2349 | FN_VI0_G2, FN_ETH_TXD1, FN_MMC1_D6, FN_ARM_TRACEDATA_4, | 
|  | 2350 | FN_TS_SPSYNC0, 0, 0, 0, | 
|  | 2351 | /* IP9_15_14 [2] */ | 
|  | 2352 | FN_VI0_G1, FN_SSI_WS78_C, FN_IRQ1, FN_ARM_TRACEDATA_3, | 
|  | 2353 | /* IP9_13_12 [2] */ | 
|  | 2354 | FN_VI0_G0, FN_SSI_SCK78_C, FN_IRQ0, FN_ARM_TRACEDATA_2, | 
|  | 2355 | /* IP9_11_10 [2] */ | 
|  | 2356 | FN_VI0_DATA7_VI0_B7, FN_MMC1_D5, FN_ARM_TRACEDATA_1, 0, | 
|  | 2357 | /* IP9_9_8 [2] */ | 
|  | 2358 | FN_VI0_DATA6_VI0_B6, FN_MMC1_D4, FN_ARM_TRACEDATA_0, 0, | 
|  | 2359 | /* IP9_7 [1] */ | 
|  | 2360 | FN_VI0_DATA5_VI0_B5, FN_MMC1_D3, | 
|  | 2361 | /* IP9_6 [1] */ | 
|  | 2362 | FN_VI0_DATA4_VI0_B4, FN_MMC1_D2, | 
|  | 2363 | /* IP9_5 [1] */ | 
|  | 2364 | FN_VI0_DATA3_VI0_B3, FN_MMC1_D1, | 
|  | 2365 | /* IP9_4 [1] */ | 
|  | 2366 | FN_VI0_DATA2_VI0_B2, FN_MMC1_D0, | 
|  | 2367 | /* IP9_3_2 [2] */ | 
|  | 2368 | FN_VI0_DATA1_VI0_B1, FN_HCTS1_B, FN_MT1_PWM, 0, | 
|  | 2369 | /* IP9_1_0 [2] */ | 
|  | 2370 | FN_VI0_DATA0_VI0_B0, FN_HRTS1_B, FN_MT1_VCXO, 0 } | 
|  | 2371 | }, | 
|  | 2372 | { PINMUX_CFG_REG_VAR("IPSR10", 0xfffc0048, 32, | 
|  | 2373 | 3, 3, 2, 3, 3, 3, 3, 3, 3, 3, 3) { | 
|  | 2374 | /* IP10_31_29 [3] */ | 
|  | 2375 | FN_VI1_VSYNC, FN_AUDIO_CLKOUT_C, FN_SSI_WS4, FN_SIM_CLK, | 
|  | 2376 | FN_GPS_MAG_C, FN_SPV_TRST, FN_SCL3, 0, | 
|  | 2377 | /* IP10_28_26 [3] */ | 
|  | 2378 | FN_VI1_HSYNC, FN_VI3_CLK, FN_SSI_SCK4, FN_GPS_SIGN_C, | 
|  | 2379 | FN_PWMFSW0_E, 0, 0, 0, | 
|  | 2380 | /* IP10_25_24 [2] */ | 
|  | 2381 | FN_VI1_CLK, FN_SIM_D, FN_SDA3, 0, | 
|  | 2382 | /* IP10_23_21 [3] */ | 
|  | 2383 | FN_VI0_R7, FN_ETH_MDIO, FN_DACK2_C, FN_HSPI_RX1_B, | 
|  | 2384 | FN_SCIF_CLK_D, FN_TRACECTL, FN_MT1_PEN, 0, | 
|  | 2385 | /* IP10_20_18 [3] */ | 
|  | 2386 | FN_VI0_R6, FN_ETH_MDC, FN_DREQ2_C, FN_HSPI_TX1_B, | 
|  | 2387 | FN_TRACECLK, FN_MT1_BEN, FN_PWMFSW0_D, 0, | 
|  | 2388 | /* IP10_17_15 [3] */ | 
|  | 2389 | FN_VI0_R5, FN_ETH_TXD0, FN_SD2_WP_B, FN_HSPI_CS1_B, | 
|  | 2390 | FN_ARM_TRACEDATA_15, FN_MT1_D, FN_TS_SDEN0, 0, | 
|  | 2391 | /* IP10_14_12 [3] */ | 
|  | 2392 | FN_VI0_R4, FN_ETH_REFCLK, FN_SD2_CD_B, FN_HSPI_CLK1_B, | 
|  | 2393 | FN_ARM_TRACEDATA_14, FN_MT1_CLK, FN_TS_SCK0, 0, | 
|  | 2394 | /* IP10_11_9 [3] */ | 
|  | 2395 | FN_VI0_R3, FN_ETH_MAGIC, FN_SD2_CMD_B, FN_IRQ3, | 
|  | 2396 | FN_ARM_TRACEDATA_13, 0, 0, 0, | 
|  | 2397 | /* IP10_8_6 [3] */ | 
|  | 2398 | FN_VI0_R2, FN_ETH_LINK, FN_SD2_CLK_B, FN_IRQ2, | 
|  | 2399 | FN_ARM_TRACEDATA_12, 0, 0, 0, | 
|  | 2400 | /* IP10_5_3 [3] */ | 
|  | 2401 | FN_VI0_R1, FN_SSI_SDATA8_C, FN_DACK1_B, FN_ARM_TRACEDATA_11, | 
|  | 2402 | FN_DACK0_C, FN_DRACK0_C, 0, 0, | 
|  | 2403 | /* IP10_2_0 [3] */ | 
|  | 2404 | FN_VI0_R0, FN_SSI_SDATA7_C, FN_SCK1_C, FN_DREQ1_B, | 
|  | 2405 | FN_ARM_TRACEDATA_10, FN_DREQ0_C, 0, 0 } | 
|  | 2406 | }, | 
|  | 2407 | { PINMUX_CFG_REG_VAR("IPSR11", 0xfffc004c, 32, | 
|  | 2408 | 2, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3) { | 
|  | 2409 | /* IP11_31_30 [2] */ | 
|  | 2410 | 0, 0, 0, 0, | 
|  | 2411 | /* IP11_29_27 [3] */ | 
|  | 2412 | FN_VI1_G1, FN_VI3_DATA1, FN_SSI_SCK1, FN_TS_SDEN1, | 
|  | 2413 | FN_DACK2_B, FN_RX2, FN_HRTS0_B, 0, | 
|  | 2414 | /* IP11_26_24 [3] */ | 
|  | 2415 | FN_VI1_G0, FN_VI3_DATA0, FN_DU1_DOTCLKOUT1, FN_TS_SCK1, | 
|  | 2416 | FN_DREQ2_B, FN_TX2, FN_SPA_TDO, FN_HCTS0_B, | 
|  | 2417 | /* IP11_23_21 [3] */ | 
|  | 2418 | FN_VI1_DATA7_VI1_B7, FN_SD2_WP, FN_MT0_PWM, FN_SPA_TDI, | 
|  | 2419 | FN_HSPI_RX1_D, 0, 0, 0, | 
|  | 2420 | /* IP11_20_18 [3] */ | 
|  | 2421 | FN_VI1_DATA6_VI1_B6, FN_SD2_CD, FN_MT0_VCXO, FN_SPA_TMS, | 
|  | 2422 | FN_HSPI_TX1_D, 0, 0, 0, | 
|  | 2423 | /* IP11_17_15 [3] */ | 
|  | 2424 | FN_VI1_DATA5_VI1_B5, FN_SD2_CMD, FN_MT0_SYNC, FN_SPA_TCK, | 
|  | 2425 | FN_HSPI_CS1_D, FN_ADICHS2_B, 0, 0, | 
|  | 2426 | /* IP11_14_12 [3] */ | 
|  | 2427 | FN_VI1_DATA4_VI1_B4, FN_SD2_CLK, FN_MT0_PEN, FN_SPA_TRST, | 
|  | 2428 | FN_HSPI_CLK1_D, FN_ADICHS1_B, 0, 0, | 
|  | 2429 | /* IP11_11_9 [3] */ | 
|  | 2430 | FN_VI1_DATA3_VI1_B3, FN_SD2_DAT3, FN_MT0_BEN, FN_SPV_TDO, | 
|  | 2431 | FN_ADICHS0_B, 0, 0, 0, | 
|  | 2432 | /* IP11_8_6 [3] */ | 
|  | 2433 | FN_VI1_DATA2_VI1_B2, FN_SD2_DAT2, FN_MT0_D, FN_SPVTDI, | 
|  | 2434 | FN_ADIDATA_B, 0, 0, 0, | 
|  | 2435 | /* IP11_5_3 [3] */ | 
|  | 2436 | FN_VI1_DATA1_VI1_B1, FN_SD2_DAT1, FN_MT0_CLK, FN_SPV_TMS, | 
|  | 2437 | FN_ADICS_B_SAMP_B, 0, 0, 0, | 
|  | 2438 | /* IP11_2_0 [3] */ | 
|  | 2439 | FN_VI1_DATA0_VI1_B0, FN_SD2_DAT0, FN_SIM_RST, FN_SPV_TCK, | 
|  | 2440 | FN_ADICLK_B, 0, 0, 0 } | 
|  | 2441 | }, | 
|  | 2442 | { PINMUX_CFG_REG_VAR("IPSR12", 0xfffc0050, 32, | 
|  | 2443 | 4, 4, 4, 2, 3, 3, 3, 3, 3, 3) { | 
|  | 2444 | /* IP12_31_28 [4] */ | 
|  | 2445 | 0, 0, 0, 0, 0, 0, 0, 0, | 
|  | 2446 | 0, 0, 0, 0, 0, 0, 0, 0, | 
|  | 2447 | /* IP12_27_24 [4] */ | 
|  | 2448 | 0, 0, 0, 0, 0, 0, 0, 0, | 
|  | 2449 | 0, 0, 0, 0, 0, 0, 0, 0, | 
|  | 2450 | /* IP12_23_20 [4] */ | 
|  | 2451 | 0, 0, 0, 0, 0, 0, 0, 0, | 
|  | 2452 | 0, 0, 0, 0, 0, 0, 0, 0, | 
|  | 2453 | /* IP12_19_18 [2] */ | 
|  | 2454 | 0, 0, 0, 0, | 
|  | 2455 | /* IP12_17_15 [3] */ | 
|  | 2456 | FN_VI1_G7, FN_VI3_DATA7, FN_GPS_MAG, FN_FCE, | 
|  | 2457 | FN_SCK4_B, 0, 0, 0, | 
|  | 2458 | /* IP12_14_12 [3] */ | 
|  | 2459 | FN_VI1_G6, FN_VI3_DATA6, FN_GPS_SIGN, FN_FRB, | 
|  | 2460 | FN_RX4_B, FN_SIM_CLK_B, 0, 0, | 
|  | 2461 | /* IP12_11_9 [3] */ | 
|  | 2462 | FN_VI1_G5, FN_VI3_DATA5, FN_GPS_CLK, FN_FSE, | 
|  | 2463 | FN_TX4_B, FN_SIM_D_B, 0, 0, | 
|  | 2464 | /* IP12_8_6 [3] */ | 
|  | 2465 | FN_VI1_G4, FN_VI3_DATA4, FN_SSI_WS2, FN_SDA1_C, | 
|  | 2466 | FN_SIM_RST_B, FN_HRX0_B, 0, 0, | 
|  | 2467 | /* IP12_5_3 [3] */ | 
|  | 2468 | FN_VI1_G3, FN_VI3_DATA3, FN_SSI_SCK2, FN_TS_SDAT1, | 
|  | 2469 | FN_SCL1_C, FN_HTX0_B, 0, 0, | 
|  | 2470 | /* IP12_2_0 [3] */ | 
|  | 2471 | FN_VI1_G2, FN_VI3_DATA2, FN_SSI_WS1, FN_TS_SPSYNC1, | 
|  | 2472 | FN_SCK2, FN_HSCK0_B, 0, 0 } | 
|  | 2473 | }, | 
|  | 2474 | { PINMUX_CFG_REG_VAR("MOD_SEL", 0xfffc0090, 32, | 
|  | 2475 | 2, 2, 3, 3, 2, 2, 2, 2, 2, | 
|  | 2476 | 1, 1, 1, 1, 1, 1, 1, 2, 1, 2) { | 
|  | 2477 | /* SEL_SCIF5 [2] */ | 
|  | 2478 | FN_SEL_SCIF5_0, FN_SEL_SCIF5_1, FN_SEL_SCIF5_2, FN_SEL_SCIF5_3, | 
|  | 2479 | /* SEL_SCIF4 [2] */ | 
|  | 2480 | FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2, FN_SEL_SCIF4_3, | 
|  | 2481 | /* SEL_SCIF3 [3] */ | 
|  | 2482 | FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, FN_SEL_SCIF3_3, | 
|  | 2483 | FN_SEL_SCIF3_4, 0, 0, 0, | 
|  | 2484 | /* SEL_SCIF2 [3] */ | 
|  | 2485 | FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, FN_SEL_SCIF2_3, | 
|  | 2486 | FN_SEL_SCIF2_4, 0, 0, 0, | 
|  | 2487 | /* SEL_SCIF1 [2] */ | 
|  | 2488 | FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, 0, | 
|  | 2489 | /* SEL_SCIF0 [2] */ | 
|  | 2490 | FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, FN_SEL_SCIF0_3, | 
|  | 2491 | /* SEL_SSI9 [2] */ | 
|  | 2492 | FN_SEL_SSI9_0, FN_SEL_SSI9_1, FN_SEL_SSI9_2, 0, | 
|  | 2493 | /* SEL_SSI8 [2] */ | 
|  | 2494 | FN_SEL_SSI8_0, FN_SEL_SSI8_1, FN_SEL_SSI8_2, 0, | 
|  | 2495 | /* SEL_SSI7 [2] */ | 
|  | 2496 | FN_SEL_SSI7_0, FN_SEL_SSI7_1, FN_SEL_SSI7_2, 0, | 
|  | 2497 | /* SEL_VI0 [1] */ | 
|  | 2498 | FN_SEL_VI0_0, FN_SEL_VI0_1, | 
|  | 2499 | /* SEL_SD2 [1] */ | 
|  | 2500 | FN_SEL_SD2_0, FN_SEL_SD2_1, | 
|  | 2501 | /* SEL_INT3 [1] */ | 
|  | 2502 | FN_SEL_INT3_0, FN_SEL_INT3_1, | 
|  | 2503 | /* SEL_INT2 [1] */ | 
|  | 2504 | FN_SEL_INT2_0, FN_SEL_INT2_1, | 
|  | 2505 | /* SEL_INT1 [1] */ | 
|  | 2506 | FN_SEL_INT1_0, FN_SEL_INT1_1, | 
|  | 2507 | /* SEL_INT0 [1] */ | 
|  | 2508 | FN_SEL_INT0_0, FN_SEL_INT0_1, | 
|  | 2509 | /* SEL_IE [1] */ | 
|  | 2510 | FN_SEL_IE_0, FN_SEL_IE_1, | 
|  | 2511 | /* SEL_EXBUS2 [2] */ | 
|  | 2512 | FN_SEL_EXBUS2_0, FN_SEL_EXBUS2_1, FN_SEL_EXBUS2_2, 0, | 
|  | 2513 | /* SEL_EXBUS1 [1] */ | 
|  | 2514 | FN_SEL_EXBUS1_0, FN_SEL_EXBUS1_1, | 
|  | 2515 | /* SEL_EXBUS0 [2] */ | 
|  | 2516 | FN_SEL_EXBUS0_0, FN_SEL_EXBUS0_1, FN_SEL_EXBUS0_2, 0 } | 
|  | 2517 | }, | 
|  | 2518 | { PINMUX_CFG_REG_VAR("MOD_SEL2", 0xfffc0094, 32, | 
|  | 2519 | 2, 2, 2, 2, 1, 1, 1, 3, 1, | 
|  | 2520 | 2, 2, 2, 2, 1, 1, 2, 1, 2, 2) { | 
|  | 2521 | /* SEL_TMU1 [2] */ | 
|  | 2522 | FN_SEL_TMU1_0, FN_SEL_TMU1_1, FN_SEL_TMU1_2, 0, | 
|  | 2523 | /* SEL_TMU0 [2] */ | 
|  | 2524 | FN_SEL_TMU0_0, FN_SEL_TMU0_1, FN_SEL_TMU0_2, FN_SEL_TMU0_3, | 
|  | 2525 | /* SEL_SCIF [2] */ | 
|  | 2526 | FN_SEL_SCIF_0, FN_SEL_SCIF_1, FN_SEL_SCIF_2, FN_SEL_SCIF_3, | 
|  | 2527 | /* SEL_CANCLK [2] */ | 
|  | 2528 | FN_SEL_CANCLK_0, FN_SEL_CANCLK_1, FN_SEL_CANCLK_2, | 
|  | 2529 | /* SEL_CAN0 [1] */ | 
|  | 2530 | FN_SEL_CAN0_0, FN_SEL_CAN0_1, | 
|  | 2531 | /* SEL_HSCIF1 [1] */ | 
|  | 2532 | FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, | 
|  | 2533 | /* SEL_HSCIF0 [1] */ | 
|  | 2534 | FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, | 
|  | 2535 | /* SEL_PWMFSW [3] */ | 
|  | 2536 | FN_SEL_PWMFSW_0, FN_SEL_PWMFSW_1, FN_SEL_PWMFSW_2, | 
|  | 2537 | FN_SEL_PWMFSW_3, FN_SEL_PWMFSW_4, 0, 0, 0, | 
|  | 2538 | /* SEL_ADI [1] */ | 
|  | 2539 | FN_SEL_ADI_0, FN_SEL_ADI_1, | 
|  | 2540 | /* [2] */ | 
|  | 2541 | 0, 0, 0, 0, | 
|  | 2542 | /* [2] */ | 
|  | 2543 | 0, 0, 0, 0, | 
|  | 2544 | /* [2] */ | 
|  | 2545 | 0, 0, 0, 0, | 
|  | 2546 | /* SEL_GPS [2] */ | 
|  | 2547 | FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2, FN_SEL_GPS_3, | 
|  | 2548 | /* SEL_SIM [1] */ | 
|  | 2549 | FN_SEL_SIM_0, FN_SEL_SIM_1, | 
|  | 2550 | /* SEL_HSPI2 [1] */ | 
|  | 2551 | FN_SEL_HSPI2_0, FN_SEL_HSPI2_1, | 
|  | 2552 | /* SEL_HSPI1 [2] */ | 
|  | 2553 | FN_SEL_HSPI1_0, FN_SEL_HSPI1_1, FN_SEL_HSPI1_2, FN_SEL_HSPI1_3, | 
|  | 2554 | /* SEL_I2C3 [1] */ | 
|  | 2555 | FN_SEL_I2C3_0, FN_SEL_I2C3_1, | 
|  | 2556 | /* SEL_I2C2 [2] */ | 
|  | 2557 | FN_SEL_I2C2_0, FN_SEL_I2C2_1, FN_SEL_I2C2_2, FN_SEL_I2C2_3, | 
|  | 2558 | /* SEL_I2C1 [2] */ | 
|  | 2559 | FN_SEL_I2C1_0, FN_SEL_I2C1_1, FN_SEL_I2C1_2, FN_SEL_I2C1_3 } | 
|  | 2560 | }, | 
| Magnus Damm | 19c43fc | 2011-12-14 01:36:22 +0900 | [diff] [blame] | 2561 | { PINMUX_CFG_REG("INOUTSEL0", 0xffc40004, 32, 1) { GP_INOUTSEL(0) } }, | 
|  | 2562 | { PINMUX_CFG_REG("INOUTSEL1", 0xffc41004, 32, 1) { GP_INOUTSEL(1) } }, | 
|  | 2563 | { PINMUX_CFG_REG("INOUTSEL2", 0xffc42004, 32, 1) { GP_INOUTSEL(2) } }, | 
|  | 2564 | { PINMUX_CFG_REG("INOUTSEL3", 0xffc43004, 32, 1) { GP_INOUTSEL(3) } }, | 
|  | 2565 | { PINMUX_CFG_REG("INOUTSEL4", 0xffc44004, 32, 1) { GP_INOUTSEL(4) } }, | 
|  | 2566 | { PINMUX_CFG_REG("INOUTSEL5", 0xffc45004, 32, 1) { GP_INOUTSEL(5) } }, | 
|  | 2567 | { PINMUX_CFG_REG("INOUTSEL6", 0xffc46004, 32, 1) { | 
|  | 2568 | 0, 0, 0, 0, 0, 0, 0, 0,	0, 0, 0, 0, 0, 0, 0, 0, | 
|  | 2569 | 0, 0, 0, 0, 0, 0, 0, 0,	0, 0, 0, 0, 0, 0, 0, 0, | 
|  | 2570 | 0, 0, 0, 0, 0, 0, 0, 0, | 
|  | 2571 | 0, 0, | 
|  | 2572 | 0, 0, | 
|  | 2573 | 0, 0, | 
|  | 2574 | GP_6_8_IN, GP_6_8_OUT, | 
|  | 2575 | GP_6_7_IN, GP_6_7_OUT, | 
|  | 2576 | GP_6_6_IN, GP_6_6_OUT, | 
|  | 2577 | GP_6_5_IN, GP_6_5_OUT, | 
|  | 2578 | GP_6_4_IN, GP_6_4_OUT, | 
|  | 2579 | GP_6_3_IN, GP_6_3_OUT, | 
|  | 2580 | GP_6_2_IN, GP_6_2_OUT, | 
|  | 2581 | GP_6_1_IN, GP_6_1_OUT, | 
|  | 2582 | GP_6_0_IN, GP_6_0_OUT, } | 
|  | 2583 | }, | 
|  | 2584 | { }, | 
|  | 2585 | }; | 
|  | 2586 |  | 
|  | 2587 | static struct pinmux_data_reg pinmux_data_regs[] = { | 
|  | 2588 | { PINMUX_DATA_REG("INDT0", 0xffc40008, 32) { GP_INDT(0) } }, | 
|  | 2589 | { PINMUX_DATA_REG("INDT1", 0xffc41008, 32) { GP_INDT(1) } }, | 
|  | 2590 | { PINMUX_DATA_REG("INDT2", 0xffc42008, 32) { GP_INDT(2) } }, | 
|  | 2591 | { PINMUX_DATA_REG("INDT3", 0xffc43008, 32) { GP_INDT(3) } }, | 
|  | 2592 | { PINMUX_DATA_REG("INDT4", 0xffc44008, 32) { GP_INDT(4) } }, | 
|  | 2593 | { PINMUX_DATA_REG("INDT5", 0xffc45008, 32) { GP_INDT(5) } }, | 
|  | 2594 | { PINMUX_DATA_REG("INDT6", 0xffc46008, 32) { | 
|  | 2595 | 0, 0, 0, 0, 0, 0, 0, 0,	0, 0, 0, 0, 0, 0, 0, 0, | 
|  | 2596 | 0, 0, 0, 0, 0, 0, 0, GP_6_8_DATA, | 
|  | 2597 | GP_6_7_DATA, GP_6_6_DATA, GP_6_5_DATA, GP_6_4_DATA, | 
|  | 2598 | GP_6_3_DATA, GP_6_2_DATA, GP_6_1_DATA, GP_6_0_DATA } | 
|  | 2599 | }, | 
|  | 2600 | { }, | 
|  | 2601 | }; | 
|  | 2602 |  | 
|  | 2603 | static struct resource r8a7779_pfc_resources[] = { | 
|  | 2604 | [0] = { | 
|  | 2605 | .start	= 0xfffc0000, | 
|  | 2606 | .end	= 0xfffc023b, | 
|  | 2607 | .flags	= IORESOURCE_MEM, | 
|  | 2608 | }, | 
|  | 2609 | [1] = { | 
|  | 2610 | .start	= 0xffc40000, | 
|  | 2611 | .end	= 0xffc46fff, | 
|  | 2612 | .flags	= IORESOURCE_MEM, | 
|  | 2613 | } | 
|  | 2614 | }; | 
|  | 2615 |  | 
|  | 2616 | static struct pinmux_info r8a7779_pinmux_info = { | 
|  | 2617 | .name = "r8a7779_pfc", | 
|  | 2618 |  | 
|  | 2619 | .resource = r8a7779_pfc_resources, | 
|  | 2620 | .num_resources = ARRAY_SIZE(r8a7779_pfc_resources), | 
|  | 2621 |  | 
|  | 2622 | .unlock_reg = 0xfffc0000, /* PMMR */ | 
|  | 2623 |  | 
|  | 2624 | .reserved_id = PINMUX_RESERVED, | 
|  | 2625 | .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, | 
|  | 2626 | .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, | 
|  | 2627 | .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, | 
| Magnus Damm | 2ecba2c | 2011-12-14 01:36:32 +0900 | [diff] [blame] | 2628 | .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, | 
| Magnus Damm | 19c43fc | 2011-12-14 01:36:22 +0900 | [diff] [blame] | 2629 | .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, | 
|  | 2630 |  | 
|  | 2631 | .first_gpio = GPIO_GP_0_0, | 
| Magnus Damm | 2ecba2c | 2011-12-14 01:36:32 +0900 | [diff] [blame] | 2632 | .last_gpio = GPIO_FN_SCK4_B, | 
| Magnus Damm | 19c43fc | 2011-12-14 01:36:22 +0900 | [diff] [blame] | 2633 |  | 
|  | 2634 | .gpios = pinmux_gpios, | 
|  | 2635 | .cfg_regs = pinmux_config_regs, | 
|  | 2636 | .data_regs = pinmux_data_regs, | 
|  | 2637 |  | 
|  | 2638 | .gpio_data = pinmux_data, | 
|  | 2639 | .gpio_data_size = ARRAY_SIZE(pinmux_data), | 
|  | 2640 | }; | 
|  | 2641 |  | 
|  | 2642 | void r8a7779_pinmux_init(void) | 
|  | 2643 | { | 
|  | 2644 | register_pinmux(&r8a7779_pinmux_info); | 
|  | 2645 | } |