Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar |
| 3 | * |
| 4 | * This file contains the lowest level x86_64-specific interrupt |
| 5 | * entry and irq statistics code. All the remaining irq logic is |
| 6 | * done by the generic kernel/irq/ code and in the |
| 7 | * x86_64-specific irq controller code. (e.g. i8259.c and |
| 8 | * io_apic.c.) |
| 9 | */ |
| 10 | |
| 11 | #include <linux/kernel_stat.h> |
| 12 | #include <linux/interrupt.h> |
| 13 | #include <linux/seq_file.h> |
| 14 | #include <linux/module.h> |
Ashok Raj | 76e4f66 | 2005-06-25 14:55:00 -0700 | [diff] [blame] | 15 | #include <linux/delay.h> |
Frederic Weisbecker | bcbc4f2 | 2008-12-09 23:54:20 +0100 | [diff] [blame] | 16 | #include <linux/ftrace.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 17 | #include <asm/uaccess.h> |
| 18 | #include <asm/io_apic.h> |
Andi Kleen | 95833c8 | 2006-01-11 22:44:36 +0100 | [diff] [blame] | 19 | #include <asm/idle.h> |
Eric W. Biederman | 2fb12a9 | 2007-02-13 13:26:25 +0100 | [diff] [blame] | 20 | #include <asm/smp.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 21 | |
Eric Sandeen | 4961f10 | 2006-06-26 14:00:05 +0200 | [diff] [blame] | 22 | /* |
| 23 | * Probabilistic stack overflow check: |
| 24 | * |
| 25 | * Only check the stack in process context, because everything else |
| 26 | * runs on the big interrupt stacks. Checking reliably is too expensive, |
| 27 | * so we just check from interrupts. |
| 28 | */ |
| 29 | static inline void stack_overflow_check(struct pt_regs *regs) |
| 30 | { |
Ingo Molnar | f377fa1 | 2008-11-23 09:02:26 +0100 | [diff] [blame] | 31 | #ifdef CONFIG_DEBUG_STACKOVERFLOW |
Roman Zippel | c9f4f06 | 2007-05-09 02:35:16 -0700 | [diff] [blame] | 32 | u64 curbase = (u64)task_stack_page(current); |
Eric Sandeen | 4961f10 | 2006-06-26 14:00:05 +0200 | [diff] [blame] | 33 | |
Ingo Molnar | f377fa1 | 2008-11-23 09:02:26 +0100 | [diff] [blame] | 34 | WARN_ONCE(regs->sp >= curbase && |
| 35 | regs->sp <= curbase + THREAD_SIZE && |
| 36 | regs->sp < curbase + sizeof(struct thread_info) + |
| 37 | sizeof(struct pt_regs) + 128, |
| 38 | |
| 39 | "do_IRQ: %s near stack overflow (cur:%Lx,sp:%lx)\n", |
| 40 | current->comm, curbase, regs->sp); |
Eric Sandeen | 4961f10 | 2006-06-26 14:00:05 +0200 | [diff] [blame] | 41 | #endif |
Ingo Molnar | f377fa1 | 2008-11-23 09:02:26 +0100 | [diff] [blame] | 42 | } |
Eric Sandeen | 4961f10 | 2006-06-26 14:00:05 +0200 | [diff] [blame] | 43 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 44 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 45 | * do_IRQ handles all normal device IRQ's (the special |
| 46 | * SMP cross-CPU interrupts have their own specific |
| 47 | * handlers). |
| 48 | */ |
Frederic Weisbecker | bcbc4f2 | 2008-12-09 23:54:20 +0100 | [diff] [blame] | 49 | asmlinkage unsigned int __irq_entry do_IRQ(struct pt_regs *regs) |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 50 | { |
| 51 | struct pt_regs *old_regs = set_irq_regs(regs); |
Yinghai Lu | 46926b6 | 2008-08-19 20:50:15 -0700 | [diff] [blame] | 52 | struct irq_desc *desc; |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 53 | |
Rusty Russell | 19eadf9 | 2006-06-27 02:53:44 -0700 | [diff] [blame] | 54 | /* high bit used in ret_from_ code */ |
H. Peter Anvin | 65ea5b0 | 2008-01-30 13:30:56 +0100 | [diff] [blame] | 55 | unsigned vector = ~regs->orig_ax; |
Eric W. Biederman | e500f57 | 2006-10-04 02:16:50 -0700 | [diff] [blame] | 56 | unsigned irq; |
| 57 | |
| 58 | exit_idle(); |
| 59 | irq_enter(); |
Eric W. Biederman | 550f229 | 2006-10-04 02:16:51 -0700 | [diff] [blame] | 60 | irq = __get_cpu_var(vector_irq)[vector]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 61 | |
Eric Sandeen | 4961f10 | 2006-06-26 14:00:05 +0200 | [diff] [blame] | 62 | stack_overflow_check(regs); |
Eric W. Biederman | d3696cf | 2006-10-08 23:41:59 -0600 | [diff] [blame] | 63 | |
Yinghai Lu | cb5bc83 | 2008-08-19 20:50:17 -0700 | [diff] [blame] | 64 | desc = irq_to_desc(irq); |
Yinghai Lu | 46926b6 | 2008-08-19 20:50:15 -0700 | [diff] [blame] | 65 | if (likely(desc)) |
| 66 | generic_handle_irq_desc(irq, desc); |
Eric W. Biederman | 2fb12a9 | 2007-02-13 13:26:25 +0100 | [diff] [blame] | 67 | else { |
| 68 | if (!disable_apic) |
| 69 | ack_APIC_irq(); |
| 70 | |
| 71 | if (printk_ratelimit()) |
| 72 | printk(KERN_EMERG "%s: %d.%d No irq handler for vector\n", |
| 73 | __func__, smp_processor_id(), vector); |
| 74 | } |
Eric W. Biederman | d3696cf | 2006-10-08 23:41:59 -0600 | [diff] [blame] | 75 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 76 | irq_exit(); |
| 77 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 78 | set_irq_regs(old_regs); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 79 | return 1; |
| 80 | } |
| 81 | |
Ashok Raj | 76e4f66 | 2005-06-25 14:55:00 -0700 | [diff] [blame] | 82 | #ifdef CONFIG_HOTPLUG_CPU |
Mike Travis | d7b381b | 2008-12-16 17:33:58 -0800 | [diff] [blame] | 83 | /* A cpu has been removed from cpu_online_mask. Reset irq affinities. */ |
| 84 | void fixup_irqs(void) |
Ashok Raj | 76e4f66 | 2005-06-25 14:55:00 -0700 | [diff] [blame] | 85 | { |
| 86 | unsigned int irq; |
| 87 | static int warned; |
Yinghai Lu | 2c6927a | 2008-08-19 20:50:11 -0700 | [diff] [blame] | 88 | struct irq_desc *desc; |
Ashok Raj | 76e4f66 | 2005-06-25 14:55:00 -0700 | [diff] [blame] | 89 | |
Yinghai Lu | 2c6927a | 2008-08-19 20:50:11 -0700 | [diff] [blame] | 90 | for_each_irq_desc(irq, desc) { |
Siddha, Suresh B | 48d8d7e | 2007-06-25 15:52:35 -0700 | [diff] [blame] | 91 | int break_affinity = 0; |
| 92 | int set_affinity = 1; |
Mike Travis | d7b381b | 2008-12-16 17:33:58 -0800 | [diff] [blame] | 93 | const struct cpumask *affinity; |
Siddha, Suresh B | 48d8d7e | 2007-06-25 15:52:35 -0700 | [diff] [blame] | 94 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 95 | if (!desc) |
| 96 | continue; |
Ashok Raj | 76e4f66 | 2005-06-25 14:55:00 -0700 | [diff] [blame] | 97 | if (irq == 2) |
| 98 | continue; |
| 99 | |
Siddha, Suresh B | 48d8d7e | 2007-06-25 15:52:35 -0700 | [diff] [blame] | 100 | /* interrupt's are disabled at this point */ |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 101 | spin_lock(&desc->lock); |
Siddha, Suresh B | 48d8d7e | 2007-06-25 15:52:35 -0700 | [diff] [blame] | 102 | |
Mike Travis | d7b381b | 2008-12-16 17:33:58 -0800 | [diff] [blame] | 103 | affinity = &desc->affinity; |
Siddha, Suresh B | 48d8d7e | 2007-06-25 15:52:35 -0700 | [diff] [blame] | 104 | if (!irq_has_action(irq) || |
Mike Travis | d7b381b | 2008-12-16 17:33:58 -0800 | [diff] [blame] | 105 | cpumask_equal(affinity, cpu_online_mask)) { |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 106 | spin_unlock(&desc->lock); |
Siddha, Suresh B | 48d8d7e | 2007-06-25 15:52:35 -0700 | [diff] [blame] | 107 | continue; |
| 108 | } |
| 109 | |
Mike Travis | d7b381b | 2008-12-16 17:33:58 -0800 | [diff] [blame] | 110 | if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) { |
Siddha, Suresh B | 48d8d7e | 2007-06-25 15:52:35 -0700 | [diff] [blame] | 111 | break_affinity = 1; |
Mike Travis | d7b381b | 2008-12-16 17:33:58 -0800 | [diff] [blame] | 112 | affinity = cpu_all_mask; |
Ashok Raj | 76e4f66 | 2005-06-25 14:55:00 -0700 | [diff] [blame] | 113 | } |
Siddha, Suresh B | 48d8d7e | 2007-06-25 15:52:35 -0700 | [diff] [blame] | 114 | |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 115 | if (desc->chip->mask) |
| 116 | desc->chip->mask(irq); |
Siddha, Suresh B | 48d8d7e | 2007-06-25 15:52:35 -0700 | [diff] [blame] | 117 | |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 118 | if (desc->chip->set_affinity) |
Mike Travis | d7b381b | 2008-12-16 17:33:58 -0800 | [diff] [blame] | 119 | desc->chip->set_affinity(irq, affinity); |
Siddha, Suresh B | 48d8d7e | 2007-06-25 15:52:35 -0700 | [diff] [blame] | 120 | else if (!(warned++)) |
| 121 | set_affinity = 0; |
| 122 | |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 123 | if (desc->chip->unmask) |
| 124 | desc->chip->unmask(irq); |
Siddha, Suresh B | 48d8d7e | 2007-06-25 15:52:35 -0700 | [diff] [blame] | 125 | |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 126 | spin_unlock(&desc->lock); |
Siddha, Suresh B | 48d8d7e | 2007-06-25 15:52:35 -0700 | [diff] [blame] | 127 | |
| 128 | if (break_affinity && set_affinity) |
| 129 | printk("Broke affinity for irq %i\n", irq); |
| 130 | else if (!set_affinity) |
Ashok Raj | 76e4f66 | 2005-06-25 14:55:00 -0700 | [diff] [blame] | 131 | printk("Cannot set affinity for irq %i\n", irq); |
| 132 | } |
| 133 | |
| 134 | /* That doesn't seem sufficient. Give it 1ms. */ |
| 135 | local_irq_enable(); |
| 136 | mdelay(1); |
| 137 | local_irq_disable(); |
| 138 | } |
| 139 | #endif |
Andi Kleen | ed6b676 | 2005-07-28 21:15:49 -0700 | [diff] [blame] | 140 | |
| 141 | extern void call_softirq(void); |
| 142 | |
| 143 | asmlinkage void do_softirq(void) |
| 144 | { |
| 145 | __u32 pending; |
| 146 | unsigned long flags; |
| 147 | |
| 148 | if (in_interrupt()) |
| 149 | return; |
| 150 | |
| 151 | local_irq_save(flags); |
| 152 | pending = local_softirq_pending(); |
| 153 | /* Switch to interrupt stack */ |
Ingo Molnar | 2601e64 | 2006-07-03 00:24:45 -0700 | [diff] [blame] | 154 | if (pending) { |
Andi Kleen | ed6b676 | 2005-07-28 21:15:49 -0700 | [diff] [blame] | 155 | call_softirq(); |
Ingo Molnar | 2601e64 | 2006-07-03 00:24:45 -0700 | [diff] [blame] | 156 | WARN_ON_ONCE(softirq_count()); |
| 157 | } |
Andi Kleen | ed6b676 | 2005-07-28 21:15:49 -0700 | [diff] [blame] | 158 | local_irq_restore(flags); |
| 159 | } |