Michael Bohan | a05f455 | 2012-05-24 15:58:11 -0700 | [diff] [blame^] | 1 | * msm-qpnp-pin |
| 2 | |
| 3 | msm-qpnp-pin is a GPIO chip driver for the MSM SPMI implementation. |
| 4 | It creates a spmi_device for every spmi-dev-container block of device_nodes. |
| 5 | These device_nodes contained within specify the PMIC pin number associated |
| 6 | with each gpio chip. The driver will map these to Linux GPIO numbers. |
| 7 | |
| 8 | [PMIC GPIO Device Declarations] |
| 9 | |
| 10 | -Root Node- |
| 11 | |
| 12 | Required properties : |
| 13 | - spmi-dev-container : Used to specify the following child nodes as part of the |
| 14 | same SPMI device. |
| 15 | - gpio-controller : Specify as gpio-contoller. All child nodes will belong to |
| 16 | this gpio_chip. |
| 17 | - #gpio-cells: We encode a PMIC pin number and a 32-bit flag field to |
| 18 | specify the gpio configuration. This must be set to '2'. |
| 19 | - #address-cells: Specify one address field. This must be set to '1'. |
| 20 | - #size-cells: Specify one size-cell. This must be set to '1'. |
| 21 | - compatible = "qcom,qpnp-pin" : Specify driver matching for this driver. |
| 22 | |
| 23 | -Child Nodes- |
| 24 | |
| 25 | Required properties : |
| 26 | - reg : Specify the spmi offset and size for this pin device. |
| 27 | - qcom,pin-num : Specify the PMIC pin number for this device. |
| 28 | |
| 29 | Optional configuration properties : |
| 30 | - qcom,direction: indicates whether the gpio should be input, output, or |
| 31 | both. |
| 32 | QPNP_PIN_DIR_IN = 0, |
| 33 | QPNP_PIN_DIR_OUT = 1, |
| 34 | QPNP_PIN_DIR_BOTH = 2 |
| 35 | |
| 36 | - qcom,output-type: indicates gpio should be configured as CMOS or open |
| 37 | drain. |
| 38 | QPNP_PIN_OUT_BUF_CMOS = 0 |
| 39 | QPNP_PIN_OUT_BUF_OPEN_DRAIN_NMOS = 1, |
| 40 | QPNP_PIN_OUT_BUF_OPEN_DRAIN_PMOS = 2, |
| 41 | |
| 42 | - qcom,invert: Invert the signal of the gpio line - |
| 43 | QPNP_PIN_INVERT_DISABLE = 0 |
| 44 | QPNP_PIN_INVERT_ENABLE = 1 |
| 45 | |
| 46 | - qcom,pull: Indicates whether a pull up or pull down should be |
| 47 | applied. If a pullup is required the current strength |
| 48 | needs to be specified. Current values of 30uA, 1.5uA, |
| 49 | 31.5uA, 1.5uA with 30uA boost are supported. |
| 50 | QPNP_PIN_PULL_UP_30 = 0, |
| 51 | QPNP_PIN_PULL_UP_1P5 = 1, |
| 52 | QPNP_PIN_PULL_UP_31P5 = 2, |
| 53 | QPNP_PIN_PULL_UP_1P5_30 = 3, |
| 54 | QPNP_PIN_PULL_DN = 4, |
| 55 | QPNP_PIN_PULL_NO = 5 |
| 56 | |
| 57 | - qcom,vin-sel: specifies the voltage level when the output is set to 1. |
| 58 | For an input gpio specifies the voltage level at which |
| 59 | the input is interpreted as a logical 1. |
| 60 | QPNP_PIN_VIN0 = 0, |
| 61 | QPNP_PIN_VIN1 = 1, |
| 62 | QPNP_PIN_VIN2 = 2, |
| 63 | QPNP_PIN_VIN3 = 3, |
| 64 | QPNP_PIN_VIN4 = 4, |
| 65 | QPNP_PIN_VIN5 = 5, |
| 66 | QPNP_PIN_VIN6 = 6, |
| 67 | QPNP_PIN_VIN7 = 7 |
| 68 | |
| 69 | - qcom,out-strength: the amount of current supplied for an output gpio. |
| 70 | QPNP_PIN_OUT_STRENGTH_LOW = 1 |
| 71 | QPNP_PIN_OUT_STRENGTH_MED = 2, |
| 72 | QPNP_PIN_OUT_STRENGTH_HIGH = 3, |
| 73 | |
| 74 | - qcom,source-sel: choose alternate function for the gpio. Certain gpios |
| 75 | can be paired (shorted) with each other. Some gpio pin |
| 76 | can act as alternate functions. |
| 77 | QPNP_PIN_FUNC_NORMAL = 0, |
| 78 | QPNP_PIN_FUNC_PAIRED = 1 |
| 79 | QPNP_PIN_FUNC_1 = 2, |
| 80 | QPNP_PIN_FUNC_2 = 3, |
| 81 | QPNP_PIN_DTEST1 = 4, |
| 82 | QPNP_PIN_DTEST2 = 5, |
| 83 | QPNP_PIN_DTEST3 = 6, |
| 84 | QPNP_PIN_DTEST4 = 7 |
| 85 | |
| 86 | - qcom,master-en: 1 = Enable features within the |
| 87 | pin block based on configurations. |
| 88 | 0 = Completely disable the block and |
| 89 | let the pin float with high impedance |
| 90 | regardless of other settings. |
| 91 | |
| 92 | *Note: If any of the configuration properties are not specified, then the |
| 93 | qpnp-pin driver will not modify that respective configuration in |
| 94 | hardware. |
| 95 | |
| 96 | [PMIC GPIO clients] |
| 97 | |
| 98 | Required properties : |
| 99 | - gpios : Contains 3 fields of the form <&gpio_controller pmic_pin_num flags> |
| 100 | |
| 101 | [Example] |
| 102 | |
| 103 | qpnp: qcom,spmi@fc4c0000 { |
| 104 | #address-cells = <1>; |
| 105 | #size-cells = <0>; |
| 106 | interrupt-controller; |
| 107 | #interrupt-cells = <3>; |
| 108 | |
| 109 | qcom,pm8941@0 { |
| 110 | spmi-slave-container; |
| 111 | reg = <0x0>; |
| 112 | #address-cells = <1>; |
| 113 | #size-cells = <1>; |
| 114 | |
| 115 | pm8941_gpios: gpios { |
| 116 | spmi-dev-container; |
| 117 | compatible = "qcom,qpnp-pin"; |
| 118 | gpio-controller; |
| 119 | #gpio-cells = <2>; |
| 120 | #address-cells = <1>; |
| 121 | #size-cells = <1>; |
| 122 | |
| 123 | gpio@c000 { |
| 124 | reg = <0xc000 0x100>; |
| 125 | qcom,pin-num = <62>; |
| 126 | }; |
| 127 | |
| 128 | gpio@c100 { |
| 129 | reg = <0xc100 0x100>; |
| 130 | qcom,pin-num = <20>; |
| 131 | qcom,source_sel = <2>; |
| 132 | qcom,pull = <5>; |
| 133 | }; |
| 134 | }; |
| 135 | |
| 136 | qcom,testgpio@1000 { |
| 137 | compatible = "qcom,qpnp-testgpio"; |
| 138 | reg = <0x1000 0x1000>; |
| 139 | gpios = <&pm8941_gpios 62 0x0 &pm8941_gpios 20 0x1>; |
| 140 | }; |
| 141 | }; |
| 142 | }; |
| 143 | }; |