| Eric Moore | 635374e | 2009-03-09 01:21:12 -0600 | [diff] [blame] | 1 | /* | 
| nagalakshmi.nandigama@lsi.com | f9d979c | 2011-10-19 15:36:05 +0530 | [diff] [blame] | 2 |  *  Copyright (c) 2000-2011 LSI Corporation. | 
| Eric Moore | 635374e | 2009-03-09 01:21:12 -0600 | [diff] [blame] | 3 |  * | 
 | 4 |  * | 
 | 5 |  *           Name:  mpi2.h | 
 | 6 |  *          Title:  MPI Message independent structures and definitions | 
 | 7 |  *                  including System Interface Register Set and | 
 | 8 |  *                  scatter/gather formats. | 
 | 9 |  *  Creation Date:  June 21, 2006 | 
 | 10 |  * | 
| nagalakshmi.nandigama@lsi.com | f9d979c | 2011-10-19 15:36:05 +0530 | [diff] [blame] | 11 |  *  mpi2.h Version:  02.00.20 | 
| Eric Moore | 635374e | 2009-03-09 01:21:12 -0600 | [diff] [blame] | 12 |  * | 
 | 13 |  *  Version History | 
 | 14 |  *  --------------- | 
 | 15 |  * | 
 | 16 |  *  Date      Version   Description | 
 | 17 |  *  --------  --------  ------------------------------------------------------ | 
 | 18 |  *  04-30-07  02.00.00  Corresponds to Fusion-MPT MPI Specification Rev A. | 
 | 19 |  *  06-04-07  02.00.01  Bumped MPI2_HEADER_VERSION_UNIT. | 
 | 20 |  *  06-26-07  02.00.02  Bumped MPI2_HEADER_VERSION_UNIT. | 
 | 21 |  *  08-31-07  02.00.03  Bumped MPI2_HEADER_VERSION_UNIT. | 
 | 22 |  *                      Moved ReplyPostHostIndex register to offset 0x6C of the | 
 | 23 |  *                      MPI2_SYSTEM_INTERFACE_REGS and modified the define for | 
 | 24 |  *                      MPI2_REPLY_POST_HOST_INDEX_OFFSET. | 
 | 25 |  *                      Added union of request descriptors. | 
 | 26 |  *                      Added union of reply descriptors. | 
 | 27 |  *  10-31-07  02.00.04  Bumped MPI2_HEADER_VERSION_UNIT. | 
 | 28 |  *                      Added define for MPI2_VERSION_02_00. | 
 | 29 |  *                      Fixed the size of the FunctionDependent5 field in the | 
 | 30 |  *                      MPI2_DEFAULT_REPLY structure. | 
 | 31 |  *  12-18-07  02.00.05  Bumped MPI2_HEADER_VERSION_UNIT. | 
 | 32 |  *                      Removed the MPI-defined Fault Codes and extended the | 
 | 33 |  *                      product specific codes up to 0xEFFF. | 
 | 34 |  *                      Added a sixth key value for the WriteSequence register | 
 | 35 |  *                      and changed the flush value to 0x0. | 
 | 36 |  *                      Added message function codes for Diagnostic Buffer Post | 
 | 37 |  *                      and Diagnsotic Release. | 
 | 38 |  *                      New IOCStatus define: MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED | 
 | 39 |  *                      Moved MPI2_VERSION_UNION from mpi2_ioc.h. | 
 | 40 |  *  02-29-08  02.00.06  Bumped MPI2_HEADER_VERSION_UNIT. | 
 | 41 |  *  03-03-08  02.00.07  Bumped MPI2_HEADER_VERSION_UNIT. | 
 | 42 |  *  05-21-08  02.00.08  Bumped MPI2_HEADER_VERSION_UNIT. | 
 | 43 |  *                      Added #defines for marking a reply descriptor as unused. | 
 | 44 |  *  06-27-08  02.00.09  Bumped MPI2_HEADER_VERSION_UNIT. | 
 | 45 |  *  10-02-08  02.00.10  Bumped MPI2_HEADER_VERSION_UNIT. | 
 | 46 |  *                      Moved LUN field defines from mpi2_init.h. | 
 | 47 |  *  01-19-09  02.00.11  Bumped MPI2_HEADER_VERSION_UNIT. | 
| Kashyap, Desai | 7b936b0 | 2009-09-25 11:44:41 +0530 | [diff] [blame] | 48 |  *  05-06-09  02.00.12  Bumped MPI2_HEADER_VERSION_UNIT. | 
 | 49 |  *                      In all request and reply descriptors, replaced VF_ID | 
 | 50 |  *                      field with MSIxIndex field. | 
 | 51 |  *                      Removed DevHandle field from | 
 | 52 |  *                      MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR and made those | 
 | 53 |  *                      bytes reserved. | 
 | 54 |  *                      Added RAID Accelerator functionality. | 
| Kashyap, Desai | 9fec5f9 | 2009-09-23 17:26:20 +0530 | [diff] [blame] | 55 |  *  07-30-09  02.00.13  Bumped MPI2_HEADER_VERSION_UNIT. | 
| Kashyap, Desai | f4af3c1 | 2009-12-16 18:55:54 +0530 | [diff] [blame] | 56 |  *  10-28-09  02.00.14  Bumped MPI2_HEADER_VERSION_UNIT. | 
 | 57 |  *                      Added MSI-x index mask and shift for Reply Post Host | 
 | 58 |  *                      Index register. | 
 | 59 |  *                      Added function code for Host Based Discovery Action. | 
| Kashyap, Desai | 203d65b | 2010-06-17 13:37:59 +0530 | [diff] [blame] | 60 |  *  02-10-10  02.00.15  Bumped MPI2_HEADER_VERSION_UNIT. | 
 | 61 |  *                      Added define for MPI2_FUNCTION_PWR_MGMT_CONTROL. | 
 | 62 |  *                      Added defines for product-specific range of message | 
 | 63 |  *                      function codes, 0xF0 to 0xFF. | 
| Kashyap, Desai | 7d06140 | 2010-11-13 04:36:14 +0530 | [diff] [blame] | 64 |  *  05-12-10  02.00.16  Bumped MPI2_HEADER_VERSION_UNIT. | 
 | 65 |  *                      Added alternative defines for the SGE Direction bit. | 
| Kashyap, Desai | 9af05d9 | 2011-01-04 11:35:41 +0530 | [diff] [blame] | 66 |  *  08-11-10  02.00.17  Bumped MPI2_HEADER_VERSION_UNIT. | 
| Kashyap, Desai | ce7b181 | 2011-06-14 10:55:45 +0530 | [diff] [blame] | 67 |  *  11-10-10  02.00.18  Bumped MPI2_HEADER_VERSION_UNIT. | 
 | 68 |  *                      Added MPI2_IEEE_SGE_FLAGS_SYSTEMPLBCPI_ADDR define. | 
| nagalakshmi.nandigama@lsi.com | f9d979c | 2011-10-19 15:36:05 +0530 | [diff] [blame] | 69 |  *  02-23-11  02.00.19  Bumped MPI2_HEADER_VERSION_UNIT. | 
 | 70 |  *                      Added MPI2_FUNCTION_SEND_HOST_MESSAGE. | 
 | 71 |  *  03-09-11  02.00.20  Bumped MPI2_HEADER_VERSION_UNIT. | 
| Eric Moore | 635374e | 2009-03-09 01:21:12 -0600 | [diff] [blame] | 72 |  *  -------------------------------------------------------------------------- | 
 | 73 |  */ | 
 | 74 |  | 
 | 75 | #ifndef MPI2_H | 
 | 76 | #define MPI2_H | 
 | 77 |  | 
 | 78 |  | 
 | 79 | /***************************************************************************** | 
 | 80 | * | 
 | 81 | *        MPI Version Definitions | 
 | 82 | * | 
 | 83 | *****************************************************************************/ | 
 | 84 |  | 
 | 85 | #define MPI2_VERSION_MAJOR                  (0x02) | 
 | 86 | #define MPI2_VERSION_MINOR                  (0x00) | 
 | 87 | #define MPI2_VERSION_MAJOR_MASK             (0xFF00) | 
 | 88 | #define MPI2_VERSION_MAJOR_SHIFT            (8) | 
 | 89 | #define MPI2_VERSION_MINOR_MASK             (0x00FF) | 
 | 90 | #define MPI2_VERSION_MINOR_SHIFT            (0) | 
 | 91 | #define MPI2_VERSION ((MPI2_VERSION_MAJOR << MPI2_VERSION_MAJOR_SHIFT) |   \ | 
 | 92 |                                       MPI2_VERSION_MINOR) | 
 | 93 |  | 
 | 94 | #define MPI2_VERSION_02_00                  (0x0200) | 
 | 95 |  | 
 | 96 | /* versioning for this MPI header set */ | 
| nagalakshmi.nandigama@lsi.com | f9d979c | 2011-10-19 15:36:05 +0530 | [diff] [blame] | 97 | #define MPI2_HEADER_VERSION_UNIT            (0x14) | 
| Eric Moore | 635374e | 2009-03-09 01:21:12 -0600 | [diff] [blame] | 98 | #define MPI2_HEADER_VERSION_DEV             (0x00) | 
 | 99 | #define MPI2_HEADER_VERSION_UNIT_MASK       (0xFF00) | 
 | 100 | #define MPI2_HEADER_VERSION_UNIT_SHIFT      (8) | 
 | 101 | #define MPI2_HEADER_VERSION_DEV_MASK        (0x00FF) | 
 | 102 | #define MPI2_HEADER_VERSION_DEV_SHIFT       (0) | 
 | 103 | #define MPI2_HEADER_VERSION ((MPI2_HEADER_VERSION_UNIT << 8) | MPI2_HEADER_VERSION_DEV) | 
 | 104 |  | 
 | 105 |  | 
 | 106 | /***************************************************************************** | 
 | 107 | * | 
 | 108 | *        IOC State Definitions | 
 | 109 | * | 
 | 110 | *****************************************************************************/ | 
 | 111 |  | 
 | 112 | #define MPI2_IOC_STATE_RESET               (0x00000000) | 
 | 113 | #define MPI2_IOC_STATE_READY               (0x10000000) | 
 | 114 | #define MPI2_IOC_STATE_OPERATIONAL         (0x20000000) | 
 | 115 | #define MPI2_IOC_STATE_FAULT               (0x40000000) | 
 | 116 |  | 
 | 117 | #define MPI2_IOC_STATE_MASK                (0xF0000000) | 
 | 118 | #define MPI2_IOC_STATE_SHIFT               (28) | 
 | 119 |  | 
 | 120 | /* Fault state range for prodcut specific codes */ | 
 | 121 | #define MPI2_FAULT_PRODUCT_SPECIFIC_MIN                 (0x0000) | 
 | 122 | #define MPI2_FAULT_PRODUCT_SPECIFIC_MAX                 (0xEFFF) | 
 | 123 |  | 
 | 124 |  | 
 | 125 | /***************************************************************************** | 
 | 126 | * | 
 | 127 | *        System Interface Register Definitions | 
 | 128 | * | 
 | 129 | *****************************************************************************/ | 
 | 130 |  | 
 | 131 | typedef volatile struct _MPI2_SYSTEM_INTERFACE_REGS | 
 | 132 | { | 
 | 133 |     U32         Doorbell;                   /* 0x00 */ | 
 | 134 |     U32         WriteSequence;              /* 0x04 */ | 
 | 135 |     U32         HostDiagnostic;             /* 0x08 */ | 
 | 136 |     U32         Reserved1;                  /* 0x0C */ | 
 | 137 |     U32         DiagRWData;                 /* 0x10 */ | 
 | 138 |     U32         DiagRWAddressLow;           /* 0x14 */ | 
 | 139 |     U32         DiagRWAddressHigh;          /* 0x18 */ | 
 | 140 |     U32         Reserved2[5];               /* 0x1C */ | 
 | 141 |     U32         HostInterruptStatus;        /* 0x30 */ | 
 | 142 |     U32         HostInterruptMask;          /* 0x34 */ | 
 | 143 |     U32         DCRData;                    /* 0x38 */ | 
 | 144 |     U32         DCRAddress;                 /* 0x3C */ | 
 | 145 |     U32         Reserved3[2];               /* 0x40 */ | 
 | 146 |     U32         ReplyFreeHostIndex;         /* 0x48 */ | 
 | 147 |     U32         Reserved4[8];               /* 0x4C */ | 
 | 148 |     U32         ReplyPostHostIndex;         /* 0x6C */ | 
 | 149 |     U32         Reserved5;                  /* 0x70 */ | 
 | 150 |     U32         HCBSize;                    /* 0x74 */ | 
 | 151 |     U32         HCBAddressLow;              /* 0x78 */ | 
 | 152 |     U32         HCBAddressHigh;             /* 0x7C */ | 
 | 153 |     U32         Reserved6[16];              /* 0x80 */ | 
 | 154 |     U32         RequestDescriptorPostLow;   /* 0xC0 */ | 
 | 155 |     U32         RequestDescriptorPostHigh;  /* 0xC4 */ | 
 | 156 |     U32         Reserved7[14];              /* 0xC8 */ | 
 | 157 | } MPI2_SYSTEM_INTERFACE_REGS, MPI2_POINTER PTR_MPI2_SYSTEM_INTERFACE_REGS, | 
 | 158 |   Mpi2SystemInterfaceRegs_t, MPI2_POINTER pMpi2SystemInterfaceRegs_t; | 
 | 159 |  | 
 | 160 | /* | 
 | 161 |  * Defines for working with the Doorbell register. | 
 | 162 |  */ | 
 | 163 | #define MPI2_DOORBELL_OFFSET                    (0x00000000) | 
 | 164 |  | 
 | 165 | /* IOC --> System values */ | 
 | 166 | #define MPI2_DOORBELL_USED                      (0x08000000) | 
 | 167 | #define MPI2_DOORBELL_WHO_INIT_MASK             (0x07000000) | 
 | 168 | #define MPI2_DOORBELL_WHO_INIT_SHIFT            (24) | 
 | 169 | #define MPI2_DOORBELL_FAULT_CODE_MASK           (0x0000FFFF) | 
 | 170 | #define MPI2_DOORBELL_DATA_MASK                 (0x0000FFFF) | 
 | 171 |  | 
 | 172 | /* System --> IOC values */ | 
 | 173 | #define MPI2_DOORBELL_FUNCTION_MASK             (0xFF000000) | 
 | 174 | #define MPI2_DOORBELL_FUNCTION_SHIFT            (24) | 
 | 175 | #define MPI2_DOORBELL_ADD_DWORDS_MASK           (0x00FF0000) | 
 | 176 | #define MPI2_DOORBELL_ADD_DWORDS_SHIFT          (16) | 
 | 177 |  | 
 | 178 |  | 
 | 179 | /* | 
 | 180 |  * Defines for the WriteSequence register | 
 | 181 |  */ | 
 | 182 | #define MPI2_WRITE_SEQUENCE_OFFSET              (0x00000004) | 
 | 183 | #define MPI2_WRSEQ_KEY_VALUE_MASK               (0x0000000F) | 
 | 184 | #define MPI2_WRSEQ_FLUSH_KEY_VALUE              (0x0) | 
 | 185 | #define MPI2_WRSEQ_1ST_KEY_VALUE                (0xF) | 
 | 186 | #define MPI2_WRSEQ_2ND_KEY_VALUE                (0x4) | 
 | 187 | #define MPI2_WRSEQ_3RD_KEY_VALUE                (0xB) | 
 | 188 | #define MPI2_WRSEQ_4TH_KEY_VALUE                (0x2) | 
 | 189 | #define MPI2_WRSEQ_5TH_KEY_VALUE                (0x7) | 
 | 190 | #define MPI2_WRSEQ_6TH_KEY_VALUE                (0xD) | 
 | 191 |  | 
 | 192 | /* | 
 | 193 |  * Defines for the HostDiagnostic register | 
 | 194 |  */ | 
 | 195 | #define MPI2_HOST_DIAGNOSTIC_OFFSET             (0x00000008) | 
 | 196 |  | 
 | 197 | #define MPI2_DIAG_BOOT_DEVICE_SELECT_MASK       (0x00001800) | 
 | 198 | #define MPI2_DIAG_BOOT_DEVICE_SELECT_DEFAULT    (0x00000000) | 
 | 199 | #define MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW       (0x00000800) | 
 | 200 |  | 
 | 201 | #define MPI2_DIAG_CLEAR_FLASH_BAD_SIG           (0x00000400) | 
 | 202 | #define MPI2_DIAG_FORCE_HCB_ON_RESET            (0x00000200) | 
 | 203 | #define MPI2_DIAG_HCB_MODE                      (0x00000100) | 
 | 204 | #define MPI2_DIAG_DIAG_WRITE_ENABLE             (0x00000080) | 
 | 205 | #define MPI2_DIAG_FLASH_BAD_SIG                 (0x00000040) | 
 | 206 | #define MPI2_DIAG_RESET_HISTORY                 (0x00000020) | 
 | 207 | #define MPI2_DIAG_DIAG_RW_ENABLE                (0x00000010) | 
 | 208 | #define MPI2_DIAG_RESET_ADAPTER                 (0x00000004) | 
 | 209 | #define MPI2_DIAG_HOLD_IOC_RESET                (0x00000002) | 
 | 210 |  | 
 | 211 | /* | 
 | 212 |  * Offsets for DiagRWData and address | 
 | 213 |  */ | 
 | 214 | #define MPI2_DIAG_RW_DATA_OFFSET                (0x00000010) | 
 | 215 | #define MPI2_DIAG_RW_ADDRESS_LOW_OFFSET         (0x00000014) | 
 | 216 | #define MPI2_DIAG_RW_ADDRESS_HIGH_OFFSET        (0x00000018) | 
 | 217 |  | 
 | 218 | /* | 
 | 219 |  * Defines for the HostInterruptStatus register | 
 | 220 |  */ | 
 | 221 | #define MPI2_HOST_INTERRUPT_STATUS_OFFSET       (0x00000030) | 
 | 222 | #define MPI2_HIS_SYS2IOC_DB_STATUS              (0x80000000) | 
 | 223 | #define MPI2_HIS_IOP_DOORBELL_STATUS            MPI2_HIS_SYS2IOC_DB_STATUS | 
 | 224 | #define MPI2_HIS_RESET_IRQ_STATUS               (0x40000000) | 
 | 225 | #define MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT     (0x00000008) | 
 | 226 | #define MPI2_HIS_IOC2SYS_DB_STATUS              (0x00000001) | 
 | 227 | #define MPI2_HIS_DOORBELL_INTERRUPT             MPI2_HIS_IOC2SYS_DB_STATUS | 
 | 228 |  | 
 | 229 | /* | 
 | 230 |  * Defines for the HostInterruptMask register | 
 | 231 |  */ | 
 | 232 | #define MPI2_HOST_INTERRUPT_MASK_OFFSET         (0x00000034) | 
 | 233 | #define MPI2_HIM_RESET_IRQ_MASK                 (0x40000000) | 
 | 234 | #define MPI2_HIM_REPLY_INT_MASK                 (0x00000008) | 
 | 235 | #define MPI2_HIM_RIM                            MPI2_HIM_REPLY_INT_MASK | 
 | 236 | #define MPI2_HIM_IOC2SYS_DB_MASK                (0x00000001) | 
 | 237 | #define MPI2_HIM_DIM                            MPI2_HIM_IOC2SYS_DB_MASK | 
 | 238 |  | 
 | 239 | /* | 
 | 240 |  * Offsets for DCRData and address | 
 | 241 |  */ | 
 | 242 | #define MPI2_DCR_DATA_OFFSET                    (0x00000038) | 
 | 243 | #define MPI2_DCR_ADDRESS_OFFSET                 (0x0000003C) | 
 | 244 |  | 
 | 245 | /* | 
 | 246 |  * Offset for the Reply Free Queue | 
 | 247 |  */ | 
 | 248 | #define MPI2_REPLY_FREE_HOST_INDEX_OFFSET       (0x00000048) | 
 | 249 |  | 
 | 250 | /* | 
| Kashyap, Desai | f4af3c1 | 2009-12-16 18:55:54 +0530 | [diff] [blame] | 251 |  * Defines for the Reply Descriptor Post Queue | 
| Eric Moore | 635374e | 2009-03-09 01:21:12 -0600 | [diff] [blame] | 252 |  */ | 
 | 253 | #define MPI2_REPLY_POST_HOST_INDEX_OFFSET       (0x0000006C) | 
| Kashyap, Desai | f4af3c1 | 2009-12-16 18:55:54 +0530 | [diff] [blame] | 254 | #define MPI2_REPLY_POST_HOST_INDEX_MASK         (0x00FFFFFF) | 
 | 255 | #define MPI2_RPHI_MSIX_INDEX_MASK               (0xFF000000) | 
 | 256 | #define MPI2_RPHI_MSIX_INDEX_SHIFT              (24) | 
| Eric Moore | 635374e | 2009-03-09 01:21:12 -0600 | [diff] [blame] | 257 |  | 
 | 258 | /* | 
 | 259 |  * Defines for the HCBSize and address | 
 | 260 |  */ | 
 | 261 | #define MPI2_HCB_SIZE_OFFSET                    (0x00000074) | 
 | 262 | #define MPI2_HCB_SIZE_SIZE_MASK                 (0xFFFFF000) | 
 | 263 | #define MPI2_HCB_SIZE_HCB_ENABLE                (0x00000001) | 
 | 264 |  | 
 | 265 | #define MPI2_HCB_ADDRESS_LOW_OFFSET             (0x00000078) | 
 | 266 | #define MPI2_HCB_ADDRESS_HIGH_OFFSET            (0x0000007C) | 
 | 267 |  | 
 | 268 | /* | 
 | 269 |  * Offsets for the Request Queue | 
 | 270 |  */ | 
 | 271 | #define MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET     (0x000000C0) | 
 | 272 | #define MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET    (0x000000C4) | 
 | 273 |  | 
 | 274 |  | 
 | 275 | /***************************************************************************** | 
 | 276 | * | 
 | 277 | *        Message Descriptors | 
 | 278 | * | 
 | 279 | *****************************************************************************/ | 
 | 280 |  | 
 | 281 | /* Request Descriptors */ | 
 | 282 |  | 
 | 283 | /* Default Request Descriptor */ | 
 | 284 | typedef struct _MPI2_DEFAULT_REQUEST_DESCRIPTOR | 
 | 285 | { | 
 | 286 |     U8              RequestFlags;               /* 0x00 */ | 
| Kashyap, Desai | 7b936b0 | 2009-09-25 11:44:41 +0530 | [diff] [blame] | 287 |     U8              MSIxIndex;                  /* 0x01 */ | 
| Eric Moore | 635374e | 2009-03-09 01:21:12 -0600 | [diff] [blame] | 288 |     U16             SMID;                       /* 0x02 */ | 
 | 289 |     U16             LMID;                       /* 0x04 */ | 
 | 290 |     U16             DescriptorTypeDependent;    /* 0x06 */ | 
 | 291 | } MPI2_DEFAULT_REQUEST_DESCRIPTOR, | 
 | 292 |   MPI2_POINTER PTR_MPI2_DEFAULT_REQUEST_DESCRIPTOR, | 
 | 293 |   Mpi2DefaultRequestDescriptor_t, MPI2_POINTER pMpi2DefaultRequestDescriptor_t; | 
 | 294 |  | 
 | 295 | /* defines for the RequestFlags field */ | 
 | 296 | #define MPI2_REQ_DESCRIPT_FLAGS_TYPE_MASK               (0x0E) | 
 | 297 | #define MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO                 (0x00) | 
 | 298 | #define MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET             (0x02) | 
 | 299 | #define MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY           (0x06) | 
 | 300 | #define MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE            (0x08) | 
| Kashyap, Desai | 7b936b0 | 2009-09-25 11:44:41 +0530 | [diff] [blame] | 301 | #define MPI2_REQ_DESCRIPT_FLAGS_RAID_ACCELERATOR        (0x0A) | 
| Eric Moore | 635374e | 2009-03-09 01:21:12 -0600 | [diff] [blame] | 302 |  | 
 | 303 | #define MPI2_REQ_DESCRIPT_FLAGS_IOC_FIFO_MARKER (0x01) | 
 | 304 |  | 
 | 305 |  | 
 | 306 | /* High Priority Request Descriptor */ | 
 | 307 | typedef struct _MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR | 
 | 308 | { | 
 | 309 |     U8              RequestFlags;               /* 0x00 */ | 
| Kashyap, Desai | 7b936b0 | 2009-09-25 11:44:41 +0530 | [diff] [blame] | 310 |     U8              MSIxIndex;                  /* 0x01 */ | 
| Eric Moore | 635374e | 2009-03-09 01:21:12 -0600 | [diff] [blame] | 311 |     U16             SMID;                       /* 0x02 */ | 
 | 312 |     U16             LMID;                       /* 0x04 */ | 
 | 313 |     U16             Reserved1;                  /* 0x06 */ | 
 | 314 | } MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR, | 
 | 315 |   MPI2_POINTER PTR_MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR, | 
 | 316 |   Mpi2HighPriorityRequestDescriptor_t, | 
 | 317 |   MPI2_POINTER pMpi2HighPriorityRequestDescriptor_t; | 
 | 318 |  | 
 | 319 |  | 
 | 320 | /* SCSI IO Request Descriptor */ | 
 | 321 | typedef struct _MPI2_SCSI_IO_REQUEST_DESCRIPTOR | 
 | 322 | { | 
 | 323 |     U8              RequestFlags;               /* 0x00 */ | 
| Kashyap, Desai | 7b936b0 | 2009-09-25 11:44:41 +0530 | [diff] [blame] | 324 |     U8              MSIxIndex;                  /* 0x01 */ | 
| Eric Moore | 635374e | 2009-03-09 01:21:12 -0600 | [diff] [blame] | 325 |     U16             SMID;                       /* 0x02 */ | 
 | 326 |     U16             LMID;                       /* 0x04 */ | 
 | 327 |     U16             DevHandle;                  /* 0x06 */ | 
 | 328 | } MPI2_SCSI_IO_REQUEST_DESCRIPTOR, | 
 | 329 |   MPI2_POINTER PTR_MPI2_SCSI_IO_REQUEST_DESCRIPTOR, | 
 | 330 |   Mpi2SCSIIORequestDescriptor_t, MPI2_POINTER pMpi2SCSIIORequestDescriptor_t; | 
 | 331 |  | 
 | 332 |  | 
 | 333 | /* SCSI Target Request Descriptor */ | 
 | 334 | typedef struct _MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR | 
 | 335 | { | 
 | 336 |     U8              RequestFlags;               /* 0x00 */ | 
| Kashyap, Desai | 7b936b0 | 2009-09-25 11:44:41 +0530 | [diff] [blame] | 337 |     U8              MSIxIndex;                  /* 0x01 */ | 
| Eric Moore | 635374e | 2009-03-09 01:21:12 -0600 | [diff] [blame] | 338 |     U16             SMID;                       /* 0x02 */ | 
 | 339 |     U16             LMID;                       /* 0x04 */ | 
 | 340 |     U16             IoIndex;                    /* 0x06 */ | 
 | 341 | } MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR, | 
 | 342 |   MPI2_POINTER PTR_MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR, | 
 | 343 |   Mpi2SCSITargetRequestDescriptor_t, | 
 | 344 |   MPI2_POINTER pMpi2SCSITargetRequestDescriptor_t; | 
 | 345 |  | 
| Kashyap, Desai | 7b936b0 | 2009-09-25 11:44:41 +0530 | [diff] [blame] | 346 |  | 
 | 347 | /* RAID Accelerator Request Descriptor */ | 
 | 348 | typedef struct _MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR { | 
 | 349 |     U8              RequestFlags;               /* 0x00 */ | 
 | 350 |     U8              MSIxIndex;                  /* 0x01 */ | 
 | 351 |     U16             SMID;                       /* 0x02 */ | 
 | 352 |     U16             LMID;                       /* 0x04 */ | 
 | 353 |     U16             Reserved;                   /* 0x06 */ | 
 | 354 | } MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR, | 
 | 355 |   MPI2_POINTER PTR_MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR, | 
 | 356 |   Mpi2RAIDAcceleratorRequestDescriptor_t, | 
 | 357 |   MPI2_POINTER pMpi2RAIDAcceleratorRequestDescriptor_t; | 
 | 358 |  | 
 | 359 |  | 
| Eric Moore | 635374e | 2009-03-09 01:21:12 -0600 | [diff] [blame] | 360 | /* union of Request Descriptors */ | 
 | 361 | typedef union _MPI2_REQUEST_DESCRIPTOR_UNION | 
 | 362 | { | 
| Kashyap, Desai | 7b936b0 | 2009-09-25 11:44:41 +0530 | [diff] [blame] | 363 |     MPI2_DEFAULT_REQUEST_DESCRIPTOR             Default; | 
 | 364 |     MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR       HighPriority; | 
 | 365 |     MPI2_SCSI_IO_REQUEST_DESCRIPTOR             SCSIIO; | 
 | 366 |     MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR         SCSITarget; | 
 | 367 |     MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR          RAIDAccelerator; | 
 | 368 |     U64                                         Words; | 
| Eric Moore | 635374e | 2009-03-09 01:21:12 -0600 | [diff] [blame] | 369 | } MPI2_REQUEST_DESCRIPTOR_UNION, MPI2_POINTER PTR_MPI2_REQUEST_DESCRIPTOR_UNION, | 
 | 370 |   Mpi2RequestDescriptorUnion_t, MPI2_POINTER pMpi2RequestDescriptorUnion_t; | 
 | 371 |  | 
 | 372 |  | 
 | 373 | /* Reply Descriptors */ | 
 | 374 |  | 
 | 375 | /* Default Reply Descriptor */ | 
 | 376 | typedef struct _MPI2_DEFAULT_REPLY_DESCRIPTOR | 
 | 377 | { | 
 | 378 |     U8              ReplyFlags;                 /* 0x00 */ | 
| Kashyap, Desai | 7b936b0 | 2009-09-25 11:44:41 +0530 | [diff] [blame] | 379 |     U8              MSIxIndex;                  /* 0x01 */ | 
| Eric Moore | 635374e | 2009-03-09 01:21:12 -0600 | [diff] [blame] | 380 |     U16             DescriptorTypeDependent1;   /* 0x02 */ | 
 | 381 |     U32             DescriptorTypeDependent2;   /* 0x04 */ | 
 | 382 | } MPI2_DEFAULT_REPLY_DESCRIPTOR, MPI2_POINTER PTR_MPI2_DEFAULT_REPLY_DESCRIPTOR, | 
 | 383 |   Mpi2DefaultReplyDescriptor_t, MPI2_POINTER pMpi2DefaultReplyDescriptor_t; | 
 | 384 |  | 
 | 385 | /* defines for the ReplyFlags field */ | 
| Kashyap, Desai | 7b936b0 | 2009-09-25 11:44:41 +0530 | [diff] [blame] | 386 | #define MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK                   (0x0F) | 
 | 387 | #define MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS             (0x00) | 
 | 388 | #define MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY               (0x01) | 
 | 389 | #define MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS        (0x02) | 
 | 390 | #define MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER       (0x03) | 
 | 391 | #define MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS    (0x05) | 
 | 392 | #define MPI2_RPY_DESCRIPT_FLAGS_UNUSED                      (0x0F) | 
| Eric Moore | 635374e | 2009-03-09 01:21:12 -0600 | [diff] [blame] | 393 |  | 
 | 394 | /* values for marking a reply descriptor as unused */ | 
 | 395 | #define MPI2_RPY_DESCRIPT_UNUSED_WORD0_MARK             (0xFFFFFFFF) | 
 | 396 | #define MPI2_RPY_DESCRIPT_UNUSED_WORD1_MARK             (0xFFFFFFFF) | 
 | 397 |  | 
 | 398 | /* Address Reply Descriptor */ | 
 | 399 | typedef struct _MPI2_ADDRESS_REPLY_DESCRIPTOR | 
 | 400 | { | 
 | 401 |     U8              ReplyFlags;                 /* 0x00 */ | 
| Kashyap, Desai | 7b936b0 | 2009-09-25 11:44:41 +0530 | [diff] [blame] | 402 |     U8              MSIxIndex;                  /* 0x01 */ | 
| Eric Moore | 635374e | 2009-03-09 01:21:12 -0600 | [diff] [blame] | 403 |     U16             SMID;                       /* 0x02 */ | 
 | 404 |     U32             ReplyFrameAddress;          /* 0x04 */ | 
 | 405 | } MPI2_ADDRESS_REPLY_DESCRIPTOR, MPI2_POINTER PTR_MPI2_ADDRESS_REPLY_DESCRIPTOR, | 
 | 406 |   Mpi2AddressReplyDescriptor_t, MPI2_POINTER pMpi2AddressReplyDescriptor_t; | 
 | 407 |  | 
 | 408 | #define MPI2_ADDRESS_REPLY_SMID_INVALID                 (0x00) | 
 | 409 |  | 
 | 410 |  | 
 | 411 | /* SCSI IO Success Reply Descriptor */ | 
 | 412 | typedef struct _MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR | 
 | 413 | { | 
 | 414 |     U8              ReplyFlags;                 /* 0x00 */ | 
| Kashyap, Desai | 7b936b0 | 2009-09-25 11:44:41 +0530 | [diff] [blame] | 415 |     U8              MSIxIndex;                  /* 0x01 */ | 
| Eric Moore | 635374e | 2009-03-09 01:21:12 -0600 | [diff] [blame] | 416 |     U16             SMID;                       /* 0x02 */ | 
 | 417 |     U16             TaskTag;                    /* 0x04 */ | 
| Kashyap, Desai | 7b936b0 | 2009-09-25 11:44:41 +0530 | [diff] [blame] | 418 |     U16             Reserved1;                  /* 0x06 */ | 
| Eric Moore | 635374e | 2009-03-09 01:21:12 -0600 | [diff] [blame] | 419 | } MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR, | 
 | 420 |   MPI2_POINTER PTR_MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR, | 
 | 421 |   Mpi2SCSIIOSuccessReplyDescriptor_t, | 
 | 422 |   MPI2_POINTER pMpi2SCSIIOSuccessReplyDescriptor_t; | 
 | 423 |  | 
 | 424 |  | 
 | 425 | /* TargetAssist Success Reply Descriptor */ | 
 | 426 | typedef struct _MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR | 
 | 427 | { | 
 | 428 |     U8              ReplyFlags;                 /* 0x00 */ | 
| Kashyap, Desai | 7b936b0 | 2009-09-25 11:44:41 +0530 | [diff] [blame] | 429 |     U8              MSIxIndex;                  /* 0x01 */ | 
| Eric Moore | 635374e | 2009-03-09 01:21:12 -0600 | [diff] [blame] | 430 |     U16             SMID;                       /* 0x02 */ | 
 | 431 |     U8              SequenceNumber;             /* 0x04 */ | 
 | 432 |     U8              Reserved1;                  /* 0x05 */ | 
 | 433 |     U16             IoIndex;                    /* 0x06 */ | 
 | 434 | } MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR, | 
 | 435 |   MPI2_POINTER PTR_MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR, | 
 | 436 |   Mpi2TargetAssistSuccessReplyDescriptor_t, | 
 | 437 |   MPI2_POINTER pMpi2TargetAssistSuccessReplyDescriptor_t; | 
 | 438 |  | 
 | 439 |  | 
 | 440 | /* Target Command Buffer Reply Descriptor */ | 
 | 441 | typedef struct _MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR | 
 | 442 | { | 
 | 443 |     U8              ReplyFlags;                 /* 0x00 */ | 
| Kashyap, Desai | 7b936b0 | 2009-09-25 11:44:41 +0530 | [diff] [blame] | 444 |     U8              MSIxIndex;                  /* 0x01 */ | 
| Eric Moore | 635374e | 2009-03-09 01:21:12 -0600 | [diff] [blame] | 445 |     U8              VP_ID;                      /* 0x02 */ | 
 | 446 |     U8              Flags;                      /* 0x03 */ | 
 | 447 |     U16             InitiatorDevHandle;         /* 0x04 */ | 
 | 448 |     U16             IoIndex;                    /* 0x06 */ | 
 | 449 | } MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR, | 
 | 450 |   MPI2_POINTER PTR_MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR, | 
 | 451 |   Mpi2TargetCommandBufferReplyDescriptor_t, | 
 | 452 |   MPI2_POINTER pMpi2TargetCommandBufferReplyDescriptor_t; | 
 | 453 |  | 
 | 454 | /* defines for Flags field */ | 
 | 455 | #define MPI2_RPY_DESCRIPT_TCB_FLAGS_PHYNUM_MASK     (0x3F) | 
 | 456 |  | 
 | 457 |  | 
| Kashyap, Desai | 7b936b0 | 2009-09-25 11:44:41 +0530 | [diff] [blame] | 458 | /* RAID Accelerator Success Reply Descriptor */ | 
 | 459 | typedef struct _MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR { | 
 | 460 |     U8              ReplyFlags;                 /* 0x00 */ | 
 | 461 |     U8              MSIxIndex;                  /* 0x01 */ | 
 | 462 |     U16             SMID;                       /* 0x02 */ | 
 | 463 |     U32             Reserved;                   /* 0x04 */ | 
 | 464 | } MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR, | 
 | 465 |   MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR, | 
 | 466 |   Mpi2RAIDAcceleratorSuccessReplyDescriptor_t, | 
 | 467 |   MPI2_POINTER pMpi2RAIDAcceleratorSuccessReplyDescriptor_t; | 
 | 468 |  | 
 | 469 |  | 
| Eric Moore | 635374e | 2009-03-09 01:21:12 -0600 | [diff] [blame] | 470 | /* union of Reply Descriptors */ | 
 | 471 | typedef union _MPI2_REPLY_DESCRIPTORS_UNION | 
 | 472 | { | 
| Kashyap, Desai | 7b936b0 | 2009-09-25 11:44:41 +0530 | [diff] [blame] | 473 |     MPI2_DEFAULT_REPLY_DESCRIPTOR                   Default; | 
 | 474 |     MPI2_ADDRESS_REPLY_DESCRIPTOR                   AddressReply; | 
 | 475 |     MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR           SCSIIOSuccess; | 
 | 476 |     MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR      TargetAssistSuccess; | 
 | 477 |     MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR     TargetCommandBuffer; | 
 | 478 |     MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR  RAIDAcceleratorSuccess; | 
 | 479 |     U64                                             Words; | 
| Eric Moore | 635374e | 2009-03-09 01:21:12 -0600 | [diff] [blame] | 480 | } MPI2_REPLY_DESCRIPTORS_UNION, MPI2_POINTER PTR_MPI2_REPLY_DESCRIPTORS_UNION, | 
 | 481 |   Mpi2ReplyDescriptorsUnion_t, MPI2_POINTER pMpi2ReplyDescriptorsUnion_t; | 
 | 482 |  | 
 | 483 |  | 
 | 484 |  | 
 | 485 | /***************************************************************************** | 
 | 486 | * | 
 | 487 | *        Message Functions | 
| Eric Moore | 635374e | 2009-03-09 01:21:12 -0600 | [diff] [blame] | 488 | * | 
 | 489 | *****************************************************************************/ | 
 | 490 |  | 
 | 491 | #define MPI2_FUNCTION_SCSI_IO_REQUEST               (0x00) /* SCSI IO */ | 
 | 492 | #define MPI2_FUNCTION_SCSI_TASK_MGMT                (0x01) /* SCSI Task Management */ | 
 | 493 | #define MPI2_FUNCTION_IOC_INIT                      (0x02) /* IOC Init */ | 
 | 494 | #define MPI2_FUNCTION_IOC_FACTS                     (0x03) /* IOC Facts */ | 
 | 495 | #define MPI2_FUNCTION_CONFIG                        (0x04) /* Configuration */ | 
 | 496 | #define MPI2_FUNCTION_PORT_FACTS                    (0x05) /* Port Facts */ | 
 | 497 | #define MPI2_FUNCTION_PORT_ENABLE                   (0x06) /* Port Enable */ | 
 | 498 | #define MPI2_FUNCTION_EVENT_NOTIFICATION            (0x07) /* Event Notification */ | 
 | 499 | #define MPI2_FUNCTION_EVENT_ACK                     (0x08) /* Event Acknowledge */ | 
 | 500 | #define MPI2_FUNCTION_FW_DOWNLOAD                   (0x09) /* FW Download */ | 
 | 501 | #define MPI2_FUNCTION_TARGET_ASSIST                 (0x0B) /* Target Assist */ | 
 | 502 | #define MPI2_FUNCTION_TARGET_STATUS_SEND            (0x0C) /* Target Status Send */ | 
 | 503 | #define MPI2_FUNCTION_TARGET_MODE_ABORT             (0x0D) /* Target Mode Abort */ | 
 | 504 | #define MPI2_FUNCTION_FW_UPLOAD                     (0x12) /* FW Upload */ | 
 | 505 | #define MPI2_FUNCTION_RAID_ACTION                   (0x15) /* RAID Action */ | 
 | 506 | #define MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH      (0x16) /* SCSI IO RAID Passthrough */ | 
 | 507 | #define MPI2_FUNCTION_TOOLBOX                       (0x17) /* Toolbox */ | 
 | 508 | #define MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR      (0x18) /* SCSI Enclosure Processor */ | 
 | 509 | #define MPI2_FUNCTION_SMP_PASSTHROUGH               (0x1A) /* SMP Passthrough */ | 
 | 510 | #define MPI2_FUNCTION_SAS_IO_UNIT_CONTROL           (0x1B) /* SAS IO Unit Control */ | 
 | 511 | #define MPI2_FUNCTION_SATA_PASSTHROUGH              (0x1C) /* SATA Passthrough */ | 
 | 512 | #define MPI2_FUNCTION_DIAG_BUFFER_POST              (0x1D) /* Diagnostic Buffer Post */ | 
 | 513 | #define MPI2_FUNCTION_DIAG_RELEASE                  (0x1E) /* Diagnostic Release */ | 
 | 514 | #define MPI2_FUNCTION_TARGET_CMD_BUF_BASE_POST      (0x24) /* Target Command Buffer Post Base */ | 
 | 515 | #define MPI2_FUNCTION_TARGET_CMD_BUF_LIST_POST      (0x25) /* Target Command Buffer Post List */ | 
| Kashyap, Desai | 7b936b0 | 2009-09-25 11:44:41 +0530 | [diff] [blame] | 516 | #define MPI2_FUNCTION_RAID_ACCELERATOR              (0x2C) /* RAID Accelerator*/ | 
| Kashyap, Desai | f4af3c1 | 2009-12-16 18:55:54 +0530 | [diff] [blame] | 517 | /* Host Based Discovery Action */ | 
 | 518 | #define MPI2_FUNCTION_HOST_BASED_DISCOVERY_ACTION   (0x2F) | 
| Kashyap, Desai | 203d65b | 2010-06-17 13:37:59 +0530 | [diff] [blame] | 519 | /* Power Management Control */ | 
 | 520 | #define MPI2_FUNCTION_PWR_MGMT_CONTROL              (0x30) | 
| nagalakshmi.nandigama@lsi.com | f9d979c | 2011-10-19 15:36:05 +0530 | [diff] [blame] | 521 | /* Send Host Message */ | 
 | 522 | #define MPI2_FUNCTION_SEND_HOST_MESSAGE             (0x31) | 
| Kashyap, Desai | 203d65b | 2010-06-17 13:37:59 +0530 | [diff] [blame] | 523 | /* beginning of product-specific range */ | 
 | 524 | #define MPI2_FUNCTION_MIN_PRODUCT_SPECIFIC          (0xF0) | 
 | 525 | /* end of product-specific range */ | 
 | 526 | #define MPI2_FUNCTION_MAX_PRODUCT_SPECIFIC          (0xFF) | 
 | 527 |  | 
| Eric Moore | 635374e | 2009-03-09 01:21:12 -0600 | [diff] [blame] | 528 |  | 
 | 529 |  | 
 | 530 |  | 
 | 531 | /* Doorbell functions */ | 
 | 532 | #define MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET        (0x40) | 
| Eric Moore | 635374e | 2009-03-09 01:21:12 -0600 | [diff] [blame] | 533 | #define MPI2_FUNCTION_HANDSHAKE                     (0x42) | 
 | 534 |  | 
 | 535 |  | 
 | 536 | /***************************************************************************** | 
 | 537 | * | 
 | 538 | *        IOC Status Values | 
 | 539 | * | 
 | 540 | *****************************************************************************/ | 
 | 541 |  | 
 | 542 | /* mask for IOCStatus status value */ | 
 | 543 | #define MPI2_IOCSTATUS_MASK                     (0x7FFF) | 
 | 544 |  | 
 | 545 | /**************************************************************************** | 
 | 546 | *  Common IOCStatus values for all replies | 
 | 547 | ****************************************************************************/ | 
 | 548 |  | 
 | 549 | #define MPI2_IOCSTATUS_SUCCESS                      (0x0000) | 
 | 550 | #define MPI2_IOCSTATUS_INVALID_FUNCTION             (0x0001) | 
 | 551 | #define MPI2_IOCSTATUS_BUSY                         (0x0002) | 
 | 552 | #define MPI2_IOCSTATUS_INVALID_SGL                  (0x0003) | 
 | 553 | #define MPI2_IOCSTATUS_INTERNAL_ERROR               (0x0004) | 
 | 554 | #define MPI2_IOCSTATUS_INVALID_VPID                 (0x0005) | 
 | 555 | #define MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES       (0x0006) | 
 | 556 | #define MPI2_IOCSTATUS_INVALID_FIELD                (0x0007) | 
 | 557 | #define MPI2_IOCSTATUS_INVALID_STATE                (0x0008) | 
 | 558 | #define MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED       (0x0009) | 
 | 559 |  | 
 | 560 | /**************************************************************************** | 
 | 561 | *  Config IOCStatus values | 
 | 562 | ****************************************************************************/ | 
 | 563 |  | 
 | 564 | #define MPI2_IOCSTATUS_CONFIG_INVALID_ACTION        (0x0020) | 
 | 565 | #define MPI2_IOCSTATUS_CONFIG_INVALID_TYPE          (0x0021) | 
 | 566 | #define MPI2_IOCSTATUS_CONFIG_INVALID_PAGE          (0x0022) | 
 | 567 | #define MPI2_IOCSTATUS_CONFIG_INVALID_DATA          (0x0023) | 
 | 568 | #define MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS           (0x0024) | 
 | 569 | #define MPI2_IOCSTATUS_CONFIG_CANT_COMMIT           (0x0025) | 
 | 570 |  | 
 | 571 | /**************************************************************************** | 
 | 572 | *  SCSI IO Reply | 
 | 573 | ****************************************************************************/ | 
 | 574 |  | 
 | 575 | #define MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR         (0x0040) | 
 | 576 | #define MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE       (0x0042) | 
 | 577 | #define MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE        (0x0043) | 
 | 578 | #define MPI2_IOCSTATUS_SCSI_DATA_OVERRUN            (0x0044) | 
 | 579 | #define MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN           (0x0045) | 
 | 580 | #define MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR           (0x0046) | 
 | 581 | #define MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR          (0x0047) | 
 | 582 | #define MPI2_IOCSTATUS_SCSI_TASK_TERMINATED         (0x0048) | 
 | 583 | #define MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH       (0x0049) | 
 | 584 | #define MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED        (0x004A) | 
 | 585 | #define MPI2_IOCSTATUS_SCSI_IOC_TERMINATED          (0x004B) | 
 | 586 | #define MPI2_IOCSTATUS_SCSI_EXT_TERMINATED          (0x004C) | 
 | 587 |  | 
 | 588 | /**************************************************************************** | 
 | 589 | *  For use by SCSI Initiator and SCSI Target end-to-end data protection | 
 | 590 | ****************************************************************************/ | 
 | 591 |  | 
 | 592 | #define MPI2_IOCSTATUS_EEDP_GUARD_ERROR             (0x004D) | 
 | 593 | #define MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR           (0x004E) | 
 | 594 | #define MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR           (0x004F) | 
 | 595 |  | 
 | 596 | /**************************************************************************** | 
 | 597 | *  SCSI Target values | 
 | 598 | ****************************************************************************/ | 
 | 599 |  | 
 | 600 | #define MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX      (0x0062) | 
 | 601 | #define MPI2_IOCSTATUS_TARGET_ABORTED               (0x0063) | 
 | 602 | #define MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE     (0x0064) | 
 | 603 | #define MPI2_IOCSTATUS_TARGET_NO_CONNECTION         (0x0065) | 
 | 604 | #define MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH   (0x006A) | 
 | 605 | #define MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR     (0x006D) | 
 | 606 | #define MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA   (0x006E) | 
 | 607 | #define MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT          (0x006F) | 
 | 608 | #define MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT       (0x0070) | 
 | 609 | #define MPI2_IOCSTATUS_TARGET_NAK_RECEIVED          (0x0071) | 
 | 610 |  | 
 | 611 | /**************************************************************************** | 
 | 612 | *  Serial Attached SCSI values | 
 | 613 | ****************************************************************************/ | 
 | 614 |  | 
 | 615 | #define MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED       (0x0090) | 
 | 616 | #define MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN         (0x0091) | 
 | 617 |  | 
 | 618 | /**************************************************************************** | 
 | 619 | *  Diagnostic Buffer Post / Diagnostic Release values | 
 | 620 | ****************************************************************************/ | 
 | 621 |  | 
 | 622 | #define MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED          (0x00A0) | 
 | 623 |  | 
| Kashyap, Desai | 7b936b0 | 2009-09-25 11:44:41 +0530 | [diff] [blame] | 624 | /**************************************************************************** | 
 | 625 | *  RAID Accelerator values | 
 | 626 | ****************************************************************************/ | 
 | 627 |  | 
 | 628 | #define MPI2_IOCSTATUS_RAID_ACCEL_ERROR             (0x00B0) | 
| Eric Moore | 635374e | 2009-03-09 01:21:12 -0600 | [diff] [blame] | 629 |  | 
 | 630 | /**************************************************************************** | 
 | 631 | *  IOCStatus flag to indicate that log info is available | 
 | 632 | ****************************************************************************/ | 
 | 633 |  | 
| Kashyap, Desai | 7b936b0 | 2009-09-25 11:44:41 +0530 | [diff] [blame] | 634 | #define MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE      (0x8000) | 
| Eric Moore | 635374e | 2009-03-09 01:21:12 -0600 | [diff] [blame] | 635 |  | 
 | 636 | /**************************************************************************** | 
 | 637 | *  IOCLogInfo Types | 
 | 638 | ****************************************************************************/ | 
 | 639 |  | 
 | 640 | #define MPI2_IOCLOGINFO_TYPE_MASK               (0xF0000000) | 
 | 641 | #define MPI2_IOCLOGINFO_TYPE_SHIFT              (28) | 
 | 642 | #define MPI2_IOCLOGINFO_TYPE_NONE               (0x0) | 
 | 643 | #define MPI2_IOCLOGINFO_TYPE_SCSI               (0x1) | 
 | 644 | #define MPI2_IOCLOGINFO_TYPE_FC                 (0x2) | 
 | 645 | #define MPI2_IOCLOGINFO_TYPE_SAS                (0x3) | 
 | 646 | #define MPI2_IOCLOGINFO_TYPE_ISCSI              (0x4) | 
 | 647 | #define MPI2_IOCLOGINFO_LOG_DATA_MASK           (0x0FFFFFFF) | 
 | 648 |  | 
 | 649 |  | 
 | 650 | /***************************************************************************** | 
 | 651 | * | 
 | 652 | *        Standard Message Structures | 
 | 653 | * | 
 | 654 | *****************************************************************************/ | 
 | 655 |  | 
 | 656 | /**************************************************************************** | 
 | 657 | * Request Message Header for all request messages | 
 | 658 | ****************************************************************************/ | 
 | 659 |  | 
 | 660 | typedef struct _MPI2_REQUEST_HEADER | 
 | 661 | { | 
 | 662 |     U16             FunctionDependent1;         /* 0x00 */ | 
 | 663 |     U8              ChainOffset;                /* 0x02 */ | 
 | 664 |     U8              Function;                   /* 0x03 */ | 
 | 665 |     U16             FunctionDependent2;         /* 0x04 */ | 
 | 666 |     U8              FunctionDependent3;         /* 0x06 */ | 
 | 667 |     U8              MsgFlags;                   /* 0x07 */ | 
 | 668 |     U8              VP_ID;                      /* 0x08 */ | 
 | 669 |     U8              VF_ID;                      /* 0x09 */ | 
 | 670 |     U16             Reserved1;                  /* 0x0A */ | 
 | 671 | } MPI2_REQUEST_HEADER, MPI2_POINTER PTR_MPI2_REQUEST_HEADER, | 
 | 672 |   MPI2RequestHeader_t, MPI2_POINTER pMPI2RequestHeader_t; | 
 | 673 |  | 
 | 674 |  | 
 | 675 | /**************************************************************************** | 
 | 676 | *  Default Reply | 
 | 677 | ****************************************************************************/ | 
 | 678 |  | 
 | 679 | typedef struct _MPI2_DEFAULT_REPLY | 
 | 680 | { | 
 | 681 |     U16             FunctionDependent1;         /* 0x00 */ | 
 | 682 |     U8              MsgLength;                  /* 0x02 */ | 
 | 683 |     U8              Function;                   /* 0x03 */ | 
 | 684 |     U16             FunctionDependent2;         /* 0x04 */ | 
 | 685 |     U8              FunctionDependent3;         /* 0x06 */ | 
 | 686 |     U8              MsgFlags;                   /* 0x07 */ | 
 | 687 |     U8              VP_ID;                      /* 0x08 */ | 
 | 688 |     U8              VF_ID;                      /* 0x09 */ | 
 | 689 |     U16             Reserved1;                  /* 0x0A */ | 
 | 690 |     U16             FunctionDependent5;         /* 0x0C */ | 
 | 691 |     U16             IOCStatus;                  /* 0x0E */ | 
 | 692 |     U32             IOCLogInfo;                 /* 0x10 */ | 
 | 693 | } MPI2_DEFAULT_REPLY, MPI2_POINTER PTR_MPI2_DEFAULT_REPLY, | 
 | 694 |   MPI2DefaultReply_t, MPI2_POINTER pMPI2DefaultReply_t; | 
 | 695 |  | 
 | 696 |  | 
 | 697 | /* common version structure/union used in messages and configuration pages */ | 
 | 698 |  | 
 | 699 | typedef struct _MPI2_VERSION_STRUCT | 
 | 700 | { | 
 | 701 |     U8                      Dev;                        /* 0x00 */ | 
 | 702 |     U8                      Unit;                       /* 0x01 */ | 
 | 703 |     U8                      Minor;                      /* 0x02 */ | 
 | 704 |     U8                      Major;                      /* 0x03 */ | 
 | 705 | } MPI2_VERSION_STRUCT; | 
 | 706 |  | 
 | 707 | typedef union _MPI2_VERSION_UNION | 
 | 708 | { | 
 | 709 |     MPI2_VERSION_STRUCT     Struct; | 
 | 710 |     U32                     Word; | 
 | 711 | } MPI2_VERSION_UNION; | 
 | 712 |  | 
 | 713 |  | 
 | 714 | /* LUN field defines, common to many structures */ | 
 | 715 | #define MPI2_LUN_FIRST_LEVEL_ADDRESSING             (0x0000FFFF) | 
 | 716 | #define MPI2_LUN_SECOND_LEVEL_ADDRESSING            (0xFFFF0000) | 
 | 717 | #define MPI2_LUN_THIRD_LEVEL_ADDRESSING             (0x0000FFFF) | 
 | 718 | #define MPI2_LUN_FOURTH_LEVEL_ADDRESSING            (0xFFFF0000) | 
 | 719 | #define MPI2_LUN_LEVEL_1_WORD                       (0xFF00) | 
 | 720 | #define MPI2_LUN_LEVEL_1_DWORD                      (0x0000FF00) | 
 | 721 |  | 
 | 722 |  | 
 | 723 | /***************************************************************************** | 
 | 724 | * | 
 | 725 | *        Fusion-MPT MPI Scatter Gather Elements | 
 | 726 | * | 
 | 727 | *****************************************************************************/ | 
 | 728 |  | 
 | 729 | /**************************************************************************** | 
 | 730 | *  MPI Simple Element structures | 
 | 731 | ****************************************************************************/ | 
 | 732 |  | 
 | 733 | typedef struct _MPI2_SGE_SIMPLE32 | 
 | 734 | { | 
 | 735 |     U32                     FlagsLength; | 
 | 736 |     U32                     Address; | 
 | 737 | } MPI2_SGE_SIMPLE32, MPI2_POINTER PTR_MPI2_SGE_SIMPLE32, | 
 | 738 |   Mpi2SGESimple32_t, MPI2_POINTER pMpi2SGESimple32_t; | 
 | 739 |  | 
 | 740 | typedef struct _MPI2_SGE_SIMPLE64 | 
 | 741 | { | 
 | 742 |     U32                     FlagsLength; | 
 | 743 |     U64                     Address; | 
 | 744 | } MPI2_SGE_SIMPLE64, MPI2_POINTER PTR_MPI2_SGE_SIMPLE64, | 
 | 745 |   Mpi2SGESimple64_t, MPI2_POINTER pMpi2SGESimple64_t; | 
 | 746 |  | 
 | 747 | typedef struct _MPI2_SGE_SIMPLE_UNION | 
 | 748 | { | 
 | 749 |     U32                     FlagsLength; | 
 | 750 |     union | 
 | 751 |     { | 
 | 752 |         U32                 Address32; | 
 | 753 |         U64                 Address64; | 
 | 754 |     } u; | 
 | 755 | } MPI2_SGE_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_SGE_SIMPLE_UNION, | 
 | 756 |   Mpi2SGESimpleUnion_t, MPI2_POINTER pMpi2SGESimpleUnion_t; | 
 | 757 |  | 
 | 758 |  | 
 | 759 | /**************************************************************************** | 
 | 760 | *  MPI Chain Element structures | 
 | 761 | ****************************************************************************/ | 
 | 762 |  | 
 | 763 | typedef struct _MPI2_SGE_CHAIN32 | 
 | 764 | { | 
 | 765 |     U16                     Length; | 
 | 766 |     U8                      NextChainOffset; | 
 | 767 |     U8                      Flags; | 
 | 768 |     U32                     Address; | 
 | 769 | } MPI2_SGE_CHAIN32, MPI2_POINTER PTR_MPI2_SGE_CHAIN32, | 
 | 770 |   Mpi2SGEChain32_t, MPI2_POINTER pMpi2SGEChain32_t; | 
 | 771 |  | 
 | 772 | typedef struct _MPI2_SGE_CHAIN64 | 
 | 773 | { | 
 | 774 |     U16                     Length; | 
 | 775 |     U8                      NextChainOffset; | 
 | 776 |     U8                      Flags; | 
 | 777 |     U64                     Address; | 
 | 778 | } MPI2_SGE_CHAIN64, MPI2_POINTER PTR_MPI2_SGE_CHAIN64, | 
 | 779 |   Mpi2SGEChain64_t, MPI2_POINTER pMpi2SGEChain64_t; | 
 | 780 |  | 
 | 781 | typedef struct _MPI2_SGE_CHAIN_UNION | 
 | 782 | { | 
 | 783 |     U16                     Length; | 
 | 784 |     U8                      NextChainOffset; | 
 | 785 |     U8                      Flags; | 
 | 786 |     union | 
 | 787 |     { | 
 | 788 |         U32                 Address32; | 
 | 789 |         U64                 Address64; | 
 | 790 |     } u; | 
 | 791 | } MPI2_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_SGE_CHAIN_UNION, | 
 | 792 |   Mpi2SGEChainUnion_t, MPI2_POINTER pMpi2SGEChainUnion_t; | 
 | 793 |  | 
 | 794 |  | 
 | 795 | /**************************************************************************** | 
 | 796 | *  MPI Transaction Context Element structures | 
 | 797 | ****************************************************************************/ | 
 | 798 |  | 
 | 799 | typedef struct _MPI2_SGE_TRANSACTION32 | 
 | 800 | { | 
 | 801 |     U8                      Reserved; | 
 | 802 |     U8                      ContextSize; | 
 | 803 |     U8                      DetailsLength; | 
 | 804 |     U8                      Flags; | 
 | 805 |     U32                     TransactionContext[1]; | 
 | 806 |     U32                     TransactionDetails[1]; | 
 | 807 | } MPI2_SGE_TRANSACTION32, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION32, | 
 | 808 |   Mpi2SGETransaction32_t, MPI2_POINTER pMpi2SGETransaction32_t; | 
 | 809 |  | 
 | 810 | typedef struct _MPI2_SGE_TRANSACTION64 | 
 | 811 | { | 
 | 812 |     U8                      Reserved; | 
 | 813 |     U8                      ContextSize; | 
 | 814 |     U8                      DetailsLength; | 
 | 815 |     U8                      Flags; | 
 | 816 |     U32                     TransactionContext[2]; | 
 | 817 |     U32                     TransactionDetails[1]; | 
 | 818 | } MPI2_SGE_TRANSACTION64, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION64, | 
 | 819 |   Mpi2SGETransaction64_t, MPI2_POINTER pMpi2SGETransaction64_t; | 
 | 820 |  | 
 | 821 | typedef struct _MPI2_SGE_TRANSACTION96 | 
 | 822 | { | 
 | 823 |     U8                      Reserved; | 
 | 824 |     U8                      ContextSize; | 
 | 825 |     U8                      DetailsLength; | 
 | 826 |     U8                      Flags; | 
 | 827 |     U32                     TransactionContext[3]; | 
 | 828 |     U32                     TransactionDetails[1]; | 
 | 829 | } MPI2_SGE_TRANSACTION96, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION96, | 
 | 830 |   Mpi2SGETransaction96_t, MPI2_POINTER pMpi2SGETransaction96_t; | 
 | 831 |  | 
 | 832 | typedef struct _MPI2_SGE_TRANSACTION128 | 
 | 833 | { | 
 | 834 |     U8                      Reserved; | 
 | 835 |     U8                      ContextSize; | 
 | 836 |     U8                      DetailsLength; | 
 | 837 |     U8                      Flags; | 
 | 838 |     U32                     TransactionContext[4]; | 
 | 839 |     U32                     TransactionDetails[1]; | 
 | 840 | } MPI2_SGE_TRANSACTION128, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION128, | 
 | 841 |   Mpi2SGETransaction_t128, MPI2_POINTER pMpi2SGETransaction_t128; | 
 | 842 |  | 
 | 843 | typedef struct _MPI2_SGE_TRANSACTION_UNION | 
 | 844 | { | 
 | 845 |     U8                      Reserved; | 
 | 846 |     U8                      ContextSize; | 
 | 847 |     U8                      DetailsLength; | 
 | 848 |     U8                      Flags; | 
 | 849 |     union | 
 | 850 |     { | 
 | 851 |         U32                 TransactionContext32[1]; | 
 | 852 |         U32                 TransactionContext64[2]; | 
 | 853 |         U32                 TransactionContext96[3]; | 
 | 854 |         U32                 TransactionContext128[4]; | 
 | 855 |     } u; | 
 | 856 |     U32                     TransactionDetails[1]; | 
 | 857 | } MPI2_SGE_TRANSACTION_UNION, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION_UNION, | 
 | 858 |   Mpi2SGETransactionUnion_t, MPI2_POINTER pMpi2SGETransactionUnion_t; | 
 | 859 |  | 
 | 860 |  | 
 | 861 | /**************************************************************************** | 
 | 862 | *  MPI SGE union for IO SGL's | 
 | 863 | ****************************************************************************/ | 
 | 864 |  | 
 | 865 | typedef struct _MPI2_MPI_SGE_IO_UNION | 
 | 866 | { | 
 | 867 |     union | 
 | 868 |     { | 
 | 869 |         MPI2_SGE_SIMPLE_UNION   Simple; | 
 | 870 |         MPI2_SGE_CHAIN_UNION    Chain; | 
 | 871 |     } u; | 
 | 872 | } MPI2_MPI_SGE_IO_UNION, MPI2_POINTER PTR_MPI2_MPI_SGE_IO_UNION, | 
 | 873 |   Mpi2MpiSGEIOUnion_t, MPI2_POINTER pMpi2MpiSGEIOUnion_t; | 
 | 874 |  | 
 | 875 |  | 
 | 876 | /**************************************************************************** | 
 | 877 | *  MPI SGE union for SGL's with Simple and Transaction elements | 
 | 878 | ****************************************************************************/ | 
 | 879 |  | 
 | 880 | typedef struct _MPI2_SGE_TRANS_SIMPLE_UNION | 
 | 881 | { | 
 | 882 |     union | 
 | 883 |     { | 
 | 884 |         MPI2_SGE_SIMPLE_UNION       Simple; | 
 | 885 |         MPI2_SGE_TRANSACTION_UNION  Transaction; | 
 | 886 |     } u; | 
 | 887 | } MPI2_SGE_TRANS_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_SGE_TRANS_SIMPLE_UNION, | 
 | 888 |   Mpi2SGETransSimpleUnion_t, MPI2_POINTER pMpi2SGETransSimpleUnion_t; | 
 | 889 |  | 
 | 890 |  | 
 | 891 | /**************************************************************************** | 
 | 892 | *  All MPI SGE types union | 
 | 893 | ****************************************************************************/ | 
 | 894 |  | 
 | 895 | typedef struct _MPI2_MPI_SGE_UNION | 
 | 896 | { | 
 | 897 |     union | 
 | 898 |     { | 
 | 899 |         MPI2_SGE_SIMPLE_UNION       Simple; | 
 | 900 |         MPI2_SGE_CHAIN_UNION        Chain; | 
 | 901 |         MPI2_SGE_TRANSACTION_UNION  Transaction; | 
 | 902 |     } u; | 
 | 903 | } MPI2_MPI_SGE_UNION, MPI2_POINTER PTR_MPI2_MPI_SGE_UNION, | 
 | 904 |   Mpi2MpiSgeUnion_t, MPI2_POINTER pMpi2MpiSgeUnion_t; | 
 | 905 |  | 
 | 906 |  | 
 | 907 | /**************************************************************************** | 
 | 908 | *  MPI SGE field definition and masks | 
 | 909 | ****************************************************************************/ | 
 | 910 |  | 
 | 911 | /* Flags field bit definitions */ | 
 | 912 |  | 
 | 913 | #define MPI2_SGE_FLAGS_LAST_ELEMENT             (0x80) | 
 | 914 | #define MPI2_SGE_FLAGS_END_OF_BUFFER            (0x40) | 
 | 915 | #define MPI2_SGE_FLAGS_ELEMENT_TYPE_MASK        (0x30) | 
 | 916 | #define MPI2_SGE_FLAGS_LOCAL_ADDRESS            (0x08) | 
 | 917 | #define MPI2_SGE_FLAGS_DIRECTION                (0x04) | 
 | 918 | #define MPI2_SGE_FLAGS_ADDRESS_SIZE             (0x02) | 
 | 919 | #define MPI2_SGE_FLAGS_END_OF_LIST              (0x01) | 
 | 920 |  | 
 | 921 | #define MPI2_SGE_FLAGS_SHIFT                    (24) | 
 | 922 |  | 
 | 923 | #define MPI2_SGE_LENGTH_MASK                    (0x00FFFFFF) | 
 | 924 | #define MPI2_SGE_CHAIN_LENGTH_MASK              (0x0000FFFF) | 
 | 925 |  | 
 | 926 | /* Element Type */ | 
 | 927 |  | 
 | 928 | #define MPI2_SGE_FLAGS_TRANSACTION_ELEMENT      (0x00) | 
 | 929 | #define MPI2_SGE_FLAGS_SIMPLE_ELEMENT           (0x10) | 
 | 930 | #define MPI2_SGE_FLAGS_CHAIN_ELEMENT            (0x30) | 
 | 931 | #define MPI2_SGE_FLAGS_ELEMENT_MASK             (0x30) | 
 | 932 |  | 
 | 933 | /* Address location */ | 
 | 934 |  | 
 | 935 | #define MPI2_SGE_FLAGS_SYSTEM_ADDRESS           (0x00) | 
 | 936 |  | 
 | 937 | /* Direction */ | 
 | 938 |  | 
 | 939 | #define MPI2_SGE_FLAGS_IOC_TO_HOST              (0x00) | 
 | 940 | #define MPI2_SGE_FLAGS_HOST_TO_IOC              (0x04) | 
 | 941 |  | 
| Kashyap, Desai | 7d06140 | 2010-11-13 04:36:14 +0530 | [diff] [blame] | 942 | #define MPI2_SGE_FLAGS_DEST                     (MPI2_SGE_FLAGS_IOC_TO_HOST) | 
 | 943 | #define MPI2_SGE_FLAGS_SOURCE                   (MPI2_SGE_FLAGS_HOST_TO_IOC) | 
 | 944 |  | 
| Eric Moore | 635374e | 2009-03-09 01:21:12 -0600 | [diff] [blame] | 945 | /* Address Size */ | 
 | 946 |  | 
 | 947 | #define MPI2_SGE_FLAGS_32_BIT_ADDRESSING        (0x00) | 
 | 948 | #define MPI2_SGE_FLAGS_64_BIT_ADDRESSING        (0x02) | 
 | 949 |  | 
 | 950 | /* Context Size */ | 
 | 951 |  | 
 | 952 | #define MPI2_SGE_FLAGS_32_BIT_CONTEXT           (0x00) | 
 | 953 | #define MPI2_SGE_FLAGS_64_BIT_CONTEXT           (0x02) | 
 | 954 | #define MPI2_SGE_FLAGS_96_BIT_CONTEXT           (0x04) | 
 | 955 | #define MPI2_SGE_FLAGS_128_BIT_CONTEXT          (0x06) | 
 | 956 |  | 
 | 957 | #define MPI2_SGE_CHAIN_OFFSET_MASK              (0x00FF0000) | 
 | 958 | #define MPI2_SGE_CHAIN_OFFSET_SHIFT             (16) | 
 | 959 |  | 
 | 960 | /**************************************************************************** | 
 | 961 | *  MPI SGE operation Macros | 
 | 962 | ****************************************************************************/ | 
 | 963 |  | 
 | 964 | /* SIMPLE FlagsLength manipulations... */ | 
 | 965 | #define MPI2_SGE_SET_FLAGS(f)          ((U32)(f) << MPI2_SGE_FLAGS_SHIFT) | 
 | 966 | #define MPI2_SGE_GET_FLAGS(f)          (((f) & ~MPI2_SGE_LENGTH_MASK) >> MPI2_SGE_FLAGS_SHIFT) | 
 | 967 | #define MPI2_SGE_LENGTH(f)             ((f) & MPI2_SGE_LENGTH_MASK) | 
 | 968 | #define MPI2_SGE_CHAIN_LENGTH(f)       ((f) & MPI2_SGE_CHAIN_LENGTH_MASK) | 
 | 969 |  | 
 | 970 | #define MPI2_SGE_SET_FLAGS_LENGTH(f,l) (MPI2_SGE_SET_FLAGS(f) | MPI2_SGE_LENGTH(l)) | 
 | 971 |  | 
 | 972 | #define MPI2_pSGE_GET_FLAGS(psg)            MPI2_SGE_GET_FLAGS((psg)->FlagsLength) | 
 | 973 | #define MPI2_pSGE_GET_LENGTH(psg)           MPI2_SGE_LENGTH((psg)->FlagsLength) | 
 | 974 | #define MPI2_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI2_SGE_SET_FLAGS_LENGTH(f,l) | 
 | 975 |  | 
 | 976 | /* CAUTION - The following are READ-MODIFY-WRITE! */ | 
 | 977 | #define MPI2_pSGE_SET_FLAGS(psg,f)      (psg)->FlagsLength |= MPI2_SGE_SET_FLAGS(f) | 
 | 978 | #define MPI2_pSGE_SET_LENGTH(psg,l)     (psg)->FlagsLength |= MPI2_SGE_LENGTH(l) | 
 | 979 |  | 
 | 980 | #define MPI2_GET_CHAIN_OFFSET(x)    ((x & MPI2_SGE_CHAIN_OFFSET_MASK) >> MPI2_SGE_CHAIN_OFFSET_SHIFT) | 
 | 981 |  | 
 | 982 |  | 
 | 983 | /***************************************************************************** | 
 | 984 | * | 
 | 985 | *        Fusion-MPT IEEE Scatter Gather Elements | 
 | 986 | * | 
 | 987 | *****************************************************************************/ | 
 | 988 |  | 
 | 989 | /**************************************************************************** | 
 | 990 | *  IEEE Simple Element structures | 
 | 991 | ****************************************************************************/ | 
 | 992 |  | 
 | 993 | typedef struct _MPI2_IEEE_SGE_SIMPLE32 | 
 | 994 | { | 
 | 995 |     U32                     Address; | 
 | 996 |     U32                     FlagsLength; | 
 | 997 | } MPI2_IEEE_SGE_SIMPLE32, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE32, | 
 | 998 |   Mpi2IeeeSgeSimple32_t, MPI2_POINTER pMpi2IeeeSgeSimple32_t; | 
 | 999 |  | 
 | 1000 | typedef struct _MPI2_IEEE_SGE_SIMPLE64 | 
 | 1001 | { | 
 | 1002 |     U64                     Address; | 
 | 1003 |     U32                     Length; | 
 | 1004 |     U16                     Reserved1; | 
 | 1005 |     U8                      Reserved2; | 
 | 1006 |     U8                      Flags; | 
 | 1007 | } MPI2_IEEE_SGE_SIMPLE64, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE64, | 
 | 1008 |   Mpi2IeeeSgeSimple64_t, MPI2_POINTER pMpi2IeeeSgeSimple64_t; | 
 | 1009 |  | 
 | 1010 | typedef union _MPI2_IEEE_SGE_SIMPLE_UNION | 
 | 1011 | { | 
 | 1012 |     MPI2_IEEE_SGE_SIMPLE32  Simple32; | 
 | 1013 |     MPI2_IEEE_SGE_SIMPLE64  Simple64; | 
 | 1014 | } MPI2_IEEE_SGE_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE_UNION, | 
 | 1015 |   Mpi2IeeeSgeSimpleUnion_t, MPI2_POINTER pMpi2IeeeSgeSimpleUnion_t; | 
 | 1016 |  | 
 | 1017 |  | 
 | 1018 | /**************************************************************************** | 
 | 1019 | *  IEEE Chain Element structures | 
 | 1020 | ****************************************************************************/ | 
 | 1021 |  | 
 | 1022 | typedef MPI2_IEEE_SGE_SIMPLE32  MPI2_IEEE_SGE_CHAIN32; | 
 | 1023 |  | 
 | 1024 | typedef MPI2_IEEE_SGE_SIMPLE64  MPI2_IEEE_SGE_CHAIN64; | 
 | 1025 |  | 
 | 1026 | typedef union _MPI2_IEEE_SGE_CHAIN_UNION | 
 | 1027 | { | 
 | 1028 |     MPI2_IEEE_SGE_CHAIN32   Chain32; | 
 | 1029 |     MPI2_IEEE_SGE_CHAIN64   Chain64; | 
 | 1030 | } MPI2_IEEE_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_CHAIN_UNION, | 
 | 1031 |   Mpi2IeeeSgeChainUnion_t, MPI2_POINTER pMpi2IeeeSgeChainUnion_t; | 
 | 1032 |  | 
 | 1033 |  | 
 | 1034 | /**************************************************************************** | 
 | 1035 | *  All IEEE SGE types union | 
 | 1036 | ****************************************************************************/ | 
 | 1037 |  | 
 | 1038 | typedef struct _MPI2_IEEE_SGE_UNION | 
 | 1039 | { | 
 | 1040 |     union | 
 | 1041 |     { | 
 | 1042 |         MPI2_IEEE_SGE_SIMPLE_UNION  Simple; | 
 | 1043 |         MPI2_IEEE_SGE_CHAIN_UNION   Chain; | 
 | 1044 |     } u; | 
 | 1045 | } MPI2_IEEE_SGE_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_UNION, | 
 | 1046 |   Mpi2IeeeSgeUnion_t, MPI2_POINTER pMpi2IeeeSgeUnion_t; | 
 | 1047 |  | 
 | 1048 |  | 
 | 1049 | /**************************************************************************** | 
 | 1050 | *  IEEE SGE field definitions and masks | 
 | 1051 | ****************************************************************************/ | 
 | 1052 |  | 
 | 1053 | /* Flags field bit definitions */ | 
 | 1054 |  | 
 | 1055 | #define MPI2_IEEE_SGE_FLAGS_ELEMENT_TYPE_MASK   (0x80) | 
 | 1056 |  | 
 | 1057 | #define MPI2_IEEE32_SGE_FLAGS_SHIFT             (24) | 
 | 1058 |  | 
 | 1059 | #define MPI2_IEEE32_SGE_LENGTH_MASK             (0x00FFFFFF) | 
 | 1060 |  | 
 | 1061 | /* Element Type */ | 
 | 1062 |  | 
 | 1063 | #define MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT      (0x00) | 
 | 1064 | #define MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT       (0x80) | 
 | 1065 |  | 
 | 1066 | /* Data Location Address Space */ | 
 | 1067 |  | 
 | 1068 | #define MPI2_IEEE_SGE_FLAGS_ADDR_MASK           (0x03) | 
 | 1069 | #define MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR         (0x00) | 
| Kashyap, Desai | ce7b181 | 2011-06-14 10:55:45 +0530 | [diff] [blame] | 1070 | 						/* IEEE Simple Element only */ | 
| Eric Moore | 635374e | 2009-03-09 01:21:12 -0600 | [diff] [blame] | 1071 | #define MPI2_IEEE_SGE_FLAGS_IOCDDR_ADDR         (0x01) | 
| Kashyap, Desai | ce7b181 | 2011-06-14 10:55:45 +0530 | [diff] [blame] | 1072 | 						/* IEEE Simple Element only */ | 
| Eric Moore | 635374e | 2009-03-09 01:21:12 -0600 | [diff] [blame] | 1073 | #define MPI2_IEEE_SGE_FLAGS_IOCPLB_ADDR         (0x02) | 
 | 1074 | #define MPI2_IEEE_SGE_FLAGS_IOCPLBNTA_ADDR      (0x03) | 
| Kashyap, Desai | ce7b181 | 2011-06-14 10:55:45 +0530 | [diff] [blame] | 1075 | 						/* IEEE Simple Element only */ | 
 | 1076 | #define MPI2_IEEE_SGE_FLAGS_SYSTEMPLBCPI_ADDR   (0x03) | 
 | 1077 | 						/* IEEE Chain Element only */ | 
| Eric Moore | 635374e | 2009-03-09 01:21:12 -0600 | [diff] [blame] | 1078 |  | 
 | 1079 | /**************************************************************************** | 
 | 1080 | *  IEEE SGE operation Macros | 
 | 1081 | ****************************************************************************/ | 
 | 1082 |  | 
 | 1083 | /* SIMPLE FlagsLength manipulations... */ | 
 | 1084 | #define MPI2_IEEE32_SGE_SET_FLAGS(f)     ((U32)(f) << MPI2_IEEE32_SGE_FLAGS_SHIFT) | 
 | 1085 | #define MPI2_IEEE32_SGE_GET_FLAGS(f)     (((f) & ~MPI2_IEEE32_SGE_LENGTH_MASK) >> MPI2_IEEE32_SGE_FLAGS_SHIFT) | 
 | 1086 | #define MPI2_IEEE32_SGE_LENGTH(f)        ((f) & MPI2_IEEE32_SGE_LENGTH_MASK) | 
 | 1087 |  | 
 | 1088 | #define MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f, l)      (MPI2_IEEE32_SGE_SET_FLAGS(f) | MPI2_IEEE32_SGE_LENGTH(l)) | 
 | 1089 |  | 
 | 1090 | #define MPI2_IEEE32_pSGE_GET_FLAGS(psg)             MPI2_IEEE32_SGE_GET_FLAGS((psg)->FlagsLength) | 
 | 1091 | #define MPI2_IEEE32_pSGE_GET_LENGTH(psg)            MPI2_IEEE32_SGE_LENGTH((psg)->FlagsLength) | 
 | 1092 | #define MPI2_IEEE32_pSGE_SET_FLAGS_LENGTH(psg,f,l)  (psg)->FlagsLength = MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f,l) | 
 | 1093 |  | 
 | 1094 | /* CAUTION - The following are READ-MODIFY-WRITE! */ | 
 | 1095 | #define MPI2_IEEE32_pSGE_SET_FLAGS(psg,f)    (psg)->FlagsLength |= MPI2_IEEE32_SGE_SET_FLAGS(f) | 
 | 1096 | #define MPI2_IEEE32_pSGE_SET_LENGTH(psg,l)   (psg)->FlagsLength |= MPI2_IEEE32_SGE_LENGTH(l) | 
 | 1097 |  | 
 | 1098 |  | 
 | 1099 |  | 
 | 1100 |  | 
 | 1101 | /***************************************************************************** | 
 | 1102 | * | 
 | 1103 | *        Fusion-MPT MPI/IEEE Scatter Gather Unions | 
 | 1104 | * | 
 | 1105 | *****************************************************************************/ | 
 | 1106 |  | 
 | 1107 | typedef union _MPI2_SIMPLE_SGE_UNION | 
 | 1108 | { | 
 | 1109 |     MPI2_SGE_SIMPLE_UNION       MpiSimple; | 
 | 1110 |     MPI2_IEEE_SGE_SIMPLE_UNION  IeeeSimple; | 
 | 1111 | } MPI2_SIMPLE_SGE_UNION, MPI2_POINTER PTR_MPI2_SIMPLE_SGE_UNION, | 
 | 1112 |   Mpi2SimpleSgeUntion_t, MPI2_POINTER pMpi2SimpleSgeUntion_t; | 
 | 1113 |  | 
 | 1114 |  | 
 | 1115 | typedef union _MPI2_SGE_IO_UNION | 
 | 1116 | { | 
 | 1117 |     MPI2_SGE_SIMPLE_UNION       MpiSimple; | 
 | 1118 |     MPI2_SGE_CHAIN_UNION        MpiChain; | 
 | 1119 |     MPI2_IEEE_SGE_SIMPLE_UNION  IeeeSimple; | 
 | 1120 |     MPI2_IEEE_SGE_CHAIN_UNION   IeeeChain; | 
 | 1121 | } MPI2_SGE_IO_UNION, MPI2_POINTER PTR_MPI2_SGE_IO_UNION, | 
 | 1122 |   Mpi2SGEIOUnion_t, MPI2_POINTER pMpi2SGEIOUnion_t; | 
 | 1123 |  | 
 | 1124 |  | 
 | 1125 | /**************************************************************************** | 
 | 1126 | * | 
 | 1127 | *  Values for SGLFlags field, used in many request messages with an SGL | 
 | 1128 | * | 
 | 1129 | ****************************************************************************/ | 
 | 1130 |  | 
 | 1131 | /* values for MPI SGL Data Location Address Space subfield */ | 
 | 1132 | #define MPI2_SGLFLAGS_ADDRESS_SPACE_MASK            (0x0C) | 
 | 1133 | #define MPI2_SGLFLAGS_SYSTEM_ADDRESS_SPACE          (0x00) | 
 | 1134 | #define MPI2_SGLFLAGS_IOCDDR_ADDRESS_SPACE          (0x04) | 
 | 1135 | #define MPI2_SGLFLAGS_IOCPLB_ADDRESS_SPACE          (0x08) | 
 | 1136 | #define MPI2_SGLFLAGS_IOCPLBNTA_ADDRESS_SPACE       (0x0C) | 
 | 1137 | /* values for SGL Type subfield */ | 
 | 1138 | #define MPI2_SGLFLAGS_SGL_TYPE_MASK                 (0x03) | 
 | 1139 | #define MPI2_SGLFLAGS_SGL_TYPE_MPI                  (0x00) | 
 | 1140 | #define MPI2_SGLFLAGS_SGL_TYPE_IEEE32               (0x01) | 
 | 1141 | #define MPI2_SGLFLAGS_SGL_TYPE_IEEE64               (0x02) | 
 | 1142 |  | 
 | 1143 |  | 
 | 1144 | #endif | 
 | 1145 |  |