| Michael Chan | a463696 | 2009-06-08 18:14:43 -0700 | [diff] [blame] | 1 | /* cnic_if.h: Broadcom CNIC core network driver. | 
 | 2 |  * | 
 | 3 |  * Copyright (c) 2006 Broadcom Corporation | 
 | 4 |  * | 
 | 5 |  * This program is free software; you can redistribute it and/or modify | 
 | 6 |  * it under the terms of the GNU General Public License as published by | 
 | 7 |  * the Free Software Foundation. | 
 | 8 |  * | 
 | 9 |  */ | 
 | 10 |  | 
 | 11 |  | 
 | 12 | #ifndef CNIC_IF_H | 
 | 13 | #define CNIC_IF_H | 
 | 14 |  | 
| Michael Chan | 6053bbf | 2009-10-02 11:03:28 -0700 | [diff] [blame] | 15 | #define CNIC_MODULE_VERSION	"2.0.1" | 
 | 16 | #define CNIC_MODULE_RELDATE	"Oct 01, 2009" | 
| Michael Chan | a463696 | 2009-06-08 18:14:43 -0700 | [diff] [blame] | 17 |  | 
 | 18 | #define CNIC_ULP_RDMA		0 | 
 | 19 | #define CNIC_ULP_ISCSI		1 | 
 | 20 | #define CNIC_ULP_L4		2 | 
 | 21 | #define MAX_CNIC_ULP_TYPE_EXT	2 | 
 | 22 | #define MAX_CNIC_ULP_TYPE	3 | 
 | 23 |  | 
 | 24 | struct kwqe { | 
 | 25 | 	u32 kwqe_op_flag; | 
 | 26 |  | 
 | 27 | #define KWQE_OPCODE_MASK	0x00ff0000 | 
 | 28 | #define KWQE_OPCODE_SHIFT	16 | 
 | 29 | #define KWQE_FLAGS_LAYER_SHIFT	28 | 
 | 30 | #define KWQE_OPCODE(x)		((x & KWQE_OPCODE_MASK) >> KWQE_OPCODE_SHIFT) | 
 | 31 |  | 
 | 32 | 	u32 kwqe_info0; | 
 | 33 | 	u32 kwqe_info1; | 
 | 34 | 	u32 kwqe_info2; | 
 | 35 | 	u32 kwqe_info3; | 
 | 36 | 	u32 kwqe_info4; | 
 | 37 | 	u32 kwqe_info5; | 
 | 38 | 	u32 kwqe_info6; | 
 | 39 | }; | 
 | 40 |  | 
 | 41 | struct kwqe_16 { | 
 | 42 | 	u32 kwqe_info0; | 
 | 43 | 	u32 kwqe_info1; | 
 | 44 | 	u32 kwqe_info2; | 
 | 45 | 	u32 kwqe_info3; | 
 | 46 | }; | 
 | 47 |  | 
 | 48 | struct kcqe { | 
 | 49 | 	u32 kcqe_info0; | 
 | 50 | 	u32 kcqe_info1; | 
 | 51 | 	u32 kcqe_info2; | 
 | 52 | 	u32 kcqe_info3; | 
 | 53 | 	u32 kcqe_info4; | 
 | 54 | 	u32 kcqe_info5; | 
 | 55 | 	u32 kcqe_info6; | 
 | 56 | 	u32 kcqe_op_flag; | 
 | 57 | 		#define KCQE_RAMROD_COMPLETION		(0x1<<27) /* Everest */ | 
 | 58 | 		#define KCQE_FLAGS_LAYER_MASK		(0x7<<28) | 
 | 59 | 		#define KCQE_FLAGS_LAYER_MASK_MISC	(0<<28) | 
 | 60 | 		#define KCQE_FLAGS_LAYER_MASK_L2	(2<<28) | 
 | 61 | 		#define KCQE_FLAGS_LAYER_MASK_L3	(3<<28) | 
 | 62 | 		#define KCQE_FLAGS_LAYER_MASK_L4	(4<<28) | 
 | 63 | 		#define KCQE_FLAGS_LAYER_MASK_L5_RDMA	(5<<28) | 
 | 64 | 		#define KCQE_FLAGS_LAYER_MASK_L5_ISCSI	(6<<28) | 
 | 65 | 		#define KCQE_FLAGS_NEXT 		(1<<31) | 
 | 66 | 		#define KCQE_FLAGS_OPCODE_MASK		(0xff<<16) | 
 | 67 | 		#define KCQE_FLAGS_OPCODE_SHIFT		(16) | 
 | 68 | 		#define KCQE_OPCODE(op)			\ | 
 | 69 | 		(((op) & KCQE_FLAGS_OPCODE_MASK) >> KCQE_FLAGS_OPCODE_SHIFT) | 
 | 70 | }; | 
 | 71 |  | 
 | 72 | #define MAX_CNIC_CTL_DATA	64 | 
 | 73 | #define MAX_DRV_CTL_DATA	64 | 
 | 74 |  | 
 | 75 | #define CNIC_CTL_STOP_CMD		1 | 
 | 76 | #define CNIC_CTL_START_CMD		2 | 
 | 77 | #define CNIC_CTL_COMPLETION_CMD		3 | 
 | 78 |  | 
 | 79 | #define DRV_CTL_IO_WR_CMD		0x101 | 
 | 80 | #define DRV_CTL_IO_RD_CMD		0x102 | 
 | 81 | #define DRV_CTL_CTX_WR_CMD		0x103 | 
 | 82 | #define DRV_CTL_CTXTBL_WR_CMD		0x104 | 
 | 83 | #define DRV_CTL_COMPLETION_CMD		0x105 | 
 | 84 |  | 
 | 85 | struct cnic_ctl_completion { | 
 | 86 | 	u32	cid; | 
 | 87 | }; | 
 | 88 |  | 
 | 89 | struct drv_ctl_completion { | 
 | 90 | 	u32	comp_count; | 
 | 91 | }; | 
 | 92 |  | 
 | 93 | struct cnic_ctl_info { | 
 | 94 | 	int	cmd; | 
 | 95 | 	union { | 
 | 96 | 		struct cnic_ctl_completion comp; | 
 | 97 | 		char bytes[MAX_CNIC_CTL_DATA]; | 
 | 98 | 	} data; | 
 | 99 | }; | 
 | 100 |  | 
 | 101 | struct drv_ctl_io { | 
 | 102 | 	u32		cid_addr; | 
 | 103 | 	u32		offset; | 
 | 104 | 	u32		data; | 
 | 105 | 	dma_addr_t	dma_addr; | 
 | 106 | }; | 
 | 107 |  | 
 | 108 | struct drv_ctl_info { | 
 | 109 | 	int	cmd; | 
 | 110 | 	union { | 
 | 111 | 		struct drv_ctl_completion comp; | 
 | 112 | 		struct drv_ctl_io io; | 
 | 113 | 		char bytes[MAX_DRV_CTL_DATA]; | 
 | 114 | 	} data; | 
 | 115 | }; | 
 | 116 |  | 
 | 117 | struct cnic_ops { | 
 | 118 | 	struct module	*cnic_owner; | 
 | 119 | 	/* Calls to these functions are protected by RCU.  When | 
 | 120 | 	 * unregistering, we wait for any calls to complete before | 
 | 121 | 	 * continuing. | 
 | 122 | 	 */ | 
 | 123 | 	int		(*cnic_handler)(void *, void *); | 
 | 124 | 	int		(*cnic_ctl)(void *, struct cnic_ctl_info *); | 
 | 125 | }; | 
 | 126 |  | 
 | 127 | #define MAX_CNIC_VEC	8 | 
 | 128 |  | 
 | 129 | struct cnic_irq { | 
 | 130 | 	unsigned int	vector; | 
 | 131 | 	void		*status_blk; | 
 | 132 | 	u32		status_blk_num; | 
 | 133 | 	u32		irq_flags; | 
 | 134 | #define CNIC_IRQ_FL_MSIX		0x00000001 | 
 | 135 | }; | 
 | 136 |  | 
 | 137 | struct cnic_eth_dev { | 
 | 138 | 	struct module	*drv_owner; | 
 | 139 | 	u32		drv_state; | 
 | 140 | #define CNIC_DRV_STATE_REGD		0x00000001 | 
 | 141 | #define CNIC_DRV_STATE_USING_MSIX	0x00000002 | 
 | 142 | 	u32		chip_id; | 
 | 143 | 	u32		max_kwqe_pending; | 
 | 144 | 	struct pci_dev	*pdev; | 
 | 145 | 	void __iomem	*io_base; | 
 | 146 |  | 
 | 147 | 	u32		ctx_tbl_offset; | 
 | 148 | 	u32		ctx_tbl_len; | 
 | 149 | 	int		ctx_blk_size; | 
 | 150 | 	u32		starting_cid; | 
 | 151 | 	u32		max_iscsi_conn; | 
 | 152 | 	u32		max_fcoe_conn; | 
 | 153 | 	u32		max_rdma_conn; | 
 | 154 | 	u32		reserved0[2]; | 
 | 155 |  | 
 | 156 | 	int		num_irq; | 
 | 157 | 	struct cnic_irq	irq_arr[MAX_CNIC_VEC]; | 
 | 158 | 	int		(*drv_register_cnic)(struct net_device *, | 
 | 159 | 					     struct cnic_ops *, void *); | 
 | 160 | 	int		(*drv_unregister_cnic)(struct net_device *); | 
 | 161 | 	int		(*drv_submit_kwqes_32)(struct net_device *, | 
 | 162 | 					       struct kwqe *[], u32); | 
 | 163 | 	int		(*drv_submit_kwqes_16)(struct net_device *, | 
 | 164 | 					       struct kwqe_16 *[], u32); | 
 | 165 | 	int		(*drv_ctl)(struct net_device *, struct drv_ctl_info *); | 
 | 166 | 	unsigned long	reserved1[2]; | 
 | 167 | }; | 
 | 168 |  | 
 | 169 | struct cnic_sockaddr { | 
 | 170 | 	union { | 
 | 171 | 		struct sockaddr_in	v4; | 
 | 172 | 		struct sockaddr_in6	v6; | 
 | 173 | 	} local; | 
 | 174 | 	union { | 
 | 175 | 		struct sockaddr_in	v4; | 
 | 176 | 		struct sockaddr_in6	v6; | 
 | 177 | 	} remote; | 
 | 178 | }; | 
 | 179 |  | 
 | 180 | struct cnic_sock { | 
 | 181 | 	struct cnic_dev *dev; | 
 | 182 | 	void	*context; | 
 | 183 | 	u32	src_ip[4]; | 
 | 184 | 	u32	dst_ip[4]; | 
 | 185 | 	u16	src_port; | 
 | 186 | 	u16	dst_port; | 
 | 187 | 	u16	vlan_id; | 
 | 188 | 	unsigned char old_ha[6]; | 
 | 189 | 	unsigned char ha[6]; | 
 | 190 | 	u32	mtu; | 
 | 191 | 	u32	cid; | 
 | 192 | 	u32	l5_cid; | 
 | 193 | 	u32	pg_cid; | 
 | 194 | 	int	ulp_type; | 
 | 195 |  | 
 | 196 | 	u32	ka_timeout; | 
 | 197 | 	u32	ka_interval; | 
 | 198 | 	u8	ka_max_probe_count; | 
 | 199 | 	u8	tos; | 
 | 200 | 	u8	ttl; | 
 | 201 | 	u8	snd_seq_scale; | 
 | 202 | 	u32	rcv_buf; | 
 | 203 | 	u32	snd_buf; | 
 | 204 | 	u32	seed; | 
 | 205 |  | 
 | 206 | 	unsigned long	tcp_flags; | 
 | 207 | #define SK_TCP_NO_DELAY_ACK	0x1 | 
 | 208 | #define SK_TCP_KEEP_ALIVE	0x2 | 
 | 209 | #define SK_TCP_NAGLE		0x4 | 
 | 210 | #define SK_TCP_TIMESTAMP	0x8 | 
 | 211 | #define SK_TCP_SACK		0x10 | 
 | 212 | #define SK_TCP_SEG_SCALING	0x20 | 
 | 213 | 	unsigned long	flags; | 
 | 214 | #define SK_F_INUSE		0 | 
 | 215 | #define SK_F_OFFLD_COMPLETE	1 | 
 | 216 | #define SK_F_OFFLD_SCHED	2 | 
 | 217 | #define SK_F_PG_OFFLD_COMPLETE	3 | 
 | 218 | #define SK_F_CONNECT_START	4 | 
 | 219 | #define SK_F_IPV6		5 | 
 | 220 | #define SK_F_CLOSING		7 | 
 | 221 |  | 
 | 222 | 	atomic_t ref_count; | 
 | 223 | 	u32 state; | 
 | 224 | 	struct kwqe kwqe1; | 
 | 225 | 	struct kwqe kwqe2; | 
 | 226 | 	struct kwqe kwqe3; | 
 | 227 | }; | 
 | 228 |  | 
 | 229 | struct cnic_dev { | 
 | 230 | 	struct net_device	*netdev; | 
 | 231 | 	struct pci_dev		*pcidev; | 
 | 232 | 	void __iomem		*regview; | 
 | 233 | 	struct list_head	list; | 
 | 234 |  | 
 | 235 | 	int (*register_device)(struct cnic_dev *dev, int ulp_type, | 
 | 236 | 			       void *ulp_ctx); | 
 | 237 | 	int (*unregister_device)(struct cnic_dev *dev, int ulp_type); | 
 | 238 | 	int (*submit_kwqes)(struct cnic_dev *dev, struct kwqe *wqes[], | 
 | 239 | 				u32 num_wqes); | 
 | 240 | 	int (*submit_kwqes_16)(struct cnic_dev *dev, struct kwqe_16 *wqes[], | 
 | 241 | 				u32 num_wqes); | 
 | 242 |  | 
 | 243 | 	int (*cm_create)(struct cnic_dev *, int, u32, u32, struct cnic_sock **, | 
 | 244 | 			 void *); | 
 | 245 | 	int (*cm_destroy)(struct cnic_sock *); | 
 | 246 | 	int (*cm_connect)(struct cnic_sock *, struct cnic_sockaddr *); | 
 | 247 | 	int (*cm_abort)(struct cnic_sock *); | 
 | 248 | 	int (*cm_close)(struct cnic_sock *); | 
 | 249 | 	struct cnic_dev *(*cm_select_dev)(struct sockaddr_in *, int ulp_type); | 
 | 250 | 	int (*iscsi_nl_msg_recv)(struct cnic_dev *dev, u32 msg_type, | 
 | 251 | 				 char *data, u16 data_size); | 
 | 252 | 	unsigned long	flags; | 
 | 253 | #define CNIC_F_CNIC_UP		1 | 
 | 254 | #define CNIC_F_BNX2_CLASS	3 | 
 | 255 | #define CNIC_F_BNX2X_CLASS	4 | 
 | 256 | 	atomic_t	ref_count; | 
 | 257 | 	u8		mac_addr[6]; | 
 | 258 |  | 
 | 259 | 	int		max_iscsi_conn; | 
 | 260 | 	int		max_fcoe_conn; | 
 | 261 | 	int		max_rdma_conn; | 
 | 262 |  | 
 | 263 | 	void		*cnic_priv; | 
 | 264 | }; | 
 | 265 |  | 
 | 266 | #define CNIC_WR(dev, off, val)		writel(val, dev->regview + off) | 
 | 267 | #define CNIC_WR16(dev, off, val)	writew(val, dev->regview + off) | 
 | 268 | #define CNIC_WR8(dev, off, val)		writeb(val, dev->regview + off) | 
 | 269 | #define CNIC_RD(dev, off)		readl(dev->regview + off) | 
 | 270 | #define CNIC_RD16(dev, off)		readw(dev->regview + off) | 
 | 271 |  | 
 | 272 | struct cnic_ulp_ops { | 
 | 273 | 	/* Calls to these functions are protected by RCU.  When | 
 | 274 | 	 * unregistering, we wait for any calls to complete before | 
 | 275 | 	 * continuing. | 
 | 276 | 	 */ | 
 | 277 |  | 
 | 278 | 	void (*cnic_init)(struct cnic_dev *dev); | 
 | 279 | 	void (*cnic_exit)(struct cnic_dev *dev); | 
 | 280 | 	void (*cnic_start)(void *ulp_ctx); | 
 | 281 | 	void (*cnic_stop)(void *ulp_ctx); | 
 | 282 | 	void (*indicate_kcqes)(void *ulp_ctx, struct kcqe *cqes[], | 
 | 283 | 				u32 num_cqes); | 
 | 284 | 	void (*indicate_netevent)(void *ulp_ctx, unsigned long event); | 
 | 285 | 	void (*cm_connect_complete)(struct cnic_sock *); | 
 | 286 | 	void (*cm_close_complete)(struct cnic_sock *); | 
 | 287 | 	void (*cm_abort_complete)(struct cnic_sock *); | 
 | 288 | 	void (*cm_remote_close)(struct cnic_sock *); | 
 | 289 | 	void (*cm_remote_abort)(struct cnic_sock *); | 
 | 290 | 	void (*iscsi_nl_send_msg)(struct cnic_dev *dev, u32 msg_type, | 
 | 291 | 				  char *data, u16 data_size); | 
 | 292 | 	struct module *owner; | 
| Michael Chan | 7fc1ece | 2009-08-14 15:49:47 +0000 | [diff] [blame] | 293 | 	atomic_t ref_count; | 
| Michael Chan | a463696 | 2009-06-08 18:14:43 -0700 | [diff] [blame] | 294 | }; | 
 | 295 |  | 
 | 296 | extern int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops); | 
 | 297 |  | 
 | 298 | extern int cnic_unregister_driver(int ulp_type); | 
 | 299 |  | 
| Michael Chan | e2ee361 | 2009-06-13 17:43:02 -0700 | [diff] [blame] | 300 | extern struct cnic_eth_dev *bnx2_cnic_probe(struct net_device *dev); | 
 | 301 |  | 
| Michael Chan | a463696 | 2009-06-08 18:14:43 -0700 | [diff] [blame] | 302 | #endif |