blob: 36f6779c88d4e3b9d61a6d6896958b8706299c58 [file] [log] [blame]
Paul Mackerras9b6b5632005-10-06 12:06:20 +10001/*
2 * Common prep/pmac/chrp boot and setup code.
3 */
4
Paul Mackerras9b6b5632005-10-06 12:06:20 +10005#include <linux/module.h>
6#include <linux/string.h>
7#include <linux/sched.h>
8#include <linux/init.h>
9#include <linux/kernel.h>
10#include <linux/reboot.h>
11#include <linux/delay.h>
12#include <linux/initrd.h>
Paul Mackerras9b6b5632005-10-06 12:06:20 +100013#include <linux/tty.h>
14#include <linux/bootmem.h>
15#include <linux/seq_file.h>
16#include <linux/root_dev.h>
17#include <linux/cpu.h>
18#include <linux/console.h>
19
Paul Mackerras9b6b5632005-10-06 12:06:20 +100020#include <asm/io.h>
21#include <asm/prom.h>
22#include <asm/processor.h>
23#include <asm/pgtable.h>
Paul Mackerras9b6b5632005-10-06 12:06:20 +100024#include <asm/setup.h>
Paul Mackerras9b6b5632005-10-06 12:06:20 +100025#include <asm/smp.h>
26#include <asm/elf.h>
27#include <asm/cputable.h>
28#include <asm/bootx.h>
29#include <asm/btext.h>
30#include <asm/machdep.h>
31#include <asm/uaccess.h>
32#include <asm/system.h>
33#include <asm/pmac_feature.h>
34#include <asm/sections.h>
35#include <asm/nvram.h>
36#include <asm/xmon.h>
Kumar Gala6d7f58b2005-10-25 23:57:33 -050037#include <asm/time.h>
Benjamin Herrenschmidt463ce0e2005-11-23 17:56:06 +110038#include <asm/serial.h>
Benjamin Herrenschmidt51d30822005-11-23 17:57:25 +110039#include <asm/udbg.h>
Paul Mackerras9b6b5632005-10-06 12:06:20 +100040
Stephen Rothwell66ba1352005-11-09 11:01:06 +110041#include "setup.h"
42
Paul Mackerras03501da2005-10-26 17:11:18 +100043#define DBG(fmt...)
44
Paul Mackerras9b6b5632005-10-06 12:06:20 +100045#if defined CONFIG_KGDB
46#include <asm/kgdb.h>
47#endif
48
Paul Mackerras9b6b5632005-10-06 12:06:20 +100049extern void bootx_init(unsigned long r4, unsigned long phys);
50
Paul Mackerras80579e12005-10-27 22:42:04 +100051int boot_cpuid;
52EXPORT_SYMBOL_GPL(boot_cpuid);
53int boot_cpuid_phys;
54
Paul Mackerras9b6b5632005-10-06 12:06:20 +100055unsigned long ISA_DMA_THRESHOLD;
56unsigned int DMA_MODE_READ;
57unsigned int DMA_MODE_WRITE;
58
Paul Mackerrase574d232005-10-10 22:58:10 +100059int have_of = 1;
60
Paul Mackerras9b6b5632005-10-06 12:06:20 +100061#ifdef CONFIG_VGA_CONSOLE
62unsigned long vgacon_remap_base;
Mathieu Desnoyersd003e7a2007-02-07 19:04:44 -050063EXPORT_SYMBOL(vgacon_remap_base);
Paul Mackerras9b6b5632005-10-06 12:06:20 +100064#endif
65
Paul Mackerras9b6b5632005-10-06 12:06:20 +100066/*
67 * These are used in binfmt_elf.c to put aux entries on the stack
68 * for each elf executable being started.
69 */
70int dcache_bsize;
71int icache_bsize;
72int ucache_bsize;
73
Paul Mackerras9b6b5632005-10-06 12:06:20 +100074/*
75 * We're called here very early in the boot. We determine the machine
76 * type and call the appropriate low-level setup functions.
77 * -- Cort <cort@fsmlabs.com>
78 *
79 * Note that the kernel may be running at an address which is different
80 * from the address that it was linked at, so we must use RELOC/PTRRELOC
81 * to access static data (including strings). -- paulus
82 */
83unsigned long __init early_init(unsigned long dt_ptr)
84{
85 unsigned long offset = reloc_offset();
Benjamin Herrenschmidt42c4aaa2006-10-24 16:42:40 +100086 struct cpu_spec *spec;
Paul Mackerras9b6b5632005-10-06 12:06:20 +100087
Paul Mackerrasdd1843432005-10-17 20:13:47 +100088 /* First zero the BSS -- use memset_io, some platforms don't have
89 * caches on yet */
Mark A. Greer556b09c2006-10-25 16:36:49 -070090 memset_io((void __iomem *)PTRRELOC(&__bss_start), 0,
91 __bss_stop - __bss_start);
Paul Mackerrasdd1843432005-10-17 20:13:47 +100092
Paul Mackerras9b6b5632005-10-06 12:06:20 +100093 /*
94 * Identify the CPU type and fix up code sections
95 * that depend on which cpu we have.
96 */
Paul Mackerras974a76f2006-11-10 20:38:53 +110097 spec = identify_cpu(offset, mfspr(SPRN_PVR));
Benjamin Herrenschmidt42c4aaa2006-10-24 16:42:40 +100098
Benjamin Herrenschmidt0909c8c2006-10-20 11:47:18 +100099 do_feature_fixups(spec->cpu_features,
Benjamin Herrenschmidt42c4aaa2006-10-24 16:42:40 +1000100 PTRRELOC(&__start___ftr_fixup),
101 PTRRELOC(&__stop___ftr_fixup));
Paul Mackerras9b6b5632005-10-06 12:06:20 +1000102
Paul Mackerras9b6b5632005-10-06 12:06:20 +1000103 return KERNELBASE + offset;
104}
105
Paul Mackerras9b6b5632005-10-06 12:06:20 +1000106
Paul Mackerras9b6b5632005-10-06 12:06:20 +1000107/*
108 * Find out what kind of machine we're on and save any data we need
109 * from the early boot process (devtree is copied on pmac by prom_init()).
110 * This is called very early on the boot process, after a minimal
111 * MMU environment has been set up but before MMU_init is called.
112 */
113void __init machine_init(unsigned long dt_ptr, unsigned long phys)
114{
David Gibson719c91c2007-02-13 15:54:22 +1100115 /* Enable early debugging if any specified (see udbg.h) */
116 udbg_early_init();
Benjamin Herrenschmidt51d30822005-11-23 17:57:25 +1100117
118 /* Do some early initialization based on the flat device tree */
Paul Mackerras9b6b5632005-10-06 12:06:20 +1000119 early_init_devtree(__va(dt_ptr));
120
Benjamin Herrenschmidte8222502006-03-28 23:15:54 +1100121 probe_machine();
Paul Mackerras35499c02005-10-22 16:02:39 +1000122
Paul Mackerras9b6b5632005-10-06 12:06:20 +1000123#ifdef CONFIG_6xx
Paul Mackerrasa0652fc2006-03-27 15:03:03 +1100124 if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
125 cpu_has_feature(CPU_FTR_CAN_NAP))
126 ppc_md.power_save = ppc6xx_idle;
Paul Mackerras9b6b5632005-10-06 12:06:20 +1000127#endif
Paul Mackerras9b6b5632005-10-06 12:06:20 +1000128
129 if (ppc_md.progress)
130 ppc_md.progress("id mach(): done", 0x200);
131}
132
133#ifdef CONFIG_BOOKE_WDT
134/* Checks wdt=x and wdt_period=xx command-line option */
135int __init early_parse_wdt(char *p)
136{
137 if (p && strncmp(p, "0", 1) != 0)
138 booke_wdt_enabled = 1;
139
140 return 0;
141}
142early_param("wdt", early_parse_wdt);
143
144int __init early_parse_wdt_period (char *p)
145{
146 if (p)
147 booke_wdt_period = simple_strtoul(p, NULL, 0);
148
149 return 0;
150}
151early_param("wdt_period", early_parse_wdt_period);
152#endif /* CONFIG_BOOKE_WDT */
153
154/* Checks "l2cr=xxxx" command-line option */
155int __init ppc_setup_l2cr(char *str)
156{
157 if (cpu_has_feature(CPU_FTR_L2CR)) {
158 unsigned long val = simple_strtoul(str, NULL, 0);
159 printk(KERN_INFO "l2cr set to %lx\n", val);
160 _set_L2CR(0); /* force invalidate by disable cache */
161 _set_L2CR(val); /* and enable it */
162 }
163 return 1;
164}
165__setup("l2cr=", ppc_setup_l2cr);
166
Robert Brosea78bfbf2008-03-29 07:20:23 +1100167/* Checks "l3cr=xxxx" command-line option */
168int __init ppc_setup_l3cr(char *str)
169{
170 if (cpu_has_feature(CPU_FTR_L3CR)) {
171 unsigned long val = simple_strtoul(str, NULL, 0);
172 printk(KERN_INFO "l3cr set to %lx\n", val);
173 _set_L3CR(val); /* and enable it */
174 }
175 return 1;
176}
177__setup("l3cr=", ppc_setup_l3cr);
178
Paul Mackerras9b6b5632005-10-06 12:06:20 +1000179#ifdef CONFIG_GENERIC_NVRAM
180
181/* Generic nvram hooks used by drivers/char/gen_nvram.c */
182unsigned char nvram_read_byte(int addr)
183{
184 if (ppc_md.nvram_read_val)
185 return ppc_md.nvram_read_val(addr);
186 return 0xff;
187}
188EXPORT_SYMBOL(nvram_read_byte);
189
190void nvram_write_byte(unsigned char val, int addr)
191{
192 if (ppc_md.nvram_write_val)
193 ppc_md.nvram_write_val(addr, val);
194}
195EXPORT_SYMBOL(nvram_write_byte);
196
197void nvram_sync(void)
198{
199 if (ppc_md.nvram_sync)
200 ppc_md.nvram_sync();
201}
202EXPORT_SYMBOL(nvram_sync);
203
204#endif /* CONFIG_NVRAM */
205
Giuliano Pochini5e417632007-03-26 21:40:28 -0800206static DEFINE_PER_CPU(struct cpu, cpu_devices);
Paul Mackerras9b6b5632005-10-06 12:06:20 +1000207
208int __init ppc_init(void)
209{
Giuliano Pochini5e417632007-03-26 21:40:28 -0800210 int cpu;
Paul Mackerras9b6b5632005-10-06 12:06:20 +1000211
212 /* clear the progress line */
Giuliano Pochini5e417632007-03-26 21:40:28 -0800213 if (ppc_md.progress)
214 ppc_md.progress(" ", 0xffff);
Paul Mackerras9b6b5632005-10-06 12:06:20 +1000215
216 /* register CPU devices */
Giuliano Pochini5e417632007-03-26 21:40:28 -0800217 for_each_possible_cpu(cpu) {
218 struct cpu *c = &per_cpu(cpu_devices, cpu);
219 c->hotpluggable = 1;
220 register_cpu(c, cpu);
221 }
Paul Mackerras9b6b5632005-10-06 12:06:20 +1000222
223 /* call platform init */
224 if (ppc_md.init != NULL) {
225 ppc_md.init();
226 }
227 return 0;
228}
229
230arch_initcall(ppc_init);
231
232/* Warning, IO base is not yet inited */
233void __init setup_arch(char **cmdline_p)
234{
Michael Ellerman846f77b2006-05-17 18:00:45 +1000235 *cmdline_p = cmd_line;
236
Paul Mackerras9b6b5632005-10-06 12:06:20 +1000237 /* so udelay does something sensible, assume <= 1000 bogomips */
238 loops_per_jiffy = 500000000 / HZ;
239
Paul Mackerras9b6b5632005-10-06 12:06:20 +1000240 unflatten_device_tree();
David Woodhousea82765b2005-11-02 22:34:20 +0000241 check_for_initrd();
Benjamin Herrenschmidt463ce0e2005-11-23 17:56:06 +1100242
243 if (ppc_md.init_early)
244 ppc_md.init_early();
245
Benjamin Herrenschmidt463ce0e2005-11-23 17:56:06 +1100246 find_legacy_serial_ports();
Paul Mackerras9b6b5632005-10-06 12:06:20 +1000247
Paul Mackerras5ad57072005-11-05 10:33:55 +1100248 smp_setup_cpu_maps();
249
Benjamin Herrenschmidt51d30822005-11-23 17:57:25 +1100250 /* Register early console */
251 register_early_udbg_console();
Paul Mackerras9b6b5632005-10-06 12:06:20 +1000252
Michael Ellerman476792832006-10-03 14:12:08 +1000253 xmon_setup();
254
Paul Mackerras9b6b5632005-10-06 12:06:20 +1000255#if defined(CONFIG_KGDB)
256 if (ppc_md.kgdb_map_scc)
257 ppc_md.kgdb_map_scc();
258 set_debug_traps();
259 if (strstr(cmd_line, "gdb")) {
260 if (ppc_md.progress)
261 ppc_md.progress("setup_arch: kgdb breakpoint", 0x4000);
262 printk("kgdb breakpoint activated\n");
263 breakpoint();
264 }
265#endif
266
267 /*
268 * Set cache line size based on type of cpu as a default.
269 * Systems with OF can look in the properties on the cpu node(s)
270 * for a possibly more accurate value.
271 */
David Gibson4508dc22007-06-13 14:52:57 +1000272 dcache_bsize = cur_cpu_spec->dcache_bsize;
273 icache_bsize = cur_cpu_spec->icache_bsize;
274 ucache_bsize = 0;
275 if (cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE))
276 ucache_bsize = icache_bsize = dcache_bsize;
Paul Mackerras9b6b5632005-10-06 12:06:20 +1000277
278 /* reboot on panic */
279 panic_timeout = 180;
280
Kumar Gala7e990262006-05-05 00:02:08 -0500281 if (ppc_md.panic)
282 setup_panic();
283
Kumar Gala4846c5d2008-04-16 05:52:26 +1000284 init_mm.start_code = (unsigned long)_stext;
Paul Mackerras9b6b5632005-10-06 12:06:20 +1000285 init_mm.end_code = (unsigned long) _etext;
286 init_mm.end_data = (unsigned long) _edata;
Paul Mackerras49b09852005-11-10 15:53:40 +1100287 init_mm.brk = klimit;
Paul Mackerras9b6b5632005-10-06 12:06:20 +1000288
Paul Mackerras9b6b5632005-10-06 12:06:20 +1000289 /* set up the bootmem stuff with available memory */
290 do_init_bootmem();
291 if ( ppc_md.progress ) ppc_md.progress("setup_arch: bootmem", 0x3eab);
292
Paul Mackerras9b6b5632005-10-06 12:06:20 +1000293#ifdef CONFIG_DUMMY_CONSOLE
294 conswitchp = &dummy_con;
295#endif
296
Grant Likely38db7e72007-10-11 04:48:18 +1000297 if (ppc_md.setup_arch)
298 ppc_md.setup_arch();
Paul Mackerras9b6b5632005-10-06 12:06:20 +1000299 if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab);
300
301 paging_init();
Paul Mackerras9b6b5632005-10-06 12:06:20 +1000302}