blob: 8b3aa7afdae059cd49a3ab87b688008298cc2e5d [file] [log] [blame]
Shawn Guo4afbbb72010-12-18 21:39:35 +08001/*
2 * Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#include <linux/delay.h>
16#include <linux/platform_device.h>
17#include <linux/gpio.h>
Shawn Guo53b8ff92011-05-31 17:07:03 +080018#include <linux/leds.h>
Shawn Guo4afbbb72010-12-18 21:39:35 +080019#include <linux/clk.h>
20
21#include <asm/mach-types.h>
22#include <asm/mach/arch.h>
23#include <asm/mach/time.h>
24
25#include <mach/common.h>
26#include <mach/iomux-mx28.h>
27
28#include "devices-mx28.h"
Shawn Guo4afbbb72010-12-18 21:39:35 +080029
Shawn Guoacc9cdc2011-03-03 22:13:38 +080030#define MX28EVK_FLEXCAN_SWITCH MXS_GPIO_NR(2, 13)
Shawn Guo4afbbb72010-12-18 21:39:35 +080031#define MX28EVK_FEC_PHY_POWER MXS_GPIO_NR(2, 15)
Shawn Guo53b8ff92011-05-31 17:07:03 +080032#define MX28EVK_GPIO_LED MXS_GPIO_NR(3, 5)
Shawn Guo0590a792011-03-08 18:51:10 +080033#define MX28EVK_BL_ENABLE MXS_GPIO_NR(3, 18)
34#define MX28EVK_LCD_ENABLE MXS_GPIO_NR(3, 30)
Shawn Guo4afbbb72010-12-18 21:39:35 +080035#define MX28EVK_FEC_PHY_RESET MXS_GPIO_NR(4, 13)
36
Shawn Guo5bb2c822011-02-22 16:50:24 +080037#define MX28EVK_MMC0_WRITE_PROTECT MXS_GPIO_NR(2, 12)
38#define MX28EVK_MMC1_WRITE_PROTECT MXS_GPIO_NR(0, 28)
39#define MX28EVK_MMC0_SLOT_POWER MXS_GPIO_NR(3, 28)
40#define MX28EVK_MMC1_SLOT_POWER MXS_GPIO_NR(3, 29)
41
Shawn Guo4afbbb72010-12-18 21:39:35 +080042static const iomux_cfg_t mx28evk_pads[] __initconst = {
43 /* duart */
Shawn Guodb63a492011-03-06 00:40:19 +080044 MX28_PAD_PWM0__DUART_RX | MXS_PAD_CTRL,
45 MX28_PAD_PWM1__DUART_TX | MXS_PAD_CTRL,
Shawn Guo4afbbb72010-12-18 21:39:35 +080046
Shawn Guo15808182011-02-17 14:28:52 +080047 /* auart0 */
Shawn Guodb63a492011-03-06 00:40:19 +080048 MX28_PAD_AUART0_RX__AUART0_RX | MXS_PAD_CTRL,
49 MX28_PAD_AUART0_TX__AUART0_TX | MXS_PAD_CTRL,
50 MX28_PAD_AUART0_CTS__AUART0_CTS | MXS_PAD_CTRL,
51 MX28_PAD_AUART0_RTS__AUART0_RTS | MXS_PAD_CTRL,
Shawn Guo15808182011-02-17 14:28:52 +080052 /* auart3 */
Shawn Guodb63a492011-03-06 00:40:19 +080053 MX28_PAD_AUART3_RX__AUART3_RX | MXS_PAD_CTRL,
54 MX28_PAD_AUART3_TX__AUART3_TX | MXS_PAD_CTRL,
55 MX28_PAD_AUART3_CTS__AUART3_CTS | MXS_PAD_CTRL,
56 MX28_PAD_AUART3_RTS__AUART3_RTS | MXS_PAD_CTRL,
Shawn Guo15808182011-02-17 14:28:52 +080057
Shawn Guodb63a492011-03-06 00:40:19 +080058#define MXS_PAD_FEC (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP)
Shawn Guo4afbbb72010-12-18 21:39:35 +080059 /* fec0 */
Shawn Guodb63a492011-03-06 00:40:19 +080060 MX28_PAD_ENET0_MDC__ENET0_MDC | MXS_PAD_FEC,
61 MX28_PAD_ENET0_MDIO__ENET0_MDIO | MXS_PAD_FEC,
62 MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MXS_PAD_FEC,
63 MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MXS_PAD_FEC,
64 MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MXS_PAD_FEC,
65 MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MXS_PAD_FEC,
66 MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MXS_PAD_FEC,
67 MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MXS_PAD_FEC,
68 MX28_PAD_ENET_CLK__CLKCTRL_ENET | MXS_PAD_FEC,
Shawn Guo48f76ed2011-01-11 20:09:24 +080069 /* fec1 */
Shawn Guodb63a492011-03-06 00:40:19 +080070 MX28_PAD_ENET0_CRS__ENET1_RX_EN | MXS_PAD_FEC,
71 MX28_PAD_ENET0_RXD2__ENET1_RXD0 | MXS_PAD_FEC,
72 MX28_PAD_ENET0_RXD3__ENET1_RXD1 | MXS_PAD_FEC,
73 MX28_PAD_ENET0_COL__ENET1_TX_EN | MXS_PAD_FEC,
74 MX28_PAD_ENET0_TXD2__ENET1_TXD0 | MXS_PAD_FEC,
75 MX28_PAD_ENET0_TXD3__ENET1_TXD1 | MXS_PAD_FEC,
Shawn Guo4afbbb72010-12-18 21:39:35 +080076 /* phy power line */
Shawn Guodb63a492011-03-06 00:40:19 +080077 MX28_PAD_SSP1_DATA3__GPIO_2_15 | MXS_PAD_CTRL,
Shawn Guo4afbbb72010-12-18 21:39:35 +080078 /* phy reset line */
Shawn Guodb63a492011-03-06 00:40:19 +080079 MX28_PAD_ENET0_RX_CLK__GPIO_4_13 | MXS_PAD_CTRL,
Shawn Guoacc9cdc2011-03-03 22:13:38 +080080
81 /* flexcan0 */
82 MX28_PAD_GPMI_RDY2__CAN0_TX,
83 MX28_PAD_GPMI_RDY3__CAN0_RX,
84 /* flexcan1 */
85 MX28_PAD_GPMI_CE2N__CAN1_TX,
86 MX28_PAD_GPMI_CE3N__CAN1_RX,
87 /* transceiver power control */
88 MX28_PAD_SSP1_CMD__GPIO_2_13,
Shawn Guo0590a792011-03-08 18:51:10 +080089
90 /* mxsfb (lcdif) */
91 MX28_PAD_LCD_D00__LCD_D0 | MXS_PAD_CTRL,
92 MX28_PAD_LCD_D01__LCD_D1 | MXS_PAD_CTRL,
93 MX28_PAD_LCD_D02__LCD_D2 | MXS_PAD_CTRL,
94 MX28_PAD_LCD_D03__LCD_D3 | MXS_PAD_CTRL,
95 MX28_PAD_LCD_D04__LCD_D4 | MXS_PAD_CTRL,
96 MX28_PAD_LCD_D05__LCD_D5 | MXS_PAD_CTRL,
97 MX28_PAD_LCD_D06__LCD_D6 | MXS_PAD_CTRL,
98 MX28_PAD_LCD_D07__LCD_D7 | MXS_PAD_CTRL,
99 MX28_PAD_LCD_D08__LCD_D8 | MXS_PAD_CTRL,
100 MX28_PAD_LCD_D09__LCD_D9 | MXS_PAD_CTRL,
101 MX28_PAD_LCD_D10__LCD_D10 | MXS_PAD_CTRL,
102 MX28_PAD_LCD_D11__LCD_D11 | MXS_PAD_CTRL,
103 MX28_PAD_LCD_D12__LCD_D12 | MXS_PAD_CTRL,
104 MX28_PAD_LCD_D13__LCD_D13 | MXS_PAD_CTRL,
105 MX28_PAD_LCD_D14__LCD_D14 | MXS_PAD_CTRL,
106 MX28_PAD_LCD_D15__LCD_D15 | MXS_PAD_CTRL,
107 MX28_PAD_LCD_D16__LCD_D16 | MXS_PAD_CTRL,
108 MX28_PAD_LCD_D17__LCD_D17 | MXS_PAD_CTRL,
109 MX28_PAD_LCD_D18__LCD_D18 | MXS_PAD_CTRL,
110 MX28_PAD_LCD_D19__LCD_D19 | MXS_PAD_CTRL,
111 MX28_PAD_LCD_D20__LCD_D20 | MXS_PAD_CTRL,
112 MX28_PAD_LCD_D21__LCD_D21 | MXS_PAD_CTRL,
113 MX28_PAD_LCD_D22__LCD_D22 | MXS_PAD_CTRL,
114 MX28_PAD_LCD_D23__LCD_D23 | MXS_PAD_CTRL,
115 MX28_PAD_LCD_RD_E__LCD_VSYNC | MXS_PAD_CTRL,
116 MX28_PAD_LCD_WR_RWN__LCD_HSYNC | MXS_PAD_CTRL,
117 MX28_PAD_LCD_RS__LCD_DOTCLK | MXS_PAD_CTRL,
118 MX28_PAD_LCD_CS__LCD_ENABLE | MXS_PAD_CTRL,
119 /* LCD panel enable */
120 MX28_PAD_LCD_RESET__GPIO_3_30 | MXS_PAD_CTRL,
121 /* backlight control */
122 MX28_PAD_PWM2__GPIO_3_18 | MXS_PAD_CTRL,
Shawn Guo5bb2c822011-02-22 16:50:24 +0800123 /* mmc0 */
124 MX28_PAD_SSP0_DATA0__SSP0_D0 |
125 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
126 MX28_PAD_SSP0_DATA1__SSP0_D1 |
127 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
128 MX28_PAD_SSP0_DATA2__SSP0_D2 |
129 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
130 MX28_PAD_SSP0_DATA3__SSP0_D3 |
131 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
132 MX28_PAD_SSP0_DATA4__SSP0_D4 |
133 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
134 MX28_PAD_SSP0_DATA5__SSP0_D5 |
135 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
136 MX28_PAD_SSP0_DATA6__SSP0_D6 |
137 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
138 MX28_PAD_SSP0_DATA7__SSP0_D7 |
139 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
140 MX28_PAD_SSP0_CMD__SSP0_CMD |
141 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
142 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT |
143 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
144 MX28_PAD_SSP0_SCK__SSP0_SCK |
145 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
146 /* write protect */
147 MX28_PAD_SSP1_SCK__GPIO_2_12 |
148 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
149 /* slot power enable */
150 MX28_PAD_PWM3__GPIO_3_28 |
151 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
152
153 /* mmc1 */
154 MX28_PAD_GPMI_D00__SSP1_D0 |
155 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
156 MX28_PAD_GPMI_D01__SSP1_D1 |
157 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
158 MX28_PAD_GPMI_D02__SSP1_D2 |
159 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
160 MX28_PAD_GPMI_D03__SSP1_D3 |
161 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
162 MX28_PAD_GPMI_D04__SSP1_D4 |
163 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
164 MX28_PAD_GPMI_D05__SSP1_D5 |
165 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
166 MX28_PAD_GPMI_D06__SSP1_D6 |
167 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
168 MX28_PAD_GPMI_D07__SSP1_D7 |
169 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
170 MX28_PAD_GPMI_RDY1__SSP1_CMD |
171 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
172 MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT |
173 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
174 MX28_PAD_GPMI_WRN__SSP1_SCK |
175 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
176 /* write protect */
177 MX28_PAD_GPMI_RESETN__GPIO_0_28 |
178 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
179 /* slot power enable */
180 MX28_PAD_PWM4__GPIO_3_29 |
181 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
Shawn Guo53b8ff92011-05-31 17:07:03 +0800182
183 /* led */
184 MX28_PAD_AUART1_TX__GPIO_3_5 | MXS_PAD_CTRL,
185};
186
187/* led */
188static const struct gpio_led mx28evk_leds[] __initconst = {
189 {
190 .name = "GPIO-LED",
191 .default_trigger = "heartbeat",
192 .gpio = MX28EVK_GPIO_LED,
193 },
194};
195
196static const struct gpio_led_platform_data mx28evk_led_data __initconst = {
197 .leds = mx28evk_leds,
198 .num_leds = ARRAY_SIZE(mx28evk_leds),
Shawn Guo4afbbb72010-12-18 21:39:35 +0800199};
200
201/* fec */
202static void __init mx28evk_fec_reset(void)
203{
204 int ret;
205 struct clk *clk;
206
207 /* Enable fec phy clock */
208 clk = clk_get_sys("pll2", NULL);
209 if (!IS_ERR(clk))
210 clk_enable(clk);
211
212 /* Power up fec phy */
213 ret = gpio_request(MX28EVK_FEC_PHY_POWER, "fec-phy-power");
214 if (ret) {
215 pr_err("Failed to request gpio fec-phy-%s: %d\n", "power", ret);
216 return;
217 }
218
219 ret = gpio_direction_output(MX28EVK_FEC_PHY_POWER, 0);
220 if (ret) {
221 pr_err("Failed to drive gpio fec-phy-%s: %d\n", "power", ret);
222 return;
223 }
224
225 /* Reset fec phy */
226 ret = gpio_request(MX28EVK_FEC_PHY_RESET, "fec-phy-reset");
227 if (ret) {
228 pr_err("Failed to request gpio fec-phy-%s: %d\n", "reset", ret);
229 return;
230 }
231
232 gpio_direction_output(MX28EVK_FEC_PHY_RESET, 0);
233 if (ret) {
234 pr_err("Failed to drive gpio fec-phy-%s: %d\n", "reset", ret);
235 return;
236 }
237
238 mdelay(1);
239 gpio_set_value(MX28EVK_FEC_PHY_RESET, 1);
240}
241
Shawn Guoa320b272011-01-14 15:25:52 +0800242static struct fec_platform_data mx28_fec_pdata[] __initdata = {
Shawn Guo48f76ed2011-01-11 20:09:24 +0800243 {
244 /* fec0 */
245 .phy = PHY_INTERFACE_MODE_RMII,
246 }, {
247 /* fec1 */
248 .phy = PHY_INTERFACE_MODE_RMII,
249 },
Shawn Guo4afbbb72010-12-18 21:39:35 +0800250};
251
Shawn Guoa320b272011-01-14 15:25:52 +0800252static int __init mx28evk_fec_get_mac(void)
253{
254 int i;
255 u32 val;
256 const u32 *ocotp = mxs_get_ocotp();
257
258 if (!ocotp)
259 goto error;
260
261 /*
262 * OCOTP only stores the last 4 octets for each mac address,
263 * so hard-code Freescale OUI (00:04:9f) here.
264 */
265 for (i = 0; i < 2; i++) {
266 val = ocotp[i * 4];
267 mx28_fec_pdata[i].mac[0] = 0x00;
268 mx28_fec_pdata[i].mac[1] = 0x04;
269 mx28_fec_pdata[i].mac[2] = 0x9f;
270 mx28_fec_pdata[i].mac[3] = (val >> 16) & 0xff;
271 mx28_fec_pdata[i].mac[4] = (val >> 8) & 0xff;
272 mx28_fec_pdata[i].mac[5] = (val >> 0) & 0xff;
273 }
274
275 return 0;
276
277error:
278 pr_err("%s: timeout when reading fec mac from OCOTP\n", __func__);
279 return -ETIMEDOUT;
280}
281
Shawn Guoacc9cdc2011-03-03 22:13:38 +0800282/*
283 * MX28EVK_FLEXCAN_SWITCH is shared between both flexcan controllers
284 */
285static int flexcan0_en, flexcan1_en;
286
287static void mx28evk_flexcan_switch(void)
288{
289 if (flexcan0_en || flexcan1_en)
290 gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 1);
291 else
292 gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 0);
293}
294
295static void mx28evk_flexcan0_switch(int enable)
296{
297 flexcan0_en = enable;
298 mx28evk_flexcan_switch();
299}
300
301static void mx28evk_flexcan1_switch(int enable)
302{
303 flexcan1_en = enable;
304 mx28evk_flexcan_switch();
305}
306
307static const struct flexcan_platform_data
308 mx28evk_flexcan_pdata[] __initconst = {
309 {
310 .transceiver_switch = mx28evk_flexcan0_switch,
311 }, {
312 .transceiver_switch = mx28evk_flexcan1_switch,
313 }
314};
315
Shawn Guo0590a792011-03-08 18:51:10 +0800316/* mxsfb (lcdif) */
317static struct fb_videomode mx28evk_video_modes[] = {
318 {
319 .name = "Seiko-43WVF1G",
320 .refresh = 60,
321 .xres = 800,
322 .yres = 480,
323 .pixclock = 29851, /* picosecond (33.5 MHz) */
324 .left_margin = 89,
325 .right_margin = 164,
326 .upper_margin = 23,
327 .lower_margin = 10,
328 .hsync_len = 10,
329 .vsync_len = 10,
330 .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT |
331 FB_SYNC_DOTCLK_FAILING_ACT,
332 },
333};
334
335static const struct mxsfb_platform_data mx28evk_mxsfb_pdata __initconst = {
336 .mode_list = mx28evk_video_modes,
337 .mode_count = ARRAY_SIZE(mx28evk_video_modes),
338 .default_bpp = 32,
339 .ld_intf_width = STMLCDIF_24BIT,
340};
341
Shawn Guo5bb2c822011-02-22 16:50:24 +0800342static struct mxs_mmc_platform_data mx28evk_mmc_pdata[] __initdata = {
343 {
344 /* mmc0 */
345 .wp_gpio = MX28EVK_MMC0_WRITE_PROTECT,
346 .flags = SLOTF_8_BIT_CAPABLE,
347 }, {
348 /* mmc1 */
349 .wp_gpio = MX28EVK_MMC1_WRITE_PROTECT,
350 .flags = SLOTF_8_BIT_CAPABLE,
351 },
352};
353
Fabio Estevama35b9142011-09-14 10:20:25 -0300354static struct gpio mx28evk_lcd_gpios[] = {
355 { MX28EVK_LCD_ENABLE, GPIOF_OUT_INIT_HIGH, "lcd-enable" },
356 { MX28EVK_BL_ENABLE, GPIOF_OUT_INIT_HIGH, "bl-enable" },
357};
358
Shawn Guo4afbbb72010-12-18 21:39:35 +0800359static void __init mx28evk_init(void)
360{
Shawn Guoacc9cdc2011-03-03 22:13:38 +0800361 int ret;
362
Shawn Guo4afbbb72010-12-18 21:39:35 +0800363 mxs_iomux_setup_multiple_pads(mx28evk_pads, ARRAY_SIZE(mx28evk_pads));
364
365 mx28_add_duart();
Shawn Guo15808182011-02-17 14:28:52 +0800366 mx28_add_auart0();
367 mx28_add_auart3();
Shawn Guo4afbbb72010-12-18 21:39:35 +0800368
Shawn Guoa320b272011-01-14 15:25:52 +0800369 if (mx28evk_fec_get_mac())
370 pr_warn("%s: failed on fec mac setup\n", __func__);
371
Shawn Guo4afbbb72010-12-18 21:39:35 +0800372 mx28evk_fec_reset();
Shawn Guo48f76ed2011-01-11 20:09:24 +0800373 mx28_add_fec(0, &mx28_fec_pdata[0]);
374 mx28_add_fec(1, &mx28_fec_pdata[1]);
Shawn Guoacc9cdc2011-03-03 22:13:38 +0800375
376 ret = gpio_request_one(MX28EVK_FLEXCAN_SWITCH, GPIOF_DIR_OUT,
377 "flexcan-switch");
378 if (ret) {
379 pr_err("failed to request gpio flexcan-switch: %d\n", ret);
380 } else {
381 mx28_add_flexcan(0, &mx28evk_flexcan_pdata[0]);
382 mx28_add_flexcan(1, &mx28evk_flexcan_pdata[1]);
383 }
Shawn Guo0590a792011-03-08 18:51:10 +0800384
Fabio Estevama35b9142011-09-14 10:20:25 -0300385 ret = gpio_request_array(mx28evk_lcd_gpios,
386 ARRAY_SIZE(mx28evk_lcd_gpios));
Shawn Guo0590a792011-03-08 18:51:10 +0800387 if (ret)
Fabio Estevama35b9142011-09-14 10:20:25 -0300388 pr_warn("failed to request gpio pins for lcd: %d\n", ret);
Shawn Guo0590a792011-03-08 18:51:10 +0800389 else
Fabio Estevama35b9142011-09-14 10:20:25 -0300390 mx28_add_mxsfb(&mx28evk_mxsfb_pdata);
Shawn Guo5bb2c822011-02-22 16:50:24 +0800391
392 /* power on mmc slot by writing 0 to the gpio */
Fabio Estevamc7dae182011-03-29 16:45:09 -0300393 ret = gpio_request_one(MX28EVK_MMC0_SLOT_POWER, GPIOF_OUT_INIT_LOW,
Shawn Guo5bb2c822011-02-22 16:50:24 +0800394 "mmc0-slot-power");
395 if (ret)
396 pr_warn("failed to request gpio mmc0-slot-power: %d\n", ret);
397 mx28_add_mxs_mmc(0, &mx28evk_mmc_pdata[0]);
398
Fabio Estevamc7dae182011-03-29 16:45:09 -0300399 ret = gpio_request_one(MX28EVK_MMC1_SLOT_POWER, GPIOF_OUT_INIT_LOW,
Shawn Guo5bb2c822011-02-22 16:50:24 +0800400 "mmc1-slot-power");
401 if (ret)
402 pr_warn("failed to request gpio mmc1-slot-power: %d\n", ret);
Fabio Estevama35b9142011-09-14 10:20:25 -0300403 else
404 mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]);
Shawn Guo53b8ff92011-05-31 17:07:03 +0800405
406 gpio_led_register_device(0, &mx28evk_led_data);
Shawn Guo4afbbb72010-12-18 21:39:35 +0800407}
408
409static void __init mx28evk_timer_init(void)
410{
411 mx28_clocks_init();
412}
413
414static struct sys_timer mx28evk_timer = {
415 .init = mx28evk_timer_init,
416};
417
418MACHINE_START(MX28EVK, "Freescale MX28 EVK")
419 /* Maintainer: Freescale Semiconductor, Inc. */
420 .map_io = mx28_map_io,
421 .init_irq = mx28_init_irq,
422 .init_machine = mx28evk_init,
423 .timer = &mx28evk_timer,
424MACHINE_END