blob: 072f5530373e0fe050247831eeee5b74e04308ea [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* arch/sparc64/mm/tlb.c
2 *
3 * Copyright (C) 2004 David S. Miller <davem@redhat.com>
4 */
5
6#include <linux/kernel.h>
7#include <linux/init.h>
8#include <linux/percpu.h>
9#include <linux/mm.h>
10#include <linux/swap.h>
David S. Millerc9f29462006-04-30 22:54:27 -070011#include <linux/preempt.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070012
13#include <asm/pgtable.h>
14#include <asm/pgalloc.h>
15#include <asm/tlbflush.h>
16#include <asm/cacheflush.h>
17#include <asm/mmu_context.h>
18#include <asm/tlb.h>
19
20/* Heavily inspired by the ppc64 code. */
21
Peter Zijlstra90f08e32011-05-24 17:11:50 -070022static DEFINE_PER_CPU(struct tlb_batch, tlb_batch);
Linus Torvalds1da177e2005-04-16 15:20:36 -070023
24void flush_tlb_pending(void)
25{
Peter Zijlstra90f08e32011-05-24 17:11:50 -070026 struct tlb_batch *tb = &get_cpu_var(tlb_batch);
David S. Millerbf6f8412013-04-19 17:26:26 -040027 struct mm_struct *mm = tb->mm;
Linus Torvalds1da177e2005-04-16 15:20:36 -070028
David S. Millerbf6f8412013-04-19 17:26:26 -040029 if (!tb->tlb_nr)
30 goto out;
David S. Miller74bf4312006-01-31 18:29:18 -080031
David S. Millerbf6f8412013-04-19 17:26:26 -040032 flush_tsb_user(tb);
33
34 if (CTX_VALID(mm->context)) {
35 if (tb->tlb_nr == 1) {
36 global_flush_tlb_page(mm, tb->vaddrs[0]);
37 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -070038#ifdef CONFIG_SMP
Peter Zijlstra90f08e32011-05-24 17:11:50 -070039 smp_flush_tlb_pending(tb->mm, tb->tlb_nr,
40 &tb->vaddrs[0]);
Linus Torvalds1da177e2005-04-16 15:20:36 -070041#else
Peter Zijlstra90f08e32011-05-24 17:11:50 -070042 __flush_tlb_pending(CTX_HWBITS(tb->mm->context),
43 tb->tlb_nr, &tb->vaddrs[0]);
Linus Torvalds1da177e2005-04-16 15:20:36 -070044#endif
45 }
Linus Torvalds1da177e2005-04-16 15:20:36 -070046 }
David S. Millerc9f29462006-04-30 22:54:27 -070047
David S. Millerbf6f8412013-04-19 17:26:26 -040048 tb->tlb_nr = 0;
49
50out:
Peter Zijlstra90f08e32011-05-24 17:11:50 -070051 put_cpu_var(tlb_batch);
Linus Torvalds1da177e2005-04-16 15:20:36 -070052}
53
David S. Millerbf6f8412013-04-19 17:26:26 -040054void arch_enter_lazy_mmu_mode(void)
55{
56 struct tlb_batch *tb = &__get_cpu_var(tlb_batch);
57
58 tb->active = 1;
59}
60
61void arch_leave_lazy_mmu_mode(void)
62{
63 struct tlb_batch *tb = &__get_cpu_var(tlb_batch);
64
65 if (tb->tlb_nr)
66 flush_tlb_pending();
67 tb->active = 0;
68}
69
Peter Zijlstra90f08e32011-05-24 17:11:50 -070070void tlb_batch_add(struct mm_struct *mm, unsigned long vaddr,
71 pte_t *ptep, pte_t orig, int fullmm)
Linus Torvalds1da177e2005-04-16 15:20:36 -070072{
Peter Zijlstra90f08e32011-05-24 17:11:50 -070073 struct tlb_batch *tb = &get_cpu_var(tlb_batch);
Linus Torvalds1da177e2005-04-16 15:20:36 -070074 unsigned long nr;
75
76 vaddr &= PAGE_MASK;
77 if (pte_exec(orig))
78 vaddr |= 0x1UL;
79
David S. Miller7a591cf2006-02-26 19:44:50 -080080 if (tlb_type != hypervisor &&
81 pte_dirty(orig)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -070082 unsigned long paddr, pfn = pte_pfn(orig);
83 struct address_space *mapping;
84 struct page *page;
85
86 if (!pfn_valid(pfn))
87 goto no_cache_flush;
88
89 page = pfn_to_page(pfn);
90 if (PageReserved(page))
91 goto no_cache_flush;
92
93 /* A real file page? */
94 mapping = page_mapping(page);
95 if (!mapping)
96 goto no_cache_flush;
97
98 paddr = (unsigned long) page_address(page);
99 if ((paddr ^ vaddr) & (1 << 13))
100 flush_dcache_page_all(mm, page);
101 }
102
103no_cache_flush:
104
Peter Zijlstra90f08e32011-05-24 17:11:50 -0700105 if (fullmm) {
106 put_cpu_var(tlb_batch);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700107 return;
Peter Zijlstra90f08e32011-05-24 17:11:50 -0700108 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700109
Peter Zijlstra90f08e32011-05-24 17:11:50 -0700110 nr = tb->tlb_nr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700111
Peter Zijlstra90f08e32011-05-24 17:11:50 -0700112 if (unlikely(nr != 0 && mm != tb->mm)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700113 flush_tlb_pending();
114 nr = 0;
115 }
116
David S. Millerbf6f8412013-04-19 17:26:26 -0400117 if (!tb->active) {
David S. Millerbf6f8412013-04-19 17:26:26 -0400118 flush_tsb_user_page(mm, vaddr);
Dave Kleikampade18c12013-06-18 09:05:36 -0500119 global_flush_tlb_page(mm, vaddr);
David S. Millerbf6f8412013-04-19 17:26:26 -0400120 goto out;
121 }
122
Linus Torvalds1da177e2005-04-16 15:20:36 -0700123 if (nr == 0)
Peter Zijlstra90f08e32011-05-24 17:11:50 -0700124 tb->mm = mm;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700125
Peter Zijlstra90f08e32011-05-24 17:11:50 -0700126 tb->vaddrs[nr] = vaddr;
127 tb->tlb_nr = ++nr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700128 if (nr >= TLB_BATCH_NR)
129 flush_tlb_pending();
Peter Zijlstra90f08e32011-05-24 17:11:50 -0700130
David S. Millerbf6f8412013-04-19 17:26:26 -0400131out:
Peter Zijlstra90f08e32011-05-24 17:11:50 -0700132 put_cpu_var(tlb_batch);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700133}